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[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41
42 gl_shader_stage stage;
43 shader_info *info;
44
45 LLVMValueRef *ssa_defs;
46
47 LLVMValueRef scratch;
48 LLVMValueRef constant_data;
49
50 struct hash_table *defs;
51 struct hash_table *phis;
52 struct hash_table *vars;
53
54 LLVMValueRef main_function;
55 LLVMBasicBlockRef continue_block;
56 LLVMBasicBlockRef break_block;
57
58 int num_locals;
59 LLVMValueRef *locals;
60 };
61
62 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
63 nir_deref_instr *deref_instr,
64 enum ac_descriptor_type desc_type,
65 const nir_instr *instr,
66 bool image, bool write);
67
68 static void
69 build_store_values_extended(struct ac_llvm_context *ac,
70 LLVMValueRef *values,
71 unsigned value_count,
72 unsigned value_stride,
73 LLVMValueRef vec)
74 {
75 LLVMBuilderRef builder = ac->builder;
76 unsigned i;
77
78 for (i = 0; i < value_count; i++) {
79 LLVMValueRef ptr = values[i * value_stride];
80 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
81 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
82 LLVMBuildStore(builder, value, ptr);
83 }
84 }
85
86 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
87 const nir_ssa_def *def)
88 {
89 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
90 if (def->num_components > 1) {
91 type = LLVMVectorType(type, def->num_components);
92 }
93 return type;
94 }
95
96 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
97 {
98 assert(src.is_ssa);
99 return nir->ssa_defs[src.ssa->index];
100 }
101
102 static LLVMValueRef
103 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
104 {
105 LLVMValueRef ptr = get_src(ctx, src);
106 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
107 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
108
109 return LLVMBuildBitCast(ctx->ac.builder, ptr,
110 LLVMPointerType(ctx->ac.i32, addr_space), "");
111 }
112
113 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
114 const struct nir_block *b)
115 {
116 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
117 return (LLVMBasicBlockRef)entry->data;
118 }
119
120 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
121 nir_alu_src src,
122 unsigned num_components)
123 {
124 LLVMValueRef value = get_src(ctx, src.src);
125 bool need_swizzle = false;
126
127 assert(value);
128 unsigned src_components = ac_get_llvm_num_components(value);
129 for (unsigned i = 0; i < num_components; ++i) {
130 assert(src.swizzle[i] < src_components);
131 if (src.swizzle[i] != i)
132 need_swizzle = true;
133 }
134
135 if (need_swizzle || num_components != src_components) {
136 LLVMValueRef masks[] = {
137 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
138 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
139 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
140 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
141
142 if (src_components > 1 && num_components == 1) {
143 value = LLVMBuildExtractElement(ctx->ac.builder, value,
144 masks[0], "");
145 } else if (src_components == 1 && num_components > 1) {
146 LLVMValueRef values[] = {value, value, value, value};
147 value = ac_build_gather_values(&ctx->ac, values, num_components);
148 } else {
149 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
150 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
151 swizzle, "");
152 }
153 }
154 assert(!src.negate);
155 assert(!src.abs);
156 return value;
157 }
158
159 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
160 LLVMIntPredicate pred, LLVMValueRef src0,
161 LLVMValueRef src1)
162 {
163 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
164 return LLVMBuildSelect(ctx->builder, result,
165 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
166 ctx->i32_0, "");
167 }
168
169 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
170 LLVMRealPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMValueRef result;
174 src0 = ac_to_float(ctx, src0);
175 src1 = ac_to_float(ctx, src1);
176 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
177 return LLVMBuildSelect(ctx->builder, result,
178 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
179 ctx->i32_0, "");
180 }
181
182 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
183 const char *intrin,
184 LLVMTypeRef result_type,
185 LLVMValueRef src0)
186 {
187 char name[64];
188 LLVMValueRef params[] = {
189 ac_to_float(ctx, src0),
190 };
191
192 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
193 ac_get_elem_bits(ctx, result_type));
194 assert(length < sizeof(name));
195 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
196 }
197
198 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
199 const char *intrin,
200 LLVMTypeRef result_type,
201 LLVMValueRef src0, LLVMValueRef src1)
202 {
203 char name[64];
204 LLVMValueRef params[] = {
205 ac_to_float(ctx, src0),
206 ac_to_float(ctx, src1),
207 };
208
209 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
210 ac_get_elem_bits(ctx, result_type));
211 assert(length < sizeof(name));
212 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
213 }
214
215 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
216 const char *intrin,
217 LLVMTypeRef result_type,
218 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
219 {
220 char name[64];
221 LLVMValueRef params[] = {
222 ac_to_float(ctx, src0),
223 ac_to_float(ctx, src1),
224 ac_to_float(ctx, src2),
225 };
226
227 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
228 ac_get_elem_bits(ctx, result_type));
229 assert(length < sizeof(name));
230 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
231 }
232
233 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
234 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
235 {
236 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
237
238 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
239 ctx->i32_0, "");
240 return LLVMBuildSelect(ctx->builder, v,
241 ac_to_integer_or_pointer(ctx, src1),
242 ac_to_integer_or_pointer(ctx, src2), "");
243 }
244
245 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
246 LLVMValueRef src0)
247 {
248 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
249 }
250
251 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
252 const char *intrin,
253 LLVMValueRef src0, LLVMValueRef src1)
254 {
255 LLVMTypeRef ret_type;
256 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
257 LLVMValueRef res;
258 LLVMValueRef params[] = { src0, src1 };
259 ret_type = LLVMStructTypeInContext(ctx->context, types,
260 2, true);
261
262 res = ac_build_intrinsic(ctx, intrin, ret_type,
263 params, 2, AC_FUNC_ATTR_READNONE);
264
265 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
266 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
267 return res;
268 }
269
270 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
271 LLVMValueRef src0,
272 unsigned bitsize)
273 {
274 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
275 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
276 "");
277 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
278
279 switch (bitsize) {
280 case 16:
281 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
282 case 32:
283 return result;
284 case 64:
285 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
286 default:
287 unreachable("Unsupported bit size.");
288 }
289 }
290
291 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
292 LLVMValueRef src0)
293 {
294 src0 = ac_to_float(ctx, src0);
295 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
296 return LLVMBuildSExt(ctx->builder,
297 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
298 ctx->i32, "");
299 }
300
301 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
302 LLVMValueRef src0,
303 unsigned bitsize)
304 {
305 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
306
307 switch (bitsize) {
308 case 8:
309 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
310 case 16:
311 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
312 case 32:
313 return result;
314 case 64:
315 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
316 default:
317 unreachable("Unsupported bit size.");
318 }
319 }
320
321 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
322 LLVMValueRef src0)
323 {
324 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
325 return LLVMBuildSExt(ctx->builder,
326 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
327 ctx->i32, "");
328 }
329
330 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
331 LLVMValueRef src0)
332 {
333 LLVMValueRef result;
334 LLVMValueRef cond = NULL;
335
336 src0 = ac_to_float(ctx, src0);
337 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
338
339 if (ctx->chip_class >= GFX8) {
340 LLVMValueRef args[2];
341 /* Check if the result is a denormal - and flush to 0 if so. */
342 args[0] = result;
343 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
344 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
345 }
346
347 /* need to convert back up to f32 */
348 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
349
350 if (ctx->chip_class >= GFX8)
351 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
352 else {
353 /* for GFX6-GFX7 */
354 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
355 * so compare the result and flush to 0 if it's smaller.
356 */
357 LLVMValueRef temp, cond2;
358 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
359 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
360 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
361 temp, "");
362 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
363 temp, ctx->f32_0, "");
364 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
365 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
366 }
367 return result;
368 }
369
370 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
371 LLVMValueRef src0, LLVMValueRef src1)
372 {
373 LLVMValueRef dst64, result;
374 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
375 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
376
377 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
378 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
379 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
380 return result;
381 }
382
383 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
384 LLVMValueRef src0, LLVMValueRef src1)
385 {
386 LLVMValueRef dst64, result;
387 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
388 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
389
390 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
391 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
392 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
393 return result;
394 }
395
396 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
397 LLVMValueRef bits, LLVMValueRef offset)
398 {
399 /* mask = ((1 << bits) - 1) << offset */
400 return LLVMBuildShl(ctx->builder,
401 LLVMBuildSub(ctx->builder,
402 LLVMBuildShl(ctx->builder,
403 ctx->i32_1,
404 bits, ""),
405 ctx->i32_1, ""),
406 offset, "");
407 }
408
409 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
410 LLVMValueRef mask, LLVMValueRef insert,
411 LLVMValueRef base)
412 {
413 /* Calculate:
414 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
415 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
416 */
417 return LLVMBuildXor(ctx->builder, base,
418 LLVMBuildAnd(ctx->builder, mask,
419 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
420 }
421
422 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
423 LLVMValueRef src0,
424 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
425 LLVMValueRef args[2]))
426 {
427 LLVMValueRef comp[2];
428
429 src0 = ac_to_float(ctx, src0);
430 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
431 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
432
433 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
434 }
435
436 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
437 LLVMValueRef src0)
438 {
439 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
440 LLVMValueRef temps[2], val;
441 int i;
442
443 for (i = 0; i < 2; i++) {
444 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
445 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
446 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
447 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
448 }
449 return ac_build_gather_values(ctx, temps, 2);
450 }
451
452 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
453 nir_op op,
454 LLVMValueRef src0)
455 {
456 unsigned mask;
457 int idx;
458 LLVMValueRef result;
459
460 if (op == nir_op_fddx_fine)
461 mask = AC_TID_MASK_LEFT;
462 else if (op == nir_op_fddy_fine)
463 mask = AC_TID_MASK_TOP;
464 else
465 mask = AC_TID_MASK_TOP_LEFT;
466
467 /* for DDX we want to next X pixel, DDY next Y pixel. */
468 if (op == nir_op_fddx_fine ||
469 op == nir_op_fddx_coarse ||
470 op == nir_op_fddx)
471 idx = 1;
472 else
473 idx = 2;
474
475 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
476 return result;
477 }
478
479 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
480 {
481 LLVMValueRef src[4], result = NULL;
482 unsigned num_components = instr->dest.dest.ssa.num_components;
483 unsigned src_components;
484 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
485
486 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
487 switch (instr->op) {
488 case nir_op_vec2:
489 case nir_op_vec3:
490 case nir_op_vec4:
491 src_components = 1;
492 break;
493 case nir_op_pack_half_2x16:
494 case nir_op_pack_snorm_2x16:
495 case nir_op_pack_unorm_2x16:
496 src_components = 2;
497 break;
498 case nir_op_unpack_half_2x16:
499 src_components = 1;
500 break;
501 case nir_op_cube_face_coord:
502 case nir_op_cube_face_index:
503 src_components = 3;
504 break;
505 default:
506 src_components = num_components;
507 break;
508 }
509 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
510 src[i] = get_alu_src(ctx, instr->src[i], src_components);
511
512 switch (instr->op) {
513 case nir_op_mov:
514 result = src[0];
515 break;
516 case nir_op_fneg:
517 src[0] = ac_to_float(&ctx->ac, src[0]);
518 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
519 break;
520 case nir_op_ineg:
521 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
522 break;
523 case nir_op_inot:
524 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
525 break;
526 case nir_op_iadd:
527 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
528 break;
529 case nir_op_fadd:
530 src[0] = ac_to_float(&ctx->ac, src[0]);
531 src[1] = ac_to_float(&ctx->ac, src[1]);
532 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
533 break;
534 case nir_op_fsub:
535 src[0] = ac_to_float(&ctx->ac, src[0]);
536 src[1] = ac_to_float(&ctx->ac, src[1]);
537 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
538 break;
539 case nir_op_isub:
540 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
541 break;
542 case nir_op_imul:
543 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
544 break;
545 case nir_op_imod:
546 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
547 break;
548 case nir_op_umod:
549 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
550 break;
551 case nir_op_fmod:
552 src[0] = ac_to_float(&ctx->ac, src[0]);
553 src[1] = ac_to_float(&ctx->ac, src[1]);
554 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
555 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
556 ac_to_float_type(&ctx->ac, def_type), result);
557 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
558 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
559 break;
560 case nir_op_frem:
561 src[0] = ac_to_float(&ctx->ac, src[0]);
562 src[1] = ac_to_float(&ctx->ac, src[1]);
563 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
564 break;
565 case nir_op_irem:
566 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
567 break;
568 case nir_op_idiv:
569 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
570 break;
571 case nir_op_udiv:
572 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
573 break;
574 case nir_op_fmul:
575 src[0] = ac_to_float(&ctx->ac, src[0]);
576 src[1] = ac_to_float(&ctx->ac, src[1]);
577 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
578 break;
579 case nir_op_frcp:
580 src[0] = ac_to_float(&ctx->ac, src[0]);
581 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
582 break;
583 case nir_op_iand:
584 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
585 break;
586 case nir_op_ior:
587 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
588 break;
589 case nir_op_ixor:
590 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
591 break;
592 case nir_op_ishl:
593 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
594 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
595 LLVMTypeOf(src[0]), "");
596 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
597 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
598 LLVMTypeOf(src[0]), "");
599 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
600 break;
601 case nir_op_ishr:
602 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
603 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
604 LLVMTypeOf(src[0]), "");
605 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
606 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
607 LLVMTypeOf(src[0]), "");
608 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
609 break;
610 case nir_op_ushr:
611 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
612 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
613 LLVMTypeOf(src[0]), "");
614 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
615 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
616 LLVMTypeOf(src[0]), "");
617 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
618 break;
619 case nir_op_ilt32:
620 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
621 break;
622 case nir_op_ine32:
623 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
624 break;
625 case nir_op_ieq32:
626 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
627 break;
628 case nir_op_ige32:
629 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
630 break;
631 case nir_op_ult32:
632 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
633 break;
634 case nir_op_uge32:
635 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
636 break;
637 case nir_op_feq32:
638 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
639 break;
640 case nir_op_fne32:
641 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
642 break;
643 case nir_op_flt32:
644 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
645 break;
646 case nir_op_fge32:
647 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
648 break;
649 case nir_op_fabs:
650 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
651 ac_to_float_type(&ctx->ac, def_type), src[0]);
652 break;
653 case nir_op_iabs:
654 result = emit_iabs(&ctx->ac, src[0]);
655 break;
656 case nir_op_imax:
657 result = ac_build_imax(&ctx->ac, src[0], src[1]);
658 break;
659 case nir_op_imin:
660 result = ac_build_imin(&ctx->ac, src[0], src[1]);
661 break;
662 case nir_op_umax:
663 result = ac_build_umax(&ctx->ac, src[0], src[1]);
664 break;
665 case nir_op_umin:
666 result = ac_build_umin(&ctx->ac, src[0], src[1]);
667 break;
668 case nir_op_isign:
669 result = ac_build_isign(&ctx->ac, src[0],
670 instr->dest.dest.ssa.bit_size);
671 break;
672 case nir_op_fsign:
673 src[0] = ac_to_float(&ctx->ac, src[0]);
674 result = ac_build_fsign(&ctx->ac, src[0],
675 instr->dest.dest.ssa.bit_size);
676 break;
677 case nir_op_ffloor:
678 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
679 ac_to_float_type(&ctx->ac, def_type), src[0]);
680 break;
681 case nir_op_ftrunc:
682 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
683 ac_to_float_type(&ctx->ac, def_type), src[0]);
684 break;
685 case nir_op_fceil:
686 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
687 ac_to_float_type(&ctx->ac, def_type), src[0]);
688 break;
689 case nir_op_fround_even:
690 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
691 ac_to_float_type(&ctx->ac, def_type),src[0]);
692 break;
693 case nir_op_ffract:
694 src[0] = ac_to_float(&ctx->ac, src[0]);
695 result = ac_build_fract(&ctx->ac, src[0],
696 instr->dest.dest.ssa.bit_size);
697 break;
698 case nir_op_fsin:
699 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
700 ac_to_float_type(&ctx->ac, def_type), src[0]);
701 break;
702 case nir_op_fcos:
703 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
704 ac_to_float_type(&ctx->ac, def_type), src[0]);
705 break;
706 case nir_op_fsqrt:
707 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
708 ac_to_float_type(&ctx->ac, def_type), src[0]);
709 break;
710 case nir_op_fexp2:
711 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
712 ac_to_float_type(&ctx->ac, def_type), src[0]);
713 break;
714 case nir_op_flog2:
715 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
716 ac_to_float_type(&ctx->ac, def_type), src[0]);
717 break;
718 case nir_op_frsq:
719 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
720 ac_to_float_type(&ctx->ac, def_type), src[0]);
721 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
722 break;
723 case nir_op_frexp_exp:
724 src[0] = ac_to_float(&ctx->ac, src[0]);
725 result = ac_build_frexp_exp(&ctx->ac, src[0],
726 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
727 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
728 result = LLVMBuildSExt(ctx->ac.builder, result,
729 ctx->ac.i32, "");
730 break;
731 case nir_op_frexp_sig:
732 src[0] = ac_to_float(&ctx->ac, src[0]);
733 result = ac_build_frexp_mant(&ctx->ac, src[0],
734 instr->dest.dest.ssa.bit_size);
735 break;
736 case nir_op_fpow:
737 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
738 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
739 break;
740 case nir_op_fmax:
741 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
742 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
743 if (ctx->ac.chip_class < GFX9 &&
744 instr->dest.dest.ssa.bit_size == 32) {
745 /* Only pre-GFX9 chips do not flush denorms. */
746 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
747 ac_to_float_type(&ctx->ac, def_type),
748 result);
749 }
750 break;
751 case nir_op_fmin:
752 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
753 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
754 if (ctx->ac.chip_class < GFX9 &&
755 instr->dest.dest.ssa.bit_size == 32) {
756 /* Only pre-GFX9 chips do not flush denorms. */
757 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
758 ac_to_float_type(&ctx->ac, def_type),
759 result);
760 }
761 break;
762 case nir_op_ffma:
763 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
764 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
765 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
766 break;
767 case nir_op_ldexp:
768 src[0] = ac_to_float(&ctx->ac, src[0]);
769 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
770 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
771 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
772 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
773 else
774 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
775 break;
776 case nir_op_bfm:
777 result = emit_bfm(&ctx->ac, src[0], src[1]);
778 break;
779 case nir_op_bitfield_select:
780 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
781 break;
782 case nir_op_ubfe:
783 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
784 break;
785 case nir_op_ibfe:
786 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
787 break;
788 case nir_op_bitfield_reverse:
789 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
790 break;
791 case nir_op_bit_count:
792 result = ac_build_bit_count(&ctx->ac, src[0]);
793 break;
794 case nir_op_vec2:
795 case nir_op_vec3:
796 case nir_op_vec4:
797 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
798 src[i] = ac_to_integer(&ctx->ac, src[i]);
799 result = ac_build_gather_values(&ctx->ac, src, num_components);
800 break;
801 case nir_op_f2i8:
802 case nir_op_f2i16:
803 case nir_op_f2i32:
804 case nir_op_f2i64:
805 src[0] = ac_to_float(&ctx->ac, src[0]);
806 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
807 break;
808 case nir_op_f2u8:
809 case nir_op_f2u16:
810 case nir_op_f2u32:
811 case nir_op_f2u64:
812 src[0] = ac_to_float(&ctx->ac, src[0]);
813 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
814 break;
815 case nir_op_i2f16:
816 case nir_op_i2f32:
817 case nir_op_i2f64:
818 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
819 break;
820 case nir_op_u2f16:
821 case nir_op_u2f32:
822 case nir_op_u2f64:
823 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
824 break;
825 case nir_op_f2f16_rtz:
826 src[0] = ac_to_float(&ctx->ac, src[0]);
827 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
828 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
829 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
830 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
831 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
832 break;
833 case nir_op_f2f16_rtne:
834 case nir_op_f2f16:
835 case nir_op_f2f32:
836 case nir_op_f2f64:
837 src[0] = ac_to_float(&ctx->ac, src[0]);
838 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
839 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
840 else
841 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
842 break;
843 case nir_op_u2u8:
844 case nir_op_u2u16:
845 case nir_op_u2u32:
846 case nir_op_u2u64:
847 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
848 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
849 else
850 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
851 break;
852 case nir_op_i2i8:
853 case nir_op_i2i16:
854 case nir_op_i2i32:
855 case nir_op_i2i64:
856 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
857 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
858 else
859 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
860 break;
861 case nir_op_b32csel:
862 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
863 break;
864 case nir_op_find_lsb:
865 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
866 break;
867 case nir_op_ufind_msb:
868 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
869 break;
870 case nir_op_ifind_msb:
871 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
872 break;
873 case nir_op_uadd_carry:
874 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
875 break;
876 case nir_op_usub_borrow:
877 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
878 break;
879 case nir_op_b2f16:
880 case nir_op_b2f32:
881 case nir_op_b2f64:
882 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
883 break;
884 case nir_op_f2b32:
885 result = emit_f2b(&ctx->ac, src[0]);
886 break;
887 case nir_op_b2i8:
888 case nir_op_b2i16:
889 case nir_op_b2i32:
890 case nir_op_b2i64:
891 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
892 break;
893 case nir_op_i2b32:
894 result = emit_i2b(&ctx->ac, src[0]);
895 break;
896 case nir_op_fquantize2f16:
897 result = emit_f2f16(&ctx->ac, src[0]);
898 break;
899 case nir_op_umul_high:
900 result = emit_umul_high(&ctx->ac, src[0], src[1]);
901 break;
902 case nir_op_imul_high:
903 result = emit_imul_high(&ctx->ac, src[0], src[1]);
904 break;
905 case nir_op_pack_half_2x16:
906 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
907 break;
908 case nir_op_pack_snorm_2x16:
909 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
910 break;
911 case nir_op_pack_unorm_2x16:
912 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
913 break;
914 case nir_op_unpack_half_2x16:
915 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
916 break;
917 case nir_op_fddx:
918 case nir_op_fddy:
919 case nir_op_fddx_fine:
920 case nir_op_fddy_fine:
921 case nir_op_fddx_coarse:
922 case nir_op_fddy_coarse:
923 result = emit_ddxy(ctx, instr->op, src[0]);
924 break;
925
926 case nir_op_unpack_64_2x32_split_x: {
927 assert(ac_get_llvm_num_components(src[0]) == 1);
928 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
929 ctx->ac.v2i32,
930 "");
931 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
932 ctx->ac.i32_0, "");
933 break;
934 }
935
936 case nir_op_unpack_64_2x32_split_y: {
937 assert(ac_get_llvm_num_components(src[0]) == 1);
938 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
939 ctx->ac.v2i32,
940 "");
941 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
942 ctx->ac.i32_1, "");
943 break;
944 }
945
946 case nir_op_pack_64_2x32_split: {
947 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
948 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
949 break;
950 }
951
952 case nir_op_pack_32_2x16_split: {
953 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
954 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
955 break;
956 }
957
958 case nir_op_unpack_32_2x16_split_x: {
959 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
960 ctx->ac.v2i16,
961 "");
962 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
963 ctx->ac.i32_0, "");
964 break;
965 }
966
967 case nir_op_unpack_32_2x16_split_y: {
968 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
969 ctx->ac.v2i16,
970 "");
971 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
972 ctx->ac.i32_1, "");
973 break;
974 }
975
976 case nir_op_cube_face_coord: {
977 src[0] = ac_to_float(&ctx->ac, src[0]);
978 LLVMValueRef results[2];
979 LLVMValueRef in[3];
980 for (unsigned chan = 0; chan < 3; chan++)
981 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
982 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
983 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
984 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
985 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
986 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
987 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
988 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
989 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
990 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
991 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
992 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
993 result = ac_build_gather_values(&ctx->ac, results, 2);
994 break;
995 }
996
997 case nir_op_cube_face_index: {
998 src[0] = ac_to_float(&ctx->ac, src[0]);
999 LLVMValueRef in[3];
1000 for (unsigned chan = 0; chan < 3; chan++)
1001 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1002 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1003 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1004 break;
1005 }
1006
1007 case nir_op_fmin3:
1008 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1009 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1010 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1011 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1012 break;
1013 case nir_op_umin3:
1014 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1015 result = ac_build_umin(&ctx->ac, result, src[2]);
1016 break;
1017 case nir_op_imin3:
1018 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1019 result = ac_build_imin(&ctx->ac, result, src[2]);
1020 break;
1021 case nir_op_fmax3:
1022 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1023 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1024 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1025 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1026 break;
1027 case nir_op_umax3:
1028 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1029 result = ac_build_umax(&ctx->ac, result, src[2]);
1030 break;
1031 case nir_op_imax3:
1032 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1033 result = ac_build_imax(&ctx->ac, result, src[2]);
1034 break;
1035 case nir_op_fmed3: {
1036 src[0] = ac_to_float(&ctx->ac, src[0]);
1037 src[1] = ac_to_float(&ctx->ac, src[1]);
1038 src[2] = ac_to_float(&ctx->ac, src[2]);
1039 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1040 instr->dest.dest.ssa.bit_size);
1041 break;
1042 }
1043 case nir_op_imed3: {
1044 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1045 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1046 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1047 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1048 break;
1049 }
1050 case nir_op_umed3: {
1051 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1052 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1053 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1054 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1055 break;
1056 }
1057
1058 default:
1059 fprintf(stderr, "Unknown NIR alu instr: ");
1060 nir_print_instr(&instr->instr, stderr);
1061 fprintf(stderr, "\n");
1062 abort();
1063 }
1064
1065 if (result) {
1066 assert(instr->dest.dest.is_ssa);
1067 result = ac_to_integer_or_pointer(&ctx->ac, result);
1068 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1069 }
1070 }
1071
1072 static void visit_load_const(struct ac_nir_context *ctx,
1073 const nir_load_const_instr *instr)
1074 {
1075 LLVMValueRef values[4], value = NULL;
1076 LLVMTypeRef element_type =
1077 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1078
1079 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1080 switch (instr->def.bit_size) {
1081 case 8:
1082 values[i] = LLVMConstInt(element_type,
1083 instr->value[i].u8, false);
1084 break;
1085 case 16:
1086 values[i] = LLVMConstInt(element_type,
1087 instr->value[i].u16, false);
1088 break;
1089 case 32:
1090 values[i] = LLVMConstInt(element_type,
1091 instr->value[i].u32, false);
1092 break;
1093 case 64:
1094 values[i] = LLVMConstInt(element_type,
1095 instr->value[i].u64, false);
1096 break;
1097 default:
1098 fprintf(stderr,
1099 "unsupported nir load_const bit_size: %d\n",
1100 instr->def.bit_size);
1101 abort();
1102 }
1103 }
1104 if (instr->def.num_components > 1) {
1105 value = LLVMConstVector(values, instr->def.num_components);
1106 } else
1107 value = values[0];
1108
1109 ctx->ssa_defs[instr->def.index] = value;
1110 }
1111
1112 static LLVMValueRef
1113 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1114 {
1115 LLVMValueRef size =
1116 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1117 LLVMConstInt(ctx->ac.i32, 2, false), "");
1118
1119 /* GFX8 only */
1120 if (ctx->ac.chip_class == GFX8 && in_elements) {
1121 /* On GFX8, the descriptor contains the size in bytes,
1122 * but TXQ must return the size in elements.
1123 * The stride is always non-zero for resources using TXQ.
1124 */
1125 LLVMValueRef stride =
1126 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1127 ctx->ac.i32_1, "");
1128 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1129 LLVMConstInt(ctx->ac.i32, 16, false), "");
1130 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1131 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1132
1133 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1134 }
1135 return size;
1136 }
1137
1138 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1139 * incorrectly forces nearest filtering if the texture format is integer.
1140 * The only effect it has on Gather4, which always returns 4 texels for
1141 * bilinear filtering, is that the final coordinates are off by 0.5 of
1142 * the texel size.
1143 *
1144 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1145 * or (0.5 / size) from the normalized coordinates.
1146 *
1147 * However, cube textures with 8_8_8_8 data formats require a different
1148 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1149 * precision in 32-bit data formats, so it needs to be applied dynamically at
1150 * runtime. In this case, return an i1 value that indicates whether the
1151 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1152 */
1153 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1154 nir_variable *var,
1155 struct ac_image_args *args,
1156 const nir_tex_instr *instr)
1157 {
1158 const struct glsl_type *type = glsl_without_array(var->type);
1159 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1160 LLVMValueRef wa_8888 = NULL;
1161 LLVMValueRef half_texel[2];
1162 LLVMValueRef result;
1163
1164 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1165
1166 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1167 LLVMValueRef formats;
1168 LLVMValueRef data_format;
1169 LLVMValueRef wa_formats;
1170
1171 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1172
1173 data_format = LLVMBuildLShr(ctx->builder, formats,
1174 LLVMConstInt(ctx->i32, 20, false), "");
1175 data_format = LLVMBuildAnd(ctx->builder, data_format,
1176 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1177 wa_8888 = LLVMBuildICmp(
1178 ctx->builder, LLVMIntEQ, data_format,
1179 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1180 "");
1181
1182 uint32_t wa_num_format =
1183 stype == GLSL_TYPE_UINT ?
1184 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1185 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1186 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1187 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1188 "");
1189 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1190 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1191
1192 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1193 args->resource = LLVMBuildInsertElement(
1194 ctx->builder, args->resource, formats, ctx->i32_1, "");
1195 }
1196
1197 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1198 assert(!wa_8888);
1199 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1200 } else {
1201 struct ac_image_args resinfo = {};
1202 LLVMBasicBlockRef bbs[2];
1203
1204 LLVMValueRef unnorm = NULL;
1205 LLVMValueRef default_offset = ctx->f32_0;
1206 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1207 !instr->is_array) {
1208 /* In vulkan, whether the sampler uses unnormalized
1209 * coordinates or not is a dynamic property of the
1210 * sampler. Hence, to figure out whether or not we
1211 * need to divide by the texture size, we need to test
1212 * the sampler at runtime. This tests the bit set by
1213 * radv_init_sampler().
1214 */
1215 LLVMValueRef sampler0 =
1216 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1217 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1218 LLVMConstInt(ctx->i32, 15, false), "");
1219 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1220 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1221 default_offset = LLVMConstReal(ctx->f32, -0.5);
1222 }
1223
1224 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1225 if (wa_8888 || unnorm) {
1226 assert(!(wa_8888 && unnorm));
1227 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1228 /* Skip the texture size query entirely if we don't need it. */
1229 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1230 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1231 }
1232
1233 /* Query the texture size. */
1234 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1235 resinfo.opcode = ac_image_get_resinfo;
1236 resinfo.dmask = 0xf;
1237 resinfo.lod = ctx->i32_0;
1238 resinfo.resource = args->resource;
1239 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1240 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1241
1242 /* Compute -0.5 / size. */
1243 for (unsigned c = 0; c < 2; c++) {
1244 half_texel[c] =
1245 LLVMBuildExtractElement(ctx->builder, size,
1246 LLVMConstInt(ctx->i32, c, 0), "");
1247 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1248 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1249 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1250 LLVMConstReal(ctx->f32, -0.5), "");
1251 }
1252
1253 if (wa_8888 || unnorm) {
1254 ac_build_endif(ctx, 2000);
1255
1256 for (unsigned c = 0; c < 2; c++) {
1257 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1258 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1259 values, bbs);
1260 }
1261 }
1262 }
1263
1264 for (unsigned c = 0; c < 2; c++) {
1265 LLVMValueRef tmp;
1266 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1267 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1268 }
1269
1270 args->attributes = AC_FUNC_ATTR_READNONE;
1271 result = ac_build_image_opcode(ctx, args);
1272
1273 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1274 LLVMValueRef tmp, tmp2;
1275
1276 /* if the cube workaround is in place, f2i the result. */
1277 for (unsigned c = 0; c < 4; c++) {
1278 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1279 if (stype == GLSL_TYPE_UINT)
1280 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1281 else
1282 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1283 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1284 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1285 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1286 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1287 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1288 }
1289 }
1290 return result;
1291 }
1292
1293 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1294 {
1295 nir_deref_instr *texture_deref_instr = NULL;
1296
1297 for (unsigned i = 0; i < instr->num_srcs; i++) {
1298 switch (instr->src[i].src_type) {
1299 case nir_tex_src_texture_deref:
1300 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1301 break;
1302 default:
1303 break;
1304 }
1305 }
1306 return texture_deref_instr;
1307 }
1308
1309 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1310 const nir_tex_instr *instr,
1311 struct ac_image_args *args)
1312 {
1313 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1314 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1315
1316 return ac_build_buffer_load_format(&ctx->ac,
1317 args->resource,
1318 args->coords[0],
1319 ctx->ac.i32_0,
1320 util_last_bit(mask),
1321 0, true);
1322 }
1323
1324 args->opcode = ac_image_sample;
1325
1326 switch (instr->op) {
1327 case nir_texop_txf:
1328 case nir_texop_txf_ms:
1329 case nir_texop_samples_identical:
1330 args->opcode = args->level_zero ||
1331 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1332 ac_image_load : ac_image_load_mip;
1333 args->level_zero = false;
1334 break;
1335 case nir_texop_txs:
1336 case nir_texop_query_levels:
1337 args->opcode = ac_image_get_resinfo;
1338 if (!args->lod)
1339 args->lod = ctx->ac.i32_0;
1340 args->level_zero = false;
1341 break;
1342 case nir_texop_tex:
1343 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1344 assert(!args->lod);
1345 args->level_zero = true;
1346 }
1347 break;
1348 case nir_texop_tg4:
1349 args->opcode = ac_image_gather4;
1350 args->level_zero = true;
1351 break;
1352 case nir_texop_lod:
1353 args->opcode = ac_image_get_lod;
1354 break;
1355 default:
1356 break;
1357 }
1358
1359 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1360 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1361 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1362 const struct glsl_type *type = glsl_without_array(var->type);
1363 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1364 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1365 return lower_gather4_integer(&ctx->ac, var, args, instr);
1366 }
1367 }
1368
1369 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1370 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1371 if ((args->dim == ac_image_2darray ||
1372 args->dim == ac_image_2d) && !args->coords[1]) {
1373 args->coords[1] = ctx->ac.i32_0;
1374 }
1375 }
1376
1377 args->attributes = AC_FUNC_ATTR_READNONE;
1378 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1379 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1380 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1381 /* Prevent texture instructions with implicit derivatives from being
1382 * sinked into branches. */
1383 switch (instr->op) {
1384 case nir_texop_tex:
1385 case nir_texop_txb:
1386 case nir_texop_lod:
1387 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1388 break;
1389 default:
1390 break;
1391 }
1392 }
1393
1394 return ac_build_image_opcode(&ctx->ac, args);
1395 }
1396
1397 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1398 nir_intrinsic_instr *instr)
1399 {
1400 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1401 LLVMValueRef index = get_src(ctx, instr->src[1]);
1402
1403 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1404 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1405 return result;
1406 }
1407
1408 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1409 nir_intrinsic_instr *instr)
1410 {
1411 LLVMValueRef ptr, addr;
1412 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1413 unsigned index = nir_intrinsic_base(instr);
1414
1415 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1416 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1417
1418 /* Load constant values from user SGPRS when possible, otherwise
1419 * fallback to the default path that loads directly from memory.
1420 */
1421 if (LLVMIsConstant(src0) &&
1422 instr->dest.ssa.bit_size == 32) {
1423 unsigned count = instr->dest.ssa.num_components;
1424 unsigned offset = index;
1425
1426 offset += LLVMConstIntGetZExtValue(src0);
1427 offset /= 4;
1428
1429 offset -= ctx->abi->base_inline_push_consts;
1430
1431 if (offset + count <= ctx->abi->num_inline_push_consts) {
1432 return ac_build_gather_values(&ctx->ac,
1433 ctx->abi->inline_push_consts + offset,
1434 count);
1435 }
1436 }
1437
1438 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1439
1440 if (instr->dest.ssa.bit_size == 8) {
1441 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1442 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1443 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1444 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1445
1446 LLVMValueRef params[3];
1447 if (load_dwords > 1) {
1448 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1449 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1450 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1451 } else {
1452 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1453 params[0] = ctx->ac.i32_0;
1454 params[1] = res;
1455 }
1456 params[2] = addr;
1457 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1458
1459 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1460 if (instr->dest.ssa.num_components > 1)
1461 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1462 return res;
1463 } else if (instr->dest.ssa.bit_size == 16) {
1464 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1465 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1466 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1467 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1468 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1469 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1470 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1471 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1472 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1473 LLVMConstInt(ctx->ac.i32, 4, false)};
1474 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1475 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1476 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1477 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1478 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1479 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1480 }
1481
1482 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1483
1484 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1485 }
1486
1487 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1488 const nir_intrinsic_instr *instr)
1489 {
1490 LLVMValueRef index = get_src(ctx, instr->src[0]);
1491
1492 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1493 }
1494
1495 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1496 {
1497 uint32_t new_mask = 0;
1498 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1499 if (mask & (1u << i))
1500 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1501 return new_mask;
1502 }
1503
1504 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1505 unsigned start, unsigned count)
1506 {
1507 LLVMValueRef mask[] = {
1508 ctx->i32_0, ctx->i32_1,
1509 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1510
1511 unsigned src_elements = ac_get_llvm_num_components(src);
1512
1513 if (count == src_elements) {
1514 assert(start == 0);
1515 return src;
1516 } else if (count == 1) {
1517 assert(start < src_elements);
1518 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1519 } else {
1520 assert(start + count <= src_elements);
1521 assert(count <= 4);
1522 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1523 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1524 }
1525 }
1526
1527 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1528 enum gl_access_qualifier access,
1529 bool may_store_unaligned,
1530 bool writeonly_memory)
1531 {
1532 unsigned cache_policy = 0;
1533
1534 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1535 * store opcodes not aligned to a dword are affected. The only way to
1536 * get unaligned stores is through shader images.
1537 */
1538 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1539 /* If this is write-only, don't keep data in L1 to prevent
1540 * evicting L1 cache lines that may be needed by other
1541 * instructions.
1542 */
1543 writeonly_memory ||
1544 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1545 cache_policy |= ac_glc;
1546 }
1547
1548 if (access & ACCESS_STREAM_CACHE_POLICY)
1549 cache_policy |= ac_slc;
1550
1551 return cache_policy;
1552 }
1553
1554 static void visit_store_ssbo(struct ac_nir_context *ctx,
1555 nir_intrinsic_instr *instr)
1556 {
1557 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1558 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1559 unsigned writemask = nir_intrinsic_write_mask(instr);
1560 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1561 bool writeonly_memory = access & ACCESS_NON_READABLE;
1562 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1563
1564 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1565 get_src(ctx, instr->src[1]), true);
1566 LLVMValueRef base_data = src_data;
1567 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1568 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1569
1570 while (writemask) {
1571 int start, count;
1572 LLVMValueRef data, offset;
1573 LLVMTypeRef data_type;
1574
1575 u_bit_scan_consecutive_range(&writemask, &start, &count);
1576
1577 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1578 * writes into a 2-element and a 1-element write. */
1579 if (count == 3 &&
1580 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1581 writemask |= 1 << (start + 2);
1582 count = 2;
1583 }
1584 int num_bytes = count * elem_size_bytes; /* count in bytes */
1585
1586 /* we can only store 4 DWords at the same time.
1587 * can only happen for 64 Bit vectors. */
1588 if (num_bytes > 16) {
1589 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1590 count = 2;
1591 num_bytes = 16;
1592 }
1593
1594 /* check alignment of 16 Bit stores */
1595 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1596 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1597 count = 1;
1598 num_bytes = 2;
1599 }
1600 data = extract_vector_range(&ctx->ac, base_data, start, count);
1601
1602 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1603 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1604
1605 if (num_bytes == 1) {
1606 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1607 offset, ctx->ac.i32_0,
1608 cache_policy);
1609 } else if (num_bytes == 2) {
1610 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1611 offset, ctx->ac.i32_0,
1612 cache_policy);
1613 } else {
1614 int num_channels = num_bytes / 4;
1615
1616 switch (num_bytes) {
1617 case 16: /* v4f32 */
1618 data_type = ctx->ac.v4f32;
1619 break;
1620 case 12: /* v3f32 */
1621 data_type = ctx->ac.v3f32;
1622 break;
1623 case 8: /* v2f32 */
1624 data_type = ctx->ac.v2f32;
1625 break;
1626 case 4: /* f32 */
1627 data_type = ctx->ac.f32;
1628 break;
1629 default:
1630 unreachable("Malformed vector store.");
1631 }
1632 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1633
1634 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1635 num_channels, offset,
1636 ctx->ac.i32_0, 0,
1637 cache_policy, false);
1638 }
1639 }
1640 }
1641
1642 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1643 LLVMValueRef descriptor,
1644 LLVMValueRef offset,
1645 LLVMValueRef compare,
1646 LLVMValueRef exchange)
1647 {
1648 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1649 if (ctx->abi->robust_buffer_access) {
1650 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1651
1652 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1653 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1654
1655 ac_build_ifcc(&ctx->ac, cond, -1);
1656
1657 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1658 }
1659
1660 LLVMValueRef ptr_parts[2] = {
1661 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1662 LLVMBuildAnd(ctx->ac.builder,
1663 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1664 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1665 };
1666
1667 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1668 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1669
1670 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1671
1672 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1673 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1674 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1675 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1676
1677 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1678 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1679
1680 if (ctx->abi->robust_buffer_access) {
1681 ac_build_endif(&ctx->ac, -1);
1682
1683 LLVMBasicBlockRef incoming_blocks[2] = {
1684 start_block,
1685 then_block,
1686 };
1687
1688 LLVMValueRef incoming_values[2] = {
1689 LLVMConstInt(ctx->ac.i64, 0, 0),
1690 result,
1691 };
1692 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1693 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1694 return ret;
1695 } else {
1696 return result;
1697 }
1698 }
1699
1700 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1701 const nir_intrinsic_instr *instr)
1702 {
1703 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1704 const char *op;
1705 char name[64], type[8];
1706 LLVMValueRef params[6], descriptor;
1707 int arg_count = 0;
1708
1709 switch (instr->intrinsic) {
1710 case nir_intrinsic_ssbo_atomic_add:
1711 op = "add";
1712 break;
1713 case nir_intrinsic_ssbo_atomic_imin:
1714 op = "smin";
1715 break;
1716 case nir_intrinsic_ssbo_atomic_umin:
1717 op = "umin";
1718 break;
1719 case nir_intrinsic_ssbo_atomic_imax:
1720 op = "smax";
1721 break;
1722 case nir_intrinsic_ssbo_atomic_umax:
1723 op = "umax";
1724 break;
1725 case nir_intrinsic_ssbo_atomic_and:
1726 op = "and";
1727 break;
1728 case nir_intrinsic_ssbo_atomic_or:
1729 op = "or";
1730 break;
1731 case nir_intrinsic_ssbo_atomic_xor:
1732 op = "xor";
1733 break;
1734 case nir_intrinsic_ssbo_atomic_exchange:
1735 op = "swap";
1736 break;
1737 case nir_intrinsic_ssbo_atomic_comp_swap:
1738 op = "cmpswap";
1739 break;
1740 default:
1741 abort();
1742 }
1743
1744 descriptor = ctx->abi->load_ssbo(ctx->abi,
1745 get_src(ctx, instr->src[0]),
1746 true);
1747
1748 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1749 return_type == ctx->ac.i64) {
1750 return emit_ssbo_comp_swap_64(ctx, descriptor,
1751 get_src(ctx, instr->src[1]),
1752 get_src(ctx, instr->src[2]),
1753 get_src(ctx, instr->src[3]));
1754 }
1755 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1756 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1757 }
1758 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1759 params[arg_count++] = descriptor;
1760
1761 if (LLVM_VERSION_MAJOR >= 9) {
1762 /* XXX: The new raw/struct atomic intrinsics are buggy with
1763 * LLVM 8, see r358579.
1764 */
1765 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1766 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1767 params[arg_count++] = ctx->ac.i32_0; /* slc */
1768
1769 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1770 snprintf(name, sizeof(name),
1771 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1772 } else {
1773 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1774 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1775 params[arg_count++] = ctx->ac.i1false; /* slc */
1776
1777 assert(return_type == ctx->ac.i32);
1778 snprintf(name, sizeof(name),
1779 "llvm.amdgcn.buffer.atomic.%s", op);
1780 }
1781
1782 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1783 arg_count, 0);
1784 }
1785
1786 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1787 const nir_intrinsic_instr *instr)
1788 {
1789 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1790 int num_components = instr->num_components;
1791 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1792 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1793
1794 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1795 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1796 get_src(ctx, instr->src[0]), false);
1797 LLVMValueRef vindex = ctx->ac.i32_0;
1798
1799 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1800 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1801
1802 LLVMValueRef results[4];
1803 for (int i = 0; i < num_components;) {
1804 int num_elems = num_components - i;
1805 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1806 num_elems = 1;
1807 if (num_elems * elem_size_bytes > 16)
1808 num_elems = 16 / elem_size_bytes;
1809 int load_bytes = num_elems * elem_size_bytes;
1810
1811 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1812
1813 LLVMValueRef ret;
1814
1815 if (load_bytes == 1) {
1816 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1817 rsrc,
1818 offset,
1819 ctx->ac.i32_0,
1820 immoffset,
1821 cache_policy);
1822 } else if (load_bytes == 2) {
1823 ret = ac_build_tbuffer_load_short(&ctx->ac,
1824 rsrc,
1825 offset,
1826 ctx->ac.i32_0,
1827 immoffset,
1828 cache_policy);
1829 } else {
1830 int num_channels = util_next_power_of_two(load_bytes) / 4;
1831 bool can_speculate = access & ACCESS_CAN_REORDER;
1832
1833 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1834 vindex, offset, immoffset, 0,
1835 cache_policy, can_speculate, false);
1836 }
1837
1838 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1839 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1840 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1841
1842 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1843 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1844
1845 for (unsigned j = 0; j < num_elems; j++) {
1846 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1847 }
1848 i += num_elems;
1849 }
1850
1851 return ac_build_gather_values(&ctx->ac, results, num_components);
1852 }
1853
1854 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1855 const nir_intrinsic_instr *instr)
1856 {
1857 LLVMValueRef ret;
1858 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1859 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1860 int num_components = instr->num_components;
1861
1862 if (ctx->abi->load_ubo)
1863 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1864
1865 if (instr->dest.ssa.bit_size == 64)
1866 num_components *= 2;
1867
1868 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1869 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1870 LLVMValueRef results[num_components];
1871 for (unsigned i = 0; i < num_components; ++i) {
1872 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1873 load_bytes * i, 0);
1874
1875 if (load_bytes == 1) {
1876 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1877 rsrc,
1878 offset,
1879 ctx->ac.i32_0,
1880 immoffset,
1881 0);
1882 } else {
1883 assert(load_bytes == 2);
1884 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1885 rsrc,
1886 offset,
1887 ctx->ac.i32_0,
1888 immoffset,
1889 0);
1890 }
1891 }
1892 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1893 } else {
1894 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1895 NULL, 0, 0, true, true);
1896
1897 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1898 }
1899
1900 return LLVMBuildBitCast(ctx->ac.builder, ret,
1901 get_def_type(ctx, &instr->dest.ssa), "");
1902 }
1903
1904 static void
1905 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1906 bool vs_in, unsigned *vertex_index_out,
1907 LLVMValueRef *vertex_index_ref,
1908 unsigned *const_out, LLVMValueRef *indir_out)
1909 {
1910 nir_variable *var = nir_deref_instr_get_variable(instr);
1911 nir_deref_path path;
1912 unsigned idx_lvl = 1;
1913
1914 nir_deref_path_init(&path, instr, NULL);
1915
1916 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1917 if (vertex_index_ref) {
1918 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1919 if (vertex_index_out)
1920 *vertex_index_out = 0;
1921 } else {
1922 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1923 }
1924 ++idx_lvl;
1925 }
1926
1927 uint32_t const_offset = 0;
1928 LLVMValueRef offset = NULL;
1929
1930 if (var->data.compact) {
1931 assert(instr->deref_type == nir_deref_type_array);
1932 const_offset = nir_src_as_uint(instr->arr.index);
1933 goto out;
1934 }
1935
1936 for (; path.path[idx_lvl]; ++idx_lvl) {
1937 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1938 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1939 unsigned index = path.path[idx_lvl]->strct.index;
1940
1941 for (unsigned i = 0; i < index; i++) {
1942 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1943 const_offset += glsl_count_attribute_slots(ft, vs_in);
1944 }
1945 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1946 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1947 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
1948 const_offset += size *
1949 nir_src_as_uint(path.path[idx_lvl]->arr.index);
1950 } else {
1951 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1952 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1953 if (offset)
1954 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1955 else
1956 offset = array_off;
1957 }
1958 } else
1959 unreachable("Uhandled deref type in get_deref_instr_offset");
1960 }
1961
1962 out:
1963 nir_deref_path_finish(&path);
1964
1965 if (const_offset && offset)
1966 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1967 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1968 "");
1969
1970 *const_out = const_offset;
1971 *indir_out = offset;
1972 }
1973
1974 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1975 nir_intrinsic_instr *instr,
1976 bool load_inputs)
1977 {
1978 LLVMValueRef result;
1979 LLVMValueRef vertex_index = NULL;
1980 LLVMValueRef indir_index = NULL;
1981 unsigned const_index = 0;
1982
1983 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1984
1985 unsigned location = var->data.location;
1986 unsigned driver_location = var->data.driver_location;
1987 const bool is_patch = var->data.patch;
1988 const bool is_compact = var->data.compact;
1989
1990 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1991 false, NULL, is_patch ? NULL : &vertex_index,
1992 &const_index, &indir_index);
1993
1994 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1995
1996 LLVMTypeRef src_component_type;
1997 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1998 src_component_type = LLVMGetElementType(dest_type);
1999 else
2000 src_component_type = dest_type;
2001
2002 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2003 vertex_index, indir_index,
2004 const_index, location, driver_location,
2005 var->data.location_frac,
2006 instr->num_components,
2007 is_patch, is_compact, load_inputs);
2008 if (instr->dest.ssa.bit_size == 16) {
2009 result = ac_to_integer(&ctx->ac, result);
2010 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2011 }
2012 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2013 }
2014
2015 static unsigned
2016 type_scalar_size_bytes(const struct glsl_type *type)
2017 {
2018 assert(glsl_type_is_vector_or_scalar(type) ||
2019 glsl_type_is_matrix(type));
2020 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2021 }
2022
2023 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2024 nir_intrinsic_instr *instr)
2025 {
2026 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2027 nir_variable *var = nir_deref_instr_get_variable(deref);
2028
2029 LLVMValueRef values[8];
2030 int idx = 0;
2031 int ve = instr->dest.ssa.num_components;
2032 unsigned comp = 0;
2033 LLVMValueRef indir_index;
2034 LLVMValueRef ret;
2035 unsigned const_index;
2036 unsigned stride = 4;
2037 int mode = deref->mode;
2038
2039 if (var) {
2040 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2041 var->data.mode == nir_var_shader_in;
2042 idx = var->data.driver_location;
2043 comp = var->data.location_frac;
2044 mode = var->data.mode;
2045
2046 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2047 &const_index, &indir_index);
2048
2049 if (var->data.compact) {
2050 stride = 1;
2051 const_index += comp;
2052 comp = 0;
2053 }
2054 }
2055
2056 if (instr->dest.ssa.bit_size == 64 &&
2057 (deref->mode == nir_var_shader_in ||
2058 deref->mode == nir_var_shader_out ||
2059 deref->mode == nir_var_function_temp))
2060 ve *= 2;
2061
2062 switch (mode) {
2063 case nir_var_shader_in:
2064 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2065 ctx->stage == MESA_SHADER_TESS_EVAL) {
2066 return load_tess_varyings(ctx, instr, true);
2067 }
2068
2069 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2070 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2071 LLVMValueRef indir_index;
2072 unsigned const_index, vertex_index;
2073 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2074 &const_index, &indir_index);
2075 assert(indir_index == NULL);
2076
2077 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2078 var->data.driver_location,
2079 var->data.location_frac,
2080 instr->num_components, vertex_index, const_index, type);
2081 }
2082
2083 for (unsigned chan = comp; chan < ve + comp; chan++) {
2084 if (indir_index) {
2085 unsigned count = glsl_count_attribute_slots(
2086 var->type,
2087 ctx->stage == MESA_SHADER_VERTEX);
2088 count -= chan / 4;
2089 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2090 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2091 stride, false, true);
2092
2093 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2094 tmp_vec,
2095 indir_index, "");
2096 } else
2097 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2098 }
2099 break;
2100 case nir_var_function_temp:
2101 for (unsigned chan = 0; chan < ve; chan++) {
2102 if (indir_index) {
2103 unsigned count = glsl_count_attribute_slots(
2104 var->type, false);
2105 count -= chan / 4;
2106 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2107 &ctx->ac, ctx->locals + idx + chan, count,
2108 stride, true, true);
2109
2110 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2111 tmp_vec,
2112 indir_index, "");
2113 } else {
2114 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2115 }
2116 }
2117 break;
2118 case nir_var_mem_shared: {
2119 LLVMValueRef address = get_src(ctx, instr->src[0]);
2120 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2121 return LLVMBuildBitCast(ctx->ac.builder, val,
2122 get_def_type(ctx, &instr->dest.ssa),
2123 "");
2124 }
2125 case nir_var_shader_out:
2126 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2127 return load_tess_varyings(ctx, instr, false);
2128 }
2129
2130 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2131 var->data.fb_fetch_output &&
2132 ctx->abi->emit_fbfetch)
2133 return ctx->abi->emit_fbfetch(ctx->abi);
2134
2135 for (unsigned chan = comp; chan < ve + comp; chan++) {
2136 if (indir_index) {
2137 unsigned count = glsl_count_attribute_slots(
2138 var->type, false);
2139 count -= chan / 4;
2140 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2141 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2142 stride, true, true);
2143
2144 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2145 tmp_vec,
2146 indir_index, "");
2147 } else {
2148 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2149 ctx->abi->outputs[idx + chan + const_index * stride],
2150 "");
2151 }
2152 }
2153 break;
2154 case nir_var_mem_global: {
2155 LLVMValueRef address = get_src(ctx, instr->src[0]);
2156 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2157 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2158 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2159
2160 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2161 if (stride != natural_stride) {
2162 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2163 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2164 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2165
2166 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2167 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2168 values[i] = LLVMBuildLoad(ctx->ac.builder,
2169 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2170 }
2171 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2172 } else {
2173 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2174 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2175 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2176 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2177 return val;
2178 }
2179 }
2180 default:
2181 unreachable("unhandle variable mode");
2182 }
2183 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2184 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2185 }
2186
2187 static void
2188 visit_store_var(struct ac_nir_context *ctx,
2189 nir_intrinsic_instr *instr)
2190 {
2191 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2192 nir_variable *var = nir_deref_instr_get_variable(deref);
2193
2194 LLVMValueRef temp_ptr, value;
2195 int idx = 0;
2196 unsigned comp = 0;
2197 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2198 int writemask = instr->const_index[0];
2199 LLVMValueRef indir_index;
2200 unsigned const_index;
2201
2202 if (var) {
2203 get_deref_offset(ctx, deref, false,
2204 NULL, NULL, &const_index, &indir_index);
2205 idx = var->data.driver_location;
2206 comp = var->data.location_frac;
2207
2208 if (var->data.compact) {
2209 const_index += comp;
2210 comp = 0;
2211 }
2212 }
2213
2214 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2215 (deref->mode == nir_var_shader_out ||
2216 deref->mode == nir_var_function_temp)) {
2217
2218 src = LLVMBuildBitCast(ctx->ac.builder, src,
2219 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2220 "");
2221
2222 writemask = widen_mask(writemask, 2);
2223 }
2224
2225 writemask = writemask << comp;
2226
2227 switch (deref->mode) {
2228 case nir_var_shader_out:
2229
2230 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2231 LLVMValueRef vertex_index = NULL;
2232 LLVMValueRef indir_index = NULL;
2233 unsigned const_index = 0;
2234 const bool is_patch = var->data.patch;
2235
2236 get_deref_offset(ctx, deref, false, NULL,
2237 is_patch ? NULL : &vertex_index,
2238 &const_index, &indir_index);
2239
2240 ctx->abi->store_tcs_outputs(ctx->abi, var,
2241 vertex_index, indir_index,
2242 const_index, src, writemask);
2243 return;
2244 }
2245
2246 for (unsigned chan = 0; chan < 8; chan++) {
2247 int stride = 4;
2248 if (!(writemask & (1 << chan)))
2249 continue;
2250
2251 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2252
2253 if (var->data.compact)
2254 stride = 1;
2255 if (indir_index) {
2256 unsigned count = glsl_count_attribute_slots(
2257 var->type, false);
2258 count -= chan / 4;
2259 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2260 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2261 stride, true, true);
2262
2263 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2264 value, indir_index, "");
2265 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2266 count, stride, tmp_vec);
2267
2268 } else {
2269 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2270
2271 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2272 }
2273 }
2274 break;
2275 case nir_var_function_temp:
2276 for (unsigned chan = 0; chan < 8; chan++) {
2277 if (!(writemask & (1 << chan)))
2278 continue;
2279
2280 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2281 if (indir_index) {
2282 unsigned count = glsl_count_attribute_slots(
2283 var->type, false);
2284 count -= chan / 4;
2285 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2286 &ctx->ac, ctx->locals + idx + chan, count,
2287 4, true, true);
2288
2289 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2290 value, indir_index, "");
2291 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2292 count, 4, tmp_vec);
2293 } else {
2294 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2295
2296 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2297 }
2298 }
2299 break;
2300
2301 case nir_var_mem_global:
2302 case nir_var_mem_shared: {
2303 int writemask = instr->const_index[0];
2304 LLVMValueRef address = get_src(ctx, instr->src[0]);
2305 LLVMValueRef val = get_src(ctx, instr->src[1]);
2306
2307 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2308 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2309 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2310
2311 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2312 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2313 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2314
2315 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2316 stride == natural_stride) {
2317 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2318 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2319 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2320
2321 val = LLVMBuildBitCast(ctx->ac.builder, val,
2322 LLVMGetElementType(LLVMTypeOf(address)), "");
2323 LLVMBuildStore(ctx->ac.builder, val, address);
2324 } else {
2325 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2326 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2327 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2328 for (unsigned chan = 0; chan < 4; chan++) {
2329 if (!(writemask & (1 << chan)))
2330 continue;
2331
2332 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2333
2334 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2335 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2336 chan);
2337 src = LLVMBuildBitCast(ctx->ac.builder, src,
2338 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2339 LLVMBuildStore(ctx->ac.builder, src, ptr);
2340 }
2341 }
2342 break;
2343 }
2344 default:
2345 abort();
2346 break;
2347 }
2348 }
2349
2350 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2351 {
2352 switch (dim) {
2353 case GLSL_SAMPLER_DIM_BUF:
2354 return 1;
2355 case GLSL_SAMPLER_DIM_1D:
2356 return array ? 2 : 1;
2357 case GLSL_SAMPLER_DIM_2D:
2358 return array ? 3 : 2;
2359 case GLSL_SAMPLER_DIM_MS:
2360 return array ? 4 : 3;
2361 case GLSL_SAMPLER_DIM_3D:
2362 case GLSL_SAMPLER_DIM_CUBE:
2363 return 3;
2364 case GLSL_SAMPLER_DIM_RECT:
2365 case GLSL_SAMPLER_DIM_SUBPASS:
2366 return 2;
2367 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2368 return 3;
2369 default:
2370 break;
2371 }
2372 return 0;
2373 }
2374
2375 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2376 LLVMValueRef coord_x, LLVMValueRef coord_y,
2377 LLVMValueRef coord_z,
2378 LLVMValueRef sample_index,
2379 LLVMValueRef fmask_desc_ptr)
2380 {
2381 unsigned sample_chan = coord_z ? 3 : 2;
2382 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2383 addr[sample_chan] = sample_index;
2384
2385 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2386 return addr[sample_chan];
2387 }
2388
2389 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2390 {
2391 assert(instr->src[0].is_ssa);
2392 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2393 }
2394
2395 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2396 const nir_intrinsic_instr *instr,
2397 enum ac_descriptor_type desc_type,
2398 bool write)
2399 {
2400 nir_deref_instr *deref_instr =
2401 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2402 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2403
2404 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2405 }
2406
2407 static void get_image_coords(struct ac_nir_context *ctx,
2408 const nir_intrinsic_instr *instr,
2409 struct ac_image_args *args,
2410 enum glsl_sampler_dim dim,
2411 bool is_array)
2412 {
2413 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2414 LLVMValueRef masks[] = {
2415 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2416 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2417 };
2418 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2419
2420 int count;
2421 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2422 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2423 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2424 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2425 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2426 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2427 count = image_type_to_components_count(dim, is_array);
2428
2429 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2430 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2431 LLVMValueRef fmask_load_address[3];
2432
2433 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2434 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2435 if (is_array)
2436 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2437 else
2438 fmask_load_address[2] = NULL;
2439
2440 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2441 fmask_load_address[0],
2442 fmask_load_address[1],
2443 fmask_load_address[2],
2444 sample_index,
2445 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2446 AC_DESC_FMASK, &instr->instr, true, false));
2447 }
2448 if (count == 1 && !gfx9_1d) {
2449 if (instr->src[1].ssa->num_components)
2450 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2451 else
2452 args->coords[0] = src0;
2453 } else {
2454 int chan;
2455 if (is_ms)
2456 count--;
2457 for (chan = 0; chan < count; ++chan) {
2458 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2459 }
2460
2461 if (gfx9_1d) {
2462 if (is_array) {
2463 args->coords[2] = args->coords[1];
2464 args->coords[1] = ctx->ac.i32_0;
2465 } else
2466 args->coords[1] = ctx->ac.i32_0;
2467 count++;
2468 }
2469 if (ctx->ac.chip_class == GFX9 &&
2470 dim == GLSL_SAMPLER_DIM_2D &&
2471 !is_array) {
2472 /* The hw can't bind a slice of a 3D image as a 2D
2473 * image, because it ignores BASE_ARRAY if the target
2474 * is 3D. The workaround is to read BASE_ARRAY and set
2475 * it as the 3rd address operand for all 2D images.
2476 */
2477 LLVMValueRef first_layer, const5, mask;
2478
2479 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2480 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2481 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2482 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2483
2484 args->coords[count] = first_layer;
2485 count++;
2486 }
2487
2488
2489 if (is_ms) {
2490 args->coords[count] = sample_index;
2491 count++;
2492 }
2493 }
2494 }
2495
2496 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2497 const nir_intrinsic_instr *instr,
2498 bool write, bool atomic)
2499 {
2500 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2501 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2502 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2503 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2504 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2505
2506 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2507 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2508 elem_count, stride, "");
2509
2510 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2511 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2512 }
2513 return rsrc;
2514 }
2515
2516 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2517 const nir_intrinsic_instr *instr,
2518 bool bindless)
2519 {
2520 LLVMValueRef res;
2521
2522 enum glsl_sampler_dim dim;
2523 enum gl_access_qualifier access;
2524 bool is_array;
2525 if (bindless) {
2526 dim = nir_intrinsic_image_dim(instr);
2527 access = nir_intrinsic_access(instr);
2528 is_array = nir_intrinsic_image_array(instr);
2529 } else {
2530 const nir_deref_instr *image_deref = get_image_deref(instr);
2531 const struct glsl_type *type = image_deref->type;
2532 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2533 dim = glsl_get_sampler_dim(type);
2534 access = var->data.image.access;
2535 is_array = glsl_sampler_type_is_array(type);
2536 }
2537
2538 struct ac_image_args args = {};
2539
2540 args.cache_policy = get_cache_policy(ctx, access, false, false);
2541
2542 if (dim == GLSL_SAMPLER_DIM_BUF) {
2543 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2544 unsigned num_channels = util_last_bit(mask);
2545 LLVMValueRef rsrc, vindex;
2546
2547 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2548 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2549 ctx->ac.i32_0, "");
2550
2551 bool can_speculate = access & ACCESS_CAN_REORDER;
2552 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2553 ctx->ac.i32_0, num_channels,
2554 args.cache_policy,
2555 can_speculate);
2556 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2557
2558 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2559 res = ac_to_integer(&ctx->ac, res);
2560 } else {
2561 args.opcode = ac_image_load;
2562 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2563 get_image_coords(ctx, instr, &args, dim, is_array);
2564 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2565 args.dmask = 15;
2566 args.attributes = AC_FUNC_ATTR_READONLY;
2567
2568 res = ac_build_image_opcode(&ctx->ac, &args);
2569 }
2570 return res;
2571 }
2572
2573 static void visit_image_store(struct ac_nir_context *ctx,
2574 nir_intrinsic_instr *instr,
2575 bool bindless)
2576 {
2577
2578
2579 enum glsl_sampler_dim dim;
2580 enum gl_access_qualifier access;
2581 bool is_array;
2582 if (bindless) {
2583 dim = nir_intrinsic_image_dim(instr);
2584 access = nir_intrinsic_access(instr);
2585 is_array = nir_intrinsic_image_array(instr);
2586 } else {
2587 const nir_deref_instr *image_deref = get_image_deref(instr);
2588 const struct glsl_type *type = image_deref->type;
2589 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2590 dim = glsl_get_sampler_dim(type);
2591 access = var->data.image.access;
2592 is_array = glsl_sampler_type_is_array(type);
2593 }
2594
2595 bool writeonly_memory = access & ACCESS_NON_READABLE;
2596 struct ac_image_args args = {};
2597
2598 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2599
2600 if (dim == GLSL_SAMPLER_DIM_BUF) {
2601 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2602 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2603 unsigned src_channels = ac_get_llvm_num_components(src);
2604 LLVMValueRef vindex;
2605
2606 if (src_channels == 3)
2607 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2608
2609 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2610 get_src(ctx, instr->src[1]),
2611 ctx->ac.i32_0, "");
2612
2613 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2614 ctx->ac.i32_0, src_channels,
2615 args.cache_policy);
2616 } else {
2617 args.opcode = ac_image_store;
2618 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2619 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2620 get_image_coords(ctx, instr, &args, dim, is_array);
2621 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2622 args.dmask = 15;
2623
2624 ac_build_image_opcode(&ctx->ac, &args);
2625 }
2626
2627 }
2628
2629 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2630 const nir_intrinsic_instr *instr,
2631 bool bindless)
2632 {
2633 LLVMValueRef params[7];
2634 int param_count = 0;
2635
2636 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2637 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2638 const char *atomic_name;
2639 char intrinsic_name[64];
2640 enum ac_atomic_op atomic_subop;
2641 ASSERTED int length;
2642
2643 enum glsl_sampler_dim dim;
2644 bool is_array;
2645 if (bindless) {
2646 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2647 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2648 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2649 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2650 const GLenum format = nir_intrinsic_format(instr);
2651 assert(format == GL_R32UI || format == GL_R32I);
2652 }
2653 dim = nir_intrinsic_image_dim(instr);
2654 is_array = nir_intrinsic_image_array(instr);
2655 } else {
2656 const struct glsl_type *type = get_image_deref(instr)->type;
2657 dim = glsl_get_sampler_dim(type);
2658 is_array = glsl_sampler_type_is_array(type);
2659 }
2660
2661 switch (instr->intrinsic) {
2662 case nir_intrinsic_bindless_image_atomic_add:
2663 case nir_intrinsic_image_deref_atomic_add:
2664 atomic_name = "add";
2665 atomic_subop = ac_atomic_add;
2666 break;
2667 case nir_intrinsic_bindless_image_atomic_imin:
2668 case nir_intrinsic_image_deref_atomic_imin:
2669 atomic_name = "smin";
2670 atomic_subop = ac_atomic_smin;
2671 break;
2672 case nir_intrinsic_bindless_image_atomic_umin:
2673 case nir_intrinsic_image_deref_atomic_umin:
2674 atomic_name = "umin";
2675 atomic_subop = ac_atomic_umin;
2676 break;
2677 case nir_intrinsic_bindless_image_atomic_imax:
2678 case nir_intrinsic_image_deref_atomic_imax:
2679 atomic_name = "smax";
2680 atomic_subop = ac_atomic_smax;
2681 break;
2682 case nir_intrinsic_bindless_image_atomic_umax:
2683 case nir_intrinsic_image_deref_atomic_umax:
2684 atomic_name = "umax";
2685 atomic_subop = ac_atomic_umax;
2686 break;
2687 case nir_intrinsic_bindless_image_atomic_and:
2688 case nir_intrinsic_image_deref_atomic_and:
2689 atomic_name = "and";
2690 atomic_subop = ac_atomic_and;
2691 break;
2692 case nir_intrinsic_bindless_image_atomic_or:
2693 case nir_intrinsic_image_deref_atomic_or:
2694 atomic_name = "or";
2695 atomic_subop = ac_atomic_or;
2696 break;
2697 case nir_intrinsic_bindless_image_atomic_xor:
2698 case nir_intrinsic_image_deref_atomic_xor:
2699 atomic_name = "xor";
2700 atomic_subop = ac_atomic_xor;
2701 break;
2702 case nir_intrinsic_bindless_image_atomic_exchange:
2703 case nir_intrinsic_image_deref_atomic_exchange:
2704 atomic_name = "swap";
2705 atomic_subop = ac_atomic_swap;
2706 break;
2707 case nir_intrinsic_bindless_image_atomic_comp_swap:
2708 case nir_intrinsic_image_deref_atomic_comp_swap:
2709 atomic_name = "cmpswap";
2710 atomic_subop = 0; /* not used */
2711 break;
2712 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2713 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2714 atomic_name = "inc";
2715 atomic_subop = ac_atomic_inc_wrap;
2716 /* ATOMIC_INC instruction does:
2717 * value = (value + 1) % (data + 1)
2718 * but we want:
2719 * value = (value + 1) % data
2720 * So replace 'data' by 'data - 1'.
2721 */
2722 ctx->ssa_defs[instr->src[3].ssa->index] =
2723 LLVMBuildSub(ctx->ac.builder,
2724 ctx->ssa_defs[instr->src[3].ssa->index],
2725 ctx->ac.i32_1, "");
2726 break;
2727 }
2728 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2729 case nir_intrinsic_image_deref_atomic_dec_wrap:
2730 atomic_name = "dec";
2731 atomic_subop = ac_atomic_dec_wrap;
2732 break;
2733 default:
2734 abort();
2735 }
2736
2737 if (cmpswap)
2738 params[param_count++] = get_src(ctx, instr->src[4]);
2739 params[param_count++] = get_src(ctx, instr->src[3]);
2740
2741 if (dim == GLSL_SAMPLER_DIM_BUF) {
2742 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2743 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2744 ctx->ac.i32_0, ""); /* vindex */
2745 params[param_count++] = ctx->ac.i32_0; /* voffset */
2746 if (LLVM_VERSION_MAJOR >= 9) {
2747 /* XXX: The new raw/struct atomic intrinsics are buggy
2748 * with LLVM 8, see r358579.
2749 */
2750 params[param_count++] = ctx->ac.i32_0; /* soffset */
2751 params[param_count++] = ctx->ac.i32_0; /* slc */
2752
2753 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2754 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2755 } else {
2756 params[param_count++] = ctx->ac.i1false; /* slc */
2757
2758 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2759 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2760 }
2761
2762 assert(length < sizeof(intrinsic_name));
2763 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2764 params, param_count, 0);
2765 } else {
2766 struct ac_image_args args = {};
2767 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2768 args.atomic = atomic_subop;
2769 args.data[0] = params[0];
2770 if (cmpswap)
2771 args.data[1] = params[1];
2772 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2773 get_image_coords(ctx, instr, &args, dim, is_array);
2774 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2775
2776 return ac_build_image_opcode(&ctx->ac, &args);
2777 }
2778 }
2779
2780 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2781 const nir_intrinsic_instr *instr)
2782 {
2783 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2784
2785 return ac_build_image_get_sample_count(&ctx->ac, rsrc);
2786 }
2787
2788 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2789 const nir_intrinsic_instr *instr,
2790 bool bindless)
2791 {
2792 LLVMValueRef res;
2793
2794 enum glsl_sampler_dim dim;
2795 bool is_array;
2796 if (bindless) {
2797 dim = nir_intrinsic_image_dim(instr);
2798 is_array = nir_intrinsic_image_array(instr);
2799 } else {
2800 const struct glsl_type *type = get_image_deref(instr)->type;
2801 dim = glsl_get_sampler_dim(type);
2802 is_array = glsl_sampler_type_is_array(type);
2803 }
2804
2805 if (dim == GLSL_SAMPLER_DIM_BUF)
2806 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2807
2808 struct ac_image_args args = { 0 };
2809
2810 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2811 args.dmask = 0xf;
2812 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2813 args.opcode = ac_image_get_resinfo;
2814 args.lod = ctx->ac.i32_0;
2815 args.attributes = AC_FUNC_ATTR_READNONE;
2816
2817 res = ac_build_image_opcode(&ctx->ac, &args);
2818
2819 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2820
2821 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2822 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2823 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2824 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2825 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2826 }
2827 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2828 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2829 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2830 ctx->ac.i32_1, "");
2831
2832 }
2833 return res;
2834 }
2835
2836 static void emit_membar(struct ac_llvm_context *ac,
2837 const nir_intrinsic_instr *instr)
2838 {
2839 unsigned wait_flags = 0;
2840
2841 switch (instr->intrinsic) {
2842 case nir_intrinsic_memory_barrier:
2843 case nir_intrinsic_group_memory_barrier:
2844 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2845 break;
2846 case nir_intrinsic_memory_barrier_atomic_counter:
2847 case nir_intrinsic_memory_barrier_buffer:
2848 case nir_intrinsic_memory_barrier_image:
2849 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2850 break;
2851 case nir_intrinsic_memory_barrier_shared:
2852 wait_flags = AC_WAIT_LGKM;
2853 break;
2854 default:
2855 break;
2856 }
2857
2858 ac_build_waitcnt(ac, wait_flags);
2859 }
2860
2861 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2862 {
2863 /* GFX6 only (thanks to a hw bug workaround):
2864 * The real barrier instruction isn’t needed, because an entire patch
2865 * always fits into a single wave.
2866 */
2867 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2868 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2869 return;
2870 }
2871 ac_build_s_barrier(ac);
2872 }
2873
2874 static void emit_discard(struct ac_nir_context *ctx,
2875 const nir_intrinsic_instr *instr)
2876 {
2877 LLVMValueRef cond;
2878
2879 if (instr->intrinsic == nir_intrinsic_discard_if) {
2880 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2881 get_src(ctx, instr->src[0]),
2882 ctx->ac.i32_0, "");
2883 } else {
2884 assert(instr->intrinsic == nir_intrinsic_discard);
2885 cond = ctx->ac.i1false;
2886 }
2887
2888 ctx->abi->emit_kill(ctx->abi, cond);
2889 }
2890
2891 static LLVMValueRef
2892 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2893 {
2894 LLVMValueRef result;
2895 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2896 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2897 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2898
2899 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2900 }
2901
2902 static LLVMValueRef
2903 visit_load_subgroup_id(struct ac_nir_context *ctx)
2904 {
2905 if (ctx->stage == MESA_SHADER_COMPUTE) {
2906 LLVMValueRef result;
2907 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2908 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2909 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2910 } else {
2911 return LLVMConstInt(ctx->ac.i32, 0, false);
2912 }
2913 }
2914
2915 static LLVMValueRef
2916 visit_load_num_subgroups(struct ac_nir_context *ctx)
2917 {
2918 if (ctx->stage == MESA_SHADER_COMPUTE) {
2919 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2920 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2921 } else {
2922 return LLVMConstInt(ctx->ac.i32, 1, false);
2923 }
2924 }
2925
2926 static LLVMValueRef
2927 visit_first_invocation(struct ac_nir_context *ctx)
2928 {
2929 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2930 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
2931
2932 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2933 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2934 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
2935 ctx->ac.iN_wavemask, args, 2,
2936 AC_FUNC_ATTR_NOUNWIND |
2937 AC_FUNC_ATTR_READNONE);
2938
2939 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2940 }
2941
2942 static LLVMValueRef
2943 visit_load_shared(struct ac_nir_context *ctx,
2944 const nir_intrinsic_instr *instr)
2945 {
2946 LLVMValueRef values[4], derived_ptr, index, ret;
2947
2948 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2949
2950 for (int chan = 0; chan < instr->num_components; chan++) {
2951 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2952 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2953 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2954 }
2955
2956 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2957 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2958 }
2959
2960 static void
2961 visit_store_shared(struct ac_nir_context *ctx,
2962 const nir_intrinsic_instr *instr)
2963 {
2964 LLVMValueRef derived_ptr, data,index;
2965 LLVMBuilderRef builder = ctx->ac.builder;
2966
2967 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2968 LLVMValueRef src = get_src(ctx, instr->src[0]);
2969
2970 int writemask = nir_intrinsic_write_mask(instr);
2971 for (int chan = 0; chan < 4; chan++) {
2972 if (!(writemask & (1 << chan))) {
2973 continue;
2974 }
2975 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2976 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2977 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2978 LLVMBuildStore(builder, data, derived_ptr);
2979 }
2980 }
2981
2982 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2983 const nir_intrinsic_instr *instr,
2984 LLVMValueRef ptr, int src_idx)
2985 {
2986 LLVMValueRef result;
2987 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2988
2989 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
2990
2991 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2992 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2993 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2994 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
2995 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2996 } else {
2997 LLVMAtomicRMWBinOp op;
2998 switch (instr->intrinsic) {
2999 case nir_intrinsic_shared_atomic_add:
3000 case nir_intrinsic_deref_atomic_add:
3001 op = LLVMAtomicRMWBinOpAdd;
3002 break;
3003 case nir_intrinsic_shared_atomic_umin:
3004 case nir_intrinsic_deref_atomic_umin:
3005 op = LLVMAtomicRMWBinOpUMin;
3006 break;
3007 case nir_intrinsic_shared_atomic_umax:
3008 case nir_intrinsic_deref_atomic_umax:
3009 op = LLVMAtomicRMWBinOpUMax;
3010 break;
3011 case nir_intrinsic_shared_atomic_imin:
3012 case nir_intrinsic_deref_atomic_imin:
3013 op = LLVMAtomicRMWBinOpMin;
3014 break;
3015 case nir_intrinsic_shared_atomic_imax:
3016 case nir_intrinsic_deref_atomic_imax:
3017 op = LLVMAtomicRMWBinOpMax;
3018 break;
3019 case nir_intrinsic_shared_atomic_and:
3020 case nir_intrinsic_deref_atomic_and:
3021 op = LLVMAtomicRMWBinOpAnd;
3022 break;
3023 case nir_intrinsic_shared_atomic_or:
3024 case nir_intrinsic_deref_atomic_or:
3025 op = LLVMAtomicRMWBinOpOr;
3026 break;
3027 case nir_intrinsic_shared_atomic_xor:
3028 case nir_intrinsic_deref_atomic_xor:
3029 op = LLVMAtomicRMWBinOpXor;
3030 break;
3031 case nir_intrinsic_shared_atomic_exchange:
3032 case nir_intrinsic_deref_atomic_exchange:
3033 op = LLVMAtomicRMWBinOpXchg;
3034 break;
3035 default:
3036 return NULL;
3037 }
3038
3039 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3040 }
3041 return result;
3042 }
3043
3044 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3045 {
3046 LLVMValueRef values[2];
3047 LLVMValueRef pos[2];
3048
3049 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
3050 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
3051
3052 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3053 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3054 return ac_build_gather_values(&ctx->ac, values, 2);
3055 }
3056
3057 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3058 enum glsl_interp_mode interp, unsigned location)
3059 {
3060 switch (interp) {
3061 case INTERP_MODE_FLAT:
3062 default:
3063 return NULL;
3064 case INTERP_MODE_SMOOTH:
3065 case INTERP_MODE_NONE:
3066 if (location == INTERP_CENTER)
3067 return ctx->abi->persp_center;
3068 else if (location == INTERP_CENTROID)
3069 return ctx->abi->persp_centroid;
3070 else if (location == INTERP_SAMPLE)
3071 return ctx->abi->persp_sample;
3072 break;
3073 case INTERP_MODE_NOPERSPECTIVE:
3074 if (location == INTERP_CENTER)
3075 return ctx->abi->linear_center;
3076 else if (location == INTERP_CENTROID)
3077 return ctx->abi->linear_centroid;
3078 else if (location == INTERP_SAMPLE)
3079 return ctx->abi->linear_sample;
3080 break;
3081 }
3082 return NULL;
3083 }
3084
3085 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3086 unsigned mode)
3087 {
3088 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3089 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3090 }
3091
3092 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3093 unsigned mode,
3094 LLVMValueRef offset)
3095 {
3096 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3097 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3098 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3099
3100 LLVMValueRef ij_out[2];
3101 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3102
3103 /*
3104 * take the I then J parameters, and the DDX/Y for it, and
3105 * calculate the IJ inputs for the interpolator.
3106 * temp1 = ddx * offset/sample.x + I;
3107 * interp_param.I = ddy * offset/sample.y + temp1;
3108 * temp1 = ddx * offset/sample.x + J;
3109 * interp_param.J = ddy * offset/sample.y + temp1;
3110 */
3111 for (unsigned i = 0; i < 2; i++) {
3112 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3113 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3114 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3115 ddxy_out, ix_ll, "");
3116 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3117 ddxy_out, iy_ll, "");
3118 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3119 interp_param, ix_ll, "");
3120 LLVMValueRef temp1, temp2;
3121
3122 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3123 ctx->ac.f32, "");
3124
3125 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3126 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3127
3128 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3129 temp2, ctx->ac.i32, "");
3130 }
3131 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3132 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3133 }
3134
3135 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3136 unsigned mode)
3137 {
3138 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3139 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3140 }
3141
3142 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3143 unsigned mode,
3144 LLVMValueRef sample_id)
3145 {
3146 if (ctx->abi->interp_at_sample_force_center)
3147 return barycentric_center(ctx, mode);
3148
3149 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3150
3151 /* fetch sample ID */
3152 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3153
3154 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3155 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3156 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3157 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3158 LLVMValueRef coords[] = { src_c0, src_c1 };
3159 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3160
3161 return barycentric_offset(ctx, mode, offset);
3162 }
3163
3164
3165 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3166 unsigned mode)
3167 {
3168 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3169 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3170 }
3171
3172 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3173 LLVMValueRef interp_param,
3174 unsigned index, unsigned comp_start,
3175 unsigned num_components,
3176 unsigned bitsize)
3177 {
3178 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3179
3180 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3181 interp_param, ctx->ac.v2f32, "");
3182 LLVMValueRef i = LLVMBuildExtractElement(
3183 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3184 LLVMValueRef j = LLVMBuildExtractElement(
3185 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3186
3187 LLVMValueRef values[4];
3188 assert(bitsize == 16 || bitsize == 32);
3189 for (unsigned comp = 0; comp < num_components; comp++) {
3190 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3191 if (bitsize == 16) {
3192 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3193 ctx->abi->prim_mask, i, j);
3194 } else {
3195 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3196 ctx->abi->prim_mask, i, j);
3197 }
3198 }
3199
3200 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3201 }
3202
3203 static LLVMValueRef load_flat_input(struct ac_nir_context *ctx,
3204 unsigned index, unsigned comp_start,
3205 unsigned num_components,
3206 unsigned bit_size)
3207 {
3208 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3209
3210 LLVMValueRef values[8];
3211
3212 /* Each component of a 64-bit value takes up two GL-level channels. */
3213 unsigned channels =
3214 bit_size == 64 ? num_components * 2 : num_components;
3215
3216 for (unsigned chan = 0; chan < channels; chan++) {
3217 if (comp_start + chan > 4)
3218 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3219 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (comp_start + chan) % 4, false);
3220 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3221 LLVMConstInt(ctx->ac.i32, 2, false),
3222 llvm_chan,
3223 attr_number,
3224 ctx->abi->prim_mask);
3225 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3226 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3227 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3228 }
3229
3230 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3231 if (bit_size == 64) {
3232 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3233 LLVMVectorType(ctx->ac.i64, num_components);
3234 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3235 }
3236 return result;
3237 }
3238
3239 static void visit_intrinsic(struct ac_nir_context *ctx,
3240 nir_intrinsic_instr *instr)
3241 {
3242 LLVMValueRef result = NULL;
3243
3244 switch (instr->intrinsic) {
3245 case nir_intrinsic_ballot:
3246 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3247 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3248 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3249 break;
3250 case nir_intrinsic_read_invocation:
3251 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3252 get_src(ctx, instr->src[1]));
3253 break;
3254 case nir_intrinsic_read_first_invocation:
3255 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3256 break;
3257 case nir_intrinsic_load_subgroup_invocation:
3258 result = ac_get_thread_id(&ctx->ac);
3259 break;
3260 case nir_intrinsic_load_work_group_id: {
3261 LLVMValueRef values[3];
3262
3263 for (int i = 0; i < 3; i++) {
3264 values[i] = ctx->abi->workgroup_ids[i] ?
3265 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3266 }
3267
3268 result = ac_build_gather_values(&ctx->ac, values, 3);
3269 break;
3270 }
3271 case nir_intrinsic_load_base_vertex:
3272 case nir_intrinsic_load_first_vertex:
3273 result = ctx->abi->load_base_vertex(ctx->abi);
3274 break;
3275 case nir_intrinsic_load_local_group_size:
3276 result = ctx->abi->load_local_group_size(ctx->abi);
3277 break;
3278 case nir_intrinsic_load_vertex_id:
3279 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3280 ctx->abi->base_vertex, "");
3281 break;
3282 case nir_intrinsic_load_vertex_id_zero_base: {
3283 result = ctx->abi->vertex_id;
3284 break;
3285 }
3286 case nir_intrinsic_load_local_invocation_id: {
3287 result = ctx->abi->local_invocation_ids;
3288 break;
3289 }
3290 case nir_intrinsic_load_base_instance:
3291 result = ctx->abi->start_instance;
3292 break;
3293 case nir_intrinsic_load_draw_id:
3294 result = ctx->abi->draw_id;
3295 break;
3296 case nir_intrinsic_load_view_index:
3297 result = ctx->abi->view_index;
3298 break;
3299 case nir_intrinsic_load_invocation_id:
3300 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3301 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3302 } else {
3303 if (ctx->ac.chip_class >= GFX10) {
3304 result = LLVMBuildAnd(ctx->ac.builder,
3305 ctx->abi->gs_invocation_id,
3306 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3307 } else {
3308 result = ctx->abi->gs_invocation_id;
3309 }
3310 }
3311 break;
3312 case nir_intrinsic_load_primitive_id:
3313 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3314 result = ctx->abi->gs_prim_id;
3315 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3316 result = ctx->abi->tcs_patch_id;
3317 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3318 result = ctx->abi->tes_patch_id;
3319 } else
3320 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3321 break;
3322 case nir_intrinsic_load_sample_id:
3323 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3324 break;
3325 case nir_intrinsic_load_sample_pos:
3326 result = load_sample_pos(ctx);
3327 break;
3328 case nir_intrinsic_load_sample_mask_in:
3329 result = ctx->abi->load_sample_mask_in(ctx->abi);
3330 break;
3331 case nir_intrinsic_load_frag_coord: {
3332 LLVMValueRef values[4] = {
3333 ctx->abi->frag_pos[0],
3334 ctx->abi->frag_pos[1],
3335 ctx->abi->frag_pos[2],
3336 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3337 };
3338 result = ac_to_integer(&ctx->ac,
3339 ac_build_gather_values(&ctx->ac, values, 4));
3340 break;
3341 }
3342 case nir_intrinsic_load_layer_id:
3343 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3344 break;
3345 case nir_intrinsic_load_front_face:
3346 result = ctx->abi->front_face;
3347 break;
3348 case nir_intrinsic_load_helper_invocation:
3349 result = ac_build_load_helper_invocation(&ctx->ac);
3350 break;
3351 case nir_intrinsic_load_color0:
3352 result = ctx->abi->color0;
3353 break;
3354 case nir_intrinsic_load_color1:
3355 result = ctx->abi->color1;
3356 break;
3357 case nir_intrinsic_load_user_data_amd:
3358 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3359 result = ctx->abi->user_data;
3360 break;
3361 case nir_intrinsic_load_instance_id:
3362 result = ctx->abi->instance_id;
3363 break;
3364 case nir_intrinsic_load_num_work_groups:
3365 result = ctx->abi->num_work_groups;
3366 break;
3367 case nir_intrinsic_load_local_invocation_index:
3368 result = visit_load_local_invocation_index(ctx);
3369 break;
3370 case nir_intrinsic_load_subgroup_id:
3371 result = visit_load_subgroup_id(ctx);
3372 break;
3373 case nir_intrinsic_load_num_subgroups:
3374 result = visit_load_num_subgroups(ctx);
3375 break;
3376 case nir_intrinsic_first_invocation:
3377 result = visit_first_invocation(ctx);
3378 break;
3379 case nir_intrinsic_load_push_constant:
3380 result = visit_load_push_constant(ctx, instr);
3381 break;
3382 case nir_intrinsic_vulkan_resource_index: {
3383 LLVMValueRef index = get_src(ctx, instr->src[0]);
3384 unsigned desc_set = nir_intrinsic_desc_set(instr);
3385 unsigned binding = nir_intrinsic_binding(instr);
3386
3387 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3388 binding);
3389 break;
3390 }
3391 case nir_intrinsic_vulkan_resource_reindex:
3392 result = visit_vulkan_resource_reindex(ctx, instr);
3393 break;
3394 case nir_intrinsic_store_ssbo:
3395 visit_store_ssbo(ctx, instr);
3396 break;
3397 case nir_intrinsic_load_ssbo:
3398 result = visit_load_buffer(ctx, instr);
3399 break;
3400 case nir_intrinsic_ssbo_atomic_add:
3401 case nir_intrinsic_ssbo_atomic_imin:
3402 case nir_intrinsic_ssbo_atomic_umin:
3403 case nir_intrinsic_ssbo_atomic_imax:
3404 case nir_intrinsic_ssbo_atomic_umax:
3405 case nir_intrinsic_ssbo_atomic_and:
3406 case nir_intrinsic_ssbo_atomic_or:
3407 case nir_intrinsic_ssbo_atomic_xor:
3408 case nir_intrinsic_ssbo_atomic_exchange:
3409 case nir_intrinsic_ssbo_atomic_comp_swap:
3410 result = visit_atomic_ssbo(ctx, instr);
3411 break;
3412 case nir_intrinsic_load_ubo:
3413 result = visit_load_ubo_buffer(ctx, instr);
3414 break;
3415 case nir_intrinsic_get_buffer_size:
3416 result = visit_get_buffer_size(ctx, instr);
3417 break;
3418 case nir_intrinsic_load_deref:
3419 result = visit_load_var(ctx, instr);
3420 break;
3421 case nir_intrinsic_store_deref:
3422 visit_store_var(ctx, instr);
3423 break;
3424 case nir_intrinsic_load_shared:
3425 result = visit_load_shared(ctx, instr);
3426 break;
3427 case nir_intrinsic_store_shared:
3428 visit_store_shared(ctx, instr);
3429 break;
3430 case nir_intrinsic_bindless_image_samples:
3431 case nir_intrinsic_image_deref_samples:
3432 result = visit_image_samples(ctx, instr);
3433 break;
3434 case nir_intrinsic_bindless_image_load:
3435 result = visit_image_load(ctx, instr, true);
3436 break;
3437 case nir_intrinsic_image_deref_load:
3438 result = visit_image_load(ctx, instr, false);
3439 break;
3440 case nir_intrinsic_bindless_image_store:
3441 visit_image_store(ctx, instr, true);
3442 break;
3443 case nir_intrinsic_image_deref_store:
3444 visit_image_store(ctx, instr, false);
3445 break;
3446 case nir_intrinsic_bindless_image_atomic_add:
3447 case nir_intrinsic_bindless_image_atomic_imin:
3448 case nir_intrinsic_bindless_image_atomic_umin:
3449 case nir_intrinsic_bindless_image_atomic_imax:
3450 case nir_intrinsic_bindless_image_atomic_umax:
3451 case nir_intrinsic_bindless_image_atomic_and:
3452 case nir_intrinsic_bindless_image_atomic_or:
3453 case nir_intrinsic_bindless_image_atomic_xor:
3454 case nir_intrinsic_bindless_image_atomic_exchange:
3455 case nir_intrinsic_bindless_image_atomic_comp_swap:
3456 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3457 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3458 result = visit_image_atomic(ctx, instr, true);
3459 break;
3460 case nir_intrinsic_image_deref_atomic_add:
3461 case nir_intrinsic_image_deref_atomic_imin:
3462 case nir_intrinsic_image_deref_atomic_umin:
3463 case nir_intrinsic_image_deref_atomic_imax:
3464 case nir_intrinsic_image_deref_atomic_umax:
3465 case nir_intrinsic_image_deref_atomic_and:
3466 case nir_intrinsic_image_deref_atomic_or:
3467 case nir_intrinsic_image_deref_atomic_xor:
3468 case nir_intrinsic_image_deref_atomic_exchange:
3469 case nir_intrinsic_image_deref_atomic_comp_swap:
3470 case nir_intrinsic_image_deref_atomic_inc_wrap:
3471 case nir_intrinsic_image_deref_atomic_dec_wrap:
3472 result = visit_image_atomic(ctx, instr, false);
3473 break;
3474 case nir_intrinsic_bindless_image_size:
3475 result = visit_image_size(ctx, instr, true);
3476 break;
3477 case nir_intrinsic_image_deref_size:
3478 result = visit_image_size(ctx, instr, false);
3479 break;
3480 case nir_intrinsic_shader_clock:
3481 result = ac_build_shader_clock(&ctx->ac);
3482 break;
3483 case nir_intrinsic_discard:
3484 case nir_intrinsic_discard_if:
3485 emit_discard(ctx, instr);
3486 break;
3487 case nir_intrinsic_memory_barrier:
3488 case nir_intrinsic_group_memory_barrier:
3489 case nir_intrinsic_memory_barrier_atomic_counter:
3490 case nir_intrinsic_memory_barrier_buffer:
3491 case nir_intrinsic_memory_barrier_image:
3492 case nir_intrinsic_memory_barrier_shared:
3493 emit_membar(&ctx->ac, instr);
3494 break;
3495 case nir_intrinsic_barrier:
3496 ac_emit_barrier(&ctx->ac, ctx->stage);
3497 break;
3498 case nir_intrinsic_shared_atomic_add:
3499 case nir_intrinsic_shared_atomic_imin:
3500 case nir_intrinsic_shared_atomic_umin:
3501 case nir_intrinsic_shared_atomic_imax:
3502 case nir_intrinsic_shared_atomic_umax:
3503 case nir_intrinsic_shared_atomic_and:
3504 case nir_intrinsic_shared_atomic_or:
3505 case nir_intrinsic_shared_atomic_xor:
3506 case nir_intrinsic_shared_atomic_exchange:
3507 case nir_intrinsic_shared_atomic_comp_swap: {
3508 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3509 result = visit_var_atomic(ctx, instr, ptr, 1);
3510 break;
3511 }
3512 case nir_intrinsic_deref_atomic_add:
3513 case nir_intrinsic_deref_atomic_imin:
3514 case nir_intrinsic_deref_atomic_umin:
3515 case nir_intrinsic_deref_atomic_imax:
3516 case nir_intrinsic_deref_atomic_umax:
3517 case nir_intrinsic_deref_atomic_and:
3518 case nir_intrinsic_deref_atomic_or:
3519 case nir_intrinsic_deref_atomic_xor:
3520 case nir_intrinsic_deref_atomic_exchange:
3521 case nir_intrinsic_deref_atomic_comp_swap: {
3522 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3523 result = visit_var_atomic(ctx, instr, ptr, 1);
3524 break;
3525 }
3526 case nir_intrinsic_load_barycentric_pixel:
3527 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3528 break;
3529 case nir_intrinsic_load_barycentric_centroid:
3530 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3531 break;
3532 case nir_intrinsic_load_barycentric_sample:
3533 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3534 break;
3535 case nir_intrinsic_load_barycentric_at_offset: {
3536 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3537 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3538 break;
3539 }
3540 case nir_intrinsic_load_barycentric_at_sample: {
3541 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3542 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3543 break;
3544 }
3545 case nir_intrinsic_load_interpolated_input: {
3546 /* We assume any indirect loads have been lowered away */
3547 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3548 assert(offset);
3549 assert(offset[0].i32 == 0);
3550
3551 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3552 unsigned index = nir_intrinsic_base(instr);
3553 unsigned component = nir_intrinsic_component(instr);
3554 result = load_interpolated_input(ctx, interp_param, index,
3555 component,
3556 instr->dest.ssa.num_components,
3557 instr->dest.ssa.bit_size);
3558 break;
3559 }
3560 case nir_intrinsic_load_input: {
3561 /* We only lower inputs for fragment shaders ATM */
3562 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[0]);
3563 assert(offset);
3564 assert(offset[0].i32 == 0);
3565
3566 unsigned index = nir_intrinsic_base(instr);
3567 unsigned component = nir_intrinsic_component(instr);
3568 result = load_flat_input(ctx, index, component,
3569 instr->dest.ssa.num_components,
3570 instr->dest.ssa.bit_size);
3571 break;
3572 }
3573 case nir_intrinsic_emit_vertex:
3574 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3575 break;
3576 case nir_intrinsic_end_primitive:
3577 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3578 break;
3579 case nir_intrinsic_load_tess_coord:
3580 result = ctx->abi->load_tess_coord(ctx->abi);
3581 break;
3582 case nir_intrinsic_load_tess_level_outer:
3583 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
3584 break;
3585 case nir_intrinsic_load_tess_level_inner:
3586 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
3587 break;
3588 case nir_intrinsic_load_tess_level_outer_default:
3589 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
3590 break;
3591 case nir_intrinsic_load_tess_level_inner_default:
3592 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
3593 break;
3594 case nir_intrinsic_load_patch_vertices_in:
3595 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3596 break;
3597 case nir_intrinsic_vote_all: {
3598 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3599 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3600 break;
3601 }
3602 case nir_intrinsic_vote_any: {
3603 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3604 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3605 break;
3606 }
3607 case nir_intrinsic_shuffle:
3608 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3609 get_src(ctx, instr->src[1]));
3610 break;
3611 case nir_intrinsic_reduce:
3612 result = ac_build_reduce(&ctx->ac,
3613 get_src(ctx, instr->src[0]),
3614 instr->const_index[0],
3615 instr->const_index[1]);
3616 break;
3617 case nir_intrinsic_inclusive_scan:
3618 result = ac_build_inclusive_scan(&ctx->ac,
3619 get_src(ctx, instr->src[0]),
3620 instr->const_index[0]);
3621 break;
3622 case nir_intrinsic_exclusive_scan:
3623 result = ac_build_exclusive_scan(&ctx->ac,
3624 get_src(ctx, instr->src[0]),
3625 instr->const_index[0]);
3626 break;
3627 case nir_intrinsic_quad_broadcast: {
3628 unsigned lane = nir_src_as_uint(instr->src[1]);
3629 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3630 lane, lane, lane, lane);
3631 break;
3632 }
3633 case nir_intrinsic_quad_swap_horizontal:
3634 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3635 break;
3636 case nir_intrinsic_quad_swap_vertical:
3637 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3638 break;
3639 case nir_intrinsic_quad_swap_diagonal:
3640 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3641 break;
3642 case nir_intrinsic_quad_swizzle_amd: {
3643 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3644 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3645 mask & 0x3, (mask >> 2) & 0x3,
3646 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3647 break;
3648 }
3649 case nir_intrinsic_masked_swizzle_amd: {
3650 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3651 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3652 break;
3653 }
3654 case nir_intrinsic_write_invocation_amd:
3655 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3656 get_src(ctx, instr->src[1]),
3657 get_src(ctx, instr->src[2]));
3658 break;
3659 case nir_intrinsic_mbcnt_amd:
3660 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3661 break;
3662 case nir_intrinsic_load_scratch: {
3663 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3664 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3665 offset);
3666 LLVMTypeRef comp_type =
3667 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3668 LLVMTypeRef vec_type =
3669 instr->dest.ssa.num_components == 1 ? comp_type :
3670 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3671 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3672 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3673 LLVMPointerType(vec_type, addr_space), "");
3674 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3675 break;
3676 }
3677 case nir_intrinsic_store_scratch: {
3678 LLVMValueRef offset = get_src(ctx, instr->src[1]);
3679 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3680 offset);
3681 LLVMTypeRef comp_type =
3682 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
3683 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3684 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3685 LLVMPointerType(comp_type, addr_space), "");
3686 LLVMValueRef src = get_src(ctx, instr->src[0]);
3687 unsigned wrmask = nir_intrinsic_write_mask(instr);
3688 while (wrmask) {
3689 int start, count;
3690 u_bit_scan_consecutive_range(&wrmask, &start, &count);
3691
3692 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
3693 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
3694 LLVMTypeRef vec_type =
3695 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
3696 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
3697 offset_ptr,
3698 LLVMPointerType(vec_type, addr_space),
3699 "");
3700 LLVMValueRef offset_src =
3701 ac_extract_components(&ctx->ac, src, start, count);
3702 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
3703 }
3704 break;
3705 }
3706 case nir_intrinsic_load_constant: {
3707 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3708 LLVMValueRef base = LLVMConstInt(ctx->ac.i32,
3709 nir_intrinsic_base(instr),
3710 false);
3711 offset = LLVMBuildAdd(ctx->ac.builder, offset, base, "");
3712 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
3713 offset);
3714 LLVMTypeRef comp_type =
3715 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3716 LLVMTypeRef vec_type =
3717 instr->dest.ssa.num_components == 1 ? comp_type :
3718 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3719 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3720 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3721 LLVMPointerType(vec_type, addr_space), "");
3722 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3723 break;
3724 }
3725 default:
3726 fprintf(stderr, "Unknown intrinsic: ");
3727 nir_print_instr(&instr->instr, stderr);
3728 fprintf(stderr, "\n");
3729 break;
3730 }
3731 if (result) {
3732 ctx->ssa_defs[instr->dest.ssa.index] = result;
3733 }
3734 }
3735
3736 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3737 unsigned base_index,
3738 unsigned constant_index,
3739 LLVMValueRef dynamic_index)
3740 {
3741 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3742 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3743 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3744
3745 /* Bindless uniforms are 64bit so multiple index by 8 */
3746 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3747 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3748
3749 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3750
3751 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3752 NULL, 0, 0, true, true);
3753
3754 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3755 }
3756
3757 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3758 nir_deref_instr *deref_instr,
3759 enum ac_descriptor_type desc_type,
3760 const nir_instr *instr,
3761 bool image, bool write)
3762 {
3763 LLVMValueRef index = NULL;
3764 unsigned constant_index = 0;
3765 unsigned descriptor_set;
3766 unsigned base_index;
3767 bool bindless = false;
3768
3769 if (!deref_instr) {
3770 descriptor_set = 0;
3771 if (image) {
3772 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3773 base_index = 0;
3774 bindless = true;
3775 index = get_src(ctx, img_instr->src[0]);
3776 } else {
3777 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3778 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3779 nir_tex_src_sampler_handle);
3780 if (sampSrcIdx != -1) {
3781 base_index = 0;
3782 bindless = true;
3783 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3784 } else {
3785 assert(tex_instr && !image);
3786 base_index = tex_instr->sampler_index;
3787 }
3788 }
3789 } else {
3790 while(deref_instr->deref_type != nir_deref_type_var) {
3791 if (deref_instr->deref_type == nir_deref_type_array) {
3792 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3793 if (!array_size)
3794 array_size = 1;
3795
3796 if (nir_src_is_const(deref_instr->arr.index)) {
3797 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3798 } else {
3799 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3800
3801 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3802 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3803
3804 if (!index)
3805 index = indirect;
3806 else
3807 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3808 }
3809
3810 deref_instr = nir_src_as_deref(deref_instr->parent);
3811 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3812 unsigned sidx = deref_instr->strct.index;
3813 deref_instr = nir_src_as_deref(deref_instr->parent);
3814 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3815 } else {
3816 unreachable("Unsupported deref type");
3817 }
3818 }
3819 descriptor_set = deref_instr->var->data.descriptor_set;
3820
3821 if (deref_instr->var->data.bindless) {
3822 /* For now just assert on unhandled variable types */
3823 assert(deref_instr->var->data.mode == nir_var_uniform);
3824
3825 base_index = deref_instr->var->data.driver_location;
3826 bindless = true;
3827
3828 index = index ? index : ctx->ac.i32_0;
3829 index = get_bindless_index_from_uniform(ctx, base_index,
3830 constant_index, index);
3831 } else
3832 base_index = deref_instr->var->data.binding;
3833 }
3834
3835 return ctx->abi->load_sampler_desc(ctx->abi,
3836 descriptor_set,
3837 base_index,
3838 constant_index, index,
3839 desc_type, image, write, bindless);
3840 }
3841
3842 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3843 *
3844 * GFX6-GFX7:
3845 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3846 * filtering manually. The driver sets img7 to a mask clearing
3847 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3848 * s_and_b32 samp0, samp0, img7
3849 *
3850 * GFX8:
3851 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3852 */
3853 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3854 LLVMValueRef res, LLVMValueRef samp)
3855 {
3856 LLVMBuilderRef builder = ctx->ac.builder;
3857 LLVMValueRef img7, samp0;
3858
3859 if (ctx->ac.chip_class >= GFX8)
3860 return samp;
3861
3862 img7 = LLVMBuildExtractElement(builder, res,
3863 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3864 samp0 = LLVMBuildExtractElement(builder, samp,
3865 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3866 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3867 return LLVMBuildInsertElement(builder, samp, samp0,
3868 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3869 }
3870
3871 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3872 nir_tex_instr *instr,
3873 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3874 LLVMValueRef *fmask_ptr)
3875 {
3876 nir_deref_instr *texture_deref_instr = NULL;
3877 nir_deref_instr *sampler_deref_instr = NULL;
3878 int plane = -1;
3879
3880 for (unsigned i = 0; i < instr->num_srcs; i++) {
3881 switch (instr->src[i].src_type) {
3882 case nir_tex_src_texture_deref:
3883 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3884 break;
3885 case nir_tex_src_sampler_deref:
3886 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3887 break;
3888 case nir_tex_src_plane:
3889 plane = nir_src_as_int(instr->src[i].src);
3890 break;
3891 default:
3892 break;
3893 }
3894 }
3895
3896 if (!sampler_deref_instr)
3897 sampler_deref_instr = texture_deref_instr;
3898
3899 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3900
3901 if (plane >= 0) {
3902 assert(instr->op != nir_texop_txf_ms &&
3903 instr->op != nir_texop_samples_identical);
3904 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3905
3906 main_descriptor = AC_DESC_PLANE_0 + plane;
3907 }
3908
3909 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3910
3911 if (samp_ptr) {
3912 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3913 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3914 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3915 }
3916 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3917 instr->op == nir_texop_samples_identical))
3918 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3919 }
3920
3921 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3922 LLVMValueRef coord)
3923 {
3924 coord = ac_to_float(ctx, coord);
3925 coord = ac_build_round(ctx, coord);
3926 coord = ac_to_integer(ctx, coord);
3927 return coord;
3928 }
3929
3930 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3931 {
3932 LLVMValueRef result = NULL;
3933 struct ac_image_args args = { 0 };
3934 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3935 LLVMValueRef ddx = NULL, ddy = NULL;
3936 unsigned offset_src = 0;
3937
3938 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3939
3940 for (unsigned i = 0; i < instr->num_srcs; i++) {
3941 switch (instr->src[i].src_type) {
3942 case nir_tex_src_coord: {
3943 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3944 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3945 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3946 break;
3947 }
3948 case nir_tex_src_projector:
3949 break;
3950 case nir_tex_src_comparator:
3951 if (instr->is_shadow) {
3952 args.compare = get_src(ctx, instr->src[i].src);
3953 args.compare = ac_to_float(&ctx->ac, args.compare);
3954 }
3955 break;
3956 case nir_tex_src_offset:
3957 args.offset = get_src(ctx, instr->src[i].src);
3958 offset_src = i;
3959 break;
3960 case nir_tex_src_bias:
3961 if (instr->op == nir_texop_txb)
3962 args.bias = get_src(ctx, instr->src[i].src);
3963 break;
3964 case nir_tex_src_lod: {
3965 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
3966 args.level_zero = true;
3967 else
3968 args.lod = get_src(ctx, instr->src[i].src);
3969 break;
3970 }
3971 case nir_tex_src_ms_index:
3972 sample_index = get_src(ctx, instr->src[i].src);
3973 break;
3974 case nir_tex_src_ms_mcs:
3975 break;
3976 case nir_tex_src_ddx:
3977 ddx = get_src(ctx, instr->src[i].src);
3978 break;
3979 case nir_tex_src_ddy:
3980 ddy = get_src(ctx, instr->src[i].src);
3981 break;
3982 case nir_tex_src_texture_offset:
3983 case nir_tex_src_sampler_offset:
3984 case nir_tex_src_plane:
3985 default:
3986 break;
3987 }
3988 }
3989
3990 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3991 result = get_buffer_size(ctx, args.resource, true);
3992 goto write_result;
3993 }
3994
3995 if (instr->op == nir_texop_texture_samples) {
3996 LLVMValueRef res, samples, is_msaa;
3997 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3998 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3999 LLVMConstInt(ctx->ac.i32, 3, false), "");
4000 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4001 LLVMConstInt(ctx->ac.i32, 28, false), "");
4002 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4003 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4004 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4005 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4006
4007 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4008 LLVMConstInt(ctx->ac.i32, 16, false), "");
4009 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4010 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4011 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4012 samples, "");
4013 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4014 ctx->ac.i32_1, "");
4015 result = samples;
4016 goto write_result;
4017 }
4018
4019 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4020 LLVMValueRef offset[3], pack;
4021 for (unsigned chan = 0; chan < 3; ++chan)
4022 offset[chan] = ctx->ac.i32_0;
4023
4024 unsigned num_components = ac_get_llvm_num_components(args.offset);
4025 for (unsigned chan = 0; chan < num_components; chan++) {
4026 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4027 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4028 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4029 if (chan)
4030 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4031 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4032 }
4033 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4034 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4035 args.offset = pack;
4036 }
4037
4038 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4039 * OpenGL 4.5 spec says:
4040 *
4041 * "If the texture’s internal format indicates a fixed-point
4042 * depth texture, then D_t and D_ref are clamped to the
4043 * range [0, 1]; otherwise no clamping is performed."
4044 *
4045 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4046 * so the depth comparison value isn't clamped for Z16 and
4047 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4048 * an explicitly clamped 32-bit float format.
4049 */
4050 if (args.compare &&
4051 ctx->ac.chip_class >= GFX8 &&
4052 ctx->ac.chip_class <= GFX9 &&
4053 ctx->abi->clamp_shadow_reference) {
4054 LLVMValueRef upgraded, clamped;
4055
4056 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4057 LLVMConstInt(ctx->ac.i32, 3, false), "");
4058 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4059 LLVMConstInt(ctx->ac.i32, 29, false), "");
4060 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4061 clamped = ac_build_clamp(&ctx->ac, args.compare);
4062 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4063 args.compare, "");
4064 }
4065
4066 /* pack derivatives */
4067 if (ddx || ddy) {
4068 int num_src_deriv_channels, num_dest_deriv_channels;
4069 switch (instr->sampler_dim) {
4070 case GLSL_SAMPLER_DIM_3D:
4071 case GLSL_SAMPLER_DIM_CUBE:
4072 num_src_deriv_channels = 3;
4073 num_dest_deriv_channels = 3;
4074 break;
4075 case GLSL_SAMPLER_DIM_2D:
4076 default:
4077 num_src_deriv_channels = 2;
4078 num_dest_deriv_channels = 2;
4079 break;
4080 case GLSL_SAMPLER_DIM_1D:
4081 num_src_deriv_channels = 1;
4082 if (ctx->ac.chip_class == GFX9) {
4083 num_dest_deriv_channels = 2;
4084 } else {
4085 num_dest_deriv_channels = 1;
4086 }
4087 break;
4088 }
4089
4090 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4091 args.derivs[i] = ac_to_float(&ctx->ac,
4092 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4093 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4094 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4095 }
4096 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4097 args.derivs[i] = ctx->ac.f32_0;
4098 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4099 }
4100 }
4101
4102 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4103 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4104 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4105 if (instr->coord_components == 3)
4106 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4107 ac_prepare_cube_coords(&ctx->ac,
4108 instr->op == nir_texop_txd, instr->is_array,
4109 instr->op == nir_texop_lod, args.coords, args.derivs);
4110 }
4111
4112 /* Texture coordinates fixups */
4113 if (instr->coord_components > 1 &&
4114 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4115 instr->is_array &&
4116 instr->op != nir_texop_txf) {
4117 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4118 }
4119
4120 if (instr->coord_components > 2 &&
4121 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4122 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4123 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4124 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4125 instr->is_array &&
4126 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4127 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4128 }
4129
4130 if (ctx->ac.chip_class == GFX9 &&
4131 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4132 instr->op != nir_texop_lod) {
4133 LLVMValueRef filler;
4134 if (instr->op == nir_texop_txf)
4135 filler = ctx->ac.i32_0;
4136 else
4137 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4138
4139 if (instr->is_array)
4140 args.coords[2] = args.coords[1];
4141 args.coords[1] = filler;
4142 }
4143
4144 /* Pack sample index */
4145 if (instr->op == nir_texop_txf_ms && sample_index)
4146 args.coords[instr->coord_components] = sample_index;
4147
4148 if (instr->op == nir_texop_samples_identical) {
4149 struct ac_image_args txf_args = { 0 };
4150 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4151
4152 txf_args.dmask = 0xf;
4153 txf_args.resource = fmask_ptr;
4154 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4155 result = build_tex_intrinsic(ctx, instr, &txf_args);
4156
4157 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4158 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4159 goto write_result;
4160 }
4161
4162 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4163 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4164 instr->op != nir_texop_txs) {
4165 unsigned sample_chan = instr->is_array ? 3 : 2;
4166 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4167 &ctx->ac, args.coords[0], args.coords[1],
4168 instr->is_array ? args.coords[2] : NULL,
4169 args.coords[sample_chan], fmask_ptr);
4170 }
4171
4172 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4173 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4174 num_offsets = MIN2(num_offsets, instr->coord_components);
4175 for (unsigned i = 0; i < num_offsets; ++i) {
4176 args.coords[i] = LLVMBuildAdd(
4177 ctx->ac.builder, args.coords[i],
4178 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4179 }
4180 args.offset = NULL;
4181 }
4182
4183 /* DMASK was repurposed for GATHER4. 4 components are always
4184 * returned and DMASK works like a swizzle - it selects
4185 * the component to fetch. The only valid DMASK values are
4186 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4187 * (red,red,red,red) etc.) The ISA document doesn't mention
4188 * this.
4189 */
4190 args.dmask = 0xf;
4191 if (instr->op == nir_texop_tg4) {
4192 if (instr->is_shadow)
4193 args.dmask = 1;
4194 else
4195 args.dmask = 1 << instr->component;
4196 }
4197
4198 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4199 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4200 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4201 }
4202 result = build_tex_intrinsic(ctx, instr, &args);
4203
4204 if (instr->op == nir_texop_query_levels)
4205 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4206 else if (instr->is_shadow && instr->is_new_style_shadow &&
4207 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4208 instr->op != nir_texop_tg4)
4209 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4210 else if (instr->op == nir_texop_txs &&
4211 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4212 instr->is_array) {
4213 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4214 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4215 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4216 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4217 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4218 } else if (ctx->ac.chip_class == GFX9 &&
4219 instr->op == nir_texop_txs &&
4220 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4221 instr->is_array) {
4222 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4223 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4224 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4225 ctx->ac.i32_1, "");
4226 } else if (instr->dest.ssa.num_components != 4)
4227 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4228
4229 write_result:
4230 if (result) {
4231 assert(instr->dest.is_ssa);
4232 result = ac_to_integer(&ctx->ac, result);
4233 ctx->ssa_defs[instr->dest.ssa.index] = result;
4234 }
4235 }
4236
4237
4238 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4239 {
4240 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4241 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4242
4243 ctx->ssa_defs[instr->dest.ssa.index] = result;
4244 _mesa_hash_table_insert(ctx->phis, instr, result);
4245 }
4246
4247 static void visit_post_phi(struct ac_nir_context *ctx,
4248 nir_phi_instr *instr,
4249 LLVMValueRef llvm_phi)
4250 {
4251 nir_foreach_phi_src(src, instr) {
4252 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4253 LLVMValueRef llvm_src = get_src(ctx, src->src);
4254
4255 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4256 }
4257 }
4258
4259 static void phi_post_pass(struct ac_nir_context *ctx)
4260 {
4261 hash_table_foreach(ctx->phis, entry) {
4262 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4263 (LLVMValueRef)entry->data);
4264 }
4265 }
4266
4267
4268 static void visit_ssa_undef(struct ac_nir_context *ctx,
4269 const nir_ssa_undef_instr *instr)
4270 {
4271 unsigned num_components = instr->def.num_components;
4272 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4273 LLVMValueRef undef;
4274
4275 if (num_components == 1)
4276 undef = LLVMGetUndef(type);
4277 else {
4278 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4279 }
4280 ctx->ssa_defs[instr->def.index] = undef;
4281 }
4282
4283 static void visit_jump(struct ac_llvm_context *ctx,
4284 const nir_jump_instr *instr)
4285 {
4286 switch (instr->type) {
4287 case nir_jump_break:
4288 ac_build_break(ctx);
4289 break;
4290 case nir_jump_continue:
4291 ac_build_continue(ctx);
4292 break;
4293 default:
4294 fprintf(stderr, "Unknown NIR jump instr: ");
4295 nir_print_instr(&instr->instr, stderr);
4296 fprintf(stderr, "\n");
4297 abort();
4298 }
4299 }
4300
4301 static LLVMTypeRef
4302 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4303 enum glsl_base_type type)
4304 {
4305 switch (type) {
4306 case GLSL_TYPE_INT:
4307 case GLSL_TYPE_UINT:
4308 case GLSL_TYPE_BOOL:
4309 case GLSL_TYPE_SUBROUTINE:
4310 return ac->i32;
4311 case GLSL_TYPE_INT8:
4312 case GLSL_TYPE_UINT8:
4313 return ac->i8;
4314 case GLSL_TYPE_INT16:
4315 case GLSL_TYPE_UINT16:
4316 return ac->i16;
4317 case GLSL_TYPE_FLOAT:
4318 return ac->f32;
4319 case GLSL_TYPE_FLOAT16:
4320 return ac->f16;
4321 case GLSL_TYPE_INT64:
4322 case GLSL_TYPE_UINT64:
4323 return ac->i64;
4324 case GLSL_TYPE_DOUBLE:
4325 return ac->f64;
4326 default:
4327 unreachable("unknown GLSL type");
4328 }
4329 }
4330
4331 static LLVMTypeRef
4332 glsl_to_llvm_type(struct ac_llvm_context *ac,
4333 const struct glsl_type *type)
4334 {
4335 if (glsl_type_is_scalar(type)) {
4336 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4337 }
4338
4339 if (glsl_type_is_vector(type)) {
4340 return LLVMVectorType(
4341 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4342 glsl_get_vector_elements(type));
4343 }
4344
4345 if (glsl_type_is_matrix(type)) {
4346 return LLVMArrayType(
4347 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4348 glsl_get_matrix_columns(type));
4349 }
4350
4351 if (glsl_type_is_array(type)) {
4352 return LLVMArrayType(
4353 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4354 glsl_get_length(type));
4355 }
4356
4357 assert(glsl_type_is_struct_or_ifc(type));
4358
4359 LLVMTypeRef member_types[glsl_get_length(type)];
4360
4361 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4362 member_types[i] =
4363 glsl_to_llvm_type(ac,
4364 glsl_get_struct_field(type, i));
4365 }
4366
4367 return LLVMStructTypeInContext(ac->context, member_types,
4368 glsl_get_length(type), false);
4369 }
4370
4371 static void visit_deref(struct ac_nir_context *ctx,
4372 nir_deref_instr *instr)
4373 {
4374 if (instr->mode != nir_var_mem_shared &&
4375 instr->mode != nir_var_mem_global)
4376 return;
4377
4378 LLVMValueRef result = NULL;
4379 switch(instr->deref_type) {
4380 case nir_deref_type_var: {
4381 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4382 result = entry->data;
4383 break;
4384 }
4385 case nir_deref_type_struct:
4386 if (instr->mode == nir_var_mem_global) {
4387 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4388 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4389 instr->strct.index);
4390 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4391 LLVMConstInt(ctx->ac.i32, offset, 0));
4392 } else {
4393 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4394 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4395 }
4396 break;
4397 case nir_deref_type_array:
4398 if (instr->mode == nir_var_mem_global) {
4399 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4400 unsigned stride = glsl_get_explicit_stride(parent->type);
4401
4402 if ((glsl_type_is_matrix(parent->type) &&
4403 glsl_matrix_type_is_row_major(parent->type)) ||
4404 (glsl_type_is_vector(parent->type) && stride == 0))
4405 stride = type_scalar_size_bytes(parent->type);
4406
4407 assert(stride > 0);
4408 LLVMValueRef index = get_src(ctx, instr->arr.index);
4409 if (LLVMTypeOf(index) != ctx->ac.i64)
4410 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4411
4412 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4413
4414 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4415 } else {
4416 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4417 get_src(ctx, instr->arr.index));
4418 }
4419 break;
4420 case nir_deref_type_ptr_as_array:
4421 if (instr->mode == nir_var_mem_global) {
4422 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4423
4424 LLVMValueRef index = get_src(ctx, instr->arr.index);
4425 if (LLVMTypeOf(index) != ctx->ac.i64)
4426 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4427
4428 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4429
4430 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4431 } else {
4432 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4433 get_src(ctx, instr->arr.index));
4434 }
4435 break;
4436 case nir_deref_type_cast: {
4437 result = get_src(ctx, instr->parent);
4438
4439 /* We can't use the structs from LLVM because the shader
4440 * specifies its own offsets. */
4441 LLVMTypeRef pointee_type = ctx->ac.i8;
4442 if (instr->mode == nir_var_mem_shared)
4443 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4444
4445 unsigned address_space;
4446
4447 switch(instr->mode) {
4448 case nir_var_mem_shared:
4449 address_space = AC_ADDR_SPACE_LDS;
4450 break;
4451 case nir_var_mem_global:
4452 address_space = AC_ADDR_SPACE_GLOBAL;
4453 break;
4454 default:
4455 unreachable("Unhandled address space");
4456 }
4457
4458 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4459
4460 if (LLVMTypeOf(result) != type) {
4461 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4462 result = LLVMBuildBitCast(ctx->ac.builder, result,
4463 type, "");
4464 } else {
4465 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4466 type, "");
4467 }
4468 }
4469 break;
4470 }
4471 default:
4472 unreachable("Unhandled deref_instr deref type");
4473 }
4474
4475 ctx->ssa_defs[instr->dest.ssa.index] = result;
4476 }
4477
4478 static void visit_cf_list(struct ac_nir_context *ctx,
4479 struct exec_list *list);
4480
4481 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4482 {
4483 nir_foreach_instr(instr, block)
4484 {
4485 switch (instr->type) {
4486 case nir_instr_type_alu:
4487 visit_alu(ctx, nir_instr_as_alu(instr));
4488 break;
4489 case nir_instr_type_load_const:
4490 visit_load_const(ctx, nir_instr_as_load_const(instr));
4491 break;
4492 case nir_instr_type_intrinsic:
4493 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4494 break;
4495 case nir_instr_type_tex:
4496 visit_tex(ctx, nir_instr_as_tex(instr));
4497 break;
4498 case nir_instr_type_phi:
4499 visit_phi(ctx, nir_instr_as_phi(instr));
4500 break;
4501 case nir_instr_type_ssa_undef:
4502 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4503 break;
4504 case nir_instr_type_jump:
4505 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4506 break;
4507 case nir_instr_type_deref:
4508 visit_deref(ctx, nir_instr_as_deref(instr));
4509 break;
4510 default:
4511 fprintf(stderr, "Unknown NIR instr type: ");
4512 nir_print_instr(instr, stderr);
4513 fprintf(stderr, "\n");
4514 abort();
4515 }
4516 }
4517
4518 _mesa_hash_table_insert(ctx->defs, block,
4519 LLVMGetInsertBlock(ctx->ac.builder));
4520 }
4521
4522 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4523 {
4524 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4525
4526 nir_block *then_block =
4527 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4528
4529 ac_build_uif(&ctx->ac, value, then_block->index);
4530
4531 visit_cf_list(ctx, &if_stmt->then_list);
4532
4533 if (!exec_list_is_empty(&if_stmt->else_list)) {
4534 nir_block *else_block =
4535 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4536
4537 ac_build_else(&ctx->ac, else_block->index);
4538 visit_cf_list(ctx, &if_stmt->else_list);
4539 }
4540
4541 ac_build_endif(&ctx->ac, then_block->index);
4542 }
4543
4544 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4545 {
4546 nir_block *first_loop_block =
4547 (nir_block *) exec_list_get_head(&loop->body);
4548
4549 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4550
4551 visit_cf_list(ctx, &loop->body);
4552
4553 ac_build_endloop(&ctx->ac, first_loop_block->index);
4554 }
4555
4556 static void visit_cf_list(struct ac_nir_context *ctx,
4557 struct exec_list *list)
4558 {
4559 foreach_list_typed(nir_cf_node, node, node, list)
4560 {
4561 switch (node->type) {
4562 case nir_cf_node_block:
4563 visit_block(ctx, nir_cf_node_as_block(node));
4564 break;
4565
4566 case nir_cf_node_if:
4567 visit_if(ctx, nir_cf_node_as_if(node));
4568 break;
4569
4570 case nir_cf_node_loop:
4571 visit_loop(ctx, nir_cf_node_as_loop(node));
4572 break;
4573
4574 default:
4575 assert(0);
4576 }
4577 }
4578 }
4579
4580 void
4581 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4582 struct ac_shader_abi *abi,
4583 struct nir_shader *nir,
4584 struct nir_variable *variable,
4585 gl_shader_stage stage)
4586 {
4587 unsigned output_loc = variable->data.driver_location / 4;
4588 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4589
4590 /* tess ctrl has it's own load/store paths for outputs */
4591 if (stage == MESA_SHADER_TESS_CTRL)
4592 return;
4593
4594 if (stage == MESA_SHADER_VERTEX ||
4595 stage == MESA_SHADER_TESS_EVAL ||
4596 stage == MESA_SHADER_GEOMETRY) {
4597 int idx = variable->data.location + variable->data.index;
4598 if (idx == VARYING_SLOT_CLIP_DIST0) {
4599 int length = nir->info.clip_distance_array_size +
4600 nir->info.cull_distance_array_size;
4601
4602 if (length > 4)
4603 attrib_count = 2;
4604 else
4605 attrib_count = 1;
4606 }
4607 }
4608
4609 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4610 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4611 for (unsigned i = 0; i < attrib_count; ++i) {
4612 for (unsigned chan = 0; chan < 4; chan++) {
4613 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4614 ac_build_alloca_undef(ctx, type, "");
4615 }
4616 }
4617 }
4618
4619 static void
4620 setup_locals(struct ac_nir_context *ctx,
4621 struct nir_function *func)
4622 {
4623 int i, j;
4624 ctx->num_locals = 0;
4625 nir_foreach_variable(variable, &func->impl->locals) {
4626 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4627 variable->data.driver_location = ctx->num_locals * 4;
4628 variable->data.location_frac = 0;
4629 ctx->num_locals += attrib_count;
4630 }
4631 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4632 if (!ctx->locals)
4633 return;
4634
4635 for (i = 0; i < ctx->num_locals; i++) {
4636 for (j = 0; j < 4; j++) {
4637 ctx->locals[i * 4 + j] =
4638 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4639 }
4640 }
4641 }
4642
4643 static void
4644 setup_scratch(struct ac_nir_context *ctx,
4645 struct nir_shader *shader)
4646 {
4647 if (shader->scratch_size == 0)
4648 return;
4649
4650 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
4651 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
4652 "scratch");
4653 }
4654
4655 static void
4656 setup_constant_data(struct ac_nir_context *ctx,
4657 struct nir_shader *shader)
4658 {
4659 if (!shader->constant_data)
4660 return;
4661
4662 LLVMValueRef data =
4663 LLVMConstStringInContext(ctx->ac.context,
4664 shader->constant_data,
4665 shader->constant_data_size,
4666 true);
4667 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
4668
4669 /* We want to put the constant data in the CONST address space so that
4670 * we can use scalar loads. However, LLVM versions before 10 put these
4671 * variables in the same section as the code, which is unacceptable
4672 * for RadeonSI as it needs to relocate all the data sections after
4673 * the code sections. See https://reviews.llvm.org/D65813.
4674 */
4675 unsigned address_space =
4676 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
4677
4678 LLVMValueRef global =
4679 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
4680 "const_data",
4681 address_space);
4682
4683 LLVMSetInitializer(global, data);
4684 LLVMSetGlobalConstant(global, true);
4685 LLVMSetVisibility(global, LLVMHiddenVisibility);
4686 ctx->constant_data = global;
4687 }
4688
4689 static void
4690 setup_shared(struct ac_nir_context *ctx,
4691 struct nir_shader *nir)
4692 {
4693 nir_foreach_variable(variable, &nir->shared) {
4694 LLVMValueRef shared =
4695 LLVMAddGlobalInAddressSpace(
4696 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4697 variable->name ? variable->name : "",
4698 AC_ADDR_SPACE_LDS);
4699 _mesa_hash_table_insert(ctx->vars, variable, shared);
4700 }
4701 }
4702
4703 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4704 struct nir_shader *nir)
4705 {
4706 struct ac_nir_context ctx = {};
4707 struct nir_function *func;
4708
4709 ctx.ac = *ac;
4710 ctx.abi = abi;
4711
4712 ctx.stage = nir->info.stage;
4713 ctx.info = &nir->info;
4714
4715 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4716
4717 nir_foreach_variable(variable, &nir->outputs)
4718 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4719 ctx.stage);
4720
4721 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4722 _mesa_key_pointer_equal);
4723 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4724 _mesa_key_pointer_equal);
4725 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4726 _mesa_key_pointer_equal);
4727
4728 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4729
4730 nir_index_ssa_defs(func->impl);
4731 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4732
4733 setup_locals(&ctx, func);
4734 setup_scratch(&ctx, nir);
4735 setup_constant_data(&ctx, nir);
4736
4737 if (gl_shader_stage_is_compute(nir->info.stage))
4738 setup_shared(&ctx, nir);
4739
4740 visit_cf_list(&ctx, &func->impl->body);
4741 phi_post_pass(&ctx);
4742
4743 if (!gl_shader_stage_is_compute(nir->info.stage))
4744 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4745 ctx.abi->outputs);
4746
4747 free(ctx.locals);
4748 free(ctx.ssa_defs);
4749 ralloc_free(ctx.defs);
4750 ralloc_free(ctx.phis);
4751 ralloc_free(ctx.vars);
4752 }
4753
4754 void
4755 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4756 {
4757 /* Lower large variables to scratch first so that we won't bloat the
4758 * shader by generating large if ladders for them. We later lower
4759 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
4760 */
4761 NIR_PASS_V(nir, nir_lower_vars_to_scratch,
4762 nir_var_function_temp,
4763 256,
4764 glsl_get_natural_size_align_bytes);
4765
4766 /* While it would be nice not to have this flag, we are constrained
4767 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
4768 */
4769 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
4770
4771 /* TODO: Indirect indexing of GS inputs is unimplemented.
4772 *
4773 * TCS and TES load inputs directly from LDS or offchip memory, so
4774 * indirect indexing is trivial.
4775 */
4776 nir_variable_mode indirect_mask = 0;
4777 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4778 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4779 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4780 !llvm_has_working_vgpr_indexing)) {
4781 indirect_mask |= nir_var_shader_in;
4782 }
4783 if (!llvm_has_working_vgpr_indexing &&
4784 nir->info.stage != MESA_SHADER_TESS_CTRL)
4785 indirect_mask |= nir_var_shader_out;
4786
4787 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4788 * smart enough to handle indirects without causing excess spilling
4789 * causing the gpu to hang.
4790 *
4791 * See the following thread for more details of the problem:
4792 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4793 */
4794 indirect_mask |= nir_var_function_temp;
4795
4796 nir_lower_indirect_derefs(nir, indirect_mask);
4797 }
4798
4799 static unsigned
4800 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4801 {
4802 if (intrin->intrinsic != nir_intrinsic_store_deref)
4803 return 0;
4804
4805 nir_variable *var =
4806 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4807
4808 if (var->data.mode != nir_var_shader_out)
4809 return 0;
4810
4811 unsigned writemask = 0;
4812 const int location = var->data.location;
4813 unsigned first_component = var->data.location_frac;
4814 unsigned num_comps = intrin->dest.ssa.num_components;
4815
4816 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4817 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4818 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4819 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4820
4821 return writemask;
4822 }
4823
4824 static void
4825 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4826 unsigned *cond_block_tf_writemask,
4827 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4828 {
4829 switch (cf_node->type) {
4830 case nir_cf_node_block: {
4831 nir_block *block = nir_cf_node_as_block(cf_node);
4832 nir_foreach_instr(instr, block) {
4833 if (instr->type != nir_instr_type_intrinsic)
4834 continue;
4835
4836 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4837 if (intrin->intrinsic == nir_intrinsic_barrier) {
4838
4839 /* If we find a barrier in nested control flow put this in the
4840 * too hard basket. In GLSL this is not possible but it is in
4841 * SPIR-V.
4842 */
4843 if (is_nested_cf) {
4844 *tessfactors_are_def_in_all_invocs = false;
4845 return;
4846 }
4847
4848 /* The following case must be prevented:
4849 * gl_TessLevelInner = ...;
4850 * barrier();
4851 * if (gl_InvocationID == 1)
4852 * gl_TessLevelInner = ...;
4853 *
4854 * If you consider disjoint code segments separated by barriers, each
4855 * such segment that writes tess factor channels should write the same
4856 * channels in all codepaths within that segment.
4857 */
4858 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4859 /* Accumulate the result: */
4860 *tessfactors_are_def_in_all_invocs &=
4861 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4862
4863 /* Analyze the next code segment from scratch. */
4864 *upper_block_tf_writemask = 0;
4865 *cond_block_tf_writemask = 0;
4866 }
4867 } else
4868 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4869 }
4870
4871 break;
4872 }
4873 case nir_cf_node_if: {
4874 unsigned then_tessfactor_writemask = 0;
4875 unsigned else_tessfactor_writemask = 0;
4876
4877 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4878 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4879 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4880 cond_block_tf_writemask,
4881 tessfactors_are_def_in_all_invocs, true);
4882 }
4883
4884 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4885 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4886 cond_block_tf_writemask,
4887 tessfactors_are_def_in_all_invocs, true);
4888 }
4889
4890 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4891 /* If both statements write the same tess factor channels,
4892 * we can say that the upper block writes them too.
4893 */
4894 *upper_block_tf_writemask |= then_tessfactor_writemask &
4895 else_tessfactor_writemask;
4896 *cond_block_tf_writemask |= then_tessfactor_writemask |
4897 else_tessfactor_writemask;
4898 }
4899
4900 break;
4901 }
4902 case nir_cf_node_loop: {
4903 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4904 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4905 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4906 cond_block_tf_writemask,
4907 tessfactors_are_def_in_all_invocs, true);
4908 }
4909
4910 break;
4911 }
4912 default:
4913 unreachable("unknown cf node type");
4914 }
4915 }
4916
4917 bool
4918 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4919 {
4920 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4921
4922 /* The pass works as follows:
4923 * If all codepaths write tess factors, we can say that all
4924 * invocations define tess factors.
4925 *
4926 * Each tess factor channel is tracked separately.
4927 */
4928 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4929 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4930
4931 /* Initial value = true. Here the pass will accumulate results from
4932 * multiple segments surrounded by barriers. If tess factors aren't
4933 * written at all, it's a shader bug and we don't care if this will be
4934 * true.
4935 */
4936 bool tessfactors_are_def_in_all_invocs = true;
4937
4938 nir_foreach_function(function, nir) {
4939 if (function->impl) {
4940 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4941 scan_tess_ctrl(node, &main_block_tf_writemask,
4942 &cond_block_tf_writemask,
4943 &tessfactors_are_def_in_all_invocs,
4944 false);
4945 }
4946 }
4947 }
4948
4949 /* Accumulate the result for the last code segment separated by a
4950 * barrier.
4951 */
4952 if (main_block_tf_writemask || cond_block_tf_writemask) {
4953 tessfactors_are_def_in_all_invocs &=
4954 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4955 }
4956
4957 return tessfactors_are_def_in_all_invocs;
4958 }