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[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41 shader_info *info;
42
43 LLVMValueRef *ssa_defs;
44
45 struct hash_table *defs;
46 struct hash_table *phis;
47 struct hash_table *vars;
48
49 LLVMValueRef main_function;
50 LLVMBasicBlockRef continue_block;
51 LLVMBasicBlockRef break_block;
52
53 int num_locals;
54 LLVMValueRef *locals;
55 };
56
57 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
58 nir_deref_instr *deref_instr,
59 enum ac_descriptor_type desc_type,
60 const nir_instr *instr,
61 bool image, bool write);
62
63 static void
64 build_store_values_extended(struct ac_llvm_context *ac,
65 LLVMValueRef *values,
66 unsigned value_count,
67 unsigned value_stride,
68 LLVMValueRef vec)
69 {
70 LLVMBuilderRef builder = ac->builder;
71 unsigned i;
72
73 for (i = 0; i < value_count; i++) {
74 LLVMValueRef ptr = values[i * value_stride];
75 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
76 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
77 LLVMBuildStore(builder, value, ptr);
78 }
79 }
80
81 static enum ac_image_dim
82 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
83 bool is_array)
84 {
85 switch (dim) {
86 case GLSL_SAMPLER_DIM_1D:
87 if (ctx->chip_class == GFX9)
88 return is_array ? ac_image_2darray : ac_image_2d;
89 return is_array ? ac_image_1darray : ac_image_1d;
90 case GLSL_SAMPLER_DIM_2D:
91 case GLSL_SAMPLER_DIM_RECT:
92 case GLSL_SAMPLER_DIM_EXTERNAL:
93 return is_array ? ac_image_2darray : ac_image_2d;
94 case GLSL_SAMPLER_DIM_3D:
95 return ac_image_3d;
96 case GLSL_SAMPLER_DIM_CUBE:
97 return ac_image_cube;
98 case GLSL_SAMPLER_DIM_MS:
99 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
100 case GLSL_SAMPLER_DIM_SUBPASS:
101 return ac_image_2darray;
102 case GLSL_SAMPLER_DIM_SUBPASS_MS:
103 return ac_image_2darraymsaa;
104 default:
105 unreachable("bad sampler dim");
106 }
107 }
108
109 static enum ac_image_dim
110 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
111 bool is_array)
112 {
113 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
114
115 if (dim == ac_image_cube ||
116 (ctx->chip_class <= GFX8 && dim == ac_image_3d))
117 dim = ac_image_2darray;
118
119 return dim;
120 }
121
122 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
123 const nir_ssa_def *def)
124 {
125 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
126 if (def->num_components > 1) {
127 type = LLVMVectorType(type, def->num_components);
128 }
129 return type;
130 }
131
132 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
133 {
134 assert(src.is_ssa);
135 return nir->ssa_defs[src.ssa->index];
136 }
137
138 static LLVMValueRef
139 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
140 {
141 LLVMValueRef ptr = get_src(ctx, src);
142 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
143 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
144
145 return LLVMBuildBitCast(ctx->ac.builder, ptr,
146 LLVMPointerType(ctx->ac.i32, addr_space), "");
147 }
148
149 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
150 const struct nir_block *b)
151 {
152 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
153 return (LLVMBasicBlockRef)entry->data;
154 }
155
156 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
157 nir_alu_src src,
158 unsigned num_components)
159 {
160 LLVMValueRef value = get_src(ctx, src.src);
161 bool need_swizzle = false;
162
163 assert(value);
164 unsigned src_components = ac_get_llvm_num_components(value);
165 for (unsigned i = 0; i < num_components; ++i) {
166 assert(src.swizzle[i] < src_components);
167 if (src.swizzle[i] != i)
168 need_swizzle = true;
169 }
170
171 if (need_swizzle || num_components != src_components) {
172 LLVMValueRef masks[] = {
173 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
174 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
175 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
176 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
177
178 if (src_components > 1 && num_components == 1) {
179 value = LLVMBuildExtractElement(ctx->ac.builder, value,
180 masks[0], "");
181 } else if (src_components == 1 && num_components > 1) {
182 LLVMValueRef values[] = {value, value, value, value};
183 value = ac_build_gather_values(&ctx->ac, values, num_components);
184 } else {
185 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
186 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
187 swizzle, "");
188 }
189 }
190
191 if (src.negate) {
192 LLVMTypeRef type = LLVMTypeOf(value);
193 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
194 type = LLVMGetElementType(type);
195
196 if (LLVMGetTypeKind(type) == LLVMIntegerTypeKind)
197 value = LLVMBuildNeg(ctx->ac.builder, value, "");
198 else
199 value = LLVMBuildFNeg(ctx->ac.builder, value, "");
200 }
201
202 assert(!src.abs);
203 return value;
204 }
205
206 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
207 LLVMIntPredicate pred, LLVMValueRef src0,
208 LLVMValueRef src1)
209 {
210 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
211 return LLVMBuildSelect(ctx->builder, result,
212 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
213 ctx->i32_0, "");
214 }
215
216 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
217 LLVMRealPredicate pred, LLVMValueRef src0,
218 LLVMValueRef src1)
219 {
220 LLVMValueRef result;
221 src0 = ac_to_float(ctx, src0);
222 src1 = ac_to_float(ctx, src1);
223 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
224 return LLVMBuildSelect(ctx->builder, result,
225 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
226 ctx->i32_0, "");
227 }
228
229 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
230 const char *intrin,
231 LLVMTypeRef result_type,
232 LLVMValueRef src0)
233 {
234 char name[64];
235 LLVMValueRef params[] = {
236 ac_to_float(ctx, src0),
237 };
238
239 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
240 ac_get_elem_bits(ctx, result_type));
241 assert(length < sizeof(name));
242 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
243 }
244
245 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
246 const char *intrin,
247 LLVMTypeRef result_type,
248 LLVMValueRef src0, LLVMValueRef src1)
249 {
250 char name[64];
251 LLVMValueRef params[] = {
252 ac_to_float(ctx, src0),
253 ac_to_float(ctx, src1),
254 };
255
256 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
257 ac_get_elem_bits(ctx, result_type));
258 assert(length < sizeof(name));
259 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
260 }
261
262 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
263 const char *intrin,
264 LLVMTypeRef result_type,
265 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
266 {
267 char name[64];
268 LLVMValueRef params[] = {
269 ac_to_float(ctx, src0),
270 ac_to_float(ctx, src1),
271 ac_to_float(ctx, src2),
272 };
273
274 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
275 ac_get_elem_bits(ctx, result_type));
276 assert(length < sizeof(name));
277 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
278 }
279
280 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
281 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
282 {
283 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
284
285 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
286 ctx->i32_0, "");
287 return LLVMBuildSelect(ctx->builder, v,
288 ac_to_integer_or_pointer(ctx, src1),
289 ac_to_integer_or_pointer(ctx, src2), "");
290 }
291
292 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
293 LLVMValueRef src0)
294 {
295 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
296 }
297
298 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
299 const char *intrin,
300 LLVMValueRef src0, LLVMValueRef src1)
301 {
302 LLVMTypeRef ret_type;
303 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
304 LLVMValueRef res;
305 LLVMValueRef params[] = { src0, src1 };
306 ret_type = LLVMStructTypeInContext(ctx->context, types,
307 2, true);
308
309 res = ac_build_intrinsic(ctx, intrin, ret_type,
310 params, 2, AC_FUNC_ATTR_READNONE);
311
312 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
313 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
314 return res;
315 }
316
317 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
318 LLVMValueRef src0,
319 unsigned bitsize)
320 {
321 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
322 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
323 "");
324 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
325
326 switch (bitsize) {
327 case 16:
328 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
329 case 32:
330 return result;
331 case 64:
332 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
333 default:
334 unreachable("Unsupported bit size.");
335 }
336 }
337
338 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
339 LLVMValueRef src0)
340 {
341 src0 = ac_to_float(ctx, src0);
342 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
343 return LLVMBuildSExt(ctx->builder,
344 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
345 ctx->i32, "");
346 }
347
348 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
349 LLVMValueRef src0,
350 unsigned bitsize)
351 {
352 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
353
354 switch (bitsize) {
355 case 8:
356 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
357 case 16:
358 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
359 case 32:
360 return result;
361 case 64:
362 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
363 default:
364 unreachable("Unsupported bit size.");
365 }
366 }
367
368 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
369 LLVMValueRef src0)
370 {
371 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
372 return LLVMBuildSExt(ctx->builder,
373 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
374 ctx->i32, "");
375 }
376
377 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
378 LLVMValueRef src0)
379 {
380 LLVMValueRef result;
381 LLVMValueRef cond = NULL;
382
383 src0 = ac_to_float(ctx, src0);
384 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
385
386 if (ctx->chip_class >= GFX8) {
387 LLVMValueRef args[2];
388 /* Check if the result is a denormal - and flush to 0 if so. */
389 args[0] = result;
390 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
391 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
392 }
393
394 /* need to convert back up to f32 */
395 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
396
397 if (ctx->chip_class >= GFX8)
398 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
399 else {
400 /* for GFX6-GFX7 */
401 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
402 * so compare the result and flush to 0 if it's smaller.
403 */
404 LLVMValueRef temp, cond2;
405 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
406 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
407 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
408 temp, "");
409 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
410 temp, ctx->f32_0, "");
411 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
412 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
413 }
414 return result;
415 }
416
417 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
418 LLVMValueRef src0, LLVMValueRef src1)
419 {
420 LLVMValueRef dst64, result;
421 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
422 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
423
424 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
425 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
426 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
427 return result;
428 }
429
430 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
431 LLVMValueRef src0, LLVMValueRef src1)
432 {
433 LLVMValueRef dst64, result;
434 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
435 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
436
437 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
438 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
439 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
440 return result;
441 }
442
443 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
444 LLVMValueRef bits, LLVMValueRef offset)
445 {
446 /* mask = ((1 << bits) - 1) << offset */
447 return LLVMBuildShl(ctx->builder,
448 LLVMBuildSub(ctx->builder,
449 LLVMBuildShl(ctx->builder,
450 ctx->i32_1,
451 bits, ""),
452 ctx->i32_1, ""),
453 offset, "");
454 }
455
456 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
457 LLVMValueRef mask, LLVMValueRef insert,
458 LLVMValueRef base)
459 {
460 /* Calculate:
461 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
462 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
463 */
464 return LLVMBuildXor(ctx->builder, base,
465 LLVMBuildAnd(ctx->builder, mask,
466 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
467 }
468
469 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
470 LLVMValueRef src0,
471 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
472 LLVMValueRef args[2]))
473 {
474 LLVMValueRef comp[2];
475
476 src0 = ac_to_float(ctx, src0);
477 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
478 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
479
480 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
481 }
482
483 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
484 LLVMValueRef src0)
485 {
486 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
487 LLVMValueRef temps[2], val;
488 int i;
489
490 for (i = 0; i < 2; i++) {
491 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
492 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
493 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
494 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
495 }
496 return ac_build_gather_values(ctx, temps, 2);
497 }
498
499 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
500 nir_op op,
501 LLVMValueRef src0)
502 {
503 unsigned mask;
504 int idx;
505 LLVMValueRef result;
506
507 if (op == nir_op_fddx_fine)
508 mask = AC_TID_MASK_LEFT;
509 else if (op == nir_op_fddy_fine)
510 mask = AC_TID_MASK_TOP;
511 else
512 mask = AC_TID_MASK_TOP_LEFT;
513
514 /* for DDX we want to next X pixel, DDY next Y pixel. */
515 if (op == nir_op_fddx_fine ||
516 op == nir_op_fddx_coarse ||
517 op == nir_op_fddx)
518 idx = 1;
519 else
520 idx = 2;
521
522 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
523 return result;
524 }
525
526 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
527 {
528 LLVMValueRef src[4], result = NULL;
529 unsigned num_components = instr->dest.dest.ssa.num_components;
530 unsigned src_components;
531 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
532
533 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
534 switch (instr->op) {
535 case nir_op_vec2:
536 case nir_op_vec3:
537 case nir_op_vec4:
538 src_components = 1;
539 break;
540 case nir_op_pack_half_2x16:
541 case nir_op_pack_snorm_2x16:
542 case nir_op_pack_unorm_2x16:
543 src_components = 2;
544 break;
545 case nir_op_unpack_half_2x16:
546 src_components = 1;
547 break;
548 case nir_op_cube_face_coord:
549 case nir_op_cube_face_index:
550 src_components = 3;
551 break;
552 default:
553 src_components = num_components;
554 break;
555 }
556 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
557 src[i] = get_alu_src(ctx, instr->src[i], src_components);
558
559 switch (instr->op) {
560 case nir_op_mov:
561 result = src[0];
562 break;
563 case nir_op_fneg:
564 src[0] = ac_to_float(&ctx->ac, src[0]);
565 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
566 break;
567 case nir_op_ineg:
568 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
569 break;
570 case nir_op_inot:
571 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
572 break;
573 case nir_op_iadd:
574 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
575 break;
576 case nir_op_fadd:
577 src[0] = ac_to_float(&ctx->ac, src[0]);
578 src[1] = ac_to_float(&ctx->ac, src[1]);
579 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
580 break;
581 case nir_op_fsub:
582 src[0] = ac_to_float(&ctx->ac, src[0]);
583 src[1] = ac_to_float(&ctx->ac, src[1]);
584 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
585 break;
586 case nir_op_isub:
587 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
588 break;
589 case nir_op_imul:
590 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
591 break;
592 case nir_op_imod:
593 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
594 break;
595 case nir_op_umod:
596 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
597 break;
598 case nir_op_fmod:
599 src[0] = ac_to_float(&ctx->ac, src[0]);
600 src[1] = ac_to_float(&ctx->ac, src[1]);
601 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
602 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
603 ac_to_float_type(&ctx->ac, def_type), result);
604 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
605 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
606 break;
607 case nir_op_frem:
608 src[0] = ac_to_float(&ctx->ac, src[0]);
609 src[1] = ac_to_float(&ctx->ac, src[1]);
610 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
611 break;
612 case nir_op_irem:
613 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
614 break;
615 case nir_op_idiv:
616 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
617 break;
618 case nir_op_udiv:
619 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
620 break;
621 case nir_op_fmul:
622 src[0] = ac_to_float(&ctx->ac, src[0]);
623 src[1] = ac_to_float(&ctx->ac, src[1]);
624 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
625 break;
626 case nir_op_frcp:
627 src[0] = ac_to_float(&ctx->ac, src[0]);
628 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
629 break;
630 case nir_op_iand:
631 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
632 break;
633 case nir_op_ior:
634 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
635 break;
636 case nir_op_ixor:
637 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
638 break;
639 case nir_op_ishl:
640 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
641 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
642 LLVMTypeOf(src[0]), "");
643 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
644 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
645 LLVMTypeOf(src[0]), "");
646 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
647 break;
648 case nir_op_ishr:
649 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
650 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
651 LLVMTypeOf(src[0]), "");
652 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
653 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
654 LLVMTypeOf(src[0]), "");
655 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
656 break;
657 case nir_op_ushr:
658 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
659 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
660 LLVMTypeOf(src[0]), "");
661 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
662 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
663 LLVMTypeOf(src[0]), "");
664 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
665 break;
666 case nir_op_ilt32:
667 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
668 break;
669 case nir_op_ine32:
670 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
671 break;
672 case nir_op_ieq32:
673 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
674 break;
675 case nir_op_ige32:
676 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
677 break;
678 case nir_op_ult32:
679 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
680 break;
681 case nir_op_uge32:
682 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
683 break;
684 case nir_op_feq32:
685 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
686 break;
687 case nir_op_fne32:
688 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
689 break;
690 case nir_op_flt32:
691 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
692 break;
693 case nir_op_fge32:
694 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
695 break;
696 case nir_op_fabs:
697 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
698 ac_to_float_type(&ctx->ac, def_type), src[0]);
699 break;
700 case nir_op_iabs:
701 result = emit_iabs(&ctx->ac, src[0]);
702 break;
703 case nir_op_imax:
704 result = ac_build_imax(&ctx->ac, src[0], src[1]);
705 break;
706 case nir_op_imin:
707 result = ac_build_imin(&ctx->ac, src[0], src[1]);
708 break;
709 case nir_op_umax:
710 result = ac_build_umax(&ctx->ac, src[0], src[1]);
711 break;
712 case nir_op_umin:
713 result = ac_build_umin(&ctx->ac, src[0], src[1]);
714 break;
715 case nir_op_isign:
716 result = ac_build_isign(&ctx->ac, src[0],
717 instr->dest.dest.ssa.bit_size);
718 break;
719 case nir_op_fsign:
720 src[0] = ac_to_float(&ctx->ac, src[0]);
721 result = ac_build_fsign(&ctx->ac, src[0],
722 instr->dest.dest.ssa.bit_size);
723 break;
724 case nir_op_ffloor:
725 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
726 ac_to_float_type(&ctx->ac, def_type), src[0]);
727 break;
728 case nir_op_ftrunc:
729 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
730 ac_to_float_type(&ctx->ac, def_type), src[0]);
731 break;
732 case nir_op_fceil:
733 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
734 ac_to_float_type(&ctx->ac, def_type), src[0]);
735 break;
736 case nir_op_fround_even:
737 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
738 ac_to_float_type(&ctx->ac, def_type),src[0]);
739 break;
740 case nir_op_ffract:
741 src[0] = ac_to_float(&ctx->ac, src[0]);
742 result = ac_build_fract(&ctx->ac, src[0],
743 instr->dest.dest.ssa.bit_size);
744 break;
745 case nir_op_fsin:
746 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
747 ac_to_float_type(&ctx->ac, def_type), src[0]);
748 break;
749 case nir_op_fcos:
750 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
751 ac_to_float_type(&ctx->ac, def_type), src[0]);
752 break;
753 case nir_op_fsqrt:
754 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
755 ac_to_float_type(&ctx->ac, def_type), src[0]);
756 break;
757 case nir_op_fexp2:
758 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
759 ac_to_float_type(&ctx->ac, def_type), src[0]);
760 break;
761 case nir_op_flog2:
762 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
763 ac_to_float_type(&ctx->ac, def_type), src[0]);
764 break;
765 case nir_op_frsq:
766 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
767 ac_to_float_type(&ctx->ac, def_type), src[0]);
768 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
769 break;
770 case nir_op_frexp_exp:
771 src[0] = ac_to_float(&ctx->ac, src[0]);
772 result = ac_build_frexp_exp(&ctx->ac, src[0],
773 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
774 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
775 result = LLVMBuildSExt(ctx->ac.builder, result,
776 ctx->ac.i32, "");
777 break;
778 case nir_op_frexp_sig:
779 src[0] = ac_to_float(&ctx->ac, src[0]);
780 result = ac_build_frexp_mant(&ctx->ac, src[0],
781 instr->dest.dest.ssa.bit_size);
782 break;
783 case nir_op_fpow:
784 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
785 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
786 break;
787 case nir_op_fmax:
788 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
789 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
790 if (ctx->ac.chip_class < GFX9 &&
791 instr->dest.dest.ssa.bit_size == 32) {
792 /* Only pre-GFX9 chips do not flush denorms. */
793 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
794 ac_to_float_type(&ctx->ac, def_type),
795 result);
796 }
797 break;
798 case nir_op_fmin:
799 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
800 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
801 if (ctx->ac.chip_class < GFX9 &&
802 instr->dest.dest.ssa.bit_size == 32) {
803 /* Only pre-GFX9 chips do not flush denorms. */
804 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
805 ac_to_float_type(&ctx->ac, def_type),
806 result);
807 }
808 break;
809 case nir_op_ffma:
810 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
811 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
812 break;
813 case nir_op_ldexp:
814 src[0] = ac_to_float(&ctx->ac, src[0]);
815 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
816 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
817 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
818 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
819 else
820 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
821 break;
822 case nir_op_bfm:
823 result = emit_bfm(&ctx->ac, src[0], src[1]);
824 break;
825 case nir_op_bitfield_select:
826 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
827 break;
828 case nir_op_ubfe:
829 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
830 break;
831 case nir_op_ibfe:
832 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
833 break;
834 case nir_op_bitfield_reverse:
835 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
836 break;
837 case nir_op_bit_count:
838 result = ac_build_bit_count(&ctx->ac, src[0]);
839 break;
840 case nir_op_vec2:
841 case nir_op_vec3:
842 case nir_op_vec4:
843 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
844 src[i] = ac_to_integer(&ctx->ac, src[i]);
845 result = ac_build_gather_values(&ctx->ac, src, num_components);
846 break;
847 case nir_op_f2i8:
848 case nir_op_f2i16:
849 case nir_op_f2i32:
850 case nir_op_f2i64:
851 src[0] = ac_to_float(&ctx->ac, src[0]);
852 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
853 break;
854 case nir_op_f2u8:
855 case nir_op_f2u16:
856 case nir_op_f2u32:
857 case nir_op_f2u64:
858 src[0] = ac_to_float(&ctx->ac, src[0]);
859 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
860 break;
861 case nir_op_i2f16:
862 case nir_op_i2f32:
863 case nir_op_i2f64:
864 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
865 break;
866 case nir_op_u2f16:
867 case nir_op_u2f32:
868 case nir_op_u2f64:
869 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
870 break;
871 case nir_op_f2f16_rtz:
872 src[0] = ac_to_float(&ctx->ac, src[0]);
873 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
874 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
875 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
876 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
877 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
878 break;
879 case nir_op_f2f16_rtne:
880 case nir_op_f2f16:
881 case nir_op_f2f32:
882 case nir_op_f2f64:
883 src[0] = ac_to_float(&ctx->ac, src[0]);
884 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
885 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
886 else
887 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
888 break;
889 case nir_op_u2u8:
890 case nir_op_u2u16:
891 case nir_op_u2u32:
892 case nir_op_u2u64:
893 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
894 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
895 else
896 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
897 break;
898 case nir_op_i2i8:
899 case nir_op_i2i16:
900 case nir_op_i2i32:
901 case nir_op_i2i64:
902 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
903 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
904 else
905 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
906 break;
907 case nir_op_b32csel:
908 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
909 break;
910 case nir_op_find_lsb:
911 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
912 break;
913 case nir_op_ufind_msb:
914 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
915 break;
916 case nir_op_ifind_msb:
917 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
918 break;
919 case nir_op_uadd_carry:
920 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
921 break;
922 case nir_op_usub_borrow:
923 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
924 break;
925 case nir_op_b2f16:
926 case nir_op_b2f32:
927 case nir_op_b2f64:
928 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
929 break;
930 case nir_op_f2b32:
931 result = emit_f2b(&ctx->ac, src[0]);
932 break;
933 case nir_op_b2i8:
934 case nir_op_b2i16:
935 case nir_op_b2i32:
936 case nir_op_b2i64:
937 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
938 break;
939 case nir_op_i2b32:
940 result = emit_i2b(&ctx->ac, src[0]);
941 break;
942 case nir_op_fquantize2f16:
943 result = emit_f2f16(&ctx->ac, src[0]);
944 break;
945 case nir_op_umul_high:
946 result = emit_umul_high(&ctx->ac, src[0], src[1]);
947 break;
948 case nir_op_imul_high:
949 result = emit_imul_high(&ctx->ac, src[0], src[1]);
950 break;
951 case nir_op_pack_half_2x16:
952 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
953 break;
954 case nir_op_pack_snorm_2x16:
955 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
956 break;
957 case nir_op_pack_unorm_2x16:
958 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
959 break;
960 case nir_op_unpack_half_2x16:
961 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
962 break;
963 case nir_op_fddx:
964 case nir_op_fddy:
965 case nir_op_fddx_fine:
966 case nir_op_fddy_fine:
967 case nir_op_fddx_coarse:
968 case nir_op_fddy_coarse:
969 result = emit_ddxy(ctx, instr->op, src[0]);
970 break;
971
972 case nir_op_unpack_64_2x32_split_x: {
973 assert(ac_get_llvm_num_components(src[0]) == 1);
974 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
975 ctx->ac.v2i32,
976 "");
977 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
978 ctx->ac.i32_0, "");
979 break;
980 }
981
982 case nir_op_unpack_64_2x32_split_y: {
983 assert(ac_get_llvm_num_components(src[0]) == 1);
984 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
985 ctx->ac.v2i32,
986 "");
987 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
988 ctx->ac.i32_1, "");
989 break;
990 }
991
992 case nir_op_pack_64_2x32_split: {
993 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
994 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
995 break;
996 }
997
998 case nir_op_pack_32_2x16_split: {
999 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1000 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1001 break;
1002 }
1003
1004 case nir_op_unpack_32_2x16_split_x: {
1005 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1006 ctx->ac.v2i16,
1007 "");
1008 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1009 ctx->ac.i32_0, "");
1010 break;
1011 }
1012
1013 case nir_op_unpack_32_2x16_split_y: {
1014 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1015 ctx->ac.v2i16,
1016 "");
1017 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1018 ctx->ac.i32_1, "");
1019 break;
1020 }
1021
1022 case nir_op_cube_face_coord: {
1023 src[0] = ac_to_float(&ctx->ac, src[0]);
1024 LLVMValueRef results[2];
1025 LLVMValueRef in[3];
1026 for (unsigned chan = 0; chan < 3; chan++)
1027 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1028 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1029 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1030 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1031 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1032 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1033 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1034 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1035 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1036 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1037 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1038 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1039 result = ac_build_gather_values(&ctx->ac, results, 2);
1040 break;
1041 }
1042
1043 case nir_op_cube_face_index: {
1044 src[0] = ac_to_float(&ctx->ac, src[0]);
1045 LLVMValueRef in[3];
1046 for (unsigned chan = 0; chan < 3; chan++)
1047 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1048 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1049 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1050 break;
1051 }
1052
1053 case nir_op_fmin3:
1054 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1055 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1056 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1057 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1058 break;
1059 case nir_op_umin3:
1060 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1061 result = ac_build_umin(&ctx->ac, result, src[2]);
1062 break;
1063 case nir_op_imin3:
1064 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1065 result = ac_build_imin(&ctx->ac, result, src[2]);
1066 break;
1067 case nir_op_fmax3:
1068 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1069 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1070 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1071 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1072 break;
1073 case nir_op_umax3:
1074 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1075 result = ac_build_umax(&ctx->ac, result, src[2]);
1076 break;
1077 case nir_op_imax3:
1078 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1079 result = ac_build_imax(&ctx->ac, result, src[2]);
1080 break;
1081 case nir_op_fmed3: {
1082 src[0] = ac_to_float(&ctx->ac, src[0]);
1083 src[1] = ac_to_float(&ctx->ac, src[1]);
1084 src[2] = ac_to_float(&ctx->ac, src[2]);
1085 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1086 instr->dest.dest.ssa.bit_size);
1087 break;
1088 }
1089 case nir_op_imed3: {
1090 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1091 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1092 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1093 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1094 break;
1095 }
1096 case nir_op_umed3: {
1097 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1098 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1099 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1100 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1101 break;
1102 }
1103
1104 default:
1105 fprintf(stderr, "Unknown NIR alu instr: ");
1106 nir_print_instr(&instr->instr, stderr);
1107 fprintf(stderr, "\n");
1108 abort();
1109 }
1110
1111 if (result) {
1112 assert(instr->dest.dest.is_ssa);
1113 result = ac_to_integer_or_pointer(&ctx->ac, result);
1114 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1115 }
1116 }
1117
1118 static void visit_load_const(struct ac_nir_context *ctx,
1119 const nir_load_const_instr *instr)
1120 {
1121 LLVMValueRef values[4], value = NULL;
1122 LLVMTypeRef element_type =
1123 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1124
1125 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1126 switch (instr->def.bit_size) {
1127 case 8:
1128 values[i] = LLVMConstInt(element_type,
1129 instr->value[i].u8, false);
1130 break;
1131 case 16:
1132 values[i] = LLVMConstInt(element_type,
1133 instr->value[i].u16, false);
1134 break;
1135 case 32:
1136 values[i] = LLVMConstInt(element_type,
1137 instr->value[i].u32, false);
1138 break;
1139 case 64:
1140 values[i] = LLVMConstInt(element_type,
1141 instr->value[i].u64, false);
1142 break;
1143 default:
1144 fprintf(stderr,
1145 "unsupported nir load_const bit_size: %d\n",
1146 instr->def.bit_size);
1147 abort();
1148 }
1149 }
1150 if (instr->def.num_components > 1) {
1151 value = LLVMConstVector(values, instr->def.num_components);
1152 } else
1153 value = values[0];
1154
1155 ctx->ssa_defs[instr->def.index] = value;
1156 }
1157
1158 static LLVMValueRef
1159 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1160 {
1161 LLVMValueRef size =
1162 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1163 LLVMConstInt(ctx->ac.i32, 2, false), "");
1164
1165 /* GFX8 only */
1166 if (ctx->ac.chip_class == GFX8 && in_elements) {
1167 /* On GFX8, the descriptor contains the size in bytes,
1168 * but TXQ must return the size in elements.
1169 * The stride is always non-zero for resources using TXQ.
1170 */
1171 LLVMValueRef stride =
1172 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1173 ctx->ac.i32_1, "");
1174 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1175 LLVMConstInt(ctx->ac.i32, 16, false), "");
1176 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1177 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1178
1179 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1180 }
1181 return size;
1182 }
1183
1184 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1185 nir_variable *var,
1186 struct ac_image_args *args,
1187 const nir_tex_instr *instr)
1188 {
1189 const struct glsl_type *type = glsl_without_array(var->type);
1190 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1191 LLVMValueRef half_texel[2];
1192 LLVMValueRef compare_cube_wa = NULL;
1193 LLVMValueRef result;
1194
1195 //TODO Rect
1196 {
1197 struct ac_image_args txq_args = { 0 };
1198
1199 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1200 txq_args.opcode = ac_image_get_resinfo;
1201 txq_args.dmask = 0xf;
1202 txq_args.lod = ctx->i32_0;
1203 txq_args.resource = args->resource;
1204 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1205 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1206
1207 for (unsigned c = 0; c < 2; c++) {
1208 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1209 LLVMConstInt(ctx->i32, c, false), "");
1210 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1211 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1212 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1213 LLVMConstReal(ctx->f32, -0.5), "");
1214 }
1215 }
1216
1217 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1218
1219 for (unsigned c = 0; c < 2; c++) {
1220 LLVMValueRef tmp;
1221 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1222 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1223 }
1224
1225 /*
1226 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1227 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1228 * workaround by sampling using a scaled type and converting.
1229 * This is taken from amdgpu-pro shaders.
1230 */
1231 /* NOTE this produces some ugly code compared to amdgpu-pro,
1232 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1233 * and then reads them back. -pro generates two selects,
1234 * one s_cmp for the descriptor rewriting
1235 * one v_cmp for the coordinate and result changes.
1236 */
1237 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1238 LLVMValueRef tmp, tmp2;
1239
1240 /* workaround 8/8/8/8 uint/sint cube gather bug */
1241 /* first detect it then change to a scaled read and f2i */
1242 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1243 tmp2 = tmp;
1244
1245 /* extract the DATA_FORMAT */
1246 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1247 LLVMConstInt(ctx->i32, 6, false), false);
1248
1249 /* is the DATA_FORMAT == 8_8_8_8 */
1250 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1251
1252 if (stype == GLSL_TYPE_UINT)
1253 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1254 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1255 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1256 else
1257 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1258 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1259 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1260
1261 /* replace the NUM FORMAT in the descriptor */
1262 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false), "");
1263 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1264
1265 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1266
1267 /* don't modify the coordinates for this case */
1268 for (unsigned c = 0; c < 2; ++c)
1269 args->coords[c] = LLVMBuildSelect(
1270 ctx->builder, compare_cube_wa,
1271 orig_coords[c], args->coords[c], "");
1272 }
1273
1274 args->attributes = AC_FUNC_ATTR_READNONE;
1275 result = ac_build_image_opcode(ctx, args);
1276
1277 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1278 LLVMValueRef tmp, tmp2;
1279
1280 /* if the cube workaround is in place, f2i the result. */
1281 for (unsigned c = 0; c < 4; c++) {
1282 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1283 if (stype == GLSL_TYPE_UINT)
1284 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1285 else
1286 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1287 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1288 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1289 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1290 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1291 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1292 }
1293 }
1294 return result;
1295 }
1296
1297 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1298 {
1299 nir_deref_instr *texture_deref_instr = NULL;
1300
1301 for (unsigned i = 0; i < instr->num_srcs; i++) {
1302 switch (instr->src[i].src_type) {
1303 case nir_tex_src_texture_deref:
1304 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1305 break;
1306 default:
1307 break;
1308 }
1309 }
1310 return texture_deref_instr;
1311 }
1312
1313 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1314 const nir_tex_instr *instr,
1315 struct ac_image_args *args)
1316 {
1317 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1318 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1319
1320 if (ctx->abi->gfx9_stride_size_workaround) {
1321 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1322 args->resource,
1323 args->coords[0],
1324 ctx->ac.i32_0,
1325 util_last_bit(mask),
1326 0, true);
1327 } else {
1328 return ac_build_buffer_load_format(&ctx->ac,
1329 args->resource,
1330 args->coords[0],
1331 ctx->ac.i32_0,
1332 util_last_bit(mask),
1333 0, true);
1334 }
1335 }
1336
1337 args->opcode = ac_image_sample;
1338
1339 switch (instr->op) {
1340 case nir_texop_txf:
1341 case nir_texop_txf_ms:
1342 case nir_texop_samples_identical:
1343 args->opcode = args->level_zero ||
1344 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1345 ac_image_load : ac_image_load_mip;
1346 args->level_zero = false;
1347 break;
1348 case nir_texop_txs:
1349 case nir_texop_query_levels:
1350 args->opcode = ac_image_get_resinfo;
1351 if (!args->lod)
1352 args->lod = ctx->ac.i32_0;
1353 args->level_zero = false;
1354 break;
1355 case nir_texop_tex:
1356 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1357 assert(!args->lod);
1358 args->level_zero = true;
1359 }
1360 break;
1361 case nir_texop_tg4:
1362 args->opcode = ac_image_gather4;
1363 args->level_zero = true;
1364 break;
1365 case nir_texop_lod:
1366 args->opcode = ac_image_get_lod;
1367 break;
1368 default:
1369 break;
1370 }
1371
1372 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1373 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1374 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1375 const struct glsl_type *type = glsl_without_array(var->type);
1376 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1377 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1378 return lower_gather4_integer(&ctx->ac, var, args, instr);
1379 }
1380 }
1381
1382 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1383 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1384 if ((args->dim == ac_image_2darray ||
1385 args->dim == ac_image_2d) && !args->coords[1]) {
1386 args->coords[1] = ctx->ac.i32_0;
1387 }
1388 }
1389
1390 args->attributes = AC_FUNC_ATTR_READNONE;
1391 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1392 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1393 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1394 /* Prevent texture instructions with implicit derivatives from being
1395 * sinked into branches. */
1396 switch (instr->op) {
1397 case nir_texop_tex:
1398 case nir_texop_txb:
1399 case nir_texop_lod:
1400 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1401 break;
1402 default:
1403 break;
1404 }
1405 }
1406
1407 return ac_build_image_opcode(&ctx->ac, args);
1408 }
1409
1410 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1411 nir_intrinsic_instr *instr)
1412 {
1413 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1414 LLVMValueRef index = get_src(ctx, instr->src[1]);
1415
1416 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1417 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1418 return result;
1419 }
1420
1421 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1422 nir_intrinsic_instr *instr)
1423 {
1424 LLVMValueRef ptr, addr;
1425 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1426 unsigned index = nir_intrinsic_base(instr);
1427
1428 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1429 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1430
1431 /* Load constant values from user SGPRS when possible, otherwise
1432 * fallback to the default path that loads directly from memory.
1433 */
1434 if (LLVMIsConstant(src0) &&
1435 instr->dest.ssa.bit_size == 32) {
1436 unsigned count = instr->dest.ssa.num_components;
1437 unsigned offset = index;
1438
1439 offset += LLVMConstIntGetZExtValue(src0);
1440 offset /= 4;
1441
1442 offset -= ctx->abi->base_inline_push_consts;
1443
1444 if (offset + count <= ctx->abi->num_inline_push_consts) {
1445 return ac_build_gather_values(&ctx->ac,
1446 ctx->abi->inline_push_consts + offset,
1447 count);
1448 }
1449 }
1450
1451 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1452
1453 if (instr->dest.ssa.bit_size == 8) {
1454 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1455 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1456 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1457 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1458
1459 LLVMValueRef params[3];
1460 if (load_dwords > 1) {
1461 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1462 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1463 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1464 } else {
1465 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1466 params[0] = ctx->ac.i32_0;
1467 params[1] = res;
1468 }
1469 params[2] = addr;
1470 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1471
1472 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1473 if (instr->dest.ssa.num_components > 1)
1474 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1475 return res;
1476 } else if (instr->dest.ssa.bit_size == 16) {
1477 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1478 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1479 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1480 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1481 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1482 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1483 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1484 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1485 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1486 LLVMConstInt(ctx->ac.i32, 4, false)};
1487 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1488 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1489 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1490 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1491 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1492 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1493 }
1494
1495 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1496
1497 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1498 }
1499
1500 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1501 const nir_intrinsic_instr *instr)
1502 {
1503 LLVMValueRef index = get_src(ctx, instr->src[0]);
1504
1505 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1506 }
1507
1508 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1509 {
1510 uint32_t new_mask = 0;
1511 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1512 if (mask & (1u << i))
1513 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1514 return new_mask;
1515 }
1516
1517 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1518 unsigned start, unsigned count)
1519 {
1520 LLVMValueRef mask[] = {
1521 ctx->i32_0, ctx->i32_1,
1522 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1523
1524 unsigned src_elements = ac_get_llvm_num_components(src);
1525
1526 if (count == src_elements) {
1527 assert(start == 0);
1528 return src;
1529 } else if (count == 1) {
1530 assert(start < src_elements);
1531 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1532 } else {
1533 assert(start + count <= src_elements);
1534 assert(count <= 4);
1535 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1536 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1537 }
1538 }
1539
1540 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1541 enum gl_access_qualifier access,
1542 bool may_store_unaligned,
1543 bool writeonly_memory)
1544 {
1545 unsigned cache_policy = 0;
1546
1547 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1548 * store opcodes not aligned to a dword are affected. The only way to
1549 * get unaligned stores is through shader images.
1550 */
1551 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1552 /* If this is write-only, don't keep data in L1 to prevent
1553 * evicting L1 cache lines that may be needed by other
1554 * instructions.
1555 */
1556 writeonly_memory ||
1557 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1558 cache_policy |= ac_glc;
1559 }
1560
1561 return cache_policy;
1562 }
1563
1564 static void visit_store_ssbo(struct ac_nir_context *ctx,
1565 nir_intrinsic_instr *instr)
1566 {
1567 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1568 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1569 unsigned writemask = nir_intrinsic_write_mask(instr);
1570 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1571 bool writeonly_memory = access & ACCESS_NON_READABLE;
1572 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1573
1574 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1575 get_src(ctx, instr->src[1]), true);
1576 LLVMValueRef base_data = src_data;
1577 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1578 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1579
1580 while (writemask) {
1581 int start, count;
1582 LLVMValueRef data, offset;
1583 LLVMTypeRef data_type;
1584
1585 u_bit_scan_consecutive_range(&writemask, &start, &count);
1586
1587 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1588 * writes into a 2-element and a 1-element write. */
1589 if (count == 3 &&
1590 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1591 writemask |= 1 << (start + 2);
1592 count = 2;
1593 }
1594 int num_bytes = count * elem_size_bytes; /* count in bytes */
1595
1596 /* we can only store 4 DWords at the same time.
1597 * can only happen for 64 Bit vectors. */
1598 if (num_bytes > 16) {
1599 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1600 count = 2;
1601 num_bytes = 16;
1602 }
1603
1604 /* check alignment of 16 Bit stores */
1605 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1606 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1607 count = 1;
1608 num_bytes = 2;
1609 }
1610 data = extract_vector_range(&ctx->ac, base_data, start, count);
1611
1612 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1613 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1614
1615 if (num_bytes == 1) {
1616 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1617 offset, ctx->ac.i32_0,
1618 cache_policy);
1619 } else if (num_bytes == 2) {
1620 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1621 offset, ctx->ac.i32_0,
1622 cache_policy);
1623 } else {
1624 int num_channels = num_bytes / 4;
1625
1626 switch (num_bytes) {
1627 case 16: /* v4f32 */
1628 data_type = ctx->ac.v4f32;
1629 break;
1630 case 12: /* v3f32 */
1631 data_type = ctx->ac.v3f32;
1632 break;
1633 case 8: /* v2f32 */
1634 data_type = ctx->ac.v2f32;
1635 break;
1636 case 4: /* f32 */
1637 data_type = ctx->ac.f32;
1638 break;
1639 default:
1640 unreachable("Malformed vector store.");
1641 }
1642 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1643
1644 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1645 num_channels, offset,
1646 ctx->ac.i32_0, 0,
1647 cache_policy, false);
1648 }
1649 }
1650 }
1651
1652 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1653 const nir_intrinsic_instr *instr)
1654 {
1655 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1656 const char *op;
1657 char name[64], type[8];
1658 LLVMValueRef params[6];
1659 int arg_count = 0;
1660
1661 switch (instr->intrinsic) {
1662 case nir_intrinsic_ssbo_atomic_add:
1663 op = "add";
1664 break;
1665 case nir_intrinsic_ssbo_atomic_imin:
1666 op = "smin";
1667 break;
1668 case nir_intrinsic_ssbo_atomic_umin:
1669 op = "umin";
1670 break;
1671 case nir_intrinsic_ssbo_atomic_imax:
1672 op = "smax";
1673 break;
1674 case nir_intrinsic_ssbo_atomic_umax:
1675 op = "umax";
1676 break;
1677 case nir_intrinsic_ssbo_atomic_and:
1678 op = "and";
1679 break;
1680 case nir_intrinsic_ssbo_atomic_or:
1681 op = "or";
1682 break;
1683 case nir_intrinsic_ssbo_atomic_xor:
1684 op = "xor";
1685 break;
1686 case nir_intrinsic_ssbo_atomic_exchange:
1687 op = "swap";
1688 break;
1689 case nir_intrinsic_ssbo_atomic_comp_swap:
1690 op = "cmpswap";
1691 break;
1692 default:
1693 abort();
1694 }
1695
1696 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1697 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1698 }
1699 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1700 params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
1701 get_src(ctx, instr->src[0]),
1702 true);
1703
1704 if (HAVE_LLVM >= 0x900) {
1705 /* XXX: The new raw/struct atomic intrinsics are buggy with
1706 * LLVM 8, see r358579.
1707 */
1708 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1709 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1710 params[arg_count++] = ctx->ac.i32_0; /* slc */
1711
1712 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1713 snprintf(name, sizeof(name),
1714 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1715 } else {
1716 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1717 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1718 params[arg_count++] = ctx->ac.i1false; /* slc */
1719
1720 assert(return_type == ctx->ac.i32);
1721 snprintf(name, sizeof(name),
1722 "llvm.amdgcn.buffer.atomic.%s", op);
1723 }
1724
1725 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1726 arg_count, 0);
1727 }
1728
1729 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1730 const nir_intrinsic_instr *instr)
1731 {
1732 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1733 int num_components = instr->num_components;
1734 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1735 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1736
1737 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1738 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1739 get_src(ctx, instr->src[0]), false);
1740 LLVMValueRef vindex = ctx->ac.i32_0;
1741
1742 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1743 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1744
1745 LLVMValueRef results[4];
1746 for (int i = 0; i < num_components;) {
1747 int num_elems = num_components - i;
1748 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1749 num_elems = 1;
1750 if (num_elems * elem_size_bytes > 16)
1751 num_elems = 16 / elem_size_bytes;
1752 int load_bytes = num_elems * elem_size_bytes;
1753
1754 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1755
1756 LLVMValueRef ret;
1757
1758 if (load_bytes == 1) {
1759 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1760 rsrc,
1761 offset,
1762 ctx->ac.i32_0,
1763 immoffset,
1764 cache_policy);
1765 } else if (load_bytes == 2) {
1766 ret = ac_build_tbuffer_load_short(&ctx->ac,
1767 rsrc,
1768 offset,
1769 ctx->ac.i32_0,
1770 immoffset,
1771 cache_policy);
1772 } else {
1773 int num_channels = util_next_power_of_two(load_bytes) / 4;
1774 bool can_speculate = access & ACCESS_CAN_REORDER;
1775
1776 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1777 vindex, offset, immoffset, 0,
1778 cache_policy, can_speculate, false);
1779 }
1780
1781 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1782 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1783 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1784
1785 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1786 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1787
1788 for (unsigned j = 0; j < num_elems; j++) {
1789 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1790 }
1791 i += num_elems;
1792 }
1793
1794 return ac_build_gather_values(&ctx->ac, results, num_components);
1795 }
1796
1797 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1798 const nir_intrinsic_instr *instr)
1799 {
1800 LLVMValueRef ret;
1801 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1802 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1803 int num_components = instr->num_components;
1804
1805 if (ctx->abi->load_ubo)
1806 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1807
1808 if (instr->dest.ssa.bit_size == 64)
1809 num_components *= 2;
1810
1811 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1812 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1813 LLVMValueRef results[num_components];
1814 for (unsigned i = 0; i < num_components; ++i) {
1815 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1816 load_bytes * i, 0);
1817
1818 if (load_bytes == 1) {
1819 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1820 rsrc,
1821 offset,
1822 ctx->ac.i32_0,
1823 immoffset,
1824 0);
1825 } else {
1826 assert(load_bytes == 2);
1827 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1828 rsrc,
1829 offset,
1830 ctx->ac.i32_0,
1831 immoffset,
1832 0);
1833 }
1834 }
1835 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1836 } else {
1837 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1838 NULL, 0, 0, true, true);
1839
1840 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1841 }
1842
1843 return LLVMBuildBitCast(ctx->ac.builder, ret,
1844 get_def_type(ctx, &instr->dest.ssa), "");
1845 }
1846
1847 static void
1848 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1849 bool vs_in, unsigned *vertex_index_out,
1850 LLVMValueRef *vertex_index_ref,
1851 unsigned *const_out, LLVMValueRef *indir_out)
1852 {
1853 nir_variable *var = nir_deref_instr_get_variable(instr);
1854 nir_deref_path path;
1855 unsigned idx_lvl = 1;
1856
1857 nir_deref_path_init(&path, instr, NULL);
1858
1859 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1860 if (vertex_index_ref) {
1861 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1862 if (vertex_index_out)
1863 *vertex_index_out = 0;
1864 } else {
1865 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1866 }
1867 ++idx_lvl;
1868 }
1869
1870 uint32_t const_offset = 0;
1871 LLVMValueRef offset = NULL;
1872
1873 if (var->data.compact) {
1874 assert(instr->deref_type == nir_deref_type_array);
1875 const_offset = nir_src_as_uint(instr->arr.index);
1876 goto out;
1877 }
1878
1879 for (; path.path[idx_lvl]; ++idx_lvl) {
1880 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1881 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1882 unsigned index = path.path[idx_lvl]->strct.index;
1883
1884 for (unsigned i = 0; i < index; i++) {
1885 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1886 const_offset += glsl_count_attribute_slots(ft, vs_in);
1887 }
1888 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1889 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1890 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1891 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1892 if (offset)
1893 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1894 else
1895 offset = array_off;
1896 } else
1897 unreachable("Uhandled deref type in get_deref_instr_offset");
1898 }
1899
1900 out:
1901 nir_deref_path_finish(&path);
1902
1903 if (const_offset && offset)
1904 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1905 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1906 "");
1907
1908 *const_out = const_offset;
1909 *indir_out = offset;
1910 }
1911
1912 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1913 nir_intrinsic_instr *instr,
1914 bool load_inputs)
1915 {
1916 LLVMValueRef result;
1917 LLVMValueRef vertex_index = NULL;
1918 LLVMValueRef indir_index = NULL;
1919 unsigned const_index = 0;
1920
1921 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1922
1923 unsigned location = var->data.location;
1924 unsigned driver_location = var->data.driver_location;
1925 const bool is_patch = var->data.patch;
1926 const bool is_compact = var->data.compact;
1927
1928 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1929 false, NULL, is_patch ? NULL : &vertex_index,
1930 &const_index, &indir_index);
1931
1932 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1933
1934 LLVMTypeRef src_component_type;
1935 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1936 src_component_type = LLVMGetElementType(dest_type);
1937 else
1938 src_component_type = dest_type;
1939
1940 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1941 vertex_index, indir_index,
1942 const_index, location, driver_location,
1943 var->data.location_frac,
1944 instr->num_components,
1945 is_patch, is_compact, load_inputs);
1946 if (instr->dest.ssa.bit_size == 16) {
1947 result = ac_to_integer(&ctx->ac, result);
1948 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
1949 }
1950 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
1951 }
1952
1953 static unsigned
1954 type_scalar_size_bytes(const struct glsl_type *type)
1955 {
1956 assert(glsl_type_is_vector_or_scalar(type) ||
1957 glsl_type_is_matrix(type));
1958 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
1959 }
1960
1961 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
1962 nir_intrinsic_instr *instr)
1963 {
1964 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1965 nir_variable *var = nir_deref_instr_get_variable(deref);
1966
1967 LLVMValueRef values[8];
1968 int idx = 0;
1969 int ve = instr->dest.ssa.num_components;
1970 unsigned comp = 0;
1971 LLVMValueRef indir_index;
1972 LLVMValueRef ret;
1973 unsigned const_index;
1974 unsigned stride = 4;
1975 int mode = deref->mode;
1976
1977 if (var) {
1978 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
1979 var->data.mode == nir_var_shader_in;
1980 idx = var->data.driver_location;
1981 comp = var->data.location_frac;
1982 mode = var->data.mode;
1983
1984 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
1985 &const_index, &indir_index);
1986
1987 if (var->data.compact) {
1988 stride = 1;
1989 const_index += comp;
1990 comp = 0;
1991 }
1992 }
1993
1994 if (instr->dest.ssa.bit_size == 64 &&
1995 (deref->mode == nir_var_shader_in ||
1996 deref->mode == nir_var_shader_out ||
1997 deref->mode == nir_var_function_temp))
1998 ve *= 2;
1999
2000 switch (mode) {
2001 case nir_var_shader_in:
2002 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2003 ctx->stage == MESA_SHADER_TESS_EVAL) {
2004 return load_tess_varyings(ctx, instr, true);
2005 }
2006
2007 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2008 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2009 LLVMValueRef indir_index;
2010 unsigned const_index, vertex_index;
2011 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2012 &const_index, &indir_index);
2013
2014 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2015 var->data.driver_location,
2016 var->data.location_frac,
2017 instr->num_components, vertex_index, const_index, type);
2018 }
2019
2020 for (unsigned chan = comp; chan < ve + comp; chan++) {
2021 if (indir_index) {
2022 unsigned count = glsl_count_attribute_slots(
2023 var->type,
2024 ctx->stage == MESA_SHADER_VERTEX);
2025 count -= chan / 4;
2026 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2027 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2028 stride, false, true);
2029
2030 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2031 tmp_vec,
2032 indir_index, "");
2033 } else
2034 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2035 }
2036 break;
2037 case nir_var_function_temp:
2038 for (unsigned chan = 0; chan < ve; chan++) {
2039 if (indir_index) {
2040 unsigned count = glsl_count_attribute_slots(
2041 var->type, false);
2042 count -= chan / 4;
2043 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2044 &ctx->ac, ctx->locals + idx + chan, count,
2045 stride, true, true);
2046
2047 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2048 tmp_vec,
2049 indir_index, "");
2050 } else {
2051 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2052 }
2053 }
2054 break;
2055 case nir_var_mem_shared: {
2056 LLVMValueRef address = get_src(ctx, instr->src[0]);
2057 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2058 return LLVMBuildBitCast(ctx->ac.builder, val,
2059 get_def_type(ctx, &instr->dest.ssa),
2060 "");
2061 }
2062 case nir_var_shader_out:
2063 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2064 return load_tess_varyings(ctx, instr, false);
2065 }
2066
2067 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2068 var->data.fb_fetch_output &&
2069 ctx->abi->emit_fbfetch)
2070 return ctx->abi->emit_fbfetch(ctx->abi);
2071
2072 for (unsigned chan = comp; chan < ve + comp; chan++) {
2073 if (indir_index) {
2074 unsigned count = glsl_count_attribute_slots(
2075 var->type, false);
2076 count -= chan / 4;
2077 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2078 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2079 stride, true, true);
2080
2081 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2082 tmp_vec,
2083 indir_index, "");
2084 } else {
2085 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2086 ctx->abi->outputs[idx + chan + const_index * stride],
2087 "");
2088 }
2089 }
2090 break;
2091 case nir_var_mem_global: {
2092 LLVMValueRef address = get_src(ctx, instr->src[0]);
2093 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2094 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2095 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2096
2097 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2098 if (stride != natural_stride) {
2099 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2100 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2101 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2102
2103 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2104 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2105 values[i] = LLVMBuildLoad(ctx->ac.builder,
2106 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2107 }
2108 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2109 } else {
2110 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2111 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2112 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2113 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2114 return val;
2115 }
2116 }
2117 default:
2118 unreachable("unhandle variable mode");
2119 }
2120 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2121 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2122 }
2123
2124 static void
2125 visit_store_var(struct ac_nir_context *ctx,
2126 nir_intrinsic_instr *instr)
2127 {
2128 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2129 nir_variable *var = nir_deref_instr_get_variable(deref);
2130
2131 LLVMValueRef temp_ptr, value;
2132 int idx = 0;
2133 unsigned comp = 0;
2134 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2135 int writemask = instr->const_index[0];
2136 LLVMValueRef indir_index;
2137 unsigned const_index;
2138
2139 if (var) {
2140 get_deref_offset(ctx, deref, false,
2141 NULL, NULL, &const_index, &indir_index);
2142 idx = var->data.driver_location;
2143 comp = var->data.location_frac;
2144
2145 if (var->data.compact) {
2146 const_index += comp;
2147 comp = 0;
2148 }
2149 }
2150
2151 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2152 (deref->mode == nir_var_shader_out ||
2153 deref->mode == nir_var_function_temp)) {
2154
2155 src = LLVMBuildBitCast(ctx->ac.builder, src,
2156 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2157 "");
2158
2159 writemask = widen_mask(writemask, 2);
2160 }
2161
2162 writemask = writemask << comp;
2163
2164 switch (deref->mode) {
2165 case nir_var_shader_out:
2166
2167 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2168 LLVMValueRef vertex_index = NULL;
2169 LLVMValueRef indir_index = NULL;
2170 unsigned const_index = 0;
2171 const bool is_patch = var->data.patch;
2172
2173 get_deref_offset(ctx, deref, false, NULL,
2174 is_patch ? NULL : &vertex_index,
2175 &const_index, &indir_index);
2176
2177 ctx->abi->store_tcs_outputs(ctx->abi, var,
2178 vertex_index, indir_index,
2179 const_index, src, writemask);
2180 return;
2181 }
2182
2183 for (unsigned chan = 0; chan < 8; chan++) {
2184 int stride = 4;
2185 if (!(writemask & (1 << chan)))
2186 continue;
2187
2188 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2189
2190 if (var->data.compact)
2191 stride = 1;
2192 if (indir_index) {
2193 unsigned count = glsl_count_attribute_slots(
2194 var->type, false);
2195 count -= chan / 4;
2196 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2197 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2198 stride, true, true);
2199
2200 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2201 value, indir_index, "");
2202 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2203 count, stride, tmp_vec);
2204
2205 } else {
2206 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2207
2208 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2209 }
2210 }
2211 break;
2212 case nir_var_function_temp:
2213 for (unsigned chan = 0; chan < 8; chan++) {
2214 if (!(writemask & (1 << chan)))
2215 continue;
2216
2217 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2218 if (indir_index) {
2219 unsigned count = glsl_count_attribute_slots(
2220 var->type, false);
2221 count -= chan / 4;
2222 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2223 &ctx->ac, ctx->locals + idx + chan, count,
2224 4, true, true);
2225
2226 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2227 value, indir_index, "");
2228 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2229 count, 4, tmp_vec);
2230 } else {
2231 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2232
2233 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2234 }
2235 }
2236 break;
2237
2238 case nir_var_mem_global:
2239 case nir_var_mem_shared: {
2240 int writemask = instr->const_index[0];
2241 LLVMValueRef address = get_src(ctx, instr->src[0]);
2242 LLVMValueRef val = get_src(ctx, instr->src[1]);
2243
2244 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2245 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2246 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2247
2248 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2249 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2250 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2251
2252 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2253 stride == natural_stride) {
2254 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2255 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2256 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2257
2258 val = LLVMBuildBitCast(ctx->ac.builder, val,
2259 LLVMGetElementType(LLVMTypeOf(address)), "");
2260 LLVMBuildStore(ctx->ac.builder, val, address);
2261 } else {
2262 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2263 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2264 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2265 for (unsigned chan = 0; chan < 4; chan++) {
2266 if (!(writemask & (1 << chan)))
2267 continue;
2268
2269 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2270
2271 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2272 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2273 chan);
2274 src = LLVMBuildBitCast(ctx->ac.builder, src,
2275 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2276 LLVMBuildStore(ctx->ac.builder, src, ptr);
2277 }
2278 }
2279 break;
2280 }
2281 default:
2282 abort();
2283 break;
2284 }
2285 }
2286
2287 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2288 {
2289 switch (dim) {
2290 case GLSL_SAMPLER_DIM_BUF:
2291 return 1;
2292 case GLSL_SAMPLER_DIM_1D:
2293 return array ? 2 : 1;
2294 case GLSL_SAMPLER_DIM_2D:
2295 return array ? 3 : 2;
2296 case GLSL_SAMPLER_DIM_MS:
2297 return array ? 4 : 3;
2298 case GLSL_SAMPLER_DIM_3D:
2299 case GLSL_SAMPLER_DIM_CUBE:
2300 return 3;
2301 case GLSL_SAMPLER_DIM_RECT:
2302 case GLSL_SAMPLER_DIM_SUBPASS:
2303 return 2;
2304 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2305 return 3;
2306 default:
2307 break;
2308 }
2309 return 0;
2310 }
2311
2312 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2313 LLVMValueRef coord_x, LLVMValueRef coord_y,
2314 LLVMValueRef coord_z,
2315 LLVMValueRef sample_index,
2316 LLVMValueRef fmask_desc_ptr)
2317 {
2318 unsigned sample_chan = coord_z ? 3 : 2;
2319 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2320 addr[sample_chan] = sample_index;
2321
2322 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2323 return addr[sample_chan];
2324 }
2325
2326 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2327 {
2328 assert(instr->src[0].is_ssa);
2329 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2330 }
2331
2332 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2333 const nir_intrinsic_instr *instr,
2334 enum ac_descriptor_type desc_type,
2335 bool write)
2336 {
2337 nir_deref_instr *deref_instr =
2338 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2339 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2340
2341 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2342 }
2343
2344 static void get_image_coords(struct ac_nir_context *ctx,
2345 const nir_intrinsic_instr *instr,
2346 struct ac_image_args *args,
2347 enum glsl_sampler_dim dim,
2348 bool is_array)
2349 {
2350 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2351 LLVMValueRef masks[] = {
2352 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2353 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2354 };
2355 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2356
2357 int count;
2358 MAYBE_UNUSED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2359 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2360 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2361 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2362 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2363 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2364 count = image_type_to_components_count(dim, is_array);
2365
2366 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2367 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2368 LLVMValueRef fmask_load_address[3];
2369
2370 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2371 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2372 if (is_array)
2373 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2374 else
2375 fmask_load_address[2] = NULL;
2376
2377 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2378 fmask_load_address[0],
2379 fmask_load_address[1],
2380 fmask_load_address[2],
2381 sample_index,
2382 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2383 AC_DESC_FMASK, &instr->instr, false, false));
2384 }
2385 if (count == 1 && !gfx9_1d) {
2386 if (instr->src[1].ssa->num_components)
2387 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2388 else
2389 args->coords[0] = src0;
2390 } else {
2391 int chan;
2392 if (is_ms)
2393 count--;
2394 for (chan = 0; chan < count; ++chan) {
2395 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2396 }
2397
2398 if (gfx9_1d) {
2399 if (is_array) {
2400 args->coords[2] = args->coords[1];
2401 args->coords[1] = ctx->ac.i32_0;
2402 } else
2403 args->coords[1] = ctx->ac.i32_0;
2404 count++;
2405 }
2406
2407 if (is_ms) {
2408 args->coords[count] = sample_index;
2409 count++;
2410 }
2411 }
2412 }
2413
2414 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2415 const nir_intrinsic_instr *instr,
2416 bool write, bool atomic)
2417 {
2418 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2419 if (ctx->abi->gfx9_stride_size_workaround ||
2420 (ctx->abi->gfx9_stride_size_workaround_for_atomic && atomic)) {
2421 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2422 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2423 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2424
2425 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2426 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2427 elem_count, stride, "");
2428
2429 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2430 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2431 }
2432 return rsrc;
2433 }
2434
2435 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2436 const nir_intrinsic_instr *instr,
2437 bool bindless)
2438 {
2439 LLVMValueRef res;
2440
2441 enum glsl_sampler_dim dim;
2442 enum gl_access_qualifier access;
2443 bool is_array;
2444 if (bindless) {
2445 dim = nir_intrinsic_image_dim(instr);
2446 access = nir_intrinsic_access(instr);
2447 is_array = nir_intrinsic_image_array(instr);
2448 } else {
2449 const nir_deref_instr *image_deref = get_image_deref(instr);
2450 const struct glsl_type *type = image_deref->type;
2451 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2452 dim = glsl_get_sampler_dim(type);
2453 access = var->data.image.access;
2454 is_array = glsl_sampler_type_is_array(type);
2455 }
2456
2457 struct ac_image_args args = {};
2458
2459 args.cache_policy = get_cache_policy(ctx, access, false, false);
2460
2461 if (dim == GLSL_SAMPLER_DIM_BUF) {
2462 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2463 unsigned num_channels = util_last_bit(mask);
2464 LLVMValueRef rsrc, vindex;
2465
2466 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2467 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2468 ctx->ac.i32_0, "");
2469
2470 bool can_speculate = access & ACCESS_CAN_REORDER;
2471 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2472 ctx->ac.i32_0, num_channels,
2473 args.cache_policy,
2474 can_speculate);
2475 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2476
2477 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2478 res = ac_to_integer(&ctx->ac, res);
2479 } else {
2480 args.opcode = ac_image_load;
2481 get_image_coords(ctx, instr, &args, dim, is_array);
2482 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2483 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2484 args.dmask = 15;
2485 args.attributes = AC_FUNC_ATTR_READONLY;
2486
2487 res = ac_build_image_opcode(&ctx->ac, &args);
2488 }
2489 return res;
2490 }
2491
2492 static void visit_image_store(struct ac_nir_context *ctx,
2493 nir_intrinsic_instr *instr,
2494 bool bindless)
2495 {
2496
2497
2498 enum glsl_sampler_dim dim;
2499 enum gl_access_qualifier access;
2500 bool is_array;
2501 if (bindless) {
2502 dim = nir_intrinsic_image_dim(instr);
2503 access = nir_intrinsic_access(instr);
2504 is_array = nir_intrinsic_image_array(instr);
2505 } else {
2506 const nir_deref_instr *image_deref = get_image_deref(instr);
2507 const struct glsl_type *type = image_deref->type;
2508 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2509 dim = glsl_get_sampler_dim(type);
2510 access = var->data.image.access;
2511 is_array = glsl_sampler_type_is_array(type);
2512 }
2513
2514 bool writeonly_memory = access & ACCESS_NON_READABLE;
2515 struct ac_image_args args = {};
2516
2517 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2518
2519 if (dim == GLSL_SAMPLER_DIM_BUF) {
2520 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2521 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2522 unsigned src_channels = ac_get_llvm_num_components(src);
2523 LLVMValueRef vindex;
2524
2525 if (src_channels == 3)
2526 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2527
2528 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2529 get_src(ctx, instr->src[1]),
2530 ctx->ac.i32_0, "");
2531
2532 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2533 ctx->ac.i32_0, src_channels,
2534 args.cache_policy);
2535 } else {
2536 args.opcode = ac_image_store;
2537 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2538 get_image_coords(ctx, instr, &args, dim, is_array);
2539 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2540 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2541 args.dmask = 15;
2542
2543 ac_build_image_opcode(&ctx->ac, &args);
2544 }
2545
2546 }
2547
2548 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2549 const nir_intrinsic_instr *instr,
2550 bool bindless)
2551 {
2552 LLVMValueRef params[7];
2553 int param_count = 0;
2554
2555 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2556 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2557 const char *atomic_name;
2558 char intrinsic_name[64];
2559 enum ac_atomic_op atomic_subop;
2560 MAYBE_UNUSED int length;
2561
2562 enum glsl_sampler_dim dim;
2563 bool is_unsigned = false;
2564 bool is_array;
2565 if (bindless) {
2566 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_min ||
2567 instr->intrinsic == nir_intrinsic_bindless_image_atomic_max) {
2568 const GLenum format = nir_intrinsic_format(instr);
2569 assert(format == GL_R32UI || format == GL_R32I);
2570 is_unsigned = format == GL_R32UI;
2571 }
2572 dim = nir_intrinsic_image_dim(instr);
2573 is_array = nir_intrinsic_image_array(instr);
2574 } else {
2575 const struct glsl_type *type = get_image_deref(instr)->type;
2576 is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2577 dim = glsl_get_sampler_dim(type);
2578 is_array = glsl_sampler_type_is_array(type);
2579 }
2580
2581 switch (instr->intrinsic) {
2582 case nir_intrinsic_bindless_image_atomic_add:
2583 case nir_intrinsic_image_deref_atomic_add:
2584 atomic_name = "add";
2585 atomic_subop = ac_atomic_add;
2586 break;
2587 case nir_intrinsic_bindless_image_atomic_min:
2588 case nir_intrinsic_image_deref_atomic_min:
2589 atomic_name = is_unsigned ? "umin" : "smin";
2590 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2591 break;
2592 case nir_intrinsic_bindless_image_atomic_max:
2593 case nir_intrinsic_image_deref_atomic_max:
2594 atomic_name = is_unsigned ? "umax" : "smax";
2595 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2596 break;
2597 case nir_intrinsic_bindless_image_atomic_and:
2598 case nir_intrinsic_image_deref_atomic_and:
2599 atomic_name = "and";
2600 atomic_subop = ac_atomic_and;
2601 break;
2602 case nir_intrinsic_bindless_image_atomic_or:
2603 case nir_intrinsic_image_deref_atomic_or:
2604 atomic_name = "or";
2605 atomic_subop = ac_atomic_or;
2606 break;
2607 case nir_intrinsic_bindless_image_atomic_xor:
2608 case nir_intrinsic_image_deref_atomic_xor:
2609 atomic_name = "xor";
2610 atomic_subop = ac_atomic_xor;
2611 break;
2612 case nir_intrinsic_bindless_image_atomic_exchange:
2613 case nir_intrinsic_image_deref_atomic_exchange:
2614 atomic_name = "swap";
2615 atomic_subop = ac_atomic_swap;
2616 break;
2617 case nir_intrinsic_bindless_image_atomic_comp_swap:
2618 case nir_intrinsic_image_deref_atomic_comp_swap:
2619 atomic_name = "cmpswap";
2620 atomic_subop = 0; /* not used */
2621 break;
2622 default:
2623 abort();
2624 }
2625
2626 if (cmpswap)
2627 params[param_count++] = get_src(ctx, instr->src[4]);
2628 params[param_count++] = get_src(ctx, instr->src[3]);
2629
2630 if (dim == GLSL_SAMPLER_DIM_BUF) {
2631 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2632 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2633 ctx->ac.i32_0, ""); /* vindex */
2634 params[param_count++] = ctx->ac.i32_0; /* voffset */
2635 if (HAVE_LLVM >= 0x900) {
2636 /* XXX: The new raw/struct atomic intrinsics are buggy
2637 * with LLVM 8, see r358579.
2638 */
2639 params[param_count++] = ctx->ac.i32_0; /* soffset */
2640 params[param_count++] = ctx->ac.i32_0; /* slc */
2641
2642 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2643 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2644 } else {
2645 params[param_count++] = ctx->ac.i1false; /* slc */
2646
2647 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2648 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2649 }
2650
2651 assert(length < sizeof(intrinsic_name));
2652 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2653 params, param_count, 0);
2654 } else {
2655 struct ac_image_args args = {};
2656 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2657 args.atomic = atomic_subop;
2658 args.data[0] = params[0];
2659 if (cmpswap)
2660 args.data[1] = params[1];
2661 get_image_coords(ctx, instr, &args, dim, is_array);
2662 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2663 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2664
2665 return ac_build_image_opcode(&ctx->ac, &args);
2666 }
2667 }
2668
2669 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2670 const nir_intrinsic_instr *instr,
2671 bool bindless)
2672 {
2673 enum glsl_sampler_dim dim;
2674 bool is_array;
2675 if (bindless) {
2676 dim = nir_intrinsic_image_dim(instr);
2677 is_array = nir_intrinsic_image_array(instr);
2678 } else {
2679 const struct glsl_type *type = get_image_deref(instr)->type;
2680 dim = glsl_get_sampler_dim(type);
2681 is_array = glsl_sampler_type_is_array(type);
2682 }
2683
2684 struct ac_image_args args = { 0 };
2685 args.dim = get_ac_sampler_dim(&ctx->ac, dim, is_array);
2686 args.dmask = 0xf;
2687 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2688 args.opcode = ac_image_get_resinfo;
2689 args.lod = ctx->ac.i32_0;
2690 args.attributes = AC_FUNC_ATTR_READNONE;
2691
2692 return ac_build_image_opcode(&ctx->ac, &args);
2693 }
2694
2695 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2696 const nir_intrinsic_instr *instr,
2697 bool bindless)
2698 {
2699 LLVMValueRef res;
2700
2701 enum glsl_sampler_dim dim;
2702 bool is_array;
2703 if (bindless) {
2704 dim = nir_intrinsic_image_dim(instr);
2705 is_array = nir_intrinsic_image_array(instr);
2706 } else {
2707 const struct glsl_type *type = get_image_deref(instr)->type;
2708 dim = glsl_get_sampler_dim(type);
2709 is_array = glsl_sampler_type_is_array(type);
2710 }
2711
2712 if (dim == GLSL_SAMPLER_DIM_BUF)
2713 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2714
2715 struct ac_image_args args = { 0 };
2716
2717 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2718 args.dmask = 0xf;
2719 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2720 args.opcode = ac_image_get_resinfo;
2721 args.lod = ctx->ac.i32_0;
2722 args.attributes = AC_FUNC_ATTR_READNONE;
2723
2724 res = ac_build_image_opcode(&ctx->ac, &args);
2725
2726 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2727
2728 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2729 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2730 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2731 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2732 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2733 }
2734 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2735 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2736 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2737 ctx->ac.i32_1, "");
2738
2739 }
2740 return res;
2741 }
2742
2743 static void emit_membar(struct ac_llvm_context *ac,
2744 const nir_intrinsic_instr *instr)
2745 {
2746 unsigned wait_flags = 0;
2747
2748 switch (instr->intrinsic) {
2749 case nir_intrinsic_memory_barrier:
2750 case nir_intrinsic_group_memory_barrier:
2751 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2752 break;
2753 case nir_intrinsic_memory_barrier_atomic_counter:
2754 case nir_intrinsic_memory_barrier_buffer:
2755 case nir_intrinsic_memory_barrier_image:
2756 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2757 break;
2758 case nir_intrinsic_memory_barrier_shared:
2759 wait_flags = AC_WAIT_LGKM;
2760 break;
2761 default:
2762 break;
2763 }
2764
2765 ac_build_waitcnt(ac, wait_flags);
2766 }
2767
2768 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2769 {
2770 /* GFX6 only (thanks to a hw bug workaround):
2771 * The real barrier instruction isn’t needed, because an entire patch
2772 * always fits into a single wave.
2773 */
2774 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2775 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2776 return;
2777 }
2778 ac_build_s_barrier(ac);
2779 }
2780
2781 static void emit_discard(struct ac_nir_context *ctx,
2782 const nir_intrinsic_instr *instr)
2783 {
2784 LLVMValueRef cond;
2785
2786 if (instr->intrinsic == nir_intrinsic_discard_if) {
2787 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2788 get_src(ctx, instr->src[0]),
2789 ctx->ac.i32_0, "");
2790 } else {
2791 assert(instr->intrinsic == nir_intrinsic_discard);
2792 cond = ctx->ac.i1false;
2793 }
2794
2795 ctx->abi->emit_kill(ctx->abi, cond);
2796 }
2797
2798 static LLVMValueRef
2799 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2800 {
2801 LLVMValueRef result;
2802 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2803 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2804 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2805
2806 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2807 }
2808
2809 static LLVMValueRef
2810 visit_load_subgroup_id(struct ac_nir_context *ctx)
2811 {
2812 if (ctx->stage == MESA_SHADER_COMPUTE) {
2813 LLVMValueRef result;
2814 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2815 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2816 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2817 } else {
2818 return LLVMConstInt(ctx->ac.i32, 0, false);
2819 }
2820 }
2821
2822 static LLVMValueRef
2823 visit_load_num_subgroups(struct ac_nir_context *ctx)
2824 {
2825 if (ctx->stage == MESA_SHADER_COMPUTE) {
2826 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2827 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2828 } else {
2829 return LLVMConstInt(ctx->ac.i32, 1, false);
2830 }
2831 }
2832
2833 static LLVMValueRef
2834 visit_first_invocation(struct ac_nir_context *ctx)
2835 {
2836 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2837 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
2838
2839 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2840 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2841 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
2842 ctx->ac.iN_wavemask, args, 2,
2843 AC_FUNC_ATTR_NOUNWIND |
2844 AC_FUNC_ATTR_READNONE);
2845
2846 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2847 }
2848
2849 static LLVMValueRef
2850 visit_load_shared(struct ac_nir_context *ctx,
2851 const nir_intrinsic_instr *instr)
2852 {
2853 LLVMValueRef values[4], derived_ptr, index, ret;
2854
2855 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2856
2857 for (int chan = 0; chan < instr->num_components; chan++) {
2858 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2859 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2860 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2861 }
2862
2863 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2864 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2865 }
2866
2867 static void
2868 visit_store_shared(struct ac_nir_context *ctx,
2869 const nir_intrinsic_instr *instr)
2870 {
2871 LLVMValueRef derived_ptr, data,index;
2872 LLVMBuilderRef builder = ctx->ac.builder;
2873
2874 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2875 LLVMValueRef src = get_src(ctx, instr->src[0]);
2876
2877 int writemask = nir_intrinsic_write_mask(instr);
2878 for (int chan = 0; chan < 4; chan++) {
2879 if (!(writemask & (1 << chan))) {
2880 continue;
2881 }
2882 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2883 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2884 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2885 LLVMBuildStore(builder, data, derived_ptr);
2886 }
2887 }
2888
2889 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2890 const nir_intrinsic_instr *instr,
2891 LLVMValueRef ptr, int src_idx)
2892 {
2893 LLVMValueRef result;
2894 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2895
2896 const char *sync_scope = HAVE_LLVM >= 0x0900 ? "workgroup-one-as" : "workgroup";
2897
2898 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2899 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2900 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2901 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
2902 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2903 } else {
2904 LLVMAtomicRMWBinOp op;
2905 switch (instr->intrinsic) {
2906 case nir_intrinsic_shared_atomic_add:
2907 case nir_intrinsic_deref_atomic_add:
2908 op = LLVMAtomicRMWBinOpAdd;
2909 break;
2910 case nir_intrinsic_shared_atomic_umin:
2911 case nir_intrinsic_deref_atomic_umin:
2912 op = LLVMAtomicRMWBinOpUMin;
2913 break;
2914 case nir_intrinsic_shared_atomic_umax:
2915 case nir_intrinsic_deref_atomic_umax:
2916 op = LLVMAtomicRMWBinOpUMax;
2917 break;
2918 case nir_intrinsic_shared_atomic_imin:
2919 case nir_intrinsic_deref_atomic_imin:
2920 op = LLVMAtomicRMWBinOpMin;
2921 break;
2922 case nir_intrinsic_shared_atomic_imax:
2923 case nir_intrinsic_deref_atomic_imax:
2924 op = LLVMAtomicRMWBinOpMax;
2925 break;
2926 case nir_intrinsic_shared_atomic_and:
2927 case nir_intrinsic_deref_atomic_and:
2928 op = LLVMAtomicRMWBinOpAnd;
2929 break;
2930 case nir_intrinsic_shared_atomic_or:
2931 case nir_intrinsic_deref_atomic_or:
2932 op = LLVMAtomicRMWBinOpOr;
2933 break;
2934 case nir_intrinsic_shared_atomic_xor:
2935 case nir_intrinsic_deref_atomic_xor:
2936 op = LLVMAtomicRMWBinOpXor;
2937 break;
2938 case nir_intrinsic_shared_atomic_exchange:
2939 case nir_intrinsic_deref_atomic_exchange:
2940 op = LLVMAtomicRMWBinOpXchg;
2941 break;
2942 default:
2943 return NULL;
2944 }
2945
2946 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
2947 }
2948 return result;
2949 }
2950
2951 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
2952 {
2953 LLVMValueRef values[2];
2954 LLVMValueRef pos[2];
2955
2956 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
2957 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
2958
2959 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
2960 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
2961 return ac_build_gather_values(&ctx->ac, values, 2);
2962 }
2963
2964 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
2965 unsigned mode)
2966 {
2967 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTER);
2968 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
2969 }
2970
2971 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
2972 unsigned mode,
2973 LLVMValueRef offset)
2974 {
2975 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTER);
2976 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
2977 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
2978
2979 LLVMValueRef ij_out[2];
2980 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
2981
2982 /*
2983 * take the I then J parameters, and the DDX/Y for it, and
2984 * calculate the IJ inputs for the interpolator.
2985 * temp1 = ddx * offset/sample.x + I;
2986 * interp_param.I = ddy * offset/sample.y + temp1;
2987 * temp1 = ddx * offset/sample.x + J;
2988 * interp_param.J = ddy * offset/sample.y + temp1;
2989 */
2990 for (unsigned i = 0; i < 2; i++) {
2991 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
2992 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
2993 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
2994 ddxy_out, ix_ll, "");
2995 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
2996 ddxy_out, iy_ll, "");
2997 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
2998 interp_param, ix_ll, "");
2999 LLVMValueRef temp1, temp2;
3000
3001 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3002 ctx->ac.f32, "");
3003
3004 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3005 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3006
3007 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3008 temp2, ctx->ac.i32, "");
3009 }
3010 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3011 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3012 }
3013
3014 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3015 unsigned mode)
3016 {
3017 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTROID);
3018 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3019 }
3020
3021 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3022 unsigned mode,
3023 LLVMValueRef sample_id)
3024 {
3025 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3026
3027 /* fetch sample ID */
3028 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3029
3030 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3031 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3032 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3033 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3034 LLVMValueRef coords[] = { src_c0, src_c1 };
3035 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3036
3037 return barycentric_offset(ctx, mode, offset);
3038 }
3039
3040
3041 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3042 unsigned mode)
3043 {
3044 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_SAMPLE);
3045 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3046 }
3047
3048 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3049 LLVMValueRef interp_param,
3050 unsigned index, unsigned comp_start,
3051 unsigned num_components,
3052 unsigned bitsize)
3053 {
3054 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3055
3056 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3057 interp_param, ctx->ac.v2f32, "");
3058 LLVMValueRef i = LLVMBuildExtractElement(
3059 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3060 LLVMValueRef j = LLVMBuildExtractElement(
3061 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3062
3063 LLVMValueRef values[4];
3064 assert(bitsize == 16 || bitsize == 32);
3065 for (unsigned comp = 0; comp < num_components; comp++) {
3066 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3067 if (bitsize == 16) {
3068 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3069 ctx->abi->prim_mask, i, j);
3070 } else {
3071 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3072 ctx->abi->prim_mask, i, j);
3073 }
3074 }
3075
3076 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3077 }
3078
3079 static LLVMValueRef load_flat_input(struct ac_nir_context *ctx,
3080 unsigned index, unsigned comp_start,
3081 unsigned num_components,
3082 unsigned bit_size)
3083 {
3084 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3085
3086 LLVMValueRef values[8];
3087
3088 /* Each component of a 64-bit value takes up two GL-level channels. */
3089 unsigned channels =
3090 bit_size == 64 ? num_components * 2 : num_components;
3091
3092 for (unsigned chan = 0; chan < channels; chan++) {
3093 if (comp_start + chan > 4)
3094 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3095 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (comp_start + chan) % 4, false);
3096 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3097 LLVMConstInt(ctx->ac.i32, 2, false),
3098 llvm_chan,
3099 attr_number,
3100 ctx->abi->prim_mask);
3101 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3102 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3103 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3104 }
3105
3106 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3107 if (bit_size == 64) {
3108 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3109 LLVMVectorType(ctx->ac.i64, num_components);
3110 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3111 }
3112 return result;
3113 }
3114
3115 static void visit_intrinsic(struct ac_nir_context *ctx,
3116 nir_intrinsic_instr *instr)
3117 {
3118 LLVMValueRef result = NULL;
3119
3120 switch (instr->intrinsic) {
3121 case nir_intrinsic_ballot:
3122 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3123 break;
3124 case nir_intrinsic_read_invocation:
3125 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3126 get_src(ctx, instr->src[1]));
3127 break;
3128 case nir_intrinsic_read_first_invocation:
3129 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3130 break;
3131 case nir_intrinsic_load_subgroup_invocation:
3132 result = ac_get_thread_id(&ctx->ac);
3133 break;
3134 case nir_intrinsic_load_work_group_id: {
3135 LLVMValueRef values[3];
3136
3137 for (int i = 0; i < 3; i++) {
3138 values[i] = ctx->abi->workgroup_ids[i] ?
3139 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3140 }
3141
3142 result = ac_build_gather_values(&ctx->ac, values, 3);
3143 break;
3144 }
3145 case nir_intrinsic_load_base_vertex:
3146 case nir_intrinsic_load_first_vertex:
3147 result = ctx->abi->load_base_vertex(ctx->abi);
3148 break;
3149 case nir_intrinsic_load_local_group_size:
3150 result = ctx->abi->load_local_group_size(ctx->abi);
3151 break;
3152 case nir_intrinsic_load_vertex_id:
3153 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3154 ctx->abi->base_vertex, "");
3155 break;
3156 case nir_intrinsic_load_vertex_id_zero_base: {
3157 result = ctx->abi->vertex_id;
3158 break;
3159 }
3160 case nir_intrinsic_load_local_invocation_id: {
3161 result = ctx->abi->local_invocation_ids;
3162 break;
3163 }
3164 case nir_intrinsic_load_base_instance:
3165 result = ctx->abi->start_instance;
3166 break;
3167 case nir_intrinsic_load_draw_id:
3168 result = ctx->abi->draw_id;
3169 break;
3170 case nir_intrinsic_load_view_index:
3171 result = ctx->abi->view_index;
3172 break;
3173 case nir_intrinsic_load_invocation_id:
3174 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3175 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3176 } else {
3177 if (ctx->ac.chip_class >= GFX10) {
3178 result = LLVMBuildAnd(ctx->ac.builder,
3179 ctx->abi->gs_invocation_id,
3180 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3181 } else {
3182 result = ctx->abi->gs_invocation_id;
3183 }
3184 }
3185 break;
3186 case nir_intrinsic_load_primitive_id:
3187 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3188 result = ctx->abi->gs_prim_id;
3189 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3190 result = ctx->abi->tcs_patch_id;
3191 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3192 result = ctx->abi->tes_patch_id;
3193 } else
3194 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3195 break;
3196 case nir_intrinsic_load_sample_id:
3197 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3198 break;
3199 case nir_intrinsic_load_sample_pos:
3200 result = load_sample_pos(ctx);
3201 break;
3202 case nir_intrinsic_load_sample_mask_in:
3203 result = ctx->abi->load_sample_mask_in(ctx->abi);
3204 break;
3205 case nir_intrinsic_load_frag_coord: {
3206 LLVMValueRef values[4] = {
3207 ctx->abi->frag_pos[0],
3208 ctx->abi->frag_pos[1],
3209 ctx->abi->frag_pos[2],
3210 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3211 };
3212 result = ac_to_integer(&ctx->ac,
3213 ac_build_gather_values(&ctx->ac, values, 4));
3214 break;
3215 }
3216 case nir_intrinsic_load_layer_id:
3217 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3218 break;
3219 case nir_intrinsic_load_front_face:
3220 result = ctx->abi->front_face;
3221 break;
3222 case nir_intrinsic_load_helper_invocation:
3223 result = ac_build_load_helper_invocation(&ctx->ac);
3224 break;
3225 case nir_intrinsic_load_color0:
3226 result = ctx->abi->color0;
3227 break;
3228 case nir_intrinsic_load_color1:
3229 result = ctx->abi->color1;
3230 break;
3231 case nir_intrinsic_load_instance_id:
3232 result = ctx->abi->instance_id;
3233 break;
3234 case nir_intrinsic_load_num_work_groups:
3235 result = ctx->abi->num_work_groups;
3236 break;
3237 case nir_intrinsic_load_local_invocation_index:
3238 result = visit_load_local_invocation_index(ctx);
3239 break;
3240 case nir_intrinsic_load_subgroup_id:
3241 result = visit_load_subgroup_id(ctx);
3242 break;
3243 case nir_intrinsic_load_num_subgroups:
3244 result = visit_load_num_subgroups(ctx);
3245 break;
3246 case nir_intrinsic_first_invocation:
3247 result = visit_first_invocation(ctx);
3248 break;
3249 case nir_intrinsic_load_push_constant:
3250 result = visit_load_push_constant(ctx, instr);
3251 break;
3252 case nir_intrinsic_vulkan_resource_index: {
3253 LLVMValueRef index = get_src(ctx, instr->src[0]);
3254 unsigned desc_set = nir_intrinsic_desc_set(instr);
3255 unsigned binding = nir_intrinsic_binding(instr);
3256
3257 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3258 binding);
3259 break;
3260 }
3261 case nir_intrinsic_vulkan_resource_reindex:
3262 result = visit_vulkan_resource_reindex(ctx, instr);
3263 break;
3264 case nir_intrinsic_store_ssbo:
3265 visit_store_ssbo(ctx, instr);
3266 break;
3267 case nir_intrinsic_load_ssbo:
3268 result = visit_load_buffer(ctx, instr);
3269 break;
3270 case nir_intrinsic_ssbo_atomic_add:
3271 case nir_intrinsic_ssbo_atomic_imin:
3272 case nir_intrinsic_ssbo_atomic_umin:
3273 case nir_intrinsic_ssbo_atomic_imax:
3274 case nir_intrinsic_ssbo_atomic_umax:
3275 case nir_intrinsic_ssbo_atomic_and:
3276 case nir_intrinsic_ssbo_atomic_or:
3277 case nir_intrinsic_ssbo_atomic_xor:
3278 case nir_intrinsic_ssbo_atomic_exchange:
3279 case nir_intrinsic_ssbo_atomic_comp_swap:
3280 result = visit_atomic_ssbo(ctx, instr);
3281 break;
3282 case nir_intrinsic_load_ubo:
3283 result = visit_load_ubo_buffer(ctx, instr);
3284 break;
3285 case nir_intrinsic_get_buffer_size:
3286 result = visit_get_buffer_size(ctx, instr);
3287 break;
3288 case nir_intrinsic_load_deref:
3289 result = visit_load_var(ctx, instr);
3290 break;
3291 case nir_intrinsic_store_deref:
3292 visit_store_var(ctx, instr);
3293 break;
3294 case nir_intrinsic_load_shared:
3295 result = visit_load_shared(ctx, instr);
3296 break;
3297 case nir_intrinsic_store_shared:
3298 visit_store_shared(ctx, instr);
3299 break;
3300 case nir_intrinsic_bindless_image_samples:
3301 result = visit_image_samples(ctx, instr, true);
3302 break;
3303 case nir_intrinsic_image_deref_samples:
3304 result = visit_image_samples(ctx, instr, false);
3305 break;
3306 case nir_intrinsic_bindless_image_load:
3307 result = visit_image_load(ctx, instr, true);
3308 break;
3309 case nir_intrinsic_image_deref_load:
3310 result = visit_image_load(ctx, instr, false);
3311 break;
3312 case nir_intrinsic_bindless_image_store:
3313 visit_image_store(ctx, instr, true);
3314 break;
3315 case nir_intrinsic_image_deref_store:
3316 visit_image_store(ctx, instr, false);
3317 break;
3318 case nir_intrinsic_bindless_image_atomic_add:
3319 case nir_intrinsic_bindless_image_atomic_min:
3320 case nir_intrinsic_bindless_image_atomic_max:
3321 case nir_intrinsic_bindless_image_atomic_and:
3322 case nir_intrinsic_bindless_image_atomic_or:
3323 case nir_intrinsic_bindless_image_atomic_xor:
3324 case nir_intrinsic_bindless_image_atomic_exchange:
3325 case nir_intrinsic_bindless_image_atomic_comp_swap:
3326 result = visit_image_atomic(ctx, instr, true);
3327 break;
3328 case nir_intrinsic_image_deref_atomic_add:
3329 case nir_intrinsic_image_deref_atomic_min:
3330 case nir_intrinsic_image_deref_atomic_max:
3331 case nir_intrinsic_image_deref_atomic_and:
3332 case nir_intrinsic_image_deref_atomic_or:
3333 case nir_intrinsic_image_deref_atomic_xor:
3334 case nir_intrinsic_image_deref_atomic_exchange:
3335 case nir_intrinsic_image_deref_atomic_comp_swap:
3336 result = visit_image_atomic(ctx, instr, false);
3337 break;
3338 case nir_intrinsic_bindless_image_size:
3339 result = visit_image_size(ctx, instr, true);
3340 break;
3341 case nir_intrinsic_image_deref_size:
3342 result = visit_image_size(ctx, instr, false);
3343 break;
3344 case nir_intrinsic_shader_clock:
3345 result = ac_build_shader_clock(&ctx->ac);
3346 break;
3347 case nir_intrinsic_discard:
3348 case nir_intrinsic_discard_if:
3349 emit_discard(ctx, instr);
3350 break;
3351 case nir_intrinsic_memory_barrier:
3352 case nir_intrinsic_group_memory_barrier:
3353 case nir_intrinsic_memory_barrier_atomic_counter:
3354 case nir_intrinsic_memory_barrier_buffer:
3355 case nir_intrinsic_memory_barrier_image:
3356 case nir_intrinsic_memory_barrier_shared:
3357 emit_membar(&ctx->ac, instr);
3358 break;
3359 case nir_intrinsic_barrier:
3360 ac_emit_barrier(&ctx->ac, ctx->stage);
3361 break;
3362 case nir_intrinsic_shared_atomic_add:
3363 case nir_intrinsic_shared_atomic_imin:
3364 case nir_intrinsic_shared_atomic_umin:
3365 case nir_intrinsic_shared_atomic_imax:
3366 case nir_intrinsic_shared_atomic_umax:
3367 case nir_intrinsic_shared_atomic_and:
3368 case nir_intrinsic_shared_atomic_or:
3369 case nir_intrinsic_shared_atomic_xor:
3370 case nir_intrinsic_shared_atomic_exchange:
3371 case nir_intrinsic_shared_atomic_comp_swap: {
3372 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3373 result = visit_var_atomic(ctx, instr, ptr, 1);
3374 break;
3375 }
3376 case nir_intrinsic_deref_atomic_add:
3377 case nir_intrinsic_deref_atomic_imin:
3378 case nir_intrinsic_deref_atomic_umin:
3379 case nir_intrinsic_deref_atomic_imax:
3380 case nir_intrinsic_deref_atomic_umax:
3381 case nir_intrinsic_deref_atomic_and:
3382 case nir_intrinsic_deref_atomic_or:
3383 case nir_intrinsic_deref_atomic_xor:
3384 case nir_intrinsic_deref_atomic_exchange:
3385 case nir_intrinsic_deref_atomic_comp_swap: {
3386 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3387 result = visit_var_atomic(ctx, instr, ptr, 1);
3388 break;
3389 }
3390 case nir_intrinsic_load_barycentric_pixel:
3391 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3392 break;
3393 case nir_intrinsic_load_barycentric_centroid:
3394 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3395 break;
3396 case nir_intrinsic_load_barycentric_sample:
3397 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3398 break;
3399 case nir_intrinsic_load_barycentric_at_offset: {
3400 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3401 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3402 break;
3403 }
3404 case nir_intrinsic_load_barycentric_at_sample: {
3405 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3406 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3407 break;
3408 }
3409 case nir_intrinsic_load_interpolated_input: {
3410 /* We assume any indirect loads have been lowered away */
3411 MAYBE_UNUSED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3412 assert(offset);
3413 assert(offset[0].i32 == 0);
3414
3415 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3416 unsigned index = nir_intrinsic_base(instr);
3417 unsigned component = nir_intrinsic_component(instr);
3418 result = load_interpolated_input(ctx, interp_param, index,
3419 component,
3420 instr->dest.ssa.num_components,
3421 instr->dest.ssa.bit_size);
3422 break;
3423 }
3424 case nir_intrinsic_load_input: {
3425 /* We only lower inputs for fragment shaders ATM */
3426 MAYBE_UNUSED nir_const_value *offset = nir_src_as_const_value(instr->src[0]);
3427 assert(offset);
3428 assert(offset[0].i32 == 0);
3429
3430 unsigned index = nir_intrinsic_base(instr);
3431 unsigned component = nir_intrinsic_component(instr);
3432 result = load_flat_input(ctx, index, component,
3433 instr->dest.ssa.num_components,
3434 instr->dest.ssa.bit_size);
3435 break;
3436 }
3437 case nir_intrinsic_emit_vertex:
3438 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3439 break;
3440 case nir_intrinsic_end_primitive:
3441 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3442 break;
3443 case nir_intrinsic_load_tess_coord:
3444 result = ctx->abi->load_tess_coord(ctx->abi);
3445 break;
3446 case nir_intrinsic_load_tess_level_outer:
3447 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
3448 break;
3449 case nir_intrinsic_load_tess_level_inner:
3450 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
3451 break;
3452 case nir_intrinsic_load_patch_vertices_in:
3453 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3454 break;
3455 case nir_intrinsic_vote_all: {
3456 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3457 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3458 break;
3459 }
3460 case nir_intrinsic_vote_any: {
3461 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3462 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3463 break;
3464 }
3465 case nir_intrinsic_shuffle:
3466 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3467 get_src(ctx, instr->src[1]));
3468 break;
3469 case nir_intrinsic_reduce:
3470 result = ac_build_reduce(&ctx->ac,
3471 get_src(ctx, instr->src[0]),
3472 instr->const_index[0],
3473 instr->const_index[1]);
3474 break;
3475 case nir_intrinsic_inclusive_scan:
3476 result = ac_build_inclusive_scan(&ctx->ac,
3477 get_src(ctx, instr->src[0]),
3478 instr->const_index[0]);
3479 break;
3480 case nir_intrinsic_exclusive_scan:
3481 result = ac_build_exclusive_scan(&ctx->ac,
3482 get_src(ctx, instr->src[0]),
3483 instr->const_index[0]);
3484 break;
3485 case nir_intrinsic_quad_broadcast: {
3486 unsigned lane = nir_src_as_uint(instr->src[1]);
3487 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3488 lane, lane, lane, lane);
3489 break;
3490 }
3491 case nir_intrinsic_quad_swap_horizontal:
3492 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3493 break;
3494 case nir_intrinsic_quad_swap_vertical:
3495 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3496 break;
3497 case nir_intrinsic_quad_swap_diagonal:
3498 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3499 break;
3500 case nir_intrinsic_quad_swizzle_amd: {
3501 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3502 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3503 mask & 0x3, (mask >> 2) & 0x3,
3504 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3505 break;
3506 }
3507 case nir_intrinsic_masked_swizzle_amd: {
3508 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3509 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3510 break;
3511 }
3512 case nir_intrinsic_write_invocation_amd:
3513 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3514 get_src(ctx, instr->src[1]),
3515 get_src(ctx, instr->src[2]));
3516 break;
3517 case nir_intrinsic_mbcnt_amd:
3518 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3519 break;
3520 default:
3521 fprintf(stderr, "Unknown intrinsic: ");
3522 nir_print_instr(&instr->instr, stderr);
3523 fprintf(stderr, "\n");
3524 break;
3525 }
3526 if (result) {
3527 ctx->ssa_defs[instr->dest.ssa.index] = result;
3528 }
3529 }
3530
3531 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3532 unsigned base_index,
3533 unsigned constant_index,
3534 LLVMValueRef dynamic_index)
3535 {
3536 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3537 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3538 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3539
3540 /* Bindless uniforms are 64bit so multiple index by 8 */
3541 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3542 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3543
3544 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3545
3546 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3547 NULL, 0, 0, true, true);
3548
3549 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3550 }
3551
3552 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3553 nir_deref_instr *deref_instr,
3554 enum ac_descriptor_type desc_type,
3555 const nir_instr *instr,
3556 bool image, bool write)
3557 {
3558 LLVMValueRef index = NULL;
3559 unsigned constant_index = 0;
3560 unsigned descriptor_set;
3561 unsigned base_index;
3562 bool bindless = false;
3563
3564 if (!deref_instr) {
3565 descriptor_set = 0;
3566 if (image) {
3567 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3568 base_index = 0;
3569 bindless = true;
3570 index = get_src(ctx, img_instr->src[0]);
3571 } else {
3572 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3573 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3574 nir_tex_src_sampler_handle);
3575 if (sampSrcIdx != -1) {
3576 base_index = 0;
3577 bindless = true;
3578 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3579 } else {
3580 assert(tex_instr && !image);
3581 base_index = tex_instr->sampler_index;
3582 }
3583 }
3584 } else {
3585 while(deref_instr->deref_type != nir_deref_type_var) {
3586 if (deref_instr->deref_type == nir_deref_type_array) {
3587 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3588 if (!array_size)
3589 array_size = 1;
3590
3591 if (nir_src_is_const(deref_instr->arr.index)) {
3592 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3593 } else {
3594 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3595
3596 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3597 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3598
3599 if (!index)
3600 index = indirect;
3601 else
3602 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3603 }
3604
3605 deref_instr = nir_src_as_deref(deref_instr->parent);
3606 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3607 unsigned sidx = deref_instr->strct.index;
3608 deref_instr = nir_src_as_deref(deref_instr->parent);
3609 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3610 } else {
3611 unreachable("Unsupported deref type");
3612 }
3613 }
3614 descriptor_set = deref_instr->var->data.descriptor_set;
3615
3616 if (deref_instr->var->data.bindless) {
3617 /* For now just assert on unhandled variable types */
3618 assert(deref_instr->var->data.mode == nir_var_uniform);
3619
3620 base_index = deref_instr->var->data.driver_location;
3621 bindless = true;
3622
3623 index = index ? index : ctx->ac.i32_0;
3624 index = get_bindless_index_from_uniform(ctx, base_index,
3625 constant_index, index);
3626 } else
3627 base_index = deref_instr->var->data.binding;
3628 }
3629
3630 return ctx->abi->load_sampler_desc(ctx->abi,
3631 descriptor_set,
3632 base_index,
3633 constant_index, index,
3634 desc_type, image, write, bindless);
3635 }
3636
3637 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3638 *
3639 * GFX6-GFX7:
3640 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3641 * filtering manually. The driver sets img7 to a mask clearing
3642 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3643 * s_and_b32 samp0, samp0, img7
3644 *
3645 * GFX8:
3646 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3647 */
3648 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3649 LLVMValueRef res, LLVMValueRef samp)
3650 {
3651 LLVMBuilderRef builder = ctx->ac.builder;
3652 LLVMValueRef img7, samp0;
3653
3654 if (ctx->ac.chip_class >= GFX8)
3655 return samp;
3656
3657 img7 = LLVMBuildExtractElement(builder, res,
3658 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3659 samp0 = LLVMBuildExtractElement(builder, samp,
3660 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3661 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3662 return LLVMBuildInsertElement(builder, samp, samp0,
3663 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3664 }
3665
3666 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3667 nir_tex_instr *instr,
3668 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3669 LLVMValueRef *fmask_ptr)
3670 {
3671 nir_deref_instr *texture_deref_instr = NULL;
3672 nir_deref_instr *sampler_deref_instr = NULL;
3673 int plane = -1;
3674
3675 for (unsigned i = 0; i < instr->num_srcs; i++) {
3676 switch (instr->src[i].src_type) {
3677 case nir_tex_src_texture_deref:
3678 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3679 break;
3680 case nir_tex_src_sampler_deref:
3681 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3682 break;
3683 case nir_tex_src_plane:
3684 plane = nir_src_as_int(instr->src[i].src);
3685 break;
3686 default:
3687 break;
3688 }
3689 }
3690
3691 if (!sampler_deref_instr)
3692 sampler_deref_instr = texture_deref_instr;
3693
3694 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3695
3696 if (plane >= 0) {
3697 assert(instr->op != nir_texop_txf_ms &&
3698 instr->op != nir_texop_samples_identical);
3699 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3700
3701 main_descriptor = AC_DESC_PLANE_0 + plane;
3702 }
3703
3704 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3705
3706 if (samp_ptr) {
3707 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3708 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3709 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3710 }
3711 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3712 instr->op == nir_texop_samples_identical))
3713 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3714 }
3715
3716 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3717 LLVMValueRef coord)
3718 {
3719 coord = ac_to_float(ctx, coord);
3720 coord = ac_build_round(ctx, coord);
3721 coord = ac_to_integer(ctx, coord);
3722 return coord;
3723 }
3724
3725 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3726 {
3727 LLVMValueRef result = NULL;
3728 struct ac_image_args args = { 0 };
3729 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3730 LLVMValueRef ddx = NULL, ddy = NULL;
3731 unsigned offset_src = 0;
3732
3733 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3734
3735 for (unsigned i = 0; i < instr->num_srcs; i++) {
3736 switch (instr->src[i].src_type) {
3737 case nir_tex_src_coord: {
3738 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3739 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3740 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3741 break;
3742 }
3743 case nir_tex_src_projector:
3744 break;
3745 case nir_tex_src_comparator:
3746 if (instr->is_shadow)
3747 args.compare = get_src(ctx, instr->src[i].src);
3748 break;
3749 case nir_tex_src_offset:
3750 args.offset = get_src(ctx, instr->src[i].src);
3751 offset_src = i;
3752 break;
3753 case nir_tex_src_bias:
3754 if (instr->op == nir_texop_txb)
3755 args.bias = get_src(ctx, instr->src[i].src);
3756 break;
3757 case nir_tex_src_lod: {
3758 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
3759 args.level_zero = true;
3760 else
3761 args.lod = get_src(ctx, instr->src[i].src);
3762 break;
3763 }
3764 case nir_tex_src_ms_index:
3765 sample_index = get_src(ctx, instr->src[i].src);
3766 break;
3767 case nir_tex_src_ms_mcs:
3768 break;
3769 case nir_tex_src_ddx:
3770 ddx = get_src(ctx, instr->src[i].src);
3771 break;
3772 case nir_tex_src_ddy:
3773 ddy = get_src(ctx, instr->src[i].src);
3774 break;
3775 case nir_tex_src_texture_offset:
3776 case nir_tex_src_sampler_offset:
3777 case nir_tex_src_plane:
3778 default:
3779 break;
3780 }
3781 }
3782
3783 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3784 result = get_buffer_size(ctx, args.resource, true);
3785 goto write_result;
3786 }
3787
3788 if (instr->op == nir_texop_texture_samples) {
3789 LLVMValueRef res, samples, is_msaa;
3790 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3791 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3792 LLVMConstInt(ctx->ac.i32, 3, false), "");
3793 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3794 LLVMConstInt(ctx->ac.i32, 28, false), "");
3795 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3796 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3797 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3798 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3799
3800 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3801 LLVMConstInt(ctx->ac.i32, 16, false), "");
3802 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3803 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3804 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3805 samples, "");
3806 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3807 ctx->ac.i32_1, "");
3808 result = samples;
3809 goto write_result;
3810 }
3811
3812 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3813 LLVMValueRef offset[3], pack;
3814 for (unsigned chan = 0; chan < 3; ++chan)
3815 offset[chan] = ctx->ac.i32_0;
3816
3817 unsigned num_components = ac_get_llvm_num_components(args.offset);
3818 for (unsigned chan = 0; chan < num_components; chan++) {
3819 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3820 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3821 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3822 if (chan)
3823 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3824 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3825 }
3826 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3827 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3828 args.offset = pack;
3829 }
3830
3831 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3832 * so the depth comparison value isn't clamped for Z16 and
3833 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has an explicitly
3834 * clamped 32-bit float format.
3835 *
3836 * It's unnecessary if the original texture format was
3837 * Z32_FLOAT, but we don't know that here.
3838 */
3839 if (args.compare &&
3840 ctx->ac.chip_class >= GFX8 &&
3841 ctx->ac.chip_class <= GFX9 &&
3842 ctx->abi->clamp_shadow_reference)
3843 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3844
3845 /* pack derivatives */
3846 if (ddx || ddy) {
3847 int num_src_deriv_channels, num_dest_deriv_channels;
3848 switch (instr->sampler_dim) {
3849 case GLSL_SAMPLER_DIM_3D:
3850 case GLSL_SAMPLER_DIM_CUBE:
3851 num_src_deriv_channels = 3;
3852 num_dest_deriv_channels = 3;
3853 break;
3854 case GLSL_SAMPLER_DIM_2D:
3855 default:
3856 num_src_deriv_channels = 2;
3857 num_dest_deriv_channels = 2;
3858 break;
3859 case GLSL_SAMPLER_DIM_1D:
3860 num_src_deriv_channels = 1;
3861 if (ctx->ac.chip_class == GFX9) {
3862 num_dest_deriv_channels = 2;
3863 } else {
3864 num_dest_deriv_channels = 1;
3865 }
3866 break;
3867 }
3868
3869 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3870 args.derivs[i] = ac_to_float(&ctx->ac,
3871 ac_llvm_extract_elem(&ctx->ac, ddx, i));
3872 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
3873 ac_llvm_extract_elem(&ctx->ac, ddy, i));
3874 }
3875 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3876 args.derivs[i] = ctx->ac.f32_0;
3877 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3878 }
3879 }
3880
3881 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
3882 for (unsigned chan = 0; chan < instr->coord_components; chan++)
3883 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
3884 if (instr->coord_components == 3)
3885 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
3886 ac_prepare_cube_coords(&ctx->ac,
3887 instr->op == nir_texop_txd, instr->is_array,
3888 instr->op == nir_texop_lod, args.coords, args.derivs);
3889 }
3890
3891 /* Texture coordinates fixups */
3892 if (instr->coord_components > 1 &&
3893 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3894 instr->is_array &&
3895 instr->op != nir_texop_txf) {
3896 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
3897 }
3898
3899 if (instr->coord_components > 2 &&
3900 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3901 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3902 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3903 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3904 instr->is_array &&
3905 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3906 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
3907 }
3908
3909 if (ctx->ac.chip_class == GFX9 &&
3910 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3911 instr->op != nir_texop_lod) {
3912 LLVMValueRef filler;
3913 if (instr->op == nir_texop_txf)
3914 filler = ctx->ac.i32_0;
3915 else
3916 filler = LLVMConstReal(ctx->ac.f32, 0.5);
3917
3918 if (instr->is_array)
3919 args.coords[2] = args.coords[1];
3920 args.coords[1] = filler;
3921 }
3922
3923 /* Pack sample index */
3924 if (instr->op == nir_texop_txf_ms && sample_index)
3925 args.coords[instr->coord_components] = sample_index;
3926
3927 if (instr->op == nir_texop_samples_identical) {
3928 struct ac_image_args txf_args = { 0 };
3929 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
3930
3931 txf_args.dmask = 0xf;
3932 txf_args.resource = fmask_ptr;
3933 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
3934 result = build_tex_intrinsic(ctx, instr, &txf_args);
3935
3936 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3937 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
3938 goto write_result;
3939 }
3940
3941 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
3942 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
3943 instr->op != nir_texop_txs) {
3944 unsigned sample_chan = instr->is_array ? 3 : 2;
3945 args.coords[sample_chan] = adjust_sample_index_using_fmask(
3946 &ctx->ac, args.coords[0], args.coords[1],
3947 instr->is_array ? args.coords[2] : NULL,
3948 args.coords[sample_chan], fmask_ptr);
3949 }
3950
3951 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
3952 int num_offsets = instr->src[offset_src].src.ssa->num_components;
3953 num_offsets = MIN2(num_offsets, instr->coord_components);
3954 for (unsigned i = 0; i < num_offsets; ++i) {
3955 args.coords[i] = LLVMBuildAdd(
3956 ctx->ac.builder, args.coords[i],
3957 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
3958 }
3959 args.offset = NULL;
3960 }
3961
3962 /* DMASK was repurposed for GATHER4. 4 components are always
3963 * returned and DMASK works like a swizzle - it selects
3964 * the component to fetch. The only valid DMASK values are
3965 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
3966 * (red,red,red,red) etc.) The ISA document doesn't mention
3967 * this.
3968 */
3969 args.dmask = 0xf;
3970 if (instr->op == nir_texop_tg4) {
3971 if (instr->is_shadow)
3972 args.dmask = 1;
3973 else
3974 args.dmask = 1 << instr->component;
3975 }
3976
3977 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
3978 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
3979 result = build_tex_intrinsic(ctx, instr, &args);
3980
3981 if (instr->op == nir_texop_query_levels)
3982 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
3983 else if (instr->is_shadow && instr->is_new_style_shadow &&
3984 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
3985 instr->op != nir_texop_tg4)
3986 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3987 else if (instr->op == nir_texop_txs &&
3988 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3989 instr->is_array) {
3990 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3991 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3992 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3993 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3994 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
3995 } else if (ctx->ac.chip_class == GFX9 &&
3996 instr->op == nir_texop_txs &&
3997 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3998 instr->is_array) {
3999 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4000 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4001 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4002 ctx->ac.i32_1, "");
4003 } else if (instr->dest.ssa.num_components != 4)
4004 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4005
4006 write_result:
4007 if (result) {
4008 assert(instr->dest.is_ssa);
4009 result = ac_to_integer(&ctx->ac, result);
4010 ctx->ssa_defs[instr->dest.ssa.index] = result;
4011 }
4012 }
4013
4014
4015 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4016 {
4017 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4018 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4019
4020 ctx->ssa_defs[instr->dest.ssa.index] = result;
4021 _mesa_hash_table_insert(ctx->phis, instr, result);
4022 }
4023
4024 static void visit_post_phi(struct ac_nir_context *ctx,
4025 nir_phi_instr *instr,
4026 LLVMValueRef llvm_phi)
4027 {
4028 nir_foreach_phi_src(src, instr) {
4029 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4030 LLVMValueRef llvm_src = get_src(ctx, src->src);
4031
4032 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4033 }
4034 }
4035
4036 static void phi_post_pass(struct ac_nir_context *ctx)
4037 {
4038 hash_table_foreach(ctx->phis, entry) {
4039 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4040 (LLVMValueRef)entry->data);
4041 }
4042 }
4043
4044
4045 static void visit_ssa_undef(struct ac_nir_context *ctx,
4046 const nir_ssa_undef_instr *instr)
4047 {
4048 unsigned num_components = instr->def.num_components;
4049 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4050 LLVMValueRef undef;
4051
4052 if (num_components == 1)
4053 undef = LLVMGetUndef(type);
4054 else {
4055 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4056 }
4057 ctx->ssa_defs[instr->def.index] = undef;
4058 }
4059
4060 static void visit_jump(struct ac_llvm_context *ctx,
4061 const nir_jump_instr *instr)
4062 {
4063 switch (instr->type) {
4064 case nir_jump_break:
4065 ac_build_break(ctx);
4066 break;
4067 case nir_jump_continue:
4068 ac_build_continue(ctx);
4069 break;
4070 default:
4071 fprintf(stderr, "Unknown NIR jump instr: ");
4072 nir_print_instr(&instr->instr, stderr);
4073 fprintf(stderr, "\n");
4074 abort();
4075 }
4076 }
4077
4078 static LLVMTypeRef
4079 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4080 enum glsl_base_type type)
4081 {
4082 switch (type) {
4083 case GLSL_TYPE_INT:
4084 case GLSL_TYPE_UINT:
4085 case GLSL_TYPE_BOOL:
4086 case GLSL_TYPE_SUBROUTINE:
4087 return ac->i32;
4088 case GLSL_TYPE_INT8:
4089 case GLSL_TYPE_UINT8:
4090 return ac->i8;
4091 case GLSL_TYPE_INT16:
4092 case GLSL_TYPE_UINT16:
4093 return ac->i16;
4094 case GLSL_TYPE_FLOAT:
4095 return ac->f32;
4096 case GLSL_TYPE_FLOAT16:
4097 return ac->f16;
4098 case GLSL_TYPE_INT64:
4099 case GLSL_TYPE_UINT64:
4100 return ac->i64;
4101 case GLSL_TYPE_DOUBLE:
4102 return ac->f64;
4103 default:
4104 unreachable("unknown GLSL type");
4105 }
4106 }
4107
4108 static LLVMTypeRef
4109 glsl_to_llvm_type(struct ac_llvm_context *ac,
4110 const struct glsl_type *type)
4111 {
4112 if (glsl_type_is_scalar(type)) {
4113 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4114 }
4115
4116 if (glsl_type_is_vector(type)) {
4117 return LLVMVectorType(
4118 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4119 glsl_get_vector_elements(type));
4120 }
4121
4122 if (glsl_type_is_matrix(type)) {
4123 return LLVMArrayType(
4124 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4125 glsl_get_matrix_columns(type));
4126 }
4127
4128 if (glsl_type_is_array(type)) {
4129 return LLVMArrayType(
4130 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4131 glsl_get_length(type));
4132 }
4133
4134 assert(glsl_type_is_struct_or_ifc(type));
4135
4136 LLVMTypeRef member_types[glsl_get_length(type)];
4137
4138 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4139 member_types[i] =
4140 glsl_to_llvm_type(ac,
4141 glsl_get_struct_field(type, i));
4142 }
4143
4144 return LLVMStructTypeInContext(ac->context, member_types,
4145 glsl_get_length(type), false);
4146 }
4147
4148 static void visit_deref(struct ac_nir_context *ctx,
4149 nir_deref_instr *instr)
4150 {
4151 if (instr->mode != nir_var_mem_shared &&
4152 instr->mode != nir_var_mem_global)
4153 return;
4154
4155 LLVMValueRef result = NULL;
4156 switch(instr->deref_type) {
4157 case nir_deref_type_var: {
4158 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4159 result = entry->data;
4160 break;
4161 }
4162 case nir_deref_type_struct:
4163 if (instr->mode == nir_var_mem_global) {
4164 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4165 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4166 instr->strct.index);
4167 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4168 LLVMConstInt(ctx->ac.i32, offset, 0));
4169 } else {
4170 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4171 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4172 }
4173 break;
4174 case nir_deref_type_array:
4175 if (instr->mode == nir_var_mem_global) {
4176 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4177 unsigned stride = glsl_get_explicit_stride(parent->type);
4178
4179 if ((glsl_type_is_matrix(parent->type) &&
4180 glsl_matrix_type_is_row_major(parent->type)) ||
4181 (glsl_type_is_vector(parent->type) && stride == 0))
4182 stride = type_scalar_size_bytes(parent->type);
4183
4184 assert(stride > 0);
4185 LLVMValueRef index = get_src(ctx, instr->arr.index);
4186 if (LLVMTypeOf(index) != ctx->ac.i64)
4187 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4188
4189 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4190
4191 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4192 } else {
4193 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4194 get_src(ctx, instr->arr.index));
4195 }
4196 break;
4197 case nir_deref_type_ptr_as_array:
4198 if (instr->mode == nir_var_mem_global) {
4199 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4200
4201 LLVMValueRef index = get_src(ctx, instr->arr.index);
4202 if (LLVMTypeOf(index) != ctx->ac.i64)
4203 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4204
4205 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4206
4207 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4208 } else {
4209 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4210 get_src(ctx, instr->arr.index));
4211 }
4212 break;
4213 case nir_deref_type_cast: {
4214 result = get_src(ctx, instr->parent);
4215
4216 /* We can't use the structs from LLVM because the shader
4217 * specifies its own offsets. */
4218 LLVMTypeRef pointee_type = ctx->ac.i8;
4219 if (instr->mode == nir_var_mem_shared)
4220 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4221
4222 unsigned address_space;
4223
4224 switch(instr->mode) {
4225 case nir_var_mem_shared:
4226 address_space = AC_ADDR_SPACE_LDS;
4227 break;
4228 case nir_var_mem_global:
4229 address_space = AC_ADDR_SPACE_GLOBAL;
4230 break;
4231 default:
4232 unreachable("Unhandled address space");
4233 }
4234
4235 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4236
4237 if (LLVMTypeOf(result) != type) {
4238 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4239 result = LLVMBuildBitCast(ctx->ac.builder, result,
4240 type, "");
4241 } else {
4242 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4243 type, "");
4244 }
4245 }
4246 break;
4247 }
4248 default:
4249 unreachable("Unhandled deref_instr deref type");
4250 }
4251
4252 ctx->ssa_defs[instr->dest.ssa.index] = result;
4253 }
4254
4255 static void visit_cf_list(struct ac_nir_context *ctx,
4256 struct exec_list *list);
4257
4258 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4259 {
4260 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->ac.builder);
4261 nir_foreach_instr(instr, block)
4262 {
4263 switch (instr->type) {
4264 case nir_instr_type_alu:
4265 visit_alu(ctx, nir_instr_as_alu(instr));
4266 break;
4267 case nir_instr_type_load_const:
4268 visit_load_const(ctx, nir_instr_as_load_const(instr));
4269 break;
4270 case nir_instr_type_intrinsic:
4271 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4272 break;
4273 case nir_instr_type_tex:
4274 visit_tex(ctx, nir_instr_as_tex(instr));
4275 break;
4276 case nir_instr_type_phi:
4277 visit_phi(ctx, nir_instr_as_phi(instr));
4278 break;
4279 case nir_instr_type_ssa_undef:
4280 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4281 break;
4282 case nir_instr_type_jump:
4283 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4284 break;
4285 case nir_instr_type_deref:
4286 visit_deref(ctx, nir_instr_as_deref(instr));
4287 break;
4288 default:
4289 fprintf(stderr, "Unknown NIR instr type: ");
4290 nir_print_instr(instr, stderr);
4291 fprintf(stderr, "\n");
4292 abort();
4293 }
4294 }
4295
4296 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
4297 }
4298
4299 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4300 {
4301 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4302
4303 nir_block *then_block =
4304 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4305
4306 ac_build_uif(&ctx->ac, value, then_block->index);
4307
4308 visit_cf_list(ctx, &if_stmt->then_list);
4309
4310 if (!exec_list_is_empty(&if_stmt->else_list)) {
4311 nir_block *else_block =
4312 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4313
4314 ac_build_else(&ctx->ac, else_block->index);
4315 visit_cf_list(ctx, &if_stmt->else_list);
4316 }
4317
4318 ac_build_endif(&ctx->ac, then_block->index);
4319 }
4320
4321 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4322 {
4323 nir_block *first_loop_block =
4324 (nir_block *) exec_list_get_head(&loop->body);
4325
4326 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4327
4328 visit_cf_list(ctx, &loop->body);
4329
4330 ac_build_endloop(&ctx->ac, first_loop_block->index);
4331 }
4332
4333 static void visit_cf_list(struct ac_nir_context *ctx,
4334 struct exec_list *list)
4335 {
4336 foreach_list_typed(nir_cf_node, node, node, list)
4337 {
4338 switch (node->type) {
4339 case nir_cf_node_block:
4340 visit_block(ctx, nir_cf_node_as_block(node));
4341 break;
4342
4343 case nir_cf_node_if:
4344 visit_if(ctx, nir_cf_node_as_if(node));
4345 break;
4346
4347 case nir_cf_node_loop:
4348 visit_loop(ctx, nir_cf_node_as_loop(node));
4349 break;
4350
4351 default:
4352 assert(0);
4353 }
4354 }
4355 }
4356
4357 void
4358 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4359 struct ac_shader_abi *abi,
4360 struct nir_shader *nir,
4361 struct nir_variable *variable,
4362 gl_shader_stage stage)
4363 {
4364 unsigned output_loc = variable->data.driver_location / 4;
4365 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4366
4367 /* tess ctrl has it's own load/store paths for outputs */
4368 if (stage == MESA_SHADER_TESS_CTRL)
4369 return;
4370
4371 if (stage == MESA_SHADER_VERTEX ||
4372 stage == MESA_SHADER_TESS_EVAL ||
4373 stage == MESA_SHADER_GEOMETRY) {
4374 int idx = variable->data.location + variable->data.index;
4375 if (idx == VARYING_SLOT_CLIP_DIST0) {
4376 int length = nir->info.clip_distance_array_size +
4377 nir->info.cull_distance_array_size;
4378
4379 if (length > 4)
4380 attrib_count = 2;
4381 else
4382 attrib_count = 1;
4383 }
4384 }
4385
4386 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4387 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4388 for (unsigned i = 0; i < attrib_count; ++i) {
4389 for (unsigned chan = 0; chan < 4; chan++) {
4390 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4391 ac_build_alloca_undef(ctx, type, "");
4392 }
4393 }
4394 }
4395
4396 static void
4397 setup_locals(struct ac_nir_context *ctx,
4398 struct nir_function *func)
4399 {
4400 int i, j;
4401 ctx->num_locals = 0;
4402 nir_foreach_variable(variable, &func->impl->locals) {
4403 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4404 variable->data.driver_location = ctx->num_locals * 4;
4405 variable->data.location_frac = 0;
4406 ctx->num_locals += attrib_count;
4407 }
4408 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4409 if (!ctx->locals)
4410 return;
4411
4412 for (i = 0; i < ctx->num_locals; i++) {
4413 for (j = 0; j < 4; j++) {
4414 ctx->locals[i * 4 + j] =
4415 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4416 }
4417 }
4418 }
4419
4420 static void
4421 setup_shared(struct ac_nir_context *ctx,
4422 struct nir_shader *nir)
4423 {
4424 nir_foreach_variable(variable, &nir->shared) {
4425 LLVMValueRef shared =
4426 LLVMAddGlobalInAddressSpace(
4427 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4428 variable->name ? variable->name : "",
4429 AC_ADDR_SPACE_LDS);
4430 _mesa_hash_table_insert(ctx->vars, variable, shared);
4431 }
4432 }
4433
4434 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4435 struct nir_shader *nir)
4436 {
4437 struct ac_nir_context ctx = {};
4438 struct nir_function *func;
4439
4440 ctx.ac = *ac;
4441 ctx.abi = abi;
4442
4443 ctx.stage = nir->info.stage;
4444 ctx.info = &nir->info;
4445
4446 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4447
4448 nir_foreach_variable(variable, &nir->outputs)
4449 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4450 ctx.stage);
4451
4452 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4453 _mesa_key_pointer_equal);
4454 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4455 _mesa_key_pointer_equal);
4456 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4457 _mesa_key_pointer_equal);
4458
4459 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4460
4461 nir_index_ssa_defs(func->impl);
4462 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4463
4464 setup_locals(&ctx, func);
4465
4466 if (gl_shader_stage_is_compute(nir->info.stage))
4467 setup_shared(&ctx, nir);
4468
4469 visit_cf_list(&ctx, &func->impl->body);
4470 phi_post_pass(&ctx);
4471
4472 if (!gl_shader_stage_is_compute(nir->info.stage))
4473 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4474 ctx.abi->outputs);
4475
4476 free(ctx.locals);
4477 free(ctx.ssa_defs);
4478 ralloc_free(ctx.defs);
4479 ralloc_free(ctx.phis);
4480 ralloc_free(ctx.vars);
4481 }
4482
4483 void
4484 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4485 {
4486 /* While it would be nice not to have this flag, we are constrained
4487 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
4488 */
4489 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
4490
4491 /* TODO: Indirect indexing of GS inputs is unimplemented.
4492 *
4493 * TCS and TES load inputs directly from LDS or offchip memory, so
4494 * indirect indexing is trivial.
4495 */
4496 nir_variable_mode indirect_mask = 0;
4497 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4498 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4499 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4500 !llvm_has_working_vgpr_indexing)) {
4501 indirect_mask |= nir_var_shader_in;
4502 }
4503 if (!llvm_has_working_vgpr_indexing &&
4504 nir->info.stage != MESA_SHADER_TESS_CTRL)
4505 indirect_mask |= nir_var_shader_out;
4506
4507 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4508 * smart enough to handle indirects without causing excess spilling
4509 * causing the gpu to hang.
4510 *
4511 * See the following thread for more details of the problem:
4512 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4513 */
4514 indirect_mask |= nir_var_function_temp;
4515
4516 nir_lower_indirect_derefs(nir, indirect_mask);
4517 }
4518
4519 static unsigned
4520 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4521 {
4522 if (intrin->intrinsic != nir_intrinsic_store_deref)
4523 return 0;
4524
4525 nir_variable *var =
4526 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4527
4528 if (var->data.mode != nir_var_shader_out)
4529 return 0;
4530
4531 unsigned writemask = 0;
4532 const int location = var->data.location;
4533 unsigned first_component = var->data.location_frac;
4534 unsigned num_comps = intrin->dest.ssa.num_components;
4535
4536 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4537 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4538 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4539 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4540
4541 return writemask;
4542 }
4543
4544 static void
4545 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4546 unsigned *cond_block_tf_writemask,
4547 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4548 {
4549 switch (cf_node->type) {
4550 case nir_cf_node_block: {
4551 nir_block *block = nir_cf_node_as_block(cf_node);
4552 nir_foreach_instr(instr, block) {
4553 if (instr->type != nir_instr_type_intrinsic)
4554 continue;
4555
4556 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4557 if (intrin->intrinsic == nir_intrinsic_barrier) {
4558
4559 /* If we find a barrier in nested control flow put this in the
4560 * too hard basket. In GLSL this is not possible but it is in
4561 * SPIR-V.
4562 */
4563 if (is_nested_cf) {
4564 *tessfactors_are_def_in_all_invocs = false;
4565 return;
4566 }
4567
4568 /* The following case must be prevented:
4569 * gl_TessLevelInner = ...;
4570 * barrier();
4571 * if (gl_InvocationID == 1)
4572 * gl_TessLevelInner = ...;
4573 *
4574 * If you consider disjoint code segments separated by barriers, each
4575 * such segment that writes tess factor channels should write the same
4576 * channels in all codepaths within that segment.
4577 */
4578 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4579 /* Accumulate the result: */
4580 *tessfactors_are_def_in_all_invocs &=
4581 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4582
4583 /* Analyze the next code segment from scratch. */
4584 *upper_block_tf_writemask = 0;
4585 *cond_block_tf_writemask = 0;
4586 }
4587 } else
4588 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4589 }
4590
4591 break;
4592 }
4593 case nir_cf_node_if: {
4594 unsigned then_tessfactor_writemask = 0;
4595 unsigned else_tessfactor_writemask = 0;
4596
4597 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4598 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4599 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4600 cond_block_tf_writemask,
4601 tessfactors_are_def_in_all_invocs, true);
4602 }
4603
4604 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4605 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4606 cond_block_tf_writemask,
4607 tessfactors_are_def_in_all_invocs, true);
4608 }
4609
4610 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4611 /* If both statements write the same tess factor channels,
4612 * we can say that the upper block writes them too.
4613 */
4614 *upper_block_tf_writemask |= then_tessfactor_writemask &
4615 else_tessfactor_writemask;
4616 *cond_block_tf_writemask |= then_tessfactor_writemask |
4617 else_tessfactor_writemask;
4618 }
4619
4620 break;
4621 }
4622 case nir_cf_node_loop: {
4623 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4624 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4625 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4626 cond_block_tf_writemask,
4627 tessfactors_are_def_in_all_invocs, true);
4628 }
4629
4630 break;
4631 }
4632 default:
4633 unreachable("unknown cf node type");
4634 }
4635 }
4636
4637 bool
4638 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4639 {
4640 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4641
4642 /* The pass works as follows:
4643 * If all codepaths write tess factors, we can say that all
4644 * invocations define tess factors.
4645 *
4646 * Each tess factor channel is tracked separately.
4647 */
4648 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4649 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4650
4651 /* Initial value = true. Here the pass will accumulate results from
4652 * multiple segments surrounded by barriers. If tess factors aren't
4653 * written at all, it's a shader bug and we don't care if this will be
4654 * true.
4655 */
4656 bool tessfactors_are_def_in_all_invocs = true;
4657
4658 nir_foreach_function(function, nir) {
4659 if (function->impl) {
4660 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4661 scan_tess_ctrl(node, &main_block_tf_writemask,
4662 &cond_block_tf_writemask,
4663 &tessfactors_are_def_in_all_invocs,
4664 false);
4665 }
4666 }
4667 }
4668
4669 /* Accumulate the result for the last code segment separated by a
4670 * barrier.
4671 */
4672 if (main_block_tf_writemask || cond_block_tf_writemask) {
4673 tessfactors_are_def_in_all_invocs &=
4674 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4675 }
4676
4677 return tessfactors_are_def_in_all_invocs;
4678 }