2 * Copyright © 2016 Bas Nieuwenhuizen
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
30 #include "../vulkan/radv_descriptor_set.h"
31 #include "util/bitscan.h"
32 #include <llvm-c/Transforms/Scalar.h>
33 #include "ac_shader_abi.h"
34 #include "ac_shader_info.h"
35 #include "ac_shader_util.h"
36 #include "ac_exp_param.h"
38 enum radeon_llvm_calling_convention
{
39 RADEON_LLVM_AMDGPU_VS
= 87,
40 RADEON_LLVM_AMDGPU_GS
= 88,
41 RADEON_LLVM_AMDGPU_PS
= 89,
42 RADEON_LLVM_AMDGPU_CS
= 90,
43 RADEON_LLVM_AMDGPU_HS
= 93,
46 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
47 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
49 struct nir_to_llvm_context
;
51 struct ac_nir_context
{
52 struct ac_llvm_context ac
;
53 struct ac_shader_abi
*abi
;
55 gl_shader_stage stage
;
57 struct hash_table
*defs
;
58 struct hash_table
*phis
;
59 struct hash_table
*vars
;
61 LLVMValueRef main_function
;
62 LLVMBasicBlockRef continue_block
;
63 LLVMBasicBlockRef break_block
;
65 LLVMValueRef outputs
[RADEON_LLVM_MAX_OUTPUTS
* 4];
70 struct nir_to_llvm_context
*nctx
; /* TODO get rid of this */
73 struct nir_to_llvm_context
{
74 struct ac_llvm_context ac
;
75 const struct ac_nir_compiler_options
*options
;
76 struct ac_shader_variant_info
*shader_info
;
77 struct ac_shader_abi abi
;
78 struct ac_nir_context
*nir
;
80 unsigned max_workgroup_size
;
81 LLVMContextRef context
;
83 LLVMBuilderRef builder
;
84 LLVMValueRef main_function
;
86 struct hash_table
*defs
;
87 struct hash_table
*phis
;
89 LLVMValueRef descriptor_sets
[AC_UD_MAX_SETS
];
90 LLVMValueRef ring_offsets
;
91 LLVMValueRef push_constants
;
92 LLVMValueRef view_index
;
93 LLVMValueRef num_work_groups
;
94 LLVMValueRef workgroup_ids
[3];
95 LLVMValueRef local_invocation_ids
;
98 LLVMValueRef vertex_buffers
;
99 LLVMValueRef rel_auto_id
;
100 LLVMValueRef vs_prim_id
;
101 LLVMValueRef ls_out_layout
;
102 LLVMValueRef es2gs_offset
;
104 LLVMValueRef tcs_offchip_layout
;
105 LLVMValueRef tcs_out_offsets
;
106 LLVMValueRef tcs_out_layout
;
107 LLVMValueRef tcs_in_layout
;
109 LLVMValueRef merged_wave_info
;
110 LLVMValueRef tess_factor_offset
;
111 LLVMValueRef tes_rel_patch_id
;
115 LLVMValueRef gsvs_ring_stride
;
116 LLVMValueRef gsvs_num_entries
;
117 LLVMValueRef gs2vs_offset
;
118 LLVMValueRef gs_wave_id
;
119 LLVMValueRef gs_vtx_offset
[6];
121 LLVMValueRef esgs_ring
;
122 LLVMValueRef gsvs_ring
;
123 LLVMValueRef hs_ring_tess_offchip
;
124 LLVMValueRef hs_ring_tess_factor
;
126 LLVMValueRef prim_mask
;
127 LLVMValueRef sample_pos_offset
;
128 LLVMValueRef persp_sample
, persp_center
, persp_centroid
;
129 LLVMValueRef linear_sample
, linear_center
, linear_centroid
;
131 gl_shader_stage stage
;
133 LLVMValueRef inputs
[RADEON_LLVM_MAX_INPUTS
* 4];
136 uint64_t output_mask
;
137 uint8_t num_output_clips
;
138 uint8_t num_output_culls
;
140 bool is_gs_copy_shader
;
141 LLVMValueRef gs_next_vertex
;
142 unsigned gs_max_out_vertices
;
144 unsigned tes_primitive_mode
;
145 uint64_t tess_outputs_written
;
146 uint64_t tess_patch_outputs_written
;
148 uint32_t tcs_patch_outputs_read
;
149 uint64_t tcs_outputs_read
;
152 static inline struct nir_to_llvm_context
*
153 nir_to_llvm_context_from_abi(struct ac_shader_abi
*abi
)
155 struct nir_to_llvm_context
*ctx
= NULL
;
156 return container_of(abi
, ctx
, abi
);
159 static LLVMValueRef
get_sampler_desc(struct ac_nir_context
*ctx
,
160 const nir_deref_var
*deref
,
161 enum ac_descriptor_type desc_type
,
162 const nir_tex_instr
*instr
,
163 bool image
, bool write
);
165 static unsigned radeon_llvm_reg_index_soa(unsigned index
, unsigned chan
)
167 return (index
* 4) + chan
;
170 static unsigned shader_io_get_unique_index(gl_varying_slot slot
)
172 /* handle patch indices separate */
173 if (slot
== VARYING_SLOT_TESS_LEVEL_OUTER
)
175 if (slot
== VARYING_SLOT_TESS_LEVEL_INNER
)
177 if (slot
>= VARYING_SLOT_PATCH0
&& slot
<= VARYING_SLOT_TESS_MAX
)
178 return 2 + (slot
- VARYING_SLOT_PATCH0
);
180 if (slot
== VARYING_SLOT_POS
)
182 if (slot
== VARYING_SLOT_PSIZ
)
184 if (slot
== VARYING_SLOT_CLIP_DIST0
)
186 /* 3 is reserved for clip dist as well */
187 if (slot
>= VARYING_SLOT_VAR0
&& slot
<= VARYING_SLOT_VAR31
)
188 return 4 + (slot
- VARYING_SLOT_VAR0
);
189 unreachable("illegal slot in get unique index\n");
192 static void set_llvm_calling_convention(LLVMValueRef func
,
193 gl_shader_stage stage
)
195 enum radeon_llvm_calling_convention calling_conv
;
198 case MESA_SHADER_VERTEX
:
199 case MESA_SHADER_TESS_EVAL
:
200 calling_conv
= RADEON_LLVM_AMDGPU_VS
;
202 case MESA_SHADER_GEOMETRY
:
203 calling_conv
= RADEON_LLVM_AMDGPU_GS
;
205 case MESA_SHADER_TESS_CTRL
:
206 calling_conv
= HAVE_LLVM
>= 0x0500 ? RADEON_LLVM_AMDGPU_HS
: RADEON_LLVM_AMDGPU_VS
;
208 case MESA_SHADER_FRAGMENT
:
209 calling_conv
= RADEON_LLVM_AMDGPU_PS
;
211 case MESA_SHADER_COMPUTE
:
212 calling_conv
= RADEON_LLVM_AMDGPU_CS
;
215 unreachable("Unhandle shader type");
218 LLVMSetFunctionCallConv(func
, calling_conv
);
223 LLVMTypeRef types
[MAX_ARGS
];
224 LLVMValueRef
*assign
[MAX_ARGS
];
225 unsigned array_params_mask
;
228 uint8_t num_sgprs_used
;
229 uint8_t num_vgprs_used
;
232 enum ac_arg_regfile
{
238 add_arg(struct arg_info
*info
, enum ac_arg_regfile regfile
, LLVMTypeRef type
,
239 LLVMValueRef
*param_ptr
)
241 assert(info
->count
< MAX_ARGS
);
243 info
->assign
[info
->count
] = param_ptr
;
244 info
->types
[info
->count
] = type
;
247 if (regfile
== ARG_SGPR
) {
248 info
->num_sgprs_used
+= ac_get_type_size(type
) / 4;
251 assert(regfile
== ARG_VGPR
);
252 info
->num_vgprs_used
+= ac_get_type_size(type
) / 4;
257 add_array_arg(struct arg_info
*info
, LLVMTypeRef type
, LLVMValueRef
*param_ptr
)
259 info
->array_params_mask
|= (1 << info
->count
);
260 add_arg(info
, ARG_SGPR
, type
, param_ptr
);
263 static void assign_arguments(LLVMValueRef main_function
,
264 struct arg_info
*info
)
267 for (i
= 0; i
< info
->count
; i
++) {
269 *info
->assign
[i
] = LLVMGetParam(main_function
, i
);
274 create_llvm_function(LLVMContextRef ctx
, LLVMModuleRef module
,
275 LLVMBuilderRef builder
, LLVMTypeRef
*return_types
,
276 unsigned num_return_elems
,
277 struct arg_info
*args
,
278 unsigned max_workgroup_size
,
281 LLVMTypeRef main_function_type
, ret_type
;
282 LLVMBasicBlockRef main_function_body
;
284 if (num_return_elems
)
285 ret_type
= LLVMStructTypeInContext(ctx
, return_types
,
286 num_return_elems
, true);
288 ret_type
= LLVMVoidTypeInContext(ctx
);
290 /* Setup the function */
292 LLVMFunctionType(ret_type
, args
->types
, args
->count
, 0);
293 LLVMValueRef main_function
=
294 LLVMAddFunction(module
, "main", main_function_type
);
296 LLVMAppendBasicBlockInContext(ctx
, main_function
, "main_body");
297 LLVMPositionBuilderAtEnd(builder
, main_function_body
);
299 LLVMSetFunctionCallConv(main_function
, RADEON_LLVM_AMDGPU_CS
);
300 for (unsigned i
= 0; i
< args
->sgpr_count
; ++i
) {
301 ac_add_function_attr(ctx
, main_function
, i
+ 1, AC_FUNC_ATTR_INREG
);
303 if (args
->array_params_mask
& (1 << i
)) {
304 LLVMValueRef P
= LLVMGetParam(main_function
, i
);
305 ac_add_function_attr(ctx
, main_function
, i
+ 1, AC_FUNC_ATTR_NOALIAS
);
306 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
310 if (max_workgroup_size
) {
311 ac_llvm_add_target_dep_function_attr(main_function
,
312 "amdgpu-max-work-group-size",
316 /* These were copied from some LLVM test. */
317 LLVMAddTargetDependentFunctionAttr(main_function
,
318 "less-precise-fpmad",
320 LLVMAddTargetDependentFunctionAttr(main_function
,
323 LLVMAddTargetDependentFunctionAttr(main_function
,
326 LLVMAddTargetDependentFunctionAttr(main_function
,
329 LLVMAddTargetDependentFunctionAttr(main_function
,
330 "no-signed-zeros-fp-math",
333 return main_function
;
336 static int get_elem_bits(struct ac_llvm_context
*ctx
, LLVMTypeRef type
)
338 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
339 type
= LLVMGetElementType(type
);
341 if (LLVMGetTypeKind(type
) == LLVMIntegerTypeKind
)
342 return LLVMGetIntTypeWidth(type
);
344 if (type
== ctx
->f16
)
346 if (type
== ctx
->f32
)
348 if (type
== ctx
->f64
)
351 unreachable("Unhandled type kind in get_elem_bits");
354 static LLVMValueRef
unpack_param(struct ac_llvm_context
*ctx
,
355 LLVMValueRef param
, unsigned rshift
,
358 LLVMValueRef value
= param
;
360 value
= LLVMBuildLShr(ctx
->builder
, value
,
361 LLVMConstInt(ctx
->i32
, rshift
, false), "");
363 if (rshift
+ bitwidth
< 32) {
364 unsigned mask
= (1 << bitwidth
) - 1;
365 value
= LLVMBuildAnd(ctx
->builder
, value
,
366 LLVMConstInt(ctx
->i32
, mask
, false), "");
371 static LLVMValueRef
get_rel_patch_id(struct nir_to_llvm_context
*ctx
)
373 switch (ctx
->stage
) {
374 case MESA_SHADER_TESS_CTRL
:
375 return unpack_param(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
, 0, 8);
376 case MESA_SHADER_TESS_EVAL
:
377 return ctx
->tes_rel_patch_id
;
380 unreachable("Illegal stage");
384 /* Tessellation shaders pass outputs to the next shader using LDS.
386 * LS outputs = TCS inputs
387 * TCS outputs = TES inputs
390 * - TCS inputs for patch 0
391 * - TCS inputs for patch 1
392 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
394 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
395 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
396 * - TCS outputs for patch 1
397 * - Per-patch TCS outputs for patch 1
398 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
399 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
402 * All three shaders VS(LS), TCS, TES share the same LDS space.
405 get_tcs_in_patch_stride(struct nir_to_llvm_context
*ctx
)
407 if (ctx
->stage
== MESA_SHADER_VERTEX
)
408 return unpack_param(&ctx
->ac
, ctx
->ls_out_layout
, 0, 13);
409 else if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
410 return unpack_param(&ctx
->ac
, ctx
->tcs_in_layout
, 0, 13);
418 get_tcs_out_patch_stride(struct nir_to_llvm_context
*ctx
)
420 return unpack_param(&ctx
->ac
, ctx
->tcs_out_layout
, 0, 13);
424 get_tcs_out_patch0_offset(struct nir_to_llvm_context
*ctx
)
426 return LLVMBuildMul(ctx
->builder
,
427 unpack_param(&ctx
->ac
, ctx
->tcs_out_offsets
, 0, 16),
428 LLVMConstInt(ctx
->ac
.i32
, 4, false), "");
432 get_tcs_out_patch0_patch_data_offset(struct nir_to_llvm_context
*ctx
)
434 return LLVMBuildMul(ctx
->builder
,
435 unpack_param(&ctx
->ac
, ctx
->tcs_out_offsets
, 16, 16),
436 LLVMConstInt(ctx
->ac
.i32
, 4, false), "");
440 get_tcs_in_current_patch_offset(struct nir_to_llvm_context
*ctx
)
442 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
443 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
445 return LLVMBuildMul(ctx
->builder
, patch_stride
, rel_patch_id
, "");
449 get_tcs_out_current_patch_offset(struct nir_to_llvm_context
*ctx
)
451 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
452 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
453 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
455 return LLVMBuildAdd(ctx
->builder
, patch0_offset
,
456 LLVMBuildMul(ctx
->builder
, patch_stride
,
462 get_tcs_out_current_patch_data_offset(struct nir_to_llvm_context
*ctx
)
464 LLVMValueRef patch0_patch_data_offset
=
465 get_tcs_out_patch0_patch_data_offset(ctx
);
466 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
467 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
469 return LLVMBuildAdd(ctx
->builder
, patch0_patch_data_offset
,
470 LLVMBuildMul(ctx
->builder
, patch_stride
,
476 set_loc(struct ac_userdata_info
*ud_info
, uint8_t *sgpr_idx
, uint8_t num_sgprs
,
477 uint32_t indirect_offset
)
479 ud_info
->sgpr_idx
= *sgpr_idx
;
480 ud_info
->num_sgprs
= num_sgprs
;
481 ud_info
->indirect
= indirect_offset
> 0;
482 ud_info
->indirect_offset
= indirect_offset
;
483 *sgpr_idx
+= num_sgprs
;
487 set_loc_shader(struct nir_to_llvm_context
*ctx
, int idx
, uint8_t *sgpr_idx
,
490 struct ac_userdata_info
*ud_info
=
491 &ctx
->shader_info
->user_sgprs_locs
.shader_data
[idx
];
494 set_loc(ud_info
, sgpr_idx
, num_sgprs
, 0);
498 set_loc_desc(struct nir_to_llvm_context
*ctx
, int idx
, uint8_t *sgpr_idx
,
499 uint32_t indirect_offset
)
501 struct ac_userdata_info
*ud_info
=
502 &ctx
->shader_info
->user_sgprs_locs
.descriptor_sets
[idx
];
505 set_loc(ud_info
, sgpr_idx
, 2, indirect_offset
);
508 struct user_sgpr_info
{
509 bool need_ring_offsets
;
511 bool indirect_all_descriptor_sets
;
514 static bool needs_view_index_sgpr(struct nir_to_llvm_context
*ctx
,
515 gl_shader_stage stage
)
518 case MESA_SHADER_VERTEX
:
519 if (ctx
->shader_info
->info
.needs_multiview_view_index
||
520 (!ctx
->options
->key
.vs
.as_es
&& !ctx
->options
->key
.vs
.as_ls
&& ctx
->options
->key
.has_multiview_view_index
))
523 case MESA_SHADER_TESS_EVAL
:
524 if (ctx
->shader_info
->info
.needs_multiview_view_index
|| (!ctx
->options
->key
.tes
.as_es
&& ctx
->options
->key
.has_multiview_view_index
))
527 case MESA_SHADER_GEOMETRY
:
528 case MESA_SHADER_TESS_CTRL
:
529 if (ctx
->shader_info
->info
.needs_multiview_view_index
)
538 static void allocate_user_sgprs(struct nir_to_llvm_context
*ctx
,
539 gl_shader_stage stage
,
540 bool needs_view_index
,
541 struct user_sgpr_info
*user_sgpr_info
)
543 memset(user_sgpr_info
, 0, sizeof(struct user_sgpr_info
));
545 /* until we sort out scratch/global buffers always assign ring offsets for gs/vs/es */
546 if (stage
== MESA_SHADER_GEOMETRY
||
547 stage
== MESA_SHADER_VERTEX
||
548 stage
== MESA_SHADER_TESS_CTRL
||
549 stage
== MESA_SHADER_TESS_EVAL
||
550 ctx
->is_gs_copy_shader
)
551 user_sgpr_info
->need_ring_offsets
= true;
553 if (stage
== MESA_SHADER_FRAGMENT
&&
554 ctx
->shader_info
->info
.ps
.needs_sample_positions
)
555 user_sgpr_info
->need_ring_offsets
= true;
557 /* 2 user sgprs will nearly always be allocated for scratch/rings */
558 if (ctx
->options
->supports_spill
|| user_sgpr_info
->need_ring_offsets
) {
559 user_sgpr_info
->sgpr_count
+= 2;
562 /* FIXME: fix the number of user sgprs for merged shaders on GFX9 */
564 case MESA_SHADER_COMPUTE
:
565 if (ctx
->shader_info
->info
.cs
.uses_grid_size
)
566 user_sgpr_info
->sgpr_count
+= 3;
568 case MESA_SHADER_FRAGMENT
:
569 user_sgpr_info
->sgpr_count
+= ctx
->shader_info
->info
.ps
.needs_sample_positions
;
571 case MESA_SHADER_VERTEX
:
572 if (!ctx
->is_gs_copy_shader
) {
573 user_sgpr_info
->sgpr_count
+= ctx
->shader_info
->info
.vs
.has_vertex_buffers
? 2 : 0;
574 if (ctx
->shader_info
->info
.vs
.needs_draw_id
) {
575 user_sgpr_info
->sgpr_count
+= 3;
577 user_sgpr_info
->sgpr_count
+= 2;
580 if (ctx
->options
->key
.vs
.as_ls
)
581 user_sgpr_info
->sgpr_count
++;
583 case MESA_SHADER_TESS_CTRL
:
584 user_sgpr_info
->sgpr_count
+= 4;
586 case MESA_SHADER_TESS_EVAL
:
587 user_sgpr_info
->sgpr_count
+= 1;
589 case MESA_SHADER_GEOMETRY
:
590 user_sgpr_info
->sgpr_count
+= 2;
596 if (needs_view_index
)
597 user_sgpr_info
->sgpr_count
++;
599 if (ctx
->shader_info
->info
.loads_push_constants
)
600 user_sgpr_info
->sgpr_count
+= 2;
602 uint32_t available_sgprs
= ctx
->options
->chip_class
>= GFX9
? 32 : 16;
603 uint32_t remaining_sgprs
= available_sgprs
- user_sgpr_info
->sgpr_count
;
605 if (remaining_sgprs
/ 2 < util_bitcount(ctx
->shader_info
->info
.desc_set_used_mask
)) {
606 user_sgpr_info
->sgpr_count
+= 2;
607 user_sgpr_info
->indirect_all_descriptor_sets
= true;
609 user_sgpr_info
->sgpr_count
+= util_bitcount(ctx
->shader_info
->info
.desc_set_used_mask
) * 2;
614 declare_global_input_sgprs(struct nir_to_llvm_context
*ctx
,
615 gl_shader_stage stage
,
616 bool has_previous_stage
,
617 gl_shader_stage previous_stage
,
618 const struct user_sgpr_info
*user_sgpr_info
,
619 struct arg_info
*args
,
620 LLVMValueRef
*desc_sets
)
622 LLVMTypeRef type
= ac_array_in_const_addr_space(ctx
->ac
.i8
);
623 unsigned num_sets
= ctx
->options
->layout
?
624 ctx
->options
->layout
->num_sets
: 0;
625 unsigned stage_mask
= 1 << stage
;
627 if (has_previous_stage
)
628 stage_mask
|= 1 << previous_stage
;
630 /* 1 for each descriptor set */
631 if (!user_sgpr_info
->indirect_all_descriptor_sets
) {
632 for (unsigned i
= 0; i
< num_sets
; ++i
) {
633 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& stage_mask
) {
634 add_array_arg(args
, type
,
635 &ctx
->descriptor_sets
[i
]);
639 add_array_arg(args
, ac_array_in_const_addr_space(type
), desc_sets
);
642 if (ctx
->shader_info
->info
.loads_push_constants
) {
643 /* 1 for push constants and dynamic descriptors */
644 add_array_arg(args
, type
, &ctx
->push_constants
);
649 declare_vs_specific_input_sgprs(struct nir_to_llvm_context
*ctx
,
650 gl_shader_stage stage
,
651 bool has_previous_stage
,
652 gl_shader_stage previous_stage
,
653 struct arg_info
*args
)
655 if (!ctx
->is_gs_copy_shader
&&
656 (stage
== MESA_SHADER_VERTEX
||
657 (has_previous_stage
&& previous_stage
== MESA_SHADER_VERTEX
))) {
658 if (ctx
->shader_info
->info
.vs
.has_vertex_buffers
) {
659 add_arg(args
, ARG_SGPR
, ac_array_in_const_addr_space(ctx
->ac
.v4i32
),
660 &ctx
->vertex_buffers
);
662 add_arg(args
, ARG_SGPR
, ctx
->ac
.i32
, &ctx
->abi
.base_vertex
);
663 add_arg(args
, ARG_SGPR
, ctx
->ac
.i32
, &ctx
->abi
.start_instance
);
664 if (ctx
->shader_info
->info
.vs
.needs_draw_id
) {
665 add_arg(args
, ARG_SGPR
, ctx
->ac
.i32
, &ctx
->abi
.draw_id
);
671 declare_vs_input_vgprs(struct nir_to_llvm_context
*ctx
, struct arg_info
*args
)
673 add_arg(args
, ARG_VGPR
, ctx
->ac
.i32
, &ctx
->abi
.vertex_id
);
674 if (!ctx
->is_gs_copy_shader
) {
675 if (ctx
->options
->key
.vs
.as_ls
) {
676 add_arg(args
, ARG_VGPR
, ctx
->ac
.i32
, &ctx
->rel_auto_id
);
677 add_arg(args
, ARG_VGPR
, ctx
->ac
.i32
, &ctx
->abi
.instance_id
);
679 add_arg(args
, ARG_VGPR
, ctx
->ac
.i32
, &ctx
->abi
.instance_id
);
680 add_arg(args
, ARG_VGPR
, ctx
->ac
.i32
, &ctx
->vs_prim_id
);
682 add_arg(args
, ARG_VGPR
, ctx
->ac
.i32
, NULL
); /* unused */
687 declare_tes_input_vgprs(struct nir_to_llvm_context
*ctx
, struct arg_info
*args
)
689 add_arg(args
, ARG_VGPR
, ctx
->ac
.f32
, &ctx
->tes_u
);
690 add_arg(args
, ARG_VGPR
, ctx
->ac
.f32
, &ctx
->tes_v
);
691 add_arg(args
, ARG_VGPR
, ctx
->ac
.i32
, &ctx
->tes_rel_patch_id
);
692 add_arg(args
, ARG_VGPR
, ctx
->ac
.i32
, &ctx
->abi
.tes_patch_id
);
696 set_global_input_locs(struct nir_to_llvm_context
*ctx
, gl_shader_stage stage
,
697 bool has_previous_stage
, gl_shader_stage previous_stage
,
698 const struct user_sgpr_info
*user_sgpr_info
,
699 LLVMValueRef desc_sets
, uint8_t *user_sgpr_idx
)
701 unsigned num_sets
= ctx
->options
->layout
?
702 ctx
->options
->layout
->num_sets
: 0;
703 unsigned stage_mask
= 1 << stage
;
705 if (has_previous_stage
)
706 stage_mask
|= 1 << previous_stage
;
708 if (!user_sgpr_info
->indirect_all_descriptor_sets
) {
709 for (unsigned i
= 0; i
< num_sets
; ++i
) {
710 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& stage_mask
) {
711 set_loc_desc(ctx
, i
, user_sgpr_idx
, 0);
713 ctx
->descriptor_sets
[i
] = NULL
;
716 set_loc_shader(ctx
, AC_UD_INDIRECT_DESCRIPTOR_SETS
,
719 for (unsigned i
= 0; i
< num_sets
; ++i
) {
720 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& stage_mask
) {
721 set_loc_desc(ctx
, i
, user_sgpr_idx
, i
* 8);
722 ctx
->descriptor_sets
[i
] =
723 ac_build_load_to_sgpr(&ctx
->ac
,
725 LLVMConstInt(ctx
->ac
.i32
, i
, false));
728 ctx
->descriptor_sets
[i
] = NULL
;
730 ctx
->shader_info
->need_indirect_descriptor_sets
= true;
733 if (ctx
->shader_info
->info
.loads_push_constants
) {
734 set_loc_shader(ctx
, AC_UD_PUSH_CONSTANTS
, user_sgpr_idx
, 2);
739 set_vs_specific_input_locs(struct nir_to_llvm_context
*ctx
,
740 gl_shader_stage stage
, bool has_previous_stage
,
741 gl_shader_stage previous_stage
,
742 uint8_t *user_sgpr_idx
)
744 if (!ctx
->is_gs_copy_shader
&&
745 (stage
== MESA_SHADER_VERTEX
||
746 (has_previous_stage
&& previous_stage
== MESA_SHADER_VERTEX
))) {
747 if (ctx
->shader_info
->info
.vs
.has_vertex_buffers
) {
748 set_loc_shader(ctx
, AC_UD_VS_VERTEX_BUFFERS
,
753 if (ctx
->shader_info
->info
.vs
.needs_draw_id
)
756 set_loc_shader(ctx
, AC_UD_VS_BASE_VERTEX_START_INSTANCE
,
757 user_sgpr_idx
, vs_num
);
761 static void create_function(struct nir_to_llvm_context
*ctx
,
762 gl_shader_stage stage
,
763 bool has_previous_stage
,
764 gl_shader_stage previous_stage
)
766 uint8_t user_sgpr_idx
;
767 struct user_sgpr_info user_sgpr_info
;
768 struct arg_info args
= {};
769 LLVMValueRef desc_sets
;
770 bool needs_view_index
= needs_view_index_sgpr(ctx
, stage
);
771 allocate_user_sgprs(ctx
, stage
, needs_view_index
, &user_sgpr_info
);
773 if (user_sgpr_info
.need_ring_offsets
&& !ctx
->options
->supports_spill
) {
774 add_arg(&args
, ARG_SGPR
, ac_array_in_const_addr_space(ctx
->ac
.v4i32
),
779 case MESA_SHADER_COMPUTE
:
780 declare_global_input_sgprs(ctx
, stage
, has_previous_stage
,
781 previous_stage
, &user_sgpr_info
,
784 if (ctx
->shader_info
->info
.cs
.uses_grid_size
) {
785 add_arg(&args
, ARG_SGPR
, ctx
->ac
.v3i32
,
786 &ctx
->num_work_groups
);
789 for (int i
= 0; i
< 3; i
++) {
790 ctx
->workgroup_ids
[i
] = NULL
;
791 if (ctx
->shader_info
->info
.cs
.uses_block_id
[i
]) {
792 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
793 &ctx
->workgroup_ids
[i
]);
797 if (ctx
->shader_info
->info
.cs
.uses_local_invocation_idx
)
798 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, &ctx
->tg_size
);
799 add_arg(&args
, ARG_VGPR
, ctx
->ac
.v3i32
,
800 &ctx
->local_invocation_ids
);
802 case MESA_SHADER_VERTEX
:
803 declare_global_input_sgprs(ctx
, stage
, has_previous_stage
,
804 previous_stage
, &user_sgpr_info
,
806 declare_vs_specific_input_sgprs(ctx
, stage
, has_previous_stage
,
807 previous_stage
, &args
);
809 if (needs_view_index
)
810 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, &ctx
->view_index
);
811 if (ctx
->options
->key
.vs
.as_es
)
812 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
814 else if (ctx
->options
->key
.vs
.as_ls
)
815 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
816 &ctx
->ls_out_layout
);
818 declare_vs_input_vgprs(ctx
, &args
);
820 case MESA_SHADER_TESS_CTRL
:
821 if (has_previous_stage
) {
822 // First 6 system regs
823 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, &ctx
->oc_lds
);
824 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
825 &ctx
->merged_wave_info
);
826 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
827 &ctx
->tess_factor_offset
);
829 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, NULL
); // scratch offset
830 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, NULL
); // unknown
831 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, NULL
); // unknown
833 declare_global_input_sgprs(ctx
, stage
,
836 &user_sgpr_info
, &args
,
838 declare_vs_specific_input_sgprs(ctx
, stage
,
840 previous_stage
, &args
);
842 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
843 &ctx
->ls_out_layout
);
845 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
846 &ctx
->tcs_offchip_layout
);
847 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
848 &ctx
->tcs_out_offsets
);
849 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
850 &ctx
->tcs_out_layout
);
851 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
852 &ctx
->tcs_in_layout
);
853 if (needs_view_index
)
854 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
857 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
858 &ctx
->abi
.tcs_patch_id
);
859 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
860 &ctx
->abi
.tcs_rel_ids
);
862 declare_vs_input_vgprs(ctx
, &args
);
864 declare_global_input_sgprs(ctx
, stage
,
867 &user_sgpr_info
, &args
,
870 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
871 &ctx
->tcs_offchip_layout
);
872 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
873 &ctx
->tcs_out_offsets
);
874 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
875 &ctx
->tcs_out_layout
);
876 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
877 &ctx
->tcs_in_layout
);
878 if (needs_view_index
)
879 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
882 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, &ctx
->oc_lds
);
883 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
884 &ctx
->tess_factor_offset
);
885 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
886 &ctx
->abi
.tcs_patch_id
);
887 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
888 &ctx
->abi
.tcs_rel_ids
);
891 case MESA_SHADER_TESS_EVAL
:
892 declare_global_input_sgprs(ctx
, stage
, has_previous_stage
,
893 previous_stage
, &user_sgpr_info
,
896 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, &ctx
->tcs_offchip_layout
);
897 if (needs_view_index
)
898 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, &ctx
->view_index
);
900 if (ctx
->options
->key
.tes
.as_es
) {
901 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, &ctx
->oc_lds
);
902 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, NULL
);
903 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
906 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, NULL
);
907 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, &ctx
->oc_lds
);
909 declare_tes_input_vgprs(ctx
, &args
);
911 case MESA_SHADER_GEOMETRY
:
912 if (has_previous_stage
) {
913 // First 6 system regs
914 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
916 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
917 &ctx
->merged_wave_info
);
918 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, &ctx
->oc_lds
);
920 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, NULL
); // scratch offset
921 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, NULL
); // unknown
922 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, NULL
); // unknown
924 declare_global_input_sgprs(ctx
, stage
,
927 &user_sgpr_info
, &args
,
930 if (previous_stage
== MESA_SHADER_TESS_EVAL
) {
931 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
932 &ctx
->tcs_offchip_layout
);
934 declare_vs_specific_input_sgprs(ctx
, stage
,
940 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
941 &ctx
->gsvs_ring_stride
);
942 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
943 &ctx
->gsvs_num_entries
);
944 if (needs_view_index
)
945 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
948 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
949 &ctx
->gs_vtx_offset
[0]);
950 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
951 &ctx
->gs_vtx_offset
[2]);
952 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
953 &ctx
->abi
.gs_prim_id
);
954 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
955 &ctx
->abi
.gs_invocation_id
);
956 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
957 &ctx
->gs_vtx_offset
[4]);
959 if (previous_stage
== MESA_SHADER_VERTEX
) {
960 declare_vs_input_vgprs(ctx
, &args
);
962 declare_tes_input_vgprs(ctx
, &args
);
965 declare_global_input_sgprs(ctx
, stage
,
968 &user_sgpr_info
, &args
,
971 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
972 &ctx
->gsvs_ring_stride
);
973 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
974 &ctx
->gsvs_num_entries
);
975 if (needs_view_index
)
976 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
979 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, &ctx
->gs2vs_offset
);
980 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, &ctx
->gs_wave_id
);
981 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
982 &ctx
->gs_vtx_offset
[0]);
983 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
984 &ctx
->gs_vtx_offset
[1]);
985 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
986 &ctx
->abi
.gs_prim_id
);
987 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
988 &ctx
->gs_vtx_offset
[2]);
989 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
990 &ctx
->gs_vtx_offset
[3]);
991 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
992 &ctx
->gs_vtx_offset
[4]);
993 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
994 &ctx
->gs_vtx_offset
[5]);
995 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
,
996 &ctx
->abi
.gs_invocation_id
);
999 case MESA_SHADER_FRAGMENT
:
1000 declare_global_input_sgprs(ctx
, stage
, has_previous_stage
,
1001 previous_stage
, &user_sgpr_info
,
1004 if (ctx
->shader_info
->info
.ps
.needs_sample_positions
)
1005 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
,
1006 &ctx
->sample_pos_offset
);
1008 add_arg(&args
, ARG_SGPR
, ctx
->ac
.i32
, &ctx
->prim_mask
);
1009 add_arg(&args
, ARG_VGPR
, ctx
->ac
.v2i32
, &ctx
->persp_sample
);
1010 add_arg(&args
, ARG_VGPR
, ctx
->ac
.v2i32
, &ctx
->persp_center
);
1011 add_arg(&args
, ARG_VGPR
, ctx
->ac
.v2i32
, &ctx
->persp_centroid
);
1012 add_arg(&args
, ARG_VGPR
, ctx
->ac
.v3i32
, NULL
); /* persp pull model */
1013 add_arg(&args
, ARG_VGPR
, ctx
->ac
.v2i32
, &ctx
->linear_sample
);
1014 add_arg(&args
, ARG_VGPR
, ctx
->ac
.v2i32
, &ctx
->linear_center
);
1015 add_arg(&args
, ARG_VGPR
, ctx
->ac
.v2i32
, &ctx
->linear_centroid
);
1016 add_arg(&args
, ARG_VGPR
, ctx
->ac
.f32
, NULL
); /* line stipple tex */
1017 add_arg(&args
, ARG_VGPR
, ctx
->ac
.f32
, &ctx
->abi
.frag_pos
[0]);
1018 add_arg(&args
, ARG_VGPR
, ctx
->ac
.f32
, &ctx
->abi
.frag_pos
[1]);
1019 add_arg(&args
, ARG_VGPR
, ctx
->ac
.f32
, &ctx
->abi
.frag_pos
[2]);
1020 add_arg(&args
, ARG_VGPR
, ctx
->ac
.f32
, &ctx
->abi
.frag_pos
[3]);
1021 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
, &ctx
->abi
.front_face
);
1022 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
, &ctx
->abi
.ancillary
);
1023 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
, &ctx
->abi
.sample_coverage
);
1024 add_arg(&args
, ARG_VGPR
, ctx
->ac
.i32
, NULL
); /* fixed pt */
1027 unreachable("Shader stage not implemented");
1030 ctx
->main_function
= create_llvm_function(
1031 ctx
->context
, ctx
->module
, ctx
->builder
, NULL
, 0, &args
,
1032 ctx
->max_workgroup_size
,
1033 ctx
->options
->unsafe_math
);
1034 set_llvm_calling_convention(ctx
->main_function
, stage
);
1037 ctx
->shader_info
->num_input_vgprs
= 0;
1038 ctx
->shader_info
->num_input_sgprs
= ctx
->options
->supports_spill
? 2 : 0;
1040 ctx
->shader_info
->num_input_sgprs
+= args
.num_sgprs_used
;
1042 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
1043 ctx
->shader_info
->num_input_vgprs
= args
.num_vgprs_used
;
1045 assign_arguments(ctx
->main_function
, &args
);
1049 if (ctx
->options
->supports_spill
|| user_sgpr_info
.need_ring_offsets
) {
1050 set_loc_shader(ctx
, AC_UD_SCRATCH_RING_OFFSETS
,
1052 if (ctx
->options
->supports_spill
) {
1053 ctx
->ring_offsets
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.implicit.buffer.ptr",
1054 LLVMPointerType(ctx
->ac
.i8
, AC_CONST_ADDR_SPACE
),
1055 NULL
, 0, AC_FUNC_ATTR_READNONE
);
1056 ctx
->ring_offsets
= LLVMBuildBitCast(ctx
->builder
, ctx
->ring_offsets
,
1057 ac_array_in_const_addr_space(ctx
->ac
.v4i32
), "");
1061 /* For merged shaders the user SGPRs start at 8, with 8 system SGPRs in front (including
1062 * the rw_buffers at s0/s1. With user SGPR0 = s8, lets restart the count from 0 */
1063 if (has_previous_stage
)
1066 set_global_input_locs(ctx
, stage
, has_previous_stage
, previous_stage
,
1067 &user_sgpr_info
, desc_sets
, &user_sgpr_idx
);
1070 case MESA_SHADER_COMPUTE
:
1071 if (ctx
->shader_info
->info
.cs
.uses_grid_size
) {
1072 set_loc_shader(ctx
, AC_UD_CS_GRID_SIZE
,
1076 case MESA_SHADER_VERTEX
:
1077 set_vs_specific_input_locs(ctx
, stage
, has_previous_stage
,
1078 previous_stage
, &user_sgpr_idx
);
1079 if (ctx
->view_index
)
1080 set_loc_shader(ctx
, AC_UD_VIEW_INDEX
, &user_sgpr_idx
, 1);
1081 if (ctx
->options
->key
.vs
.as_ls
) {
1082 set_loc_shader(ctx
, AC_UD_VS_LS_TCS_IN_LAYOUT
,
1085 if (ctx
->options
->key
.vs
.as_ls
)
1086 ac_declare_lds_as_pointer(&ctx
->ac
);
1088 case MESA_SHADER_TESS_CTRL
:
1089 set_vs_specific_input_locs(ctx
, stage
, has_previous_stage
,
1090 previous_stage
, &user_sgpr_idx
);
1091 if (has_previous_stage
)
1092 set_loc_shader(ctx
, AC_UD_VS_LS_TCS_IN_LAYOUT
,
1094 set_loc_shader(ctx
, AC_UD_TCS_OFFCHIP_LAYOUT
, &user_sgpr_idx
, 4);
1095 if (ctx
->view_index
)
1096 set_loc_shader(ctx
, AC_UD_VIEW_INDEX
, &user_sgpr_idx
, 1);
1097 ac_declare_lds_as_pointer(&ctx
->ac
);
1099 case MESA_SHADER_TESS_EVAL
:
1100 set_loc_shader(ctx
, AC_UD_TES_OFFCHIP_LAYOUT
, &user_sgpr_idx
, 1);
1101 if (ctx
->view_index
)
1102 set_loc_shader(ctx
, AC_UD_VIEW_INDEX
, &user_sgpr_idx
, 1);
1104 case MESA_SHADER_GEOMETRY
:
1105 if (has_previous_stage
) {
1106 if (previous_stage
== MESA_SHADER_VERTEX
)
1107 set_vs_specific_input_locs(ctx
, stage
,
1112 set_loc_shader(ctx
, AC_UD_TES_OFFCHIP_LAYOUT
,
1115 set_loc_shader(ctx
, AC_UD_GS_VS_RING_STRIDE_ENTRIES
,
1117 if (ctx
->view_index
)
1118 set_loc_shader(ctx
, AC_UD_VIEW_INDEX
, &user_sgpr_idx
, 1);
1119 if (has_previous_stage
)
1120 ac_declare_lds_as_pointer(&ctx
->ac
);
1122 case MESA_SHADER_FRAGMENT
:
1123 if (ctx
->shader_info
->info
.ps
.needs_sample_positions
) {
1124 set_loc_shader(ctx
, AC_UD_PS_SAMPLE_POS_OFFSET
,
1129 unreachable("Shader stage not implemented");
1132 ctx
->shader_info
->num_user_sgprs
= user_sgpr_idx
;
1135 static LLVMValueRef
trim_vector(struct ac_llvm_context
*ctx
,
1136 LLVMValueRef value
, unsigned count
)
1138 unsigned num_components
= ac_get_llvm_num_components(value
);
1139 if (count
== num_components
)
1142 LLVMValueRef masks
[] = {
1143 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
1144 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false)};
1147 return LLVMBuildExtractElement(ctx
->builder
, value
, masks
[0],
1150 LLVMValueRef swizzle
= LLVMConstVector(masks
, count
);
1151 return LLVMBuildShuffleVector(ctx
->builder
, value
, value
, swizzle
, "");
1155 build_store_values_extended(struct ac_llvm_context
*ac
,
1156 LLVMValueRef
*values
,
1157 unsigned value_count
,
1158 unsigned value_stride
,
1161 LLVMBuilderRef builder
= ac
->builder
;
1164 for (i
= 0; i
< value_count
; i
++) {
1165 LLVMValueRef ptr
= values
[i
* value_stride
];
1166 LLVMValueRef index
= LLVMConstInt(ac
->i32
, i
, false);
1167 LLVMValueRef value
= LLVMBuildExtractElement(builder
, vec
, index
, "");
1168 LLVMBuildStore(builder
, value
, ptr
);
1172 static LLVMTypeRef
get_def_type(struct ac_nir_context
*ctx
,
1173 const nir_ssa_def
*def
)
1175 LLVMTypeRef type
= LLVMIntTypeInContext(ctx
->ac
.context
, def
->bit_size
);
1176 if (def
->num_components
> 1) {
1177 type
= LLVMVectorType(type
, def
->num_components
);
1182 static LLVMValueRef
get_src(struct ac_nir_context
*nir
, nir_src src
)
1185 struct hash_entry
*entry
= _mesa_hash_table_search(nir
->defs
, src
.ssa
);
1186 return (LLVMValueRef
)entry
->data
;
1190 static LLVMBasicBlockRef
get_block(struct ac_nir_context
*nir
,
1191 const struct nir_block
*b
)
1193 struct hash_entry
*entry
= _mesa_hash_table_search(nir
->defs
, b
);
1194 return (LLVMBasicBlockRef
)entry
->data
;
1197 static LLVMValueRef
get_alu_src(struct ac_nir_context
*ctx
,
1199 unsigned num_components
)
1201 LLVMValueRef value
= get_src(ctx
, src
.src
);
1202 bool need_swizzle
= false;
1205 LLVMTypeRef type
= LLVMTypeOf(value
);
1206 unsigned src_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
1207 ? LLVMGetVectorSize(type
)
1210 for (unsigned i
= 0; i
< num_components
; ++i
) {
1211 assert(src
.swizzle
[i
] < src_components
);
1212 if (src
.swizzle
[i
] != i
)
1213 need_swizzle
= true;
1216 if (need_swizzle
|| num_components
!= src_components
) {
1217 LLVMValueRef masks
[] = {
1218 LLVMConstInt(ctx
->ac
.i32
, src
.swizzle
[0], false),
1219 LLVMConstInt(ctx
->ac
.i32
, src
.swizzle
[1], false),
1220 LLVMConstInt(ctx
->ac
.i32
, src
.swizzle
[2], false),
1221 LLVMConstInt(ctx
->ac
.i32
, src
.swizzle
[3], false)};
1223 if (src_components
> 1 && num_components
== 1) {
1224 value
= LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
1226 } else if (src_components
== 1 && num_components
> 1) {
1227 LLVMValueRef values
[] = {value
, value
, value
, value
};
1228 value
= ac_build_gather_values(&ctx
->ac
, values
, num_components
);
1230 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
1231 value
= LLVMBuildShuffleVector(ctx
->ac
.builder
, value
, value
,
1235 assert(!src
.negate
);
1240 static LLVMValueRef
emit_int_cmp(struct ac_llvm_context
*ctx
,
1241 LLVMIntPredicate pred
, LLVMValueRef src0
,
1244 LLVMValueRef result
= LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, "");
1245 return LLVMBuildSelect(ctx
->builder
, result
,
1246 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
1250 static LLVMValueRef
emit_float_cmp(struct ac_llvm_context
*ctx
,
1251 LLVMRealPredicate pred
, LLVMValueRef src0
,
1254 LLVMValueRef result
;
1255 src0
= ac_to_float(ctx
, src0
);
1256 src1
= ac_to_float(ctx
, src1
);
1257 result
= LLVMBuildFCmp(ctx
->builder
, pred
, src0
, src1
, "");
1258 return LLVMBuildSelect(ctx
->builder
, result
,
1259 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
1263 static LLVMValueRef
emit_intrin_1f_param(struct ac_llvm_context
*ctx
,
1265 LLVMTypeRef result_type
,
1269 LLVMValueRef params
[] = {
1270 ac_to_float(ctx
, src0
),
1273 MAYBE_UNUSED
const int length
= snprintf(name
, sizeof(name
), "%s.f%d", intrin
,
1274 get_elem_bits(ctx
, result_type
));
1275 assert(length
< sizeof(name
));
1276 return ac_build_intrinsic(ctx
, name
, result_type
, params
, 1, AC_FUNC_ATTR_READNONE
);
1279 static LLVMValueRef
emit_intrin_2f_param(struct ac_llvm_context
*ctx
,
1281 LLVMTypeRef result_type
,
1282 LLVMValueRef src0
, LLVMValueRef src1
)
1285 LLVMValueRef params
[] = {
1286 ac_to_float(ctx
, src0
),
1287 ac_to_float(ctx
, src1
),
1290 MAYBE_UNUSED
const int length
= snprintf(name
, sizeof(name
), "%s.f%d", intrin
,
1291 get_elem_bits(ctx
, result_type
));
1292 assert(length
< sizeof(name
));
1293 return ac_build_intrinsic(ctx
, name
, result_type
, params
, 2, AC_FUNC_ATTR_READNONE
);
1296 static LLVMValueRef
emit_intrin_3f_param(struct ac_llvm_context
*ctx
,
1298 LLVMTypeRef result_type
,
1299 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
1302 LLVMValueRef params
[] = {
1303 ac_to_float(ctx
, src0
),
1304 ac_to_float(ctx
, src1
),
1305 ac_to_float(ctx
, src2
),
1308 MAYBE_UNUSED
const int length
= snprintf(name
, sizeof(name
), "%s.f%d", intrin
,
1309 get_elem_bits(ctx
, result_type
));
1310 assert(length
< sizeof(name
));
1311 return ac_build_intrinsic(ctx
, name
, result_type
, params
, 3, AC_FUNC_ATTR_READNONE
);
1314 static LLVMValueRef
emit_bcsel(struct ac_llvm_context
*ctx
,
1315 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
1317 LLVMValueRef v
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, src0
,
1319 return LLVMBuildSelect(ctx
->builder
, v
, src1
, src2
, "");
1322 static LLVMValueRef
emit_minmax_int(struct ac_llvm_context
*ctx
,
1323 LLVMIntPredicate pred
,
1324 LLVMValueRef src0
, LLVMValueRef src1
)
1326 return LLVMBuildSelect(ctx
->builder
,
1327 LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, ""),
1332 static LLVMValueRef
emit_iabs(struct ac_llvm_context
*ctx
,
1335 return emit_minmax_int(ctx
, LLVMIntSGT
, src0
,
1336 LLVMBuildNeg(ctx
->builder
, src0
, ""));
1339 static LLVMValueRef
emit_fsign(struct ac_llvm_context
*ctx
,
1343 LLVMValueRef cmp
, val
, zero
, one
;
1346 if (bitsize
== 32) {
1356 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGT
, src0
, zero
, "");
1357 val
= LLVMBuildSelect(ctx
->builder
, cmp
, one
, src0
, "");
1358 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
, val
, zero
, "");
1359 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstReal(type
, -1.0), "");
1363 static LLVMValueRef
emit_isign(struct ac_llvm_context
*ctx
,
1364 LLVMValueRef src0
, unsigned bitsize
)
1366 LLVMValueRef cmp
, val
, zero
, one
;
1369 if (bitsize
== 32) {
1379 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGT
, src0
, zero
, "");
1380 val
= LLVMBuildSelect(ctx
->builder
, cmp
, one
, src0
, "");
1381 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGE
, val
, zero
, "");
1382 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstInt(type
, -1, true), "");
1386 static LLVMValueRef
emit_ffract(struct ac_llvm_context
*ctx
,
1389 const char *intr
= "llvm.floor.f32";
1390 LLVMValueRef fsrc0
= ac_to_float(ctx
, src0
);
1391 LLVMValueRef params
[] = {
1394 LLVMValueRef floor
= ac_build_intrinsic(ctx
, intr
,
1395 ctx
->f32
, params
, 1,
1396 AC_FUNC_ATTR_READNONE
);
1397 return LLVMBuildFSub(ctx
->builder
, fsrc0
, floor
, "");
1400 static LLVMValueRef
emit_uint_carry(struct ac_llvm_context
*ctx
,
1402 LLVMValueRef src0
, LLVMValueRef src1
)
1404 LLVMTypeRef ret_type
;
1405 LLVMTypeRef types
[] = { ctx
->i32
, ctx
->i1
};
1407 LLVMValueRef params
[] = { src0
, src1
};
1408 ret_type
= LLVMStructTypeInContext(ctx
->context
, types
,
1411 res
= ac_build_intrinsic(ctx
, intrin
, ret_type
,
1412 params
, 2, AC_FUNC_ATTR_READNONE
);
1414 res
= LLVMBuildExtractValue(ctx
->builder
, res
, 1, "");
1415 res
= LLVMBuildZExt(ctx
->builder
, res
, ctx
->i32
, "");
1419 static LLVMValueRef
emit_b2f(struct ac_llvm_context
*ctx
,
1422 return LLVMBuildAnd(ctx
->builder
, src0
, LLVMBuildBitCast(ctx
->builder
, LLVMConstReal(ctx
->f32
, 1.0), ctx
->i32
, ""), "");
1425 static LLVMValueRef
emit_f2b(struct ac_llvm_context
*ctx
,
1428 src0
= ac_to_float(ctx
, src0
);
1429 return LLVMBuildSExt(ctx
->builder
,
1430 LLVMBuildFCmp(ctx
->builder
, LLVMRealUNE
, src0
, ctx
->f32_0
, ""),
1434 static LLVMValueRef
emit_b2i(struct ac_llvm_context
*ctx
,
1438 LLVMValueRef result
= LLVMBuildAnd(ctx
->builder
, src0
, ctx
->i32_1
, "");
1443 return LLVMBuildZExt(ctx
->builder
, result
, ctx
->i64
, "");
1446 static LLVMValueRef
emit_i2b(struct ac_llvm_context
*ctx
,
1449 return LLVMBuildSExt(ctx
->builder
,
1450 LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, src0
, ctx
->i32_0
, ""),
1454 static LLVMValueRef
emit_f2f16(struct nir_to_llvm_context
*ctx
,
1457 LLVMValueRef result
;
1458 LLVMValueRef cond
= NULL
;
1460 src0
= ac_to_float(&ctx
->ac
, src0
);
1461 result
= LLVMBuildFPTrunc(ctx
->builder
, src0
, ctx
->ac
.f16
, "");
1463 if (ctx
->options
->chip_class
>= VI
) {
1464 LLVMValueRef args
[2];
1465 /* Check if the result is a denormal - and flush to 0 if so. */
1467 args
[1] = LLVMConstInt(ctx
->ac
.i32
, N_SUBNORMAL
| P_SUBNORMAL
, false);
1468 cond
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.class.f16", ctx
->ac
.i1
, args
, 2, AC_FUNC_ATTR_READNONE
);
1471 /* need to convert back up to f32 */
1472 result
= LLVMBuildFPExt(ctx
->builder
, result
, ctx
->ac
.f32
, "");
1474 if (ctx
->options
->chip_class
>= VI
)
1475 result
= LLVMBuildSelect(ctx
->builder
, cond
, ctx
->ac
.f32_0
, result
, "");
1478 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
1479 * so compare the result and flush to 0 if it's smaller.
1481 LLVMValueRef temp
, cond2
;
1482 temp
= emit_intrin_1f_param(&ctx
->ac
, "llvm.fabs",
1483 ctx
->ac
.f32
, result
);
1484 cond
= LLVMBuildFCmp(ctx
->builder
, LLVMRealUGT
,
1485 LLVMBuildBitCast(ctx
->builder
, LLVMConstInt(ctx
->ac
.i32
, 0x38800000, false), ctx
->ac
.f32
, ""),
1487 cond2
= LLVMBuildFCmp(ctx
->builder
, LLVMRealUNE
,
1488 temp
, ctx
->ac
.f32_0
, "");
1489 cond
= LLVMBuildAnd(ctx
->builder
, cond
, cond2
, "");
1490 result
= LLVMBuildSelect(ctx
->builder
, cond
, ctx
->ac
.f32_0
, result
, "");
1495 static LLVMValueRef
emit_umul_high(struct ac_llvm_context
*ctx
,
1496 LLVMValueRef src0
, LLVMValueRef src1
)
1498 LLVMValueRef dst64
, result
;
1499 src0
= LLVMBuildZExt(ctx
->builder
, src0
, ctx
->i64
, "");
1500 src1
= LLVMBuildZExt(ctx
->builder
, src1
, ctx
->i64
, "");
1502 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1503 dst64
= LLVMBuildLShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1504 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1508 static LLVMValueRef
emit_imul_high(struct ac_llvm_context
*ctx
,
1509 LLVMValueRef src0
, LLVMValueRef src1
)
1511 LLVMValueRef dst64
, result
;
1512 src0
= LLVMBuildSExt(ctx
->builder
, src0
, ctx
->i64
, "");
1513 src1
= LLVMBuildSExt(ctx
->builder
, src1
, ctx
->i64
, "");
1515 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1516 dst64
= LLVMBuildAShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1517 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1521 static LLVMValueRef
emit_bitfield_extract(struct ac_llvm_context
*ctx
,
1523 const LLVMValueRef srcs
[3])
1525 LLVMValueRef result
;
1526 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, srcs
[2], LLVMConstInt(ctx
->i32
, 32, false), "");
1528 result
= ac_build_bfe(ctx
, srcs
[0], srcs
[1], srcs
[2], is_signed
);
1529 result
= LLVMBuildSelect(ctx
->builder
, icond
, srcs
[0], result
, "");
1533 static LLVMValueRef
emit_bitfield_insert(struct ac_llvm_context
*ctx
,
1534 LLVMValueRef src0
, LLVMValueRef src1
,
1535 LLVMValueRef src2
, LLVMValueRef src3
)
1537 LLVMValueRef bfi_args
[3], result
;
1539 bfi_args
[0] = LLVMBuildShl(ctx
->builder
,
1540 LLVMBuildSub(ctx
->builder
,
1541 LLVMBuildShl(ctx
->builder
,
1546 bfi_args
[1] = LLVMBuildShl(ctx
->builder
, src1
, src2
, "");
1549 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, src3
, LLVMConstInt(ctx
->i32
, 32, false), "");
1552 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
1553 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
1555 result
= LLVMBuildXor(ctx
->builder
, bfi_args
[2],
1556 LLVMBuildAnd(ctx
->builder
, bfi_args
[0],
1557 LLVMBuildXor(ctx
->builder
, bfi_args
[1], bfi_args
[2], ""), ""), "");
1559 result
= LLVMBuildSelect(ctx
->builder
, icond
, src1
, result
, "");
1563 static LLVMValueRef
emit_pack_half_2x16(struct ac_llvm_context
*ctx
,
1566 LLVMValueRef comp
[2];
1568 src0
= ac_to_float(ctx
, src0
);
1569 comp
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32_0
, "");
1570 comp
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32_1
, "");
1572 return ac_build_cvt_pkrtz_f16(ctx
, comp
);
1575 static LLVMValueRef
emit_unpack_half_2x16(struct ac_llvm_context
*ctx
,
1578 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1579 LLVMValueRef temps
[2], result
, val
;
1582 for (i
= 0; i
< 2; i
++) {
1583 val
= i
== 1 ? LLVMBuildLShr(ctx
->builder
, src0
, const16
, "") : src0
;
1584 val
= LLVMBuildTrunc(ctx
->builder
, val
, ctx
->i16
, "");
1585 val
= LLVMBuildBitCast(ctx
->builder
, val
, ctx
->f16
, "");
1586 temps
[i
] = LLVMBuildFPExt(ctx
->builder
, val
, ctx
->f32
, "");
1589 result
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), temps
[0],
1591 result
= LLVMBuildInsertElement(ctx
->builder
, result
, temps
[1],
1596 static LLVMValueRef
emit_ddxy(struct ac_nir_context
*ctx
,
1602 LLVMValueRef result
;
1604 if (op
== nir_op_fddx_fine
|| op
== nir_op_fddx
)
1605 mask
= AC_TID_MASK_LEFT
;
1606 else if (op
== nir_op_fddy_fine
|| op
== nir_op_fddy
)
1607 mask
= AC_TID_MASK_TOP
;
1609 mask
= AC_TID_MASK_TOP_LEFT
;
1611 /* for DDX we want to next X pixel, DDY next Y pixel. */
1612 if (op
== nir_op_fddx_fine
||
1613 op
== nir_op_fddx_coarse
||
1619 result
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, src0
);
1624 * this takes an I,J coordinate pair,
1625 * and works out the X and Y derivatives.
1626 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
1628 static LLVMValueRef
emit_ddxy_interp(
1629 struct ac_nir_context
*ctx
,
1630 LLVMValueRef interp_ij
)
1632 LLVMValueRef result
[4], a
;
1635 for (i
= 0; i
< 2; i
++) {
1636 a
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_ij
,
1637 LLVMConstInt(ctx
->ac
.i32
, i
, false), "");
1638 result
[i
] = emit_ddxy(ctx
, nir_op_fddx
, a
);
1639 result
[2+i
] = emit_ddxy(ctx
, nir_op_fddy
, a
);
1641 return ac_build_gather_values(&ctx
->ac
, result
, 4);
1644 static void visit_alu(struct ac_nir_context
*ctx
, const nir_alu_instr
*instr
)
1646 LLVMValueRef src
[4], result
= NULL
;
1647 unsigned num_components
= instr
->dest
.dest
.ssa
.num_components
;
1648 unsigned src_components
;
1649 LLVMTypeRef def_type
= get_def_type(ctx
, &instr
->dest
.dest
.ssa
);
1651 assert(nir_op_infos
[instr
->op
].num_inputs
<= ARRAY_SIZE(src
));
1652 switch (instr
->op
) {
1658 case nir_op_pack_half_2x16
:
1661 case nir_op_unpack_half_2x16
:
1665 src_components
= num_components
;
1668 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1669 src
[i
] = get_alu_src(ctx
, instr
->src
[i
], src_components
);
1671 switch (instr
->op
) {
1677 src
[0] = ac_to_float(&ctx
->ac
, src
[0]);
1678 result
= LLVMBuildFNeg(ctx
->ac
.builder
, src
[0], "");
1681 result
= LLVMBuildNeg(ctx
->ac
.builder
, src
[0], "");
1684 result
= LLVMBuildNot(ctx
->ac
.builder
, src
[0], "");
1687 result
= LLVMBuildAdd(ctx
->ac
.builder
, src
[0], src
[1], "");
1690 src
[0] = ac_to_float(&ctx
->ac
, src
[0]);
1691 src
[1] = ac_to_float(&ctx
->ac
, src
[1]);
1692 result
= LLVMBuildFAdd(ctx
->ac
.builder
, src
[0], src
[1], "");
1695 src
[0] = ac_to_float(&ctx
->ac
, src
[0]);
1696 src
[1] = ac_to_float(&ctx
->ac
, src
[1]);
1697 result
= LLVMBuildFSub(ctx
->ac
.builder
, src
[0], src
[1], "");
1700 result
= LLVMBuildSub(ctx
->ac
.builder
, src
[0], src
[1], "");
1703 result
= LLVMBuildMul(ctx
->ac
.builder
, src
[0], src
[1], "");
1706 result
= LLVMBuildSRem(ctx
->ac
.builder
, src
[0], src
[1], "");
1709 result
= LLVMBuildURem(ctx
->ac
.builder
, src
[0], src
[1], "");
1712 src
[0] = ac_to_float(&ctx
->ac
, src
[0]);
1713 src
[1] = ac_to_float(&ctx
->ac
, src
[1]);
1714 result
= ac_build_fdiv(&ctx
->ac
, src
[0], src
[1]);
1715 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.floor",
1716 ac_to_float_type(&ctx
->ac
, def_type
), result
);
1717 result
= LLVMBuildFMul(ctx
->ac
.builder
, src
[1] , result
, "");
1718 result
= LLVMBuildFSub(ctx
->ac
.builder
, src
[0], result
, "");
1721 src
[0] = ac_to_float(&ctx
->ac
, src
[0]);
1722 src
[1] = ac_to_float(&ctx
->ac
, src
[1]);
1723 result
= LLVMBuildFRem(ctx
->ac
.builder
, src
[0], src
[1], "");
1726 result
= LLVMBuildSRem(ctx
->ac
.builder
, src
[0], src
[1], "");
1729 result
= LLVMBuildSDiv(ctx
->ac
.builder
, src
[0], src
[1], "");
1732 result
= LLVMBuildUDiv(ctx
->ac
.builder
, src
[0], src
[1], "");
1735 src
[0] = ac_to_float(&ctx
->ac
, src
[0]);
1736 src
[1] = ac_to_float(&ctx
->ac
, src
[1]);
1737 result
= LLVMBuildFMul(ctx
->ac
.builder
, src
[0], src
[1], "");
1740 src
[0] = ac_to_float(&ctx
->ac
, src
[0]);
1741 src
[1] = ac_to_float(&ctx
->ac
, src
[1]);
1742 result
= ac_build_fdiv(&ctx
->ac
, src
[0], src
[1]);
1745 src
[0] = ac_to_float(&ctx
->ac
, src
[0]);
1746 result
= ac_build_fdiv(&ctx
->ac
, instr
->dest
.dest
.ssa
.bit_size
== 32 ? ctx
->ac
.f32_1
: ctx
->ac
.f64_1
,
1750 result
= LLVMBuildAnd(ctx
->ac
.builder
, src
[0], src
[1], "");
1753 result
= LLVMBuildOr(ctx
->ac
.builder
, src
[0], src
[1], "");
1756 result
= LLVMBuildXor(ctx
->ac
.builder
, src
[0], src
[1], "");
1759 result
= LLVMBuildShl(ctx
->ac
.builder
, src
[0],
1760 LLVMBuildZExt(ctx
->ac
.builder
, src
[1],
1761 LLVMTypeOf(src
[0]), ""),
1765 result
= LLVMBuildAShr(ctx
->ac
.builder
, src
[0],
1766 LLVMBuildZExt(ctx
->ac
.builder
, src
[1],
1767 LLVMTypeOf(src
[0]), ""),
1771 result
= LLVMBuildLShr(ctx
->ac
.builder
, src
[0],
1772 LLVMBuildZExt(ctx
->ac
.builder
, src
[1],
1773 LLVMTypeOf(src
[0]), ""),
1777 result
= emit_int_cmp(&ctx
->ac
, LLVMIntSLT
, src
[0], src
[1]);
1780 result
= emit_int_cmp(&ctx
->ac
, LLVMIntNE
, src
[0], src
[1]);
1783 result
= emit_int_cmp(&ctx
->ac
, LLVMIntEQ
, src
[0], src
[1]);
1786 result
= emit_int_cmp(&ctx
->ac
, LLVMIntSGE
, src
[0], src
[1]);
1789 result
= emit_int_cmp(&ctx
->ac
, LLVMIntULT
, src
[0], src
[1]);
1792 result
= emit_int_cmp(&ctx
->ac
, LLVMIntUGE
, src
[0], src
[1]);
1795 result
= emit_float_cmp(&ctx
->ac
, LLVMRealUEQ
, src
[0], src
[1]);
1798 result
= emit_float_cmp(&ctx
->ac
, LLVMRealUNE
, src
[0], src
[1]);
1801 result
= emit_float_cmp(&ctx
->ac
, LLVMRealULT
, src
[0], src
[1]);
1804 result
= emit_float_cmp(&ctx
->ac
, LLVMRealUGE
, src
[0], src
[1]);
1807 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.fabs",
1808 ac_to_float_type(&ctx
->ac
, def_type
), src
[0]);
1811 result
= emit_iabs(&ctx
->ac
, src
[0]);
1814 result
= emit_minmax_int(&ctx
->ac
, LLVMIntSGT
, src
[0], src
[1]);
1817 result
= emit_minmax_int(&ctx
->ac
, LLVMIntSLT
, src
[0], src
[1]);
1820 result
= emit_minmax_int(&ctx
->ac
, LLVMIntUGT
, src
[0], src
[1]);
1823 result
= emit_minmax_int(&ctx
->ac
, LLVMIntULT
, src
[0], src
[1]);
1826 result
= emit_isign(&ctx
->ac
, src
[0], instr
->dest
.dest
.ssa
.bit_size
);
1829 src
[0] = ac_to_float(&ctx
->ac
, src
[0]);
1830 result
= emit_fsign(&ctx
->ac
, src
[0], instr
->dest
.dest
.ssa
.bit_size
);
1833 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.floor",
1834 ac_to_float_type(&ctx
->ac
, def_type
), src
[0]);
1837 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.trunc",
1838 ac_to_float_type(&ctx
->ac
, def_type
), src
[0]);
1841 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.ceil",
1842 ac_to_float_type(&ctx
->ac
, def_type
), src
[0]);
1844 case nir_op_fround_even
:
1845 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.rint",
1846 ac_to_float_type(&ctx
->ac
, def_type
),src
[0]);
1849 result
= emit_ffract(&ctx
->ac
, src
[0]);
1852 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.sin",
1853 ac_to_float_type(&ctx
->ac
, def_type
), src
[0]);
1856 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.cos",
1857 ac_to_float_type(&ctx
->ac
, def_type
), src
[0]);
1860 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.sqrt",
1861 ac_to_float_type(&ctx
->ac
, def_type
), src
[0]);
1864 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.exp2",
1865 ac_to_float_type(&ctx
->ac
, def_type
), src
[0]);
1868 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.log2",
1869 ac_to_float_type(&ctx
->ac
, def_type
), src
[0]);
1872 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.sqrt",
1873 ac_to_float_type(&ctx
->ac
, def_type
), src
[0]);
1874 result
= ac_build_fdiv(&ctx
->ac
, instr
->dest
.dest
.ssa
.bit_size
== 32 ? ctx
->ac
.f32_1
: ctx
->ac
.f64_1
,
1878 result
= emit_intrin_2f_param(&ctx
->ac
, "llvm.pow",
1879 ac_to_float_type(&ctx
->ac
, def_type
), src
[0], src
[1]);
1882 result
= emit_intrin_2f_param(&ctx
->ac
, "llvm.maxnum",
1883 ac_to_float_type(&ctx
->ac
, def_type
), src
[0], src
[1]);
1884 if (ctx
->ac
.chip_class
< GFX9
&&
1885 instr
->dest
.dest
.ssa
.bit_size
== 32) {
1886 /* Only pre-GFX9 chips do not flush denorms. */
1887 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.canonicalize",
1888 ac_to_float_type(&ctx
->ac
, def_type
),
1893 result
= emit_intrin_2f_param(&ctx
->ac
, "llvm.minnum",
1894 ac_to_float_type(&ctx
->ac
, def_type
), src
[0], src
[1]);
1895 if (ctx
->ac
.chip_class
< GFX9
&&
1896 instr
->dest
.dest
.ssa
.bit_size
== 32) {
1897 /* Only pre-GFX9 chips do not flush denorms. */
1898 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.canonicalize",
1899 ac_to_float_type(&ctx
->ac
, def_type
),
1904 result
= emit_intrin_3f_param(&ctx
->ac
, "llvm.fmuladd",
1905 ac_to_float_type(&ctx
->ac
, def_type
), src
[0], src
[1], src
[2]);
1907 case nir_op_ibitfield_extract
:
1908 result
= emit_bitfield_extract(&ctx
->ac
, true, src
);
1910 case nir_op_ubitfield_extract
:
1911 result
= emit_bitfield_extract(&ctx
->ac
, false, src
);
1913 case nir_op_bitfield_insert
:
1914 result
= emit_bitfield_insert(&ctx
->ac
, src
[0], src
[1], src
[2], src
[3]);
1916 case nir_op_bitfield_reverse
:
1917 result
= ac_build_intrinsic(&ctx
->ac
, "llvm.bitreverse.i32", ctx
->ac
.i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1919 case nir_op_bit_count
:
1920 result
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32", ctx
->ac
.i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1925 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1926 src
[i
] = ac_to_integer(&ctx
->ac
, src
[i
]);
1927 result
= ac_build_gather_values(&ctx
->ac
, src
, num_components
);
1931 src
[0] = ac_to_float(&ctx
->ac
, src
[0]);
1932 result
= LLVMBuildFPToSI(ctx
->ac
.builder
, src
[0], def_type
, "");
1936 src
[0] = ac_to_float(&ctx
->ac
, src
[0]);
1937 result
= LLVMBuildFPToUI(ctx
->ac
.builder
, src
[0], def_type
, "");
1941 src
[0] = ac_to_integer(&ctx
->ac
, src
[0]);
1942 result
= LLVMBuildSIToFP(ctx
->ac
.builder
, src
[0], ac_to_float_type(&ctx
->ac
, def_type
), "");
1946 src
[0] = ac_to_integer(&ctx
->ac
, src
[0]);
1947 result
= LLVMBuildUIToFP(ctx
->ac
.builder
, src
[0], ac_to_float_type(&ctx
->ac
, def_type
), "");
1950 src
[0] = ac_to_float(&ctx
->ac
, src
[0]);
1951 result
= LLVMBuildFPExt(ctx
->ac
.builder
, src
[0], ac_to_float_type(&ctx
->ac
, def_type
), "");
1954 result
= LLVMBuildFPTrunc(ctx
->ac
.builder
, src
[0], ac_to_float_type(&ctx
->ac
, def_type
), "");
1958 src
[0] = ac_to_integer(&ctx
->ac
, src
[0]);
1959 if (get_elem_bits(&ctx
->ac
, LLVMTypeOf(src
[0])) < get_elem_bits(&ctx
->ac
, def_type
))
1960 result
= LLVMBuildZExt(ctx
->ac
.builder
, src
[0], def_type
, "");
1962 result
= LLVMBuildTrunc(ctx
->ac
.builder
, src
[0], def_type
, "");
1966 src
[0] = ac_to_integer(&ctx
->ac
, src
[0]);
1967 if (get_elem_bits(&ctx
->ac
, LLVMTypeOf(src
[0])) < get_elem_bits(&ctx
->ac
, def_type
))
1968 result
= LLVMBuildSExt(ctx
->ac
.builder
, src
[0], def_type
, "");
1970 result
= LLVMBuildTrunc(ctx
->ac
.builder
, src
[0], def_type
, "");
1973 result
= emit_bcsel(&ctx
->ac
, src
[0], src
[1], src
[2]);
1975 case nir_op_find_lsb
:
1976 src
[0] = ac_to_integer(&ctx
->ac
, src
[0]);
1977 result
= ac_find_lsb(&ctx
->ac
, ctx
->ac
.i32
, src
[0]);
1979 case nir_op_ufind_msb
:
1980 src
[0] = ac_to_integer(&ctx
->ac
, src
[0]);
1981 result
= ac_build_umsb(&ctx
->ac
, src
[0], ctx
->ac
.i32
);
1983 case nir_op_ifind_msb
:
1984 src
[0] = ac_to_integer(&ctx
->ac
, src
[0]);
1985 result
= ac_build_imsb(&ctx
->ac
, src
[0], ctx
->ac
.i32
);
1987 case nir_op_uadd_carry
:
1988 src
[0] = ac_to_integer(&ctx
->ac
, src
[0]);
1989 src
[1] = ac_to_integer(&ctx
->ac
, src
[1]);
1990 result
= emit_uint_carry(&ctx
->ac
, "llvm.uadd.with.overflow.i32", src
[0], src
[1]);
1992 case nir_op_usub_borrow
:
1993 src
[0] = ac_to_integer(&ctx
->ac
, src
[0]);
1994 src
[1] = ac_to_integer(&ctx
->ac
, src
[1]);
1995 result
= emit_uint_carry(&ctx
->ac
, "llvm.usub.with.overflow.i32", src
[0], src
[1]);
1998 result
= emit_b2f(&ctx
->ac
, src
[0]);
2001 result
= emit_f2b(&ctx
->ac
, src
[0]);
2004 result
= emit_b2i(&ctx
->ac
, src
[0], instr
->dest
.dest
.ssa
.bit_size
);
2007 src
[0] = ac_to_integer(&ctx
->ac
, src
[0]);
2008 result
= emit_i2b(&ctx
->ac
, src
[0]);
2010 case nir_op_fquantize2f16
:
2011 result
= emit_f2f16(ctx
->nctx
, src
[0]);
2013 case nir_op_umul_high
:
2014 src
[0] = ac_to_integer(&ctx
->ac
, src
[0]);
2015 src
[1] = ac_to_integer(&ctx
->ac
, src
[1]);
2016 result
= emit_umul_high(&ctx
->ac
, src
[0], src
[1]);
2018 case nir_op_imul_high
:
2019 src
[0] = ac_to_integer(&ctx
->ac
, src
[0]);
2020 src
[1] = ac_to_integer(&ctx
->ac
, src
[1]);
2021 result
= emit_imul_high(&ctx
->ac
, src
[0], src
[1]);
2023 case nir_op_pack_half_2x16
:
2024 result
= emit_pack_half_2x16(&ctx
->ac
, src
[0]);
2026 case nir_op_unpack_half_2x16
:
2027 result
= emit_unpack_half_2x16(&ctx
->ac
, src
[0]);
2031 case nir_op_fddx_fine
:
2032 case nir_op_fddy_fine
:
2033 case nir_op_fddx_coarse
:
2034 case nir_op_fddy_coarse
:
2035 result
= emit_ddxy(ctx
, instr
->op
, src
[0]);
2038 case nir_op_unpack_64_2x32_split_x
: {
2039 assert(instr
->src
[0].src
.ssa
->num_components
== 1);
2040 LLVMValueRef tmp
= LLVMBuildBitCast(ctx
->ac
.builder
, src
[0],
2043 result
= LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
,
2048 case nir_op_unpack_64_2x32_split_y
: {
2049 assert(instr
->src
[0].src
.ssa
->num_components
== 1);
2050 LLVMValueRef tmp
= LLVMBuildBitCast(ctx
->ac
.builder
, src
[0],
2053 result
= LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
,
2058 case nir_op_pack_64_2x32_split
: {
2059 LLVMValueRef tmp
= LLVMGetUndef(ctx
->ac
.v2i32
);
2060 tmp
= LLVMBuildInsertElement(ctx
->ac
.builder
, tmp
,
2061 src
[0], ctx
->ac
.i32_0
, "");
2062 tmp
= LLVMBuildInsertElement(ctx
->ac
.builder
, tmp
,
2063 src
[1], ctx
->ac
.i32_1
, "");
2064 result
= LLVMBuildBitCast(ctx
->ac
.builder
, tmp
, ctx
->ac
.i64
, "");
2069 fprintf(stderr
, "Unknown NIR alu instr: ");
2070 nir_print_instr(&instr
->instr
, stderr
);
2071 fprintf(stderr
, "\n");
2076 assert(instr
->dest
.dest
.is_ssa
);
2077 result
= ac_to_integer(&ctx
->ac
, result
);
2078 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.dest
.ssa
,
2083 static void visit_load_const(struct ac_nir_context
*ctx
,
2084 const nir_load_const_instr
*instr
)
2086 LLVMValueRef values
[4], value
= NULL
;
2087 LLVMTypeRef element_type
=
2088 LLVMIntTypeInContext(ctx
->ac
.context
, instr
->def
.bit_size
);
2090 for (unsigned i
= 0; i
< instr
->def
.num_components
; ++i
) {
2091 switch (instr
->def
.bit_size
) {
2093 values
[i
] = LLVMConstInt(element_type
,
2094 instr
->value
.u32
[i
], false);
2097 values
[i
] = LLVMConstInt(element_type
,
2098 instr
->value
.u64
[i
], false);
2102 "unsupported nir load_const bit_size: %d\n",
2103 instr
->def
.bit_size
);
2107 if (instr
->def
.num_components
> 1) {
2108 value
= LLVMConstVector(values
, instr
->def
.num_components
);
2112 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, value
);
2115 static LLVMValueRef
cast_ptr(struct nir_to_llvm_context
*ctx
, LLVMValueRef ptr
,
2118 int addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
2119 return LLVMBuildBitCast(ctx
->builder
, ptr
,
2120 LLVMPointerType(type
, addr_space
), "");
2124 get_buffer_size(struct ac_nir_context
*ctx
, LLVMValueRef descriptor
, bool in_elements
)
2127 LLVMBuildExtractElement(ctx
->ac
.builder
, descriptor
,
2128 LLVMConstInt(ctx
->ac
.i32
, 2, false), "");
2131 if (ctx
->ac
.chip_class
== VI
&& in_elements
) {
2132 /* On VI, the descriptor contains the size in bytes,
2133 * but TXQ must return the size in elements.
2134 * The stride is always non-zero for resources using TXQ.
2136 LLVMValueRef stride
=
2137 LLVMBuildExtractElement(ctx
->ac
.builder
, descriptor
,
2139 stride
= LLVMBuildLShr(ctx
->ac
.builder
, stride
,
2140 LLVMConstInt(ctx
->ac
.i32
, 16, false), "");
2141 stride
= LLVMBuildAnd(ctx
->ac
.builder
, stride
,
2142 LLVMConstInt(ctx
->ac
.i32
, 0x3fff, false), "");
2144 size
= LLVMBuildUDiv(ctx
->ac
.builder
, size
, stride
, "");
2150 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
2153 static void build_int_type_name(
2155 char *buf
, unsigned bufsize
)
2157 assert(bufsize
>= 6);
2159 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
2160 snprintf(buf
, bufsize
, "v%ui32",
2161 LLVMGetVectorSize(type
));
2166 static LLVMValueRef
radv_lower_gather4_integer(struct ac_llvm_context
*ctx
,
2167 struct ac_image_args
*args
,
2168 const nir_tex_instr
*instr
)
2170 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
2171 LLVMValueRef coord
= args
->addr
;
2172 LLVMValueRef half_texel
[2];
2173 LLVMValueRef compare_cube_wa
= NULL
;
2174 LLVMValueRef result
;
2176 unsigned coord_vgpr_index
= (unsigned)args
->offset
+ (unsigned)args
->compare
;
2180 struct ac_image_args txq_args
= { 0 };
2182 txq_args
.da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
2183 txq_args
.opcode
= ac_image_get_resinfo
;
2184 txq_args
.dmask
= 0xf;
2185 txq_args
.addr
= ctx
->i32_0
;
2186 txq_args
.resource
= args
->resource
;
2187 LLVMValueRef size
= ac_build_image_opcode(ctx
, &txq_args
);
2189 for (c
= 0; c
< 2; c
++) {
2190 half_texel
[c
] = LLVMBuildExtractElement(ctx
->builder
, size
,
2191 LLVMConstInt(ctx
->i32
, c
, false), "");
2192 half_texel
[c
] = LLVMBuildUIToFP(ctx
->builder
, half_texel
[c
], ctx
->f32
, "");
2193 half_texel
[c
] = ac_build_fdiv(ctx
, ctx
->f32_1
, half_texel
[c
]);
2194 half_texel
[c
] = LLVMBuildFMul(ctx
->builder
, half_texel
[c
],
2195 LLVMConstReal(ctx
->f32
, -0.5), "");
2199 LLVMValueRef orig_coords
= args
->addr
;
2201 for (c
= 0; c
< 2; c
++) {
2203 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
2204 tmp
= LLVMBuildExtractElement(ctx
->builder
, coord
, index
, "");
2205 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
2206 tmp
= LLVMBuildFAdd(ctx
->builder
, tmp
, half_texel
[c
], "");
2207 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
2208 coord
= LLVMBuildInsertElement(ctx
->builder
, coord
, tmp
, index
, "");
2213 * Apparantly cube has issue with integer types that the workaround doesn't solve,
2214 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
2215 * workaround by sampling using a scaled type and converting.
2216 * This is taken from amdgpu-pro shaders.
2218 /* NOTE this produces some ugly code compared to amdgpu-pro,
2219 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
2220 * and then reads them back. -pro generates two selects,
2221 * one s_cmp for the descriptor rewriting
2222 * one v_cmp for the coordinate and result changes.
2224 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
) {
2225 LLVMValueRef tmp
, tmp2
;
2227 /* workaround 8/8/8/8 uint/sint cube gather bug */
2228 /* first detect it then change to a scaled read and f2i */
2229 tmp
= LLVMBuildExtractElement(ctx
->builder
, args
->resource
, ctx
->i32_1
, "");
2232 /* extract the DATA_FORMAT */
2233 tmp
= ac_build_bfe(ctx
, tmp
, LLVMConstInt(ctx
->i32
, 20, false),
2234 LLVMConstInt(ctx
->i32
, 6, false), false);
2236 /* is the DATA_FORMAT == 8_8_8_8 */
2237 compare_cube_wa
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, tmp
, LLVMConstInt(ctx
->i32
, V_008F14_IMG_DATA_FORMAT_8_8_8_8
, false), "");
2239 if (stype
== GLSL_TYPE_UINT
)
2240 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
2241 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, LLVMConstInt(ctx
->i32
, 0x8000000, false),
2242 LLVMConstInt(ctx
->i32
, 0x10000000, false), "");
2244 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
2245 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, LLVMConstInt(ctx
->i32
, 0xc000000, false),
2246 LLVMConstInt(ctx
->i32
, 0x14000000, false), "");
2248 /* replace the NUM FORMAT in the descriptor */
2249 tmp2
= LLVMBuildAnd(ctx
->builder
, tmp2
, LLVMConstInt(ctx
->i32
, C_008F14_NUM_FORMAT_GFX6
, false), "");
2250 tmp2
= LLVMBuildOr(ctx
->builder
, tmp2
, tmp
, "");
2252 args
->resource
= LLVMBuildInsertElement(ctx
->builder
, args
->resource
, tmp2
, ctx
->i32_1
, "");
2254 /* don't modify the coordinates for this case */
2255 coord
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, orig_coords
, coord
, "");
2258 result
= ac_build_image_opcode(ctx
, args
);
2260 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
) {
2261 LLVMValueRef tmp
, tmp2
;
2263 /* if the cube workaround is in place, f2i the result. */
2264 for (c
= 0; c
< 4; c
++) {
2265 tmp
= LLVMBuildExtractElement(ctx
->builder
, result
, LLVMConstInt(ctx
->i32
, c
, false), "");
2266 if (stype
== GLSL_TYPE_UINT
)
2267 tmp2
= LLVMBuildFPToUI(ctx
->builder
, tmp
, ctx
->i32
, "");
2269 tmp2
= LLVMBuildFPToSI(ctx
->builder
, tmp
, ctx
->i32
, "");
2270 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
2271 tmp2
= LLVMBuildBitCast(ctx
->builder
, tmp2
, ctx
->i32
, "");
2272 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, tmp2
, tmp
, "");
2273 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
2274 result
= LLVMBuildInsertElement(ctx
->builder
, result
, tmp
, LLVMConstInt(ctx
->i32
, c
, false), "");
2280 static LLVMValueRef
build_tex_intrinsic(struct ac_nir_context
*ctx
,
2281 const nir_tex_instr
*instr
,
2283 struct ac_image_args
*args
)
2285 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
2286 unsigned mask
= nir_ssa_def_components_read(&instr
->dest
.ssa
);
2288 return ac_build_buffer_load_format(&ctx
->ac
,
2292 util_last_bit(mask
),
2296 args
->opcode
= ac_image_sample
;
2297 args
->compare
= instr
->is_shadow
;
2299 switch (instr
->op
) {
2301 case nir_texop_txf_ms
:
2302 case nir_texop_samples_identical
:
2303 args
->opcode
= lod_is_zero
||
2304 instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
?
2305 ac_image_load
: ac_image_load_mip
;
2306 args
->compare
= false;
2307 args
->offset
= false;
2314 args
->level_zero
= true;
2319 case nir_texop_query_levels
:
2320 args
->opcode
= ac_image_get_resinfo
;
2323 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
2324 args
->level_zero
= true;
2330 args
->opcode
= ac_image_gather4
;
2331 args
->level_zero
= true;
2334 args
->opcode
= ac_image_get_lod
;
2335 args
->compare
= false;
2336 args
->offset
= false;
2342 if (instr
->op
== nir_texop_tg4
&& ctx
->ac
.chip_class
<= VI
) {
2343 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
2344 if (stype
== GLSL_TYPE_UINT
|| stype
== GLSL_TYPE_INT
) {
2345 return radv_lower_gather4_integer(&ctx
->ac
, args
, instr
);
2348 return ac_build_image_opcode(&ctx
->ac
, args
);
2351 static LLVMValueRef
visit_vulkan_resource_index(struct nir_to_llvm_context
*ctx
,
2352 nir_intrinsic_instr
*instr
)
2354 LLVMValueRef index
= get_src(ctx
->nir
, instr
->src
[0]);
2355 unsigned desc_set
= nir_intrinsic_desc_set(instr
);
2356 unsigned binding
= nir_intrinsic_binding(instr
);
2357 LLVMValueRef desc_ptr
= ctx
->descriptor_sets
[desc_set
];
2358 struct radv_pipeline_layout
*pipeline_layout
= ctx
->options
->layout
;
2359 struct radv_descriptor_set_layout
*layout
= pipeline_layout
->set
[desc_set
].layout
;
2360 unsigned base_offset
= layout
->binding
[binding
].offset
;
2361 LLVMValueRef offset
, stride
;
2363 if (layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
||
2364 layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
) {
2365 unsigned idx
= pipeline_layout
->set
[desc_set
].dynamic_offset_start
+
2366 layout
->binding
[binding
].dynamic_offset_offset
;
2367 desc_ptr
= ctx
->push_constants
;
2368 base_offset
= pipeline_layout
->push_constant_size
+ 16 * idx
;
2369 stride
= LLVMConstInt(ctx
->ac
.i32
, 16, false);
2371 stride
= LLVMConstInt(ctx
->ac
.i32
, layout
->binding
[binding
].size
, false);
2373 offset
= LLVMConstInt(ctx
->ac
.i32
, base_offset
, false);
2374 index
= LLVMBuildMul(ctx
->builder
, index
, stride
, "");
2375 offset
= LLVMBuildAdd(ctx
->builder
, offset
, index
, "");
2377 desc_ptr
= ac_build_gep0(&ctx
->ac
, desc_ptr
, offset
);
2378 desc_ptr
= cast_ptr(ctx
, desc_ptr
, ctx
->ac
.v4i32
);
2379 LLVMSetMetadata(desc_ptr
, ctx
->ac
.uniform_md_kind
, ctx
->ac
.empty_md
);
2384 static LLVMValueRef
visit_vulkan_resource_reindex(struct nir_to_llvm_context
*ctx
,
2385 nir_intrinsic_instr
*instr
)
2387 LLVMValueRef ptr
= get_src(ctx
->nir
, instr
->src
[0]);
2388 LLVMValueRef index
= get_src(ctx
->nir
, instr
->src
[1]);
2390 LLVMValueRef result
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
2391 LLVMSetMetadata(result
, ctx
->ac
.uniform_md_kind
, ctx
->ac
.empty_md
);
2395 static LLVMValueRef
visit_load_push_constant(struct nir_to_llvm_context
*ctx
,
2396 nir_intrinsic_instr
*instr
)
2398 LLVMValueRef ptr
, addr
;
2400 addr
= LLVMConstInt(ctx
->ac
.i32
, nir_intrinsic_base(instr
), 0);
2401 addr
= LLVMBuildAdd(ctx
->builder
, addr
, get_src(ctx
->nir
, instr
->src
[0]), "");
2403 ptr
= ac_build_gep0(&ctx
->ac
, ctx
->push_constants
, addr
);
2404 ptr
= cast_ptr(ctx
, ptr
, get_def_type(ctx
->nir
, &instr
->dest
.ssa
));
2406 return LLVMBuildLoad(ctx
->builder
, ptr
, "");
2409 static LLVMValueRef
visit_get_buffer_size(struct ac_nir_context
*ctx
,
2410 const nir_intrinsic_instr
*instr
)
2412 LLVMValueRef index
= get_src(ctx
, instr
->src
[0]);
2414 return get_buffer_size(ctx
, ctx
->abi
->load_ssbo(ctx
->abi
, index
, false), false);
2417 static uint32_t widen_mask(uint32_t mask
, unsigned multiplier
)
2419 uint32_t new_mask
= 0;
2420 for(unsigned i
= 0; i
< 32 && (1u << i
) <= mask
; ++i
)
2421 if (mask
& (1u << i
))
2422 new_mask
|= ((1u << multiplier
) - 1u) << (i
* multiplier
);
2426 static LLVMValueRef
extract_vector_range(struct ac_llvm_context
*ctx
, LLVMValueRef src
,
2427 unsigned start
, unsigned count
)
2429 LLVMTypeRef type
= LLVMTypeOf(src
);
2431 if (LLVMGetTypeKind(type
) != LLVMVectorTypeKind
) {
2437 unsigned src_elements
= LLVMGetVectorSize(type
);
2438 assert(start
< src_elements
);
2439 assert(start
+ count
<= src_elements
);
2441 if (start
== 0 && count
== src_elements
)
2445 return LLVMBuildExtractElement(ctx
->builder
, src
, LLVMConstInt(ctx
->i32
, start
, false), "");
2448 LLVMValueRef indices
[8];
2449 for (unsigned i
= 0; i
< count
; ++i
)
2450 indices
[i
] = LLVMConstInt(ctx
->i32
, start
+ i
, false);
2452 LLVMValueRef swizzle
= LLVMConstVector(indices
, count
);
2453 return LLVMBuildShuffleVector(ctx
->builder
, src
, src
, swizzle
, "");
2456 static void visit_store_ssbo(struct ac_nir_context
*ctx
,
2457 nir_intrinsic_instr
*instr
)
2459 const char *store_name
;
2460 LLVMValueRef src_data
= get_src(ctx
, instr
->src
[0]);
2461 LLVMTypeRef data_type
= ctx
->ac
.f32
;
2462 int elem_size_mult
= get_elem_bits(&ctx
->ac
, LLVMTypeOf(src_data
)) / 32;
2463 int components_32bit
= elem_size_mult
* instr
->num_components
;
2464 unsigned writemask
= nir_intrinsic_write_mask(instr
);
2465 LLVMValueRef base_data
, base_offset
;
2466 LLVMValueRef params
[6];
2468 params
[1] = ctx
->abi
->load_ssbo(ctx
->abi
,
2469 get_src(ctx
, instr
->src
[1]), true);
2470 params
[2] = ctx
->ac
.i32_0
; /* vindex */
2471 params
[4] = ctx
->ac
.i1false
; /* glc */
2472 params
[5] = ctx
->ac
.i1false
; /* slc */
2474 if (components_32bit
> 1)
2475 data_type
= LLVMVectorType(ctx
->ac
.f32
, components_32bit
);
2477 writemask
= widen_mask(writemask
, elem_size_mult
);
2479 base_data
= ac_to_float(&ctx
->ac
, src_data
);
2480 base_data
= trim_vector(&ctx
->ac
, base_data
, instr
->num_components
);
2481 base_data
= LLVMBuildBitCast(ctx
->ac
.builder
, base_data
,
2483 base_offset
= get_src(ctx
, instr
->src
[2]); /* voffset */
2487 LLVMValueRef offset
;
2489 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
2491 /* Due to an LLVM limitation, split 3-element writes
2492 * into a 2-element and a 1-element write. */
2494 writemask
|= 1 << (start
+ 2);
2499 writemask
|= ((1u << (count
- 4)) - 1u) << (start
+ 4);
2504 store_name
= "llvm.amdgcn.buffer.store.v4f32";
2505 } else if (count
== 2) {
2506 store_name
= "llvm.amdgcn.buffer.store.v2f32";
2510 store_name
= "llvm.amdgcn.buffer.store.f32";
2512 data
= extract_vector_range(&ctx
->ac
, base_data
, start
, count
);
2514 offset
= base_offset
;
2516 offset
= LLVMBuildAdd(ctx
->ac
.builder
, offset
, LLVMConstInt(ctx
->ac
.i32
, start
* 4, false), "");
2520 ac_build_intrinsic(&ctx
->ac
, store_name
,
2521 ctx
->ac
.voidt
, params
, 6, 0);
2525 static LLVMValueRef
visit_atomic_ssbo(struct ac_nir_context
*ctx
,
2526 const nir_intrinsic_instr
*instr
)
2529 LLVMValueRef params
[6];
2532 if (instr
->intrinsic
== nir_intrinsic_ssbo_atomic_comp_swap
) {
2533 params
[arg_count
++] = ac_llvm_extract_elem(&ctx
->ac
, get_src(ctx
, instr
->src
[3]), 0);
2535 params
[arg_count
++] = ac_llvm_extract_elem(&ctx
->ac
, get_src(ctx
, instr
->src
[2]), 0);
2536 params
[arg_count
++] = ctx
->abi
->load_ssbo(ctx
->abi
,
2537 get_src(ctx
, instr
->src
[0]),
2539 params
[arg_count
++] = ctx
->ac
.i32_0
; /* vindex */
2540 params
[arg_count
++] = get_src(ctx
, instr
->src
[1]); /* voffset */
2541 params
[arg_count
++] = LLVMConstInt(ctx
->ac
.i1
, 0, false); /* slc */
2543 switch (instr
->intrinsic
) {
2544 case nir_intrinsic_ssbo_atomic_add
:
2545 name
= "llvm.amdgcn.buffer.atomic.add";
2547 case nir_intrinsic_ssbo_atomic_imin
:
2548 name
= "llvm.amdgcn.buffer.atomic.smin";
2550 case nir_intrinsic_ssbo_atomic_umin
:
2551 name
= "llvm.amdgcn.buffer.atomic.umin";
2553 case nir_intrinsic_ssbo_atomic_imax
:
2554 name
= "llvm.amdgcn.buffer.atomic.smax";
2556 case nir_intrinsic_ssbo_atomic_umax
:
2557 name
= "llvm.amdgcn.buffer.atomic.umax";
2559 case nir_intrinsic_ssbo_atomic_and
:
2560 name
= "llvm.amdgcn.buffer.atomic.and";
2562 case nir_intrinsic_ssbo_atomic_or
:
2563 name
= "llvm.amdgcn.buffer.atomic.or";
2565 case nir_intrinsic_ssbo_atomic_xor
:
2566 name
= "llvm.amdgcn.buffer.atomic.xor";
2568 case nir_intrinsic_ssbo_atomic_exchange
:
2569 name
= "llvm.amdgcn.buffer.atomic.swap";
2571 case nir_intrinsic_ssbo_atomic_comp_swap
:
2572 name
= "llvm.amdgcn.buffer.atomic.cmpswap";
2578 return ac_build_intrinsic(&ctx
->ac
, name
, ctx
->ac
.i32
, params
, arg_count
, 0);
2581 static LLVMValueRef
visit_load_buffer(struct ac_nir_context
*ctx
,
2582 const nir_intrinsic_instr
*instr
)
2584 LLVMValueRef results
[2];
2585 int load_components
;
2586 int num_components
= instr
->num_components
;
2587 if (instr
->dest
.ssa
.bit_size
== 64)
2588 num_components
*= 2;
2590 for (int i
= 0; i
< num_components
; i
+= load_components
) {
2591 load_components
= MIN2(num_components
- i
, 4);
2592 const char *load_name
;
2593 LLVMTypeRef data_type
= ctx
->ac
.f32
;
2594 LLVMValueRef offset
= LLVMConstInt(ctx
->ac
.i32
, i
* 4, false);
2595 offset
= LLVMBuildAdd(ctx
->ac
.builder
, get_src(ctx
, instr
->src
[1]), offset
, "");
2597 if (load_components
== 3)
2598 data_type
= LLVMVectorType(ctx
->ac
.f32
, 4);
2599 else if (load_components
> 1)
2600 data_type
= LLVMVectorType(ctx
->ac
.f32
, load_components
);
2602 if (load_components
>= 3)
2603 load_name
= "llvm.amdgcn.buffer.load.v4f32";
2604 else if (load_components
== 2)
2605 load_name
= "llvm.amdgcn.buffer.load.v2f32";
2606 else if (load_components
== 1)
2607 load_name
= "llvm.amdgcn.buffer.load.f32";
2609 unreachable("unhandled number of components");
2611 LLVMValueRef params
[] = {
2612 ctx
->abi
->load_ssbo(ctx
->abi
,
2613 get_src(ctx
, instr
->src
[0]),
2621 results
[i
> 0 ? 1 : 0] = ac_build_intrinsic(&ctx
->ac
, load_name
, data_type
, params
, 5, 0);
2625 LLVMValueRef ret
= results
[0];
2626 if (num_components
> 4 || num_components
== 3) {
2627 LLVMValueRef masks
[] = {
2628 LLVMConstInt(ctx
->ac
.i32
, 0, false), LLVMConstInt(ctx
->ac
.i32
, 1, false),
2629 LLVMConstInt(ctx
->ac
.i32
, 2, false), LLVMConstInt(ctx
->ac
.i32
, 3, false),
2630 LLVMConstInt(ctx
->ac
.i32
, 4, false), LLVMConstInt(ctx
->ac
.i32
, 5, false),
2631 LLVMConstInt(ctx
->ac
.i32
, 6, false), LLVMConstInt(ctx
->ac
.i32
, 7, false)
2634 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
2635 ret
= LLVMBuildShuffleVector(ctx
->ac
.builder
, results
[0],
2636 results
[num_components
> 4 ? 1 : 0], swizzle
, "");
2639 return LLVMBuildBitCast(ctx
->ac
.builder
, ret
,
2640 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2643 static LLVMValueRef
visit_load_ubo_buffer(struct ac_nir_context
*ctx
,
2644 const nir_intrinsic_instr
*instr
)
2647 LLVMValueRef rsrc
= get_src(ctx
, instr
->src
[0]);
2648 LLVMValueRef offset
= get_src(ctx
, instr
->src
[1]);
2649 int num_components
= instr
->num_components
;
2651 if (ctx
->abi
->load_ubo
)
2652 rsrc
= ctx
->abi
->load_ubo(ctx
->abi
, rsrc
);
2654 if (instr
->dest
.ssa
.bit_size
== 64)
2655 num_components
*= 2;
2657 ret
= ac_build_buffer_load(&ctx
->ac
, rsrc
, num_components
, NULL
, offset
,
2658 NULL
, 0, false, false, true, true);
2659 ret
= trim_vector(&ctx
->ac
, ret
, num_components
);
2660 return LLVMBuildBitCast(ctx
->ac
.builder
, ret
,
2661 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2665 get_deref_offset(struct ac_nir_context
*ctx
, nir_deref_var
*deref
,
2666 bool vs_in
, unsigned *vertex_index_out
,
2667 LLVMValueRef
*vertex_index_ref
,
2668 unsigned *const_out
, LLVMValueRef
*indir_out
)
2670 unsigned const_offset
= 0;
2671 nir_deref
*tail
= &deref
->deref
;
2672 LLVMValueRef offset
= NULL
;
2674 if (vertex_index_out
!= NULL
|| vertex_index_ref
!= NULL
) {
2676 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2677 if (vertex_index_out
)
2678 *vertex_index_out
= deref_array
->base_offset
;
2680 if (vertex_index_ref
) {
2681 LLVMValueRef vtx
= LLVMConstInt(ctx
->ac
.i32
, deref_array
->base_offset
, false);
2682 if (deref_array
->deref_array_type
== nir_deref_array_type_indirect
) {
2683 vtx
= LLVMBuildAdd(ctx
->ac
.builder
, vtx
, get_src(ctx
, deref_array
->indirect
), "");
2685 *vertex_index_ref
= vtx
;
2689 if (deref
->var
->data
.compact
) {
2690 assert(tail
->child
->deref_type
== nir_deref_type_array
);
2691 assert(glsl_type_is_scalar(glsl_without_array(deref
->var
->type
)));
2692 nir_deref_array
*deref_array
= nir_deref_as_array(tail
->child
);
2693 /* We always lower indirect dereferences for "compact" array vars. */
2694 assert(deref_array
->deref_array_type
== nir_deref_array_type_direct
);
2696 const_offset
= deref_array
->base_offset
;
2700 while (tail
->child
!= NULL
) {
2701 const struct glsl_type
*parent_type
= tail
->type
;
2704 if (tail
->deref_type
== nir_deref_type_array
) {
2705 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2706 LLVMValueRef index
, stride
, local_offset
;
2707 unsigned size
= glsl_count_attribute_slots(tail
->type
, vs_in
);
2709 const_offset
+= size
* deref_array
->base_offset
;
2710 if (deref_array
->deref_array_type
== nir_deref_array_type_direct
)
2713 assert(deref_array
->deref_array_type
== nir_deref_array_type_indirect
);
2714 index
= get_src(ctx
, deref_array
->indirect
);
2715 stride
= LLVMConstInt(ctx
->ac
.i32
, size
, 0);
2716 local_offset
= LLVMBuildMul(ctx
->ac
.builder
, stride
, index
, "");
2719 offset
= LLVMBuildAdd(ctx
->ac
.builder
, offset
, local_offset
, "");
2721 offset
= local_offset
;
2722 } else if (tail
->deref_type
== nir_deref_type_struct
) {
2723 nir_deref_struct
*deref_struct
= nir_deref_as_struct(tail
);
2725 for (unsigned i
= 0; i
< deref_struct
->index
; i
++) {
2726 const struct glsl_type
*ft
= glsl_get_struct_field(parent_type
, i
);
2727 const_offset
+= glsl_count_attribute_slots(ft
, vs_in
);
2730 unreachable("unsupported deref type");
2734 if (const_offset
&& offset
)
2735 offset
= LLVMBuildAdd(ctx
->ac
.builder
, offset
,
2736 LLVMConstInt(ctx
->ac
.i32
, const_offset
, 0),
2739 *const_out
= const_offset
;
2740 *indir_out
= offset
;
2744 /* The offchip buffer layout for TCS->TES is
2746 * - attribute 0 of patch 0 vertex 0
2747 * - attribute 0 of patch 0 vertex 1
2748 * - attribute 0 of patch 0 vertex 2
2750 * - attribute 0 of patch 1 vertex 0
2751 * - attribute 0 of patch 1 vertex 1
2753 * - attribute 1 of patch 0 vertex 0
2754 * - attribute 1 of patch 0 vertex 1
2756 * - per patch attribute 0 of patch 0
2757 * - per patch attribute 0 of patch 1
2760 * Note that every attribute has 4 components.
2762 static LLVMValueRef
get_tcs_tes_buffer_address(struct nir_to_llvm_context
*ctx
,
2763 LLVMValueRef vertex_index
,
2764 LLVMValueRef param_index
)
2766 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
2767 LLVMValueRef param_stride
, constant16
;
2768 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
2770 vertices_per_patch
= unpack_param(&ctx
->ac
, ctx
->tcs_offchip_layout
, 9, 6);
2771 num_patches
= unpack_param(&ctx
->ac
, ctx
->tcs_offchip_layout
, 0, 9);
2772 total_vertices
= LLVMBuildMul(ctx
->builder
, vertices_per_patch
,
2775 constant16
= LLVMConstInt(ctx
->ac
.i32
, 16, false);
2777 base_addr
= LLVMBuildMul(ctx
->builder
, rel_patch_id
,
2778 vertices_per_patch
, "");
2780 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2783 param_stride
= total_vertices
;
2785 base_addr
= rel_patch_id
;
2786 param_stride
= num_patches
;
2789 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2790 LLVMBuildMul(ctx
->builder
, param_index
,
2791 param_stride
, ""), "");
2793 base_addr
= LLVMBuildMul(ctx
->builder
, base_addr
, constant16
, "");
2795 if (!vertex_index
) {
2796 LLVMValueRef patch_data_offset
=
2797 unpack_param(&ctx
->ac
, ctx
->tcs_offchip_layout
, 16, 16);
2799 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2800 patch_data_offset
, "");
2805 static LLVMValueRef
get_tcs_tes_buffer_address_params(struct nir_to_llvm_context
*ctx
,
2807 unsigned const_index
,
2809 LLVMValueRef vertex_index
,
2810 LLVMValueRef indir_index
)
2812 LLVMValueRef param_index
;
2815 param_index
= LLVMBuildAdd(ctx
->builder
, LLVMConstInt(ctx
->ac
.i32
, param
, false),
2818 if (const_index
&& !is_compact
)
2819 param
+= const_index
;
2820 param_index
= LLVMConstInt(ctx
->ac
.i32
, param
, false);
2822 return get_tcs_tes_buffer_address(ctx
, vertex_index
, param_index
);
2826 mark_tess_output(struct nir_to_llvm_context
*ctx
,
2827 bool is_patch
, uint32_t param
)
2831 ctx
->tess_patch_outputs_written
|= (1ull << param
);
2833 ctx
->tess_outputs_written
|= (1ull << param
);
2837 get_dw_address(struct nir_to_llvm_context
*ctx
,
2838 LLVMValueRef dw_addr
,
2840 unsigned const_index
,
2841 bool compact_const_index
,
2842 LLVMValueRef vertex_index
,
2843 LLVMValueRef stride
,
2844 LLVMValueRef indir_index
)
2849 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2850 LLVMBuildMul(ctx
->builder
,
2856 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2857 LLVMBuildMul(ctx
->builder
, indir_index
,
2858 LLVMConstInt(ctx
->ac
.i32
, 4, false), ""), "");
2859 else if (const_index
&& !compact_const_index
)
2860 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2861 LLVMConstInt(ctx
->ac
.i32
, const_index
, false), "");
2863 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2864 LLVMConstInt(ctx
->ac
.i32
, param
* 4, false), "");
2866 if (const_index
&& compact_const_index
)
2867 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2868 LLVMConstInt(ctx
->ac
.i32
, const_index
, false), "");
2873 load_tcs_varyings(struct ac_shader_abi
*abi
,
2874 LLVMValueRef vertex_index
,
2875 LLVMValueRef indir_index
,
2876 unsigned const_index
,
2878 unsigned driver_location
,
2880 unsigned num_components
,
2885 struct nir_to_llvm_context
*ctx
= nir_to_llvm_context_from_abi(abi
);
2886 LLVMValueRef dw_addr
, stride
;
2887 LLVMValueRef value
[4], result
;
2888 unsigned param
= shader_io_get_unique_index(location
);
2891 stride
= unpack_param(&ctx
->ac
, ctx
->tcs_in_layout
, 13, 8);
2892 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
2895 stride
= unpack_param(&ctx
->ac
, ctx
->tcs_out_layout
, 13, 8);
2896 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
2898 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
2903 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2906 for (unsigned i
= 0; i
< num_components
+ component
; i
++) {
2907 value
[i
] = ac_lds_load(&ctx
->ac
, dw_addr
);
2908 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2911 result
= ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
2916 store_tcs_output(struct ac_shader_abi
*abi
,
2917 LLVMValueRef vertex_index
,
2918 LLVMValueRef param_index
,
2919 unsigned const_index
,
2921 unsigned driver_location
,
2928 struct nir_to_llvm_context
*ctx
= nir_to_llvm_context_from_abi(abi
);
2929 LLVMValueRef dw_addr
;
2930 LLVMValueRef stride
= NULL
;
2931 LLVMValueRef buf_addr
= NULL
;
2933 bool store_lds
= true;
2936 if (!(ctx
->tcs_patch_outputs_read
& (1U << (location
- VARYING_SLOT_PATCH0
))))
2939 if (!(ctx
->tcs_outputs_read
& (1ULL << location
)))
2943 param
= shader_io_get_unique_index(location
);
2944 if (location
== VARYING_SLOT_CLIP_DIST0
&&
2945 is_compact
&& const_index
> 3) {
2951 stride
= unpack_param(&ctx
->ac
, ctx
->tcs_out_layout
, 13, 8);
2952 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
2954 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
2957 mark_tess_output(ctx
, is_patch
, param
);
2959 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2961 buf_addr
= get_tcs_tes_buffer_address_params(ctx
, param
, const_index
, is_compact
,
2962 vertex_index
, param_index
);
2964 bool is_tess_factor
= false;
2965 if (location
== VARYING_SLOT_TESS_LEVEL_INNER
||
2966 location
== VARYING_SLOT_TESS_LEVEL_OUTER
)
2967 is_tess_factor
= true;
2969 unsigned base
= is_compact
? const_index
: 0;
2970 for (unsigned chan
= 0; chan
< 8; chan
++) {
2971 if (!(writemask
& (1 << chan
)))
2973 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
2975 if (store_lds
|| is_tess_factor
) {
2976 LLVMValueRef dw_addr_chan
=
2977 LLVMBuildAdd(ctx
->builder
, dw_addr
,
2978 LLVMConstInt(ctx
->ac
.i32
, chan
, false), "");
2979 ac_lds_store(&ctx
->ac
, dw_addr_chan
, value
);
2982 if (!is_tess_factor
&& writemask
!= 0xF)
2983 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, value
, 1,
2984 buf_addr
, ctx
->oc_lds
,
2985 4 * (base
+ chan
), 1, 0, true, false);
2988 if (writemask
== 0xF) {
2989 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, src
, 4,
2990 buf_addr
, ctx
->oc_lds
,
2991 (base
* 4), 1, 0, true, false);
2996 load_tes_input(struct ac_shader_abi
*abi
,
2997 LLVMValueRef vertex_index
,
2998 LLVMValueRef param_index
,
2999 unsigned const_index
,
3001 unsigned driver_location
,
3003 unsigned num_components
,
3008 struct nir_to_llvm_context
*ctx
= nir_to_llvm_context_from_abi(abi
);
3009 LLVMValueRef buf_addr
;
3010 LLVMValueRef result
;
3011 unsigned param
= shader_io_get_unique_index(location
);
3013 if (location
== VARYING_SLOT_CLIP_DIST0
&& is_compact
&& const_index
> 3) {
3018 buf_addr
= get_tcs_tes_buffer_address_params(ctx
, param
, const_index
,
3019 is_compact
, vertex_index
, param_index
);
3021 LLVMValueRef comp_offset
= LLVMConstInt(ctx
->ac
.i32
, component
* 4, false);
3022 buf_addr
= LLVMBuildAdd(ctx
->builder
, buf_addr
, comp_offset
, "");
3024 result
= ac_build_buffer_load(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, num_components
, NULL
,
3025 buf_addr
, ctx
->oc_lds
, is_compact
? (4 * const_index
) : 0, 1, 0, true, false);
3026 result
= trim_vector(&ctx
->ac
, result
, num_components
);
3031 load_gs_input(struct ac_shader_abi
*abi
,
3033 unsigned driver_location
,
3035 unsigned num_components
,
3036 unsigned vertex_index
,
3037 unsigned const_index
,
3040 struct nir_to_llvm_context
*ctx
= nir_to_llvm_context_from_abi(abi
);
3041 LLVMValueRef vtx_offset
;
3042 LLVMValueRef args
[9];
3043 unsigned param
, vtx_offset_param
;
3044 LLVMValueRef value
[4], result
;
3046 vtx_offset_param
= vertex_index
;
3047 assert(vtx_offset_param
< 6);
3048 vtx_offset
= LLVMBuildMul(ctx
->builder
, ctx
->gs_vtx_offset
[vtx_offset_param
],
3049 LLVMConstInt(ctx
->ac
.i32
, 4, false), "");
3051 param
= shader_io_get_unique_index(location
);
3053 for (unsigned i
= component
; i
< num_components
+ component
; i
++) {
3054 if (ctx
->ac
.chip_class
>= GFX9
) {
3055 LLVMValueRef dw_addr
= ctx
->gs_vtx_offset
[vtx_offset_param
];
3056 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
3057 LLVMConstInt(ctx
->ac
.i32
, param
* 4 + i
+ const_index
, 0), "");
3058 value
[i
] = ac_lds_load(&ctx
->ac
, dw_addr
);
3060 args
[0] = ctx
->esgs_ring
;
3061 args
[1] = vtx_offset
;
3062 args
[2] = LLVMConstInt(ctx
->ac
.i32
, (param
* 4 + i
+ const_index
) * 256, false);
3063 args
[3] = ctx
->ac
.i32_0
;
3064 args
[4] = ctx
->ac
.i32_1
; /* OFFEN */
3065 args
[5] = ctx
->ac
.i32_0
; /* IDXEN */
3066 args
[6] = ctx
->ac
.i32_1
; /* GLC */
3067 args
[7] = ctx
->ac
.i32_0
; /* SLC */
3068 args
[8] = ctx
->ac
.i32_0
; /* TFE */
3070 value
[i
] = ac_build_intrinsic(&ctx
->ac
, "llvm.SI.buffer.load.dword.i32.i32",
3071 ctx
->ac
.i32
, args
, 9,
3072 AC_FUNC_ATTR_READONLY
|
3073 AC_FUNC_ATTR_LEGACY
);
3076 result
= ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
3082 build_gep_for_deref(struct ac_nir_context
*ctx
,
3083 nir_deref_var
*deref
)
3085 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->vars
, deref
->var
);
3086 assert(entry
->data
);
3087 LLVMValueRef val
= entry
->data
;
3088 nir_deref
*tail
= deref
->deref
.child
;
3089 while (tail
!= NULL
) {
3090 LLVMValueRef offset
;
3091 switch (tail
->deref_type
) {
3092 case nir_deref_type_array
: {
3093 nir_deref_array
*array
= nir_deref_as_array(tail
);
3094 offset
= LLVMConstInt(ctx
->ac
.i32
, array
->base_offset
, 0);
3095 if (array
->deref_array_type
==
3096 nir_deref_array_type_indirect
) {
3097 offset
= LLVMBuildAdd(ctx
->ac
.builder
, offset
,
3104 case nir_deref_type_struct
: {
3105 nir_deref_struct
*deref_struct
=
3106 nir_deref_as_struct(tail
);
3107 offset
= LLVMConstInt(ctx
->ac
.i32
,
3108 deref_struct
->index
, 0);
3112 unreachable("bad deref type");
3114 val
= ac_build_gep0(&ctx
->ac
, val
, offset
);
3120 static LLVMValueRef
load_tess_varyings(struct ac_nir_context
*ctx
,
3121 nir_intrinsic_instr
*instr
,
3124 LLVMValueRef result
;
3125 LLVMValueRef vertex_index
= NULL
;
3126 LLVMValueRef indir_index
= NULL
;
3127 unsigned const_index
= 0;
3128 unsigned location
= instr
->variables
[0]->var
->data
.location
;
3129 unsigned driver_location
= instr
->variables
[0]->var
->data
.driver_location
;
3130 const bool is_patch
= instr
->variables
[0]->var
->data
.patch
;
3131 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
3133 get_deref_offset(ctx
, instr
->variables
[0],
3134 false, NULL
, is_patch
? NULL
: &vertex_index
,
3135 &const_index
, &indir_index
);
3137 result
= ctx
->abi
->load_tess_varyings(ctx
->abi
, vertex_index
, indir_index
,
3138 const_index
, location
, driver_location
,
3139 instr
->variables
[0]->var
->data
.location_frac
,
3140 instr
->num_components
,
3141 is_patch
, is_compact
, load_inputs
);
3142 return LLVMBuildBitCast(ctx
->ac
.builder
, result
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
3145 static LLVMValueRef
visit_load_var(struct ac_nir_context
*ctx
,
3146 nir_intrinsic_instr
*instr
)
3148 LLVMValueRef values
[8];
3149 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
3150 int ve
= instr
->dest
.ssa
.num_components
;
3151 unsigned comp
= instr
->variables
[0]->var
->data
.location_frac
;
3152 LLVMValueRef indir_index
;
3154 unsigned const_index
;
3155 unsigned stride
= instr
->variables
[0]->var
->data
.compact
? 1 : 4;
3156 bool vs_in
= ctx
->stage
== MESA_SHADER_VERTEX
&&
3157 instr
->variables
[0]->var
->data
.mode
== nir_var_shader_in
;
3158 get_deref_offset(ctx
, instr
->variables
[0], vs_in
, NULL
, NULL
,
3159 &const_index
, &indir_index
);
3161 if (instr
->dest
.ssa
.bit_size
== 64)
3164 switch (instr
->variables
[0]->var
->data
.mode
) {
3165 case nir_var_shader_in
:
3166 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
||
3167 ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
3168 return load_tess_varyings(ctx
, instr
, true);
3171 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
3172 LLVMTypeRef type
= LLVMIntTypeInContext(ctx
->ac
.context
, instr
->dest
.ssa
.bit_size
);
3173 LLVMValueRef indir_index
;
3174 unsigned const_index
, vertex_index
;
3175 get_deref_offset(ctx
, instr
->variables
[0],
3176 false, &vertex_index
, NULL
,
3177 &const_index
, &indir_index
);
3179 return ctx
->abi
->load_inputs(ctx
->abi
, instr
->variables
[0]->var
->data
.location
,
3180 instr
->variables
[0]->var
->data
.driver_location
,
3181 instr
->variables
[0]->var
->data
.location_frac
, ve
,
3182 vertex_index
, const_index
, type
);
3185 for (unsigned chan
= comp
; chan
< ve
+ comp
; chan
++) {
3187 unsigned count
= glsl_count_attribute_slots(
3188 instr
->variables
[0]->var
->type
,
3189 ctx
->stage
== MESA_SHADER_VERTEX
);
3191 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
3192 &ctx
->ac
, ctx
->abi
->inputs
+ idx
+ chan
, count
,
3193 stride
, false, true);
3195 values
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
3199 values
[chan
] = ctx
->abi
->inputs
[idx
+ chan
+ const_index
* stride
];
3203 for (unsigned chan
= 0; chan
< ve
; chan
++) {
3205 unsigned count
= glsl_count_attribute_slots(
3206 instr
->variables
[0]->var
->type
, false);
3208 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
3209 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
3210 stride
, true, true);
3212 values
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
3216 values
[chan
] = LLVMBuildLoad(ctx
->ac
.builder
, ctx
->locals
[idx
+ chan
+ const_index
* stride
], "");
3220 case nir_var_shared
: {
3221 LLVMValueRef address
= build_gep_for_deref(ctx
,
3222 instr
->variables
[0]);
3223 LLVMValueRef val
= LLVMBuildLoad(ctx
->ac
.builder
, address
, "");
3224 return LLVMBuildBitCast(ctx
->ac
.builder
, val
,
3225 get_def_type(ctx
, &instr
->dest
.ssa
),
3228 case nir_var_shader_out
:
3229 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
3230 return load_tess_varyings(ctx
, instr
, false);
3233 for (unsigned chan
= comp
; chan
< ve
+ comp
; chan
++) {
3235 unsigned count
= glsl_count_attribute_slots(
3236 instr
->variables
[0]->var
->type
, false);
3238 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
3239 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
3240 stride
, true, true);
3242 values
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
3246 values
[chan
] = LLVMBuildLoad(ctx
->ac
.builder
,
3247 ctx
->outputs
[idx
+ chan
+ const_index
* stride
],
3253 unreachable("unhandle variable mode");
3255 ret
= ac_build_varying_gather_values(&ctx
->ac
, values
, ve
, comp
);
3256 return LLVMBuildBitCast(ctx
->ac
.builder
, ret
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
3260 visit_store_var(struct ac_nir_context
*ctx
,
3261 nir_intrinsic_instr
*instr
)
3263 LLVMValueRef temp_ptr
, value
;
3264 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
3265 unsigned comp
= instr
->variables
[0]->var
->data
.location_frac
;
3266 LLVMValueRef src
= ac_to_float(&ctx
->ac
, get_src(ctx
, instr
->src
[0]));
3267 int writemask
= instr
->const_index
[0] << comp
;
3268 LLVMValueRef indir_index
;
3269 unsigned const_index
;
3270 get_deref_offset(ctx
, instr
->variables
[0], false,
3271 NULL
, NULL
, &const_index
, &indir_index
);
3273 if (get_elem_bits(&ctx
->ac
, LLVMTypeOf(src
)) == 64) {
3275 src
= LLVMBuildBitCast(ctx
->ac
.builder
, src
,
3276 LLVMVectorType(ctx
->ac
.f32
, ac_get_llvm_num_components(src
) * 2),
3279 writemask
= widen_mask(writemask
, 2);
3282 switch (instr
->variables
[0]->var
->data
.mode
) {
3283 case nir_var_shader_out
:
3285 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
3286 LLVMValueRef vertex_index
= NULL
;
3287 LLVMValueRef indir_index
= NULL
;
3288 unsigned const_index
= 0;
3289 const unsigned location
= instr
->variables
[0]->var
->data
.location
;
3290 const unsigned driver_location
= instr
->variables
[0]->var
->data
.driver_location
;
3291 const unsigned comp
= instr
->variables
[0]->var
->data
.location_frac
;
3292 const bool is_patch
= instr
->variables
[0]->var
->data
.patch
;
3293 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
3295 get_deref_offset(ctx
, instr
->variables
[0],
3296 false, NULL
, is_patch
? NULL
: &vertex_index
,
3297 &const_index
, &indir_index
);
3299 ctx
->abi
->store_tcs_outputs(ctx
->abi
, vertex_index
, indir_index
,
3300 const_index
, location
, driver_location
,
3301 src
, comp
, is_patch
, is_compact
, writemask
);
3305 for (unsigned chan
= 0; chan
< 8; chan
++) {
3307 if (!(writemask
& (1 << chan
)))
3310 value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- comp
);
3312 if (instr
->variables
[0]->var
->data
.compact
)
3315 unsigned count
= glsl_count_attribute_slots(
3316 instr
->variables
[0]->var
->type
, false);
3318 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
3319 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
3320 stride
, true, true);
3322 tmp_vec
= LLVMBuildInsertElement(ctx
->ac
.builder
, tmp_vec
,
3323 value
, indir_index
, "");
3324 build_store_values_extended(&ctx
->ac
, ctx
->outputs
+ idx
+ chan
,
3325 count
, stride
, tmp_vec
);
3328 temp_ptr
= ctx
->outputs
[idx
+ chan
+ const_index
* stride
];
3330 LLVMBuildStore(ctx
->ac
.builder
, value
, temp_ptr
);
3335 for (unsigned chan
= 0; chan
< 8; chan
++) {
3336 if (!(writemask
& (1 << chan
)))
3339 value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
);
3341 unsigned count
= glsl_count_attribute_slots(
3342 instr
->variables
[0]->var
->type
, false);
3344 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
3345 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
3348 tmp_vec
= LLVMBuildInsertElement(ctx
->ac
.builder
, tmp_vec
,
3349 value
, indir_index
, "");
3350 build_store_values_extended(&ctx
->ac
, ctx
->locals
+ idx
+ chan
,
3353 temp_ptr
= ctx
->locals
[idx
+ chan
+ const_index
* 4];
3355 LLVMBuildStore(ctx
->ac
.builder
, value
, temp_ptr
);
3359 case nir_var_shared
: {
3360 int writemask
= instr
->const_index
[0];
3361 LLVMValueRef address
= build_gep_for_deref(ctx
,
3362 instr
->variables
[0]);
3363 LLVMValueRef val
= get_src(ctx
, instr
->src
[0]);
3364 unsigned components
=
3365 glsl_get_vector_elements(
3366 nir_deref_tail(&instr
->variables
[0]->deref
)->type
);
3367 if (writemask
== (1 << components
) - 1) {
3368 val
= LLVMBuildBitCast(
3369 ctx
->ac
.builder
, val
,
3370 LLVMGetElementType(LLVMTypeOf(address
)), "");
3371 LLVMBuildStore(ctx
->ac
.builder
, val
, address
);
3373 for (unsigned chan
= 0; chan
< 4; chan
++) {
3374 if (!(writemask
& (1 << chan
)))
3377 LLVMBuildStructGEP(ctx
->ac
.builder
,
3379 LLVMValueRef src
= ac_llvm_extract_elem(&ctx
->ac
, val
,
3381 src
= LLVMBuildBitCast(
3382 ctx
->ac
.builder
, src
,
3383 LLVMGetElementType(LLVMTypeOf(ptr
)), "");
3384 LLVMBuildStore(ctx
->ac
.builder
, src
, ptr
);
3394 static int image_type_to_components_count(enum glsl_sampler_dim dim
, bool array
)
3397 case GLSL_SAMPLER_DIM_BUF
:
3399 case GLSL_SAMPLER_DIM_1D
:
3400 return array
? 2 : 1;
3401 case GLSL_SAMPLER_DIM_2D
:
3402 return array
? 3 : 2;
3403 case GLSL_SAMPLER_DIM_MS
:
3404 return array
? 4 : 3;
3405 case GLSL_SAMPLER_DIM_3D
:
3406 case GLSL_SAMPLER_DIM_CUBE
:
3408 case GLSL_SAMPLER_DIM_RECT
:
3409 case GLSL_SAMPLER_DIM_SUBPASS
:
3411 case GLSL_SAMPLER_DIM_SUBPASS_MS
:
3421 /* Adjust the sample index according to FMASK.
3423 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3424 * which is the identity mapping. Each nibble says which physical sample
3425 * should be fetched to get that sample.
3427 * For example, 0x11111100 means there are only 2 samples stored and
3428 * the second sample covers 3/4 of the pixel. When reading samples 0
3429 * and 1, return physical sample 0 (determined by the first two 0s
3430 * in FMASK), otherwise return physical sample 1.
3432 * The sample index should be adjusted as follows:
3433 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
3435 static LLVMValueRef
adjust_sample_index_using_fmask(struct ac_llvm_context
*ctx
,
3436 LLVMValueRef coord_x
, LLVMValueRef coord_y
,
3437 LLVMValueRef coord_z
,
3438 LLVMValueRef sample_index
,
3439 LLVMValueRef fmask_desc_ptr
)
3441 LLVMValueRef fmask_load_address
[4];
3444 fmask_load_address
[0] = coord_x
;
3445 fmask_load_address
[1] = coord_y
;
3447 fmask_load_address
[2] = coord_z
;
3448 fmask_load_address
[3] = LLVMGetUndef(ctx
->i32
);
3451 struct ac_image_args args
= {0};
3453 args
.opcode
= ac_image_load
;
3454 args
.da
= coord_z
? true : false;
3455 args
.resource
= fmask_desc_ptr
;
3457 args
.addr
= ac_build_gather_values(ctx
, fmask_load_address
, coord_z
? 4 : 2);
3459 res
= ac_build_image_opcode(ctx
, &args
);
3461 res
= ac_to_integer(ctx
, res
);
3462 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, false);
3463 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xf, false);
3465 LLVMValueRef fmask
= LLVMBuildExtractElement(ctx
->builder
,
3469 LLVMValueRef sample_index4
=
3470 LLVMBuildMul(ctx
->builder
, sample_index
, four
, "");
3471 LLVMValueRef shifted_fmask
=
3472 LLVMBuildLShr(ctx
->builder
, fmask
, sample_index4
, "");
3473 LLVMValueRef final_sample
=
3474 LLVMBuildAnd(ctx
->builder
, shifted_fmask
, F
, "");
3476 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3477 * resource descriptor is 0 (invalid),
3479 LLVMValueRef fmask_desc
=
3480 LLVMBuildBitCast(ctx
->builder
, fmask_desc_ptr
,
3483 LLVMValueRef fmask_word1
=
3484 LLVMBuildExtractElement(ctx
->builder
, fmask_desc
,
3487 LLVMValueRef word1_is_nonzero
=
3488 LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
3489 fmask_word1
, ctx
->i32_0
, "");
3491 /* Replace the MSAA sample index. */
3493 LLVMBuildSelect(ctx
->builder
, word1_is_nonzero
,
3494 final_sample
, sample_index
, "");
3495 return sample_index
;
3498 static LLVMValueRef
get_image_coords(struct ac_nir_context
*ctx
,
3499 const nir_intrinsic_instr
*instr
)
3501 const struct glsl_type
*type
= glsl_without_array(instr
->variables
[0]->var
->type
);
3503 LLVMValueRef src0
= get_src(ctx
, instr
->src
[0]);
3504 LLVMValueRef coords
[4];
3505 LLVMValueRef masks
[] = {
3506 LLVMConstInt(ctx
->ac
.i32
, 0, false), LLVMConstInt(ctx
->ac
.i32
, 1, false),
3507 LLVMConstInt(ctx
->ac
.i32
, 2, false), LLVMConstInt(ctx
->ac
.i32
, 3, false),
3510 LLVMValueRef sample_index
= ac_llvm_extract_elem(&ctx
->ac
, get_src(ctx
, instr
->src
[1]), 0);
3513 enum glsl_sampler_dim dim
= glsl_get_sampler_dim(type
);
3514 bool is_array
= glsl_sampler_type_is_array(type
);
3515 bool add_frag_pos
= (dim
== GLSL_SAMPLER_DIM_SUBPASS
||
3516 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
3517 bool is_ms
= (dim
== GLSL_SAMPLER_DIM_MS
||
3518 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
3519 bool gfx9_1d
= ctx
->ac
.chip_class
>= GFX9
&& dim
== GLSL_SAMPLER_DIM_1D
;
3520 count
= image_type_to_components_count(dim
, is_array
);
3523 LLVMValueRef fmask_load_address
[3];
3526 fmask_load_address
[0] = LLVMBuildExtractElement(ctx
->ac
.builder
, src0
, masks
[0], "");
3527 fmask_load_address
[1] = LLVMBuildExtractElement(ctx
->ac
.builder
, src0
, masks
[1], "");
3529 fmask_load_address
[2] = LLVMBuildExtractElement(ctx
->ac
.builder
, src0
, masks
[2], "");
3531 fmask_load_address
[2] = NULL
;
3533 for (chan
= 0; chan
< 2; ++chan
)
3534 fmask_load_address
[chan
] =
3535 LLVMBuildAdd(ctx
->ac
.builder
, fmask_load_address
[chan
],
3536 LLVMBuildFPToUI(ctx
->ac
.builder
, ctx
->abi
->frag_pos
[chan
],
3537 ctx
->ac
.i32
, ""), "");
3538 fmask_load_address
[2] = ac_to_integer(&ctx
->ac
, ctx
->abi
->inputs
[radeon_llvm_reg_index_soa(VARYING_SLOT_LAYER
, 0)]);
3540 sample_index
= adjust_sample_index_using_fmask(&ctx
->ac
,
3541 fmask_load_address
[0],
3542 fmask_load_address
[1],
3543 fmask_load_address
[2],
3545 get_sampler_desc(ctx
, instr
->variables
[0], AC_DESC_FMASK
, NULL
, true, false));
3547 if (count
== 1 && !gfx9_1d
) {
3548 if (instr
->src
[0].ssa
->num_components
)
3549 res
= LLVMBuildExtractElement(ctx
->ac
.builder
, src0
, masks
[0], "");
3556 for (chan
= 0; chan
< count
; ++chan
) {
3557 coords
[chan
] = ac_llvm_extract_elem(&ctx
->ac
, src0
, chan
);
3560 for (chan
= 0; chan
< 2; ++chan
)
3561 coords
[chan
] = LLVMBuildAdd(ctx
->ac
.builder
, coords
[chan
], LLVMBuildFPToUI(ctx
->ac
.builder
, ctx
->abi
->frag_pos
[chan
],
3562 ctx
->ac
.i32
, ""), "");
3563 coords
[2] = ac_to_integer(&ctx
->ac
, ctx
->abi
->inputs
[radeon_llvm_reg_index_soa(VARYING_SLOT_LAYER
, 0)]);
3569 coords
[2] = coords
[1];
3570 coords
[1] = ctx
->ac
.i32_0
;
3572 coords
[1] = ctx
->ac
.i32_0
;
3577 coords
[count
] = sample_index
;
3582 coords
[3] = LLVMGetUndef(ctx
->ac
.i32
);
3585 res
= ac_build_gather_values(&ctx
->ac
, coords
, count
);
3590 static LLVMValueRef
visit_image_load(struct ac_nir_context
*ctx
,
3591 const nir_intrinsic_instr
*instr
)
3593 LLVMValueRef params
[7];
3595 char intrinsic_name
[64];
3596 const nir_variable
*var
= instr
->variables
[0]->var
;
3597 const struct glsl_type
*type
= var
->type
;
3599 if(instr
->variables
[0]->deref
.child
)
3600 type
= instr
->variables
[0]->deref
.child
->type
;
3602 type
= glsl_without_array(type
);
3604 const enum glsl_sampler_dim dim
= glsl_get_sampler_dim(type
);
3605 if (dim
== GLSL_SAMPLER_DIM_BUF
) {
3606 params
[0] = get_sampler_desc(ctx
, instr
->variables
[0], AC_DESC_BUFFER
, NULL
, true, false);
3607 params
[1] = LLVMBuildExtractElement(ctx
->ac
.builder
, get_src(ctx
, instr
->src
[0]),
3608 ctx
->ac
.i32_0
, ""); /* vindex */
3609 params
[2] = ctx
->ac
.i32_0
; /* voffset */
3610 params
[3] = ctx
->ac
.i1false
; /* glc */
3611 params
[4] = ctx
->ac
.i1false
; /* slc */
3612 res
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.load.format.v4f32", ctx
->ac
.v4f32
,
3615 res
= trim_vector(&ctx
->ac
, res
, instr
->dest
.ssa
.num_components
);
3616 res
= ac_to_integer(&ctx
->ac
, res
);
3618 bool is_da
= glsl_sampler_type_is_array(type
) ||
3619 dim
== GLSL_SAMPLER_DIM_CUBE
||
3620 dim
== GLSL_SAMPLER_DIM_3D
||
3621 dim
== GLSL_SAMPLER_DIM_SUBPASS
||
3622 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
;
3623 LLVMValueRef da
= is_da
? ctx
->ac
.i1true
: ctx
->ac
.i1false
;
3624 LLVMValueRef glc
= ctx
->ac
.i1false
;
3625 LLVMValueRef slc
= ctx
->ac
.i1false
;
3627 params
[0] = get_image_coords(ctx
, instr
);
3628 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], AC_DESC_IMAGE
, NULL
, true, false);
3629 params
[2] = LLVMConstInt(ctx
->ac
.i32
, 15, false); /* dmask */
3630 if (HAVE_LLVM
<= 0x0309) {
3631 params
[3] = ctx
->ac
.i1false
; /* r128 */
3636 LLVMValueRef lwe
= ctx
->ac
.i1false
;
3643 ac_get_image_intr_name("llvm.amdgcn.image.load",
3644 ctx
->ac
.v4f32
, /* vdata */
3645 LLVMTypeOf(params
[0]), /* coords */
3646 LLVMTypeOf(params
[1]), /* rsrc */
3647 intrinsic_name
, sizeof(intrinsic_name
));
3649 res
= ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->ac
.v4f32
,
3650 params
, 7, AC_FUNC_ATTR_READONLY
);
3652 return ac_to_integer(&ctx
->ac
, res
);
3655 static void visit_image_store(struct ac_nir_context
*ctx
,
3656 nir_intrinsic_instr
*instr
)
3658 LLVMValueRef params
[8];
3659 char intrinsic_name
[64];
3660 const nir_variable
*var
= instr
->variables
[0]->var
;
3661 const struct glsl_type
*type
= glsl_without_array(var
->type
);
3662 const enum glsl_sampler_dim dim
= glsl_get_sampler_dim(type
);
3663 LLVMValueRef glc
= ctx
->ac
.i1false
;
3664 bool force_glc
= ctx
->ac
.chip_class
== SI
;
3666 glc
= ctx
->ac
.i1true
;
3668 if (dim
== GLSL_SAMPLER_DIM_BUF
) {
3669 params
[0] = ac_to_float(&ctx
->ac
, get_src(ctx
, instr
->src
[2])); /* data */
3670 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], AC_DESC_BUFFER
, NULL
, true, true);
3671 params
[2] = LLVMBuildExtractElement(ctx
->ac
.builder
, get_src(ctx
, instr
->src
[0]),
3672 ctx
->ac
.i32_0
, ""); /* vindex */
3673 params
[3] = ctx
->ac
.i32_0
; /* voffset */
3674 params
[4] = glc
; /* glc */
3675 params
[5] = ctx
->ac
.i1false
; /* slc */
3676 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.store.format.v4f32", ctx
->ac
.voidt
,
3679 bool is_da
= glsl_sampler_type_is_array(type
) ||
3680 dim
== GLSL_SAMPLER_DIM_CUBE
||
3681 dim
== GLSL_SAMPLER_DIM_3D
;
3682 LLVMValueRef da
= is_da
? ctx
->ac
.i1true
: ctx
->ac
.i1false
;
3683 LLVMValueRef slc
= ctx
->ac
.i1false
;
3685 params
[0] = ac_to_float(&ctx
->ac
, get_src(ctx
, instr
->src
[2]));
3686 params
[1] = get_image_coords(ctx
, instr
); /* coords */
3687 params
[2] = get_sampler_desc(ctx
, instr
->variables
[0], AC_DESC_IMAGE
, NULL
, true, true);
3688 params
[3] = LLVMConstInt(ctx
->ac
.i32
, 15, false); /* dmask */
3689 if (HAVE_LLVM
<= 0x0309) {
3690 params
[4] = ctx
->ac
.i1false
; /* r128 */
3695 LLVMValueRef lwe
= ctx
->ac
.i1false
;
3702 ac_get_image_intr_name("llvm.amdgcn.image.store",
3703 LLVMTypeOf(params
[0]), /* vdata */
3704 LLVMTypeOf(params
[1]), /* coords */
3705 LLVMTypeOf(params
[2]), /* rsrc */
3706 intrinsic_name
, sizeof(intrinsic_name
));
3708 ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->ac
.voidt
,
3714 static LLVMValueRef
visit_image_atomic(struct ac_nir_context
*ctx
,
3715 const nir_intrinsic_instr
*instr
)
3717 LLVMValueRef params
[7];
3718 int param_count
= 0;
3719 const nir_variable
*var
= instr
->variables
[0]->var
;
3721 const char *atomic_name
;
3722 char intrinsic_name
[41];
3723 const struct glsl_type
*type
= glsl_without_array(var
->type
);
3724 MAYBE_UNUSED
int length
;
3726 bool is_unsigned
= glsl_get_sampler_result_type(type
) == GLSL_TYPE_UINT
;
3728 switch (instr
->intrinsic
) {
3729 case nir_intrinsic_image_atomic_add
:
3730 atomic_name
= "add";
3732 case nir_intrinsic_image_atomic_min
:
3733 atomic_name
= is_unsigned
? "umin" : "smin";
3735 case nir_intrinsic_image_atomic_max
:
3736 atomic_name
= is_unsigned
? "umax" : "smax";
3738 case nir_intrinsic_image_atomic_and
:
3739 atomic_name
= "and";
3741 case nir_intrinsic_image_atomic_or
:
3744 case nir_intrinsic_image_atomic_xor
:
3745 atomic_name
= "xor";
3747 case nir_intrinsic_image_atomic_exchange
:
3748 atomic_name
= "swap";
3750 case nir_intrinsic_image_atomic_comp_swap
:
3751 atomic_name
= "cmpswap";
3757 if (instr
->intrinsic
== nir_intrinsic_image_atomic_comp_swap
)
3758 params
[param_count
++] = get_src(ctx
, instr
->src
[3]);
3759 params
[param_count
++] = get_src(ctx
, instr
->src
[2]);
3761 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3762 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], AC_DESC_BUFFER
,
3764 params
[param_count
++] = LLVMBuildExtractElement(ctx
->ac
.builder
, get_src(ctx
, instr
->src
[0]),
3765 ctx
->ac
.i32_0
, ""); /* vindex */
3766 params
[param_count
++] = ctx
->ac
.i32_0
; /* voffset */
3767 params
[param_count
++] = ctx
->ac
.i1false
; /* slc */
3769 length
= snprintf(intrinsic_name
, sizeof(intrinsic_name
),
3770 "llvm.amdgcn.buffer.atomic.%s", atomic_name
);
3772 char coords_type
[8];
3774 bool da
= glsl_sampler_type_is_array(type
) ||
3775 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3777 LLVMValueRef coords
= params
[param_count
++] = get_image_coords(ctx
, instr
);
3778 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], AC_DESC_IMAGE
,
3780 params
[param_count
++] = ctx
->ac
.i1false
; /* r128 */
3781 params
[param_count
++] = da
? ctx
->ac
.i1true
: ctx
->ac
.i1false
; /* da */
3782 params
[param_count
++] = ctx
->ac
.i1false
; /* slc */
3784 build_int_type_name(LLVMTypeOf(coords
),
3785 coords_type
, sizeof(coords_type
));
3787 length
= snprintf(intrinsic_name
, sizeof(intrinsic_name
),
3788 "llvm.amdgcn.image.atomic.%s.%s", atomic_name
, coords_type
);
3791 assert(length
< sizeof(intrinsic_name
));
3792 return ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->ac
.i32
, params
, param_count
, 0);
3795 static LLVMValueRef
visit_image_size(struct ac_nir_context
*ctx
,
3796 const nir_intrinsic_instr
*instr
)
3799 const nir_variable
*var
= instr
->variables
[0]->var
;
3800 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
3801 bool da
= glsl_sampler_type_is_array(var
->type
) ||
3802 glsl_get_sampler_dim(var
->type
) == GLSL_SAMPLER_DIM_CUBE
||
3803 glsl_get_sampler_dim(var
->type
) == GLSL_SAMPLER_DIM_3D
;
3804 if(instr
->variables
[0]->deref
.child
)
3805 type
= instr
->variables
[0]->deref
.child
->type
;
3807 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
)
3808 return get_buffer_size(ctx
,
3809 get_sampler_desc(ctx
, instr
->variables
[0],
3810 AC_DESC_BUFFER
, NULL
, true, false), true);
3812 struct ac_image_args args
= { 0 };
3816 args
.resource
= get_sampler_desc(ctx
, instr
->variables
[0], AC_DESC_IMAGE
, NULL
, true, false);
3817 args
.opcode
= ac_image_get_resinfo
;
3818 args
.addr
= ctx
->ac
.i32_0
;
3820 res
= ac_build_image_opcode(&ctx
->ac
, &args
);
3822 LLVMValueRef two
= LLVMConstInt(ctx
->ac
.i32
, 2, false);
3824 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
&&
3825 glsl_sampler_type_is_array(type
)) {
3826 LLVMValueRef six
= LLVMConstInt(ctx
->ac
.i32
, 6, false);
3827 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->ac
.builder
, res
, two
, "");
3828 z
= LLVMBuildSDiv(ctx
->ac
.builder
, z
, six
, "");
3829 res
= LLVMBuildInsertElement(ctx
->ac
.builder
, res
, z
, two
, "");
3831 if (ctx
->ac
.chip_class
>= GFX9
&&
3832 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_1D
&&
3833 glsl_sampler_type_is_array(type
)) {
3834 LLVMValueRef layers
= LLVMBuildExtractElement(ctx
->ac
.builder
, res
, two
, "");
3835 res
= LLVMBuildInsertElement(ctx
->ac
.builder
, res
, layers
,
3842 #define NOOP_WAITCNT 0xf7f
3843 #define LGKM_CNT 0x07f
3844 #define VM_CNT 0xf70
3846 static void emit_membar(struct nir_to_llvm_context
*ctx
,
3847 const nir_intrinsic_instr
*instr
)
3849 unsigned waitcnt
= NOOP_WAITCNT
;
3851 switch (instr
->intrinsic
) {
3852 case nir_intrinsic_memory_barrier
:
3853 case nir_intrinsic_group_memory_barrier
:
3854 waitcnt
&= VM_CNT
& LGKM_CNT
;
3856 case nir_intrinsic_memory_barrier_atomic_counter
:
3857 case nir_intrinsic_memory_barrier_buffer
:
3858 case nir_intrinsic_memory_barrier_image
:
3861 case nir_intrinsic_memory_barrier_shared
:
3862 waitcnt
&= LGKM_CNT
;
3867 if (waitcnt
!= NOOP_WAITCNT
)
3868 ac_build_waitcnt(&ctx
->ac
, waitcnt
);
3871 static void emit_barrier(struct ac_llvm_context
*ac
, gl_shader_stage stage
)
3873 /* SI only (thanks to a hw bug workaround):
3874 * The real barrier instruction isn’t needed, because an entire patch
3875 * always fits into a single wave.
3877 if (ac
->chip_class
== SI
&& stage
== MESA_SHADER_TESS_CTRL
) {
3878 ac_build_waitcnt(ac
, LGKM_CNT
& VM_CNT
);
3881 ac_build_intrinsic(ac
, "llvm.amdgcn.s.barrier",
3882 ac
->voidt
, NULL
, 0, AC_FUNC_ATTR_CONVERGENT
);
3885 static void emit_discard(struct ac_nir_context
*ctx
,
3886 const nir_intrinsic_instr
*instr
)
3890 if (instr
->intrinsic
== nir_intrinsic_discard_if
) {
3891 cond
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3892 get_src(ctx
, instr
->src
[0]),
3895 assert(instr
->intrinsic
== nir_intrinsic_discard
);
3896 cond
= LLVMConstInt(ctx
->ac
.i1
, false, 0);
3899 ac_build_kill_if_false(&ctx
->ac
, cond
);
3903 visit_load_helper_invocation(struct ac_nir_context
*ctx
)
3905 LLVMValueRef result
= ac_build_intrinsic(&ctx
->ac
,
3906 "llvm.amdgcn.ps.live",
3907 ctx
->ac
.i1
, NULL
, 0,
3908 AC_FUNC_ATTR_READNONE
);
3909 result
= LLVMBuildNot(ctx
->ac
.builder
, result
, "");
3910 return LLVMBuildSExt(ctx
->ac
.builder
, result
, ctx
->ac
.i32
, "");
3914 visit_load_local_invocation_index(struct nir_to_llvm_context
*ctx
)
3916 LLVMValueRef result
;
3917 LLVMValueRef thread_id
= ac_get_thread_id(&ctx
->ac
);
3918 result
= LLVMBuildAnd(ctx
->builder
, ctx
->tg_size
,
3919 LLVMConstInt(ctx
->ac
.i32
, 0xfc0, false), "");
3921 return LLVMBuildAdd(ctx
->builder
, result
, thread_id
, "");
3924 static LLVMValueRef
visit_var_atomic(struct nir_to_llvm_context
*ctx
,
3925 const nir_intrinsic_instr
*instr
)
3927 LLVMValueRef ptr
, result
;
3928 LLVMValueRef src
= get_src(ctx
->nir
, instr
->src
[0]);
3929 ptr
= build_gep_for_deref(ctx
->nir
, instr
->variables
[0]);
3931 if (instr
->intrinsic
== nir_intrinsic_var_atomic_comp_swap
) {
3932 LLVMValueRef src1
= get_src(ctx
->nir
, instr
->src
[1]);
3933 result
= LLVMBuildAtomicCmpXchg(ctx
->builder
,
3935 LLVMAtomicOrderingSequentiallyConsistent
,
3936 LLVMAtomicOrderingSequentiallyConsistent
,
3939 LLVMAtomicRMWBinOp op
;
3940 switch (instr
->intrinsic
) {
3941 case nir_intrinsic_var_atomic_add
:
3942 op
= LLVMAtomicRMWBinOpAdd
;
3944 case nir_intrinsic_var_atomic_umin
:
3945 op
= LLVMAtomicRMWBinOpUMin
;
3947 case nir_intrinsic_var_atomic_umax
:
3948 op
= LLVMAtomicRMWBinOpUMax
;
3950 case nir_intrinsic_var_atomic_imin
:
3951 op
= LLVMAtomicRMWBinOpMin
;
3953 case nir_intrinsic_var_atomic_imax
:
3954 op
= LLVMAtomicRMWBinOpMax
;
3956 case nir_intrinsic_var_atomic_and
:
3957 op
= LLVMAtomicRMWBinOpAnd
;
3959 case nir_intrinsic_var_atomic_or
:
3960 op
= LLVMAtomicRMWBinOpOr
;
3962 case nir_intrinsic_var_atomic_xor
:
3963 op
= LLVMAtomicRMWBinOpXor
;
3965 case nir_intrinsic_var_atomic_exchange
:
3966 op
= LLVMAtomicRMWBinOpXchg
;
3972 result
= LLVMBuildAtomicRMW(ctx
->builder
, op
, ptr
, ac_to_integer(&ctx
->ac
, src
),
3973 LLVMAtomicOrderingSequentiallyConsistent
,
3979 #define INTERP_CENTER 0
3980 #define INTERP_CENTROID 1
3981 #define INTERP_SAMPLE 2
3983 static LLVMValueRef
lookup_interp_param(struct nir_to_llvm_context
*ctx
,
3984 enum glsl_interp_mode interp
, unsigned location
)
3987 case INTERP_MODE_FLAT
:
3990 case INTERP_MODE_SMOOTH
:
3991 case INTERP_MODE_NONE
:
3992 if (location
== INTERP_CENTER
)
3993 return ctx
->persp_center
;
3994 else if (location
== INTERP_CENTROID
)
3995 return ctx
->persp_centroid
;
3996 else if (location
== INTERP_SAMPLE
)
3997 return ctx
->persp_sample
;
3999 case INTERP_MODE_NOPERSPECTIVE
:
4000 if (location
== INTERP_CENTER
)
4001 return ctx
->linear_center
;
4002 else if (location
== INTERP_CENTROID
)
4003 return ctx
->linear_centroid
;
4004 else if (location
== INTERP_SAMPLE
)
4005 return ctx
->linear_sample
;
4011 static LLVMValueRef
load_sample_position(struct nir_to_llvm_context
*ctx
,
4012 LLVMValueRef sample_id
)
4014 LLVMValueRef result
;
4015 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->ac
.i32
, RING_PS_SAMPLE_POSITIONS
, false));
4017 ptr
= LLVMBuildBitCast(ctx
->builder
, ptr
,
4018 ac_array_in_const_addr_space(ctx
->ac
.v2f32
), "");
4020 sample_id
= LLVMBuildAdd(ctx
->builder
, sample_id
, ctx
->sample_pos_offset
, "");
4021 result
= ac_build_load_invariant(&ctx
->ac
, ptr
, sample_id
);
4026 static LLVMValueRef
load_sample_pos(struct ac_nir_context
*ctx
)
4028 LLVMValueRef values
[2];
4030 values
[0] = emit_ffract(&ctx
->ac
, ctx
->abi
->frag_pos
[0]);
4031 values
[1] = emit_ffract(&ctx
->ac
, ctx
->abi
->frag_pos
[1]);
4032 return ac_build_gather_values(&ctx
->ac
, values
, 2);
4035 static LLVMValueRef
load_sample_mask_in(struct ac_nir_context
*ctx
)
4037 uint8_t log2_ps_iter_samples
= ctx
->nctx
->shader_info
->info
.ps
.force_persample
? ctx
->nctx
->options
->key
.fs
.log2_num_samples
: ctx
->nctx
->options
->key
.fs
.log2_ps_iter_samples
;
4039 /* The bit pattern matches that used by fixed function fragment
4041 static const uint16_t ps_iter_masks
[] = {
4042 0xffff, /* not used */
4048 assert(log2_ps_iter_samples
< ARRAY_SIZE(ps_iter_masks
));
4050 uint32_t ps_iter_mask
= ps_iter_masks
[log2_ps_iter_samples
];
4052 LLVMValueRef result
, sample_id
;
4053 sample_id
= unpack_param(&ctx
->ac
, ctx
->abi
->ancillary
, 8, 4);
4054 sample_id
= LLVMBuildShl(ctx
->ac
.builder
, LLVMConstInt(ctx
->ac
.i32
, ps_iter_mask
, false), sample_id
, "");
4055 result
= LLVMBuildAnd(ctx
->ac
.builder
, sample_id
, ctx
->abi
->sample_coverage
, "");
4059 static LLVMValueRef
visit_interp(struct nir_to_llvm_context
*ctx
,
4060 const nir_intrinsic_instr
*instr
)
4062 LLVMValueRef result
[4];
4063 LLVMValueRef interp_param
, attr_number
;
4066 LLVMValueRef src_c0
= NULL
;
4067 LLVMValueRef src_c1
= NULL
;
4068 LLVMValueRef src0
= NULL
;
4069 int input_index
= instr
->variables
[0]->var
->data
.location
- VARYING_SLOT_VAR0
;
4070 switch (instr
->intrinsic
) {
4071 case nir_intrinsic_interp_var_at_centroid
:
4072 location
= INTERP_CENTROID
;
4074 case nir_intrinsic_interp_var_at_sample
:
4075 case nir_intrinsic_interp_var_at_offset
:
4076 location
= INTERP_CENTER
;
4077 src0
= get_src(ctx
->nir
, instr
->src
[0]);
4083 if (instr
->intrinsic
== nir_intrinsic_interp_var_at_offset
) {
4084 src_c0
= ac_to_float(&ctx
->ac
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->ac
.i32_0
, ""));
4085 src_c1
= ac_to_float(&ctx
->ac
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->ac
.i32_1
, ""));
4086 } else if (instr
->intrinsic
== nir_intrinsic_interp_var_at_sample
) {
4087 LLVMValueRef sample_position
;
4088 LLVMValueRef halfval
= LLVMConstReal(ctx
->ac
.f32
, 0.5f
);
4090 /* fetch sample ID */
4091 sample_position
= load_sample_position(ctx
, src0
);
4093 src_c0
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->ac
.i32_0
, "");
4094 src_c0
= LLVMBuildFSub(ctx
->builder
, src_c0
, halfval
, "");
4095 src_c1
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->ac
.i32_1
, "");
4096 src_c1
= LLVMBuildFSub(ctx
->builder
, src_c1
, halfval
, "");
4098 interp_param
= lookup_interp_param(ctx
, instr
->variables
[0]->var
->data
.interpolation
, location
);
4099 attr_number
= LLVMConstInt(ctx
->ac
.i32
, input_index
, false);
4101 if (location
== INTERP_CENTER
) {
4102 LLVMValueRef ij_out
[2];
4103 LLVMValueRef ddxy_out
= emit_ddxy_interp(ctx
->nir
, interp_param
);
4106 * take the I then J parameters, and the DDX/Y for it, and
4107 * calculate the IJ inputs for the interpolator.
4108 * temp1 = ddx * offset/sample.x + I;
4109 * interp_param.I = ddy * offset/sample.y + temp1;
4110 * temp1 = ddx * offset/sample.x + J;
4111 * interp_param.J = ddy * offset/sample.y + temp1;
4113 for (unsigned i
= 0; i
< 2; i
++) {
4114 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->ac
.i32
, i
, false);
4115 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->ac
.i32
, i
+ 2, false);
4116 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->builder
,
4117 ddxy_out
, ix_ll
, "");
4118 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->builder
,
4119 ddxy_out
, iy_ll
, "");
4120 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->builder
,
4121 interp_param
, ix_ll
, "");
4122 LLVMValueRef temp1
, temp2
;
4124 interp_el
= LLVMBuildBitCast(ctx
->builder
, interp_el
,
4127 temp1
= LLVMBuildFMul(ctx
->builder
, ddx_el
, src_c0
, "");
4128 temp1
= LLVMBuildFAdd(ctx
->builder
, temp1
, interp_el
, "");
4130 temp2
= LLVMBuildFMul(ctx
->builder
, ddy_el
, src_c1
, "");
4131 temp2
= LLVMBuildFAdd(ctx
->builder
, temp2
, temp1
, "");
4133 ij_out
[i
] = LLVMBuildBitCast(ctx
->builder
,
4134 temp2
, ctx
->ac
.i32
, "");
4136 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
4140 for (chan
= 0; chan
< 4; chan
++) {
4141 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->ac
.i32
, chan
, false);
4144 interp_param
= LLVMBuildBitCast(ctx
->builder
,
4145 interp_param
, ctx
->ac
.v2f32
, "");
4146 LLVMValueRef i
= LLVMBuildExtractElement(
4147 ctx
->builder
, interp_param
, ctx
->ac
.i32_0
, "");
4148 LLVMValueRef j
= LLVMBuildExtractElement(
4149 ctx
->builder
, interp_param
, ctx
->ac
.i32_1
, "");
4151 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
4152 llvm_chan
, attr_number
,
4153 ctx
->prim_mask
, i
, j
);
4155 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
4156 LLVMConstInt(ctx
->ac
.i32
, 2, false),
4157 llvm_chan
, attr_number
,
4161 return ac_build_varying_gather_values(&ctx
->ac
, result
, instr
->num_components
,
4162 instr
->variables
[0]->var
->data
.location_frac
);
4166 visit_emit_vertex(struct ac_shader_abi
*abi
, unsigned stream
, LLVMValueRef
*addrs
)
4168 LLVMValueRef gs_next_vertex
;
4169 LLVMValueRef can_emit
;
4171 struct nir_to_llvm_context
*ctx
= nir_to_llvm_context_from_abi(abi
);
4173 assert(stream
== 0);
4175 /* Write vertex attribute values to GSVS ring */
4176 gs_next_vertex
= LLVMBuildLoad(ctx
->builder
,
4177 ctx
->gs_next_vertex
,
4180 /* If this thread has already emitted the declared maximum number of
4181 * vertices, kill it: excessive vertex emissions are not supposed to
4182 * have any effect, and GS threads have no externally observable
4183 * effects other than emitting vertices.
4185 can_emit
= LLVMBuildICmp(ctx
->builder
, LLVMIntULT
, gs_next_vertex
,
4186 LLVMConstInt(ctx
->ac
.i32
, ctx
->gs_max_out_vertices
, false), "");
4187 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4189 /* loop num outputs */
4191 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
4192 LLVMValueRef
*out_ptr
= &addrs
[i
* 4];
4197 if (!(ctx
->output_mask
& (1ull << i
)))
4200 if (i
== VARYING_SLOT_CLIP_DIST0
) {
4201 /* pack clip and cull into a single set of slots */
4202 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
4206 for (unsigned j
= 0; j
< length
; j
++) {
4207 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
,
4209 LLVMValueRef voffset
= LLVMConstInt(ctx
->ac
.i32
, (slot
* 4 + j
) * ctx
->gs_max_out_vertices
, false);
4210 voffset
= LLVMBuildAdd(ctx
->builder
, voffset
, gs_next_vertex
, "");
4211 voffset
= LLVMBuildMul(ctx
->builder
, voffset
, LLVMConstInt(ctx
->ac
.i32
, 4, false), "");
4213 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->ac
.i32
, "");
4215 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->gsvs_ring
,
4217 voffset
, ctx
->gs2vs_offset
, 0,
4223 gs_next_vertex
= LLVMBuildAdd(ctx
->builder
, gs_next_vertex
,
4225 LLVMBuildStore(ctx
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
);
4227 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
4231 visit_end_primitive(struct ac_shader_abi
*abi
, unsigned stream
)
4233 struct nir_to_llvm_context
*ctx
= nir_to_llvm_context_from_abi(abi
);
4234 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8), ctx
->gs_wave_id
);
4238 load_tess_coord(struct ac_shader_abi
*abi
, LLVMTypeRef type
,
4239 unsigned num_components
)
4241 struct nir_to_llvm_context
*ctx
= nir_to_llvm_context_from_abi(abi
);
4243 LLVMValueRef coord
[4] = {
4250 if (ctx
->tes_primitive_mode
== GL_TRIANGLES
)
4251 coord
[2] = LLVMBuildFSub(ctx
->builder
, ctx
->ac
.f32_1
,
4252 LLVMBuildFAdd(ctx
->builder
, coord
[0], coord
[1], ""), "");
4254 LLVMValueRef result
= ac_build_gather_values(&ctx
->ac
, coord
, num_components
);
4255 return LLVMBuildBitCast(ctx
->builder
, result
, type
, "");
4259 load_patch_vertices_in(struct ac_shader_abi
*abi
)
4261 struct nir_to_llvm_context
*ctx
= nir_to_llvm_context_from_abi(abi
);
4262 return LLVMConstInt(ctx
->ac
.i32
, ctx
->options
->key
.tcs
.input_vertices
, false);
4265 static void visit_intrinsic(struct ac_nir_context
*ctx
,
4266 nir_intrinsic_instr
*instr
)
4268 LLVMValueRef result
= NULL
;
4270 switch (instr
->intrinsic
) {
4271 case nir_intrinsic_ballot
:
4272 result
= ac_build_ballot(&ctx
->ac
, get_src(ctx
, instr
->src
[0]));
4274 case nir_intrinsic_read_invocation
:
4275 case nir_intrinsic_read_first_invocation
: {
4276 LLVMValueRef args
[2];
4279 args
[0] = get_src(ctx
, instr
->src
[0]);
4282 const char *intr_name
;
4283 if (instr
->intrinsic
== nir_intrinsic_read_invocation
) {
4285 intr_name
= "llvm.amdgcn.readlane";
4288 args
[1] = get_src(ctx
, instr
->src
[1]);
4291 intr_name
= "llvm.amdgcn.readfirstlane";
4294 /* We currently have no other way to prevent LLVM from lifting the icmp
4295 * calls to a dominating basic block.
4297 ac_build_optimization_barrier(&ctx
->ac
, &args
[0]);
4299 result
= ac_build_intrinsic(&ctx
->ac
, intr_name
,
4300 ctx
->ac
.i32
, args
, num_args
,
4301 AC_FUNC_ATTR_READNONE
|
4302 AC_FUNC_ATTR_CONVERGENT
);
4305 case nir_intrinsic_load_subgroup_invocation
:
4306 result
= ac_get_thread_id(&ctx
->ac
);
4308 case nir_intrinsic_load_work_group_id
: {
4309 LLVMValueRef values
[3];
4311 for (int i
= 0; i
< 3; i
++) {
4312 values
[i
] = ctx
->nctx
->workgroup_ids
[i
] ?
4313 ctx
->nctx
->workgroup_ids
[i
] : ctx
->ac
.i32_0
;
4316 result
= ac_build_gather_values(&ctx
->ac
, values
, 3);
4319 case nir_intrinsic_load_base_vertex
: {
4320 result
= ctx
->abi
->base_vertex
;
4323 case nir_intrinsic_load_vertex_id_zero_base
: {
4324 result
= ctx
->abi
->vertex_id
;
4327 case nir_intrinsic_load_local_invocation_id
: {
4328 result
= ctx
->nctx
->local_invocation_ids
;
4331 case nir_intrinsic_load_base_instance
:
4332 result
= ctx
->abi
->start_instance
;
4334 case nir_intrinsic_load_draw_id
:
4335 result
= ctx
->abi
->draw_id
;
4337 case nir_intrinsic_load_view_index
:
4338 result
= ctx
->nctx
->view_index
? ctx
->nctx
->view_index
: ctx
->ac
.i32_0
;
4340 case nir_intrinsic_load_invocation_id
:
4341 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
4342 result
= unpack_param(&ctx
->ac
, ctx
->abi
->tcs_rel_ids
, 8, 5);
4344 result
= ctx
->abi
->gs_invocation_id
;
4346 case nir_intrinsic_load_primitive_id
:
4347 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
4348 result
= ctx
->abi
->gs_prim_id
;
4349 } else if (ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
4350 result
= ctx
->abi
->tcs_patch_id
;
4351 } else if (ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
4352 result
= ctx
->abi
->tes_patch_id
;
4354 fprintf(stderr
, "Unknown primitive id intrinsic: %d", ctx
->stage
);
4356 case nir_intrinsic_load_sample_id
:
4357 result
= unpack_param(&ctx
->ac
, ctx
->abi
->ancillary
, 8, 4);
4359 case nir_intrinsic_load_sample_pos
:
4360 result
= load_sample_pos(ctx
);
4362 case nir_intrinsic_load_sample_mask_in
:
4364 result
= load_sample_mask_in(ctx
);
4366 result
= ctx
->abi
->sample_coverage
;
4368 case nir_intrinsic_load_frag_coord
: {
4369 LLVMValueRef values
[4] = {
4370 ctx
->abi
->frag_pos
[0],
4371 ctx
->abi
->frag_pos
[1],
4372 ctx
->abi
->frag_pos
[2],
4373 ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
, ctx
->abi
->frag_pos
[3])
4375 result
= ac_build_gather_values(&ctx
->ac
, values
, 4);
4378 case nir_intrinsic_load_front_face
:
4379 result
= ctx
->abi
->front_face
;
4381 case nir_intrinsic_load_helper_invocation
:
4382 result
= visit_load_helper_invocation(ctx
);
4384 case nir_intrinsic_load_instance_id
:
4385 result
= ctx
->abi
->instance_id
;
4387 case nir_intrinsic_load_num_work_groups
:
4388 result
= ctx
->nctx
->num_work_groups
;
4390 case nir_intrinsic_load_local_invocation_index
:
4391 result
= visit_load_local_invocation_index(ctx
->nctx
);
4393 case nir_intrinsic_load_push_constant
:
4394 result
= visit_load_push_constant(ctx
->nctx
, instr
);
4396 case nir_intrinsic_vulkan_resource_index
:
4397 result
= visit_vulkan_resource_index(ctx
->nctx
, instr
);
4399 case nir_intrinsic_vulkan_resource_reindex
:
4400 result
= visit_vulkan_resource_reindex(ctx
->nctx
, instr
);
4402 case nir_intrinsic_store_ssbo
:
4403 visit_store_ssbo(ctx
, instr
);
4405 case nir_intrinsic_load_ssbo
:
4406 result
= visit_load_buffer(ctx
, instr
);
4408 case nir_intrinsic_ssbo_atomic_add
:
4409 case nir_intrinsic_ssbo_atomic_imin
:
4410 case nir_intrinsic_ssbo_atomic_umin
:
4411 case nir_intrinsic_ssbo_atomic_imax
:
4412 case nir_intrinsic_ssbo_atomic_umax
:
4413 case nir_intrinsic_ssbo_atomic_and
:
4414 case nir_intrinsic_ssbo_atomic_or
:
4415 case nir_intrinsic_ssbo_atomic_xor
:
4416 case nir_intrinsic_ssbo_atomic_exchange
:
4417 case nir_intrinsic_ssbo_atomic_comp_swap
:
4418 result
= visit_atomic_ssbo(ctx
, instr
);
4420 case nir_intrinsic_load_ubo
:
4421 result
= visit_load_ubo_buffer(ctx
, instr
);
4423 case nir_intrinsic_get_buffer_size
:
4424 result
= visit_get_buffer_size(ctx
, instr
);
4426 case nir_intrinsic_load_var
:
4427 result
= visit_load_var(ctx
, instr
);
4429 case nir_intrinsic_store_var
:
4430 visit_store_var(ctx
, instr
);
4432 case nir_intrinsic_image_load
:
4433 result
= visit_image_load(ctx
, instr
);
4435 case nir_intrinsic_image_store
:
4436 visit_image_store(ctx
, instr
);
4438 case nir_intrinsic_image_atomic_add
:
4439 case nir_intrinsic_image_atomic_min
:
4440 case nir_intrinsic_image_atomic_max
:
4441 case nir_intrinsic_image_atomic_and
:
4442 case nir_intrinsic_image_atomic_or
:
4443 case nir_intrinsic_image_atomic_xor
:
4444 case nir_intrinsic_image_atomic_exchange
:
4445 case nir_intrinsic_image_atomic_comp_swap
:
4446 result
= visit_image_atomic(ctx
, instr
);
4448 case nir_intrinsic_image_size
:
4449 result
= visit_image_size(ctx
, instr
);
4451 case nir_intrinsic_discard
:
4452 case nir_intrinsic_discard_if
:
4453 emit_discard(ctx
, instr
);
4455 case nir_intrinsic_memory_barrier
:
4456 case nir_intrinsic_group_memory_barrier
:
4457 case nir_intrinsic_memory_barrier_atomic_counter
:
4458 case nir_intrinsic_memory_barrier_buffer
:
4459 case nir_intrinsic_memory_barrier_image
:
4460 case nir_intrinsic_memory_barrier_shared
:
4461 emit_membar(ctx
->nctx
, instr
);
4463 case nir_intrinsic_barrier
:
4464 emit_barrier(&ctx
->ac
, ctx
->stage
);
4466 case nir_intrinsic_var_atomic_add
:
4467 case nir_intrinsic_var_atomic_imin
:
4468 case nir_intrinsic_var_atomic_umin
:
4469 case nir_intrinsic_var_atomic_imax
:
4470 case nir_intrinsic_var_atomic_umax
:
4471 case nir_intrinsic_var_atomic_and
:
4472 case nir_intrinsic_var_atomic_or
:
4473 case nir_intrinsic_var_atomic_xor
:
4474 case nir_intrinsic_var_atomic_exchange
:
4475 case nir_intrinsic_var_atomic_comp_swap
:
4476 result
= visit_var_atomic(ctx
->nctx
, instr
);
4478 case nir_intrinsic_interp_var_at_centroid
:
4479 case nir_intrinsic_interp_var_at_sample
:
4480 case nir_intrinsic_interp_var_at_offset
:
4481 result
= visit_interp(ctx
->nctx
, instr
);
4483 case nir_intrinsic_emit_vertex
:
4484 ctx
->abi
->emit_vertex(ctx
->abi
, nir_intrinsic_stream_id(instr
), ctx
->outputs
);
4486 case nir_intrinsic_end_primitive
:
4487 ctx
->abi
->emit_primitive(ctx
->abi
, nir_intrinsic_stream_id(instr
));
4489 case nir_intrinsic_load_tess_coord
: {
4490 LLVMTypeRef type
= ctx
->nctx
?
4491 get_def_type(ctx
->nctx
->nir
, &instr
->dest
.ssa
) :
4493 result
= ctx
->abi
->load_tess_coord(ctx
->abi
, type
, instr
->num_components
);
4496 case nir_intrinsic_load_tess_level_outer
:
4497 result
= ctx
->abi
->load_tess_level(ctx
->abi
, VARYING_SLOT_TESS_LEVEL_OUTER
);
4499 case nir_intrinsic_load_tess_level_inner
:
4500 result
= ctx
->abi
->load_tess_level(ctx
->abi
, VARYING_SLOT_TESS_LEVEL_INNER
);
4502 case nir_intrinsic_load_patch_vertices_in
:
4503 result
= ctx
->abi
->load_patch_vertices_in(ctx
->abi
);
4505 case nir_intrinsic_vote_all
: {
4506 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, get_src(ctx
, instr
->src
[0]));
4507 result
= LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->ac
.i32
, "");
4510 case nir_intrinsic_vote_any
: {
4511 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, get_src(ctx
, instr
->src
[0]));
4512 result
= LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->ac
.i32
, "");
4515 case nir_intrinsic_vote_eq
: {
4516 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, get_src(ctx
, instr
->src
[0]));
4517 result
= LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->ac
.i32
, "");
4521 fprintf(stderr
, "Unknown intrinsic: ");
4522 nir_print_instr(&instr
->instr
, stderr
);
4523 fprintf(stderr
, "\n");
4527 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4531 static LLVMValueRef
radv_load_ssbo(struct ac_shader_abi
*abi
,
4532 LLVMValueRef buffer_ptr
, bool write
)
4534 struct nir_to_llvm_context
*ctx
= nir_to_llvm_context_from_abi(abi
);
4535 LLVMValueRef result
;
4537 LLVMSetMetadata(buffer_ptr
, ctx
->ac
.uniform_md_kind
, ctx
->ac
.empty_md
);
4539 result
= LLVMBuildLoad(ctx
->builder
, buffer_ptr
, "");
4540 LLVMSetMetadata(result
, ctx
->ac
.invariant_load_md_kind
, ctx
->ac
.empty_md
);
4545 static LLVMValueRef
radv_load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef buffer_ptr
)
4547 struct nir_to_llvm_context
*ctx
= nir_to_llvm_context_from_abi(abi
);
4548 LLVMValueRef result
;
4550 LLVMSetMetadata(buffer_ptr
, ctx
->ac
.uniform_md_kind
, ctx
->ac
.empty_md
);
4552 result
= LLVMBuildLoad(ctx
->builder
, buffer_ptr
, "");
4553 LLVMSetMetadata(result
, ctx
->ac
.invariant_load_md_kind
, ctx
->ac
.empty_md
);
4558 static LLVMValueRef
radv_get_sampler_desc(struct ac_shader_abi
*abi
,
4559 unsigned descriptor_set
,
4560 unsigned base_index
,
4561 unsigned constant_index
,
4563 enum ac_descriptor_type desc_type
,
4564 bool image
, bool write
)
4566 struct nir_to_llvm_context
*ctx
= nir_to_llvm_context_from_abi(abi
);
4567 LLVMValueRef list
= ctx
->descriptor_sets
[descriptor_set
];
4568 struct radv_descriptor_set_layout
*layout
= ctx
->options
->layout
->set
[descriptor_set
].layout
;
4569 struct radv_descriptor_set_binding_layout
*binding
= layout
->binding
+ base_index
;
4570 unsigned offset
= binding
->offset
;
4571 unsigned stride
= binding
->size
;
4573 LLVMBuilderRef builder
= ctx
->builder
;
4576 assert(base_index
< layout
->binding_count
);
4578 switch (desc_type
) {
4580 type
= ctx
->ac
.v8i32
;
4584 type
= ctx
->ac
.v8i32
;
4588 case AC_DESC_SAMPLER
:
4589 type
= ctx
->ac
.v4i32
;
4590 if (binding
->type
== VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
)
4595 case AC_DESC_BUFFER
:
4596 type
= ctx
->ac
.v4i32
;
4600 unreachable("invalid desc_type\n");
4603 offset
+= constant_index
* stride
;
4605 if (desc_type
== AC_DESC_SAMPLER
&& binding
->immutable_samplers_offset
&&
4606 (!index
|| binding
->immutable_samplers_equal
)) {
4607 if (binding
->immutable_samplers_equal
)
4610 const uint32_t *samplers
= radv_immutable_samplers(layout
, binding
);
4612 LLVMValueRef constants
[] = {
4613 LLVMConstInt(ctx
->ac
.i32
, samplers
[constant_index
* 4 + 0], 0),
4614 LLVMConstInt(ctx
->ac
.i32
, samplers
[constant_index
* 4 + 1], 0),
4615 LLVMConstInt(ctx
->ac
.i32
, samplers
[constant_index
* 4 + 2], 0),
4616 LLVMConstInt(ctx
->ac
.i32
, samplers
[constant_index
* 4 + 3], 0),
4618 return ac_build_gather_values(&ctx
->ac
, constants
, 4);
4621 assert(stride
% type_size
== 0);
4624 index
= ctx
->ac
.i32_0
;
4626 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->ac
.i32
, stride
/ type_size
, 0), "");
4628 list
= ac_build_gep0(&ctx
->ac
, list
, LLVMConstInt(ctx
->ac
.i32
, offset
, 0));
4629 list
= LLVMBuildPointerCast(builder
, list
, ac_array_in_const_addr_space(type
), "");
4631 return ac_build_load_to_sgpr(&ctx
->ac
, list
, index
);
4634 static LLVMValueRef
get_sampler_desc(struct ac_nir_context
*ctx
,
4635 const nir_deref_var
*deref
,
4636 enum ac_descriptor_type desc_type
,
4637 const nir_tex_instr
*tex_instr
,
4638 bool image
, bool write
)
4640 LLVMValueRef index
= NULL
;
4641 unsigned constant_index
= 0;
4642 unsigned descriptor_set
;
4643 unsigned base_index
;
4646 assert(tex_instr
&& !image
);
4648 base_index
= tex_instr
->sampler_index
;
4650 const nir_deref
*tail
= &deref
->deref
;
4651 while (tail
->child
) {
4652 const nir_deref_array
*child
= nir_deref_as_array(tail
->child
);
4653 unsigned array_size
= glsl_get_aoa_size(tail
->child
->type
);
4658 assert(child
->deref_array_type
!= nir_deref_array_type_wildcard
);
4660 if (child
->deref_array_type
== nir_deref_array_type_indirect
) {
4661 LLVMValueRef indirect
= get_src(ctx
, child
->indirect
);
4663 indirect
= LLVMBuildMul(ctx
->ac
.builder
, indirect
,
4664 LLVMConstInt(ctx
->ac
.i32
, array_size
, false), "");
4669 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
, indirect
, "");
4672 constant_index
+= child
->base_offset
* array_size
;
4674 tail
= &child
->deref
;
4676 descriptor_set
= deref
->var
->data
.descriptor_set
;
4677 base_index
= deref
->var
->data
.binding
;
4680 return ctx
->abi
->load_sampler_desc(ctx
->abi
,
4683 constant_index
, index
,
4684 desc_type
, image
, write
);
4687 static void set_tex_fetch_args(struct ac_llvm_context
*ctx
,
4688 struct ac_image_args
*args
,
4689 const nir_tex_instr
*instr
,
4691 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
4692 LLVMValueRef
*param
, unsigned count
,
4695 unsigned is_rect
= 0;
4696 bool da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
4698 if (op
== nir_texop_lod
)
4700 /* Pad to power of two vector */
4701 while (count
< util_next_power_of_two(count
))
4702 param
[count
++] = LLVMGetUndef(ctx
->i32
);
4705 args
->addr
= ac_build_gather_values(ctx
, param
, count
);
4707 args
->addr
= param
[0];
4709 args
->resource
= res_ptr
;
4710 args
->sampler
= samp_ptr
;
4712 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
&& op
== nir_texop_txf
) {
4713 args
->addr
= param
[0];
4717 args
->dmask
= dmask
;
4718 args
->unorm
= is_rect
;
4722 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4725 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4726 * filtering manually. The driver sets img7 to a mask clearing
4727 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4728 * s_and_b32 samp0, samp0, img7
4731 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4733 static LLVMValueRef
sici_fix_sampler_aniso(struct ac_nir_context
*ctx
,
4734 LLVMValueRef res
, LLVMValueRef samp
)
4736 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4737 LLVMValueRef img7
, samp0
;
4739 if (ctx
->ac
.chip_class
>= VI
)
4742 img7
= LLVMBuildExtractElement(builder
, res
,
4743 LLVMConstInt(ctx
->ac
.i32
, 7, 0), "");
4744 samp0
= LLVMBuildExtractElement(builder
, samp
,
4745 LLVMConstInt(ctx
->ac
.i32
, 0, 0), "");
4746 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
4747 return LLVMBuildInsertElement(builder
, samp
, samp0
,
4748 LLVMConstInt(ctx
->ac
.i32
, 0, 0), "");
4751 static void tex_fetch_ptrs(struct ac_nir_context
*ctx
,
4752 nir_tex_instr
*instr
,
4753 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
,
4754 LLVMValueRef
*fmask_ptr
)
4756 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
)
4757 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, AC_DESC_BUFFER
, instr
, false, false);
4759 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, AC_DESC_IMAGE
, instr
, false, false);
4762 *samp_ptr
= get_sampler_desc(ctx
, instr
->sampler
, AC_DESC_SAMPLER
, instr
, false, false);
4764 *samp_ptr
= get_sampler_desc(ctx
, instr
->texture
, AC_DESC_SAMPLER
, instr
, false, false);
4765 if (instr
->sampler_dim
< GLSL_SAMPLER_DIM_RECT
)
4766 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
4768 if (fmask_ptr
&& !instr
->sampler
&& (instr
->op
== nir_texop_txf_ms
||
4769 instr
->op
== nir_texop_samples_identical
))
4770 *fmask_ptr
= get_sampler_desc(ctx
, instr
->texture
, AC_DESC_FMASK
, instr
, false, false);
4773 static LLVMValueRef
apply_round_slice(struct ac_llvm_context
*ctx
,
4776 coord
= ac_to_float(ctx
, coord
);
4777 coord
= ac_build_intrinsic(ctx
, "llvm.rint.f32", ctx
->f32
, &coord
, 1, 0);
4778 coord
= ac_to_integer(ctx
, coord
);
4782 static void visit_tex(struct ac_nir_context
*ctx
, nir_tex_instr
*instr
)
4784 LLVMValueRef result
= NULL
;
4785 struct ac_image_args args
= { 0 };
4786 unsigned dmask
= 0xf;
4787 LLVMValueRef address
[16];
4788 LLVMValueRef coords
[5];
4789 LLVMValueRef coord
= NULL
, lod
= NULL
, comparator
= NULL
;
4790 LLVMValueRef bias
= NULL
, offsets
= NULL
;
4791 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
, sample_index
= NULL
;
4792 LLVMValueRef ddx
= NULL
, ddy
= NULL
;
4793 LLVMValueRef derivs
[6];
4794 unsigned chan
, count
= 0;
4795 unsigned const_src
= 0, num_deriv_comp
= 0;
4796 bool lod_is_zero
= false;
4798 tex_fetch_ptrs(ctx
, instr
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4800 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
4801 switch (instr
->src
[i
].src_type
) {
4802 case nir_tex_src_coord
:
4803 coord
= get_src(ctx
, instr
->src
[i
].src
);
4805 case nir_tex_src_projector
:
4807 case nir_tex_src_comparator
:
4808 comparator
= get_src(ctx
, instr
->src
[i
].src
);
4810 case nir_tex_src_offset
:
4811 offsets
= get_src(ctx
, instr
->src
[i
].src
);
4814 case nir_tex_src_bias
:
4815 bias
= get_src(ctx
, instr
->src
[i
].src
);
4817 case nir_tex_src_lod
: {
4818 nir_const_value
*val
= nir_src_as_const_value(instr
->src
[i
].src
);
4820 if (val
&& val
->i32
[0] == 0)
4822 lod
= get_src(ctx
, instr
->src
[i
].src
);
4825 case nir_tex_src_ms_index
:
4826 sample_index
= get_src(ctx
, instr
->src
[i
].src
);
4828 case nir_tex_src_ms_mcs
:
4830 case nir_tex_src_ddx
:
4831 ddx
= get_src(ctx
, instr
->src
[i
].src
);
4832 num_deriv_comp
= instr
->src
[i
].src
.ssa
->num_components
;
4834 case nir_tex_src_ddy
:
4835 ddy
= get_src(ctx
, instr
->src
[i
].src
);
4837 case nir_tex_src_texture_offset
:
4838 case nir_tex_src_sampler_offset
:
4839 case nir_tex_src_plane
:
4845 if (instr
->op
== nir_texop_txs
&& instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
4846 result
= get_buffer_size(ctx
, res_ptr
, true);
4850 if (instr
->op
== nir_texop_texture_samples
) {
4851 LLVMValueRef res
, samples
, is_msaa
;
4852 res
= LLVMBuildBitCast(ctx
->ac
.builder
, res_ptr
, ctx
->ac
.v8i32
, "");
4853 samples
= LLVMBuildExtractElement(ctx
->ac
.builder
, res
,
4854 LLVMConstInt(ctx
->ac
.i32
, 3, false), "");
4855 is_msaa
= LLVMBuildLShr(ctx
->ac
.builder
, samples
,
4856 LLVMConstInt(ctx
->ac
.i32
, 28, false), "");
4857 is_msaa
= LLVMBuildAnd(ctx
->ac
.builder
, is_msaa
,
4858 LLVMConstInt(ctx
->ac
.i32
, 0xe, false), "");
4859 is_msaa
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
, is_msaa
,
4860 LLVMConstInt(ctx
->ac
.i32
, 0xe, false), "");
4862 samples
= LLVMBuildLShr(ctx
->ac
.builder
, samples
,
4863 LLVMConstInt(ctx
->ac
.i32
, 16, false), "");
4864 samples
= LLVMBuildAnd(ctx
->ac
.builder
, samples
,
4865 LLVMConstInt(ctx
->ac
.i32
, 0xf, false), "");
4866 samples
= LLVMBuildShl(ctx
->ac
.builder
, ctx
->ac
.i32_1
,
4868 samples
= LLVMBuildSelect(ctx
->ac
.builder
, is_msaa
, samples
,
4875 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
4876 coords
[chan
] = ac_llvm_extract_elem(&ctx
->ac
, coord
, chan
);
4878 if (offsets
&& instr
->op
!= nir_texop_txf
) {
4879 LLVMValueRef offset
[3], pack
;
4880 for (chan
= 0; chan
< 3; ++chan
)
4881 offset
[chan
] = ctx
->ac
.i32_0
;
4884 for (chan
= 0; chan
< ac_get_llvm_num_components(offsets
); chan
++) {
4885 offset
[chan
] = ac_llvm_extract_elem(&ctx
->ac
, offsets
, chan
);
4886 offset
[chan
] = LLVMBuildAnd(ctx
->ac
.builder
, offset
[chan
],
4887 LLVMConstInt(ctx
->ac
.i32
, 0x3f, false), "");
4889 offset
[chan
] = LLVMBuildShl(ctx
->ac
.builder
, offset
[chan
],
4890 LLVMConstInt(ctx
->ac
.i32
, chan
* 8, false), "");
4892 pack
= LLVMBuildOr(ctx
->ac
.builder
, offset
[0], offset
[1], "");
4893 pack
= LLVMBuildOr(ctx
->ac
.builder
, pack
, offset
[2], "");
4894 address
[count
++] = pack
;
4897 /* pack LOD bias value */
4898 if (instr
->op
== nir_texop_txb
&& bias
) {
4899 address
[count
++] = bias
;
4902 /* Pack depth comparison value */
4903 if (instr
->is_shadow
&& comparator
) {
4904 LLVMValueRef z
= ac_to_float(&ctx
->ac
,
4905 ac_llvm_extract_elem(&ctx
->ac
, comparator
, 0));
4907 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
4908 * so the depth comparison value isn't clamped for Z16 and
4909 * Z24 anymore. Do it manually here.
4911 * It's unnecessary if the original texture format was
4912 * Z32_FLOAT, but we don't know that here.
4914 if (ctx
->ac
.chip_class
== VI
&& ctx
->abi
->clamp_shadow_reference
)
4915 z
= ac_build_clamp(&ctx
->ac
, z
);
4917 address
[count
++] = z
;
4920 /* pack derivatives */
4922 int num_src_deriv_channels
, num_dest_deriv_channels
;
4923 switch (instr
->sampler_dim
) {
4924 case GLSL_SAMPLER_DIM_3D
:
4925 case GLSL_SAMPLER_DIM_CUBE
:
4927 num_src_deriv_channels
= 3;
4928 num_dest_deriv_channels
= 3;
4930 case GLSL_SAMPLER_DIM_2D
:
4932 num_src_deriv_channels
= 2;
4933 num_dest_deriv_channels
= 2;
4936 case GLSL_SAMPLER_DIM_1D
:
4937 num_src_deriv_channels
= 1;
4938 if (ctx
->ac
.chip_class
>= GFX9
) {
4939 num_dest_deriv_channels
= 2;
4942 num_dest_deriv_channels
= 1;
4948 for (unsigned i
= 0; i
< num_src_deriv_channels
; i
++) {
4949 derivs
[i
] = ac_to_float(&ctx
->ac
, ac_llvm_extract_elem(&ctx
->ac
, ddx
, i
));
4950 derivs
[num_dest_deriv_channels
+ i
] = ac_to_float(&ctx
->ac
, ac_llvm_extract_elem(&ctx
->ac
, ddy
, i
));
4952 for (unsigned i
= num_src_deriv_channels
; i
< num_dest_deriv_channels
; i
++) {
4953 derivs
[i
] = ctx
->ac
.f32_0
;
4954 derivs
[num_dest_deriv_channels
+ i
] = ctx
->ac
.f32_0
;
4958 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&& coord
) {
4959 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
4960 coords
[chan
] = ac_to_float(&ctx
->ac
, coords
[chan
]);
4961 if (instr
->coord_components
== 3)
4962 coords
[3] = LLVMGetUndef(ctx
->ac
.f32
);
4963 ac_prepare_cube_coords(&ctx
->ac
,
4964 instr
->op
== nir_texop_txd
, instr
->is_array
,
4965 instr
->op
== nir_texop_lod
, coords
, derivs
);
4971 for (unsigned i
= 0; i
< num_deriv_comp
* 2; i
++)
4972 address
[count
++] = derivs
[i
];
4975 /* Pack texture coordinates */
4977 address
[count
++] = coords
[0];
4978 if (instr
->coord_components
> 1) {
4979 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_1D
&& instr
->is_array
&& instr
->op
!= nir_texop_txf
) {
4980 coords
[1] = apply_round_slice(&ctx
->ac
, coords
[1]);
4982 address
[count
++] = coords
[1];
4984 if (instr
->coord_components
> 2) {
4985 /* This seems like a bit of a hack - but it passes Vulkan CTS with it */
4986 if (instr
->sampler_dim
!= GLSL_SAMPLER_DIM_3D
&&
4987 instr
->sampler_dim
!= GLSL_SAMPLER_DIM_CUBE
&&
4988 instr
->op
!= nir_texop_txf
) {
4989 coords
[2] = apply_round_slice(&ctx
->ac
, coords
[2]);
4991 address
[count
++] = coords
[2];
4994 if (ctx
->ac
.chip_class
>= GFX9
) {
4995 LLVMValueRef filler
;
4996 if (instr
->op
== nir_texop_txf
)
4997 filler
= ctx
->ac
.i32_0
;
4999 filler
= LLVMConstReal(ctx
->ac
.f32
, 0.5);
5001 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_1D
) {
5002 /* No nir_texop_lod, because it does not take a slice
5003 * even with array textures. */
5004 if (instr
->is_array
&& instr
->op
!= nir_texop_lod
) {
5005 address
[count
] = address
[count
- 1];
5006 address
[count
- 1] = filler
;
5009 address
[count
++] = filler
;
5015 if (lod
&& ((instr
->op
== nir_texop_txl
&& !lod_is_zero
) ||
5016 instr
->op
== nir_texop_txf
)) {
5017 address
[count
++] = lod
;
5018 } else if (instr
->op
== nir_texop_txf_ms
&& sample_index
) {
5019 address
[count
++] = sample_index
;
5020 } else if(instr
->op
== nir_texop_txs
) {
5023 address
[count
++] = lod
;
5025 address
[count
++] = ctx
->ac
.i32_0
;
5028 for (chan
= 0; chan
< count
; chan
++) {
5029 address
[chan
] = LLVMBuildBitCast(ctx
->ac
.builder
,
5030 address
[chan
], ctx
->ac
.i32
, "");
5033 if (instr
->op
== nir_texop_samples_identical
) {
5034 LLVMValueRef txf_address
[4];
5035 struct ac_image_args txf_args
= { 0 };
5036 unsigned txf_count
= count
;
5037 memcpy(txf_address
, address
, sizeof(txf_address
));
5039 if (!instr
->is_array
)
5040 txf_address
[2] = ctx
->ac
.i32_0
;
5041 txf_address
[3] = ctx
->ac
.i32_0
;
5043 set_tex_fetch_args(&ctx
->ac
, &txf_args
, instr
, nir_texop_txf
,
5045 txf_address
, txf_count
, 0xf);
5047 result
= build_tex_intrinsic(ctx
, instr
, false, &txf_args
);
5049 result
= LLVMBuildExtractElement(ctx
->ac
.builder
, result
, ctx
->ac
.i32_0
, "");
5050 result
= emit_int_cmp(&ctx
->ac
, LLVMIntEQ
, result
, ctx
->ac
.i32_0
);
5054 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
&&
5055 instr
->op
!= nir_texop_txs
) {
5056 unsigned sample_chan
= instr
->is_array
? 3 : 2;
5057 address
[sample_chan
] = adjust_sample_index_using_fmask(&ctx
->ac
,
5060 instr
->is_array
? address
[2] : NULL
,
5061 address
[sample_chan
],
5065 if (offsets
&& instr
->op
== nir_texop_txf
) {
5066 nir_const_value
*const_offset
=
5067 nir_src_as_const_value(instr
->src
[const_src
].src
);
5068 int num_offsets
= instr
->src
[const_src
].src
.ssa
->num_components
;
5069 assert(const_offset
);
5070 num_offsets
= MIN2(num_offsets
, instr
->coord_components
);
5071 if (num_offsets
> 2)
5072 address
[2] = LLVMBuildAdd(ctx
->ac
.builder
,
5073 address
[2], LLVMConstInt(ctx
->ac
.i32
, const_offset
->i32
[2], false), "");
5074 if (num_offsets
> 1)
5075 address
[1] = LLVMBuildAdd(ctx
->ac
.builder
,
5076 address
[1], LLVMConstInt(ctx
->ac
.i32
, const_offset
->i32
[1], false), "");
5077 address
[0] = LLVMBuildAdd(ctx
->ac
.builder
,
5078 address
[0], LLVMConstInt(ctx
->ac
.i32
, const_offset
->i32
[0], false), "");
5082 /* TODO TG4 support */
5083 if (instr
->op
== nir_texop_tg4
) {
5084 if (instr
->is_shadow
)
5087 dmask
= 1 << instr
->component
;
5089 set_tex_fetch_args(&ctx
->ac
, &args
, instr
, instr
->op
,
5090 res_ptr
, samp_ptr
, address
, count
, dmask
);
5092 result
= build_tex_intrinsic(ctx
, instr
, lod_is_zero
, &args
);
5094 if (instr
->op
== nir_texop_query_levels
)
5095 result
= LLVMBuildExtractElement(ctx
->ac
.builder
, result
, LLVMConstInt(ctx
->ac
.i32
, 3, false), "");
5096 else if (instr
->is_shadow
&& instr
->is_new_style_shadow
&&
5097 instr
->op
!= nir_texop_txs
&& instr
->op
!= nir_texop_lod
&&
5098 instr
->op
!= nir_texop_tg4
)
5099 result
= LLVMBuildExtractElement(ctx
->ac
.builder
, result
, ctx
->ac
.i32_0
, "");
5100 else if (instr
->op
== nir_texop_txs
&&
5101 instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&&
5103 LLVMValueRef two
= LLVMConstInt(ctx
->ac
.i32
, 2, false);
5104 LLVMValueRef six
= LLVMConstInt(ctx
->ac
.i32
, 6, false);
5105 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->ac
.builder
, result
, two
, "");
5106 z
= LLVMBuildSDiv(ctx
->ac
.builder
, z
, six
, "");
5107 result
= LLVMBuildInsertElement(ctx
->ac
.builder
, result
, z
, two
, "");
5108 } else if (ctx
->ac
.chip_class
>= GFX9
&&
5109 instr
->op
== nir_texop_txs
&&
5110 instr
->sampler_dim
== GLSL_SAMPLER_DIM_1D
&&
5112 LLVMValueRef two
= LLVMConstInt(ctx
->ac
.i32
, 2, false);
5113 LLVMValueRef layers
= LLVMBuildExtractElement(ctx
->ac
.builder
, result
, two
, "");
5114 result
= LLVMBuildInsertElement(ctx
->ac
.builder
, result
, layers
,
5116 } else if (instr
->dest
.ssa
.num_components
!= 4)
5117 result
= trim_vector(&ctx
->ac
, result
, instr
->dest
.ssa
.num_components
);
5121 assert(instr
->dest
.is_ssa
);
5122 result
= ac_to_integer(&ctx
->ac
, result
);
5123 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
5128 static void visit_phi(struct ac_nir_context
*ctx
, nir_phi_instr
*instr
)
5130 LLVMTypeRef type
= get_def_type(ctx
, &instr
->dest
.ssa
);
5131 LLVMValueRef result
= LLVMBuildPhi(ctx
->ac
.builder
, type
, "");
5133 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
5134 _mesa_hash_table_insert(ctx
->phis
, instr
, result
);
5137 static void visit_post_phi(struct ac_nir_context
*ctx
,
5138 nir_phi_instr
*instr
,
5139 LLVMValueRef llvm_phi
)
5141 nir_foreach_phi_src(src
, instr
) {
5142 LLVMBasicBlockRef block
= get_block(ctx
, src
->pred
);
5143 LLVMValueRef llvm_src
= get_src(ctx
, src
->src
);
5145 LLVMAddIncoming(llvm_phi
, &llvm_src
, &block
, 1);
5149 static void phi_post_pass(struct ac_nir_context
*ctx
)
5151 struct hash_entry
*entry
;
5152 hash_table_foreach(ctx
->phis
, entry
) {
5153 visit_post_phi(ctx
, (nir_phi_instr
*)entry
->key
,
5154 (LLVMValueRef
)entry
->data
);
5159 static void visit_ssa_undef(struct ac_nir_context
*ctx
,
5160 const nir_ssa_undef_instr
*instr
)
5162 unsigned num_components
= instr
->def
.num_components
;
5163 LLVMTypeRef type
= LLVMIntTypeInContext(ctx
->ac
.context
, instr
->def
.bit_size
);
5166 if (num_components
== 1)
5167 undef
= LLVMGetUndef(type
);
5169 undef
= LLVMGetUndef(LLVMVectorType(type
, num_components
));
5171 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, undef
);
5174 static void visit_jump(struct ac_nir_context
*ctx
,
5175 const nir_jump_instr
*instr
)
5177 switch (instr
->type
) {
5178 case nir_jump_break
:
5179 LLVMBuildBr(ctx
->ac
.builder
, ctx
->break_block
);
5180 LLVMClearInsertionPosition(ctx
->ac
.builder
);
5182 case nir_jump_continue
:
5183 LLVMBuildBr(ctx
->ac
.builder
, ctx
->continue_block
);
5184 LLVMClearInsertionPosition(ctx
->ac
.builder
);
5187 fprintf(stderr
, "Unknown NIR jump instr: ");
5188 nir_print_instr(&instr
->instr
, stderr
);
5189 fprintf(stderr
, "\n");
5194 static void visit_cf_list(struct ac_nir_context
*ctx
,
5195 struct exec_list
*list
);
5197 static void visit_block(struct ac_nir_context
*ctx
, nir_block
*block
)
5199 LLVMBasicBlockRef llvm_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
5200 nir_foreach_instr(instr
, block
)
5202 switch (instr
->type
) {
5203 case nir_instr_type_alu
:
5204 visit_alu(ctx
, nir_instr_as_alu(instr
));
5206 case nir_instr_type_load_const
:
5207 visit_load_const(ctx
, nir_instr_as_load_const(instr
));
5209 case nir_instr_type_intrinsic
:
5210 visit_intrinsic(ctx
, nir_instr_as_intrinsic(instr
));
5212 case nir_instr_type_tex
:
5213 visit_tex(ctx
, nir_instr_as_tex(instr
));
5215 case nir_instr_type_phi
:
5216 visit_phi(ctx
, nir_instr_as_phi(instr
));
5218 case nir_instr_type_ssa_undef
:
5219 visit_ssa_undef(ctx
, nir_instr_as_ssa_undef(instr
));
5221 case nir_instr_type_jump
:
5222 visit_jump(ctx
, nir_instr_as_jump(instr
));
5225 fprintf(stderr
, "Unknown NIR instr type: ");
5226 nir_print_instr(instr
, stderr
);
5227 fprintf(stderr
, "\n");
5232 _mesa_hash_table_insert(ctx
->defs
, block
, llvm_block
);
5235 static void visit_if(struct ac_nir_context
*ctx
, nir_if
*if_stmt
)
5237 LLVMValueRef value
= get_src(ctx
, if_stmt
->condition
);
5239 LLVMValueRef fn
= LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx
->ac
.builder
));
5240 LLVMBasicBlockRef merge_block
=
5241 LLVMAppendBasicBlockInContext(ctx
->ac
.context
, fn
, "");
5242 LLVMBasicBlockRef if_block
=
5243 LLVMAppendBasicBlockInContext(ctx
->ac
.context
, fn
, "");
5244 LLVMBasicBlockRef else_block
= merge_block
;
5245 if (!exec_list_is_empty(&if_stmt
->else_list
))
5246 else_block
= LLVMAppendBasicBlockInContext(
5247 ctx
->ac
.context
, fn
, "");
5249 LLVMValueRef cond
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
, value
,
5251 LLVMBuildCondBr(ctx
->ac
.builder
, cond
, if_block
, else_block
);
5253 LLVMPositionBuilderAtEnd(ctx
->ac
.builder
, if_block
);
5254 visit_cf_list(ctx
, &if_stmt
->then_list
);
5255 if (LLVMGetInsertBlock(ctx
->ac
.builder
))
5256 LLVMBuildBr(ctx
->ac
.builder
, merge_block
);
5258 if (!exec_list_is_empty(&if_stmt
->else_list
)) {
5259 LLVMPositionBuilderAtEnd(ctx
->ac
.builder
, else_block
);
5260 visit_cf_list(ctx
, &if_stmt
->else_list
);
5261 if (LLVMGetInsertBlock(ctx
->ac
.builder
))
5262 LLVMBuildBr(ctx
->ac
.builder
, merge_block
);
5265 LLVMPositionBuilderAtEnd(ctx
->ac
.builder
, merge_block
);
5268 static void visit_loop(struct ac_nir_context
*ctx
, nir_loop
*loop
)
5270 LLVMValueRef fn
= LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx
->ac
.builder
));
5271 LLVMBasicBlockRef continue_parent
= ctx
->continue_block
;
5272 LLVMBasicBlockRef break_parent
= ctx
->break_block
;
5274 ctx
->continue_block
=
5275 LLVMAppendBasicBlockInContext(ctx
->ac
.context
, fn
, "");
5277 LLVMAppendBasicBlockInContext(ctx
->ac
.context
, fn
, "");
5279 LLVMBuildBr(ctx
->ac
.builder
, ctx
->continue_block
);
5280 LLVMPositionBuilderAtEnd(ctx
->ac
.builder
, ctx
->continue_block
);
5281 visit_cf_list(ctx
, &loop
->body
);
5283 if (LLVMGetInsertBlock(ctx
->ac
.builder
))
5284 LLVMBuildBr(ctx
->ac
.builder
, ctx
->continue_block
);
5285 LLVMPositionBuilderAtEnd(ctx
->ac
.builder
, ctx
->break_block
);
5287 ctx
->continue_block
= continue_parent
;
5288 ctx
->break_block
= break_parent
;
5291 static void visit_cf_list(struct ac_nir_context
*ctx
,
5292 struct exec_list
*list
)
5294 foreach_list_typed(nir_cf_node
, node
, node
, list
)
5296 switch (node
->type
) {
5297 case nir_cf_node_block
:
5298 visit_block(ctx
, nir_cf_node_as_block(node
));
5301 case nir_cf_node_if
:
5302 visit_if(ctx
, nir_cf_node_as_if(node
));
5305 case nir_cf_node_loop
:
5306 visit_loop(ctx
, nir_cf_node_as_loop(node
));
5316 handle_vs_input_decl(struct nir_to_llvm_context
*ctx
,
5317 struct nir_variable
*variable
)
5319 LLVMValueRef t_list_ptr
= ctx
->vertex_buffers
;
5320 LLVMValueRef t_offset
;
5321 LLVMValueRef t_list
;
5323 LLVMValueRef buffer_index
;
5324 int index
= variable
->data
.location
- VERT_ATTRIB_GENERIC0
;
5325 int idx
= variable
->data
.location
;
5326 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, true);
5328 variable
->data
.driver_location
= idx
* 4;
5330 for (unsigned i
= 0; i
< attrib_count
; ++i
, ++idx
) {
5331 if (ctx
->options
->key
.vs
.instance_rate_inputs
& (1u << (index
+ i
))) {
5332 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->abi
.instance_id
,
5333 ctx
->abi
.start_instance
, "");
5334 if (ctx
->options
->key
.vs
.as_ls
) {
5335 ctx
->shader_info
->vs
.vgpr_comp_cnt
=
5336 MAX2(2, ctx
->shader_info
->vs
.vgpr_comp_cnt
);
5338 ctx
->shader_info
->vs
.vgpr_comp_cnt
=
5339 MAX2(1, ctx
->shader_info
->vs
.vgpr_comp_cnt
);
5342 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->abi
.vertex_id
,
5343 ctx
->abi
.base_vertex
, "");
5344 t_offset
= LLVMConstInt(ctx
->ac
.i32
, index
+ i
, false);
5346 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
5348 input
= ac_build_buffer_load_format(&ctx
->ac
, t_list
,
5353 for (unsigned chan
= 0; chan
< 4; chan
++) {
5354 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->ac
.i32
, chan
, false);
5355 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
, chan
)] =
5356 ac_to_integer(&ctx
->ac
, LLVMBuildExtractElement(ctx
->builder
,
5357 input
, llvm_chan
, ""));
5362 static void interp_fs_input(struct nir_to_llvm_context
*ctx
,
5364 LLVMValueRef interp_param
,
5365 LLVMValueRef prim_mask
,
5366 LLVMValueRef result
[4])
5368 LLVMValueRef attr_number
;
5371 bool interp
= interp_param
!= NULL
;
5373 attr_number
= LLVMConstInt(ctx
->ac
.i32
, attr
, false);
5375 /* fs.constant returns the param from the middle vertex, so it's not
5376 * really useful for flat shading. It's meant to be used for custom
5377 * interpolation (but the intrinsic can't fetch from the other two
5380 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
5381 * to do the right thing. The only reason we use fs.constant is that
5382 * fs.interp cannot be used on integers, because they can be equal
5386 interp_param
= LLVMBuildBitCast(ctx
->builder
, interp_param
,
5389 i
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
5391 j
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
5395 for (chan
= 0; chan
< 4; chan
++) {
5396 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->ac
.i32
, chan
, false);
5399 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
5404 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
5405 LLVMConstInt(ctx
->ac
.i32
, 2, false),
5414 handle_fs_input_decl(struct nir_to_llvm_context
*ctx
,
5415 struct nir_variable
*variable
)
5417 int idx
= variable
->data
.location
;
5418 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
5419 LLVMValueRef interp
;
5421 variable
->data
.driver_location
= idx
* 4;
5422 ctx
->input_mask
|= ((1ull << attrib_count
) - 1) << variable
->data
.location
;
5424 if (glsl_get_base_type(glsl_without_array(variable
->type
)) == GLSL_TYPE_FLOAT
) {
5425 unsigned interp_type
;
5426 if (variable
->data
.sample
) {
5427 interp_type
= INTERP_SAMPLE
;
5428 ctx
->shader_info
->info
.ps
.force_persample
= true;
5429 } else if (variable
->data
.centroid
)
5430 interp_type
= INTERP_CENTROID
;
5432 interp_type
= INTERP_CENTER
;
5434 interp
= lookup_interp_param(ctx
, variable
->data
.interpolation
, interp_type
);
5438 for (unsigned i
= 0; i
< attrib_count
; ++i
)
5439 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
+ i
, 0)] = interp
;
5444 handle_vs_inputs(struct nir_to_llvm_context
*ctx
,
5445 struct nir_shader
*nir
) {
5446 nir_foreach_variable(variable
, &nir
->inputs
)
5447 handle_vs_input_decl(ctx
, variable
);
5451 prepare_interp_optimize(struct nir_to_llvm_context
*ctx
,
5452 struct nir_shader
*nir
)
5454 if (!ctx
->options
->key
.fs
.multisample
)
5457 bool uses_center
= false;
5458 bool uses_centroid
= false;
5459 nir_foreach_variable(variable
, &nir
->inputs
) {
5460 if (glsl_get_base_type(glsl_without_array(variable
->type
)) != GLSL_TYPE_FLOAT
||
5461 variable
->data
.sample
)
5464 if (variable
->data
.centroid
)
5465 uses_centroid
= true;
5470 if (uses_center
&& uses_centroid
) {
5471 LLVMValueRef sel
= LLVMBuildICmp(ctx
->builder
, LLVMIntSLT
, ctx
->prim_mask
, ctx
->ac
.i32_0
, "");
5472 ctx
->persp_centroid
= LLVMBuildSelect(ctx
->builder
, sel
, ctx
->persp_center
, ctx
->persp_centroid
, "");
5473 ctx
->linear_centroid
= LLVMBuildSelect(ctx
->builder
, sel
, ctx
->linear_center
, ctx
->linear_centroid
, "");
5478 handle_fs_inputs(struct nir_to_llvm_context
*ctx
,
5479 struct nir_shader
*nir
)
5481 prepare_interp_optimize(ctx
, nir
);
5483 nir_foreach_variable(variable
, &nir
->inputs
)
5484 handle_fs_input_decl(ctx
, variable
);
5488 if (ctx
->shader_info
->info
.ps
.uses_input_attachments
||
5489 ctx
->shader_info
->info
.needs_multiview_view_index
)
5490 ctx
->input_mask
|= 1ull << VARYING_SLOT_LAYER
;
5492 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_INPUTS
; ++i
) {
5493 LLVMValueRef interp_param
;
5494 LLVMValueRef
*inputs
= ctx
->inputs
+radeon_llvm_reg_index_soa(i
, 0);
5496 if (!(ctx
->input_mask
& (1ull << i
)))
5499 if (i
>= VARYING_SLOT_VAR0
|| i
== VARYING_SLOT_PNTC
||
5500 i
== VARYING_SLOT_PRIMITIVE_ID
|| i
== VARYING_SLOT_LAYER
) {
5501 interp_param
= *inputs
;
5502 interp_fs_input(ctx
, index
, interp_param
, ctx
->prim_mask
,
5506 ctx
->shader_info
->fs
.flat_shaded_mask
|= 1u << index
;
5508 } else if (i
== VARYING_SLOT_POS
) {
5509 for(int i
= 0; i
< 3; ++i
)
5510 inputs
[i
] = ctx
->abi
.frag_pos
[i
];
5512 inputs
[3] = ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
5513 ctx
->abi
.frag_pos
[3]);
5516 ctx
->shader_info
->fs
.num_interp
= index
;
5517 if (ctx
->input_mask
& (1 << VARYING_SLOT_PNTC
))
5518 ctx
->shader_info
->fs
.has_pcoord
= true;
5519 if (ctx
->input_mask
& (1 << VARYING_SLOT_PRIMITIVE_ID
))
5520 ctx
->shader_info
->fs
.prim_id_input
= true;
5521 if (ctx
->input_mask
& (1 << VARYING_SLOT_LAYER
))
5522 ctx
->shader_info
->fs
.layer_input
= true;
5523 ctx
->shader_info
->fs
.input_mask
= ctx
->input_mask
>> VARYING_SLOT_VAR0
;
5525 if (ctx
->shader_info
->info
.needs_multiview_view_index
)
5526 ctx
->view_index
= ctx
->inputs
[radeon_llvm_reg_index_soa(VARYING_SLOT_LAYER
, 0)];
5530 ac_build_alloca(struct ac_llvm_context
*ac
,
5534 LLVMBuilderRef builder
= ac
->builder
;
5535 LLVMBasicBlockRef current_block
= LLVMGetInsertBlock(builder
);
5536 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
5537 LLVMBasicBlockRef first_block
= LLVMGetEntryBasicBlock(function
);
5538 LLVMValueRef first_instr
= LLVMGetFirstInstruction(first_block
);
5539 LLVMBuilderRef first_builder
= LLVMCreateBuilderInContext(ac
->context
);
5543 LLVMPositionBuilderBefore(first_builder
, first_instr
);
5545 LLVMPositionBuilderAtEnd(first_builder
, first_block
);
5548 res
= LLVMBuildAlloca(first_builder
, type
, name
);
5549 LLVMBuildStore(builder
, LLVMConstNull(type
), res
);
5551 LLVMDisposeBuilder(first_builder
);
5556 static LLVMValueRef
si_build_alloca_undef(struct ac_llvm_context
*ac
,
5560 LLVMValueRef ptr
= ac_build_alloca(ac
, type
, name
);
5561 LLVMBuildStore(ac
->builder
, LLVMGetUndef(type
), ptr
);
5566 scan_shader_output_decl(struct nir_to_llvm_context
*ctx
,
5567 struct nir_variable
*variable
,
5568 struct nir_shader
*shader
,
5569 gl_shader_stage stage
)
5571 int idx
= variable
->data
.location
+ variable
->data
.index
;
5572 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
5573 uint64_t mask_attribs
;
5575 variable
->data
.driver_location
= idx
* 4;
5577 /* tess ctrl has it's own load/store paths for outputs */
5578 if (stage
== MESA_SHADER_TESS_CTRL
)
5581 mask_attribs
= ((1ull << attrib_count
) - 1) << idx
;
5582 if (stage
== MESA_SHADER_VERTEX
||
5583 stage
== MESA_SHADER_TESS_EVAL
||
5584 stage
== MESA_SHADER_GEOMETRY
) {
5585 if (idx
== VARYING_SLOT_CLIP_DIST0
) {
5586 int length
= shader
->info
.clip_distance_array_size
+
5587 shader
->info
.cull_distance_array_size
;
5588 if (stage
== MESA_SHADER_VERTEX
) {
5589 ctx
->shader_info
->vs
.outinfo
.clip_dist_mask
= (1 << shader
->info
.clip_distance_array_size
) - 1;
5590 ctx
->shader_info
->vs
.outinfo
.cull_dist_mask
= (1 << shader
->info
.cull_distance_array_size
) - 1;
5592 if (stage
== MESA_SHADER_TESS_EVAL
) {
5593 ctx
->shader_info
->tes
.outinfo
.clip_dist_mask
= (1 << shader
->info
.clip_distance_array_size
) - 1;
5594 ctx
->shader_info
->tes
.outinfo
.cull_dist_mask
= (1 << shader
->info
.cull_distance_array_size
) - 1;
5601 mask_attribs
= 1ull << idx
;
5605 ctx
->output_mask
|= mask_attribs
;
5609 handle_shader_output_decl(struct ac_nir_context
*ctx
,
5610 struct nir_shader
*nir
,
5611 struct nir_variable
*variable
)
5613 unsigned output_loc
= variable
->data
.driver_location
/ 4;
5614 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
5616 /* tess ctrl has it's own load/store paths for outputs */
5617 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
5620 if (ctx
->stage
== MESA_SHADER_VERTEX
||
5621 ctx
->stage
== MESA_SHADER_TESS_EVAL
||
5622 ctx
->stage
== MESA_SHADER_GEOMETRY
) {
5623 int idx
= variable
->data
.location
+ variable
->data
.index
;
5624 if (idx
== VARYING_SLOT_CLIP_DIST0
) {
5625 int length
= nir
->info
.clip_distance_array_size
+
5626 nir
->info
.cull_distance_array_size
;
5635 for (unsigned i
= 0; i
< attrib_count
; ++i
) {
5636 for (unsigned chan
= 0; chan
< 4; chan
++) {
5637 ctx
->outputs
[radeon_llvm_reg_index_soa(output_loc
+ i
, chan
)] =
5638 si_build_alloca_undef(&ctx
->ac
, ctx
->ac
.f32
, "");
5644 glsl_base_to_llvm_type(struct nir_to_llvm_context
*ctx
,
5645 enum glsl_base_type type
)
5649 case GLSL_TYPE_UINT
:
5650 case GLSL_TYPE_BOOL
:
5651 case GLSL_TYPE_SUBROUTINE
:
5653 case GLSL_TYPE_FLOAT
: /* TODO handle mediump */
5655 case GLSL_TYPE_INT64
:
5656 case GLSL_TYPE_UINT64
:
5658 case GLSL_TYPE_DOUBLE
:
5661 unreachable("unknown GLSL type");
5666 glsl_to_llvm_type(struct nir_to_llvm_context
*ctx
,
5667 const struct glsl_type
*type
)
5669 if (glsl_type_is_scalar(type
)) {
5670 return glsl_base_to_llvm_type(ctx
, glsl_get_base_type(type
));
5673 if (glsl_type_is_vector(type
)) {
5674 return LLVMVectorType(
5675 glsl_base_to_llvm_type(ctx
, glsl_get_base_type(type
)),
5676 glsl_get_vector_elements(type
));
5679 if (glsl_type_is_matrix(type
)) {
5680 return LLVMArrayType(
5681 glsl_to_llvm_type(ctx
, glsl_get_column_type(type
)),
5682 glsl_get_matrix_columns(type
));
5685 if (glsl_type_is_array(type
)) {
5686 return LLVMArrayType(
5687 glsl_to_llvm_type(ctx
, glsl_get_array_element(type
)),
5688 glsl_get_length(type
));
5691 assert(glsl_type_is_struct(type
));
5693 LLVMTypeRef member_types
[glsl_get_length(type
)];
5695 for (unsigned i
= 0; i
< glsl_get_length(type
); i
++) {
5697 glsl_to_llvm_type(ctx
,
5698 glsl_get_struct_field(type
, i
));
5701 return LLVMStructTypeInContext(ctx
->context
, member_types
,
5702 glsl_get_length(type
), false);
5706 setup_locals(struct ac_nir_context
*ctx
,
5707 struct nir_function
*func
)
5710 ctx
->num_locals
= 0;
5711 nir_foreach_variable(variable
, &func
->impl
->locals
) {
5712 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
5713 variable
->data
.driver_location
= ctx
->num_locals
* 4;
5714 variable
->data
.location_frac
= 0;
5715 ctx
->num_locals
+= attrib_count
;
5717 ctx
->locals
= malloc(4 * ctx
->num_locals
* sizeof(LLVMValueRef
));
5721 for (i
= 0; i
< ctx
->num_locals
; i
++) {
5722 for (j
= 0; j
< 4; j
++) {
5723 ctx
->locals
[i
* 4 + j
] =
5724 si_build_alloca_undef(&ctx
->ac
, ctx
->ac
.f32
, "temp");
5730 setup_shared(struct ac_nir_context
*ctx
,
5731 struct nir_shader
*nir
)
5733 nir_foreach_variable(variable
, &nir
->shared
) {
5734 LLVMValueRef shared
=
5735 LLVMAddGlobalInAddressSpace(
5736 ctx
->ac
.module
, glsl_to_llvm_type(ctx
->nctx
, variable
->type
),
5737 variable
->name
? variable
->name
: "",
5738 AC_LOCAL_ADDR_SPACE
);
5739 _mesa_hash_table_insert(ctx
->vars
, variable
, shared
);
5744 emit_float_saturate(struct ac_llvm_context
*ctx
, LLVMValueRef v
, float lo
, float hi
)
5746 v
= ac_to_float(ctx
, v
);
5747 v
= emit_intrin_2f_param(ctx
, "llvm.maxnum", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, lo
));
5748 return emit_intrin_2f_param(ctx
, "llvm.minnum", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, hi
));
5752 static LLVMValueRef
emit_pack_int16(struct nir_to_llvm_context
*ctx
,
5753 LLVMValueRef src0
, LLVMValueRef src1
)
5755 LLVMValueRef const16
= LLVMConstInt(ctx
->ac
.i32
, 16, false);
5756 LLVMValueRef comp
[2];
5758 comp
[0] = LLVMBuildAnd(ctx
->builder
, src0
, LLVMConstInt(ctx
->ac
.i32
, 65535, 0), "");
5759 comp
[1] = LLVMBuildAnd(ctx
->builder
, src1
, LLVMConstInt(ctx
->ac
.i32
, 65535, 0), "");
5760 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
5761 return LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
5764 /* Initialize arguments for the shader export intrinsic */
5766 si_llvm_init_export_args(struct nir_to_llvm_context
*ctx
,
5767 LLVMValueRef
*values
,
5769 struct ac_export_args
*args
)
5771 /* Default is 0xf. Adjusted below depending on the format. */
5772 args
->enabled_channels
= 0xf;
5774 /* Specify whether the EXEC mask represents the valid mask */
5775 args
->valid_mask
= 0;
5777 /* Specify whether this is the last export */
5780 /* Specify the target we are exporting */
5781 args
->target
= target
;
5783 args
->compr
= false;
5784 args
->out
[0] = LLVMGetUndef(ctx
->ac
.f32
);
5785 args
->out
[1] = LLVMGetUndef(ctx
->ac
.f32
);
5786 args
->out
[2] = LLVMGetUndef(ctx
->ac
.f32
);
5787 args
->out
[3] = LLVMGetUndef(ctx
->ac
.f32
);
5792 if (ctx
->stage
== MESA_SHADER_FRAGMENT
&& target
>= V_008DFC_SQ_EXP_MRT
) {
5793 LLVMValueRef val
[4];
5794 unsigned index
= target
- V_008DFC_SQ_EXP_MRT
;
5795 unsigned col_format
= (ctx
->options
->key
.fs
.col_format
>> (4 * index
)) & 0xf;
5796 bool is_int8
= (ctx
->options
->key
.fs
.is_int8
>> index
) & 1;
5797 bool is_int10
= (ctx
->options
->key
.fs
.is_int10
>> index
) & 1;
5799 switch(col_format
) {
5800 case V_028714_SPI_SHADER_ZERO
:
5801 args
->enabled_channels
= 0; /* writemask */
5802 args
->target
= V_008DFC_SQ_EXP_NULL
;
5805 case V_028714_SPI_SHADER_32_R
:
5806 args
->enabled_channels
= 1;
5807 args
->out
[0] = values
[0];
5810 case V_028714_SPI_SHADER_32_GR
:
5811 args
->enabled_channels
= 0x3;
5812 args
->out
[0] = values
[0];
5813 args
->out
[1] = values
[1];
5816 case V_028714_SPI_SHADER_32_AR
:
5817 args
->enabled_channels
= 0x9;
5818 args
->out
[0] = values
[0];
5819 args
->out
[3] = values
[3];
5822 case V_028714_SPI_SHADER_FP16_ABGR
:
5825 for (unsigned chan
= 0; chan
< 2; chan
++) {
5826 LLVMValueRef pack_args
[2] = {
5828 values
[2 * chan
+ 1]
5830 LLVMValueRef packed
;
5832 packed
= ac_build_cvt_pkrtz_f16(&ctx
->ac
, pack_args
);
5833 args
->out
[chan
] = packed
;
5837 case V_028714_SPI_SHADER_UNORM16_ABGR
:
5838 for (unsigned chan
= 0; chan
< 4; chan
++) {
5839 val
[chan
] = ac_build_clamp(&ctx
->ac
, values
[chan
]);
5840 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
5841 LLVMConstReal(ctx
->ac
.f32
, 65535), "");
5842 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
5843 LLVMConstReal(ctx
->ac
.f32
, 0.5), "");
5844 val
[chan
] = LLVMBuildFPToUI(ctx
->builder
, val
[chan
],
5849 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5850 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5853 case V_028714_SPI_SHADER_SNORM16_ABGR
:
5854 for (unsigned chan
= 0; chan
< 4; chan
++) {
5855 val
[chan
] = emit_float_saturate(&ctx
->ac
, values
[chan
], -1, 1);
5856 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
5857 LLVMConstReal(ctx
->ac
.f32
, 32767), "");
5859 /* If positive, add 0.5, else add -0.5. */
5860 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
5861 LLVMBuildSelect(ctx
->builder
,
5862 LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
,
5863 val
[chan
], ctx
->ac
.f32_0
, ""),
5864 LLVMConstReal(ctx
->ac
.f32
, 0.5),
5865 LLVMConstReal(ctx
->ac
.f32
, -0.5), ""), "");
5866 val
[chan
] = LLVMBuildFPToSI(ctx
->builder
, val
[chan
], ctx
->ac
.i32
, "");
5870 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5871 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5874 case V_028714_SPI_SHADER_UINT16_ABGR
: {
5875 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->ac
.i32
,
5876 is_int8
? 255 : is_int10
? 1023 : 65535, 0);
5877 LLVMValueRef max_alpha
= !is_int10
? max_rgb
: LLVMConstInt(ctx
->ac
.i32
, 3, 0);
5879 for (unsigned chan
= 0; chan
< 4; chan
++) {
5880 val
[chan
] = ac_to_integer(&ctx
->ac
, values
[chan
]);
5881 val
[chan
] = emit_minmax_int(&ctx
->ac
, LLVMIntULT
, val
[chan
], chan
== 3 ? max_alpha
: max_rgb
);
5885 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5886 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5890 case V_028714_SPI_SHADER_SINT16_ABGR
: {
5891 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->ac
.i32
,
5892 is_int8
? 127 : is_int10
? 511 : 32767, 0);
5893 LLVMValueRef min_rgb
= LLVMConstInt(ctx
->ac
.i32
,
5894 is_int8
? -128 : is_int10
? -512 : -32768, 0);
5895 LLVMValueRef max_alpha
= !is_int10
? max_rgb
: ctx
->ac
.i32_1
;
5896 LLVMValueRef min_alpha
= !is_int10
? min_rgb
: LLVMConstInt(ctx
->ac
.i32
, -2, 0);
5899 for (unsigned chan
= 0; chan
< 4; chan
++) {
5900 val
[chan
] = ac_to_integer(&ctx
->ac
, values
[chan
]);
5901 val
[chan
] = emit_minmax_int(&ctx
->ac
, LLVMIntSLT
, val
[chan
], chan
== 3 ? max_alpha
: max_rgb
);
5902 val
[chan
] = emit_minmax_int(&ctx
->ac
, LLVMIntSGT
, val
[chan
], chan
== 3 ? min_alpha
: min_rgb
);
5906 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5907 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5912 case V_028714_SPI_SHADER_32_ABGR
:
5913 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
5917 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
5919 for (unsigned i
= 0; i
< 4; ++i
)
5920 args
->out
[i
] = ac_to_float(&ctx
->ac
, args
->out
[i
]);
5924 handle_vs_outputs_post(struct nir_to_llvm_context
*ctx
,
5925 bool export_prim_id
,
5926 struct ac_vs_output_info
*outinfo
)
5928 uint32_t param_count
= 0;
5930 unsigned pos_idx
, num_pos_exports
= 0;
5931 struct ac_export_args args
, pos_args
[4] = {};
5932 LLVMValueRef psize_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
5935 if (ctx
->options
->key
.has_multiview_view_index
) {
5936 LLVMValueRef
* tmp_out
= &ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(VARYING_SLOT_LAYER
, 0)];
5938 for(unsigned i
= 0; i
< 4; ++i
)
5939 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(VARYING_SLOT_LAYER
, i
)] =
5940 si_build_alloca_undef(&ctx
->ac
, ctx
->ac
.f32
, "");
5943 LLVMBuildStore(ctx
->builder
, ac_to_float(&ctx
->ac
, ctx
->view_index
), *tmp_out
);
5944 ctx
->output_mask
|= 1ull << VARYING_SLOT_LAYER
;
5947 memset(outinfo
->vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
5948 sizeof(outinfo
->vs_output_param_offset
));
5950 if (ctx
->output_mask
& (1ull << VARYING_SLOT_CLIP_DIST0
)) {
5951 LLVMValueRef slots
[8];
5954 if (outinfo
->cull_dist_mask
)
5955 outinfo
->cull_dist_mask
<<= ctx
->num_output_clips
;
5957 i
= VARYING_SLOT_CLIP_DIST0
;
5958 for (j
= 0; j
< ctx
->num_output_clips
+ ctx
->num_output_culls
; j
++)
5959 slots
[j
] = ac_to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
5960 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5962 for (i
= ctx
->num_output_clips
+ ctx
->num_output_culls
; i
< 8; i
++)
5963 slots
[i
] = LLVMGetUndef(ctx
->ac
.f32
);
5965 if (ctx
->num_output_clips
+ ctx
->num_output_culls
> 4) {
5966 target
= V_008DFC_SQ_EXP_POS
+ 3;
5967 si_llvm_init_export_args(ctx
, &slots
[4], target
, &args
);
5968 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5969 &args
, sizeof(args
));
5972 target
= V_008DFC_SQ_EXP_POS
+ 2;
5973 si_llvm_init_export_args(ctx
, &slots
[0], target
, &args
);
5974 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5975 &args
, sizeof(args
));
5979 LLVMValueRef pos_values
[4] = {ctx
->ac
.f32_0
, ctx
->ac
.f32_0
, ctx
->ac
.f32_0
, ctx
->ac
.f32_1
};
5980 if (ctx
->output_mask
& (1ull << VARYING_SLOT_POS
)) {
5981 for (unsigned j
= 0; j
< 4; j
++)
5982 pos_values
[j
] = LLVMBuildLoad(ctx
->builder
,
5983 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(VARYING_SLOT_POS
, j
)], "");
5985 si_llvm_init_export_args(ctx
, pos_values
, V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
5987 if (ctx
->output_mask
& (1ull << VARYING_SLOT_PSIZ
)) {
5988 outinfo
->writes_pointsize
= true;
5989 psize_value
= LLVMBuildLoad(ctx
->builder
,
5990 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(VARYING_SLOT_PSIZ
, 0)], "");
5993 if (ctx
->output_mask
& (1ull << VARYING_SLOT_LAYER
)) {
5994 outinfo
->writes_layer
= true;
5995 layer_value
= LLVMBuildLoad(ctx
->builder
,
5996 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(VARYING_SLOT_LAYER
, 0)], "");
5999 if (ctx
->output_mask
& (1ull << VARYING_SLOT_VIEWPORT
)) {
6000 outinfo
->writes_viewport_index
= true;
6001 viewport_index_value
= LLVMBuildLoad(ctx
->builder
,
6002 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(VARYING_SLOT_VIEWPORT
, 0)], "");
6005 if (outinfo
->writes_pointsize
||
6006 outinfo
->writes_layer
||
6007 outinfo
->writes_viewport_index
) {
6008 pos_args
[1].enabled_channels
= ((outinfo
->writes_pointsize
== true ? 1 : 0) |
6009 (outinfo
->writes_layer
== true ? 4 : 0));
6010 pos_args
[1].valid_mask
= 0;
6011 pos_args
[1].done
= 0;
6012 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
6013 pos_args
[1].compr
= 0;
6014 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
6015 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
6016 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
6017 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
6019 if (outinfo
->writes_pointsize
== true)
6020 pos_args
[1].out
[0] = psize_value
;
6021 if (outinfo
->writes_layer
== true)
6022 pos_args
[1].out
[2] = layer_value
;
6023 if (outinfo
->writes_viewport_index
== true) {
6024 if (ctx
->options
->chip_class
>= GFX9
) {
6025 /* GFX9 has the layer in out.z[10:0] and the viewport
6026 * index in out.z[19:16].
6028 LLVMValueRef v
= viewport_index_value
;
6029 v
= ac_to_integer(&ctx
->ac
, v
);
6030 v
= LLVMBuildShl(ctx
->builder
, v
,
6031 LLVMConstInt(ctx
->ac
.i32
, 16, false),
6033 v
= LLVMBuildOr(ctx
->builder
, v
,
6034 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
6036 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
6037 pos_args
[1].enabled_channels
|= 1 << 2;
6039 pos_args
[1].out
[3] = viewport_index_value
;
6040 pos_args
[1].enabled_channels
|= 1 << 3;
6044 for (i
= 0; i
< 4; i
++) {
6045 if (pos_args
[i
].out
[0])
6050 for (i
= 0; i
< 4; i
++) {
6051 if (!pos_args
[i
].out
[0])
6054 /* Specify the target we are exporting */
6055 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
6056 if (pos_idx
== num_pos_exports
)
6057 pos_args
[i
].done
= 1;
6058 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
6061 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
6062 LLVMValueRef values
[4];
6063 if (!(ctx
->output_mask
& (1ull << i
)))
6066 for (unsigned j
= 0; j
< 4; j
++)
6067 values
[j
] = ac_to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
6068 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
6070 if (i
== VARYING_SLOT_LAYER
) {
6071 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
6072 outinfo
->vs_output_param_offset
[VARYING_SLOT_LAYER
] = param_count
;
6074 } else if (i
== VARYING_SLOT_PRIMITIVE_ID
) {
6075 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
6076 outinfo
->vs_output_param_offset
[VARYING_SLOT_PRIMITIVE_ID
] = param_count
;
6078 } else if (i
>= VARYING_SLOT_VAR0
) {
6079 outinfo
->export_mask
|= 1u << (i
- VARYING_SLOT_VAR0
);
6080 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
6081 outinfo
->vs_output_param_offset
[i
] = param_count
;
6086 si_llvm_init_export_args(ctx
, values
, target
, &args
);
6088 if (target
>= V_008DFC_SQ_EXP_POS
&&
6089 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
6090 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
6091 &args
, sizeof(args
));
6093 ac_build_export(&ctx
->ac
, &args
);
6097 if (export_prim_id
) {
6098 LLVMValueRef values
[4];
6099 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
6100 outinfo
->vs_output_param_offset
[VARYING_SLOT_PRIMITIVE_ID
] = param_count
;
6103 values
[0] = ctx
->vs_prim_id
;
6104 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(2,
6105 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
6106 for (unsigned j
= 1; j
< 4; j
++)
6107 values
[j
] = ctx
->ac
.f32_0
;
6108 si_llvm_init_export_args(ctx
, values
, target
, &args
);
6109 ac_build_export(&ctx
->ac
, &args
);
6110 outinfo
->export_prim_id
= true;
6113 outinfo
->pos_exports
= num_pos_exports
;
6114 outinfo
->param_exports
= param_count
;
6118 handle_es_outputs_post(struct nir_to_llvm_context
*ctx
,
6119 struct ac_es_output_info
*outinfo
)
6122 uint64_t max_output_written
= 0;
6123 LLVMValueRef lds_base
= NULL
;
6125 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
6129 if (!(ctx
->output_mask
& (1ull << i
)))
6132 if (i
== VARYING_SLOT_CLIP_DIST0
)
6133 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
6135 param_index
= shader_io_get_unique_index(i
);
6137 max_output_written
= MAX2(param_index
+ (length
> 4), max_output_written
);
6140 outinfo
->esgs_itemsize
= (max_output_written
+ 1) * 16;
6142 if (ctx
->ac
.chip_class
>= GFX9
) {
6143 unsigned itemsize_dw
= outinfo
->esgs_itemsize
/ 4;
6144 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
6145 LLVMValueRef wave_idx
= ac_build_bfe(&ctx
->ac
, ctx
->merged_wave_info
,
6146 LLVMConstInt(ctx
->ac
.i32
, 24, false),
6147 LLVMConstInt(ctx
->ac
.i32
, 4, false), false);
6148 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
6149 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
6150 LLVMConstInt(ctx
->ac
.i32
, 64, false), ""), "");
6151 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
6152 LLVMConstInt(ctx
->ac
.i32
, itemsize_dw
, 0), "");
6155 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
6156 LLVMValueRef dw_addr
;
6157 LLVMValueRef
*out_ptr
= &ctx
->nir
->outputs
[i
* 4];
6161 if (!(ctx
->output_mask
& (1ull << i
)))
6164 if (i
== VARYING_SLOT_CLIP_DIST0
)
6165 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
6167 param_index
= shader_io_get_unique_index(i
);
6170 dw_addr
= LLVMBuildAdd(ctx
->builder
, lds_base
,
6171 LLVMConstInt(ctx
->ac
.i32
, param_index
* 4, false),
6174 for (j
= 0; j
< length
; j
++) {
6175 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], "");
6176 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->ac
.i32
, "");
6178 if (ctx
->ac
.chip_class
>= GFX9
) {
6179 ac_lds_store(&ctx
->ac
, dw_addr
,
6180 LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], ""));
6181 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
, ctx
->ac
.i32_1
, "");
6183 ac_build_buffer_store_dword(&ctx
->ac
,
6186 NULL
, ctx
->es2gs_offset
,
6187 (4 * param_index
+ j
) * 4,
6195 handle_ls_outputs_post(struct nir_to_llvm_context
*ctx
)
6197 LLVMValueRef vertex_id
= ctx
->rel_auto_id
;
6198 LLVMValueRef vertex_dw_stride
= unpack_param(&ctx
->ac
, ctx
->ls_out_layout
, 13, 8);
6199 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->builder
, vertex_id
,
6200 vertex_dw_stride
, "");
6202 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
6203 LLVMValueRef
*out_ptr
= &ctx
->nir
->outputs
[i
* 4];
6206 if (!(ctx
->output_mask
& (1ull << i
)))
6209 if (i
== VARYING_SLOT_CLIP_DIST0
)
6210 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
6211 int param
= shader_io_get_unique_index(i
);
6212 mark_tess_output(ctx
, false, param
);
6214 mark_tess_output(ctx
, false, param
+ 1);
6215 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->builder
, base_dw_addr
,
6216 LLVMConstInt(ctx
->ac
.i32
, param
* 4, false),
6218 for (unsigned j
= 0; j
< length
; j
++) {
6219 ac_lds_store(&ctx
->ac
, dw_addr
,
6220 LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], ""));
6221 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
, ctx
->ac
.i32_1
, "");
6226 struct ac_build_if_state
6228 struct nir_to_llvm_context
*ctx
;
6229 LLVMValueRef condition
;
6230 LLVMBasicBlockRef entry_block
;
6231 LLVMBasicBlockRef true_block
;
6232 LLVMBasicBlockRef false_block
;
6233 LLVMBasicBlockRef merge_block
;
6236 static LLVMBasicBlockRef
6237 ac_build_insert_new_block(struct nir_to_llvm_context
*ctx
, const char *name
)
6239 LLVMBasicBlockRef current_block
;
6240 LLVMBasicBlockRef next_block
;
6241 LLVMBasicBlockRef new_block
;
6243 /* get current basic block */
6244 current_block
= LLVMGetInsertBlock(ctx
->builder
);
6246 /* chqeck if there's another block after this one */
6247 next_block
= LLVMGetNextBasicBlock(current_block
);
6249 /* insert the new block before the next block */
6250 new_block
= LLVMInsertBasicBlockInContext(ctx
->context
, next_block
, name
);
6253 /* append new block after current block */
6254 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
6255 new_block
= LLVMAppendBasicBlockInContext(ctx
->context
, function
, name
);
6261 ac_nir_build_if(struct ac_build_if_state
*ifthen
,
6262 struct nir_to_llvm_context
*ctx
,
6263 LLVMValueRef condition
)
6265 LLVMBasicBlockRef block
= LLVMGetInsertBlock(ctx
->builder
);
6267 memset(ifthen
, 0, sizeof *ifthen
);
6269 ifthen
->condition
= condition
;
6270 ifthen
->entry_block
= block
;
6272 /* create endif/merge basic block for the phi functions */
6273 ifthen
->merge_block
= ac_build_insert_new_block(ctx
, "endif-block");
6275 /* create/insert true_block before merge_block */
6276 ifthen
->true_block
=
6277 LLVMInsertBasicBlockInContext(ctx
->context
,
6278 ifthen
->merge_block
,
6281 /* successive code goes into the true block */
6282 LLVMPositionBuilderAtEnd(ctx
->builder
, ifthen
->true_block
);
6286 * End a conditional.
6289 ac_nir_build_endif(struct ac_build_if_state
*ifthen
)
6291 LLVMBuilderRef builder
= ifthen
->ctx
->builder
;
6293 /* Insert branch to the merge block from current block */
6294 LLVMBuildBr(builder
, ifthen
->merge_block
);
6297 * Now patch in the various branch instructions.
6300 /* Insert the conditional branch instruction at the end of entry_block */
6301 LLVMPositionBuilderAtEnd(builder
, ifthen
->entry_block
);
6302 if (ifthen
->false_block
) {
6303 /* we have an else clause */
6304 LLVMBuildCondBr(builder
, ifthen
->condition
,
6305 ifthen
->true_block
, ifthen
->false_block
);
6308 /* no else clause */
6309 LLVMBuildCondBr(builder
, ifthen
->condition
,
6310 ifthen
->true_block
, ifthen
->merge_block
);
6313 /* Resume building code at end of the ifthen->merge_block */
6314 LLVMPositionBuilderAtEnd(builder
, ifthen
->merge_block
);
6318 write_tess_factors(struct nir_to_llvm_context
*ctx
)
6320 unsigned stride
, outer_comps
, inner_comps
;
6321 struct ac_build_if_state if_ctx
, inner_if_ctx
;
6322 LLVMValueRef invocation_id
= unpack_param(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
, 8, 5);
6323 LLVMValueRef rel_patch_id
= unpack_param(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
, 0, 8);
6324 unsigned tess_inner_index
, tess_outer_index
;
6325 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
6326 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
6328 emit_barrier(&ctx
->ac
, ctx
->stage
);
6330 switch (ctx
->options
->key
.tcs
.primitive_mode
) {
6350 ac_nir_build_if(&if_ctx
, ctx
,
6351 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
6352 invocation_id
, ctx
->ac
.i32_0
, ""));
6354 tess_inner_index
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER
);
6355 tess_outer_index
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER
);
6357 mark_tess_output(ctx
, true, tess_inner_index
);
6358 mark_tess_output(ctx
, true, tess_outer_index
);
6359 lds_base
= get_tcs_out_current_patch_data_offset(ctx
);
6360 lds_inner
= LLVMBuildAdd(ctx
->builder
, lds_base
,
6361 LLVMConstInt(ctx
->ac
.i32
, tess_inner_index
* 4, false), "");
6362 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_base
,
6363 LLVMConstInt(ctx
->ac
.i32
, tess_outer_index
* 4, false), "");
6365 for (i
= 0; i
< 4; i
++) {
6366 inner
[i
] = LLVMGetUndef(ctx
->ac
.i32
);
6367 outer
[i
] = LLVMGetUndef(ctx
->ac
.i32
);
6371 if (ctx
->options
->key
.tcs
.primitive_mode
== GL_ISOLINES
) {
6372 outer
[0] = out
[1] = ac_lds_load(&ctx
->ac
, lds_outer
);
6373 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_outer
,
6375 outer
[1] = out
[0] = ac_lds_load(&ctx
->ac
, lds_outer
);
6377 for (i
= 0; i
< outer_comps
; i
++) {
6379 ac_lds_load(&ctx
->ac
, lds_outer
);
6380 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_outer
,
6383 for (i
= 0; i
< inner_comps
; i
++) {
6384 inner
[i
] = out
[outer_comps
+i
] =
6385 ac_lds_load(&ctx
->ac
, lds_inner
);
6386 lds_inner
= LLVMBuildAdd(ctx
->builder
, lds_inner
,
6391 /* Convert the outputs to vectors for stores. */
6392 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
6396 vec1
= ac_build_gather_values(&ctx
->ac
, out
+ 4, stride
- 4);
6399 buffer
= ctx
->hs_ring_tess_factor
;
6400 tf_base
= ctx
->tess_factor_offset
;
6401 byteoffset
= LLVMBuildMul(ctx
->builder
, rel_patch_id
,
6402 LLVMConstInt(ctx
->ac
.i32
, 4 * stride
, false), "");
6403 unsigned tf_offset
= 0;
6405 if (ctx
->options
->chip_class
<= VI
) {
6406 ac_nir_build_if(&inner_if_ctx
, ctx
,
6407 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
6408 rel_patch_id
, ctx
->ac
.i32_0
, ""));
6410 /* Store the dynamic HS control word. */
6411 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
6412 LLVMConstInt(ctx
->ac
.i32
, 0x80000000, false),
6413 1, ctx
->ac
.i32_0
, tf_base
,
6414 0, 1, 0, true, false);
6417 ac_nir_build_endif(&inner_if_ctx
);
6420 /* Store the tessellation factors. */
6421 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
6422 MIN2(stride
, 4), byteoffset
, tf_base
,
6423 tf_offset
, 1, 0, true, false);
6425 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
6426 stride
- 4, byteoffset
, tf_base
,
6427 16 + tf_offset
, 1, 0, true, false);
6429 //store to offchip for TES to read - only if TES reads them
6430 if (ctx
->options
->key
.tcs
.tes_reads_tess_factors
) {
6431 LLVMValueRef inner_vec
, outer_vec
, tf_outer_offset
;
6432 LLVMValueRef tf_inner_offset
;
6433 unsigned param_outer
, param_inner
;
6435 param_outer
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER
);
6436 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, NULL
,
6437 LLVMConstInt(ctx
->ac
.i32
, param_outer
, 0));
6439 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
,
6440 util_next_power_of_two(outer_comps
));
6442 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, outer_vec
,
6443 outer_comps
, tf_outer_offset
,
6444 ctx
->oc_lds
, 0, 1, 0, true, false);
6446 param_inner
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER
);
6447 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, NULL
,
6448 LLVMConstInt(ctx
->ac
.i32
, param_inner
, 0));
6450 inner_vec
= inner_comps
== 1 ? inner
[0] :
6451 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
6452 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, inner_vec
,
6453 inner_comps
, tf_inner_offset
,
6454 ctx
->oc_lds
, 0, 1, 0, true, false);
6457 ac_nir_build_endif(&if_ctx
);
6461 handle_tcs_outputs_post(struct nir_to_llvm_context
*ctx
)
6463 write_tess_factors(ctx
);
6467 si_export_mrt_color(struct nir_to_llvm_context
*ctx
,
6468 LLVMValueRef
*color
, unsigned param
, bool is_last
,
6469 struct ac_export_args
*args
)
6472 si_llvm_init_export_args(ctx
, color
, param
,
6476 args
->valid_mask
= 1; /* whether the EXEC mask is valid */
6477 args
->done
= 1; /* DONE bit */
6478 } else if (!args
->enabled_channels
)
6479 return false; /* unnecessary NULL export */
6485 radv_export_mrt_z(struct nir_to_llvm_context
*ctx
,
6486 LLVMValueRef depth
, LLVMValueRef stencil
,
6487 LLVMValueRef samplemask
)
6489 struct ac_export_args args
;
6491 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
6493 ac_build_export(&ctx
->ac
, &args
);
6497 handle_fs_outputs_post(struct nir_to_llvm_context
*ctx
)
6500 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
6501 struct ac_export_args color_args
[8];
6503 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
6504 LLVMValueRef values
[4];
6506 if (!(ctx
->output_mask
& (1ull << i
)))
6509 if (i
== FRAG_RESULT_DEPTH
) {
6510 ctx
->shader_info
->fs
.writes_z
= true;
6511 depth
= ac_to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
6512 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
6513 } else if (i
== FRAG_RESULT_STENCIL
) {
6514 ctx
->shader_info
->fs
.writes_stencil
= true;
6515 stencil
= ac_to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
6516 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
6517 } else if (i
== FRAG_RESULT_SAMPLE_MASK
) {
6518 ctx
->shader_info
->fs
.writes_sample_mask
= true;
6519 samplemask
= ac_to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
6520 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
6523 for (unsigned j
= 0; j
< 4; j
++)
6524 values
[j
] = ac_to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
6525 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
6527 if (!ctx
->shader_info
->fs
.writes_z
&& !ctx
->shader_info
->fs
.writes_stencil
&& !ctx
->shader_info
->fs
.writes_sample_mask
)
6528 last
= ctx
->output_mask
<= ((1ull << (i
+ 1)) - 1);
6530 bool ret
= si_export_mrt_color(ctx
, values
, V_008DFC_SQ_EXP_MRT
+ (i
- FRAG_RESULT_DATA0
), last
, &color_args
[index
]);
6536 for (unsigned i
= 0; i
< index
; i
++)
6537 ac_build_export(&ctx
->ac
, &color_args
[i
]);
6538 if (depth
|| stencil
|| samplemask
)
6539 radv_export_mrt_z(ctx
, depth
, stencil
, samplemask
);
6541 si_export_mrt_color(ctx
, NULL
, V_008DFC_SQ_EXP_NULL
, true, &color_args
[0]);
6542 ac_build_export(&ctx
->ac
, &color_args
[0]);
6547 emit_gs_epilogue(struct nir_to_llvm_context
*ctx
)
6549 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
, ctx
->gs_wave_id
);
6553 handle_shader_outputs_post(struct ac_shader_abi
*abi
, unsigned max_outputs
,
6554 LLVMValueRef
*addrs
)
6556 struct nir_to_llvm_context
*ctx
= nir_to_llvm_context_from_abi(abi
);
6558 switch (ctx
->stage
) {
6559 case MESA_SHADER_VERTEX
:
6560 if (ctx
->options
->key
.vs
.as_ls
)
6561 handle_ls_outputs_post(ctx
);
6562 else if (ctx
->options
->key
.vs
.as_es
)
6563 handle_es_outputs_post(ctx
, &ctx
->shader_info
->vs
.es_info
);
6565 handle_vs_outputs_post(ctx
, ctx
->options
->key
.vs
.export_prim_id
,
6566 &ctx
->shader_info
->vs
.outinfo
);
6568 case MESA_SHADER_FRAGMENT
:
6569 handle_fs_outputs_post(ctx
);
6571 case MESA_SHADER_GEOMETRY
:
6572 emit_gs_epilogue(ctx
);
6574 case MESA_SHADER_TESS_CTRL
:
6575 handle_tcs_outputs_post(ctx
);
6577 case MESA_SHADER_TESS_EVAL
:
6578 if (ctx
->options
->key
.tes
.as_es
)
6579 handle_es_outputs_post(ctx
, &ctx
->shader_info
->tes
.es_info
);
6581 handle_vs_outputs_post(ctx
, ctx
->options
->key
.tes
.export_prim_id
,
6582 &ctx
->shader_info
->tes
.outinfo
);
6589 static void ac_llvm_finalize_module(struct nir_to_llvm_context
* ctx
)
6591 LLVMPassManagerRef passmgr
;
6592 /* Create the pass manager */
6593 passmgr
= LLVMCreateFunctionPassManagerForModule(
6596 /* This pass should eliminate all the load and store instructions */
6597 LLVMAddPromoteMemoryToRegisterPass(passmgr
);
6599 /* Add some optimization passes */
6600 LLVMAddScalarReplAggregatesPass(passmgr
);
6601 LLVMAddLICMPass(passmgr
);
6602 LLVMAddAggressiveDCEPass(passmgr
);
6603 LLVMAddCFGSimplificationPass(passmgr
);
6604 LLVMAddInstructionCombiningPass(passmgr
);
6607 LLVMInitializeFunctionPassManager(passmgr
);
6608 LLVMRunFunctionPassManager(passmgr
, ctx
->main_function
);
6609 LLVMFinalizeFunctionPassManager(passmgr
);
6611 LLVMDisposeBuilder(ctx
->builder
);
6612 LLVMDisposePassManager(passmgr
);
6616 ac_nir_eliminate_const_vs_outputs(struct nir_to_llvm_context
*ctx
)
6618 struct ac_vs_output_info
*outinfo
;
6620 switch (ctx
->stage
) {
6621 case MESA_SHADER_FRAGMENT
:
6622 case MESA_SHADER_COMPUTE
:
6623 case MESA_SHADER_TESS_CTRL
:
6624 case MESA_SHADER_GEOMETRY
:
6626 case MESA_SHADER_VERTEX
:
6627 if (ctx
->options
->key
.vs
.as_ls
||
6628 ctx
->options
->key
.vs
.as_es
)
6630 outinfo
= &ctx
->shader_info
->vs
.outinfo
;
6632 case MESA_SHADER_TESS_EVAL
:
6633 if (ctx
->options
->key
.vs
.as_es
)
6635 outinfo
= &ctx
->shader_info
->tes
.outinfo
;
6638 unreachable("Unhandled shader type");
6641 ac_optimize_vs_outputs(&ctx
->ac
,
6643 outinfo
->vs_output_param_offset
,
6645 &outinfo
->param_exports
);
6649 ac_setup_rings(struct nir_to_llvm_context
*ctx
)
6651 if ((ctx
->stage
== MESA_SHADER_VERTEX
&& ctx
->options
->key
.vs
.as_es
) ||
6652 (ctx
->stage
== MESA_SHADER_TESS_EVAL
&& ctx
->options
->key
.tes
.as_es
)) {
6653 ctx
->esgs_ring
= ac_build_load_to_sgpr(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->ac
.i32
, RING_ESGS_VS
, false));
6656 if (ctx
->is_gs_copy_shader
) {
6657 ctx
->gsvs_ring
= ac_build_load_to_sgpr(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->ac
.i32
, RING_GSVS_VS
, false));
6659 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
6661 ctx
->esgs_ring
= ac_build_load_to_sgpr(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->ac
.i32
, RING_ESGS_GS
, false));
6662 ctx
->gsvs_ring
= ac_build_load_to_sgpr(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->ac
.i32
, RING_GSVS_GS
, false));
6664 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->ac
.v4i32
, "");
6666 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->gsvs_num_entries
, LLVMConstInt(ctx
->ac
.i32
, 2, false), "");
6667 tmp
= LLVMBuildExtractElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->ac
.i32_1
, "");
6668 tmp
= LLVMBuildOr(ctx
->builder
, tmp
, ctx
->gsvs_ring_stride
, "");
6669 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, tmp
, ctx
->ac
.i32_1
, "");
6672 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
||
6673 ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
6674 ctx
->hs_ring_tess_offchip
= ac_build_load_to_sgpr(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->ac
.i32
, RING_HS_TESS_OFFCHIP
, false));
6675 ctx
->hs_ring_tess_factor
= ac_build_load_to_sgpr(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->ac
.i32
, RING_HS_TESS_FACTOR
, false));
6680 ac_nir_get_max_workgroup_size(enum chip_class chip_class
,
6681 const struct nir_shader
*nir
)
6683 switch (nir
->info
.stage
) {
6684 case MESA_SHADER_TESS_CTRL
:
6685 return chip_class
>= CIK
? 128 : 64;
6686 case MESA_SHADER_GEOMETRY
:
6687 return chip_class
>= GFX9
? 128 : 64;
6688 case MESA_SHADER_COMPUTE
:
6694 unsigned max_workgroup_size
= nir
->info
.cs
.local_size
[0] *
6695 nir
->info
.cs
.local_size
[1] *
6696 nir
->info
.cs
.local_size
[2];
6697 return max_workgroup_size
;
6700 /* Fixup the HW not emitting the TCS regs if there are no HS threads. */
6701 static void ac_nir_fixup_ls_hs_input_vgprs(struct nir_to_llvm_context
*ctx
)
6703 LLVMValueRef count
= ac_build_bfe(&ctx
->ac
, ctx
->merged_wave_info
,
6704 LLVMConstInt(ctx
->ac
.i32
, 8, false),
6705 LLVMConstInt(ctx
->ac
.i32
, 8, false), false);
6706 LLVMValueRef hs_empty
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
, count
,
6708 ctx
->abi
.instance_id
= LLVMBuildSelect(ctx
->ac
.builder
, hs_empty
, ctx
->rel_auto_id
, ctx
->abi
.instance_id
, "");
6709 ctx
->vs_prim_id
= LLVMBuildSelect(ctx
->ac
.builder
, hs_empty
, ctx
->abi
.vertex_id
, ctx
->vs_prim_id
, "");
6710 ctx
->rel_auto_id
= LLVMBuildSelect(ctx
->ac
.builder
, hs_empty
, ctx
->abi
.tcs_rel_ids
, ctx
->rel_auto_id
, "");
6711 ctx
->abi
.vertex_id
= LLVMBuildSelect(ctx
->ac
.builder
, hs_empty
, ctx
->abi
.tcs_patch_id
, ctx
->abi
.vertex_id
, "");
6714 static void prepare_gs_input_vgprs(struct nir_to_llvm_context
*ctx
)
6716 for(int i
= 5; i
>= 0; --i
) {
6717 ctx
->gs_vtx_offset
[i
] = ac_build_bfe(&ctx
->ac
, ctx
->gs_vtx_offset
[i
& ~1],
6718 LLVMConstInt(ctx
->ac
.i32
, (i
& 1) * 16, false),
6719 LLVMConstInt(ctx
->ac
.i32
, 16, false), false);
6722 ctx
->gs_wave_id
= ac_build_bfe(&ctx
->ac
, ctx
->merged_wave_info
,
6723 LLVMConstInt(ctx
->ac
.i32
, 16, false),
6724 LLVMConstInt(ctx
->ac
.i32
, 8, false), false);
6727 void ac_nir_translate(struct ac_llvm_context
*ac
, struct ac_shader_abi
*abi
,
6728 struct nir_shader
*nir
, struct nir_to_llvm_context
*nctx
)
6730 struct ac_nir_context ctx
= {};
6731 struct nir_function
*func
;
6740 ctx
.stage
= nir
->info
.stage
;
6742 ctx
.main_function
= LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx
.ac
.builder
));
6744 nir_foreach_variable(variable
, &nir
->outputs
)
6745 handle_shader_output_decl(&ctx
, nir
, variable
);
6747 ctx
.defs
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
6748 _mesa_key_pointer_equal
);
6749 ctx
.phis
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
6750 _mesa_key_pointer_equal
);
6751 ctx
.vars
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
6752 _mesa_key_pointer_equal
);
6754 func
= (struct nir_function
*)exec_list_get_head(&nir
->functions
);
6756 setup_locals(&ctx
, func
);
6758 if (nir
->info
.stage
== MESA_SHADER_COMPUTE
)
6759 setup_shared(&ctx
, nir
);
6761 visit_cf_list(&ctx
, &func
->impl
->body
);
6762 phi_post_pass(&ctx
);
6764 ctx
.abi
->emit_outputs(ctx
.abi
, RADEON_LLVM_MAX_OUTPUTS
,
6768 ralloc_free(ctx
.defs
);
6769 ralloc_free(ctx
.phis
);
6770 ralloc_free(ctx
.vars
);
6777 LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm
,
6778 struct nir_shader
*const *shaders
,
6780 struct ac_shader_variant_info
*shader_info
,
6781 const struct ac_nir_compiler_options
*options
)
6783 struct nir_to_llvm_context ctx
= {0};
6785 ctx
.options
= options
;
6786 ctx
.shader_info
= shader_info
;
6787 ctx
.context
= LLVMContextCreate();
6788 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
6790 ac_llvm_context_init(&ctx
.ac
, ctx
.context
, options
->chip_class
,
6792 ctx
.ac
.module
= ctx
.module
;
6793 LLVMSetTarget(ctx
.module
, options
->supports_spill
? "amdgcn-mesa-mesa3d" : "amdgcn--");
6795 LLVMTargetDataRef data_layout
= LLVMCreateTargetDataLayout(tm
);
6796 char *data_layout_str
= LLVMCopyStringRepOfTargetData(data_layout
);
6797 LLVMSetDataLayout(ctx
.module
, data_layout_str
);
6798 LLVMDisposeTargetData(data_layout
);
6799 LLVMDisposeMessage(data_layout_str
);
6801 enum ac_float_mode float_mode
=
6802 options
->unsafe_math
? AC_FLOAT_MODE_UNSAFE_FP_MATH
:
6803 AC_FLOAT_MODE_DEFAULT
;
6805 ctx
.builder
= ac_create_builder(ctx
.context
, float_mode
);
6806 ctx
.ac
.builder
= ctx
.builder
;
6808 memset(shader_info
, 0, sizeof(*shader_info
));
6810 for(int i
= 0; i
< shader_count
; ++i
)
6811 ac_nir_shader_info_pass(shaders
[i
], options
, &shader_info
->info
);
6813 for (i
= 0; i
< AC_UD_MAX_SETS
; i
++)
6814 shader_info
->user_sgprs_locs
.descriptor_sets
[i
].sgpr_idx
= -1;
6815 for (i
= 0; i
< AC_UD_MAX_UD
; i
++)
6816 shader_info
->user_sgprs_locs
.shader_data
[i
].sgpr_idx
= -1;
6818 ctx
.max_workgroup_size
= 0;
6819 for (int i
= 0; i
< shader_count
; ++i
) {
6820 ctx
.max_workgroup_size
= MAX2(ctx
.max_workgroup_size
,
6821 ac_nir_get_max_workgroup_size(ctx
.options
->chip_class
,
6825 create_function(&ctx
, shaders
[shader_count
- 1]->info
.stage
, shader_count
>= 2,
6826 shader_count
>= 2 ? shaders
[shader_count
- 2]->info
.stage
: MESA_SHADER_VERTEX
);
6828 ctx
.abi
.inputs
= &ctx
.inputs
[0];
6829 ctx
.abi
.emit_outputs
= handle_shader_outputs_post
;
6830 ctx
.abi
.emit_vertex
= visit_emit_vertex
;
6831 ctx
.abi
.load_ubo
= radv_load_ubo
;
6832 ctx
.abi
.load_ssbo
= radv_load_ssbo
;
6833 ctx
.abi
.load_sampler_desc
= radv_get_sampler_desc
;
6834 ctx
.abi
.clamp_shadow_reference
= false;
6836 if (shader_count
>= 2)
6837 ac_init_exec_full_mask(&ctx
.ac
);
6839 if (ctx
.ac
.chip_class
== GFX9
&&
6840 shaders
[shader_count
- 1]->info
.stage
== MESA_SHADER_TESS_CTRL
)
6841 ac_nir_fixup_ls_hs_input_vgprs(&ctx
);
6843 for(int i
= 0; i
< shader_count
; ++i
) {
6844 ctx
.stage
= shaders
[i
]->info
.stage
;
6845 ctx
.output_mask
= 0;
6846 ctx
.tess_outputs_written
= 0;
6847 ctx
.num_output_clips
= shaders
[i
]->info
.clip_distance_array_size
;
6848 ctx
.num_output_culls
= shaders
[i
]->info
.cull_distance_array_size
;
6850 if (shaders
[i
]->info
.stage
== MESA_SHADER_GEOMETRY
) {
6851 ctx
.gs_next_vertex
= ac_build_alloca(&ctx
.ac
, ctx
.ac
.i32
, "gs_next_vertex");
6852 ctx
.gs_max_out_vertices
= shaders
[i
]->info
.gs
.vertices_out
;
6853 ctx
.abi
.load_inputs
= load_gs_input
;
6854 ctx
.abi
.emit_primitive
= visit_end_primitive
;
6855 } else if (shaders
[i
]->info
.stage
== MESA_SHADER_TESS_CTRL
) {
6856 ctx
.tcs_outputs_read
= shaders
[i
]->info
.outputs_read
;
6857 ctx
.tcs_patch_outputs_read
= shaders
[i
]->info
.patch_outputs_read
;
6858 ctx
.abi
.load_tess_varyings
= load_tcs_varyings
;
6859 ctx
.abi
.load_patch_vertices_in
= load_patch_vertices_in
;
6860 ctx
.abi
.store_tcs_outputs
= store_tcs_output
;
6861 } else if (shaders
[i
]->info
.stage
== MESA_SHADER_TESS_EVAL
) {
6862 ctx
.tes_primitive_mode
= shaders
[i
]->info
.tess
.primitive_mode
;
6863 ctx
.abi
.load_tess_varyings
= load_tes_input
;
6864 ctx
.abi
.load_tess_coord
= load_tess_coord
;
6865 ctx
.abi
.load_patch_vertices_in
= load_patch_vertices_in
;
6866 } else if (shaders
[i
]->info
.stage
== MESA_SHADER_VERTEX
) {
6867 if (shader_info
->info
.vs
.needs_instance_id
) {
6868 if (ctx
.options
->key
.vs
.as_ls
) {
6869 ctx
.shader_info
->vs
.vgpr_comp_cnt
=
6870 MAX2(2, ctx
.shader_info
->vs
.vgpr_comp_cnt
);
6872 ctx
.shader_info
->vs
.vgpr_comp_cnt
=
6873 MAX2(1, ctx
.shader_info
->vs
.vgpr_comp_cnt
);
6876 } else if (shaders
[i
]->info
.stage
== MESA_SHADER_FRAGMENT
) {
6877 shader_info
->fs
.can_discard
= shaders
[i
]->info
.fs
.uses_discard
;
6881 emit_barrier(&ctx
.ac
, ctx
.stage
);
6883 ac_setup_rings(&ctx
);
6885 LLVMBasicBlockRef merge_block
;
6886 if (shader_count
>= 2) {
6887 LLVMValueRef fn
= LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx
.ac
.builder
));
6888 LLVMBasicBlockRef then_block
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, fn
, "");
6889 merge_block
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, fn
, "");
6891 LLVMValueRef count
= ac_build_bfe(&ctx
.ac
, ctx
.merged_wave_info
,
6892 LLVMConstInt(ctx
.ac
.i32
, 8 * i
, false),
6893 LLVMConstInt(ctx
.ac
.i32
, 8, false), false);
6894 LLVMValueRef thread_id
= ac_get_thread_id(&ctx
.ac
);
6895 LLVMValueRef cond
= LLVMBuildICmp(ctx
.ac
.builder
, LLVMIntULT
,
6896 thread_id
, count
, "");
6897 LLVMBuildCondBr(ctx
.ac
.builder
, cond
, then_block
, merge_block
);
6899 LLVMPositionBuilderAtEnd(ctx
.ac
.builder
, then_block
);
6902 if (shaders
[i
]->info
.stage
== MESA_SHADER_FRAGMENT
)
6903 handle_fs_inputs(&ctx
, shaders
[i
]);
6904 else if(shaders
[i
]->info
.stage
== MESA_SHADER_VERTEX
)
6905 handle_vs_inputs(&ctx
, shaders
[i
]);
6906 else if(shader_count
>= 2 && shaders
[i
]->info
.stage
== MESA_SHADER_GEOMETRY
)
6907 prepare_gs_input_vgprs(&ctx
);
6909 nir_foreach_variable(variable
, &shaders
[i
]->outputs
)
6910 scan_shader_output_decl(&ctx
, variable
, shaders
[i
], shaders
[i
]->info
.stage
);
6912 ac_nir_translate(&ctx
.ac
, &ctx
.abi
, shaders
[i
], &ctx
);
6914 if (shader_count
>= 2) {
6915 LLVMBuildBr(ctx
.ac
.builder
, merge_block
);
6916 LLVMPositionBuilderAtEnd(ctx
.ac
.builder
, merge_block
);
6919 if (shaders
[i
]->info
.stage
== MESA_SHADER_GEOMETRY
) {
6920 unsigned addclip
= shaders
[i
]->info
.clip_distance_array_size
+
6921 shaders
[i
]->info
.cull_distance_array_size
> 4;
6922 shader_info
->gs
.gsvs_vertex_size
= (util_bitcount64(ctx
.output_mask
) + addclip
) * 16;
6923 shader_info
->gs
.max_gsvs_emit_size
= shader_info
->gs
.gsvs_vertex_size
*
6924 shaders
[i
]->info
.gs
.vertices_out
;
6925 } else if (shaders
[i
]->info
.stage
== MESA_SHADER_TESS_CTRL
) {
6926 shader_info
->tcs
.outputs_written
= ctx
.tess_outputs_written
;
6927 shader_info
->tcs
.patch_outputs_written
= ctx
.tess_patch_outputs_written
;
6928 } else if (shaders
[i
]->info
.stage
== MESA_SHADER_VERTEX
&& ctx
.options
->key
.vs
.as_ls
) {
6929 shader_info
->vs
.outputs_written
= ctx
.tess_outputs_written
;
6933 LLVMBuildRetVoid(ctx
.builder
);
6935 if (options
->dump_preoptir
)
6936 ac_dump_module(ctx
.module
);
6938 ac_llvm_finalize_module(&ctx
);
6940 if (shader_count
== 1)
6941 ac_nir_eliminate_const_vs_outputs(&ctx
);
6946 static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di
, void *context
)
6948 unsigned *retval
= (unsigned *)context
;
6949 LLVMDiagnosticSeverity severity
= LLVMGetDiagInfoSeverity(di
);
6950 char *description
= LLVMGetDiagInfoDescription(di
);
6952 if (severity
== LLVMDSError
) {
6954 fprintf(stderr
, "LLVM triggered Diagnostic Handler: %s\n",
6958 LLVMDisposeMessage(description
);
6961 static unsigned ac_llvm_compile(LLVMModuleRef M
,
6962 struct ac_shader_binary
*binary
,
6963 LLVMTargetMachineRef tm
)
6965 unsigned retval
= 0;
6967 LLVMContextRef llvm_ctx
;
6968 LLVMMemoryBufferRef out_buffer
;
6969 unsigned buffer_size
;
6970 const char *buffer_data
;
6973 /* Setup Diagnostic Handler*/
6974 llvm_ctx
= LLVMGetModuleContext(M
);
6976 LLVMContextSetDiagnosticHandler(llvm_ctx
, ac_diagnostic_handler
,
6980 mem_err
= LLVMTargetMachineEmitToMemoryBuffer(tm
, M
, LLVMObjectFile
,
6983 /* Process Errors/Warnings */
6985 fprintf(stderr
, "%s: %s", __FUNCTION__
, err
);
6991 /* Extract Shader Code*/
6992 buffer_size
= LLVMGetBufferSize(out_buffer
);
6993 buffer_data
= LLVMGetBufferStart(out_buffer
);
6995 ac_elf_read(buffer_data
, buffer_size
, binary
);
6998 LLVMDisposeMemoryBuffer(out_buffer
);
7004 static void ac_compile_llvm_module(LLVMTargetMachineRef tm
,
7005 LLVMModuleRef llvm_module
,
7006 struct ac_shader_binary
*binary
,
7007 struct ac_shader_config
*config
,
7008 struct ac_shader_variant_info
*shader_info
,
7009 gl_shader_stage stage
,
7010 bool dump_shader
, bool supports_spill
)
7013 ac_dump_module(llvm_module
);
7015 memset(binary
, 0, sizeof(*binary
));
7016 int v
= ac_llvm_compile(llvm_module
, binary
, tm
);
7018 fprintf(stderr
, "compile failed\n");
7022 fprintf(stderr
, "disasm:\n%s\n", binary
->disasm_string
);
7024 ac_shader_binary_read_config(binary
, config
, 0, supports_spill
);
7026 LLVMContextRef ctx
= LLVMGetModuleContext(llvm_module
);
7027 LLVMDisposeModule(llvm_module
);
7028 LLVMContextDispose(ctx
);
7030 if (stage
== MESA_SHADER_FRAGMENT
) {
7031 shader_info
->num_input_vgprs
= 0;
7032 if (G_0286CC_PERSP_SAMPLE_ENA(config
->spi_ps_input_addr
))
7033 shader_info
->num_input_vgprs
+= 2;
7034 if (G_0286CC_PERSP_CENTER_ENA(config
->spi_ps_input_addr
))
7035 shader_info
->num_input_vgprs
+= 2;
7036 if (G_0286CC_PERSP_CENTROID_ENA(config
->spi_ps_input_addr
))
7037 shader_info
->num_input_vgprs
+= 2;
7038 if (G_0286CC_PERSP_PULL_MODEL_ENA(config
->spi_ps_input_addr
))
7039 shader_info
->num_input_vgprs
+= 3;
7040 if (G_0286CC_LINEAR_SAMPLE_ENA(config
->spi_ps_input_addr
))
7041 shader_info
->num_input_vgprs
+= 2;
7042 if (G_0286CC_LINEAR_CENTER_ENA(config
->spi_ps_input_addr
))
7043 shader_info
->num_input_vgprs
+= 2;
7044 if (G_0286CC_LINEAR_CENTROID_ENA(config
->spi_ps_input_addr
))
7045 shader_info
->num_input_vgprs
+= 2;
7046 if (G_0286CC_LINE_STIPPLE_TEX_ENA(config
->spi_ps_input_addr
))
7047 shader_info
->num_input_vgprs
+= 1;
7048 if (G_0286CC_POS_X_FLOAT_ENA(config
->spi_ps_input_addr
))
7049 shader_info
->num_input_vgprs
+= 1;
7050 if (G_0286CC_POS_Y_FLOAT_ENA(config
->spi_ps_input_addr
))
7051 shader_info
->num_input_vgprs
+= 1;
7052 if (G_0286CC_POS_Z_FLOAT_ENA(config
->spi_ps_input_addr
))
7053 shader_info
->num_input_vgprs
+= 1;
7054 if (G_0286CC_POS_W_FLOAT_ENA(config
->spi_ps_input_addr
))
7055 shader_info
->num_input_vgprs
+= 1;
7056 if (G_0286CC_FRONT_FACE_ENA(config
->spi_ps_input_addr
))
7057 shader_info
->num_input_vgprs
+= 1;
7058 if (G_0286CC_ANCILLARY_ENA(config
->spi_ps_input_addr
))
7059 shader_info
->num_input_vgprs
+= 1;
7060 if (G_0286CC_SAMPLE_COVERAGE_ENA(config
->spi_ps_input_addr
))
7061 shader_info
->num_input_vgprs
+= 1;
7062 if (G_0286CC_POS_FIXED_PT_ENA(config
->spi_ps_input_addr
))
7063 shader_info
->num_input_vgprs
+= 1;
7065 config
->num_vgprs
= MAX2(config
->num_vgprs
, shader_info
->num_input_vgprs
);
7067 /* +3 for scratch wave offset and VCC */
7068 config
->num_sgprs
= MAX2(config
->num_sgprs
,
7069 shader_info
->num_input_sgprs
+ 3);
7071 /* Enable 64-bit and 16-bit denormals, because there is no performance
7074 * If denormals are enabled, all floating-point output modifiers are
7077 * Don't enable denormals for 32-bit floats, because:
7078 * - Floating-point output modifiers would be ignored by the hw.
7079 * - Some opcodes don't support denormals, such as v_mad_f32. We would
7080 * have to stop using those.
7081 * - SI & CI would be very slow.
7083 config
->float_mode
|= V_00B028_FP_64_DENORMS
;
7087 ac_fill_shader_info(struct ac_shader_variant_info
*shader_info
, struct nir_shader
*nir
, const struct ac_nir_compiler_options
*options
)
7089 switch (nir
->info
.stage
) {
7090 case MESA_SHADER_COMPUTE
:
7091 for (int i
= 0; i
< 3; ++i
)
7092 shader_info
->cs
.block_size
[i
] = nir
->info
.cs
.local_size
[i
];
7094 case MESA_SHADER_FRAGMENT
:
7095 shader_info
->fs
.early_fragment_test
= nir
->info
.fs
.early_fragment_tests
;
7097 case MESA_SHADER_GEOMETRY
:
7098 shader_info
->gs
.vertices_in
= nir
->info
.gs
.vertices_in
;
7099 shader_info
->gs
.vertices_out
= nir
->info
.gs
.vertices_out
;
7100 shader_info
->gs
.output_prim
= nir
->info
.gs
.output_primitive
;
7101 shader_info
->gs
.invocations
= nir
->info
.gs
.invocations
;
7103 case MESA_SHADER_TESS_EVAL
:
7104 shader_info
->tes
.primitive_mode
= nir
->info
.tess
.primitive_mode
;
7105 shader_info
->tes
.spacing
= nir
->info
.tess
.spacing
;
7106 shader_info
->tes
.ccw
= nir
->info
.tess
.ccw
;
7107 shader_info
->tes
.point_mode
= nir
->info
.tess
.point_mode
;
7108 shader_info
->tes
.as_es
= options
->key
.tes
.as_es
;
7110 case MESA_SHADER_TESS_CTRL
:
7111 shader_info
->tcs
.tcs_vertices_out
= nir
->info
.tess
.tcs_vertices_out
;
7113 case MESA_SHADER_VERTEX
:
7114 shader_info
->vs
.as_es
= options
->key
.vs
.as_es
;
7115 shader_info
->vs
.as_ls
= options
->key
.vs
.as_ls
;
7116 /* in LS mode we need at least 1, invocation id needs 2, handled elsewhere */
7117 if (options
->key
.vs
.as_ls
)
7118 shader_info
->vs
.vgpr_comp_cnt
= MAX2(1, shader_info
->vs
.vgpr_comp_cnt
);
7125 void ac_compile_nir_shader(LLVMTargetMachineRef tm
,
7126 struct ac_shader_binary
*binary
,
7127 struct ac_shader_config
*config
,
7128 struct ac_shader_variant_info
*shader_info
,
7129 struct nir_shader
*const *nir
,
7131 const struct ac_nir_compiler_options
*options
,
7135 LLVMModuleRef llvm_module
= ac_translate_nir_to_llvm(tm
, nir
, nir_count
, shader_info
,
7138 ac_compile_llvm_module(tm
, llvm_module
, binary
, config
, shader_info
, nir
[0]->info
.stage
, dump_shader
, options
->supports_spill
);
7139 for (int i
= 0; i
< nir_count
; ++i
)
7140 ac_fill_shader_info(shader_info
, nir
[i
], options
);
7142 /* Determine the ES type (VS or TES) for the GS on GFX9. */
7143 if (options
->chip_class
== GFX9
) {
7144 if (nir_count
== 2 &&
7145 nir
[1]->info
.stage
== MESA_SHADER_GEOMETRY
) {
7146 shader_info
->gs
.es_type
= nir
[0]->info
.stage
;
7152 ac_gs_copy_shader_emit(struct nir_to_llvm_context
*ctx
)
7154 LLVMValueRef args
[9];
7155 args
[0] = ctx
->gsvs_ring
;
7156 args
[1] = LLVMBuildMul(ctx
->builder
, ctx
->abi
.vertex_id
, LLVMConstInt(ctx
->ac
.i32
, 4, false), "");
7157 args
[3] = ctx
->ac
.i32_0
;
7158 args
[4] = ctx
->ac
.i32_1
; /* OFFEN */
7159 args
[5] = ctx
->ac
.i32_0
; /* IDXEN */
7160 args
[6] = ctx
->ac
.i32_1
; /* GLC */
7161 args
[7] = ctx
->ac
.i32_1
; /* SLC */
7162 args
[8] = ctx
->ac
.i32_0
; /* TFE */
7166 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
7170 if (!(ctx
->output_mask
& (1ull << i
)))
7173 if (i
== VARYING_SLOT_CLIP_DIST0
) {
7174 /* unpack clip and cull from a single set of slots */
7175 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
7180 for (unsigned j
= 0; j
< length
; j
++) {
7182 args
[2] = LLVMConstInt(ctx
->ac
.i32
,
7184 ctx
->gs_max_out_vertices
* 16 * 4, false);
7186 value
= ac_build_intrinsic(&ctx
->ac
,
7187 "llvm.SI.buffer.load.dword.i32.i32",
7188 ctx
->ac
.i32
, args
, 9,
7189 AC_FUNC_ATTR_READONLY
|
7190 AC_FUNC_ATTR_LEGACY
);
7192 LLVMBuildStore(ctx
->builder
,
7193 ac_to_float(&ctx
->ac
, value
), ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(i
, j
)]);
7197 handle_vs_outputs_post(ctx
, false, &ctx
->shader_info
->vs
.outinfo
);
7200 void ac_create_gs_copy_shader(LLVMTargetMachineRef tm
,
7201 struct nir_shader
*geom_shader
,
7202 struct ac_shader_binary
*binary
,
7203 struct ac_shader_config
*config
,
7204 struct ac_shader_variant_info
*shader_info
,
7205 const struct ac_nir_compiler_options
*options
,
7208 struct nir_to_llvm_context ctx
= {0};
7209 ctx
.context
= LLVMContextCreate();
7210 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
7211 ctx
.options
= options
;
7212 ctx
.shader_info
= shader_info
;
7214 ac_llvm_context_init(&ctx
.ac
, ctx
.context
, options
->chip_class
,
7216 ctx
.ac
.module
= ctx
.module
;
7218 ctx
.is_gs_copy_shader
= true;
7219 LLVMSetTarget(ctx
.module
, "amdgcn--");
7221 enum ac_float_mode float_mode
=
7222 options
->unsafe_math
? AC_FLOAT_MODE_UNSAFE_FP_MATH
:
7223 AC_FLOAT_MODE_DEFAULT
;
7225 ctx
.builder
= ac_create_builder(ctx
.context
, float_mode
);
7226 ctx
.ac
.builder
= ctx
.builder
;
7227 ctx
.stage
= MESA_SHADER_VERTEX
;
7229 create_function(&ctx
, MESA_SHADER_VERTEX
, false, MESA_SHADER_VERTEX
);
7231 ctx
.gs_max_out_vertices
= geom_shader
->info
.gs
.vertices_out
;
7232 ac_setup_rings(&ctx
);
7234 ctx
.num_output_clips
= geom_shader
->info
.clip_distance_array_size
;
7235 ctx
.num_output_culls
= geom_shader
->info
.cull_distance_array_size
;
7237 struct ac_nir_context nir_ctx
= {};
7238 nir_ctx
.ac
= ctx
.ac
;
7239 nir_ctx
.abi
= &ctx
.abi
;
7241 nir_ctx
.nctx
= &ctx
;
7244 nir_foreach_variable(variable
, &geom_shader
->outputs
) {
7245 scan_shader_output_decl(&ctx
, variable
, geom_shader
, MESA_SHADER_VERTEX
);
7246 handle_shader_output_decl(&nir_ctx
, geom_shader
, variable
);
7249 ac_gs_copy_shader_emit(&ctx
);
7253 LLVMBuildRetVoid(ctx
.builder
);
7255 ac_llvm_finalize_module(&ctx
);
7257 ac_compile_llvm_module(tm
, ctx
.module
, binary
, config
, shader_info
,
7259 dump_shader
, options
->supports_spill
);