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ac/nir_to_llvm: add ac_are_tessfactors_def_in_all_invocs()
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41
42 LLVMValueRef *ssa_defs;
43
44 struct hash_table *defs;
45 struct hash_table *phis;
46 struct hash_table *vars;
47
48 LLVMValueRef main_function;
49 LLVMBasicBlockRef continue_block;
50 LLVMBasicBlockRef break_block;
51
52 int num_locals;
53 LLVMValueRef *locals;
54 };
55
56 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
57 nir_deref_instr *deref_instr,
58 enum ac_descriptor_type desc_type,
59 const nir_tex_instr *instr,
60 bool image, bool write);
61
62 static void
63 build_store_values_extended(struct ac_llvm_context *ac,
64 LLVMValueRef *values,
65 unsigned value_count,
66 unsigned value_stride,
67 LLVMValueRef vec)
68 {
69 LLVMBuilderRef builder = ac->builder;
70 unsigned i;
71
72 for (i = 0; i < value_count; i++) {
73 LLVMValueRef ptr = values[i * value_stride];
74 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
75 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
76 LLVMBuildStore(builder, value, ptr);
77 }
78 }
79
80 static enum ac_image_dim
81 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
82 bool is_array)
83 {
84 switch (dim) {
85 case GLSL_SAMPLER_DIM_1D:
86 if (ctx->chip_class >= GFX9)
87 return is_array ? ac_image_2darray : ac_image_2d;
88 return is_array ? ac_image_1darray : ac_image_1d;
89 case GLSL_SAMPLER_DIM_2D:
90 case GLSL_SAMPLER_DIM_RECT:
91 case GLSL_SAMPLER_DIM_EXTERNAL:
92 return is_array ? ac_image_2darray : ac_image_2d;
93 case GLSL_SAMPLER_DIM_3D:
94 return ac_image_3d;
95 case GLSL_SAMPLER_DIM_CUBE:
96 return ac_image_cube;
97 case GLSL_SAMPLER_DIM_MS:
98 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
99 case GLSL_SAMPLER_DIM_SUBPASS:
100 return ac_image_2darray;
101 case GLSL_SAMPLER_DIM_SUBPASS_MS:
102 return ac_image_2darraymsaa;
103 default:
104 unreachable("bad sampler dim");
105 }
106 }
107
108 static enum ac_image_dim
109 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
110 bool is_array)
111 {
112 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
113
114 if (dim == ac_image_cube ||
115 (ctx->chip_class <= VI && dim == ac_image_3d))
116 dim = ac_image_2darray;
117
118 return dim;
119 }
120
121 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
122 const nir_ssa_def *def)
123 {
124 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
125 if (def->num_components > 1) {
126 type = LLVMVectorType(type, def->num_components);
127 }
128 return type;
129 }
130
131 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
132 {
133 assert(src.is_ssa);
134 return nir->ssa_defs[src.ssa->index];
135 }
136
137 static LLVMValueRef
138 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
139 {
140 LLVMValueRef ptr = get_src(ctx, src);
141 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
142 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
143
144 return LLVMBuildBitCast(ctx->ac.builder, ptr,
145 LLVMPointerType(ctx->ac.i32, addr_space), "");
146 }
147
148 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
149 const struct nir_block *b)
150 {
151 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
152 return (LLVMBasicBlockRef)entry->data;
153 }
154
155 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
156 nir_alu_src src,
157 unsigned num_components)
158 {
159 LLVMValueRef value = get_src(ctx, src.src);
160 bool need_swizzle = false;
161
162 assert(value);
163 unsigned src_components = ac_get_llvm_num_components(value);
164 for (unsigned i = 0; i < num_components; ++i) {
165 assert(src.swizzle[i] < src_components);
166 if (src.swizzle[i] != i)
167 need_swizzle = true;
168 }
169
170 if (need_swizzle || num_components != src_components) {
171 LLVMValueRef masks[] = {
172 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
173 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
174 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
175 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
176
177 if (src_components > 1 && num_components == 1) {
178 value = LLVMBuildExtractElement(ctx->ac.builder, value,
179 masks[0], "");
180 } else if (src_components == 1 && num_components > 1) {
181 LLVMValueRef values[] = {value, value, value, value};
182 value = ac_build_gather_values(&ctx->ac, values, num_components);
183 } else {
184 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
185 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
186 swizzle, "");
187 }
188 }
189 assert(!src.negate);
190 assert(!src.abs);
191 return value;
192 }
193
194 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
195 LLVMIntPredicate pred, LLVMValueRef src0,
196 LLVMValueRef src1)
197 {
198 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
199 return LLVMBuildSelect(ctx->builder, result,
200 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
201 ctx->i32_0, "");
202 }
203
204 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
205 LLVMRealPredicate pred, LLVMValueRef src0,
206 LLVMValueRef src1)
207 {
208 LLVMValueRef result;
209 src0 = ac_to_float(ctx, src0);
210 src1 = ac_to_float(ctx, src1);
211 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
212 return LLVMBuildSelect(ctx->builder, result,
213 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
214 ctx->i32_0, "");
215 }
216
217 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
218 const char *intrin,
219 LLVMTypeRef result_type,
220 LLVMValueRef src0)
221 {
222 char name[64];
223 LLVMValueRef params[] = {
224 ac_to_float(ctx, src0),
225 };
226
227 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
228 ac_get_elem_bits(ctx, result_type));
229 assert(length < sizeof(name));
230 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
231 }
232
233 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
234 const char *intrin,
235 LLVMTypeRef result_type,
236 LLVMValueRef src0, LLVMValueRef src1)
237 {
238 char name[64];
239 LLVMValueRef params[] = {
240 ac_to_float(ctx, src0),
241 ac_to_float(ctx, src1),
242 };
243
244 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
245 ac_get_elem_bits(ctx, result_type));
246 assert(length < sizeof(name));
247 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
248 }
249
250 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
251 const char *intrin,
252 LLVMTypeRef result_type,
253 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
254 {
255 char name[64];
256 LLVMValueRef params[] = {
257 ac_to_float(ctx, src0),
258 ac_to_float(ctx, src1),
259 ac_to_float(ctx, src2),
260 };
261
262 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
263 ac_get_elem_bits(ctx, result_type));
264 assert(length < sizeof(name));
265 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
266 }
267
268 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
269 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
270 {
271 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
272 ctx->i32_0, "");
273 return LLVMBuildSelect(ctx->builder, v,
274 ac_to_integer_or_pointer(ctx, src1),
275 ac_to_integer_or_pointer(ctx, src2), "");
276 }
277
278 static LLVMValueRef emit_minmax_int(struct ac_llvm_context *ctx,
279 LLVMIntPredicate pred,
280 LLVMValueRef src0, LLVMValueRef src1)
281 {
282 return LLVMBuildSelect(ctx->builder,
283 LLVMBuildICmp(ctx->builder, pred, src0, src1, ""),
284 src0,
285 src1, "");
286
287 }
288 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
289 LLVMValueRef src0)
290 {
291 return emit_minmax_int(ctx, LLVMIntSGT, src0,
292 LLVMBuildNeg(ctx->builder, src0, ""));
293 }
294
295 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
296 const char *intrin,
297 LLVMValueRef src0, LLVMValueRef src1)
298 {
299 LLVMTypeRef ret_type;
300 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
301 LLVMValueRef res;
302 LLVMValueRef params[] = { src0, src1 };
303 ret_type = LLVMStructTypeInContext(ctx->context, types,
304 2, true);
305
306 res = ac_build_intrinsic(ctx, intrin, ret_type,
307 params, 2, AC_FUNC_ATTR_READNONE);
308
309 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
310 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
311 return res;
312 }
313
314 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
315 LLVMValueRef src0,
316 unsigned bitsize)
317 {
318 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
319 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
320 "");
321 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
322
323 if (bitsize == 32)
324 return result;
325
326 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
327 }
328
329 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
330 LLVMValueRef src0)
331 {
332 src0 = ac_to_float(ctx, src0);
333 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
334 return LLVMBuildSExt(ctx->builder,
335 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
336 ctx->i32, "");
337 }
338
339 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
340 LLVMValueRef src0,
341 unsigned bitsize)
342 {
343 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
344
345 if (bitsize == 32)
346 return result;
347
348 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
349 }
350
351 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
352 LLVMValueRef src0)
353 {
354 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
355 return LLVMBuildSExt(ctx->builder,
356 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
357 ctx->i32, "");
358 }
359
360 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
361 LLVMValueRef src0)
362 {
363 LLVMValueRef result;
364 LLVMValueRef cond = NULL;
365
366 src0 = ac_to_float(ctx, src0);
367 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
368
369 if (ctx->chip_class >= VI) {
370 LLVMValueRef args[2];
371 /* Check if the result is a denormal - and flush to 0 if so. */
372 args[0] = result;
373 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
374 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
375 }
376
377 /* need to convert back up to f32 */
378 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
379
380 if (ctx->chip_class >= VI)
381 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
382 else {
383 /* for SI/CIK */
384 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
385 * so compare the result and flush to 0 if it's smaller.
386 */
387 LLVMValueRef temp, cond2;
388 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
389 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
390 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
391 temp, "");
392 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
393 temp, ctx->f32_0, "");
394 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
395 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
396 }
397 return result;
398 }
399
400 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
401 LLVMValueRef src0, LLVMValueRef src1)
402 {
403 LLVMValueRef dst64, result;
404 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
405 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
406
407 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
408 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
409 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
410 return result;
411 }
412
413 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
414 LLVMValueRef src0, LLVMValueRef src1)
415 {
416 LLVMValueRef dst64, result;
417 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
418 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
419
420 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
421 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
422 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
423 return result;
424 }
425
426 static LLVMValueRef emit_bitfield_extract(struct ac_llvm_context *ctx,
427 bool is_signed,
428 const LLVMValueRef srcs[3])
429 {
430 LLVMValueRef result;
431
432 if (HAVE_LLVM >= 0x0800) {
433 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
434 result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed);
435 result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, "");
436 } else {
437 /* FIXME: LLVM 7+ returns incorrect result when count is 0.
438 * https://bugs.freedesktop.org/show_bug.cgi?id=107276
439 */
440 LLVMValueRef zero = ctx->i32_0;
441 LLVMValueRef icond1 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
442 LLVMValueRef icond2 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], zero, "");
443
444 result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed);
445 result = LLVMBuildSelect(ctx->builder, icond1, srcs[0], result, "");
446 result = LLVMBuildSelect(ctx->builder, icond2, zero, result, "");
447 }
448
449 return result;
450 }
451
452 static LLVMValueRef emit_bitfield_insert(struct ac_llvm_context *ctx,
453 LLVMValueRef src0, LLVMValueRef src1,
454 LLVMValueRef src2, LLVMValueRef src3)
455 {
456 LLVMValueRef bfi_args[3], result;
457
458 bfi_args[0] = LLVMBuildShl(ctx->builder,
459 LLVMBuildSub(ctx->builder,
460 LLVMBuildShl(ctx->builder,
461 ctx->i32_1,
462 src3, ""),
463 ctx->i32_1, ""),
464 src2, "");
465 bfi_args[1] = LLVMBuildShl(ctx->builder, src1, src2, "");
466 bfi_args[2] = src0;
467
468 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, src3, LLVMConstInt(ctx->i32, 32, false), "");
469
470 /* Calculate:
471 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
472 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
473 */
474 result = LLVMBuildXor(ctx->builder, bfi_args[2],
475 LLVMBuildAnd(ctx->builder, bfi_args[0],
476 LLVMBuildXor(ctx->builder, bfi_args[1], bfi_args[2], ""), ""), "");
477
478 result = LLVMBuildSelect(ctx->builder, icond, src1, result, "");
479 return result;
480 }
481
482 static LLVMValueRef emit_pack_half_2x16(struct ac_llvm_context *ctx,
483 LLVMValueRef src0)
484 {
485 LLVMValueRef comp[2];
486
487 src0 = ac_to_float(ctx, src0);
488 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
489 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
490
491 return LLVMBuildBitCast(ctx->builder, ac_build_cvt_pkrtz_f16(ctx, comp),
492 ctx->i32, "");
493 }
494
495 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
496 LLVMValueRef src0)
497 {
498 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
499 LLVMValueRef temps[2], val;
500 int i;
501
502 for (i = 0; i < 2; i++) {
503 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
504 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
505 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
506 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
507 }
508 return ac_build_gather_values(ctx, temps, 2);
509 }
510
511 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
512 nir_op op,
513 LLVMValueRef src0)
514 {
515 unsigned mask;
516 int idx;
517 LLVMValueRef result;
518
519 if (op == nir_op_fddx_fine)
520 mask = AC_TID_MASK_LEFT;
521 else if (op == nir_op_fddy_fine)
522 mask = AC_TID_MASK_TOP;
523 else
524 mask = AC_TID_MASK_TOP_LEFT;
525
526 /* for DDX we want to next X pixel, DDY next Y pixel. */
527 if (op == nir_op_fddx_fine ||
528 op == nir_op_fddx_coarse ||
529 op == nir_op_fddx)
530 idx = 1;
531 else
532 idx = 2;
533
534 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
535 return result;
536 }
537
538 /*
539 * this takes an I,J coordinate pair,
540 * and works out the X and Y derivatives.
541 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
542 */
543 static LLVMValueRef emit_ddxy_interp(
544 struct ac_nir_context *ctx,
545 LLVMValueRef interp_ij)
546 {
547 LLVMValueRef result[4], a;
548 unsigned i;
549
550 for (i = 0; i < 2; i++) {
551 a = LLVMBuildExtractElement(ctx->ac.builder, interp_ij,
552 LLVMConstInt(ctx->ac.i32, i, false), "");
553 result[i] = emit_ddxy(ctx, nir_op_fddx, a);
554 result[2+i] = emit_ddxy(ctx, nir_op_fddy, a);
555 }
556 return ac_build_gather_values(&ctx->ac, result, 4);
557 }
558
559 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
560 {
561 LLVMValueRef src[4], result = NULL;
562 unsigned num_components = instr->dest.dest.ssa.num_components;
563 unsigned src_components;
564 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
565
566 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
567 switch (instr->op) {
568 case nir_op_vec2:
569 case nir_op_vec3:
570 case nir_op_vec4:
571 src_components = 1;
572 break;
573 case nir_op_pack_half_2x16:
574 src_components = 2;
575 break;
576 case nir_op_unpack_half_2x16:
577 src_components = 1;
578 break;
579 case nir_op_cube_face_coord:
580 case nir_op_cube_face_index:
581 src_components = 3;
582 break;
583 default:
584 src_components = num_components;
585 break;
586 }
587 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
588 src[i] = get_alu_src(ctx, instr->src[i], src_components);
589
590 switch (instr->op) {
591 case nir_op_fmov:
592 case nir_op_imov:
593 result = src[0];
594 break;
595 case nir_op_fneg:
596 src[0] = ac_to_float(&ctx->ac, src[0]);
597 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
598 break;
599 case nir_op_ineg:
600 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
601 break;
602 case nir_op_inot:
603 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
604 break;
605 case nir_op_iadd:
606 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
607 break;
608 case nir_op_fadd:
609 src[0] = ac_to_float(&ctx->ac, src[0]);
610 src[1] = ac_to_float(&ctx->ac, src[1]);
611 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
612 break;
613 case nir_op_fsub:
614 src[0] = ac_to_float(&ctx->ac, src[0]);
615 src[1] = ac_to_float(&ctx->ac, src[1]);
616 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
617 break;
618 case nir_op_isub:
619 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
620 break;
621 case nir_op_imul:
622 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
623 break;
624 case nir_op_imod:
625 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
626 break;
627 case nir_op_umod:
628 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
629 break;
630 case nir_op_fmod:
631 src[0] = ac_to_float(&ctx->ac, src[0]);
632 src[1] = ac_to_float(&ctx->ac, src[1]);
633 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
634 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
635 ac_to_float_type(&ctx->ac, def_type), result);
636 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
637 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
638 break;
639 case nir_op_frem:
640 src[0] = ac_to_float(&ctx->ac, src[0]);
641 src[1] = ac_to_float(&ctx->ac, src[1]);
642 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
643 break;
644 case nir_op_irem:
645 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
646 break;
647 case nir_op_idiv:
648 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
649 break;
650 case nir_op_udiv:
651 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
652 break;
653 case nir_op_fmul:
654 src[0] = ac_to_float(&ctx->ac, src[0]);
655 src[1] = ac_to_float(&ctx->ac, src[1]);
656 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
657 break;
658 case nir_op_frcp:
659 src[0] = ac_to_float(&ctx->ac, src[0]);
660 result = ac_build_fdiv(&ctx->ac, instr->dest.dest.ssa.bit_size == 32 ? ctx->ac.f32_1 : ctx->ac.f64_1,
661 src[0]);
662 break;
663 case nir_op_iand:
664 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
665 break;
666 case nir_op_ior:
667 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
668 break;
669 case nir_op_ixor:
670 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
671 break;
672 case nir_op_ishl:
673 result = LLVMBuildShl(ctx->ac.builder, src[0],
674 LLVMBuildZExt(ctx->ac.builder, src[1],
675 LLVMTypeOf(src[0]), ""),
676 "");
677 break;
678 case nir_op_ishr:
679 result = LLVMBuildAShr(ctx->ac.builder, src[0],
680 LLVMBuildZExt(ctx->ac.builder, src[1],
681 LLVMTypeOf(src[0]), ""),
682 "");
683 break;
684 case nir_op_ushr:
685 result = LLVMBuildLShr(ctx->ac.builder, src[0],
686 LLVMBuildZExt(ctx->ac.builder, src[1],
687 LLVMTypeOf(src[0]), ""),
688 "");
689 break;
690 case nir_op_ilt32:
691 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
692 break;
693 case nir_op_ine32:
694 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
695 break;
696 case nir_op_ieq32:
697 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
698 break;
699 case nir_op_ige32:
700 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
701 break;
702 case nir_op_ult32:
703 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
704 break;
705 case nir_op_uge32:
706 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
707 break;
708 case nir_op_feq32:
709 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
710 break;
711 case nir_op_fne32:
712 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
713 break;
714 case nir_op_flt32:
715 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
716 break;
717 case nir_op_fge32:
718 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
719 break;
720 case nir_op_fabs:
721 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
722 ac_to_float_type(&ctx->ac, def_type), src[0]);
723 break;
724 case nir_op_iabs:
725 result = emit_iabs(&ctx->ac, src[0]);
726 break;
727 case nir_op_imax:
728 result = emit_minmax_int(&ctx->ac, LLVMIntSGT, src[0], src[1]);
729 break;
730 case nir_op_imin:
731 result = emit_minmax_int(&ctx->ac, LLVMIntSLT, src[0], src[1]);
732 break;
733 case nir_op_umax:
734 result = emit_minmax_int(&ctx->ac, LLVMIntUGT, src[0], src[1]);
735 break;
736 case nir_op_umin:
737 result = emit_minmax_int(&ctx->ac, LLVMIntULT, src[0], src[1]);
738 break;
739 case nir_op_isign:
740 result = ac_build_isign(&ctx->ac, src[0],
741 instr->dest.dest.ssa.bit_size);
742 break;
743 case nir_op_fsign:
744 src[0] = ac_to_float(&ctx->ac, src[0]);
745 result = ac_build_fsign(&ctx->ac, src[0],
746 instr->dest.dest.ssa.bit_size);
747 break;
748 case nir_op_ffloor:
749 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
750 ac_to_float_type(&ctx->ac, def_type), src[0]);
751 break;
752 case nir_op_ftrunc:
753 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
754 ac_to_float_type(&ctx->ac, def_type), src[0]);
755 break;
756 case nir_op_fceil:
757 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
758 ac_to_float_type(&ctx->ac, def_type), src[0]);
759 break;
760 case nir_op_fround_even:
761 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
762 ac_to_float_type(&ctx->ac, def_type),src[0]);
763 break;
764 case nir_op_ffract:
765 src[0] = ac_to_float(&ctx->ac, src[0]);
766 result = ac_build_fract(&ctx->ac, src[0],
767 instr->dest.dest.ssa.bit_size);
768 break;
769 case nir_op_fsin:
770 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
771 ac_to_float_type(&ctx->ac, def_type), src[0]);
772 break;
773 case nir_op_fcos:
774 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
775 ac_to_float_type(&ctx->ac, def_type), src[0]);
776 break;
777 case nir_op_fsqrt:
778 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
779 ac_to_float_type(&ctx->ac, def_type), src[0]);
780 break;
781 case nir_op_fexp2:
782 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
783 ac_to_float_type(&ctx->ac, def_type), src[0]);
784 break;
785 case nir_op_flog2:
786 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
787 ac_to_float_type(&ctx->ac, def_type), src[0]);
788 break;
789 case nir_op_frsq:
790 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
791 ac_to_float_type(&ctx->ac, def_type), src[0]);
792 result = ac_build_fdiv(&ctx->ac, instr->dest.dest.ssa.bit_size == 32 ? ctx->ac.f32_1 : ctx->ac.f64_1,
793 result);
794 break;
795 case nir_op_frexp_exp:
796 src[0] = ac_to_float(&ctx->ac, src[0]);
797 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.exp.i32.f64",
798 ctx->ac.i32, src, 1, AC_FUNC_ATTR_READNONE);
799
800 break;
801 case nir_op_frexp_sig:
802 src[0] = ac_to_float(&ctx->ac, src[0]);
803 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.mant.f64",
804 ctx->ac.f64, src, 1, AC_FUNC_ATTR_READNONE);
805 break;
806 case nir_op_fmax:
807 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
808 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
809 if (ctx->ac.chip_class < GFX9 &&
810 instr->dest.dest.ssa.bit_size == 32) {
811 /* Only pre-GFX9 chips do not flush denorms. */
812 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
813 ac_to_float_type(&ctx->ac, def_type),
814 result);
815 }
816 break;
817 case nir_op_fmin:
818 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
819 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
820 if (ctx->ac.chip_class < GFX9 &&
821 instr->dest.dest.ssa.bit_size == 32) {
822 /* Only pre-GFX9 chips do not flush denorms. */
823 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
824 ac_to_float_type(&ctx->ac, def_type),
825 result);
826 }
827 break;
828 case nir_op_ffma:
829 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
830 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
831 break;
832 case nir_op_ldexp:
833 src[0] = ac_to_float(&ctx->ac, src[0]);
834 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 32)
835 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
836 else
837 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
838 break;
839 case nir_op_ibitfield_extract:
840 result = emit_bitfield_extract(&ctx->ac, true, src);
841 break;
842 case nir_op_ubitfield_extract:
843 result = emit_bitfield_extract(&ctx->ac, false, src);
844 break;
845 case nir_op_bitfield_insert:
846 result = emit_bitfield_insert(&ctx->ac, src[0], src[1], src[2], src[3]);
847 break;
848 case nir_op_bitfield_reverse:
849 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
850 break;
851 case nir_op_bit_count:
852 result = ac_build_bit_count(&ctx->ac, src[0]);
853 break;
854 case nir_op_vec2:
855 case nir_op_vec3:
856 case nir_op_vec4:
857 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
858 src[i] = ac_to_integer(&ctx->ac, src[i]);
859 result = ac_build_gather_values(&ctx->ac, src, num_components);
860 break;
861 case nir_op_f2i16:
862 case nir_op_f2i32:
863 case nir_op_f2i64:
864 src[0] = ac_to_float(&ctx->ac, src[0]);
865 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
866 break;
867 case nir_op_f2u16:
868 case nir_op_f2u32:
869 case nir_op_f2u64:
870 src[0] = ac_to_float(&ctx->ac, src[0]);
871 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
872 break;
873 case nir_op_i2f16:
874 case nir_op_i2f32:
875 case nir_op_i2f64:
876 src[0] = ac_to_integer(&ctx->ac, src[0]);
877 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
878 break;
879 case nir_op_u2f16:
880 case nir_op_u2f32:
881 case nir_op_u2f64:
882 src[0] = ac_to_integer(&ctx->ac, src[0]);
883 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
884 break;
885 case nir_op_f2f16_rtz:
886 src[0] = ac_to_float(&ctx->ac, src[0]);
887 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
888 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
889 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
890 break;
891 case nir_op_f2f16_rtne:
892 case nir_op_f2f16:
893 case nir_op_f2f32:
894 case nir_op_f2f64:
895 src[0] = ac_to_float(&ctx->ac, src[0]);
896 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
897 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
898 else
899 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
900 break;
901 case nir_op_u2u16:
902 case nir_op_u2u32:
903 case nir_op_u2u64:
904 src[0] = ac_to_integer(&ctx->ac, src[0]);
905 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
906 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
907 else
908 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
909 break;
910 case nir_op_i2i16:
911 case nir_op_i2i32:
912 case nir_op_i2i64:
913 src[0] = ac_to_integer(&ctx->ac, src[0]);
914 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
915 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
916 else
917 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
918 break;
919 case nir_op_b32csel:
920 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
921 break;
922 case nir_op_find_lsb:
923 src[0] = ac_to_integer(&ctx->ac, src[0]);
924 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
925 break;
926 case nir_op_ufind_msb:
927 src[0] = ac_to_integer(&ctx->ac, src[0]);
928 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
929 break;
930 case nir_op_ifind_msb:
931 src[0] = ac_to_integer(&ctx->ac, src[0]);
932 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
933 break;
934 case nir_op_uadd_carry:
935 src[0] = ac_to_integer(&ctx->ac, src[0]);
936 src[1] = ac_to_integer(&ctx->ac, src[1]);
937 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
938 break;
939 case nir_op_usub_borrow:
940 src[0] = ac_to_integer(&ctx->ac, src[0]);
941 src[1] = ac_to_integer(&ctx->ac, src[1]);
942 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
943 break;
944 case nir_op_b2f16:
945 case nir_op_b2f32:
946 case nir_op_b2f64:
947 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
948 break;
949 case nir_op_f2b32:
950 result = emit_f2b(&ctx->ac, src[0]);
951 break;
952 case nir_op_b2i16:
953 case nir_op_b2i32:
954 case nir_op_b2i64:
955 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
956 break;
957 case nir_op_i2b32:
958 src[0] = ac_to_integer(&ctx->ac, src[0]);
959 result = emit_i2b(&ctx->ac, src[0]);
960 break;
961 case nir_op_fquantize2f16:
962 result = emit_f2f16(&ctx->ac, src[0]);
963 break;
964 case nir_op_umul_high:
965 src[0] = ac_to_integer(&ctx->ac, src[0]);
966 src[1] = ac_to_integer(&ctx->ac, src[1]);
967 result = emit_umul_high(&ctx->ac, src[0], src[1]);
968 break;
969 case nir_op_imul_high:
970 src[0] = ac_to_integer(&ctx->ac, src[0]);
971 src[1] = ac_to_integer(&ctx->ac, src[1]);
972 result = emit_imul_high(&ctx->ac, src[0], src[1]);
973 break;
974 case nir_op_pack_half_2x16:
975 result = emit_pack_half_2x16(&ctx->ac, src[0]);
976 break;
977 case nir_op_unpack_half_2x16:
978 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
979 break;
980 case nir_op_fddx:
981 case nir_op_fddy:
982 case nir_op_fddx_fine:
983 case nir_op_fddy_fine:
984 case nir_op_fddx_coarse:
985 case nir_op_fddy_coarse:
986 result = emit_ddxy(ctx, instr->op, src[0]);
987 break;
988
989 case nir_op_unpack_64_2x32_split_x: {
990 assert(ac_get_llvm_num_components(src[0]) == 1);
991 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
992 ctx->ac.v2i32,
993 "");
994 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
995 ctx->ac.i32_0, "");
996 break;
997 }
998
999 case nir_op_unpack_64_2x32_split_y: {
1000 assert(ac_get_llvm_num_components(src[0]) == 1);
1001 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1002 ctx->ac.v2i32,
1003 "");
1004 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1005 ctx->ac.i32_1, "");
1006 break;
1007 }
1008
1009 case nir_op_pack_64_2x32_split: {
1010 LLVMValueRef tmp = LLVMGetUndef(ctx->ac.v2i32);
1011 tmp = ac_build_gather_values(&ctx->ac, src, 2);
1012 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1013 break;
1014 }
1015
1016 case nir_op_cube_face_coord: {
1017 src[0] = ac_to_float(&ctx->ac, src[0]);
1018 LLVMValueRef results[2];
1019 LLVMValueRef in[3];
1020 for (unsigned chan = 0; chan < 3; chan++)
1021 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1022 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1023 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1024 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1025 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1026 result = ac_build_gather_values(&ctx->ac, results, 2);
1027 break;
1028 }
1029
1030 case nir_op_cube_face_index: {
1031 src[0] = ac_to_float(&ctx->ac, src[0]);
1032 LLVMValueRef in[3];
1033 for (unsigned chan = 0; chan < 3; chan++)
1034 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1035 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1036 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1037 break;
1038 }
1039
1040 case nir_op_fmin3:
1041 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1042 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1043 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1044 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1045 break;
1046 case nir_op_umin3:
1047 result = emit_minmax_int(&ctx->ac, LLVMIntULT, src[0], src[1]);
1048 result = emit_minmax_int(&ctx->ac, LLVMIntULT, result, src[2]);
1049 break;
1050 case nir_op_imin3:
1051 result = emit_minmax_int(&ctx->ac, LLVMIntSLT, src[0], src[1]);
1052 result = emit_minmax_int(&ctx->ac, LLVMIntSLT, result, src[2]);
1053 break;
1054 case nir_op_fmax3:
1055 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1056 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1057 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1058 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1059 break;
1060 case nir_op_umax3:
1061 result = emit_minmax_int(&ctx->ac, LLVMIntUGT, src[0], src[1]);
1062 result = emit_minmax_int(&ctx->ac, LLVMIntUGT, result, src[2]);
1063 break;
1064 case nir_op_imax3:
1065 result = emit_minmax_int(&ctx->ac, LLVMIntSGT, src[0], src[1]);
1066 result = emit_minmax_int(&ctx->ac, LLVMIntSGT, result, src[2]);
1067 break;
1068 case nir_op_fmed3: {
1069 LLVMValueRef tmp1 = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1070 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1071 LLVMValueRef tmp2 = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1072 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1073 tmp2 = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1074 ac_to_float_type(&ctx->ac, def_type), tmp2, src[2]);
1075 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1076 ac_to_float_type(&ctx->ac, def_type), tmp1, tmp2);
1077 break;
1078 }
1079 case nir_op_imed3: {
1080 LLVMValueRef tmp1 = emit_minmax_int(&ctx->ac, LLVMIntSLT, src[0], src[1]);
1081 LLVMValueRef tmp2 = emit_minmax_int(&ctx->ac, LLVMIntSGT, src[0], src[1]);
1082 tmp2 = emit_minmax_int(&ctx->ac, LLVMIntSLT, tmp2, src[2]);
1083 result = emit_minmax_int(&ctx->ac, LLVMIntSGT, tmp1, tmp2);
1084 break;
1085 }
1086 case nir_op_umed3: {
1087 LLVMValueRef tmp1 = emit_minmax_int(&ctx->ac, LLVMIntULT, src[0], src[1]);
1088 LLVMValueRef tmp2 = emit_minmax_int(&ctx->ac, LLVMIntUGT, src[0], src[1]);
1089 tmp2 = emit_minmax_int(&ctx->ac, LLVMIntULT, tmp2, src[2]);
1090 result = emit_minmax_int(&ctx->ac, LLVMIntUGT, tmp1, tmp2);
1091 break;
1092 }
1093
1094 default:
1095 fprintf(stderr, "Unknown NIR alu instr: ");
1096 nir_print_instr(&instr->instr, stderr);
1097 fprintf(stderr, "\n");
1098 abort();
1099 }
1100
1101 if (result) {
1102 assert(instr->dest.dest.is_ssa);
1103 result = ac_to_integer_or_pointer(&ctx->ac, result);
1104 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1105 }
1106 }
1107
1108 static void visit_load_const(struct ac_nir_context *ctx,
1109 const nir_load_const_instr *instr)
1110 {
1111 LLVMValueRef values[4], value = NULL;
1112 LLVMTypeRef element_type =
1113 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1114
1115 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1116 switch (instr->def.bit_size) {
1117 case 16:
1118 values[i] = LLVMConstInt(element_type,
1119 instr->value.u16[i], false);
1120 break;
1121 case 32:
1122 values[i] = LLVMConstInt(element_type,
1123 instr->value.u32[i], false);
1124 break;
1125 case 64:
1126 values[i] = LLVMConstInt(element_type,
1127 instr->value.u64[i], false);
1128 break;
1129 default:
1130 fprintf(stderr,
1131 "unsupported nir load_const bit_size: %d\n",
1132 instr->def.bit_size);
1133 abort();
1134 }
1135 }
1136 if (instr->def.num_components > 1) {
1137 value = LLVMConstVector(values, instr->def.num_components);
1138 } else
1139 value = values[0];
1140
1141 ctx->ssa_defs[instr->def.index] = value;
1142 }
1143
1144 static LLVMValueRef
1145 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1146 {
1147 LLVMValueRef size =
1148 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1149 LLVMConstInt(ctx->ac.i32, 2, false), "");
1150
1151 /* VI only */
1152 if (ctx->ac.chip_class == VI && in_elements) {
1153 /* On VI, the descriptor contains the size in bytes,
1154 * but TXQ must return the size in elements.
1155 * The stride is always non-zero for resources using TXQ.
1156 */
1157 LLVMValueRef stride =
1158 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1159 ctx->ac.i32_1, "");
1160 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1161 LLVMConstInt(ctx->ac.i32, 16, false), "");
1162 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1163 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1164
1165 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1166 }
1167 return size;
1168 }
1169
1170 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1171 nir_variable *var,
1172 struct ac_image_args *args,
1173 const nir_tex_instr *instr)
1174 {
1175 const struct glsl_type *type = glsl_without_array(var->type);
1176 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1177 LLVMValueRef half_texel[2];
1178 LLVMValueRef compare_cube_wa = NULL;
1179 LLVMValueRef result;
1180
1181 //TODO Rect
1182 {
1183 struct ac_image_args txq_args = { 0 };
1184
1185 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1186 txq_args.opcode = ac_image_get_resinfo;
1187 txq_args.dmask = 0xf;
1188 txq_args.lod = ctx->i32_0;
1189 txq_args.resource = args->resource;
1190 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1191 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1192
1193 for (unsigned c = 0; c < 2; c++) {
1194 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1195 LLVMConstInt(ctx->i32, c, false), "");
1196 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1197 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1198 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1199 LLVMConstReal(ctx->f32, -0.5), "");
1200 }
1201 }
1202
1203 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1204
1205 for (unsigned c = 0; c < 2; c++) {
1206 LLVMValueRef tmp;
1207 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1208 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1209 }
1210
1211 /*
1212 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1213 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1214 * workaround by sampling using a scaled type and converting.
1215 * This is taken from amdgpu-pro shaders.
1216 */
1217 /* NOTE this produces some ugly code compared to amdgpu-pro,
1218 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1219 * and then reads them back. -pro generates two selects,
1220 * one s_cmp for the descriptor rewriting
1221 * one v_cmp for the coordinate and result changes.
1222 */
1223 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1224 LLVMValueRef tmp, tmp2;
1225
1226 /* workaround 8/8/8/8 uint/sint cube gather bug */
1227 /* first detect it then change to a scaled read and f2i */
1228 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1229 tmp2 = tmp;
1230
1231 /* extract the DATA_FORMAT */
1232 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1233 LLVMConstInt(ctx->i32, 6, false), false);
1234
1235 /* is the DATA_FORMAT == 8_8_8_8 */
1236 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1237
1238 if (stype == GLSL_TYPE_UINT)
1239 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1240 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1241 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1242 else
1243 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1244 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1245 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1246
1247 /* replace the NUM FORMAT in the descriptor */
1248 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT_GFX6, false), "");
1249 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1250
1251 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1252
1253 /* don't modify the coordinates for this case */
1254 for (unsigned c = 0; c < 2; ++c)
1255 args->coords[c] = LLVMBuildSelect(
1256 ctx->builder, compare_cube_wa,
1257 orig_coords[c], args->coords[c], "");
1258 }
1259
1260 args->attributes = AC_FUNC_ATTR_READNONE;
1261 result = ac_build_image_opcode(ctx, args);
1262
1263 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1264 LLVMValueRef tmp, tmp2;
1265
1266 /* if the cube workaround is in place, f2i the result. */
1267 for (unsigned c = 0; c < 4; c++) {
1268 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1269 if (stype == GLSL_TYPE_UINT)
1270 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1271 else
1272 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1273 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1274 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1275 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1276 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1277 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1278 }
1279 }
1280 return result;
1281 }
1282
1283 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1284 {
1285 nir_deref_instr *texture_deref_instr = NULL;
1286
1287 for (unsigned i = 0; i < instr->num_srcs; i++) {
1288 switch (instr->src[i].src_type) {
1289 case nir_tex_src_texture_deref:
1290 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1291 break;
1292 default:
1293 break;
1294 }
1295 }
1296 return texture_deref_instr;
1297 }
1298
1299 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1300 const nir_tex_instr *instr,
1301 struct ac_image_args *args)
1302 {
1303 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1304 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1305
1306 if (ctx->abi->gfx9_stride_size_workaround) {
1307 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1308 args->resource,
1309 args->coords[0],
1310 ctx->ac.i32_0,
1311 util_last_bit(mask),
1312 false, true);
1313 } else {
1314 return ac_build_buffer_load_format(&ctx->ac,
1315 args->resource,
1316 args->coords[0],
1317 ctx->ac.i32_0,
1318 util_last_bit(mask),
1319 false, true);
1320 }
1321 }
1322
1323 args->opcode = ac_image_sample;
1324
1325 switch (instr->op) {
1326 case nir_texop_txf:
1327 case nir_texop_txf_ms:
1328 case nir_texop_samples_identical:
1329 args->opcode = args->level_zero ||
1330 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1331 ac_image_load : ac_image_load_mip;
1332 args->level_zero = false;
1333 break;
1334 case nir_texop_txs:
1335 case nir_texop_query_levels:
1336 args->opcode = ac_image_get_resinfo;
1337 if (!args->lod)
1338 args->lod = ctx->ac.i32_0;
1339 args->level_zero = false;
1340 break;
1341 case nir_texop_tex:
1342 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1343 assert(!args->lod);
1344 args->level_zero = true;
1345 }
1346 break;
1347 case nir_texop_tg4:
1348 args->opcode = ac_image_gather4;
1349 args->level_zero = true;
1350 break;
1351 case nir_texop_lod:
1352 args->opcode = ac_image_get_lod;
1353 break;
1354 default:
1355 break;
1356 }
1357
1358 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= VI) {
1359 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1360 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1361 const struct glsl_type *type = glsl_without_array(var->type);
1362 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1363 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1364 return lower_gather4_integer(&ctx->ac, var, args, instr);
1365 }
1366 }
1367
1368 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1369 if (instr->op == nir_texop_lod && ctx->ac.chip_class >= GFX9) {
1370 if ((args->dim == ac_image_2darray ||
1371 args->dim == ac_image_2d) && !args->coords[1]) {
1372 args->coords[1] = ctx->ac.i32_0;
1373 }
1374 }
1375
1376 args->attributes = AC_FUNC_ATTR_READNONE;
1377 return ac_build_image_opcode(&ctx->ac, args);
1378 }
1379
1380 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1381 nir_intrinsic_instr *instr)
1382 {
1383 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1384 LLVMValueRef index = get_src(ctx, instr->src[1]);
1385
1386 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1387 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1388 return result;
1389 }
1390
1391 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1392 nir_intrinsic_instr *instr)
1393 {
1394 LLVMValueRef ptr, addr;
1395
1396 addr = LLVMConstInt(ctx->ac.i32, nir_intrinsic_base(instr), 0);
1397 addr = LLVMBuildAdd(ctx->ac.builder, addr,
1398 get_src(ctx, instr->src[0]), "");
1399
1400 ptr = ac_build_gep0(&ctx->ac, ctx->abi->push_constants, addr);
1401
1402 if (instr->dest.ssa.bit_size == 16) {
1403 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1404 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1405 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1406 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1407 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1408 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1409 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1410 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1411 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1412 LLVMConstInt(ctx->ac.i32, 4, false)};
1413 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1414 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1415 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1416 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1417 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1418 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1419 }
1420
1421 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1422
1423 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1424 }
1425
1426 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1427 const nir_intrinsic_instr *instr)
1428 {
1429 LLVMValueRef index = get_src(ctx, instr->src[0]);
1430
1431 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1432 }
1433
1434 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1435 {
1436 uint32_t new_mask = 0;
1437 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1438 if (mask & (1u << i))
1439 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1440 return new_mask;
1441 }
1442
1443 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1444 unsigned start, unsigned count)
1445 {
1446 LLVMValueRef mask[] = {
1447 ctx->i32_0, ctx->i32_1,
1448 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1449
1450 unsigned src_elements = ac_get_llvm_num_components(src);
1451
1452 if (count == src_elements) {
1453 assert(start == 0);
1454 return src;
1455 } else if (count == 1) {
1456 assert(start < src_elements);
1457 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1458 } else {
1459 assert(start + count <= src_elements);
1460 assert(count <= 4);
1461 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1462 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1463 }
1464 }
1465
1466 static void visit_store_ssbo(struct ac_nir_context *ctx,
1467 nir_intrinsic_instr *instr)
1468 {
1469 const char *store_name;
1470 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1471 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1472 unsigned writemask = nir_intrinsic_write_mask(instr);
1473 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1474 LLVMValueRef glc = ctx->ac.i1false;
1475
1476 if (access & (ACCESS_VOLATILE | ACCESS_COHERENT))
1477 glc = ctx->ac.i1true;
1478
1479 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1480 get_src(ctx, instr->src[1]), true);
1481 LLVMValueRef base_data = ac_to_float(&ctx->ac, src_data);
1482 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1483 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1484
1485 while (writemask) {
1486 int start, count;
1487 LLVMValueRef data, offset;
1488 LLVMTypeRef data_type;
1489
1490 u_bit_scan_consecutive_range(&writemask, &start, &count);
1491
1492 /* Due to an LLVM limitation, split 3-element writes
1493 * into a 2-element and a 1-element write. */
1494 if (count == 3) {
1495 writemask |= 1 << (start + 2);
1496 count = 2;
1497 }
1498 int num_bytes = count * elem_size_bytes; /* count in bytes */
1499
1500 /* we can only store 4 DWords at the same time.
1501 * can only happen for 64 Bit vectors. */
1502 if (num_bytes > 16) {
1503 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1504 count = 2;
1505 num_bytes = 16;
1506 }
1507
1508 /* check alignment of 16 Bit stores */
1509 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1510 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1511 count = 1;
1512 num_bytes = 2;
1513 }
1514 data = extract_vector_range(&ctx->ac, base_data, start, count);
1515
1516 if (start == 0) {
1517 offset = base_offset;
1518 } else {
1519 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1520 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1521 }
1522 if (num_bytes == 2) {
1523 store_name = "llvm.amdgcn.tbuffer.store.i32";
1524 data_type = ctx->ac.i32;
1525 LLVMValueRef tbuffer_params[] = {
1526 data,
1527 rsrc,
1528 ctx->ac.i32_0, /* vindex */
1529 offset, /* voffset */
1530 ctx->ac.i32_0,
1531 ctx->ac.i32_0,
1532 LLVMConstInt(ctx->ac.i32, 2, false), // dfmt (= 16bit)
1533 LLVMConstInt(ctx->ac.i32, 4, false), // nfmt (= uint)
1534 glc,
1535 ctx->ac.i1false,
1536 };
1537 ac_build_intrinsic(&ctx->ac, store_name,
1538 ctx->ac.voidt, tbuffer_params, 10, 0);
1539 } else {
1540 switch (num_bytes) {
1541 case 16: /* v4f32 */
1542 store_name = "llvm.amdgcn.buffer.store.v4f32";
1543 data_type = ctx->ac.v4f32;
1544 break;
1545 case 8: /* v2f32 */
1546 store_name = "llvm.amdgcn.buffer.store.v2f32";
1547 data_type = ctx->ac.v2f32;
1548 break;
1549 case 4: /* f32 */
1550 store_name = "llvm.amdgcn.buffer.store.f32";
1551 data_type = ctx->ac.f32;
1552 break;
1553 default:
1554 unreachable("Malformed vector store.");
1555 }
1556 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1557 LLVMValueRef params[] = {
1558 data,
1559 rsrc,
1560 ctx->ac.i32_0, /* vindex */
1561 offset,
1562 glc,
1563 ctx->ac.i1false, /* slc */
1564 };
1565 ac_build_intrinsic(&ctx->ac, store_name,
1566 ctx->ac.voidt, params, 6, 0);
1567 }
1568 }
1569 }
1570
1571 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1572 const nir_intrinsic_instr *instr)
1573 {
1574 const char *name;
1575 LLVMValueRef params[6];
1576 int arg_count = 0;
1577
1578 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1579 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1580 }
1581 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1582 params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
1583 get_src(ctx, instr->src[0]),
1584 true);
1585 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1586 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1587 params[arg_count++] = ctx->ac.i1false; /* slc */
1588
1589 switch (instr->intrinsic) {
1590 case nir_intrinsic_ssbo_atomic_add:
1591 name = "llvm.amdgcn.buffer.atomic.add";
1592 break;
1593 case nir_intrinsic_ssbo_atomic_imin:
1594 name = "llvm.amdgcn.buffer.atomic.smin";
1595 break;
1596 case nir_intrinsic_ssbo_atomic_umin:
1597 name = "llvm.amdgcn.buffer.atomic.umin";
1598 break;
1599 case nir_intrinsic_ssbo_atomic_imax:
1600 name = "llvm.amdgcn.buffer.atomic.smax";
1601 break;
1602 case nir_intrinsic_ssbo_atomic_umax:
1603 name = "llvm.amdgcn.buffer.atomic.umax";
1604 break;
1605 case nir_intrinsic_ssbo_atomic_and:
1606 name = "llvm.amdgcn.buffer.atomic.and";
1607 break;
1608 case nir_intrinsic_ssbo_atomic_or:
1609 name = "llvm.amdgcn.buffer.atomic.or";
1610 break;
1611 case nir_intrinsic_ssbo_atomic_xor:
1612 name = "llvm.amdgcn.buffer.atomic.xor";
1613 break;
1614 case nir_intrinsic_ssbo_atomic_exchange:
1615 name = "llvm.amdgcn.buffer.atomic.swap";
1616 break;
1617 case nir_intrinsic_ssbo_atomic_comp_swap:
1618 name = "llvm.amdgcn.buffer.atomic.cmpswap";
1619 break;
1620 default:
1621 abort();
1622 }
1623
1624 return ac_build_intrinsic(&ctx->ac, name, ctx->ac.i32, params, arg_count, 0);
1625 }
1626
1627 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1628 const nir_intrinsic_instr *instr)
1629 {
1630 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1631 int num_components = instr->num_components;
1632 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1633 LLVMValueRef glc = ctx->ac.i1false;
1634
1635 if (access & (ACCESS_VOLATILE | ACCESS_COHERENT))
1636 glc = ctx->ac.i1true;
1637
1638 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1639 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1640 get_src(ctx, instr->src[0]), false);
1641 LLVMValueRef vindex = ctx->ac.i32_0;
1642
1643 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1644 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1645
1646 LLVMValueRef results[4];
1647 for (int i = 0; i < num_components;) {
1648 int num_elems = num_components - i;
1649 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1650 num_elems = 1;
1651 if (num_elems * elem_size_bytes > 16)
1652 num_elems = 16 / elem_size_bytes;
1653 int load_bytes = num_elems * elem_size_bytes;
1654
1655 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1656
1657 LLVMValueRef ret;
1658 if (load_bytes == 2) {
1659 ret = ac_build_tbuffer_load_short(&ctx->ac,
1660 rsrc,
1661 vindex,
1662 offset,
1663 ctx->ac.i32_0,
1664 immoffset,
1665 glc);
1666 } else {
1667 const char *load_name;
1668 LLVMTypeRef data_type;
1669 switch (load_bytes) {
1670 case 16:
1671 case 12:
1672 load_name = "llvm.amdgcn.buffer.load.v4f32";
1673 data_type = ctx->ac.v4f32;
1674 break;
1675 case 8:
1676 case 6:
1677 load_name = "llvm.amdgcn.buffer.load.v2f32";
1678 data_type = ctx->ac.v2f32;
1679 break;
1680 case 4:
1681 load_name = "llvm.amdgcn.buffer.load.f32";
1682 data_type = ctx->ac.f32;
1683 break;
1684 default:
1685 unreachable("Malformed load buffer.");
1686 }
1687 LLVMValueRef params[] = {
1688 rsrc,
1689 vindex,
1690 LLVMBuildAdd(ctx->ac.builder, offset, immoffset, ""),
1691 glc,
1692 ctx->ac.i1false,
1693 };
1694 ret = ac_build_intrinsic(&ctx->ac, load_name, data_type, params, 5, 0);
1695 }
1696
1697 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1698 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1699 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1700
1701 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1702 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1703
1704 for (unsigned j = 0; j < num_elems; j++) {
1705 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1706 }
1707 i += num_elems;
1708 }
1709
1710 return ac_build_gather_values(&ctx->ac, results, num_components);
1711 }
1712
1713 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1714 const nir_intrinsic_instr *instr)
1715 {
1716 LLVMValueRef ret;
1717 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1718 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1719 int num_components = instr->num_components;
1720
1721 if (ctx->abi->load_ubo)
1722 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1723
1724 if (instr->dest.ssa.bit_size == 64)
1725 num_components *= 2;
1726
1727 if (instr->dest.ssa.bit_size == 16) {
1728 LLVMValueRef results[num_components];
1729 for (unsigned i = 0; i < num_components; ++i) {
1730 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1731 rsrc,
1732 ctx->ac.i32_0,
1733 offset,
1734 ctx->ac.i32_0,
1735 LLVMConstInt(ctx->ac.i32, 2 * i, 0),
1736 ctx->ac.i1false);
1737 }
1738 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1739 } else {
1740 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1741 NULL, 0, false, false, true, true);
1742
1743 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1744 }
1745
1746 return LLVMBuildBitCast(ctx->ac.builder, ret,
1747 get_def_type(ctx, &instr->dest.ssa), "");
1748 }
1749
1750 static void
1751 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1752 bool vs_in, unsigned *vertex_index_out,
1753 LLVMValueRef *vertex_index_ref,
1754 unsigned *const_out, LLVMValueRef *indir_out)
1755 {
1756 nir_variable *var = nir_deref_instr_get_variable(instr);
1757 nir_deref_path path;
1758 unsigned idx_lvl = 1;
1759
1760 nir_deref_path_init(&path, instr, NULL);
1761
1762 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1763 if (vertex_index_ref) {
1764 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1765 if (vertex_index_out)
1766 *vertex_index_out = 0;
1767 } else {
1768 nir_const_value *v = nir_src_as_const_value(path.path[idx_lvl]->arr.index);
1769 assert(v);
1770 *vertex_index_out = v->u32[0];
1771 }
1772 ++idx_lvl;
1773 }
1774
1775 uint32_t const_offset = 0;
1776 LLVMValueRef offset = NULL;
1777
1778 if (var->data.compact) {
1779 assert(instr->deref_type == nir_deref_type_array);
1780 nir_const_value *v = nir_src_as_const_value(instr->arr.index);
1781 assert(v);
1782 const_offset = v->u32[0];
1783 goto out;
1784 }
1785
1786 for (; path.path[idx_lvl]; ++idx_lvl) {
1787 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1788 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1789 unsigned index = path.path[idx_lvl]->strct.index;
1790
1791 for (unsigned i = 0; i < index; i++) {
1792 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1793 const_offset += glsl_count_attribute_slots(ft, vs_in);
1794 }
1795 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1796 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1797 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1798 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1799 if (offset)
1800 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1801 else
1802 offset = array_off;
1803 } else
1804 unreachable("Uhandled deref type in get_deref_instr_offset");
1805 }
1806
1807 out:
1808 nir_deref_path_finish(&path);
1809
1810 if (const_offset && offset)
1811 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1812 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1813 "");
1814
1815 *const_out = const_offset;
1816 *indir_out = offset;
1817 }
1818
1819 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1820 nir_intrinsic_instr *instr,
1821 bool load_inputs)
1822 {
1823 LLVMValueRef result;
1824 LLVMValueRef vertex_index = NULL;
1825 LLVMValueRef indir_index = NULL;
1826 unsigned const_index = 0;
1827
1828 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1829
1830 unsigned location = var->data.location;
1831 unsigned driver_location = var->data.driver_location;
1832 const bool is_patch = var->data.patch;
1833 const bool is_compact = var->data.compact;
1834
1835 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1836 false, NULL, is_patch ? NULL : &vertex_index,
1837 &const_index, &indir_index);
1838
1839 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1840
1841 LLVMTypeRef src_component_type;
1842 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1843 src_component_type = LLVMGetElementType(dest_type);
1844 else
1845 src_component_type = dest_type;
1846
1847 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1848 vertex_index, indir_index,
1849 const_index, location, driver_location,
1850 var->data.location_frac,
1851 instr->num_components,
1852 is_patch, is_compact, load_inputs);
1853 if (instr->dest.ssa.bit_size == 16) {
1854 result = ac_to_integer(&ctx->ac, result);
1855 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
1856 }
1857 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
1858 }
1859
1860 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
1861 nir_intrinsic_instr *instr)
1862 {
1863 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1864
1865 LLVMValueRef values[8];
1866 int idx = 0;
1867 int ve = instr->dest.ssa.num_components;
1868 unsigned comp = 0;
1869 LLVMValueRef indir_index;
1870 LLVMValueRef ret;
1871 unsigned const_index;
1872 unsigned stride = 4;
1873 int mode = nir_var_shared;
1874
1875 if (var) {
1876 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
1877 var->data.mode == nir_var_shader_in;
1878 if (var->data.compact)
1879 stride = 1;
1880 idx = var->data.driver_location;
1881 comp = var->data.location_frac;
1882 mode = var->data.mode;
1883
1884 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr), vs_in, NULL, NULL,
1885 &const_index, &indir_index);
1886 }
1887
1888 if (instr->dest.ssa.bit_size == 64)
1889 ve *= 2;
1890
1891 switch (mode) {
1892 case nir_var_shader_in:
1893 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
1894 ctx->stage == MESA_SHADER_TESS_EVAL) {
1895 return load_tess_varyings(ctx, instr, true);
1896 }
1897
1898 if (ctx->stage == MESA_SHADER_GEOMETRY) {
1899 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
1900 LLVMValueRef indir_index;
1901 unsigned const_index, vertex_index;
1902 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1903 false, &vertex_index, NULL, &const_index, &indir_index);
1904
1905 return ctx->abi->load_inputs(ctx->abi, var->data.location,
1906 var->data.driver_location,
1907 var->data.location_frac,
1908 instr->num_components, vertex_index, const_index, type);
1909 }
1910
1911 for (unsigned chan = comp; chan < ve + comp; chan++) {
1912 if (indir_index) {
1913 unsigned count = glsl_count_attribute_slots(
1914 var->type,
1915 ctx->stage == MESA_SHADER_VERTEX);
1916 count -= chan / 4;
1917 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
1918 &ctx->ac, ctx->abi->inputs + idx + chan, count,
1919 stride, false, true);
1920
1921 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
1922 tmp_vec,
1923 indir_index, "");
1924 } else
1925 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
1926 }
1927 break;
1928 case nir_var_local:
1929 for (unsigned chan = 0; chan < ve; chan++) {
1930 if (indir_index) {
1931 unsigned count = glsl_count_attribute_slots(
1932 var->type, false);
1933 count -= chan / 4;
1934 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
1935 &ctx->ac, ctx->locals + idx + chan, count,
1936 stride, true, true);
1937
1938 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
1939 tmp_vec,
1940 indir_index, "");
1941 } else {
1942 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
1943 }
1944 }
1945 break;
1946 case nir_var_shared: {
1947 LLVMValueRef address = get_src(ctx, instr->src[0]);
1948 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
1949 return LLVMBuildBitCast(ctx->ac.builder, val,
1950 get_def_type(ctx, &instr->dest.ssa),
1951 "");
1952 }
1953 case nir_var_shader_out:
1954 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
1955 return load_tess_varyings(ctx, instr, false);
1956 }
1957
1958 for (unsigned chan = comp; chan < ve + comp; chan++) {
1959 if (indir_index) {
1960 unsigned count = glsl_count_attribute_slots(
1961 var->type, false);
1962 count -= chan / 4;
1963 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
1964 &ctx->ac, ctx->abi->outputs + idx + chan, count,
1965 stride, true, true);
1966
1967 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
1968 tmp_vec,
1969 indir_index, "");
1970 } else {
1971 values[chan] = LLVMBuildLoad(ctx->ac.builder,
1972 ctx->abi->outputs[idx + chan + const_index * stride],
1973 "");
1974 }
1975 }
1976 break;
1977 default:
1978 unreachable("unhandle variable mode");
1979 }
1980 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
1981 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
1982 }
1983
1984 static void
1985 visit_store_var(struct ac_nir_context *ctx,
1986 nir_intrinsic_instr *instr)
1987 {
1988 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1989
1990 LLVMValueRef temp_ptr, value;
1991 int idx = var->data.driver_location;
1992 unsigned comp = var->data.location_frac;
1993 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
1994 int writemask = instr->const_index[0];
1995 LLVMValueRef indir_index;
1996 unsigned const_index;
1997
1998 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr), false,
1999 NULL, NULL, &const_index, &indir_index);
2000
2001 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64) {
2002
2003 src = LLVMBuildBitCast(ctx->ac.builder, src,
2004 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2005 "");
2006
2007 writemask = widen_mask(writemask, 2);
2008 }
2009
2010 writemask = writemask << comp;
2011
2012 switch (var->data.mode) {
2013 case nir_var_shader_out:
2014
2015 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2016 LLVMValueRef vertex_index = NULL;
2017 LLVMValueRef indir_index = NULL;
2018 unsigned const_index = 0;
2019 const bool is_patch = var->data.patch;
2020
2021 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2022 false, NULL, is_patch ? NULL : &vertex_index,
2023 &const_index, &indir_index);
2024
2025 ctx->abi->store_tcs_outputs(ctx->abi, var,
2026 vertex_index, indir_index,
2027 const_index, src, writemask);
2028 return;
2029 }
2030
2031 for (unsigned chan = 0; chan < 8; chan++) {
2032 int stride = 4;
2033 if (!(writemask & (1 << chan)))
2034 continue;
2035
2036 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2037
2038 if (var->data.compact)
2039 stride = 1;
2040 if (indir_index) {
2041 unsigned count = glsl_count_attribute_slots(
2042 var->type, false);
2043 count -= chan / 4;
2044 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2045 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2046 stride, true, true);
2047
2048 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2049 value, indir_index, "");
2050 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2051 count, stride, tmp_vec);
2052
2053 } else {
2054 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2055
2056 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2057 }
2058 }
2059 break;
2060 case nir_var_local:
2061 for (unsigned chan = 0; chan < 8; chan++) {
2062 if (!(writemask & (1 << chan)))
2063 continue;
2064
2065 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2066 if (indir_index) {
2067 unsigned count = glsl_count_attribute_slots(
2068 var->type, false);
2069 count -= chan / 4;
2070 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2071 &ctx->ac, ctx->locals + idx + chan, count,
2072 4, true, true);
2073
2074 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2075 value, indir_index, "");
2076 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2077 count, 4, tmp_vec);
2078 } else {
2079 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2080
2081 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2082 }
2083 }
2084 break;
2085 case nir_var_shared: {
2086 int writemask = instr->const_index[0];
2087 LLVMValueRef address = get_src(ctx, instr->src[0]);
2088 LLVMValueRef val = get_src(ctx, instr->src[1]);
2089 if (util_is_power_of_two_nonzero(writemask)) {
2090 val = LLVMBuildBitCast(
2091 ctx->ac.builder, val,
2092 LLVMGetElementType(LLVMTypeOf(address)), "");
2093 LLVMBuildStore(ctx->ac.builder, val, address);
2094 } else {
2095 for (unsigned chan = 0; chan < 4; chan++) {
2096 if (!(writemask & (1 << chan)))
2097 continue;
2098 LLVMValueRef ptr =
2099 LLVMBuildStructGEP(ctx->ac.builder,
2100 address, chan, "");
2101 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2102 chan);
2103 src = LLVMBuildBitCast(
2104 ctx->ac.builder, src,
2105 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2106 LLVMBuildStore(ctx->ac.builder, src, ptr);
2107 }
2108 }
2109 break;
2110 }
2111 default:
2112 break;
2113 }
2114 }
2115
2116 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2117 {
2118 switch (dim) {
2119 case GLSL_SAMPLER_DIM_BUF:
2120 return 1;
2121 case GLSL_SAMPLER_DIM_1D:
2122 return array ? 2 : 1;
2123 case GLSL_SAMPLER_DIM_2D:
2124 return array ? 3 : 2;
2125 case GLSL_SAMPLER_DIM_MS:
2126 return array ? 4 : 3;
2127 case GLSL_SAMPLER_DIM_3D:
2128 case GLSL_SAMPLER_DIM_CUBE:
2129 return 3;
2130 case GLSL_SAMPLER_DIM_RECT:
2131 case GLSL_SAMPLER_DIM_SUBPASS:
2132 return 2;
2133 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2134 return 3;
2135 default:
2136 break;
2137 }
2138 return 0;
2139 }
2140
2141
2142 /* Adjust the sample index according to FMASK.
2143 *
2144 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
2145 * which is the identity mapping. Each nibble says which physical sample
2146 * should be fetched to get that sample.
2147 *
2148 * For example, 0x11111100 means there are only 2 samples stored and
2149 * the second sample covers 3/4 of the pixel. When reading samples 0
2150 * and 1, return physical sample 0 (determined by the first two 0s
2151 * in FMASK), otherwise return physical sample 1.
2152 *
2153 * The sample index should be adjusted as follows:
2154 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
2155 */
2156 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2157 LLVMValueRef coord_x, LLVMValueRef coord_y,
2158 LLVMValueRef coord_z,
2159 LLVMValueRef sample_index,
2160 LLVMValueRef fmask_desc_ptr)
2161 {
2162 struct ac_image_args args = {0};
2163 LLVMValueRef res;
2164
2165 args.coords[0] = coord_x;
2166 args.coords[1] = coord_y;
2167 if (coord_z)
2168 args.coords[2] = coord_z;
2169
2170 args.opcode = ac_image_load;
2171 args.dim = coord_z ? ac_image_2darray : ac_image_2d;
2172 args.resource = fmask_desc_ptr;
2173 args.dmask = 0xf;
2174 args.attributes = AC_FUNC_ATTR_READNONE;
2175
2176 res = ac_build_image_opcode(ctx, &args);
2177
2178 res = ac_to_integer(ctx, res);
2179 LLVMValueRef four = LLVMConstInt(ctx->i32, 4, false);
2180 LLVMValueRef F = LLVMConstInt(ctx->i32, 0xf, false);
2181
2182 LLVMValueRef fmask = LLVMBuildExtractElement(ctx->builder,
2183 res,
2184 ctx->i32_0, "");
2185
2186 LLVMValueRef sample_index4 =
2187 LLVMBuildMul(ctx->builder, sample_index, four, "");
2188 LLVMValueRef shifted_fmask =
2189 LLVMBuildLShr(ctx->builder, fmask, sample_index4, "");
2190 LLVMValueRef final_sample =
2191 LLVMBuildAnd(ctx->builder, shifted_fmask, F, "");
2192
2193 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
2194 * resource descriptor is 0 (invalid),
2195 */
2196 LLVMValueRef fmask_desc =
2197 LLVMBuildBitCast(ctx->builder, fmask_desc_ptr,
2198 ctx->v8i32, "");
2199
2200 LLVMValueRef fmask_word1 =
2201 LLVMBuildExtractElement(ctx->builder, fmask_desc,
2202 ctx->i32_1, "");
2203
2204 LLVMValueRef word1_is_nonzero =
2205 LLVMBuildICmp(ctx->builder, LLVMIntNE,
2206 fmask_word1, ctx->i32_0, "");
2207
2208 /* Replace the MSAA sample index. */
2209 sample_index =
2210 LLVMBuildSelect(ctx->builder, word1_is_nonzero,
2211 final_sample, sample_index, "");
2212 return sample_index;
2213 }
2214
2215 static nir_variable *get_image_variable(const nir_intrinsic_instr *instr)
2216 {
2217 assert(instr->src[0].is_ssa);
2218 return nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2219 }
2220
2221 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2222 const nir_intrinsic_instr *instr,
2223 enum ac_descriptor_type desc_type,
2224 bool write)
2225 {
2226 return get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr), desc_type, NULL, true, write);
2227 }
2228
2229 static void get_image_coords(struct ac_nir_context *ctx,
2230 const nir_intrinsic_instr *instr,
2231 struct ac_image_args *args)
2232 {
2233 const struct glsl_type *type = glsl_without_array(get_image_variable(instr)->type);
2234
2235 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2236 LLVMValueRef masks[] = {
2237 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2238 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2239 };
2240 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2241
2242 int count;
2243 enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
2244 bool is_array = glsl_sampler_type_is_array(type);
2245 bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2246 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2247 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2248 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2249 bool gfx9_1d = ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2250 count = image_type_to_components_count(dim, is_array);
2251
2252 if (is_ms && instr->intrinsic == nir_intrinsic_image_deref_load) {
2253 LLVMValueRef fmask_load_address[3];
2254 int chan;
2255
2256 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2257 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2258 if (is_array)
2259 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2260 else
2261 fmask_load_address[2] = NULL;
2262 if (add_frag_pos) {
2263 for (chan = 0; chan < 2; ++chan)
2264 fmask_load_address[chan] =
2265 LLVMBuildAdd(ctx->ac.builder, fmask_load_address[chan],
2266 LLVMBuildFPToUI(ctx->ac.builder, ctx->abi->frag_pos[chan],
2267 ctx->ac.i32, ""), "");
2268 fmask_load_address[2] = ac_to_integer(&ctx->ac, ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2269 }
2270 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2271 fmask_load_address[0],
2272 fmask_load_address[1],
2273 fmask_load_address[2],
2274 sample_index,
2275 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2276 AC_DESC_FMASK, NULL, false, false));
2277 }
2278 if (count == 1 && !gfx9_1d) {
2279 if (instr->src[1].ssa->num_components)
2280 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2281 else
2282 args->coords[0] = src0;
2283 } else {
2284 int chan;
2285 if (is_ms)
2286 count--;
2287 for (chan = 0; chan < count; ++chan) {
2288 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2289 }
2290 if (add_frag_pos) {
2291 for (chan = 0; chan < 2; ++chan) {
2292 args->coords[chan] = LLVMBuildAdd(
2293 ctx->ac.builder, args->coords[chan],
2294 LLVMBuildFPToUI(
2295 ctx->ac.builder, ctx->abi->frag_pos[chan],
2296 ctx->ac.i32, ""), "");
2297 }
2298 args->coords[2] = ac_to_integer(&ctx->ac,
2299 ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2300 count++;
2301 }
2302
2303 if (gfx9_1d) {
2304 if (is_array) {
2305 args->coords[2] = args->coords[1];
2306 args->coords[1] = ctx->ac.i32_0;
2307 } else
2308 args->coords[1] = ctx->ac.i32_0;
2309 count++;
2310 }
2311
2312 if (is_ms) {
2313 args->coords[count] = sample_index;
2314 count++;
2315 }
2316 }
2317 }
2318
2319 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2320 const nir_intrinsic_instr *instr, bool write)
2321 {
2322 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2323 if (ctx->abi->gfx9_stride_size_workaround) {
2324 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2325 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2326 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2327
2328 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2329 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2330 elem_count, stride, "");
2331
2332 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2333 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2334 }
2335 return rsrc;
2336 }
2337
2338 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2339 const nir_intrinsic_instr *instr)
2340 {
2341 LLVMValueRef res;
2342 const nir_variable *var = get_image_variable(instr);
2343 const struct glsl_type *type = var->type;
2344
2345 type = glsl_without_array(type);
2346
2347 const enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
2348 if (dim == GLSL_SAMPLER_DIM_BUF) {
2349 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2350 unsigned num_channels = util_last_bit(mask);
2351 LLVMValueRef rsrc, vindex;
2352
2353 rsrc = get_image_buffer_descriptor(ctx, instr, false);
2354 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2355 ctx->ac.i32_0, "");
2356
2357 /* TODO: set "glc" and "can_speculate" when OpenGL needs it. */
2358 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2359 ctx->ac.i32_0, num_channels,
2360 false, false);
2361 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2362
2363 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2364 res = ac_to_integer(&ctx->ac, res);
2365 } else {
2366 struct ac_image_args args = {};
2367 args.opcode = ac_image_load;
2368 get_image_coords(ctx, instr, &args);
2369 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2370 args.dim = get_ac_image_dim(&ctx->ac, glsl_get_sampler_dim(type),
2371 glsl_sampler_type_is_array(type));
2372 args.dmask = 15;
2373 args.attributes = AC_FUNC_ATTR_READONLY;
2374 if (var->data.image.access & (ACCESS_VOLATILE | ACCESS_COHERENT))
2375 args.cache_policy |= ac_glc;
2376
2377 res = ac_build_image_opcode(&ctx->ac, &args);
2378 }
2379 return ac_to_integer(&ctx->ac, res);
2380 }
2381
2382 static void visit_image_store(struct ac_nir_context *ctx,
2383 nir_intrinsic_instr *instr)
2384 {
2385 LLVMValueRef params[8];
2386 const nir_variable *var = get_image_variable(instr);
2387 const struct glsl_type *type = glsl_without_array(var->type);
2388 const enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
2389 LLVMValueRef glc = ctx->ac.i1false;
2390 bool force_glc = ctx->ac.chip_class == SI;
2391 if (force_glc)
2392 glc = ctx->ac.i1true;
2393
2394 if (dim == GLSL_SAMPLER_DIM_BUF) {
2395 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true);
2396
2397 params[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3])); /* data */
2398 params[1] = rsrc;
2399 params[2] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2400 ctx->ac.i32_0, ""); /* vindex */
2401 params[3] = ctx->ac.i32_0; /* voffset */
2402 if (HAVE_LLVM >= 0x800) {
2403 params[4] = ctx->ac.i32_0; /* soffset */
2404 params[5] = glc ? ctx->ac.i32_1 : ctx->ac.i32_0;
2405 ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.struct.buffer.store.format.v4f32", ctx->ac.voidt,
2406 params, 6, 0);
2407 } else {
2408 params[4] = glc; /* glc */
2409 params[5] = ctx->ac.i1false; /* slc */
2410 ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.buffer.store.format.v4f32", ctx->ac.voidt,
2411 params, 6, 0);
2412 }
2413 } else {
2414 struct ac_image_args args = {};
2415 args.opcode = ac_image_store;
2416 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2417 get_image_coords(ctx, instr, &args);
2418 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2419 args.dim = get_ac_image_dim(&ctx->ac, glsl_get_sampler_dim(type),
2420 glsl_sampler_type_is_array(type));
2421 args.dmask = 15;
2422 if (force_glc || (var->data.image.access & (ACCESS_VOLATILE | ACCESS_COHERENT)))
2423 args.cache_policy |= ac_glc;
2424
2425 ac_build_image_opcode(&ctx->ac, &args);
2426 }
2427
2428 }
2429
2430 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2431 const nir_intrinsic_instr *instr)
2432 {
2433 LLVMValueRef params[7];
2434 int param_count = 0;
2435 const nir_variable *var = get_image_variable(instr);
2436
2437 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap;
2438 const char *atomic_name;
2439 char intrinsic_name[64];
2440 enum ac_atomic_op atomic_subop;
2441 const struct glsl_type *type = glsl_without_array(var->type);
2442 MAYBE_UNUSED int length;
2443
2444 bool is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2445
2446 switch (instr->intrinsic) {
2447 case nir_intrinsic_image_deref_atomic_add:
2448 atomic_name = "add";
2449 atomic_subop = ac_atomic_add;
2450 break;
2451 case nir_intrinsic_image_deref_atomic_min:
2452 atomic_name = is_unsigned ? "umin" : "smin";
2453 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2454 break;
2455 case nir_intrinsic_image_deref_atomic_max:
2456 atomic_name = is_unsigned ? "umax" : "smax";
2457 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2458 break;
2459 case nir_intrinsic_image_deref_atomic_and:
2460 atomic_name = "and";
2461 atomic_subop = ac_atomic_and;
2462 break;
2463 case nir_intrinsic_image_deref_atomic_or:
2464 atomic_name = "or";
2465 atomic_subop = ac_atomic_or;
2466 break;
2467 case nir_intrinsic_image_deref_atomic_xor:
2468 atomic_name = "xor";
2469 atomic_subop = ac_atomic_xor;
2470 break;
2471 case nir_intrinsic_image_deref_atomic_exchange:
2472 atomic_name = "swap";
2473 atomic_subop = ac_atomic_swap;
2474 break;
2475 case nir_intrinsic_image_deref_atomic_comp_swap:
2476 atomic_name = "cmpswap";
2477 atomic_subop = 0; /* not used */
2478 break;
2479 default:
2480 abort();
2481 }
2482
2483 if (cmpswap)
2484 params[param_count++] = get_src(ctx, instr->src[4]);
2485 params[param_count++] = get_src(ctx, instr->src[3]);
2486
2487 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2488 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true);
2489 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2490 ctx->ac.i32_0, ""); /* vindex */
2491 params[param_count++] = ctx->ac.i32_0; /* voffset */
2492 if (HAVE_LLVM >= 0x800) {
2493 params[param_count++] = ctx->ac.i32_0; /* soffset */
2494 params[param_count++] = ctx->ac.i32_0; /* slc */
2495
2496 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2497 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2498 } else {
2499 params[param_count++] = ctx->ac.i1false; /* slc */
2500
2501 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2502 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2503 }
2504
2505 assert(length < sizeof(intrinsic_name));
2506 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2507 params, param_count, 0);
2508 } else {
2509 struct ac_image_args args = {};
2510 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2511 args.atomic = atomic_subop;
2512 args.data[0] = params[0];
2513 if (cmpswap)
2514 args.data[1] = params[1];
2515 get_image_coords(ctx, instr, &args);
2516 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2517 args.dim = get_ac_image_dim(&ctx->ac, glsl_get_sampler_dim(type),
2518 glsl_sampler_type_is_array(type));
2519
2520 return ac_build_image_opcode(&ctx->ac, &args);
2521 }
2522 }
2523
2524 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2525 const nir_intrinsic_instr *instr)
2526 {
2527 const nir_variable *var = get_image_variable(instr);
2528 const struct glsl_type *type = glsl_without_array(var->type);
2529
2530 struct ac_image_args args = { 0 };
2531 args.dim = get_ac_sampler_dim(&ctx->ac, glsl_get_sampler_dim(type),
2532 glsl_sampler_type_is_array(type));
2533 args.dmask = 0xf;
2534 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2535 args.opcode = ac_image_get_resinfo;
2536 args.lod = ctx->ac.i32_0;
2537 args.attributes = AC_FUNC_ATTR_READNONE;
2538
2539 return ac_build_image_opcode(&ctx->ac, &args);
2540 }
2541
2542 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2543 const nir_intrinsic_instr *instr)
2544 {
2545 LLVMValueRef res;
2546 const nir_variable *var = get_image_variable(instr);
2547 const struct glsl_type *type = glsl_without_array(var->type);
2548
2549 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF)
2550 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2551
2552 struct ac_image_args args = { 0 };
2553
2554 args.dim = get_ac_image_dim(&ctx->ac, glsl_get_sampler_dim(type),
2555 glsl_sampler_type_is_array(type));
2556 args.dmask = 0xf;
2557 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2558 args.opcode = ac_image_get_resinfo;
2559 args.lod = ctx->ac.i32_0;
2560 args.attributes = AC_FUNC_ATTR_READNONE;
2561
2562 res = ac_build_image_opcode(&ctx->ac, &args);
2563
2564 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2565
2566 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE &&
2567 glsl_sampler_type_is_array(type)) {
2568 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2569 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2570 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2571 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2572 }
2573 if (ctx->ac.chip_class >= GFX9 &&
2574 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_1D &&
2575 glsl_sampler_type_is_array(type)) {
2576 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2577 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2578 ctx->ac.i32_1, "");
2579
2580 }
2581 return res;
2582 }
2583
2584 static void emit_membar(struct ac_llvm_context *ac,
2585 const nir_intrinsic_instr *instr)
2586 {
2587 unsigned waitcnt = NOOP_WAITCNT;
2588
2589 switch (instr->intrinsic) {
2590 case nir_intrinsic_memory_barrier:
2591 case nir_intrinsic_group_memory_barrier:
2592 waitcnt &= VM_CNT & LGKM_CNT;
2593 break;
2594 case nir_intrinsic_memory_barrier_atomic_counter:
2595 case nir_intrinsic_memory_barrier_buffer:
2596 case nir_intrinsic_memory_barrier_image:
2597 waitcnt &= VM_CNT;
2598 break;
2599 case nir_intrinsic_memory_barrier_shared:
2600 waitcnt &= LGKM_CNT;
2601 break;
2602 default:
2603 break;
2604 }
2605 if (waitcnt != NOOP_WAITCNT)
2606 ac_build_waitcnt(ac, waitcnt);
2607 }
2608
2609 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2610 {
2611 /* SI only (thanks to a hw bug workaround):
2612 * The real barrier instruction isn’t needed, because an entire patch
2613 * always fits into a single wave.
2614 */
2615 if (ac->chip_class == SI && stage == MESA_SHADER_TESS_CTRL) {
2616 ac_build_waitcnt(ac, LGKM_CNT & VM_CNT);
2617 return;
2618 }
2619 ac_build_s_barrier(ac);
2620 }
2621
2622 static void emit_discard(struct ac_nir_context *ctx,
2623 const nir_intrinsic_instr *instr)
2624 {
2625 LLVMValueRef cond;
2626
2627 if (instr->intrinsic == nir_intrinsic_discard_if) {
2628 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2629 get_src(ctx, instr->src[0]),
2630 ctx->ac.i32_0, "");
2631 } else {
2632 assert(instr->intrinsic == nir_intrinsic_discard);
2633 cond = ctx->ac.i1false;
2634 }
2635
2636 ctx->abi->emit_kill(ctx->abi, cond);
2637 }
2638
2639 static LLVMValueRef
2640 visit_load_helper_invocation(struct ac_nir_context *ctx)
2641 {
2642 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2643 "llvm.amdgcn.ps.live",
2644 ctx->ac.i1, NULL, 0,
2645 AC_FUNC_ATTR_READNONE);
2646 result = LLVMBuildNot(ctx->ac.builder, result, "");
2647 return LLVMBuildSExt(ctx->ac.builder, result, ctx->ac.i32, "");
2648 }
2649
2650 static LLVMValueRef
2651 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2652 {
2653 LLVMValueRef result;
2654 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2655 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2656 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2657
2658 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2659 }
2660
2661 static LLVMValueRef
2662 visit_load_subgroup_id(struct ac_nir_context *ctx)
2663 {
2664 if (ctx->stage == MESA_SHADER_COMPUTE) {
2665 LLVMValueRef result;
2666 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2667 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2668 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2669 } else {
2670 return LLVMConstInt(ctx->ac.i32, 0, false);
2671 }
2672 }
2673
2674 static LLVMValueRef
2675 visit_load_num_subgroups(struct ac_nir_context *ctx)
2676 {
2677 if (ctx->stage == MESA_SHADER_COMPUTE) {
2678 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2679 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2680 } else {
2681 return LLVMConstInt(ctx->ac.i32, 1, false);
2682 }
2683 }
2684
2685 static LLVMValueRef
2686 visit_first_invocation(struct ac_nir_context *ctx)
2687 {
2688 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2689
2690 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2691 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2692 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2693 "llvm.cttz.i64",
2694 ctx->ac.i64, args, 2,
2695 AC_FUNC_ATTR_NOUNWIND |
2696 AC_FUNC_ATTR_READNONE);
2697
2698 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2699 }
2700
2701 static LLVMValueRef
2702 visit_load_shared(struct ac_nir_context *ctx,
2703 const nir_intrinsic_instr *instr)
2704 {
2705 LLVMValueRef values[4], derived_ptr, index, ret;
2706
2707 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2708
2709 for (int chan = 0; chan < instr->num_components; chan++) {
2710 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2711 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2712 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2713 }
2714
2715 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2716 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2717 }
2718
2719 static void
2720 visit_store_shared(struct ac_nir_context *ctx,
2721 const nir_intrinsic_instr *instr)
2722 {
2723 LLVMValueRef derived_ptr, data,index;
2724 LLVMBuilderRef builder = ctx->ac.builder;
2725
2726 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2727 LLVMValueRef src = get_src(ctx, instr->src[0]);
2728
2729 int writemask = nir_intrinsic_write_mask(instr);
2730 for (int chan = 0; chan < 4; chan++) {
2731 if (!(writemask & (1 << chan))) {
2732 continue;
2733 }
2734 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2735 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2736 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2737 LLVMBuildStore(builder, data, derived_ptr);
2738 }
2739 }
2740
2741 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2742 const nir_intrinsic_instr *instr,
2743 LLVMValueRef ptr, int src_idx)
2744 {
2745 LLVMValueRef result;
2746 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2747
2748 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2749 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2750 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2751 result = LLVMBuildAtomicCmpXchg(ctx->ac.builder,
2752 ptr, src, src1,
2753 LLVMAtomicOrderingSequentiallyConsistent,
2754 LLVMAtomicOrderingSequentiallyConsistent,
2755 false);
2756 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2757 } else {
2758 LLVMAtomicRMWBinOp op;
2759 switch (instr->intrinsic) {
2760 case nir_intrinsic_shared_atomic_add:
2761 case nir_intrinsic_deref_atomic_add:
2762 op = LLVMAtomicRMWBinOpAdd;
2763 break;
2764 case nir_intrinsic_shared_atomic_umin:
2765 case nir_intrinsic_deref_atomic_umin:
2766 op = LLVMAtomicRMWBinOpUMin;
2767 break;
2768 case nir_intrinsic_shared_atomic_umax:
2769 case nir_intrinsic_deref_atomic_umax:
2770 op = LLVMAtomicRMWBinOpUMax;
2771 break;
2772 case nir_intrinsic_shared_atomic_imin:
2773 case nir_intrinsic_deref_atomic_imin:
2774 op = LLVMAtomicRMWBinOpMin;
2775 break;
2776 case nir_intrinsic_shared_atomic_imax:
2777 case nir_intrinsic_deref_atomic_imax:
2778 op = LLVMAtomicRMWBinOpMax;
2779 break;
2780 case nir_intrinsic_shared_atomic_and:
2781 case nir_intrinsic_deref_atomic_and:
2782 op = LLVMAtomicRMWBinOpAnd;
2783 break;
2784 case nir_intrinsic_shared_atomic_or:
2785 case nir_intrinsic_deref_atomic_or:
2786 op = LLVMAtomicRMWBinOpOr;
2787 break;
2788 case nir_intrinsic_shared_atomic_xor:
2789 case nir_intrinsic_deref_atomic_xor:
2790 op = LLVMAtomicRMWBinOpXor;
2791 break;
2792 case nir_intrinsic_shared_atomic_exchange:
2793 case nir_intrinsic_deref_atomic_exchange:
2794 op = LLVMAtomicRMWBinOpXchg;
2795 break;
2796 default:
2797 return NULL;
2798 }
2799
2800 result = LLVMBuildAtomicRMW(ctx->ac.builder, op, ptr, ac_to_integer(&ctx->ac, src),
2801 LLVMAtomicOrderingSequentiallyConsistent,
2802 false);
2803 }
2804 return result;
2805 }
2806
2807 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
2808 {
2809 LLVMValueRef values[2];
2810 LLVMValueRef pos[2];
2811
2812 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
2813 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
2814
2815 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
2816 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
2817 return ac_build_gather_values(&ctx->ac, values, 2);
2818 }
2819
2820 static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
2821 const nir_intrinsic_instr *instr)
2822 {
2823 LLVMValueRef result[4];
2824 LLVMValueRef interp_param, attr_number;
2825 unsigned location;
2826 unsigned chan;
2827 LLVMValueRef src_c0 = NULL;
2828 LLVMValueRef src_c1 = NULL;
2829 LLVMValueRef src0 = NULL;
2830
2831 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2832 int input_index = var->data.location - VARYING_SLOT_VAR0;
2833 switch (instr->intrinsic) {
2834 case nir_intrinsic_interp_deref_at_centroid:
2835 location = INTERP_CENTROID;
2836 break;
2837 case nir_intrinsic_interp_deref_at_sample:
2838 case nir_intrinsic_interp_deref_at_offset:
2839 location = INTERP_CENTER;
2840 src0 = get_src(ctx, instr->src[1]);
2841 break;
2842 default:
2843 break;
2844 }
2845
2846 if (instr->intrinsic == nir_intrinsic_interp_deref_at_offset) {
2847 src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_0, ""));
2848 src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_1, ""));
2849 } else if (instr->intrinsic == nir_intrinsic_interp_deref_at_sample) {
2850 LLVMValueRef sample_position;
2851 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
2852
2853 /* fetch sample ID */
2854 sample_position = ctx->abi->load_sample_position(ctx->abi, src0);
2855
2856 src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_0, "");
2857 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
2858 src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_1, "");
2859 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
2860 }
2861 interp_param = ctx->abi->lookup_interp_param(ctx->abi, var->data.interpolation, location);
2862 attr_number = LLVMConstInt(ctx->ac.i32, input_index, false);
2863
2864 if (location == INTERP_CENTER) {
2865 LLVMValueRef ij_out[2];
2866 LLVMValueRef ddxy_out = emit_ddxy_interp(ctx, interp_param);
2867
2868 /*
2869 * take the I then J parameters, and the DDX/Y for it, and
2870 * calculate the IJ inputs for the interpolator.
2871 * temp1 = ddx * offset/sample.x + I;
2872 * interp_param.I = ddy * offset/sample.y + temp1;
2873 * temp1 = ddx * offset/sample.x + J;
2874 * interp_param.J = ddy * offset/sample.y + temp1;
2875 */
2876 for (unsigned i = 0; i < 2; i++) {
2877 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
2878 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
2879 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
2880 ddxy_out, ix_ll, "");
2881 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
2882 ddxy_out, iy_ll, "");
2883 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
2884 interp_param, ix_ll, "");
2885 LLVMValueRef temp1, temp2;
2886
2887 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
2888 ctx->ac.f32, "");
2889
2890 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
2891 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
2892
2893 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
2894 temp2, ctx->ac.i32, "");
2895 }
2896 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
2897
2898 }
2899
2900 for (chan = 0; chan < 4; chan++) {
2901 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false);
2902
2903 if (interp_param) {
2904 interp_param = LLVMBuildBitCast(ctx->ac.builder,
2905 interp_param, ctx->ac.v2f32, "");
2906 LLVMValueRef i = LLVMBuildExtractElement(
2907 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
2908 LLVMValueRef j = LLVMBuildExtractElement(
2909 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
2910
2911 result[chan] = ac_build_fs_interp(&ctx->ac,
2912 llvm_chan, attr_number,
2913 ctx->abi->prim_mask, i, j);
2914 } else {
2915 result[chan] = ac_build_fs_interp_mov(&ctx->ac,
2916 LLVMConstInt(ctx->ac.i32, 2, false),
2917 llvm_chan, attr_number,
2918 ctx->abi->prim_mask);
2919 }
2920 }
2921 return ac_build_varying_gather_values(&ctx->ac, result, instr->num_components,
2922 var->data.location_frac);
2923 }
2924
2925 static void visit_intrinsic(struct ac_nir_context *ctx,
2926 nir_intrinsic_instr *instr)
2927 {
2928 LLVMValueRef result = NULL;
2929
2930 switch (instr->intrinsic) {
2931 case nir_intrinsic_ballot:
2932 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
2933 break;
2934 case nir_intrinsic_read_invocation:
2935 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
2936 get_src(ctx, instr->src[1]));
2937 break;
2938 case nir_intrinsic_read_first_invocation:
2939 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
2940 break;
2941 case nir_intrinsic_load_subgroup_invocation:
2942 result = ac_get_thread_id(&ctx->ac);
2943 break;
2944 case nir_intrinsic_load_work_group_id: {
2945 LLVMValueRef values[3];
2946
2947 for (int i = 0; i < 3; i++) {
2948 values[i] = ctx->abi->workgroup_ids[i] ?
2949 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
2950 }
2951
2952 result = ac_build_gather_values(&ctx->ac, values, 3);
2953 break;
2954 }
2955 case nir_intrinsic_load_base_vertex:
2956 case nir_intrinsic_load_first_vertex:
2957 result = ctx->abi->load_base_vertex(ctx->abi);
2958 break;
2959 case nir_intrinsic_load_local_group_size:
2960 result = ctx->abi->load_local_group_size(ctx->abi);
2961 break;
2962 case nir_intrinsic_load_vertex_id:
2963 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
2964 ctx->abi->base_vertex, "");
2965 break;
2966 case nir_intrinsic_load_vertex_id_zero_base: {
2967 result = ctx->abi->vertex_id;
2968 break;
2969 }
2970 case nir_intrinsic_load_local_invocation_id: {
2971 result = ctx->abi->local_invocation_ids;
2972 break;
2973 }
2974 case nir_intrinsic_load_base_instance:
2975 result = ctx->abi->start_instance;
2976 break;
2977 case nir_intrinsic_load_draw_id:
2978 result = ctx->abi->draw_id;
2979 break;
2980 case nir_intrinsic_load_view_index:
2981 result = ctx->abi->view_index;
2982 break;
2983 case nir_intrinsic_load_invocation_id:
2984 if (ctx->stage == MESA_SHADER_TESS_CTRL)
2985 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
2986 else
2987 result = ctx->abi->gs_invocation_id;
2988 break;
2989 case nir_intrinsic_load_primitive_id:
2990 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2991 result = ctx->abi->gs_prim_id;
2992 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2993 result = ctx->abi->tcs_patch_id;
2994 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
2995 result = ctx->abi->tes_patch_id;
2996 } else
2997 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
2998 break;
2999 case nir_intrinsic_load_sample_id:
3000 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3001 break;
3002 case nir_intrinsic_load_sample_pos:
3003 result = load_sample_pos(ctx);
3004 break;
3005 case nir_intrinsic_load_sample_mask_in:
3006 result = ctx->abi->load_sample_mask_in(ctx->abi);
3007 break;
3008 case nir_intrinsic_load_frag_coord: {
3009 LLVMValueRef values[4] = {
3010 ctx->abi->frag_pos[0],
3011 ctx->abi->frag_pos[1],
3012 ctx->abi->frag_pos[2],
3013 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3014 };
3015 result = ac_build_gather_values(&ctx->ac, values, 4);
3016 break;
3017 }
3018 case nir_intrinsic_load_front_face:
3019 result = ctx->abi->front_face;
3020 break;
3021 case nir_intrinsic_load_helper_invocation:
3022 result = visit_load_helper_invocation(ctx);
3023 break;
3024 case nir_intrinsic_load_instance_id:
3025 result = ctx->abi->instance_id;
3026 break;
3027 case nir_intrinsic_load_num_work_groups:
3028 result = ctx->abi->num_work_groups;
3029 break;
3030 case nir_intrinsic_load_local_invocation_index:
3031 result = visit_load_local_invocation_index(ctx);
3032 break;
3033 case nir_intrinsic_load_subgroup_id:
3034 result = visit_load_subgroup_id(ctx);
3035 break;
3036 case nir_intrinsic_load_num_subgroups:
3037 result = visit_load_num_subgroups(ctx);
3038 break;
3039 case nir_intrinsic_first_invocation:
3040 result = visit_first_invocation(ctx);
3041 break;
3042 case nir_intrinsic_load_push_constant:
3043 result = visit_load_push_constant(ctx, instr);
3044 break;
3045 case nir_intrinsic_vulkan_resource_index: {
3046 LLVMValueRef index = get_src(ctx, instr->src[0]);
3047 unsigned desc_set = nir_intrinsic_desc_set(instr);
3048 unsigned binding = nir_intrinsic_binding(instr);
3049
3050 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3051 binding);
3052 break;
3053 }
3054 case nir_intrinsic_vulkan_resource_reindex:
3055 result = visit_vulkan_resource_reindex(ctx, instr);
3056 break;
3057 case nir_intrinsic_store_ssbo:
3058 visit_store_ssbo(ctx, instr);
3059 break;
3060 case nir_intrinsic_load_ssbo:
3061 result = visit_load_buffer(ctx, instr);
3062 break;
3063 case nir_intrinsic_ssbo_atomic_add:
3064 case nir_intrinsic_ssbo_atomic_imin:
3065 case nir_intrinsic_ssbo_atomic_umin:
3066 case nir_intrinsic_ssbo_atomic_imax:
3067 case nir_intrinsic_ssbo_atomic_umax:
3068 case nir_intrinsic_ssbo_atomic_and:
3069 case nir_intrinsic_ssbo_atomic_or:
3070 case nir_intrinsic_ssbo_atomic_xor:
3071 case nir_intrinsic_ssbo_atomic_exchange:
3072 case nir_intrinsic_ssbo_atomic_comp_swap:
3073 result = visit_atomic_ssbo(ctx, instr);
3074 break;
3075 case nir_intrinsic_load_ubo:
3076 result = visit_load_ubo_buffer(ctx, instr);
3077 break;
3078 case nir_intrinsic_get_buffer_size:
3079 result = visit_get_buffer_size(ctx, instr);
3080 break;
3081 case nir_intrinsic_load_deref:
3082 result = visit_load_var(ctx, instr);
3083 break;
3084 case nir_intrinsic_store_deref:
3085 visit_store_var(ctx, instr);
3086 break;
3087 case nir_intrinsic_load_shared:
3088 result = visit_load_shared(ctx, instr);
3089 break;
3090 case nir_intrinsic_store_shared:
3091 visit_store_shared(ctx, instr);
3092 break;
3093 case nir_intrinsic_image_deref_samples:
3094 result = visit_image_samples(ctx, instr);
3095 break;
3096 case nir_intrinsic_image_deref_load:
3097 result = visit_image_load(ctx, instr);
3098 break;
3099 case nir_intrinsic_image_deref_store:
3100 visit_image_store(ctx, instr);
3101 break;
3102 case nir_intrinsic_image_deref_atomic_add:
3103 case nir_intrinsic_image_deref_atomic_min:
3104 case nir_intrinsic_image_deref_atomic_max:
3105 case nir_intrinsic_image_deref_atomic_and:
3106 case nir_intrinsic_image_deref_atomic_or:
3107 case nir_intrinsic_image_deref_atomic_xor:
3108 case nir_intrinsic_image_deref_atomic_exchange:
3109 case nir_intrinsic_image_deref_atomic_comp_swap:
3110 result = visit_image_atomic(ctx, instr);
3111 break;
3112 case nir_intrinsic_image_deref_size:
3113 result = visit_image_size(ctx, instr);
3114 break;
3115 case nir_intrinsic_shader_clock:
3116 result = ac_build_shader_clock(&ctx->ac);
3117 break;
3118 case nir_intrinsic_discard:
3119 case nir_intrinsic_discard_if:
3120 emit_discard(ctx, instr);
3121 break;
3122 case nir_intrinsic_memory_barrier:
3123 case nir_intrinsic_group_memory_barrier:
3124 case nir_intrinsic_memory_barrier_atomic_counter:
3125 case nir_intrinsic_memory_barrier_buffer:
3126 case nir_intrinsic_memory_barrier_image:
3127 case nir_intrinsic_memory_barrier_shared:
3128 emit_membar(&ctx->ac, instr);
3129 break;
3130 case nir_intrinsic_barrier:
3131 ac_emit_barrier(&ctx->ac, ctx->stage);
3132 break;
3133 case nir_intrinsic_shared_atomic_add:
3134 case nir_intrinsic_shared_atomic_imin:
3135 case nir_intrinsic_shared_atomic_umin:
3136 case nir_intrinsic_shared_atomic_imax:
3137 case nir_intrinsic_shared_atomic_umax:
3138 case nir_intrinsic_shared_atomic_and:
3139 case nir_intrinsic_shared_atomic_or:
3140 case nir_intrinsic_shared_atomic_xor:
3141 case nir_intrinsic_shared_atomic_exchange:
3142 case nir_intrinsic_shared_atomic_comp_swap: {
3143 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3144 result = visit_var_atomic(ctx, instr, ptr, 1);
3145 break;
3146 }
3147 case nir_intrinsic_deref_atomic_add:
3148 case nir_intrinsic_deref_atomic_imin:
3149 case nir_intrinsic_deref_atomic_umin:
3150 case nir_intrinsic_deref_atomic_imax:
3151 case nir_intrinsic_deref_atomic_umax:
3152 case nir_intrinsic_deref_atomic_and:
3153 case nir_intrinsic_deref_atomic_or:
3154 case nir_intrinsic_deref_atomic_xor:
3155 case nir_intrinsic_deref_atomic_exchange:
3156 case nir_intrinsic_deref_atomic_comp_swap: {
3157 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3158 result = visit_var_atomic(ctx, instr, ptr, 1);
3159 break;
3160 }
3161 case nir_intrinsic_interp_deref_at_centroid:
3162 case nir_intrinsic_interp_deref_at_sample:
3163 case nir_intrinsic_interp_deref_at_offset:
3164 result = visit_interp(ctx, instr);
3165 break;
3166 case nir_intrinsic_emit_vertex:
3167 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3168 break;
3169 case nir_intrinsic_end_primitive:
3170 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3171 break;
3172 case nir_intrinsic_load_tess_coord:
3173 result = ctx->abi->load_tess_coord(ctx->abi);
3174 break;
3175 case nir_intrinsic_load_tess_level_outer:
3176 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
3177 break;
3178 case nir_intrinsic_load_tess_level_inner:
3179 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
3180 break;
3181 case nir_intrinsic_load_patch_vertices_in:
3182 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3183 break;
3184 case nir_intrinsic_vote_all: {
3185 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3186 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3187 break;
3188 }
3189 case nir_intrinsic_vote_any: {
3190 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3191 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3192 break;
3193 }
3194 case nir_intrinsic_shuffle:
3195 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3196 get_src(ctx, instr->src[1]));
3197 break;
3198 case nir_intrinsic_reduce:
3199 result = ac_build_reduce(&ctx->ac,
3200 get_src(ctx, instr->src[0]),
3201 instr->const_index[0],
3202 instr->const_index[1]);
3203 break;
3204 case nir_intrinsic_inclusive_scan:
3205 result = ac_build_inclusive_scan(&ctx->ac,
3206 get_src(ctx, instr->src[0]),
3207 instr->const_index[0]);
3208 break;
3209 case nir_intrinsic_exclusive_scan:
3210 result = ac_build_exclusive_scan(&ctx->ac,
3211 get_src(ctx, instr->src[0]),
3212 instr->const_index[0]);
3213 break;
3214 case nir_intrinsic_quad_broadcast: {
3215 unsigned lane = nir_src_as_const_value(instr->src[1])->u32[0];
3216 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3217 lane, lane, lane, lane);
3218 break;
3219 }
3220 case nir_intrinsic_quad_swap_horizontal:
3221 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3222 break;
3223 case nir_intrinsic_quad_swap_vertical:
3224 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3225 break;
3226 case nir_intrinsic_quad_swap_diagonal:
3227 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3228 break;
3229 default:
3230 fprintf(stderr, "Unknown intrinsic: ");
3231 nir_print_instr(&instr->instr, stderr);
3232 fprintf(stderr, "\n");
3233 break;
3234 }
3235 if (result) {
3236 ctx->ssa_defs[instr->dest.ssa.index] = result;
3237 }
3238 }
3239
3240 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3241 nir_deref_instr *deref_instr,
3242 enum ac_descriptor_type desc_type,
3243 const nir_tex_instr *tex_instr,
3244 bool image, bool write)
3245 {
3246 LLVMValueRef index = NULL;
3247 unsigned constant_index = 0;
3248 unsigned descriptor_set;
3249 unsigned base_index;
3250 bool bindless = false;
3251
3252 if (!deref_instr) {
3253 assert(tex_instr && !image);
3254 descriptor_set = 0;
3255 base_index = tex_instr->sampler_index;
3256 } else {
3257 while(deref_instr->deref_type != nir_deref_type_var) {
3258 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3259 if (!array_size)
3260 array_size = 1;
3261
3262 assert(deref_instr->deref_type == nir_deref_type_array);
3263 nir_const_value *const_value = nir_src_as_const_value(deref_instr->arr.index);
3264 if (const_value) {
3265 constant_index += array_size * const_value->u32[0];
3266 } else {
3267 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3268
3269 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3270 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3271
3272 if (!index)
3273 index = indirect;
3274 else
3275 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3276 }
3277
3278 deref_instr = nir_src_as_deref(deref_instr->parent);
3279 }
3280 descriptor_set = deref_instr->var->data.descriptor_set;
3281 base_index = deref_instr->var->data.binding;
3282 }
3283
3284 return ctx->abi->load_sampler_desc(ctx->abi,
3285 descriptor_set,
3286 base_index,
3287 constant_index, index,
3288 desc_type, image, write, bindless);
3289 }
3290
3291 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3292 *
3293 * SI-CI:
3294 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3295 * filtering manually. The driver sets img7 to a mask clearing
3296 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3297 * s_and_b32 samp0, samp0, img7
3298 *
3299 * VI:
3300 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3301 */
3302 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3303 LLVMValueRef res, LLVMValueRef samp)
3304 {
3305 LLVMBuilderRef builder = ctx->ac.builder;
3306 LLVMValueRef img7, samp0;
3307
3308 if (ctx->ac.chip_class >= VI)
3309 return samp;
3310
3311 img7 = LLVMBuildExtractElement(builder, res,
3312 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3313 samp0 = LLVMBuildExtractElement(builder, samp,
3314 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3315 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3316 return LLVMBuildInsertElement(builder, samp, samp0,
3317 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3318 }
3319
3320 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3321 nir_tex_instr *instr,
3322 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3323 LLVMValueRef *fmask_ptr)
3324 {
3325 nir_deref_instr *texture_deref_instr = NULL;
3326 nir_deref_instr *sampler_deref_instr = NULL;
3327
3328 for (unsigned i = 0; i < instr->num_srcs; i++) {
3329 switch (instr->src[i].src_type) {
3330 case nir_tex_src_texture_deref:
3331 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3332 break;
3333 case nir_tex_src_sampler_deref:
3334 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3335 break;
3336 default:
3337 break;
3338 }
3339 }
3340
3341 if (!sampler_deref_instr)
3342 sampler_deref_instr = texture_deref_instr;
3343
3344 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF)
3345 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_BUFFER, instr, false, false);
3346 else
3347 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_IMAGE, instr, false, false);
3348 if (samp_ptr) {
3349 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, instr, false, false);
3350 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3351 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3352 }
3353 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3354 instr->op == nir_texop_samples_identical))
3355 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, instr, false, false);
3356 }
3357
3358 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3359 LLVMValueRef coord)
3360 {
3361 coord = ac_to_float(ctx, coord);
3362 coord = ac_build_round(ctx, coord);
3363 coord = ac_to_integer(ctx, coord);
3364 return coord;
3365 }
3366
3367 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3368 {
3369 LLVMValueRef result = NULL;
3370 struct ac_image_args args = { 0 };
3371 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3372 LLVMValueRef ddx = NULL, ddy = NULL;
3373 unsigned offset_src = 0;
3374
3375 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3376
3377 for (unsigned i = 0; i < instr->num_srcs; i++) {
3378 switch (instr->src[i].src_type) {
3379 case nir_tex_src_coord: {
3380 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3381 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3382 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3383 break;
3384 }
3385 case nir_tex_src_projector:
3386 break;
3387 case nir_tex_src_comparator:
3388 if (instr->is_shadow)
3389 args.compare = get_src(ctx, instr->src[i].src);
3390 break;
3391 case nir_tex_src_offset:
3392 args.offset = get_src(ctx, instr->src[i].src);
3393 offset_src = i;
3394 break;
3395 case nir_tex_src_bias:
3396 if (instr->op == nir_texop_txb)
3397 args.bias = get_src(ctx, instr->src[i].src);
3398 break;
3399 case nir_tex_src_lod: {
3400 nir_const_value *val = nir_src_as_const_value(instr->src[i].src);
3401
3402 if (val && val->i32[0] == 0)
3403 args.level_zero = true;
3404 else
3405 args.lod = get_src(ctx, instr->src[i].src);
3406 break;
3407 }
3408 case nir_tex_src_ms_index:
3409 sample_index = get_src(ctx, instr->src[i].src);
3410 break;
3411 case nir_tex_src_ms_mcs:
3412 break;
3413 case nir_tex_src_ddx:
3414 ddx = get_src(ctx, instr->src[i].src);
3415 break;
3416 case nir_tex_src_ddy:
3417 ddy = get_src(ctx, instr->src[i].src);
3418 break;
3419 case nir_tex_src_texture_offset:
3420 case nir_tex_src_sampler_offset:
3421 case nir_tex_src_plane:
3422 default:
3423 break;
3424 }
3425 }
3426
3427 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3428 result = get_buffer_size(ctx, args.resource, true);
3429 goto write_result;
3430 }
3431
3432 if (instr->op == nir_texop_texture_samples) {
3433 LLVMValueRef res, samples, is_msaa;
3434 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3435 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3436 LLVMConstInt(ctx->ac.i32, 3, false), "");
3437 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3438 LLVMConstInt(ctx->ac.i32, 28, false), "");
3439 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3440 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3441 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3442 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3443
3444 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3445 LLVMConstInt(ctx->ac.i32, 16, false), "");
3446 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3447 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3448 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3449 samples, "");
3450 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3451 ctx->ac.i32_1, "");
3452 result = samples;
3453 goto write_result;
3454 }
3455
3456 if (args.offset && instr->op != nir_texop_txf) {
3457 LLVMValueRef offset[3], pack;
3458 for (unsigned chan = 0; chan < 3; ++chan)
3459 offset[chan] = ctx->ac.i32_0;
3460
3461 unsigned num_components = ac_get_llvm_num_components(args.offset);
3462 for (unsigned chan = 0; chan < num_components; chan++) {
3463 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3464 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3465 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3466 if (chan)
3467 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3468 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3469 }
3470 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3471 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3472 args.offset = pack;
3473 }
3474
3475 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3476 * so the depth comparison value isn't clamped for Z16 and
3477 * Z24 anymore. Do it manually here.
3478 *
3479 * It's unnecessary if the original texture format was
3480 * Z32_FLOAT, but we don't know that here.
3481 */
3482 if (args.compare && ctx->ac.chip_class == VI && ctx->abi->clamp_shadow_reference)
3483 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3484
3485 /* pack derivatives */
3486 if (ddx || ddy) {
3487 int num_src_deriv_channels, num_dest_deriv_channels;
3488 switch (instr->sampler_dim) {
3489 case GLSL_SAMPLER_DIM_3D:
3490 case GLSL_SAMPLER_DIM_CUBE:
3491 num_src_deriv_channels = 3;
3492 num_dest_deriv_channels = 3;
3493 break;
3494 case GLSL_SAMPLER_DIM_2D:
3495 default:
3496 num_src_deriv_channels = 2;
3497 num_dest_deriv_channels = 2;
3498 break;
3499 case GLSL_SAMPLER_DIM_1D:
3500 num_src_deriv_channels = 1;
3501 if (ctx->ac.chip_class >= GFX9) {
3502 num_dest_deriv_channels = 2;
3503 } else {
3504 num_dest_deriv_channels = 1;
3505 }
3506 break;
3507 }
3508
3509 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3510 args.derivs[i] = ac_to_float(&ctx->ac,
3511 ac_llvm_extract_elem(&ctx->ac, ddx, i));
3512 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
3513 ac_llvm_extract_elem(&ctx->ac, ddy, i));
3514 }
3515 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3516 args.derivs[i] = ctx->ac.f32_0;
3517 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3518 }
3519 }
3520
3521 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
3522 for (unsigned chan = 0; chan < instr->coord_components; chan++)
3523 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
3524 if (instr->coord_components == 3)
3525 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
3526 ac_prepare_cube_coords(&ctx->ac,
3527 instr->op == nir_texop_txd, instr->is_array,
3528 instr->op == nir_texop_lod, args.coords, args.derivs);
3529 }
3530
3531 /* Texture coordinates fixups */
3532 if (instr->coord_components > 1 &&
3533 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3534 instr->is_array &&
3535 instr->op != nir_texop_txf) {
3536 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
3537 }
3538
3539 if (instr->coord_components > 2 &&
3540 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3541 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3542 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3543 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3544 instr->is_array &&
3545 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3546 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
3547 }
3548
3549 if (ctx->ac.chip_class >= GFX9 &&
3550 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3551 instr->op != nir_texop_lod) {
3552 LLVMValueRef filler;
3553 if (instr->op == nir_texop_txf)
3554 filler = ctx->ac.i32_0;
3555 else
3556 filler = LLVMConstReal(ctx->ac.f32, 0.5);
3557
3558 if (instr->is_array)
3559 args.coords[2] = args.coords[1];
3560 args.coords[1] = filler;
3561 }
3562
3563 /* Pack sample index */
3564 if (instr->op == nir_texop_txf_ms && sample_index)
3565 args.coords[instr->coord_components] = sample_index;
3566
3567 if (instr->op == nir_texop_samples_identical) {
3568 struct ac_image_args txf_args = { 0 };
3569 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
3570
3571 txf_args.dmask = 0xf;
3572 txf_args.resource = fmask_ptr;
3573 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
3574 result = build_tex_intrinsic(ctx, instr, &txf_args);
3575
3576 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3577 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
3578 goto write_result;
3579 }
3580
3581 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS &&
3582 instr->op != nir_texop_txs) {
3583 unsigned sample_chan = instr->is_array ? 3 : 2;
3584 args.coords[sample_chan] = adjust_sample_index_using_fmask(
3585 &ctx->ac, args.coords[0], args.coords[1],
3586 instr->is_array ? args.coords[2] : NULL,
3587 args.coords[sample_chan], fmask_ptr);
3588 }
3589
3590 if (args.offset && instr->op == nir_texop_txf) {
3591 nir_const_value *const_offset =
3592 nir_src_as_const_value(instr->src[offset_src].src);
3593 int num_offsets = instr->src[offset_src].src.ssa->num_components;
3594 assert(const_offset);
3595 num_offsets = MIN2(num_offsets, instr->coord_components);
3596 for (unsigned i = 0; i < num_offsets; ++i) {
3597 args.coords[i] = LLVMBuildAdd(
3598 ctx->ac.builder, args.coords[i],
3599 LLVMConstInt(ctx->ac.i32, const_offset->i32[i], false), "");
3600 }
3601 args.offset = NULL;
3602 }
3603
3604 /* TODO TG4 support */
3605 args.dmask = 0xf;
3606 if (instr->op == nir_texop_tg4) {
3607 if (instr->is_shadow)
3608 args.dmask = 1;
3609 else
3610 args.dmask = 1 << instr->component;
3611 }
3612
3613 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
3614 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
3615 result = build_tex_intrinsic(ctx, instr, &args);
3616
3617 if (instr->op == nir_texop_query_levels)
3618 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
3619 else if (instr->is_shadow && instr->is_new_style_shadow &&
3620 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
3621 instr->op != nir_texop_tg4)
3622 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3623 else if (instr->op == nir_texop_txs &&
3624 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3625 instr->is_array) {
3626 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3627 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3628 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3629 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3630 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
3631 } else if (ctx->ac.chip_class >= GFX9 &&
3632 instr->op == nir_texop_txs &&
3633 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3634 instr->is_array) {
3635 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3636 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3637 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
3638 ctx->ac.i32_1, "");
3639 } else if (instr->dest.ssa.num_components != 4)
3640 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
3641
3642 write_result:
3643 if (result) {
3644 assert(instr->dest.is_ssa);
3645 result = ac_to_integer(&ctx->ac, result);
3646 ctx->ssa_defs[instr->dest.ssa.index] = result;
3647 }
3648 }
3649
3650
3651 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
3652 {
3653 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3654 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
3655
3656 ctx->ssa_defs[instr->dest.ssa.index] = result;
3657 _mesa_hash_table_insert(ctx->phis, instr, result);
3658 }
3659
3660 static void visit_post_phi(struct ac_nir_context *ctx,
3661 nir_phi_instr *instr,
3662 LLVMValueRef llvm_phi)
3663 {
3664 nir_foreach_phi_src(src, instr) {
3665 LLVMBasicBlockRef block = get_block(ctx, src->pred);
3666 LLVMValueRef llvm_src = get_src(ctx, src->src);
3667
3668 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
3669 }
3670 }
3671
3672 static void phi_post_pass(struct ac_nir_context *ctx)
3673 {
3674 hash_table_foreach(ctx->phis, entry) {
3675 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
3676 (LLVMValueRef)entry->data);
3677 }
3678 }
3679
3680
3681 static void visit_ssa_undef(struct ac_nir_context *ctx,
3682 const nir_ssa_undef_instr *instr)
3683 {
3684 unsigned num_components = instr->def.num_components;
3685 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
3686 LLVMValueRef undef;
3687
3688 if (num_components == 1)
3689 undef = LLVMGetUndef(type);
3690 else {
3691 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
3692 }
3693 ctx->ssa_defs[instr->def.index] = undef;
3694 }
3695
3696 static void visit_jump(struct ac_llvm_context *ctx,
3697 const nir_jump_instr *instr)
3698 {
3699 switch (instr->type) {
3700 case nir_jump_break:
3701 ac_build_break(ctx);
3702 break;
3703 case nir_jump_continue:
3704 ac_build_continue(ctx);
3705 break;
3706 default:
3707 fprintf(stderr, "Unknown NIR jump instr: ");
3708 nir_print_instr(&instr->instr, stderr);
3709 fprintf(stderr, "\n");
3710 abort();
3711 }
3712 }
3713
3714 static void visit_deref(struct ac_nir_context *ctx,
3715 nir_deref_instr *instr)
3716 {
3717 if (instr->mode != nir_var_shared)
3718 return;
3719
3720 LLVMValueRef result = NULL;
3721 switch(instr->deref_type) {
3722 case nir_deref_type_var: {
3723 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
3724 result = entry->data;
3725 break;
3726 }
3727 case nir_deref_type_struct:
3728 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
3729 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
3730 break;
3731 case nir_deref_type_array:
3732 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
3733 get_src(ctx, instr->arr.index));
3734 break;
3735 case nir_deref_type_cast:
3736 result = get_src(ctx, instr->parent);
3737 break;
3738 default:
3739 unreachable("Unhandled deref_instr deref type");
3740 }
3741
3742 ctx->ssa_defs[instr->dest.ssa.index] = result;
3743 }
3744
3745 static void visit_cf_list(struct ac_nir_context *ctx,
3746 struct exec_list *list);
3747
3748 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
3749 {
3750 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->ac.builder);
3751 nir_foreach_instr(instr, block)
3752 {
3753 switch (instr->type) {
3754 case nir_instr_type_alu:
3755 visit_alu(ctx, nir_instr_as_alu(instr));
3756 break;
3757 case nir_instr_type_load_const:
3758 visit_load_const(ctx, nir_instr_as_load_const(instr));
3759 break;
3760 case nir_instr_type_intrinsic:
3761 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
3762 break;
3763 case nir_instr_type_tex:
3764 visit_tex(ctx, nir_instr_as_tex(instr));
3765 break;
3766 case nir_instr_type_phi:
3767 visit_phi(ctx, nir_instr_as_phi(instr));
3768 break;
3769 case nir_instr_type_ssa_undef:
3770 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
3771 break;
3772 case nir_instr_type_jump:
3773 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
3774 break;
3775 case nir_instr_type_deref:
3776 visit_deref(ctx, nir_instr_as_deref(instr));
3777 break;
3778 default:
3779 fprintf(stderr, "Unknown NIR instr type: ");
3780 nir_print_instr(instr, stderr);
3781 fprintf(stderr, "\n");
3782 abort();
3783 }
3784 }
3785
3786 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
3787 }
3788
3789 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
3790 {
3791 LLVMValueRef value = get_src(ctx, if_stmt->condition);
3792
3793 nir_block *then_block =
3794 (nir_block *) exec_list_get_head(&if_stmt->then_list);
3795
3796 ac_build_uif(&ctx->ac, value, then_block->index);
3797
3798 visit_cf_list(ctx, &if_stmt->then_list);
3799
3800 if (!exec_list_is_empty(&if_stmt->else_list)) {
3801 nir_block *else_block =
3802 (nir_block *) exec_list_get_head(&if_stmt->else_list);
3803
3804 ac_build_else(&ctx->ac, else_block->index);
3805 visit_cf_list(ctx, &if_stmt->else_list);
3806 }
3807
3808 ac_build_endif(&ctx->ac, then_block->index);
3809 }
3810
3811 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
3812 {
3813 nir_block *first_loop_block =
3814 (nir_block *) exec_list_get_head(&loop->body);
3815
3816 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
3817
3818 visit_cf_list(ctx, &loop->body);
3819
3820 ac_build_endloop(&ctx->ac, first_loop_block->index);
3821 }
3822
3823 static void visit_cf_list(struct ac_nir_context *ctx,
3824 struct exec_list *list)
3825 {
3826 foreach_list_typed(nir_cf_node, node, node, list)
3827 {
3828 switch (node->type) {
3829 case nir_cf_node_block:
3830 visit_block(ctx, nir_cf_node_as_block(node));
3831 break;
3832
3833 case nir_cf_node_if:
3834 visit_if(ctx, nir_cf_node_as_if(node));
3835 break;
3836
3837 case nir_cf_node_loop:
3838 visit_loop(ctx, nir_cf_node_as_loop(node));
3839 break;
3840
3841 default:
3842 assert(0);
3843 }
3844 }
3845 }
3846
3847 void
3848 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
3849 struct ac_shader_abi *abi,
3850 struct nir_shader *nir,
3851 struct nir_variable *variable,
3852 gl_shader_stage stage)
3853 {
3854 unsigned output_loc = variable->data.driver_location / 4;
3855 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3856
3857 /* tess ctrl has it's own load/store paths for outputs */
3858 if (stage == MESA_SHADER_TESS_CTRL)
3859 return;
3860
3861 if (stage == MESA_SHADER_VERTEX ||
3862 stage == MESA_SHADER_TESS_EVAL ||
3863 stage == MESA_SHADER_GEOMETRY) {
3864 int idx = variable->data.location + variable->data.index;
3865 if (idx == VARYING_SLOT_CLIP_DIST0) {
3866 int length = nir->info.clip_distance_array_size +
3867 nir->info.cull_distance_array_size;
3868
3869 if (length > 4)
3870 attrib_count = 2;
3871 else
3872 attrib_count = 1;
3873 }
3874 }
3875
3876 bool is_16bit = glsl_type_is_16bit(variable->type);
3877 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
3878 for (unsigned i = 0; i < attrib_count; ++i) {
3879 for (unsigned chan = 0; chan < 4; chan++) {
3880 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
3881 ac_build_alloca_undef(ctx, type, "");
3882 }
3883 }
3884 }
3885
3886 static LLVMTypeRef
3887 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
3888 enum glsl_base_type type)
3889 {
3890 switch (type) {
3891 case GLSL_TYPE_INT:
3892 case GLSL_TYPE_UINT:
3893 case GLSL_TYPE_BOOL:
3894 case GLSL_TYPE_SUBROUTINE:
3895 return ac->i32;
3896 case GLSL_TYPE_FLOAT: /* TODO handle mediump */
3897 return ac->f32;
3898 case GLSL_TYPE_INT64:
3899 case GLSL_TYPE_UINT64:
3900 return ac->i64;
3901 case GLSL_TYPE_DOUBLE:
3902 return ac->f64;
3903 default:
3904 unreachable("unknown GLSL type");
3905 }
3906 }
3907
3908 static LLVMTypeRef
3909 glsl_to_llvm_type(struct ac_llvm_context *ac,
3910 const struct glsl_type *type)
3911 {
3912 if (glsl_type_is_scalar(type)) {
3913 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
3914 }
3915
3916 if (glsl_type_is_vector(type)) {
3917 return LLVMVectorType(
3918 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
3919 glsl_get_vector_elements(type));
3920 }
3921
3922 if (glsl_type_is_matrix(type)) {
3923 return LLVMArrayType(
3924 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
3925 glsl_get_matrix_columns(type));
3926 }
3927
3928 if (glsl_type_is_array(type)) {
3929 return LLVMArrayType(
3930 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
3931 glsl_get_length(type));
3932 }
3933
3934 assert(glsl_type_is_struct(type));
3935
3936 LLVMTypeRef member_types[glsl_get_length(type)];
3937
3938 for (unsigned i = 0; i < glsl_get_length(type); i++) {
3939 member_types[i] =
3940 glsl_to_llvm_type(ac,
3941 glsl_get_struct_field(type, i));
3942 }
3943
3944 return LLVMStructTypeInContext(ac->context, member_types,
3945 glsl_get_length(type), false);
3946 }
3947
3948 static void
3949 setup_locals(struct ac_nir_context *ctx,
3950 struct nir_function *func)
3951 {
3952 int i, j;
3953 ctx->num_locals = 0;
3954 nir_foreach_variable(variable, &func->impl->locals) {
3955 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3956 variable->data.driver_location = ctx->num_locals * 4;
3957 variable->data.location_frac = 0;
3958 ctx->num_locals += attrib_count;
3959 }
3960 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
3961 if (!ctx->locals)
3962 return;
3963
3964 for (i = 0; i < ctx->num_locals; i++) {
3965 for (j = 0; j < 4; j++) {
3966 ctx->locals[i * 4 + j] =
3967 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
3968 }
3969 }
3970 }
3971
3972 static void
3973 setup_shared(struct ac_nir_context *ctx,
3974 struct nir_shader *nir)
3975 {
3976 nir_foreach_variable(variable, &nir->shared) {
3977 LLVMValueRef shared =
3978 LLVMAddGlobalInAddressSpace(
3979 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
3980 variable->name ? variable->name : "",
3981 AC_ADDR_SPACE_LDS);
3982 _mesa_hash_table_insert(ctx->vars, variable, shared);
3983 }
3984 }
3985
3986 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
3987 struct nir_shader *nir)
3988 {
3989 struct ac_nir_context ctx = {};
3990 struct nir_function *func;
3991
3992 ctx.ac = *ac;
3993 ctx.abi = abi;
3994
3995 ctx.stage = nir->info.stage;
3996
3997 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
3998
3999 nir_foreach_variable(variable, &nir->outputs)
4000 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4001 ctx.stage);
4002
4003 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4004 _mesa_key_pointer_equal);
4005 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4006 _mesa_key_pointer_equal);
4007 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4008 _mesa_key_pointer_equal);
4009
4010 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4011
4012 nir_index_ssa_defs(func->impl);
4013 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4014
4015 setup_locals(&ctx, func);
4016
4017 if (nir->info.stage == MESA_SHADER_COMPUTE)
4018 setup_shared(&ctx, nir);
4019
4020 visit_cf_list(&ctx, &func->impl->body);
4021 phi_post_pass(&ctx);
4022
4023 if (nir->info.stage != MESA_SHADER_COMPUTE)
4024 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4025 ctx.abi->outputs);
4026
4027 free(ctx.locals);
4028 free(ctx.ssa_defs);
4029 ralloc_free(ctx.defs);
4030 ralloc_free(ctx.phis);
4031 ralloc_free(ctx.vars);
4032 }
4033
4034 void
4035 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4036 {
4037 /* While it would be nice not to have this flag, we are constrained
4038 * by the reality that LLVM 5.0 doesn't have working VGPR indexing
4039 * on GFX9.
4040 */
4041 bool llvm_has_working_vgpr_indexing = chip_class <= VI;
4042
4043 /* TODO: Indirect indexing of GS inputs is unimplemented.
4044 *
4045 * TCS and TES load inputs directly from LDS or offchip memory, so
4046 * indirect indexing is trivial.
4047 */
4048 nir_variable_mode indirect_mask = 0;
4049 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4050 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4051 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4052 !llvm_has_working_vgpr_indexing)) {
4053 indirect_mask |= nir_var_shader_in;
4054 }
4055 if (!llvm_has_working_vgpr_indexing &&
4056 nir->info.stage != MESA_SHADER_TESS_CTRL)
4057 indirect_mask |= nir_var_shader_out;
4058
4059 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4060 * smart enough to handle indirects without causing excess spilling
4061 * causing the gpu to hang.
4062 *
4063 * See the following thread for more details of the problem:
4064 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4065 */
4066 indirect_mask |= nir_var_local;
4067
4068 nir_lower_indirect_derefs(nir, indirect_mask);
4069 }
4070
4071 static unsigned
4072 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4073 {
4074 if (intrin->intrinsic != nir_intrinsic_store_deref)
4075 return 0;
4076
4077 nir_variable *var =
4078 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4079
4080 if (var->data.mode != nir_var_shader_out)
4081 return 0;
4082
4083 unsigned writemask = 0;
4084 const int location = var->data.location;
4085 unsigned first_component = var->data.location_frac;
4086 unsigned num_comps = intrin->dest.ssa.num_components;
4087
4088 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4089 writemask = ((1 << num_comps + 1) - 1) << first_component;
4090 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4091 writemask = (((1 << num_comps + 1) - 1) << first_component) << 4;
4092
4093 return writemask;
4094 }
4095
4096 static void
4097 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4098 unsigned *cond_block_tf_writemask,
4099 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4100 {
4101 switch (cf_node->type) {
4102 case nir_cf_node_block: {
4103 nir_block *block = nir_cf_node_as_block(cf_node);
4104 nir_foreach_instr(instr, block) {
4105 if (instr->type != nir_instr_type_intrinsic)
4106 continue;
4107
4108 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4109 if (intrin->intrinsic == nir_intrinsic_barrier) {
4110
4111 /* If we find a barrier in nested control flow put this in the
4112 * too hard basket. In GLSL this is not possible but it is in
4113 * SPIR-V.
4114 */
4115 if (is_nested_cf) {
4116 *tessfactors_are_def_in_all_invocs = false;
4117 return;
4118 }
4119
4120 /* The following case must be prevented:
4121 * gl_TessLevelInner = ...;
4122 * barrier();
4123 * if (gl_InvocationID == 1)
4124 * gl_TessLevelInner = ...;
4125 *
4126 * If you consider disjoint code segments separated by barriers, each
4127 * such segment that writes tess factor channels should write the same
4128 * channels in all codepaths within that segment.
4129 */
4130 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4131 /* Accumulate the result: */
4132 *tessfactors_are_def_in_all_invocs &=
4133 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4134
4135 /* Analyze the next code segment from scratch. */
4136 *upper_block_tf_writemask = 0;
4137 *cond_block_tf_writemask = 0;
4138 }
4139 } else
4140 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4141 }
4142
4143 break;
4144 }
4145 case nir_cf_node_if: {
4146 unsigned then_tessfactor_writemask = 0;
4147 unsigned else_tessfactor_writemask = 0;
4148
4149 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4150 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4151 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4152 cond_block_tf_writemask,
4153 tessfactors_are_def_in_all_invocs, true);
4154 }
4155
4156 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4157 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4158 cond_block_tf_writemask,
4159 tessfactors_are_def_in_all_invocs, true);
4160 }
4161
4162 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4163 /* If both statements write the same tess factor channels,
4164 * we can say that the upper block writes them too.
4165 */
4166 *upper_block_tf_writemask |= then_tessfactor_writemask &
4167 else_tessfactor_writemask;
4168 *cond_block_tf_writemask |= then_tessfactor_writemask |
4169 else_tessfactor_writemask;
4170 }
4171
4172 break;
4173 }
4174 case nir_cf_node_loop: {
4175 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4176 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4177 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4178 cond_block_tf_writemask,
4179 tessfactors_are_def_in_all_invocs, true);
4180 }
4181
4182 break;
4183 }
4184 default:
4185 unreachable("unknown cf node type");
4186 }
4187 }
4188
4189 bool
4190 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4191 {
4192 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4193
4194 /* The pass works as follows:
4195 * If all codepaths write tess factors, we can say that all
4196 * invocations define tess factors.
4197 *
4198 * Each tess factor channel is tracked separately.
4199 */
4200 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4201 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4202
4203 /* Initial value = true. Here the pass will accumulate results from
4204 * multiple segments surrounded by barriers. If tess factors aren't
4205 * written at all, it's a shader bug and we don't care if this will be
4206 * true.
4207 */
4208 bool tessfactors_are_def_in_all_invocs = true;
4209
4210 nir_foreach_function(function, nir) {
4211 if (function->impl) {
4212 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4213 scan_tess_ctrl(node, &main_block_tf_writemask,
4214 &cond_block_tf_writemask,
4215 &tessfactors_are_def_in_all_invocs,
4216 false);
4217 }
4218 }
4219 }
4220
4221 /* Accumulate the result for the last code segment separated by a
4222 * barrier.
4223 */
4224 if (main_block_tf_writemask || cond_block_tf_writemask) {
4225 tessfactors_are_def_in_all_invocs &=
4226 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4227 }
4228
4229 return tessfactors_are_def_in_all_invocs;
4230 }