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radv: fix texturesamples to handle single sample case
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_util.h"
26 #include "ac_binary.h"
27 #include "sid.h"
28 #include "nir/nir.h"
29 #include "../vulkan/radv_descriptor_set.h"
30 #include "util/bitscan.h"
31 #include <llvm-c/Transforms/Scalar.h>
32
33 enum radeon_llvm_calling_convention {
34 RADEON_LLVM_AMDGPU_VS = 87,
35 RADEON_LLVM_AMDGPU_GS = 88,
36 RADEON_LLVM_AMDGPU_PS = 89,
37 RADEON_LLVM_AMDGPU_CS = 90,
38 };
39
40 #define CONST_ADDR_SPACE 2
41 #define LOCAL_ADDR_SPACE 3
42
43 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
44 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
45
46 enum desc_type {
47 DESC_IMAGE,
48 DESC_FMASK,
49 DESC_SAMPLER,
50 DESC_BUFFER,
51 };
52
53 struct nir_to_llvm_context {
54 const struct ac_nir_compiler_options *options;
55 struct ac_shader_variant_info *shader_info;
56
57 LLVMContextRef context;
58 LLVMModuleRef module;
59 LLVMBuilderRef builder;
60 LLVMValueRef main_function;
61
62 struct hash_table *defs;
63 struct hash_table *phis;
64
65 LLVMValueRef descriptor_sets[4];
66 LLVMValueRef push_constants;
67 LLVMValueRef num_work_groups;
68 LLVMValueRef workgroup_ids;
69 LLVMValueRef local_invocation_ids;
70 LLVMValueRef tg_size;
71
72 LLVMValueRef vertex_buffers;
73 LLVMValueRef base_vertex;
74 LLVMValueRef start_instance;
75 LLVMValueRef vertex_id;
76 LLVMValueRef rel_auto_id;
77 LLVMValueRef vs_prim_id;
78 LLVMValueRef instance_id;
79
80 LLVMValueRef prim_mask;
81 LLVMValueRef sample_positions;
82 LLVMValueRef persp_sample, persp_center, persp_centroid;
83 LLVMValueRef linear_sample, linear_center, linear_centroid;
84 LLVMValueRef front_face;
85 LLVMValueRef ancillary;
86 LLVMValueRef frag_pos[4];
87
88 LLVMBasicBlockRef continue_block;
89 LLVMBasicBlockRef break_block;
90
91 LLVMTypeRef i1;
92 LLVMTypeRef i8;
93 LLVMTypeRef i16;
94 LLVMTypeRef i32;
95 LLVMTypeRef i64;
96 LLVMTypeRef v2i32;
97 LLVMTypeRef v3i32;
98 LLVMTypeRef v4i32;
99 LLVMTypeRef v8i32;
100 LLVMTypeRef f32;
101 LLVMTypeRef f16;
102 LLVMTypeRef v2f32;
103 LLVMTypeRef v4f32;
104 LLVMTypeRef v16i8;
105 LLVMTypeRef voidt;
106
107 LLVMValueRef i32zero;
108 LLVMValueRef i32one;
109 LLVMValueRef f32zero;
110 LLVMValueRef f32one;
111 LLVMValueRef v4f32empty;
112
113 unsigned range_md_kind;
114 unsigned uniform_md_kind;
115 unsigned fpmath_md_kind;
116 unsigned invariant_load_md_kind;
117 LLVMValueRef empty_md;
118 LLVMValueRef fpmath_md_2p5_ulp;
119 gl_shader_stage stage;
120
121 LLVMValueRef lds;
122 LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
123 LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS * 4];
124
125 LLVMValueRef shared_memory;
126 uint64_t input_mask;
127 uint64_t output_mask;
128 int num_locals;
129 LLVMValueRef *locals;
130 bool has_ddxy;
131 unsigned num_clips;
132 unsigned num_culls;
133 };
134
135 struct ac_tex_info {
136 LLVMValueRef args[12];
137 int arg_count;
138 LLVMTypeRef dst_type;
139 bool has_offset;
140 };
141
142 enum ac_func_attr {
143 AC_FUNC_ATTR_ALWAYSINLINE = (1 << 0),
144 AC_FUNC_ATTR_BYVAL = (1 << 1),
145 AC_FUNC_ATTR_INREG = (1 << 2),
146 AC_FUNC_ATTR_NOALIAS = (1 << 3),
147 AC_FUNC_ATTR_NOUNWIND = (1 << 4),
148 AC_FUNC_ATTR_READNONE = (1 << 5),
149 AC_FUNC_ATTR_READONLY = (1 << 6),
150 AC_FUNC_ATTR_LAST = (1 << 7)
151 };
152
153 #if HAVE_LLVM < 0x0400
154 static LLVMAttribute ac_attr_to_llvm_attr(enum ac_func_attr attr)
155 {
156 switch (attr) {
157 case AC_FUNC_ATTR_ALWAYSINLINE: return LLVMAlwaysInlineAttribute;
158 case AC_FUNC_ATTR_BYVAL: return LLVMByValAttribute;
159 case AC_FUNC_ATTR_INREG: return LLVMInRegAttribute;
160 case AC_FUNC_ATTR_NOALIAS: return LLVMNoAliasAttribute;
161 case AC_FUNC_ATTR_NOUNWIND: return LLVMNoUnwindAttribute;
162 case AC_FUNC_ATTR_READNONE: return LLVMReadNoneAttribute;
163 case AC_FUNC_ATTR_READONLY: return LLVMReadOnlyAttribute;
164 default:
165 fprintf(stderr, "Unhandled function attribute: %x\n", attr);
166 return 0;
167 }
168 }
169
170 #else
171
172 static const char *attr_to_str(enum ac_func_attr attr)
173 {
174 switch (attr) {
175 case AC_FUNC_ATTR_ALWAYSINLINE: return "alwaysinline";
176 case AC_FUNC_ATTR_BYVAL: return "byval";
177 case AC_FUNC_ATTR_INREG: return "inreg";
178 case AC_FUNC_ATTR_NOALIAS: return "noalias";
179 case AC_FUNC_ATTR_NOUNWIND: return "nounwind";
180 case AC_FUNC_ATTR_READNONE: return "readnone";
181 case AC_FUNC_ATTR_READONLY: return "readonly";
182 default:
183 fprintf(stderr, "Unhandled function attribute: %x\n", attr);
184 return 0;
185 }
186 }
187
188 #endif
189
190 static void
191 ac_add_function_attr(LLVMValueRef function,
192 int attr_idx,
193 enum ac_func_attr attr)
194 {
195
196 #if HAVE_LLVM < 0x0400
197 LLVMAttribute llvm_attr = ac_attr_to_llvm_attr(attr);
198 if (attr_idx == -1) {
199 LLVMAddFunctionAttr(function, llvm_attr);
200 } else {
201 LLVMAddAttribute(LLVMGetParam(function, attr_idx - 1), llvm_attr);
202 }
203 #else
204 LLVMContextRef context = LLVMGetModuleContext(LLVMGetGlobalParent(function));
205 const char *attr_name = attr_to_str(attr);
206 unsigned kind_id = LLVMGetEnumAttributeKindForName(attr_name,
207 strlen(attr_name));
208 LLVMAttributeRef llvm_attr = LLVMCreateEnumAttribute(context, kind_id, 0);
209 LLVMAddAttributeAtIndex(function, attr_idx, llvm_attr);
210 #endif
211 }
212
213 static LLVMValueRef
214 emit_llvm_intrinsic(struct nir_to_llvm_context *ctx, const char *name,
215 LLVMTypeRef return_type, LLVMValueRef *params,
216 unsigned param_count, unsigned attr_mask);
217 static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
218 nir_deref_var *deref,
219 enum desc_type desc_type);
220 static unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan)
221 {
222 return (index * 4) + chan;
223 }
224
225 static unsigned llvm_get_type_size(LLVMTypeRef type)
226 {
227 LLVMTypeKind kind = LLVMGetTypeKind(type);
228
229 switch (kind) {
230 case LLVMIntegerTypeKind:
231 return LLVMGetIntTypeWidth(type) / 8;
232 case LLVMFloatTypeKind:
233 return 4;
234 case LLVMPointerTypeKind:
235 return 8;
236 case LLVMVectorTypeKind:
237 return LLVMGetVectorSize(type) *
238 llvm_get_type_size(LLVMGetElementType(type));
239 default:
240 assert(0);
241 return 0;
242 }
243 }
244
245 static void set_llvm_calling_convention(LLVMValueRef func,
246 gl_shader_stage stage)
247 {
248 enum radeon_llvm_calling_convention calling_conv;
249
250 switch (stage) {
251 case MESA_SHADER_VERTEX:
252 case MESA_SHADER_TESS_CTRL:
253 case MESA_SHADER_TESS_EVAL:
254 calling_conv = RADEON_LLVM_AMDGPU_VS;
255 break;
256 case MESA_SHADER_GEOMETRY:
257 calling_conv = RADEON_LLVM_AMDGPU_GS;
258 break;
259 case MESA_SHADER_FRAGMENT:
260 calling_conv = RADEON_LLVM_AMDGPU_PS;
261 break;
262 case MESA_SHADER_COMPUTE:
263 calling_conv = RADEON_LLVM_AMDGPU_CS;
264 break;
265 default:
266 unreachable("Unhandle shader type");
267 }
268
269 LLVMSetFunctionCallConv(func, calling_conv);
270 }
271
272 static LLVMValueRef
273 create_llvm_function(LLVMContextRef ctx, LLVMModuleRef module,
274 LLVMBuilderRef builder, LLVMTypeRef *return_types,
275 unsigned num_return_elems, LLVMTypeRef *param_types,
276 unsigned param_count, unsigned array_params,
277 unsigned sgpr_params, bool unsafe_math)
278 {
279 LLVMTypeRef main_function_type, ret_type;
280 LLVMBasicBlockRef main_function_body;
281
282 if (num_return_elems)
283 ret_type = LLVMStructTypeInContext(ctx, return_types,
284 num_return_elems, true);
285 else
286 ret_type = LLVMVoidTypeInContext(ctx);
287
288 /* Setup the function */
289 main_function_type =
290 LLVMFunctionType(ret_type, param_types, param_count, 0);
291 LLVMValueRef main_function =
292 LLVMAddFunction(module, "main", main_function_type);
293 main_function_body =
294 LLVMAppendBasicBlockInContext(ctx, main_function, "main_body");
295 LLVMPositionBuilderAtEnd(builder, main_function_body);
296
297 LLVMSetFunctionCallConv(main_function, RADEON_LLVM_AMDGPU_CS);
298 for (unsigned i = 0; i < sgpr_params; ++i) {
299 if (i < array_params) {
300 LLVMValueRef P = LLVMGetParam(main_function, i);
301 ac_add_function_attr(main_function, i + 1, AC_FUNC_ATTR_BYVAL);
302 ac_add_attr_dereferenceable(P, UINT64_MAX);
303 }
304 else {
305 ac_add_function_attr(main_function, i + 1, AC_FUNC_ATTR_INREG);
306 }
307 }
308
309 if (unsafe_math) {
310 /* These were copied from some LLVM test. */
311 LLVMAddTargetDependentFunctionAttr(main_function,
312 "less-precise-fpmad",
313 "true");
314 LLVMAddTargetDependentFunctionAttr(main_function,
315 "no-infs-fp-math",
316 "true");
317 LLVMAddTargetDependentFunctionAttr(main_function,
318 "no-nans-fp-math",
319 "true");
320 LLVMAddTargetDependentFunctionAttr(main_function,
321 "unsafe-fp-math",
322 "true");
323 }
324 return main_function;
325 }
326
327 static LLVMTypeRef const_array(LLVMTypeRef elem_type, int num_elements)
328 {
329 return LLVMPointerType(LLVMArrayType(elem_type, num_elements),
330 CONST_ADDR_SPACE);
331 }
332
333 static LLVMValueRef get_shared_memory_ptr(struct nir_to_llvm_context *ctx,
334 int idx,
335 LLVMTypeRef type)
336 {
337 LLVMValueRef offset;
338 LLVMValueRef ptr;
339 int addr_space;
340
341 offset = LLVMConstInt(ctx->i32, idx, false);
342
343 ptr = ctx->shared_memory;
344 ptr = LLVMBuildGEP(ctx->builder, ptr, &offset, 1, "");
345 addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
346 ptr = LLVMBuildBitCast(ctx->builder, ptr, LLVMPointerType(type, addr_space), "");
347 return ptr;
348 }
349
350 static LLVMValueRef to_integer(struct nir_to_llvm_context *ctx, LLVMValueRef v)
351 {
352 LLVMTypeRef type = LLVMTypeOf(v);
353 if (type == ctx->f32) {
354 return LLVMBuildBitCast(ctx->builder, v, ctx->i32, "");
355 } else if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
356 LLVMTypeRef elem_type = LLVMGetElementType(type);
357 if (elem_type == ctx->f32) {
358 LLVMTypeRef nt = LLVMVectorType(ctx->i32, LLVMGetVectorSize(type));
359 return LLVMBuildBitCast(ctx->builder, v, nt, "");
360 }
361 }
362 return v;
363 }
364
365 static LLVMValueRef to_float(struct nir_to_llvm_context *ctx, LLVMValueRef v)
366 {
367 LLVMTypeRef type = LLVMTypeOf(v);
368 if (type == ctx->i32) {
369 return LLVMBuildBitCast(ctx->builder, v, ctx->f32, "");
370 } else if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
371 LLVMTypeRef elem_type = LLVMGetElementType(type);
372 if (elem_type == ctx->i32) {
373 LLVMTypeRef nt = LLVMVectorType(ctx->f32, LLVMGetVectorSize(type));
374 return LLVMBuildBitCast(ctx->builder, v, nt, "");
375 }
376 }
377 return v;
378 }
379
380 static LLVMValueRef build_indexed_load(struct nir_to_llvm_context *ctx,
381 LLVMValueRef base_ptr, LLVMValueRef index,
382 bool uniform)
383 {
384 LLVMValueRef pointer;
385 LLVMValueRef indices[] = {ctx->i32zero, index};
386
387 pointer = LLVMBuildGEP(ctx->builder, base_ptr, indices, 2, "");
388 if (uniform)
389 LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
390 return LLVMBuildLoad(ctx->builder, pointer, "");
391 }
392
393 static LLVMValueRef build_indexed_load_const(struct nir_to_llvm_context *ctx,
394 LLVMValueRef base_ptr, LLVMValueRef index)
395 {
396 LLVMValueRef result = build_indexed_load(ctx, base_ptr, index, true);
397 LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
398 return result;
399 }
400
401 static void create_function(struct nir_to_llvm_context *ctx,
402 struct nir_shader *nir)
403 {
404 LLVMTypeRef arg_types[23];
405 unsigned arg_idx = 0;
406 unsigned array_count = 0;
407 unsigned sgpr_count = 0, user_sgpr_count;
408 unsigned i;
409
410 /* 1 for each descriptor set */
411 for (unsigned i = 0; i < 4; ++i)
412 arg_types[arg_idx++] = const_array(ctx->i8, 1024 * 1024);
413
414 /* 1 for push constants and dynamic descriptors */
415 arg_types[arg_idx++] = const_array(ctx->i8, 1024 * 1024);
416
417 array_count = arg_idx;
418 switch (nir->stage) {
419 case MESA_SHADER_COMPUTE:
420 arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3); /* grid size */
421 user_sgpr_count = arg_idx;
422 arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3);
423 arg_types[arg_idx++] = ctx->i32;
424 sgpr_count = arg_idx;
425
426 arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3);
427 break;
428 case MESA_SHADER_VERTEX:
429 arg_types[arg_idx++] = const_array(ctx->v16i8, 16); /* vertex buffers */
430 arg_types[arg_idx++] = ctx->i32; // base vertex
431 arg_types[arg_idx++] = ctx->i32; // start instance
432 user_sgpr_count = sgpr_count = arg_idx;
433 arg_types[arg_idx++] = ctx->i32; // vertex id
434 arg_types[arg_idx++] = ctx->i32; // rel auto id
435 arg_types[arg_idx++] = ctx->i32; // vs prim id
436 arg_types[arg_idx++] = ctx->i32; // instance id
437 break;
438 case MESA_SHADER_FRAGMENT:
439 arg_types[arg_idx++] = const_array(ctx->f32, 32); /* sample positions */
440 user_sgpr_count = arg_idx;
441 arg_types[arg_idx++] = ctx->i32; /* prim mask */
442 sgpr_count = arg_idx;
443 arg_types[arg_idx++] = ctx->v2i32; /* persp sample */
444 arg_types[arg_idx++] = ctx->v2i32; /* persp center */
445 arg_types[arg_idx++] = ctx->v2i32; /* persp centroid */
446 arg_types[arg_idx++] = ctx->v3i32; /* persp pull model */
447 arg_types[arg_idx++] = ctx->v2i32; /* linear sample */
448 arg_types[arg_idx++] = ctx->v2i32; /* linear center */
449 arg_types[arg_idx++] = ctx->v2i32; /* linear centroid */
450 arg_types[arg_idx++] = ctx->f32; /* line stipple tex */
451 arg_types[arg_idx++] = ctx->f32; /* pos x float */
452 arg_types[arg_idx++] = ctx->f32; /* pos y float */
453 arg_types[arg_idx++] = ctx->f32; /* pos z float */
454 arg_types[arg_idx++] = ctx->f32; /* pos w float */
455 arg_types[arg_idx++] = ctx->i32; /* front face */
456 arg_types[arg_idx++] = ctx->i32; /* ancillary */
457 arg_types[arg_idx++] = ctx->f32; /* sample coverage */
458 arg_types[arg_idx++] = ctx->i32; /* fixed pt */
459 break;
460 default:
461 unreachable("Shader stage not implemented");
462 }
463
464 ctx->main_function = create_llvm_function(
465 ctx->context, ctx->module, ctx->builder, NULL, 0, arg_types,
466 arg_idx, array_count, sgpr_count, ctx->options->unsafe_math);
467 set_llvm_calling_convention(ctx->main_function, nir->stage);
468
469
470 ctx->shader_info->num_input_sgprs = 0;
471 ctx->shader_info->num_input_vgprs = 0;
472
473 for (i = 0; i < user_sgpr_count; i++)
474 ctx->shader_info->num_user_sgprs += llvm_get_type_size(arg_types[i]) / 4;
475
476 ctx->shader_info->num_input_sgprs = ctx->shader_info->num_user_sgprs;
477 for (; i < sgpr_count; i++)
478 ctx->shader_info->num_input_sgprs += llvm_get_type_size(arg_types[i]) / 4;
479
480 if (nir->stage != MESA_SHADER_FRAGMENT)
481 for (; i < arg_idx; ++i)
482 ctx->shader_info->num_input_vgprs += llvm_get_type_size(arg_types[i]) / 4;
483
484 arg_idx = 0;
485 for (unsigned i = 0; i < 4; ++i)
486 ctx->descriptor_sets[i] =
487 LLVMGetParam(ctx->main_function, arg_idx++);
488
489 ctx->push_constants = LLVMGetParam(ctx->main_function, arg_idx++);
490
491 switch (nir->stage) {
492 case MESA_SHADER_COMPUTE:
493 ctx->num_work_groups =
494 LLVMGetParam(ctx->main_function, arg_idx++);
495 ctx->workgroup_ids =
496 LLVMGetParam(ctx->main_function, arg_idx++);
497 ctx->tg_size =
498 LLVMGetParam(ctx->main_function, arg_idx++);
499 ctx->local_invocation_ids =
500 LLVMGetParam(ctx->main_function, arg_idx++);
501 break;
502 case MESA_SHADER_VERTEX:
503 ctx->vertex_buffers = LLVMGetParam(ctx->main_function, arg_idx++);
504 ctx->base_vertex = LLVMGetParam(ctx->main_function, arg_idx++);
505 ctx->start_instance = LLVMGetParam(ctx->main_function, arg_idx++);
506 ctx->vertex_id = LLVMGetParam(ctx->main_function, arg_idx++);
507 ctx->rel_auto_id = LLVMGetParam(ctx->main_function, arg_idx++);
508 ctx->vs_prim_id = LLVMGetParam(ctx->main_function, arg_idx++);
509 ctx->instance_id = LLVMGetParam(ctx->main_function, arg_idx++);
510 break;
511 case MESA_SHADER_FRAGMENT:
512 ctx->sample_positions = LLVMGetParam(ctx->main_function, arg_idx++);
513 ctx->prim_mask = LLVMGetParam(ctx->main_function, arg_idx++);
514 ctx->persp_sample = LLVMGetParam(ctx->main_function, arg_idx++);
515 ctx->persp_center = LLVMGetParam(ctx->main_function, arg_idx++);
516 ctx->persp_centroid = LLVMGetParam(ctx->main_function, arg_idx++);
517 arg_idx++;
518 ctx->linear_sample = LLVMGetParam(ctx->main_function, arg_idx++);
519 ctx->linear_center = LLVMGetParam(ctx->main_function, arg_idx++);
520 ctx->linear_centroid = LLVMGetParam(ctx->main_function, arg_idx++);
521 arg_idx++; /* line stipple */
522 ctx->frag_pos[0] = LLVMGetParam(ctx->main_function, arg_idx++);
523 ctx->frag_pos[1] = LLVMGetParam(ctx->main_function, arg_idx++);
524 ctx->frag_pos[2] = LLVMGetParam(ctx->main_function, arg_idx++);
525 ctx->frag_pos[3] = LLVMGetParam(ctx->main_function, arg_idx++);
526 ctx->front_face = LLVMGetParam(ctx->main_function, arg_idx++);
527 ctx->ancillary = LLVMGetParam(ctx->main_function, arg_idx++);
528 break;
529 default:
530 unreachable("Shader stage not implemented");
531 }
532 }
533
534 static void setup_types(struct nir_to_llvm_context *ctx)
535 {
536 LLVMValueRef args[4];
537
538 ctx->voidt = LLVMVoidTypeInContext(ctx->context);
539 ctx->i1 = LLVMIntTypeInContext(ctx->context, 1);
540 ctx->i8 = LLVMIntTypeInContext(ctx->context, 8);
541 ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
542 ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
543 ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
544 ctx->v2i32 = LLVMVectorType(ctx->i32, 2);
545 ctx->v3i32 = LLVMVectorType(ctx->i32, 3);
546 ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
547 ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
548 ctx->f32 = LLVMFloatTypeInContext(ctx->context);
549 ctx->f16 = LLVMHalfTypeInContext(ctx->context);
550 ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
551 ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
552 ctx->v16i8 = LLVMVectorType(ctx->i8, 16);
553
554 ctx->i32zero = LLVMConstInt(ctx->i32, 0, false);
555 ctx->i32one = LLVMConstInt(ctx->i32, 1, false);
556 ctx->f32zero = LLVMConstReal(ctx->f32, 0.0);
557 ctx->f32one = LLVMConstReal(ctx->f32, 1.0);
558
559 args[0] = ctx->f32zero;
560 args[1] = ctx->f32zero;
561 args[2] = ctx->f32zero;
562 args[3] = ctx->f32one;
563 ctx->v4f32empty = LLVMConstVector(args, 4);
564
565 ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
566 "range", 5);
567 ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context,
568 "invariant.load", 14);
569 ctx->uniform_md_kind =
570 LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14);
571 ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
572
573 ctx->fpmath_md_kind = LLVMGetMDKindIDInContext(ctx->context, "fpmath", 6);
574
575 args[0] = LLVMConstReal(ctx->f32, 2.5);
576 ctx->fpmath_md_2p5_ulp = LLVMMDNodeInContext(ctx->context, args, 1);
577 }
578
579 static int get_llvm_num_components(LLVMValueRef value)
580 {
581 LLVMTypeRef type = LLVMTypeOf(value);
582 unsigned num_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
583 ? LLVMGetVectorSize(type)
584 : 1;
585 return num_components;
586 }
587
588 static LLVMValueRef llvm_extract_elem(struct nir_to_llvm_context *ctx,
589 LLVMValueRef value,
590 int index)
591 {
592 int count = get_llvm_num_components(value);
593
594 assert(index < count);
595 if (count == 1)
596 return value;
597
598 return LLVMBuildExtractElement(ctx->builder, value,
599 LLVMConstInt(ctx->i32, index, false), "");
600 }
601
602 static LLVMValueRef trim_vector(struct nir_to_llvm_context *ctx,
603 LLVMValueRef value, unsigned count)
604 {
605 unsigned num_components = get_llvm_num_components(value);
606 if (count == num_components)
607 return value;
608
609 LLVMValueRef masks[] = {
610 LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false),
611 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false)};
612
613 if (count == 1)
614 return LLVMBuildExtractElement(ctx->builder, value, masks[0],
615 "");
616
617 LLVMValueRef swizzle = LLVMConstVector(masks, count);
618 return LLVMBuildShuffleVector(ctx->builder, value, value, swizzle, "");
619 }
620
621 static LLVMValueRef
622 build_gather_values_extended(struct nir_to_llvm_context *ctx,
623 LLVMValueRef *values,
624 unsigned value_count,
625 unsigned value_stride,
626 bool load)
627 {
628 LLVMBuilderRef builder = ctx->builder;
629 LLVMValueRef vec;
630 unsigned i;
631
632
633 if (value_count == 1) {
634 if (load)
635 return LLVMBuildLoad(builder, values[0], "");
636 return values[0];
637 }
638
639 for (i = 0; i < value_count; i++) {
640 LLVMValueRef value = values[i * value_stride];
641 if (load)
642 value = LLVMBuildLoad(builder, value, "");
643
644 if (!i)
645 vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
646 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
647 vec = LLVMBuildInsertElement(builder, vec, value, index, "");
648 }
649 return vec;
650 }
651
652
653 static void
654 build_store_values_extended(struct nir_to_llvm_context *ctx,
655 LLVMValueRef *values,
656 unsigned value_count,
657 unsigned value_stride,
658 LLVMValueRef vec)
659 {
660 LLVMBuilderRef builder = ctx->builder;
661 unsigned i;
662
663 if (value_count == 1) {
664 LLVMBuildStore(builder, vec, values[0]);
665 return;
666 }
667
668 for (i = 0; i < value_count; i++) {
669 LLVMValueRef ptr = values[i * value_stride];
670 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
671 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
672 LLVMBuildStore(builder, value, ptr);
673 }
674 }
675
676 static LLVMValueRef
677 build_gather_values(struct nir_to_llvm_context *ctx,
678 LLVMValueRef *values,
679 unsigned value_count)
680 {
681 return build_gather_values_extended(ctx, values, value_count, 1, false);
682 }
683
684 static LLVMTypeRef get_def_type(struct nir_to_llvm_context *ctx,
685 nir_ssa_def *def)
686 {
687 LLVMTypeRef type = LLVMIntTypeInContext(ctx->context, def->bit_size);
688 if (def->num_components > 1) {
689 type = LLVMVectorType(type, def->num_components);
690 }
691 return type;
692 }
693
694 static LLVMValueRef get_src(struct nir_to_llvm_context *ctx, nir_src src)
695 {
696 assert(src.is_ssa);
697 struct hash_entry *entry = _mesa_hash_table_search(ctx->defs, src.ssa);
698 return (LLVMValueRef)entry->data;
699 }
700
701
702 static LLVMBasicBlockRef get_block(struct nir_to_llvm_context *ctx,
703 struct nir_block *b)
704 {
705 struct hash_entry *entry = _mesa_hash_table_search(ctx->defs, b);
706 return (LLVMBasicBlockRef)entry->data;
707 }
708
709 static LLVMValueRef get_alu_src(struct nir_to_llvm_context *ctx,
710 nir_alu_src src,
711 unsigned num_components)
712 {
713 LLVMValueRef value = get_src(ctx, src.src);
714 bool need_swizzle = false;
715
716 assert(value);
717 LLVMTypeRef type = LLVMTypeOf(value);
718 unsigned src_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
719 ? LLVMGetVectorSize(type)
720 : 1;
721
722 for (unsigned i = 0; i < num_components; ++i) {
723 assert(src.swizzle[i] < src_components);
724 if (src.swizzle[i] != i)
725 need_swizzle = true;
726 }
727
728 if (need_swizzle || num_components != src_components) {
729 LLVMValueRef masks[] = {
730 LLVMConstInt(ctx->i32, src.swizzle[0], false),
731 LLVMConstInt(ctx->i32, src.swizzle[1], false),
732 LLVMConstInt(ctx->i32, src.swizzle[2], false),
733 LLVMConstInt(ctx->i32, src.swizzle[3], false)};
734
735 if (src_components > 1 && num_components == 1) {
736 value = LLVMBuildExtractElement(ctx->builder, value,
737 masks[0], "");
738 } else if (src_components == 1 && num_components > 1) {
739 LLVMValueRef values[] = {value, value, value, value};
740 value = build_gather_values(ctx, values, num_components);
741 } else {
742 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
743 value = LLVMBuildShuffleVector(ctx->builder, value, value,
744 swizzle, "");
745 }
746 }
747 assert(!src.negate);
748 assert(!src.abs);
749 return value;
750 }
751
752 static LLVMValueRef emit_int_cmp(struct nir_to_llvm_context *ctx,
753 LLVMIntPredicate pred, LLVMValueRef src0,
754 LLVMValueRef src1)
755 {
756 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
757 return LLVMBuildSelect(ctx->builder, result,
758 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
759 LLVMConstInt(ctx->i32, 0, false), "");
760 }
761
762 static LLVMValueRef emit_float_cmp(struct nir_to_llvm_context *ctx,
763 LLVMRealPredicate pred, LLVMValueRef src0,
764 LLVMValueRef src1)
765 {
766 LLVMValueRef result;
767 src0 = to_float(ctx, src0);
768 src1 = to_float(ctx, src1);
769 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
770 return LLVMBuildSelect(ctx->builder, result,
771 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
772 LLVMConstInt(ctx->i32, 0, false), "");
773 }
774
775 static LLVMValueRef emit_intrin_1f_param(struct nir_to_llvm_context *ctx,
776 const char *intrin,
777 LLVMValueRef src0)
778 {
779 LLVMValueRef params[] = {
780 to_float(ctx, src0),
781 };
782 return emit_llvm_intrinsic(ctx, intrin, ctx->f32, params, 1, AC_FUNC_ATTR_READNONE);
783 }
784
785 static LLVMValueRef emit_intrin_2f_param(struct nir_to_llvm_context *ctx,
786 const char *intrin,
787 LLVMValueRef src0, LLVMValueRef src1)
788 {
789 LLVMValueRef params[] = {
790 to_float(ctx, src0),
791 to_float(ctx, src1),
792 };
793 return emit_llvm_intrinsic(ctx, intrin, ctx->f32, params, 2, AC_FUNC_ATTR_READNONE);
794 }
795
796 static LLVMValueRef emit_intrin_3f_param(struct nir_to_llvm_context *ctx,
797 const char *intrin,
798 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
799 {
800 LLVMValueRef params[] = {
801 to_float(ctx, src0),
802 to_float(ctx, src1),
803 to_float(ctx, src2),
804 };
805 return emit_llvm_intrinsic(ctx, intrin, ctx->f32, params, 3, AC_FUNC_ATTR_READNONE);
806 }
807
808 static LLVMValueRef emit_bcsel(struct nir_to_llvm_context *ctx,
809 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
810 {
811 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
812 ctx->i32zero, "");
813 return LLVMBuildSelect(ctx->builder, v, src1, src2, "");
814 }
815
816 static LLVMValueRef emit_find_lsb(struct nir_to_llvm_context *ctx,
817 LLVMValueRef src0)
818 {
819 LLVMValueRef params[2] = {
820 src0,
821
822 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
823 * add special code to check for x=0. The reason is that
824 * the LLVM behavior for x=0 is different from what we
825 * need here.
826 *
827 * The hardware already implements the correct behavior.
828 */
829 LLVMConstInt(ctx->i32, 1, false),
830 };
831 return emit_llvm_intrinsic(ctx, "llvm.cttz.i32", ctx->i32, params, 2, AC_FUNC_ATTR_READNONE);
832 }
833
834 static LLVMValueRef emit_ifind_msb(struct nir_to_llvm_context *ctx,
835 LLVMValueRef src0)
836 {
837 LLVMValueRef msb = emit_llvm_intrinsic(ctx, "llvm.AMDGPU.flbit.i32",
838 ctx->i32, &src0, 1,
839 AC_FUNC_ATTR_READNONE);
840
841 /* The HW returns the last bit index from MSB, but NIR wants
842 * the index from LSB. Invert it by doing "31 - msb". */
843 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
844 msb, "");
845
846 LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
847 LLVMValueRef cond = LLVMBuildOr(ctx->builder,
848 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
849 src0, ctx->i32zero, ""),
850 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
851 src0, all_ones, ""), "");
852
853 return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
854 }
855
856 static LLVMValueRef emit_ufind_msb(struct nir_to_llvm_context *ctx,
857 LLVMValueRef src0)
858 {
859 LLVMValueRef args[2] = {
860 src0,
861 ctx->i32one,
862 };
863 LLVMValueRef msb = emit_llvm_intrinsic(ctx, "llvm.ctlz.i32",
864 ctx->i32, args, ARRAY_SIZE(args),
865 AC_FUNC_ATTR_READNONE);
866
867 /* The HW returns the last bit index from MSB, but NIR wants
868 * the index from LSB. Invert it by doing "31 - msb". */
869 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
870 msb, "");
871
872 return LLVMBuildSelect(ctx->builder,
873 LLVMBuildICmp(ctx->builder, LLVMIntEQ, src0,
874 ctx->i32zero, ""),
875 LLVMConstInt(ctx->i32, -1, true), msb, "");
876 }
877
878 static LLVMValueRef emit_minmax_int(struct nir_to_llvm_context *ctx,
879 LLVMIntPredicate pred,
880 LLVMValueRef src0, LLVMValueRef src1)
881 {
882 return LLVMBuildSelect(ctx->builder,
883 LLVMBuildICmp(ctx->builder, pred, src0, src1, ""),
884 src0,
885 src1, "");
886
887 }
888 static LLVMValueRef emit_iabs(struct nir_to_llvm_context *ctx,
889 LLVMValueRef src0)
890 {
891 return emit_minmax_int(ctx, LLVMIntSGT, src0,
892 LLVMBuildNeg(ctx->builder, src0, ""));
893 }
894
895 static LLVMValueRef emit_fsign(struct nir_to_llvm_context *ctx,
896 LLVMValueRef src0)
897 {
898 LLVMValueRef cmp, val;
899
900 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGT, src0, ctx->f32zero, "");
901 val = LLVMBuildSelect(ctx->builder, cmp, ctx->f32one, src0, "");
902 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGE, val, ctx->f32zero, "");
903 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstReal(ctx->f32, -1.0), "");
904 return val;
905 }
906
907 static LLVMValueRef emit_isign(struct nir_to_llvm_context *ctx,
908 LLVMValueRef src0)
909 {
910 LLVMValueRef cmp, val;
911
912 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, src0, ctx->i32zero, "");
913 val = LLVMBuildSelect(ctx->builder, cmp, ctx->i32one, src0, "");
914 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGE, val, ctx->i32zero, "");
915 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstInt(ctx->i32, -1, true), "");
916 return val;
917 }
918
919 static LLVMValueRef emit_ffract(struct nir_to_llvm_context *ctx,
920 LLVMValueRef src0)
921 {
922 const char *intr = "llvm.floor.f32";
923 LLVMValueRef fsrc0 = to_float(ctx, src0);
924 LLVMValueRef params[] = {
925 fsrc0,
926 };
927 LLVMValueRef floor = emit_llvm_intrinsic(ctx, intr,
928 ctx->f32, params, 1,
929 AC_FUNC_ATTR_READNONE);
930 return LLVMBuildFSub(ctx->builder, fsrc0, floor, "");
931 }
932
933 static LLVMValueRef emit_uint_carry(struct nir_to_llvm_context *ctx,
934 const char *intrin,
935 LLVMValueRef src0, LLVMValueRef src1)
936 {
937 LLVMTypeRef ret_type;
938 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
939 LLVMValueRef res;
940 LLVMValueRef params[] = { src0, src1 };
941 ret_type = LLVMStructTypeInContext(ctx->context, types,
942 2, true);
943
944 res = emit_llvm_intrinsic(ctx, intrin, ret_type,
945 params, 2, AC_FUNC_ATTR_READNONE);
946
947 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
948 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
949 return res;
950 }
951
952 static LLVMValueRef emit_b2f(struct nir_to_llvm_context *ctx,
953 LLVMValueRef src0)
954 {
955 return LLVMBuildAnd(ctx->builder, src0, LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""), "");
956 }
957
958 static LLVMValueRef emit_umul_high(struct nir_to_llvm_context *ctx,
959 LLVMValueRef src0, LLVMValueRef src1)
960 {
961 LLVMValueRef dst64, result;
962 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
963 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
964
965 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
966 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
967 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
968 return result;
969 }
970
971 static LLVMValueRef emit_imul_high(struct nir_to_llvm_context *ctx,
972 LLVMValueRef src0, LLVMValueRef src1)
973 {
974 LLVMValueRef dst64, result;
975 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
976 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
977
978 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
979 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
980 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
981 return result;
982 }
983
984 static LLVMValueRef emit_bitfield_extract(struct nir_to_llvm_context *ctx,
985 const char *intrin,
986 LLVMValueRef srcs[3])
987 {
988 LLVMValueRef result;
989 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
990 result = emit_llvm_intrinsic(ctx, intrin, ctx->i32, srcs, 3, AC_FUNC_ATTR_READNONE);
991
992 result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, "");
993 return result;
994 }
995
996 static LLVMValueRef emit_bitfield_insert(struct nir_to_llvm_context *ctx,
997 LLVMValueRef src0, LLVMValueRef src1,
998 LLVMValueRef src2, LLVMValueRef src3)
999 {
1000 LLVMValueRef bfi_args[3], result;
1001
1002 bfi_args[0] = LLVMBuildShl(ctx->builder,
1003 LLVMBuildSub(ctx->builder,
1004 LLVMBuildShl(ctx->builder,
1005 ctx->i32one,
1006 src3, ""),
1007 ctx->i32one, ""),
1008 src2, "");
1009 bfi_args[1] = LLVMBuildShl(ctx->builder, src1, src2, "");
1010 bfi_args[2] = src0;
1011
1012 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, src3, LLVMConstInt(ctx->i32, 32, false), "");
1013
1014 /* Calculate:
1015 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
1016 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
1017 */
1018 result = LLVMBuildXor(ctx->builder, bfi_args[2],
1019 LLVMBuildAnd(ctx->builder, bfi_args[0],
1020 LLVMBuildXor(ctx->builder, bfi_args[1], bfi_args[2], ""), ""), "");
1021
1022 result = LLVMBuildSelect(ctx->builder, icond, src1, result, "");
1023 return result;
1024 }
1025
1026 static LLVMValueRef emit_pack_half_2x16(struct nir_to_llvm_context *ctx,
1027 LLVMValueRef src0)
1028 {
1029 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
1030 int i;
1031 LLVMValueRef comp[2];
1032
1033 src0 = to_float(ctx, src0);
1034 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32zero, "");
1035 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32one, "");
1036 for (i = 0; i < 2; i++) {
1037 comp[i] = LLVMBuildFPTrunc(ctx->builder, comp[i], ctx->f16, "");
1038 comp[i] = LLVMBuildBitCast(ctx->builder, comp[i], ctx->i16, "");
1039 comp[i] = LLVMBuildZExt(ctx->builder, comp[i], ctx->i32, "");
1040 }
1041
1042 comp[1] = LLVMBuildShl(ctx->builder, comp[1], const16, "");
1043 comp[0] = LLVMBuildOr(ctx->builder, comp[0], comp[1], "");
1044
1045 return comp[0];
1046 }
1047
1048 static LLVMValueRef emit_unpack_half_2x16(struct nir_to_llvm_context *ctx,
1049 LLVMValueRef src0)
1050 {
1051 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
1052 LLVMValueRef temps[2], result, val;
1053 int i;
1054
1055 for (i = 0; i < 2; i++) {
1056 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
1057 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
1058 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
1059 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
1060 }
1061
1062 result = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(ctx->v2f32), temps[0],
1063 ctx->i32zero, "");
1064 result = LLVMBuildInsertElement(ctx->builder, result, temps[1],
1065 ctx->i32one, "");
1066 return result;
1067 }
1068
1069 /**
1070 * Set range metadata on an instruction. This can only be used on load and
1071 * call instructions. If you know an instruction can only produce the values
1072 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
1073 * \p lo is the minimum value inclusive.
1074 * \p hi is the maximum value exclusive.
1075 */
1076 static void set_range_metadata(struct nir_to_llvm_context *ctx,
1077 LLVMValueRef value, unsigned lo, unsigned hi)
1078 {
1079 LLVMValueRef range_md, md_args[2];
1080 LLVMTypeRef type = LLVMTypeOf(value);
1081 LLVMContextRef context = LLVMGetTypeContext(type);
1082
1083 md_args[0] = LLVMConstInt(type, lo, false);
1084 md_args[1] = LLVMConstInt(type, hi, false);
1085 range_md = LLVMMDNodeInContext(context, md_args, 2);
1086 LLVMSetMetadata(value, ctx->range_md_kind, range_md);
1087 }
1088
1089 static LLVMValueRef get_thread_id(struct nir_to_llvm_context *ctx)
1090 {
1091 LLVMValueRef tid;
1092 LLVMValueRef tid_args[2];
1093 tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
1094 tid_args[1] = ctx->i32zero;
1095 tid_args[1] = emit_llvm_intrinsic(ctx,
1096 "llvm.amdgcn.mbcnt.lo", ctx->i32,
1097 tid_args, 2, AC_FUNC_ATTR_READNONE);
1098
1099 tid = emit_llvm_intrinsic(ctx,
1100 "llvm.amdgcn.mbcnt.hi", ctx->i32,
1101 tid_args, 2, AC_FUNC_ATTR_READNONE);
1102 set_range_metadata(ctx, tid, 0, 64);
1103 return tid;
1104 }
1105
1106 /*
1107 * SI implements derivatives using the local data store (LDS)
1108 * All writes to the LDS happen in all executing threads at
1109 * the same time. TID is the Thread ID for the current
1110 * thread and is a value between 0 and 63, representing
1111 * the thread's position in the wavefront.
1112 *
1113 * For the pixel shader threads are grouped into quads of four pixels.
1114 * The TIDs of the pixels of a quad are:
1115 *
1116 * +------+------+
1117 * |4n + 0|4n + 1|
1118 * +------+------+
1119 * |4n + 2|4n + 3|
1120 * +------+------+
1121 *
1122 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
1123 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
1124 * the current pixel's column, and masking with 0xfffffffe yields the TID
1125 * of the left pixel of the current pixel's row.
1126 *
1127 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
1128 * adding 2 yields the TID of the pixel below the top pixel.
1129 */
1130 /* masks for thread ID. */
1131 #define TID_MASK_TOP_LEFT 0xfffffffc
1132 #define TID_MASK_TOP 0xfffffffd
1133 #define TID_MASK_LEFT 0xfffffffe
1134 static LLVMValueRef emit_ddxy(struct nir_to_llvm_context *ctx,
1135 nir_alu_instr *instr,
1136 LLVMValueRef src0)
1137 {
1138 LLVMValueRef indices[2];
1139 LLVMValueRef store_ptr, load_ptr0, load_ptr1;
1140 LLVMValueRef tl, trbl, result;
1141 LLVMValueRef tl_tid, trbl_tid;
1142 LLVMValueRef args[2];
1143 unsigned mask;
1144 int idx;
1145 ctx->has_ddxy = true;
1146 if (!ctx->lds)
1147 ctx->lds = LLVMAddGlobalInAddressSpace(ctx->module,
1148 LLVMArrayType(ctx->i32, 64),
1149 "ddxy_lds", LOCAL_ADDR_SPACE);
1150
1151 indices[0] = ctx->i32zero;
1152 indices[1] = get_thread_id(ctx);
1153 store_ptr = LLVMBuildGEP(ctx->builder, ctx->lds,
1154 indices, 2, "");
1155
1156 if (instr->op == nir_op_fddx_fine || instr->op == nir_op_fddx)
1157 mask = TID_MASK_LEFT;
1158 else if (instr->op == nir_op_fddy_fine || instr->op == nir_op_fddy)
1159 mask = TID_MASK_TOP;
1160 else
1161 mask = TID_MASK_TOP_LEFT;
1162
1163 tl_tid = LLVMBuildAnd(ctx->builder, indices[1],
1164 LLVMConstInt(ctx->i32, mask, false), "");
1165 indices[1] = tl_tid;
1166 load_ptr0 = LLVMBuildGEP(ctx->builder, ctx->lds,
1167 indices, 2, "");
1168
1169 /* for DDX we want to next X pixel, DDY next Y pixel. */
1170 if (instr->op == nir_op_fddx_fine ||
1171 instr->op == nir_op_fddx_coarse ||
1172 instr->op == nir_op_fddx)
1173 idx = 1;
1174 else
1175 idx = 2;
1176
1177 trbl_tid = LLVMBuildAdd(ctx->builder, indices[1],
1178 LLVMConstInt(ctx->i32, idx, false), "");
1179 indices[1] = trbl_tid;
1180 load_ptr1 = LLVMBuildGEP(ctx->builder, ctx->lds,
1181 indices, 2, "");
1182
1183 if (ctx->options->family >= CHIP_TONGA) {
1184 args[0] = LLVMBuildMul(ctx->builder, tl_tid,
1185 LLVMConstInt(ctx->i32, 4, false), "");
1186 args[1] = src0;
1187 tl = emit_llvm_intrinsic(ctx, "llvm.amdgcn.ds.bpermute",
1188 ctx->i32, args, 2,
1189 AC_FUNC_ATTR_READNONE);
1190
1191 args[0] = LLVMBuildMul(ctx->builder, trbl_tid,
1192 LLVMConstInt(ctx->i32, 4, false), "");
1193 trbl = emit_llvm_intrinsic(ctx, "llvm.amdgcn.ds.bpermute",
1194 ctx->i32, args, 2,
1195 AC_FUNC_ATTR_READNONE);
1196 } else {
1197 LLVMBuildStore(ctx->builder, src0, store_ptr);
1198
1199 tl = LLVMBuildLoad(ctx->builder, load_ptr0, "");
1200 trbl = LLVMBuildLoad(ctx->builder, load_ptr1, "");
1201 }
1202 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
1203 trbl = LLVMBuildBitCast(ctx->builder, trbl, ctx->f32, "");
1204 result = LLVMBuildFSub(ctx->builder, trbl, tl, "");
1205 return result;
1206 }
1207
1208 /*
1209 * this takes an I,J coordinate pair,
1210 * and works out the X and Y derivatives.
1211 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
1212 */
1213 static LLVMValueRef emit_ddxy_interp(
1214 struct nir_to_llvm_context *ctx,
1215 LLVMValueRef interp_ij)
1216 {
1217 LLVMValueRef indices[2];
1218 LLVMValueRef store_ptr, load_ptr_x, load_ptr_y, load_ptr_ddx, load_ptr_ddy, temp, temp2;
1219 LLVMValueRef tl, tr, bl, result[4];
1220 unsigned c;
1221
1222 if (!ctx->lds)
1223 ctx->lds = LLVMAddGlobalInAddressSpace(ctx->module,
1224 LLVMArrayType(ctx->i32, 64),
1225 "ddxy_lds", LOCAL_ADDR_SPACE);
1226
1227 indices[0] = ctx->i32zero;
1228 indices[1] = get_thread_id(ctx);
1229 store_ptr = LLVMBuildGEP(ctx->builder, ctx->lds,
1230 indices, 2, "");
1231
1232 temp = LLVMBuildAnd(ctx->builder, indices[1],
1233 LLVMConstInt(ctx->i32, TID_MASK_LEFT, false), "");
1234
1235 temp2 = LLVMBuildAnd(ctx->builder, indices[1],
1236 LLVMConstInt(ctx->i32, TID_MASK_TOP, false), "");
1237
1238 indices[1] = temp;
1239 load_ptr_x = LLVMBuildGEP(ctx->builder, ctx->lds,
1240 indices, 2, "");
1241
1242 indices[1] = temp2;
1243 load_ptr_y = LLVMBuildGEP(ctx->builder, ctx->lds,
1244 indices, 2, "");
1245
1246 indices[1] = LLVMBuildAdd(ctx->builder, temp,
1247 LLVMConstInt(ctx->i32, 1, false), "");
1248 load_ptr_ddx = LLVMBuildGEP(ctx->builder, ctx->lds,
1249 indices, 2, "");
1250
1251 indices[1] = LLVMBuildAdd(ctx->builder, temp2,
1252 LLVMConstInt(ctx->i32, 2, false), "");
1253 load_ptr_ddy = LLVMBuildGEP(ctx->builder, ctx->lds,
1254 indices, 2, "");
1255
1256 for (c = 0; c < 2; ++c) {
1257 LLVMValueRef store_val;
1258 LLVMValueRef c_ll = LLVMConstInt(ctx->i32, c, false);
1259
1260 store_val = LLVMBuildExtractElement(ctx->builder,
1261 interp_ij, c_ll, "");
1262 LLVMBuildStore(ctx->builder,
1263 store_val,
1264 store_ptr);
1265
1266 tl = LLVMBuildLoad(ctx->builder, load_ptr_x, "");
1267 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
1268
1269 tr = LLVMBuildLoad(ctx->builder, load_ptr_ddx, "");
1270 tr = LLVMBuildBitCast(ctx->builder, tr, ctx->f32, "");
1271
1272 result[c] = LLVMBuildFSub(ctx->builder, tr, tl, "");
1273
1274 tl = LLVMBuildLoad(ctx->builder, load_ptr_y, "");
1275 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
1276
1277 bl = LLVMBuildLoad(ctx->builder, load_ptr_ddy, "");
1278 bl = LLVMBuildBitCast(ctx->builder, bl, ctx->f32, "");
1279
1280 result[c + 2] = LLVMBuildFSub(ctx->builder, bl, tl, "");
1281 }
1282
1283 return build_gather_values(ctx, result, 4);
1284 }
1285
1286 static LLVMValueRef emit_fdiv(struct nir_to_llvm_context *ctx,
1287 LLVMValueRef num,
1288 LLVMValueRef den)
1289 {
1290 LLVMValueRef ret = LLVMBuildFDiv(ctx->builder, num, den, "");
1291
1292 if (!LLVMIsConstant(ret))
1293 LLVMSetMetadata(ret, ctx->fpmath_md_kind, ctx->fpmath_md_2p5_ulp);
1294 return ret;
1295 }
1296
1297 static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
1298 {
1299 LLVMValueRef src[4], result = NULL;
1300 unsigned num_components = instr->dest.dest.ssa.num_components;
1301 unsigned src_components;
1302
1303 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
1304 switch (instr->op) {
1305 case nir_op_vec2:
1306 case nir_op_vec3:
1307 case nir_op_vec4:
1308 src_components = 1;
1309 break;
1310 case nir_op_pack_half_2x16:
1311 src_components = 2;
1312 break;
1313 case nir_op_unpack_half_2x16:
1314 src_components = 1;
1315 break;
1316 default:
1317 src_components = num_components;
1318 break;
1319 }
1320 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1321 src[i] = get_alu_src(ctx, instr->src[i], src_components);
1322
1323 switch (instr->op) {
1324 case nir_op_fmov:
1325 case nir_op_imov:
1326 result = src[0];
1327 break;
1328 case nir_op_fneg:
1329 src[0] = to_float(ctx, src[0]);
1330 result = LLVMBuildFNeg(ctx->builder, src[0], "");
1331 break;
1332 case nir_op_ineg:
1333 result = LLVMBuildNeg(ctx->builder, src[0], "");
1334 break;
1335 case nir_op_inot:
1336 result = LLVMBuildNot(ctx->builder, src[0], "");
1337 break;
1338 case nir_op_iadd:
1339 result = LLVMBuildAdd(ctx->builder, src[0], src[1], "");
1340 break;
1341 case nir_op_fadd:
1342 src[0] = to_float(ctx, src[0]);
1343 src[1] = to_float(ctx, src[1]);
1344 result = LLVMBuildFAdd(ctx->builder, src[0], src[1], "");
1345 break;
1346 case nir_op_fsub:
1347 src[0] = to_float(ctx, src[0]);
1348 src[1] = to_float(ctx, src[1]);
1349 result = LLVMBuildFSub(ctx->builder, src[0], src[1], "");
1350 break;
1351 case nir_op_isub:
1352 result = LLVMBuildSub(ctx->builder, src[0], src[1], "");
1353 break;
1354 case nir_op_imul:
1355 result = LLVMBuildMul(ctx->builder, src[0], src[1], "");
1356 break;
1357 case nir_op_imod:
1358 result = LLVMBuildSRem(ctx->builder, src[0], src[1], "");
1359 break;
1360 case nir_op_umod:
1361 result = LLVMBuildURem(ctx->builder, src[0], src[1], "");
1362 break;
1363 case nir_op_fmod:
1364 src[0] = to_float(ctx, src[0]);
1365 src[1] = to_float(ctx, src[1]);
1366 result = emit_fdiv(ctx, src[0], src[1]);
1367 result = emit_intrin_1f_param(ctx, "llvm.floor.f32", result);
1368 result = LLVMBuildFMul(ctx->builder, src[1] , result, "");
1369 result = LLVMBuildFSub(ctx->builder, src[0], result, "");
1370 break;
1371 case nir_op_frem:
1372 src[0] = to_float(ctx, src[0]);
1373 src[1] = to_float(ctx, src[1]);
1374 result = LLVMBuildFRem(ctx->builder, src[0], src[1], "");
1375 break;
1376 case nir_op_idiv:
1377 result = LLVMBuildSDiv(ctx->builder, src[0], src[1], "");
1378 break;
1379 case nir_op_udiv:
1380 result = LLVMBuildUDiv(ctx->builder, src[0], src[1], "");
1381 break;
1382 case nir_op_fmul:
1383 src[0] = to_float(ctx, src[0]);
1384 src[1] = to_float(ctx, src[1]);
1385 result = LLVMBuildFMul(ctx->builder, src[0], src[1], "");
1386 break;
1387 case nir_op_fdiv:
1388 src[0] = to_float(ctx, src[0]);
1389 src[1] = to_float(ctx, src[1]);
1390 result = emit_fdiv(ctx, src[0], src[1]);
1391 break;
1392 case nir_op_frcp:
1393 src[0] = to_float(ctx, src[0]);
1394 result = emit_fdiv(ctx, ctx->f32one, src[0]);
1395 break;
1396 case nir_op_iand:
1397 result = LLVMBuildAnd(ctx->builder, src[0], src[1], "");
1398 break;
1399 case nir_op_ior:
1400 result = LLVMBuildOr(ctx->builder, src[0], src[1], "");
1401 break;
1402 case nir_op_ixor:
1403 result = LLVMBuildXor(ctx->builder, src[0], src[1], "");
1404 break;
1405 case nir_op_ishl:
1406 result = LLVMBuildShl(ctx->builder, src[0], src[1], "");
1407 break;
1408 case nir_op_ishr:
1409 result = LLVMBuildAShr(ctx->builder, src[0], src[1], "");
1410 break;
1411 case nir_op_ushr:
1412 result = LLVMBuildLShr(ctx->builder, src[0], src[1], "");
1413 break;
1414 case nir_op_ilt:
1415 result = emit_int_cmp(ctx, LLVMIntSLT, src[0], src[1]);
1416 break;
1417 case nir_op_ine:
1418 result = emit_int_cmp(ctx, LLVMIntNE, src[0], src[1]);
1419 break;
1420 case nir_op_ieq:
1421 result = emit_int_cmp(ctx, LLVMIntEQ, src[0], src[1]);
1422 break;
1423 case nir_op_ige:
1424 result = emit_int_cmp(ctx, LLVMIntSGE, src[0], src[1]);
1425 break;
1426 case nir_op_ult:
1427 result = emit_int_cmp(ctx, LLVMIntULT, src[0], src[1]);
1428 break;
1429 case nir_op_uge:
1430 result = emit_int_cmp(ctx, LLVMIntUGE, src[0], src[1]);
1431 break;
1432 case nir_op_feq:
1433 result = emit_float_cmp(ctx, LLVMRealUEQ, src[0], src[1]);
1434 break;
1435 case nir_op_fne:
1436 result = emit_float_cmp(ctx, LLVMRealUNE, src[0], src[1]);
1437 break;
1438 case nir_op_flt:
1439 result = emit_float_cmp(ctx, LLVMRealULT, src[0], src[1]);
1440 break;
1441 case nir_op_fge:
1442 result = emit_float_cmp(ctx, LLVMRealUGE, src[0], src[1]);
1443 break;
1444 case nir_op_fabs:
1445 result = emit_intrin_1f_param(ctx, "llvm.fabs.f32", src[0]);
1446 break;
1447 case nir_op_iabs:
1448 result = emit_iabs(ctx, src[0]);
1449 break;
1450 case nir_op_imax:
1451 result = emit_minmax_int(ctx, LLVMIntSGT, src[0], src[1]);
1452 break;
1453 case nir_op_imin:
1454 result = emit_minmax_int(ctx, LLVMIntSLT, src[0], src[1]);
1455 break;
1456 case nir_op_umax:
1457 result = emit_minmax_int(ctx, LLVMIntUGT, src[0], src[1]);
1458 break;
1459 case nir_op_umin:
1460 result = emit_minmax_int(ctx, LLVMIntULT, src[0], src[1]);
1461 break;
1462 case nir_op_isign:
1463 result = emit_isign(ctx, src[0]);
1464 break;
1465 case nir_op_fsign:
1466 src[0] = to_float(ctx, src[0]);
1467 result = emit_fsign(ctx, src[0]);
1468 break;
1469 case nir_op_ffloor:
1470 result = emit_intrin_1f_param(ctx, "llvm.floor.f32", src[0]);
1471 break;
1472 case nir_op_ftrunc:
1473 result = emit_intrin_1f_param(ctx, "llvm.trunc.f32", src[0]);
1474 break;
1475 case nir_op_fceil:
1476 result = emit_intrin_1f_param(ctx, "llvm.ceil.f32", src[0]);
1477 break;
1478 case nir_op_fround_even:
1479 result = emit_intrin_1f_param(ctx, "llvm.rint.f32", src[0]);
1480 break;
1481 case nir_op_ffract:
1482 result = emit_ffract(ctx, src[0]);
1483 break;
1484 case nir_op_fsin:
1485 result = emit_intrin_1f_param(ctx, "llvm.sin.f32", src[0]);
1486 break;
1487 case nir_op_fcos:
1488 result = emit_intrin_1f_param(ctx, "llvm.cos.f32", src[0]);
1489 break;
1490 case nir_op_fsqrt:
1491 result = emit_intrin_1f_param(ctx, "llvm.sqrt.f32", src[0]);
1492 break;
1493 case nir_op_fexp2:
1494 result = emit_intrin_1f_param(ctx, "llvm.exp2.f32", src[0]);
1495 break;
1496 case nir_op_flog2:
1497 result = emit_intrin_1f_param(ctx, "llvm.log2.f32", src[0]);
1498 break;
1499 case nir_op_frsq:
1500 result = emit_intrin_1f_param(ctx, "llvm.sqrt.f32", src[0]);
1501 result = emit_fdiv(ctx, ctx->f32one, result);
1502 break;
1503 case nir_op_fpow:
1504 result = emit_intrin_2f_param(ctx, "llvm.pow.f32", src[0], src[1]);
1505 break;
1506 case nir_op_fmax:
1507 result = emit_intrin_2f_param(ctx, "llvm.maxnum.f32", src[0], src[1]);
1508 break;
1509 case nir_op_fmin:
1510 result = emit_intrin_2f_param(ctx, "llvm.minnum.f32", src[0], src[1]);
1511 break;
1512 case nir_op_ffma:
1513 result = emit_intrin_3f_param(ctx, "llvm.fma.f32", src[0], src[1], src[2]);
1514 break;
1515 case nir_op_ibitfield_extract:
1516 result = emit_bitfield_extract(ctx, "llvm.AMDGPU.bfe.i32", src);
1517 break;
1518 case nir_op_ubitfield_extract:
1519 result = emit_bitfield_extract(ctx, "llvm.AMDGPU.bfe.u32", src);
1520 break;
1521 case nir_op_bitfield_insert:
1522 result = emit_bitfield_insert(ctx, src[0], src[1], src[2], src[3]);
1523 break;
1524 case nir_op_bitfield_reverse:
1525 result = emit_llvm_intrinsic(ctx, "llvm.bitreverse.i32", ctx->i32, src, 1, AC_FUNC_ATTR_READNONE);
1526 break;
1527 case nir_op_bit_count:
1528 result = emit_llvm_intrinsic(ctx, "llvm.ctpop.i32", ctx->i32, src, 1, AC_FUNC_ATTR_READNONE);
1529 break;
1530 case nir_op_vec2:
1531 case nir_op_vec3:
1532 case nir_op_vec4:
1533 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1534 src[i] = to_integer(ctx, src[i]);
1535 result = build_gather_values(ctx, src, num_components);
1536 break;
1537 case nir_op_f2i:
1538 src[0] = to_float(ctx, src[0]);
1539 result = LLVMBuildFPToSI(ctx->builder, src[0], ctx->i32, "");
1540 break;
1541 case nir_op_f2u:
1542 src[0] = to_float(ctx, src[0]);
1543 result = LLVMBuildFPToUI(ctx->builder, src[0], ctx->i32, "");
1544 break;
1545 case nir_op_i2f:
1546 result = LLVMBuildSIToFP(ctx->builder, src[0], ctx->f32, "");
1547 break;
1548 case nir_op_u2f:
1549 result = LLVMBuildUIToFP(ctx->builder, src[0], ctx->f32, "");
1550 break;
1551 case nir_op_bcsel:
1552 result = emit_bcsel(ctx, src[0], src[1], src[2]);
1553 break;
1554 case nir_op_find_lsb:
1555 result = emit_find_lsb(ctx, src[0]);
1556 break;
1557 case nir_op_ufind_msb:
1558 result = emit_ufind_msb(ctx, src[0]);
1559 break;
1560 case nir_op_ifind_msb:
1561 result = emit_ifind_msb(ctx, src[0]);
1562 break;
1563 case nir_op_uadd_carry:
1564 result = emit_uint_carry(ctx, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1565 break;
1566 case nir_op_usub_borrow:
1567 result = emit_uint_carry(ctx, "llvm.usub.with.overflow.i32", src[0], src[1]);
1568 break;
1569 case nir_op_b2f:
1570 result = emit_b2f(ctx, src[0]);
1571 break;
1572 case nir_op_fquantize2f16:
1573 src[0] = to_float(ctx, src[0]);
1574 result = LLVMBuildFPTrunc(ctx->builder, src[0], ctx->f16, "");
1575 /* need to convert back up to f32 */
1576 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
1577 break;
1578 case nir_op_umul_high:
1579 result = emit_umul_high(ctx, src[0], src[1]);
1580 break;
1581 case nir_op_imul_high:
1582 result = emit_imul_high(ctx, src[0], src[1]);
1583 break;
1584 case nir_op_pack_half_2x16:
1585 result = emit_pack_half_2x16(ctx, src[0]);
1586 break;
1587 case nir_op_unpack_half_2x16:
1588 result = emit_unpack_half_2x16(ctx, src[0]);
1589 break;
1590 case nir_op_fddx:
1591 case nir_op_fddy:
1592 case nir_op_fddx_fine:
1593 case nir_op_fddy_fine:
1594 case nir_op_fddx_coarse:
1595 case nir_op_fddy_coarse:
1596 result = emit_ddxy(ctx, instr, src[0]);
1597 break;
1598 default:
1599 fprintf(stderr, "Unknown NIR alu instr: ");
1600 nir_print_instr(&instr->instr, stderr);
1601 fprintf(stderr, "\n");
1602 abort();
1603 }
1604
1605 if (result) {
1606 assert(instr->dest.dest.is_ssa);
1607 result = to_integer(ctx, result);
1608 _mesa_hash_table_insert(ctx->defs, &instr->dest.dest.ssa,
1609 result);
1610 }
1611 }
1612
1613 static void visit_load_const(struct nir_to_llvm_context *ctx,
1614 nir_load_const_instr *instr)
1615 {
1616 LLVMValueRef values[4], value = NULL;
1617 LLVMTypeRef element_type =
1618 LLVMIntTypeInContext(ctx->context, instr->def.bit_size);
1619
1620 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1621 switch (instr->def.bit_size) {
1622 case 32:
1623 values[i] = LLVMConstInt(element_type,
1624 instr->value.u32[i], false);
1625 break;
1626 case 64:
1627 values[i] = LLVMConstInt(element_type,
1628 instr->value.u64[i], false);
1629 break;
1630 default:
1631 fprintf(stderr,
1632 "unsupported nir load_const bit_size: %d\n",
1633 instr->def.bit_size);
1634 abort();
1635 }
1636 }
1637 if (instr->def.num_components > 1) {
1638 value = LLVMConstVector(values, instr->def.num_components);
1639 } else
1640 value = values[0];
1641
1642 _mesa_hash_table_insert(ctx->defs, &instr->def, value);
1643 }
1644
1645 static LLVMValueRef cast_ptr(struct nir_to_llvm_context *ctx, LLVMValueRef ptr,
1646 LLVMTypeRef type)
1647 {
1648 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
1649 return LLVMBuildBitCast(ctx->builder, ptr,
1650 LLVMPointerType(type, addr_space), "");
1651 }
1652
1653 static LLVMValueRef
1654 emit_llvm_intrinsic(struct nir_to_llvm_context *ctx, const char *name,
1655 LLVMTypeRef return_type, LLVMValueRef *params,
1656 unsigned param_count, unsigned attrib_mask)
1657 {
1658 LLVMValueRef function;
1659
1660 function = LLVMGetNamedFunction(ctx->module, name);
1661 if (!function) {
1662 LLVMTypeRef param_types[32], function_type;
1663 unsigned i;
1664
1665 assert(param_count <= 32);
1666
1667 for (i = 0; i < param_count; ++i) {
1668 assert(params[i]);
1669 param_types[i] = LLVMTypeOf(params[i]);
1670 }
1671 function_type =
1672 LLVMFunctionType(return_type, param_types, param_count, 0);
1673 function = LLVMAddFunction(ctx->module, name, function_type);
1674
1675 LLVMSetFunctionCallConv(function, LLVMCCallConv);
1676 LLVMSetLinkage(function, LLVMExternalLinkage);
1677
1678 ac_add_function_attr(function, 0, attrib_mask | AC_FUNC_ATTR_NOUNWIND);
1679 }
1680 return LLVMBuildCall(ctx->builder, function, params, param_count, "");
1681 }
1682
1683 static LLVMValueRef
1684 get_buffer_size(struct nir_to_llvm_context *ctx, LLVMValueRef descriptor, bool in_elements)
1685 {
1686 LLVMValueRef size =
1687 LLVMBuildExtractElement(ctx->builder, descriptor,
1688 LLVMConstInt(ctx->i32, 2, false), "");
1689
1690 /* VI only */
1691 if (ctx->options->chip_class >= VI && in_elements) {
1692 /* On VI, the descriptor contains the size in bytes,
1693 * but TXQ must return the size in elements.
1694 * The stride is always non-zero for resources using TXQ.
1695 */
1696 LLVMValueRef stride =
1697 LLVMBuildExtractElement(ctx->builder, descriptor,
1698 LLVMConstInt(ctx->i32, 1, false), "");
1699 stride = LLVMBuildLShr(ctx->builder, stride,
1700 LLVMConstInt(ctx->i32, 16, false), "");
1701 stride = LLVMBuildAnd(ctx->builder, stride,
1702 LLVMConstInt(ctx->i32, 0x3fff, false), "");
1703
1704 size = LLVMBuildUDiv(ctx->builder, size, stride, "");
1705 }
1706 return size;
1707 }
1708
1709 /**
1710 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
1711 * intrinsic names).
1712 */
1713 static void build_int_type_name(
1714 LLVMTypeRef type,
1715 char *buf, unsigned bufsize)
1716 {
1717 assert(bufsize >= 6);
1718
1719 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
1720 snprintf(buf, bufsize, "v%ui32",
1721 LLVMGetVectorSize(type));
1722 else
1723 strcpy(buf, "i32");
1724 }
1725
1726 static LLVMValueRef radv_lower_gather4_integer(struct nir_to_llvm_context *ctx,
1727 struct ac_tex_info *tinfo,
1728 nir_tex_instr *instr,
1729 const char *intr_name,
1730 unsigned coord_vgpr_index)
1731 {
1732 LLVMValueRef coord = tinfo->args[0];
1733 LLVMValueRef half_texel[2];
1734 int c;
1735
1736 //TODO Rect
1737 {
1738 LLVMValueRef txq_args[10];
1739 int txq_arg_count = 0;
1740 LLVMValueRef size;
1741 bool da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE;
1742 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, false);
1743 txq_args[txq_arg_count++] = tinfo->args[1];
1744 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0xf, 0); /* dmask */
1745 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* unorm */
1746 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
1747 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, da ? 1 : 0, 0);
1748 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
1749 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
1750 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
1751 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
1752 size = emit_llvm_intrinsic(ctx, "llvm.SI.getresinfo.i32", ctx->v4i32,
1753 txq_args, txq_arg_count,
1754 AC_FUNC_ATTR_READNONE);
1755
1756 for (c = 0; c < 2; c++) {
1757 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1758 ctx->i32zero, "");
1759 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1760 half_texel[c] = emit_fdiv(ctx, ctx->f32one, half_texel[c]);
1761 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1762 LLVMConstReal(ctx->f32, -0.5), "");
1763 }
1764 }
1765
1766 for (c = 0; c < 2; c++) {
1767 LLVMValueRef tmp;
1768 LLVMValueRef index = LLVMConstInt(ctx->i32, coord_vgpr_index + c, 0);
1769 tmp = LLVMBuildExtractElement(ctx->builder, coord, index, "");
1770 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1771 tmp = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1772 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1773 coord = LLVMBuildInsertElement(ctx->builder, coord, tmp, index, "");
1774 }
1775
1776 tinfo->args[0] = coord;
1777 return emit_llvm_intrinsic(ctx, intr_name, tinfo->dst_type, tinfo->args, tinfo->arg_count,
1778 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND);
1779
1780 }
1781
1782 static LLVMValueRef build_tex_intrinsic(struct nir_to_llvm_context *ctx,
1783 nir_tex_instr *instr,
1784 struct ac_tex_info *tinfo)
1785 {
1786 const char *name = "llvm.SI.image.sample";
1787 const char *infix = "";
1788 char intr_name[127];
1789 char type[64];
1790 bool is_shadow = instr->is_shadow;
1791 bool has_offset = tinfo->has_offset;
1792 switch (instr->op) {
1793 case nir_texop_txf:
1794 case nir_texop_txf_ms:
1795 case nir_texop_samples_identical:
1796 name = instr->sampler_dim == GLSL_SAMPLER_DIM_MS ? "llvm.SI.image.load" :
1797 instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? "llvm.SI.vs.load.input" :
1798 "llvm.SI.image.load.mip";
1799 is_shadow = false;
1800 has_offset = false;
1801 break;
1802 case nir_texop_txb:
1803 infix = ".b";
1804 break;
1805 case nir_texop_txl:
1806 infix = ".l";
1807 break;
1808 case nir_texop_txs:
1809 name = "llvm.SI.getresinfo";
1810 break;
1811 case nir_texop_query_levels:
1812 name = "llvm.SI.getresinfo";
1813 break;
1814 case nir_texop_tex:
1815 if (ctx->stage != MESA_SHADER_FRAGMENT)
1816 infix = ".lz";
1817 break;
1818 case nir_texop_txd:
1819 infix = ".d";
1820 break;
1821 case nir_texop_tg4:
1822 name = "llvm.SI.gather4";
1823 infix = ".lz";
1824 break;
1825 case nir_texop_lod:
1826 name = "llvm.SI.getlod";
1827 is_shadow = false;
1828 has_offset = false;
1829 break;
1830 default:
1831 break;
1832 }
1833
1834 build_int_type_name(LLVMTypeOf(tinfo->args[0]), type, sizeof(type));
1835 sprintf(intr_name, "%s%s%s%s.%s", name, is_shadow ? ".c" : "", infix,
1836 has_offset ? ".o" : "", type);
1837
1838 if (instr->op == nir_texop_tg4) {
1839 enum glsl_base_type stype = glsl_get_sampler_result_type(instr->texture->var->type);
1840 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1841 return radv_lower_gather4_integer(ctx, tinfo, instr, intr_name,
1842 (int)has_offset + (int)is_shadow);
1843 }
1844 }
1845 return emit_llvm_intrinsic(ctx, intr_name, tinfo->dst_type, tinfo->args, tinfo->arg_count,
1846 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND);
1847
1848 }
1849
1850 static LLVMValueRef visit_vulkan_resource_index(struct nir_to_llvm_context *ctx,
1851 nir_intrinsic_instr *instr)
1852 {
1853 LLVMValueRef index = get_src(ctx, instr->src[0]);
1854 unsigned desc_set = nir_intrinsic_desc_set(instr);
1855 unsigned binding = nir_intrinsic_binding(instr);
1856 LLVMValueRef desc_ptr = ctx->descriptor_sets[desc_set];
1857 struct radv_descriptor_set_layout *layout = ctx->options->layout->set[desc_set].layout;
1858 unsigned base_offset = layout->binding[binding].offset;
1859 LLVMValueRef offset, stride;
1860
1861 if (layout->binding[binding].type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC ||
1862 layout->binding[binding].type == VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC) {
1863 desc_ptr = ctx->push_constants;
1864 base_offset = ctx->options->layout->push_constant_size;
1865 base_offset += 16 * layout->binding[binding].dynamic_offset_offset;
1866 stride = LLVMConstInt(ctx->i32, 16, false);
1867 } else
1868 stride = LLVMConstInt(ctx->i32, layout->binding[binding].size, false);
1869
1870 offset = LLVMConstInt(ctx->i32, base_offset, false);
1871 index = LLVMBuildMul(ctx->builder, index, stride, "");
1872 offset = LLVMBuildAdd(ctx->builder, offset, index, "");
1873
1874 LLVMValueRef indices[] = {ctx->i32zero, offset};
1875 desc_ptr = LLVMBuildGEP(ctx->builder, desc_ptr, indices, 2, "");
1876 desc_ptr = cast_ptr(ctx, desc_ptr, ctx->v4i32);
1877 LLVMSetMetadata(desc_ptr, ctx->uniform_md_kind, ctx->empty_md);
1878
1879 return LLVMBuildLoad(ctx->builder, desc_ptr, "");
1880 }
1881
1882 static LLVMValueRef visit_load_push_constant(struct nir_to_llvm_context *ctx,
1883 nir_intrinsic_instr *instr)
1884 {
1885 LLVMValueRef ptr;
1886
1887 LLVMValueRef indices[] = {ctx->i32zero, get_src(ctx, instr->src[0])};
1888 ptr = LLVMBuildGEP(ctx->builder, ctx->push_constants, indices, 2, "");
1889 ptr = cast_ptr(ctx, ptr, get_def_type(ctx, &instr->dest.ssa));
1890
1891 return LLVMBuildLoad(ctx->builder, ptr, "");
1892 }
1893
1894 static LLVMValueRef visit_get_buffer_size(struct nir_to_llvm_context *ctx,
1895 nir_intrinsic_instr *instr)
1896 {
1897 LLVMValueRef desc = get_src(ctx, instr->src[0]);
1898
1899 return get_buffer_size(ctx, desc, false);
1900 }
1901 static void visit_store_ssbo(struct nir_to_llvm_context *ctx,
1902 nir_intrinsic_instr *instr)
1903 {
1904 const char *store_name;
1905 LLVMTypeRef data_type = ctx->f32;
1906 unsigned writemask = nir_intrinsic_write_mask(instr);
1907 LLVMValueRef base_data, base_offset;
1908 LLVMValueRef params[6];
1909
1910 if (ctx->stage == MESA_SHADER_FRAGMENT)
1911 ctx->shader_info->fs.writes_memory = true;
1912
1913 params[1] = get_src(ctx, instr->src[1]);
1914 params[2] = LLVMConstInt(ctx->i32, 0, false); /* vindex */
1915 params[4] = LLVMConstInt(ctx->i1, 0, false); /* glc */
1916 params[5] = LLVMConstInt(ctx->i1, 0, false); /* slc */
1917
1918 if (instr->num_components > 1)
1919 data_type = LLVMVectorType(ctx->f32, instr->num_components);
1920
1921 base_data = to_float(ctx, get_src(ctx, instr->src[0]));
1922 base_data = trim_vector(ctx, base_data, instr->num_components);
1923 base_data = LLVMBuildBitCast(ctx->builder, base_data,
1924 data_type, "");
1925 base_offset = get_src(ctx, instr->src[2]); /* voffset */
1926 while (writemask) {
1927 int start, count;
1928 LLVMValueRef data;
1929 LLVMValueRef offset;
1930 LLVMValueRef tmp;
1931 u_bit_scan_consecutive_range(&writemask, &start, &count);
1932
1933 /* Due to an LLVM limitation, split 3-element writes
1934 * into a 2-element and a 1-element write. */
1935 if (count == 3) {
1936 writemask |= 1 << (start + 2);
1937 count = 2;
1938 }
1939
1940 if (count == 4) {
1941 store_name = "llvm.amdgcn.buffer.store.v4f32";
1942 data = base_data;
1943 } else if (count == 2) {
1944 tmp = LLVMBuildExtractElement(ctx->builder,
1945 base_data, LLVMConstInt(ctx->i32, start, false), "");
1946 data = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(ctx->v2f32), tmp,
1947 ctx->i32zero, "");
1948
1949 tmp = LLVMBuildExtractElement(ctx->builder,
1950 base_data, LLVMConstInt(ctx->i32, start + 1, false), "");
1951 data = LLVMBuildInsertElement(ctx->builder, data, tmp,
1952 ctx->i32one, "");
1953 store_name = "llvm.amdgcn.buffer.store.v2f32";
1954
1955 } else {
1956 assert(count == 1);
1957 if (get_llvm_num_components(base_data) > 1)
1958 data = LLVMBuildExtractElement(ctx->builder, base_data,
1959 LLVMConstInt(ctx->i32, start, false), "");
1960 else
1961 data = base_data;
1962 store_name = "llvm.amdgcn.buffer.store.f32";
1963 }
1964
1965 offset = base_offset;
1966 if (start != 0) {
1967 offset = LLVMBuildAdd(ctx->builder, offset, LLVMConstInt(ctx->i32, start * 4, false), "");
1968 }
1969 params[0] = data;
1970 params[3] = offset;
1971 emit_llvm_intrinsic(ctx, store_name,
1972 LLVMVoidTypeInContext(ctx->context), params, 6, 0);
1973 }
1974 }
1975
1976 static LLVMValueRef visit_atomic_ssbo(struct nir_to_llvm_context *ctx,
1977 nir_intrinsic_instr *instr)
1978 {
1979 const char *name;
1980 LLVMValueRef params[5];
1981 int arg_count = 0;
1982 if (ctx->stage == MESA_SHADER_FRAGMENT)
1983 ctx->shader_info->fs.writes_memory = true;
1984
1985 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1986 params[arg_count++] = get_src(ctx, instr->src[3]);
1987 }
1988 params[arg_count++] = get_src(ctx, instr->src[2]);
1989 params[arg_count++] = get_src(ctx, instr->src[0]);
1990 params[arg_count++] = LLVMConstInt(ctx->i32, 0, false); /* vindex */
1991 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1992 params[arg_count++] = LLVMConstInt(ctx->i1, 0, false); /* slc */
1993
1994 switch (instr->intrinsic) {
1995 case nir_intrinsic_ssbo_atomic_add:
1996 name = "llvm.amdgcn.buffer.atomic.add";
1997 break;
1998 case nir_intrinsic_ssbo_atomic_imin:
1999 name = "llvm.amdgcn.buffer.atomic.smin";
2000 break;
2001 case nir_intrinsic_ssbo_atomic_umin:
2002 name = "llvm.amdgcn.buffer.atomic.umin";
2003 break;
2004 case nir_intrinsic_ssbo_atomic_imax:
2005 name = "llvm.amdgcn.buffer.atomic.smax";
2006 break;
2007 case nir_intrinsic_ssbo_atomic_umax:
2008 name = "llvm.amdgcn.buffer.atomic.umax";
2009 break;
2010 case nir_intrinsic_ssbo_atomic_and:
2011 name = "llvm.amdgcn.buffer.atomic.and";
2012 break;
2013 case nir_intrinsic_ssbo_atomic_or:
2014 name = "llvm.amdgcn.buffer.atomic.or";
2015 break;
2016 case nir_intrinsic_ssbo_atomic_xor:
2017 name = "llvm.amdgcn.buffer.atomic.xor";
2018 break;
2019 case nir_intrinsic_ssbo_atomic_exchange:
2020 name = "llvm.amdgcn.buffer.atomic.swap";
2021 break;
2022 case nir_intrinsic_ssbo_atomic_comp_swap:
2023 name = "llvm.amdgcn.buffer.atomic.cmpswap";
2024 break;
2025 default:
2026 abort();
2027 }
2028
2029 return emit_llvm_intrinsic(ctx, name, ctx->i32, params, arg_count, 0);
2030 }
2031
2032 static LLVMValueRef visit_load_buffer(struct nir_to_llvm_context *ctx,
2033 nir_intrinsic_instr *instr)
2034 {
2035 const char *load_name;
2036 LLVMTypeRef data_type = ctx->f32;
2037 if (instr->num_components == 3)
2038 data_type = LLVMVectorType(ctx->f32, 4);
2039 else if (instr->num_components > 1)
2040 data_type = LLVMVectorType(ctx->f32, instr->num_components);
2041
2042 if (instr->num_components == 4 || instr->num_components == 3)
2043 load_name = "llvm.amdgcn.buffer.load.v4f32";
2044 else if (instr->num_components == 2)
2045 load_name = "llvm.amdgcn.buffer.load.v2f32";
2046 else if (instr->num_components == 1)
2047 load_name = "llvm.amdgcn.buffer.load.f32";
2048 else
2049 abort();
2050
2051 LLVMValueRef params[] = {
2052 get_src(ctx, instr->src[0]),
2053 LLVMConstInt(ctx->i32, 0, false),
2054 get_src(ctx, instr->src[1]),
2055 LLVMConstInt(ctx->i1, 0, false),
2056 LLVMConstInt(ctx->i1, 0, false),
2057 };
2058
2059 LLVMValueRef ret =
2060 emit_llvm_intrinsic(ctx, load_name, data_type, params, 5, 0);
2061
2062 if (instr->num_components == 3)
2063 ret = trim_vector(ctx, ret, 3);
2064
2065 return LLVMBuildBitCast(ctx->builder, ret,
2066 get_def_type(ctx, &instr->dest.ssa), "");
2067 }
2068
2069 static void
2070 radv_get_deref_offset(struct nir_to_llvm_context *ctx, nir_deref *tail,
2071 bool vs_in, unsigned *const_out, LLVMValueRef *indir_out)
2072 {
2073 unsigned const_offset = 0;
2074 LLVMValueRef offset = NULL;
2075
2076
2077 while (tail->child != NULL) {
2078 const struct glsl_type *parent_type = tail->type;
2079 tail = tail->child;
2080
2081 if (tail->deref_type == nir_deref_type_array) {
2082 nir_deref_array *deref_array = nir_deref_as_array(tail);
2083 LLVMValueRef index, stride, local_offset;
2084 unsigned size = glsl_count_attribute_slots(tail->type, vs_in);
2085
2086 const_offset += size * deref_array->base_offset;
2087 if (deref_array->deref_array_type == nir_deref_array_type_direct)
2088 continue;
2089
2090 assert(deref_array->deref_array_type == nir_deref_array_type_indirect);
2091 index = get_src(ctx, deref_array->indirect);
2092 stride = LLVMConstInt(ctx->i32, size, 0);
2093 local_offset = LLVMBuildMul(ctx->builder, stride, index, "");
2094
2095 if (offset)
2096 offset = LLVMBuildAdd(ctx->builder, offset, local_offset, "");
2097 else
2098 offset = local_offset;
2099 } else if (tail->deref_type == nir_deref_type_struct) {
2100 nir_deref_struct *deref_struct = nir_deref_as_struct(tail);
2101
2102 for (unsigned i = 0; i < deref_struct->index; i++) {
2103 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2104 const_offset += glsl_count_attribute_slots(ft, vs_in);
2105 }
2106 } else
2107 unreachable("unsupported deref type");
2108
2109 }
2110
2111 if (const_offset && offset)
2112 offset = LLVMBuildAdd(ctx->builder, offset,
2113 LLVMConstInt(ctx->i32, const_offset, 0),
2114 "");
2115
2116 *const_out = const_offset;
2117 *indir_out = offset;
2118 }
2119
2120 static LLVMValueRef visit_load_var(struct nir_to_llvm_context *ctx,
2121 nir_intrinsic_instr *instr)
2122 {
2123 LLVMValueRef values[4];
2124 int idx = instr->variables[0]->var->data.driver_location;
2125 int ve = instr->dest.ssa.num_components;
2126 LLVMValueRef indir_index;
2127 unsigned const_index;
2128 switch (instr->variables[0]->var->data.mode) {
2129 case nir_var_shader_in:
2130 radv_get_deref_offset(ctx, &instr->variables[0]->deref,
2131 ctx->stage == MESA_SHADER_VERTEX,
2132 &const_index, &indir_index);
2133 for (unsigned chan = 0; chan < ve; chan++) {
2134 if (indir_index) {
2135 unsigned count = glsl_count_attribute_slots(
2136 instr->variables[0]->var->type,
2137 ctx->stage == MESA_SHADER_VERTEX);
2138 LLVMValueRef tmp_vec = build_gather_values_extended(
2139 ctx, ctx->inputs + idx + chan, count,
2140 4, false);
2141
2142 values[chan] = LLVMBuildExtractElement(ctx->builder,
2143 tmp_vec,
2144 indir_index, "");
2145 } else
2146 values[chan] = ctx->inputs[idx + chan + const_index * 4];
2147 }
2148 return to_integer(ctx, build_gather_values(ctx, values, ve));
2149 break;
2150 case nir_var_local:
2151 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2152 &const_index, &indir_index);
2153 for (unsigned chan = 0; chan < ve; chan++) {
2154 if (indir_index) {
2155 unsigned count = glsl_count_attribute_slots(
2156 instr->variables[0]->var->type, false);
2157 LLVMValueRef tmp_vec = build_gather_values_extended(
2158 ctx, ctx->locals + idx + chan, count,
2159 4, true);
2160
2161 values[chan] = LLVMBuildExtractElement(ctx->builder,
2162 tmp_vec,
2163 indir_index, "");
2164 } else {
2165 values[chan] = LLVMBuildLoad(ctx->builder, ctx->locals[idx + chan + const_index * 4], "");
2166 }
2167 }
2168 return to_integer(ctx, build_gather_values(ctx, values, ve));
2169 case nir_var_shader_out:
2170 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2171 &const_index, &indir_index);
2172 for (unsigned chan = 0; chan < ve; chan++) {
2173 if (indir_index) {
2174 unsigned count = glsl_count_attribute_slots(
2175 instr->variables[0]->var->type, false);
2176 LLVMValueRef tmp_vec = build_gather_values_extended(
2177 ctx, ctx->outputs + idx + chan, count,
2178 4, true);
2179
2180 values[chan] = LLVMBuildExtractElement(ctx->builder,
2181 tmp_vec,
2182 indir_index, "");
2183 } else {
2184 values[chan] = LLVMBuildLoad(ctx->builder,
2185 ctx->outputs[idx + chan + const_index * 4],
2186 "");
2187 }
2188 }
2189 return to_integer(ctx, build_gather_values(ctx, values, ve));
2190 case nir_var_shared: {
2191 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2192 &const_index, &indir_index);
2193 LLVMValueRef ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
2194 LLVMValueRef derived_ptr;
2195 LLVMValueRef index = ctx->i32zero;
2196 if (indir_index)
2197 index = LLVMBuildAdd(ctx->builder, index, indir_index, "");
2198 derived_ptr = LLVMBuildGEP(ctx->builder, ptr, &index, 1, "");
2199
2200 return to_integer(ctx, LLVMBuildLoad(ctx->builder, derived_ptr, ""));
2201 break;
2202 }
2203 default:
2204 break;
2205 }
2206 return NULL;
2207 }
2208
2209 static void
2210 visit_store_var(struct nir_to_llvm_context *ctx,
2211 nir_intrinsic_instr *instr)
2212 {
2213 LLVMValueRef temp_ptr, value;
2214 int idx = instr->variables[0]->var->data.driver_location;
2215 LLVMValueRef src = to_float(ctx, get_src(ctx, instr->src[0]));
2216 int writemask = instr->const_index[0];
2217 LLVMValueRef indir_index;
2218 unsigned const_index;
2219 switch (instr->variables[0]->var->data.mode) {
2220 case nir_var_shader_out:
2221 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2222 &const_index, &indir_index);
2223 for (unsigned chan = 0; chan < 4; chan++) {
2224 int stride = 4;
2225 if (!(writemask & (1 << chan)))
2226 continue;
2227 if (get_llvm_num_components(src) == 1)
2228 value = src;
2229 else
2230 value = LLVMBuildExtractElement(ctx->builder, src,
2231 LLVMConstInt(ctx->i32,
2232 chan, false),
2233 "");
2234
2235 if (instr->variables[0]->var->data.location == VARYING_SLOT_CLIP_DIST0 ||
2236 instr->variables[0]->var->data.location == VARYING_SLOT_CULL_DIST0)
2237 stride = 1;
2238 if (indir_index) {
2239 unsigned count = glsl_count_attribute_slots(
2240 instr->variables[0]->var->type, false);
2241 LLVMValueRef tmp_vec = build_gather_values_extended(
2242 ctx, ctx->outputs + idx + chan, count,
2243 stride, true);
2244
2245 if (get_llvm_num_components(tmp_vec) > 1) {
2246 tmp_vec = LLVMBuildInsertElement(ctx->builder, tmp_vec,
2247 value, indir_index, "");
2248 } else
2249 tmp_vec = value;
2250 build_store_values_extended(ctx, ctx->outputs + idx + chan,
2251 count, stride, tmp_vec);
2252
2253 } else {
2254 temp_ptr = ctx->outputs[idx + chan + const_index * stride];
2255
2256 LLVMBuildStore(ctx->builder, value, temp_ptr);
2257 }
2258 }
2259 break;
2260 case nir_var_local:
2261 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2262 &const_index, &indir_index);
2263 for (unsigned chan = 0; chan < 4; chan++) {
2264 if (!(writemask & (1 << chan)))
2265 continue;
2266
2267 if (get_llvm_num_components(src) == 1)
2268 value = src;
2269 else
2270 value = LLVMBuildExtractElement(ctx->builder, src,
2271 LLVMConstInt(ctx->i32, chan, false), "");
2272 if (indir_index) {
2273 unsigned count = glsl_count_attribute_slots(
2274 instr->variables[0]->var->type, false);
2275 LLVMValueRef tmp_vec = build_gather_values_extended(
2276 ctx, ctx->locals + idx + chan, count,
2277 4, true);
2278
2279 tmp_vec = LLVMBuildInsertElement(ctx->builder, tmp_vec,
2280 value, indir_index, "");
2281 build_store_values_extended(ctx, ctx->locals + idx + chan,
2282 count, 4, tmp_vec);
2283 } else {
2284 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2285
2286 LLVMBuildStore(ctx->builder, value, temp_ptr);
2287 }
2288 }
2289 break;
2290 case nir_var_shared: {
2291 LLVMValueRef ptr;
2292 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2293 &const_index, &indir_index);
2294
2295 ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
2296 LLVMValueRef index = ctx->i32zero;
2297 LLVMValueRef derived_ptr;
2298
2299 if (indir_index)
2300 index = LLVMBuildAdd(ctx->builder, index, indir_index, "");
2301 derived_ptr = LLVMBuildGEP(ctx->builder, ptr, &index, 1, "");
2302 LLVMBuildStore(ctx->builder,
2303 to_integer(ctx, src), derived_ptr);
2304 break;
2305 }
2306 default:
2307 break;
2308 }
2309 }
2310
2311 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2312 {
2313 switch (dim) {
2314 case GLSL_SAMPLER_DIM_BUF:
2315 return 1;
2316 case GLSL_SAMPLER_DIM_1D:
2317 return array ? 2 : 1;
2318 case GLSL_SAMPLER_DIM_2D:
2319 return array ? 3 : 2;
2320 case GLSL_SAMPLER_DIM_3D:
2321 case GLSL_SAMPLER_DIM_CUBE:
2322 return 3;
2323 case GLSL_SAMPLER_DIM_RECT:
2324 case GLSL_SAMPLER_DIM_SUBPASS:
2325 return 2;
2326 default:
2327 break;
2328 }
2329 return 0;
2330 }
2331
2332 static LLVMValueRef get_image_coords(struct nir_to_llvm_context *ctx,
2333 nir_intrinsic_instr *instr, bool add_frag_pos)
2334 {
2335 const struct glsl_type *type = instr->variables[0]->var->type;
2336 if(instr->variables[0]->deref.child)
2337 type = instr->variables[0]->deref.child->type;
2338
2339 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
2340 LLVMValueRef coords[4];
2341 LLVMValueRef masks[] = {
2342 LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false),
2343 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false),
2344 };
2345 LLVMValueRef res;
2346 int count;
2347 count = image_type_to_components_count(glsl_get_sampler_dim(type),
2348 glsl_sampler_type_is_array(type));
2349
2350 if (count == 1) {
2351 if (instr->src[0].ssa->num_components)
2352 res = LLVMBuildExtractElement(ctx->builder, src0, masks[0], "");
2353 else
2354 res = src0;
2355 } else {
2356 int chan;
2357 for (chan = 0; chan < count; ++chan) {
2358 coords[chan] = LLVMBuildExtractElement(ctx->builder, src0, masks[chan], "");
2359 }
2360
2361 if (add_frag_pos) {
2362 for (chan = 0; chan < count; ++chan)
2363 coords[chan] = LLVMBuildAdd(ctx->builder, coords[chan], LLVMBuildFPToUI(ctx->builder, ctx->frag_pos[chan], ctx->i32, ""), "");
2364 }
2365 if (count == 3) {
2366 coords[3] = LLVMGetUndef(ctx->i32);
2367 count = 4;
2368 }
2369 res = build_gather_values(ctx, coords, count);
2370 }
2371 return res;
2372 }
2373
2374 static void build_type_name_for_intr(
2375 LLVMTypeRef type,
2376 char *buf, unsigned bufsize)
2377 {
2378 LLVMTypeRef elem_type = type;
2379
2380 assert(bufsize >= 8);
2381
2382 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
2383 int ret = snprintf(buf, bufsize, "v%u",
2384 LLVMGetVectorSize(type));
2385 if (ret < 0) {
2386 char *type_name = LLVMPrintTypeToString(type);
2387 fprintf(stderr, "Error building type name for: %s\n",
2388 type_name);
2389 return;
2390 }
2391 elem_type = LLVMGetElementType(type);
2392 buf += ret;
2393 bufsize -= ret;
2394 }
2395 switch (LLVMGetTypeKind(elem_type)) {
2396 default: break;
2397 case LLVMIntegerTypeKind:
2398 snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type));
2399 break;
2400 case LLVMFloatTypeKind:
2401 snprintf(buf, bufsize, "f32");
2402 break;
2403 case LLVMDoubleTypeKind:
2404 snprintf(buf, bufsize, "f64");
2405 break;
2406 }
2407 }
2408
2409 static void get_image_intr_name(const char *base_name,
2410 LLVMTypeRef data_type,
2411 LLVMTypeRef coords_type,
2412 LLVMTypeRef rsrc_type,
2413 char *out_name, unsigned out_len)
2414 {
2415 char coords_type_name[8];
2416
2417 build_type_name_for_intr(coords_type, coords_type_name,
2418 sizeof(coords_type_name));
2419
2420 if (HAVE_LLVM <= 0x0309) {
2421 snprintf(out_name, out_len, "%s.%s", base_name, coords_type_name);
2422 } else {
2423 char data_type_name[8];
2424 char rsrc_type_name[8];
2425
2426 build_type_name_for_intr(data_type, data_type_name,
2427 sizeof(data_type_name));
2428 build_type_name_for_intr(rsrc_type, rsrc_type_name,
2429 sizeof(rsrc_type_name));
2430 snprintf(out_name, out_len, "%s.%s.%s.%s", base_name,
2431 data_type_name, coords_type_name, rsrc_type_name);
2432 }
2433 }
2434
2435 static LLVMValueRef visit_image_load(struct nir_to_llvm_context *ctx,
2436 nir_intrinsic_instr *instr)
2437 {
2438 LLVMValueRef params[7];
2439 LLVMValueRef res;
2440 char intrinsic_name[64];
2441 const nir_variable *var = instr->variables[0]->var;
2442 const struct glsl_type *type = var->type;
2443 if(instr->variables[0]->deref.child)
2444 type = instr->variables[0]->deref.child->type;
2445
2446 type = glsl_without_array(type);
2447 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2448 params[0] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
2449 params[1] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
2450 LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
2451 params[2] = LLVMConstInt(ctx->i32, 0, false); /* voffset */
2452 params[3] = LLVMConstInt(ctx->i1, 0, false); /* glc */
2453 params[4] = LLVMConstInt(ctx->i1, 0, false); /* slc */
2454 res = emit_llvm_intrinsic(ctx, "llvm.amdgcn.buffer.load.format.v4f32", ctx->v4f32,
2455 params, 5, 0);
2456
2457 res = trim_vector(ctx, res, instr->dest.ssa.num_components);
2458 res = to_integer(ctx, res);
2459 } else {
2460 bool is_da = glsl_sampler_type_is_array(type) ||
2461 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
2462 bool add_frag_pos = glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_SUBPASS;
2463 LLVMValueRef da = is_da ? ctx->i32one : ctx->i32zero;
2464 LLVMValueRef glc = LLVMConstInt(ctx->i1, 0, false);
2465 LLVMValueRef slc = LLVMConstInt(ctx->i1, 0, false);
2466
2467 params[0] = get_image_coords(ctx, instr, add_frag_pos);
2468 params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2469 params[2] = LLVMConstInt(ctx->i32, 15, false); /* dmask */
2470 if (HAVE_LLVM <= 0x0309) {
2471 params[3] = LLVMConstInt(ctx->i1, 0, false); /* r128 */
2472 params[4] = da;
2473 params[5] = glc;
2474 params[6] = slc;
2475 } else {
2476 LLVMValueRef lwe = LLVMConstInt(ctx->i1, 0, false);
2477 params[3] = glc;
2478 params[4] = slc;
2479 params[5] = lwe;
2480 params[6] = da;
2481 }
2482
2483 get_image_intr_name("llvm.amdgcn.image.load",
2484 ctx->v4f32, /* vdata */
2485 LLVMTypeOf(params[0]), /* coords */
2486 LLVMTypeOf(params[1]), /* rsrc */
2487 intrinsic_name, sizeof(intrinsic_name));
2488
2489 res = emit_llvm_intrinsic(ctx, intrinsic_name, ctx->v4f32,
2490 params, 7, AC_FUNC_ATTR_READONLY);
2491 }
2492 return to_integer(ctx, res);
2493 }
2494
2495 static void visit_image_store(struct nir_to_llvm_context *ctx,
2496 nir_intrinsic_instr *instr)
2497 {
2498 LLVMValueRef params[8];
2499 char intrinsic_name[64];
2500 const nir_variable *var = instr->variables[0]->var;
2501 LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0);
2502 LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0);
2503 const struct glsl_type *type = glsl_without_array(var->type);
2504
2505 if (ctx->stage == MESA_SHADER_FRAGMENT)
2506 ctx->shader_info->fs.writes_memory = true;
2507
2508 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2509 params[0] = to_float(ctx, get_src(ctx, instr->src[2])); /* data */
2510 params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
2511 params[2] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
2512 LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
2513 params[3] = LLVMConstInt(ctx->i32, 0, false); /* voffset */
2514 params[4] = i1false; /* glc */
2515 params[5] = i1false; /* slc */
2516 emit_llvm_intrinsic(ctx, "llvm.amdgcn.buffer.store.format.v4f32", ctx->voidt,
2517 params, 6, 0);
2518 } else {
2519 bool is_da = glsl_sampler_type_is_array(type) ||
2520 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
2521 LLVMValueRef da = is_da ? i1true : i1false;
2522 LLVMValueRef glc = i1false;
2523 LLVMValueRef slc = i1false;
2524
2525 params[0] = to_float(ctx, get_src(ctx, instr->src[2]));
2526 params[1] = get_image_coords(ctx, instr, false); /* coords */
2527 params[2] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2528 params[3] = LLVMConstInt(ctx->i32, 15, false); /* dmask */
2529 if (HAVE_LLVM <= 0x0309) {
2530 params[4] = i1false; /* r128 */
2531 params[5] = da;
2532 params[6] = glc;
2533 params[7] = slc;
2534 } else {
2535 LLVMValueRef lwe = i1false;
2536 params[4] = glc;
2537 params[5] = slc;
2538 params[6] = lwe;
2539 params[7] = da;
2540 }
2541
2542 get_image_intr_name("llvm.amdgcn.image.store",
2543 LLVMTypeOf(params[0]), /* vdata */
2544 LLVMTypeOf(params[1]), /* coords */
2545 LLVMTypeOf(params[2]), /* rsrc */
2546 intrinsic_name, sizeof(intrinsic_name));
2547
2548 emit_llvm_intrinsic(ctx, intrinsic_name, ctx->voidt,
2549 params, 8, 0);
2550 }
2551
2552 }
2553
2554 static LLVMValueRef visit_image_atomic(struct nir_to_llvm_context *ctx,
2555 nir_intrinsic_instr *instr)
2556 {
2557 LLVMValueRef params[6];
2558 int param_count = 0;
2559 const nir_variable *var = instr->variables[0]->var;
2560 LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0);
2561 LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0);
2562 const char *base_name = "llvm.amdgcn.image.atomic";
2563 const char *atomic_name;
2564 LLVMValueRef coords;
2565 char intrinsic_name[32], coords_type[8];
2566 const struct glsl_type *type = glsl_without_array(var->type);
2567
2568 if (ctx->stage == MESA_SHADER_FRAGMENT)
2569 ctx->shader_info->fs.writes_memory = true;
2570
2571 params[param_count++] = get_src(ctx, instr->src[2]);
2572 if (instr->intrinsic == nir_intrinsic_image_atomic_comp_swap)
2573 params[param_count++] = get_src(ctx, instr->src[3]);
2574
2575 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2576 params[param_count++] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
2577 coords = params[param_count++] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
2578 LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
2579 params[param_count++] = ctx->i32zero; /* voffset */
2580 params[param_count++] = i1false; /* glc */
2581 params[param_count++] = i1false; /* slc */
2582 } else {
2583 bool da = glsl_sampler_type_is_array(type) ||
2584 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
2585
2586 coords = params[param_count++] = get_image_coords(ctx, instr, false);
2587 params[param_count++] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2588 params[param_count++] = i1false; /* r128 */
2589 params[param_count++] = da ? i1true : i1false; /* da */
2590 params[param_count++] = i1false; /* slc */
2591 }
2592
2593 switch (instr->intrinsic) {
2594 case nir_intrinsic_image_atomic_add:
2595 atomic_name = "add";
2596 break;
2597 case nir_intrinsic_image_atomic_min:
2598 atomic_name = "smin";
2599 break;
2600 case nir_intrinsic_image_atomic_max:
2601 atomic_name = "smax";
2602 break;
2603 case nir_intrinsic_image_atomic_and:
2604 atomic_name = "and";
2605 break;
2606 case nir_intrinsic_image_atomic_or:
2607 atomic_name = "or";
2608 break;
2609 case nir_intrinsic_image_atomic_xor:
2610 atomic_name = "xor";
2611 break;
2612 case nir_intrinsic_image_atomic_exchange:
2613 atomic_name = "swap";
2614 break;
2615 case nir_intrinsic_image_atomic_comp_swap:
2616 atomic_name = "cmpswap";
2617 break;
2618 default:
2619 abort();
2620 }
2621 build_int_type_name(LLVMTypeOf(coords),
2622 coords_type, sizeof(coords_type));
2623
2624 snprintf(intrinsic_name, sizeof(intrinsic_name),
2625 "%s.%s.%s", base_name, atomic_name, coords_type);
2626 return emit_llvm_intrinsic(ctx, intrinsic_name, ctx->i32, params, param_count, 0);
2627 }
2628
2629 static LLVMValueRef visit_image_size(struct nir_to_llvm_context *ctx,
2630 nir_intrinsic_instr *instr)
2631 {
2632 LLVMValueRef res;
2633 LLVMValueRef params[10];
2634 const nir_variable *var = instr->variables[0]->var;
2635 const struct glsl_type *type = instr->variables[0]->var->type;
2636 bool da = glsl_sampler_type_is_array(var->type) ||
2637 glsl_get_sampler_dim(var->type) == GLSL_SAMPLER_DIM_CUBE;
2638 if(instr->variables[0]->deref.child)
2639 type = instr->variables[0]->deref.child->type;
2640
2641 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF)
2642 return get_buffer_size(ctx, get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER), true);
2643 params[0] = ctx->i32zero;
2644 params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2645 params[2] = LLVMConstInt(ctx->i32, 15, false);
2646 params[3] = ctx->i32zero;
2647 params[4] = ctx->i32zero;
2648 params[5] = da ? ctx->i32one : ctx->i32zero;
2649 params[6] = ctx->i32zero;
2650 params[7] = ctx->i32zero;
2651 params[8] = ctx->i32zero;
2652 params[9] = ctx->i32zero;
2653
2654 res = emit_llvm_intrinsic(ctx, "llvm.SI.getresinfo.i32", ctx->v4i32,
2655 params, 10, AC_FUNC_ATTR_READNONE);
2656
2657 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE &&
2658 glsl_sampler_type_is_array(type)) {
2659 LLVMValueRef two = LLVMConstInt(ctx->i32, 2, false);
2660 LLVMValueRef six = LLVMConstInt(ctx->i32, 6, false);
2661 LLVMValueRef z = LLVMBuildExtractElement(ctx->builder, res, two, "");
2662 z = LLVMBuildSDiv(ctx->builder, z, six, "");
2663 res = LLVMBuildInsertElement(ctx->builder, res, z, two, "");
2664 }
2665 return res;
2666 }
2667
2668 static void emit_waitcnt(struct nir_to_llvm_context *ctx)
2669 {
2670 LLVMValueRef args[1] = {
2671 LLVMConstInt(ctx->i32, 0xf70, false),
2672 };
2673 emit_llvm_intrinsic(ctx, "llvm.amdgcn.s.waitcnt",
2674 ctx->voidt, args, 1, 0);
2675 }
2676
2677 static void emit_barrier(struct nir_to_llvm_context *ctx)
2678 {
2679 // TODO tess
2680 emit_llvm_intrinsic(ctx, "llvm.amdgcn.s.barrier",
2681 ctx->voidt, NULL, 0, 0);
2682 }
2683
2684 static void emit_discard_if(struct nir_to_llvm_context *ctx,
2685 nir_intrinsic_instr *instr)
2686 {
2687 LLVMValueRef cond;
2688 ctx->shader_info->fs.can_discard = true;
2689
2690 cond = LLVMBuildICmp(ctx->builder, LLVMIntNE,
2691 get_src(ctx, instr->src[0]),
2692 ctx->i32zero, "");
2693
2694 cond = LLVMBuildSelect(ctx->builder, cond,
2695 LLVMConstReal(ctx->f32, -1.0f),
2696 ctx->f32zero, "");
2697 emit_llvm_intrinsic(ctx, "llvm.AMDGPU.kill",
2698 LLVMVoidTypeInContext(ctx->context),
2699 &cond, 1, 0);
2700 }
2701
2702 static LLVMValueRef
2703 visit_load_local_invocation_index(struct nir_to_llvm_context *ctx)
2704 {
2705 LLVMValueRef result;
2706 LLVMValueRef thread_id = get_thread_id(ctx);
2707 result = LLVMBuildAnd(ctx->builder, ctx->tg_size,
2708 LLVMConstInt(ctx->i32, 0xfc0, false), "");
2709
2710 return LLVMBuildAdd(ctx->builder, result, thread_id, "");
2711 }
2712
2713 static LLVMValueRef visit_var_atomic(struct nir_to_llvm_context *ctx,
2714 nir_intrinsic_instr *instr)
2715 {
2716 LLVMValueRef ptr, result;
2717 int idx = instr->variables[0]->var->data.driver_location;
2718 LLVMValueRef src = get_src(ctx, instr->src[0]);
2719 ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
2720
2721 if (instr->intrinsic == nir_intrinsic_var_atomic_comp_swap) {
2722 LLVMValueRef src1 = get_src(ctx, instr->src[1]);
2723 result = LLVMBuildAtomicCmpXchg(ctx->builder,
2724 ptr, src, src1,
2725 LLVMAtomicOrderingSequentiallyConsistent,
2726 LLVMAtomicOrderingSequentiallyConsistent,
2727 false);
2728 } else {
2729 LLVMAtomicRMWBinOp op;
2730 switch (instr->intrinsic) {
2731 case nir_intrinsic_var_atomic_add:
2732 op = LLVMAtomicRMWBinOpAdd;
2733 break;
2734 case nir_intrinsic_var_atomic_umin:
2735 op = LLVMAtomicRMWBinOpUMin;
2736 break;
2737 case nir_intrinsic_var_atomic_umax:
2738 op = LLVMAtomicRMWBinOpUMax;
2739 break;
2740 case nir_intrinsic_var_atomic_imin:
2741 op = LLVMAtomicRMWBinOpMin;
2742 break;
2743 case nir_intrinsic_var_atomic_imax:
2744 op = LLVMAtomicRMWBinOpMax;
2745 break;
2746 case nir_intrinsic_var_atomic_and:
2747 op = LLVMAtomicRMWBinOpAnd;
2748 break;
2749 case nir_intrinsic_var_atomic_or:
2750 op = LLVMAtomicRMWBinOpOr;
2751 break;
2752 case nir_intrinsic_var_atomic_xor:
2753 op = LLVMAtomicRMWBinOpXor;
2754 break;
2755 case nir_intrinsic_var_atomic_exchange:
2756 op = LLVMAtomicRMWBinOpXchg;
2757 break;
2758 default:
2759 return NULL;
2760 }
2761
2762 result = LLVMBuildAtomicRMW(ctx->builder, op, ptr, to_integer(ctx, src),
2763 LLVMAtomicOrderingSequentiallyConsistent,
2764 false);
2765 }
2766 return result;
2767 }
2768
2769 #define INTERP_CENTER 0
2770 #define INTERP_CENTROID 1
2771 #define INTERP_SAMPLE 2
2772
2773 static LLVMValueRef lookup_interp_param(struct nir_to_llvm_context *ctx,
2774 enum glsl_interp_mode interp, unsigned location)
2775 {
2776 switch (interp) {
2777 case INTERP_MODE_FLAT:
2778 default:
2779 return NULL;
2780 case INTERP_MODE_SMOOTH:
2781 case INTERP_MODE_NONE:
2782 if (location == INTERP_CENTER)
2783 return ctx->persp_center;
2784 else if (location == INTERP_CENTROID)
2785 return ctx->persp_centroid;
2786 else if (location == INTERP_SAMPLE)
2787 return ctx->persp_sample;
2788 break;
2789 case INTERP_MODE_NOPERSPECTIVE:
2790 if (location == INTERP_CENTER)
2791 return ctx->linear_center;
2792 else if (location == INTERP_CENTROID)
2793 return ctx->linear_centroid;
2794 else if (location == INTERP_SAMPLE)
2795 return ctx->linear_sample;
2796 break;
2797 }
2798 return NULL;
2799 }
2800
2801 static LLVMValueRef load_sample_position(struct nir_to_llvm_context *ctx,
2802 LLVMValueRef sample_id)
2803 {
2804 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
2805 LLVMValueRef offset0 = LLVMBuildMul(ctx->builder, sample_id, LLVMConstInt(ctx->i32, 8, false), "");
2806 LLVMValueRef offset1 = LLVMBuildAdd(ctx->builder, offset0, LLVMConstInt(ctx->i32, 4, false), "");
2807 LLVMValueRef result[2];
2808
2809 result[0] = build_indexed_load_const(ctx, ctx->sample_positions, offset0);
2810 result[1] = build_indexed_load_const(ctx, ctx->sample_positions, offset1);
2811
2812 return build_gather_values(ctx, result, 2);
2813 }
2814
2815 static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx,
2816 nir_intrinsic_instr *instr)
2817 {
2818 LLVMValueRef result[2];
2819 LLVMValueRef interp_param, attr_number;
2820 unsigned location;
2821 unsigned chan;
2822 LLVMValueRef src_c0, src_c1;
2823 const char *intr_name;
2824 LLVMValueRef src0;
2825 int input_index = instr->variables[0]->var->data.location - VARYING_SLOT_VAR0;
2826 switch (instr->intrinsic) {
2827 case nir_intrinsic_interp_var_at_centroid:
2828 location = INTERP_CENTROID;
2829 break;
2830 case nir_intrinsic_interp_var_at_sample:
2831 case nir_intrinsic_interp_var_at_offset:
2832 location = INTERP_SAMPLE;
2833 src0 = get_src(ctx, instr->src[0]);
2834 break;
2835 default:
2836 break;
2837 }
2838
2839 if (instr->intrinsic == nir_intrinsic_interp_var_at_offset) {
2840 src_c0 = to_float(ctx, LLVMBuildExtractElement(ctx->builder, src0, ctx->i32zero, ""));
2841 src_c1 = to_float(ctx, LLVMBuildExtractElement(ctx->builder, src0, ctx->i32one, ""));
2842 } else if (instr->intrinsic == nir_intrinsic_interp_var_at_sample) {
2843 LLVMValueRef sample_position;
2844 LLVMValueRef halfval = LLVMConstReal(ctx->f32, 0.5f);
2845
2846 /* fetch sample ID */
2847 sample_position = load_sample_position(ctx, src0);
2848
2849 src_c0 = LLVMBuildExtractElement(ctx->builder, sample_position, ctx->i32zero, "");
2850 src_c0 = LLVMBuildFSub(ctx->builder, src_c0, halfval, "");
2851 src_c1 = LLVMBuildExtractElement(ctx->builder, sample_position, ctx->i32one, "");
2852 src_c1 = LLVMBuildFSub(ctx->builder, src_c1, halfval, "");
2853 }
2854 interp_param = lookup_interp_param(ctx, instr->variables[0]->var->data.interpolation, location);
2855 attr_number = LLVMConstInt(ctx->i32, input_index, false);
2856
2857 if (location == INTERP_SAMPLE) {
2858 LLVMValueRef ij_out[2];
2859 LLVMValueRef ddxy_out = emit_ddxy_interp(ctx, interp_param);
2860
2861 /*
2862 * take the I then J parameters, and the DDX/Y for it, and
2863 * calculate the IJ inputs for the interpolator.
2864 * temp1 = ddx * offset/sample.x + I;
2865 * interp_param.I = ddy * offset/sample.y + temp1;
2866 * temp1 = ddx * offset/sample.x + J;
2867 * interp_param.J = ddy * offset/sample.y + temp1;
2868 */
2869 for (unsigned i = 0; i < 2; i++) {
2870 LLVMValueRef ix_ll = LLVMConstInt(ctx->i32, i, false);
2871 LLVMValueRef iy_ll = LLVMConstInt(ctx->i32, i + 2, false);
2872 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->builder,
2873 ddxy_out, ix_ll, "");
2874 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->builder,
2875 ddxy_out, iy_ll, "");
2876 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->builder,
2877 interp_param, ix_ll, "");
2878 LLVMValueRef temp1, temp2;
2879
2880 interp_el = LLVMBuildBitCast(ctx->builder, interp_el,
2881 ctx->f32, "");
2882
2883 temp1 = LLVMBuildFMul(ctx->builder, ddx_el, src_c0, "");
2884 temp1 = LLVMBuildFAdd(ctx->builder, temp1, interp_el, "");
2885
2886 temp2 = LLVMBuildFMul(ctx->builder, ddy_el, src_c1, "");
2887 temp2 = LLVMBuildFAdd(ctx->builder, temp2, temp1, "");
2888
2889 ij_out[i] = LLVMBuildBitCast(ctx->builder,
2890 temp2, ctx->i32, "");
2891 }
2892 interp_param = build_gather_values(ctx, ij_out, 2);
2893
2894 }
2895 intr_name = interp_param ? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
2896 for (chan = 0; chan < 2; chan++) {
2897 LLVMValueRef args[4];
2898 LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
2899
2900 args[0] = llvm_chan;
2901 args[1] = attr_number;
2902 args[2] = ctx->prim_mask;
2903 args[3] = interp_param;
2904 result[chan] = emit_llvm_intrinsic(ctx, intr_name,
2905 ctx->f32, args, args[3] ? 4 : 3,
2906 AC_FUNC_ATTR_READNONE);
2907 }
2908 return build_gather_values(ctx, result, 2);
2909 }
2910
2911 static void visit_intrinsic(struct nir_to_llvm_context *ctx,
2912 nir_intrinsic_instr *instr)
2913 {
2914 LLVMValueRef result = NULL;
2915
2916 switch (instr->intrinsic) {
2917 case nir_intrinsic_load_work_group_id: {
2918 result = ctx->workgroup_ids;
2919 break;
2920 }
2921 case nir_intrinsic_load_base_vertex: {
2922 result = ctx->base_vertex;
2923 break;
2924 }
2925 case nir_intrinsic_load_vertex_id_zero_base: {
2926 result = ctx->vertex_id;
2927 break;
2928 }
2929 case nir_intrinsic_load_local_invocation_id: {
2930 result = ctx->local_invocation_ids;
2931 break;
2932 }
2933 case nir_intrinsic_load_base_instance:
2934 result = ctx->start_instance;
2935 break;
2936 case nir_intrinsic_load_sample_id:
2937 result = ctx->ancillary;
2938 break;
2939 case nir_intrinsic_load_front_face:
2940 result = ctx->front_face;
2941 break;
2942 case nir_intrinsic_load_instance_id:
2943 result = ctx->instance_id;
2944 ctx->shader_info->vs.vgpr_comp_cnt = MAX2(3,
2945 ctx->shader_info->vs.vgpr_comp_cnt);
2946 break;
2947 case nir_intrinsic_load_num_work_groups:
2948 result = ctx->num_work_groups;
2949 break;
2950 case nir_intrinsic_load_local_invocation_index:
2951 result = visit_load_local_invocation_index(ctx);
2952 break;
2953 case nir_intrinsic_load_push_constant:
2954 result = visit_load_push_constant(ctx, instr);
2955 break;
2956 case nir_intrinsic_vulkan_resource_index:
2957 result = visit_vulkan_resource_index(ctx, instr);
2958 break;
2959 case nir_intrinsic_store_ssbo:
2960 visit_store_ssbo(ctx, instr);
2961 break;
2962 case nir_intrinsic_load_ssbo:
2963 result = visit_load_buffer(ctx, instr);
2964 break;
2965 case nir_intrinsic_ssbo_atomic_add:
2966 case nir_intrinsic_ssbo_atomic_imin:
2967 case nir_intrinsic_ssbo_atomic_umin:
2968 case nir_intrinsic_ssbo_atomic_imax:
2969 case nir_intrinsic_ssbo_atomic_umax:
2970 case nir_intrinsic_ssbo_atomic_and:
2971 case nir_intrinsic_ssbo_atomic_or:
2972 case nir_intrinsic_ssbo_atomic_xor:
2973 case nir_intrinsic_ssbo_atomic_exchange:
2974 case nir_intrinsic_ssbo_atomic_comp_swap:
2975 result = visit_atomic_ssbo(ctx, instr);
2976 break;
2977 case nir_intrinsic_load_ubo:
2978 result = visit_load_buffer(ctx, instr);
2979 break;
2980 case nir_intrinsic_get_buffer_size:
2981 result = visit_get_buffer_size(ctx, instr);
2982 break;
2983 case nir_intrinsic_load_var:
2984 result = visit_load_var(ctx, instr);
2985 break;
2986 case nir_intrinsic_store_var:
2987 visit_store_var(ctx, instr);
2988 break;
2989 case nir_intrinsic_image_load:
2990 result = visit_image_load(ctx, instr);
2991 break;
2992 case nir_intrinsic_image_store:
2993 visit_image_store(ctx, instr);
2994 break;
2995 case nir_intrinsic_image_atomic_add:
2996 case nir_intrinsic_image_atomic_min:
2997 case nir_intrinsic_image_atomic_max:
2998 case nir_intrinsic_image_atomic_and:
2999 case nir_intrinsic_image_atomic_or:
3000 case nir_intrinsic_image_atomic_xor:
3001 case nir_intrinsic_image_atomic_exchange:
3002 case nir_intrinsic_image_atomic_comp_swap:
3003 result = visit_image_atomic(ctx, instr);
3004 break;
3005 case nir_intrinsic_image_size:
3006 result = visit_image_size(ctx, instr);
3007 break;
3008 case nir_intrinsic_discard:
3009 ctx->shader_info->fs.can_discard = true;
3010 emit_llvm_intrinsic(ctx, "llvm.AMDGPU.kilp",
3011 LLVMVoidTypeInContext(ctx->context),
3012 NULL, 0, 0);
3013 break;
3014 case nir_intrinsic_discard_if:
3015 emit_discard_if(ctx, instr);
3016 break;
3017 case nir_intrinsic_memory_barrier:
3018 emit_waitcnt(ctx);
3019 break;
3020 case nir_intrinsic_barrier:
3021 emit_barrier(ctx);
3022 break;
3023 case nir_intrinsic_var_atomic_add:
3024 case nir_intrinsic_var_atomic_imin:
3025 case nir_intrinsic_var_atomic_umin:
3026 case nir_intrinsic_var_atomic_imax:
3027 case nir_intrinsic_var_atomic_umax:
3028 case nir_intrinsic_var_atomic_and:
3029 case nir_intrinsic_var_atomic_or:
3030 case nir_intrinsic_var_atomic_xor:
3031 case nir_intrinsic_var_atomic_exchange:
3032 case nir_intrinsic_var_atomic_comp_swap:
3033 result = visit_var_atomic(ctx, instr);
3034 break;
3035 case nir_intrinsic_interp_var_at_centroid:
3036 case nir_intrinsic_interp_var_at_sample:
3037 case nir_intrinsic_interp_var_at_offset:
3038 result = visit_interp(ctx, instr);
3039 break;
3040 default:
3041 fprintf(stderr, "Unknown intrinsic: ");
3042 nir_print_instr(&instr->instr, stderr);
3043 fprintf(stderr, "\n");
3044 break;
3045 }
3046 if (result) {
3047 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
3048 }
3049 }
3050
3051 static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
3052 nir_deref_var *deref,
3053 enum desc_type desc_type)
3054 {
3055 unsigned desc_set = deref->var->data.descriptor_set;
3056 LLVMValueRef list = ctx->descriptor_sets[desc_set];
3057 struct radv_descriptor_set_layout *layout = ctx->options->layout->set[desc_set].layout;
3058 struct radv_descriptor_set_binding_layout *binding = layout->binding + deref->var->data.binding;
3059 unsigned offset = binding->offset;
3060 unsigned stride = binding->size;
3061 unsigned type_size;
3062 LLVMBuilderRef builder = ctx->builder;
3063 LLVMTypeRef type;
3064 LLVMValueRef indices[2];
3065 LLVMValueRef index = NULL;
3066
3067 assert(deref->var->data.binding < layout->binding_count);
3068
3069 switch (desc_type) {
3070 case DESC_IMAGE:
3071 type = ctx->v8i32;
3072 type_size = 32;
3073 break;
3074 case DESC_FMASK:
3075 type = ctx->v8i32;
3076 offset += 32;
3077 type_size = 32;
3078 break;
3079 case DESC_SAMPLER:
3080 type = ctx->v4i32;
3081 if (binding->type == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
3082 offset += 64;
3083
3084 type_size = 16;
3085 break;
3086 case DESC_BUFFER:
3087 type = ctx->v4i32;
3088 type_size = 16;
3089 break;
3090 }
3091
3092 if (deref->deref.child) {
3093 nir_deref_array *child = (nir_deref_array*)deref->deref.child;
3094
3095 assert(child->deref_array_type != nir_deref_array_type_wildcard);
3096 offset += child->base_offset * stride;
3097 if (child->deref_array_type == nir_deref_array_type_indirect) {
3098 index = get_src(ctx, child->indirect);
3099 }
3100 }
3101
3102 assert(stride % type_size == 0);
3103
3104 if (!index)
3105 index = ctx->i32zero;
3106
3107 index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, stride / type_size, 0), "");
3108 indices[0] = ctx->i32zero;
3109 indices[1] = LLVMConstInt(ctx->i32, offset, 0);
3110 list = LLVMBuildGEP(builder, list, indices, 2, "");
3111 list = LLVMBuildPointerCast(builder, list, const_array(type, 0), "");
3112
3113 return build_indexed_load_const(ctx, list, index);
3114 }
3115
3116 static void set_tex_fetch_args(struct nir_to_llvm_context *ctx,
3117 struct ac_tex_info *tinfo,
3118 nir_tex_instr *instr,
3119 nir_texop op,
3120 LLVMValueRef res_ptr, LLVMValueRef samp_ptr,
3121 LLVMValueRef *param, unsigned count,
3122 unsigned dmask)
3123 {
3124 int num_args;
3125 unsigned is_rect = 0;
3126 bool da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE;
3127
3128 if (op == nir_texop_lod)
3129 da = false;
3130 /* Pad to power of two vector */
3131 while (count < util_next_power_of_two(count))
3132 param[count++] = LLVMGetUndef(ctx->i32);
3133
3134 if (count > 1)
3135 tinfo->args[0] = build_gather_values(ctx, param, count);
3136 else
3137 tinfo->args[0] = param[0];
3138
3139 tinfo->args[1] = res_ptr;
3140 num_args = 2;
3141
3142 if (op == nir_texop_txf ||
3143 op == nir_texop_txf_ms ||
3144 op == nir_texop_query_levels ||
3145 op == nir_texop_texture_samples ||
3146 op == nir_texop_txs)
3147 tinfo->dst_type = ctx->v4i32;
3148 else {
3149 tinfo->dst_type = ctx->v4f32;
3150 tinfo->args[num_args++] = samp_ptr;
3151 }
3152
3153 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF && op == nir_texop_txf) {
3154 tinfo->args[0] = res_ptr;
3155 tinfo->args[1] = LLVMConstInt(ctx->i32, 0, false);
3156 tinfo->args[2] = param[0];
3157 tinfo->arg_count = 3;
3158 return;
3159 }
3160
3161 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, dmask, 0);
3162 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, is_rect, 0); /* unorm */
3163 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
3164 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, da ? 1 : 0, 0);
3165 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
3166 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
3167 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
3168 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
3169
3170 tinfo->arg_count = num_args;
3171 }
3172
3173 static void tex_fetch_ptrs(struct nir_to_llvm_context *ctx,
3174 nir_tex_instr *instr,
3175 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3176 LLVMValueRef *fmask_ptr)
3177 {
3178 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF)
3179 *res_ptr = get_sampler_desc(ctx, instr->texture, DESC_BUFFER);
3180 else
3181 *res_ptr = get_sampler_desc(ctx, instr->texture, DESC_IMAGE);
3182 if (samp_ptr) {
3183 if (instr->sampler)
3184 *samp_ptr = get_sampler_desc(ctx, instr->sampler, DESC_SAMPLER);
3185 else
3186 *samp_ptr = get_sampler_desc(ctx, instr->texture, DESC_SAMPLER);
3187 }
3188 if (fmask_ptr && !instr->sampler && (instr->op == nir_texop_txf_ms ||
3189 instr->op == nir_texop_samples_identical))
3190 *fmask_ptr = get_sampler_desc(ctx, instr->texture, DESC_FMASK);
3191 }
3192
3193 static LLVMValueRef build_cube_intrinsic(struct nir_to_llvm_context *ctx,
3194 LLVMValueRef *in)
3195 {
3196
3197 LLVMValueRef v, cube_vec;
3198
3199 if (1) {
3200 LLVMTypeRef f32 = LLVMTypeOf(in[0]);
3201 LLVMValueRef out[4];
3202
3203 out[0] = emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubetc",
3204 f32, in, 3, AC_FUNC_ATTR_READNONE);
3205 out[1] = emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubesc",
3206 f32, in, 3, AC_FUNC_ATTR_READNONE);
3207 out[2] = emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubema",
3208 f32, in, 3, AC_FUNC_ATTR_READNONE);
3209 out[3] = emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubeid",
3210 f32, in, 3, AC_FUNC_ATTR_READNONE);
3211
3212 return build_gather_values(ctx, out, 4);
3213 } else {
3214 LLVMValueRef c[4];
3215 c[0] = in[0];
3216 c[1] = in[1];
3217 c[2] = in[2];
3218 c[3] = LLVMGetUndef(LLVMTypeOf(in[0]));
3219 cube_vec = build_gather_values(ctx, c, 4);
3220 v = emit_llvm_intrinsic(ctx, "llvm.AMDGPU.cube", LLVMTypeOf(cube_vec),
3221 &cube_vec, 1, AC_FUNC_ATTR_READNONE);
3222 }
3223 return v;
3224 }
3225
3226 static void cube_to_2d_coords(struct nir_to_llvm_context *ctx,
3227 LLVMValueRef *in, LLVMValueRef *out)
3228 {
3229 LLVMValueRef coords[4];
3230 LLVMValueRef mad_args[3];
3231 LLVMValueRef v;
3232 LLVMValueRef tmp;
3233 int i;
3234
3235 v = build_cube_intrinsic(ctx, in);
3236 for (i = 0; i < 4; i++)
3237 coords[i] = LLVMBuildExtractElement(ctx->builder, v,
3238 LLVMConstInt(ctx->i32, i, false), "");
3239
3240 coords[2] = emit_llvm_intrinsic(ctx, "llvm.fabs.f32", ctx->f32,
3241 &coords[2], 1, AC_FUNC_ATTR_READNONE);
3242 coords[2] = emit_fdiv(ctx, ctx->f32one, coords[2]);
3243
3244 mad_args[1] = coords[2];
3245 mad_args[2] = LLVMConstReal(ctx->f32, 1.5);
3246 mad_args[0] = coords[0];
3247
3248 /* emit MAD */
3249 tmp = LLVMBuildFMul(ctx->builder, mad_args[0], mad_args[1], "");
3250 coords[0] = LLVMBuildFAdd(ctx->builder, tmp, mad_args[2], "");
3251
3252 mad_args[0] = coords[1];
3253
3254 /* emit MAD */
3255 tmp = LLVMBuildFMul(ctx->builder, mad_args[0], mad_args[1], "");
3256 coords[1] = LLVMBuildFAdd(ctx->builder, tmp, mad_args[2], "");
3257
3258 /* apply xyz = yxw swizzle to cooords */
3259 out[0] = coords[1];
3260 out[1] = coords[0];
3261 out[2] = coords[3];
3262 }
3263
3264 static void emit_prepare_cube_coords(struct nir_to_llvm_context *ctx,
3265 LLVMValueRef *coords_arg, int num_coords,
3266 bool is_deriv,
3267 bool is_array, LLVMValueRef *derivs_arg)
3268 {
3269 LLVMValueRef coords[4];
3270 int i;
3271 cube_to_2d_coords(ctx, coords_arg, coords);
3272
3273 if (is_deriv && derivs_arg) {
3274 LLVMValueRef derivs[4];
3275 int axis;
3276
3277 /* Convert cube derivatives to 2D derivatives. */
3278 for (axis = 0; axis < 2; axis++) {
3279 LLVMValueRef shifted_cube_coords[4], shifted_coords[4];
3280
3281 /* Shift the cube coordinates by the derivatives to get
3282 * the cube coordinates of the "neighboring pixel".
3283 */
3284 for (i = 0; i < 3; i++)
3285 shifted_cube_coords[i] =
3286 LLVMBuildFAdd(ctx->builder, coords_arg[i],
3287 derivs_arg[axis*3+i], "");
3288 shifted_cube_coords[3] = LLVMGetUndef(ctx->f32);
3289
3290 /* Project the shifted cube coordinates onto the face. */
3291 cube_to_2d_coords(ctx, shifted_cube_coords,
3292 shifted_coords);
3293
3294 /* Subtract both sets of 2D coordinates to get 2D derivatives.
3295 * This won't work if the shifted coordinates ended up
3296 * in a different face.
3297 */
3298 for (i = 0; i < 2; i++)
3299 derivs[axis * 2 + i] =
3300 LLVMBuildFSub(ctx->builder, shifted_coords[i],
3301 coords[i], "");
3302 }
3303
3304 memcpy(derivs_arg, derivs, sizeof(derivs));
3305 }
3306
3307 if (is_array) {
3308 /* for cube arrays coord.z = coord.w(array_index) * 8 + face */
3309 /* coords_arg.w component - array_index for cube arrays */
3310 LLVMValueRef tmp = LLVMBuildFMul(ctx->builder, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), "");
3311 coords[2] = LLVMBuildFAdd(ctx->builder, tmp, coords[2], "");
3312 }
3313
3314 memcpy(coords_arg, coords, sizeof(coords));
3315 }
3316
3317 static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
3318 {
3319 LLVMValueRef result = NULL;
3320 struct ac_tex_info tinfo = { 0 };
3321 unsigned dmask = 0xf;
3322 LLVMValueRef address[16];
3323 LLVMValueRef coords[5];
3324 LLVMValueRef coord = NULL, lod = NULL, comparitor = NULL, bias, offsets = NULL;
3325 LLVMValueRef res_ptr, samp_ptr, fmask_ptr = NULL, sample_index = NULL;
3326 LLVMValueRef ddx = NULL, ddy = NULL;
3327 LLVMValueRef derivs[6];
3328 unsigned chan, count = 0;
3329 unsigned const_src = 0, num_deriv_comp = 0;
3330
3331 tex_fetch_ptrs(ctx, instr, &res_ptr, &samp_ptr, &fmask_ptr);
3332
3333 for (unsigned i = 0; i < instr->num_srcs; i++) {
3334 switch (instr->src[i].src_type) {
3335 case nir_tex_src_coord:
3336 coord = get_src(ctx, instr->src[i].src);
3337 break;
3338 case nir_tex_src_projector:
3339 break;
3340 case nir_tex_src_comparitor:
3341 comparitor = get_src(ctx, instr->src[i].src);
3342 break;
3343 case nir_tex_src_offset:
3344 offsets = get_src(ctx, instr->src[i].src);
3345 const_src = i;
3346 break;
3347 case nir_tex_src_bias:
3348 bias = get_src(ctx, instr->src[i].src);
3349 break;
3350 case nir_tex_src_lod:
3351 lod = get_src(ctx, instr->src[i].src);
3352 break;
3353 case nir_tex_src_ms_index:
3354 sample_index = get_src(ctx, instr->src[i].src);
3355 break;
3356 case nir_tex_src_ms_mcs:
3357 break;
3358 case nir_tex_src_ddx:
3359 ddx = get_src(ctx, instr->src[i].src);
3360 num_deriv_comp = instr->src[i].src.ssa->num_components;
3361 break;
3362 case nir_tex_src_ddy:
3363 ddy = get_src(ctx, instr->src[i].src);
3364 break;
3365 case nir_tex_src_texture_offset:
3366 case nir_tex_src_sampler_offset:
3367 case nir_tex_src_plane:
3368 default:
3369 break;
3370 }
3371 }
3372
3373 if (instr->op == nir_texop_texture_samples) {
3374 LLVMValueRef res, samples, is_msaa;
3375 res = LLVMBuildBitCast(ctx->builder, res_ptr, ctx->v8i32, "");
3376 samples = LLVMBuildExtractElement(ctx->builder, res,
3377 LLVMConstInt(ctx->i32, 3, false), "");
3378 is_msaa = LLVMBuildLShr(ctx->builder, samples,
3379 LLVMConstInt(ctx->i32, 28, false), "");
3380 is_msaa = LLVMBuildAnd(ctx->builder, is_msaa,
3381 LLVMConstInt(ctx->i32, 0xe, false), "");
3382 is_msaa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, is_msaa,
3383 LLVMConstInt(ctx->i32, 0xe, false), "");
3384
3385 samples = LLVMBuildLShr(ctx->builder, samples,
3386 LLVMConstInt(ctx->i32, 16, false), "");
3387 samples = LLVMBuildAnd(ctx->builder, samples,
3388 LLVMConstInt(ctx->i32, 0xf, false), "");
3389 samples = LLVMBuildShl(ctx->builder, ctx->i32one,
3390 samples, "");
3391 samples = LLVMBuildSelect(ctx->builder, is_msaa, samples,
3392 ctx->i32one, "");
3393 result = samples;
3394 goto write_result;
3395 }
3396
3397 if (coord)
3398 for (chan = 0; chan < instr->coord_components; chan++)
3399 coords[chan] = llvm_extract_elem(ctx, coord, chan);
3400
3401 if (offsets && instr->op != nir_texop_txf) {
3402 LLVMValueRef offset[3], pack;
3403 for (chan = 0; chan < 3; ++chan)
3404 offset[chan] = ctx->i32zero;
3405
3406 tinfo.has_offset = true;
3407 for (chan = 0; chan < get_llvm_num_components(offsets); chan++) {
3408 offset[chan] = llvm_extract_elem(ctx, offsets, chan);
3409 offset[chan] = LLVMBuildAnd(ctx->builder, offset[chan],
3410 LLVMConstInt(ctx->i32, 0x3f, false), "");
3411 if (chan)
3412 offset[chan] = LLVMBuildShl(ctx->builder, offset[chan],
3413 LLVMConstInt(ctx->i32, chan * 8, false), "");
3414 }
3415 pack = LLVMBuildOr(ctx->builder, offset[0], offset[1], "");
3416 pack = LLVMBuildOr(ctx->builder, pack, offset[2], "");
3417 address[count++] = pack;
3418
3419 }
3420 /* pack LOD bias value */
3421 if (instr->op == nir_texop_txb && bias) {
3422 address[count++] = bias;
3423 }
3424
3425 /* Pack depth comparison value */
3426 if (instr->is_shadow && comparitor) {
3427 address[count++] = llvm_extract_elem(ctx, comparitor, 0);
3428 }
3429
3430 /* pack derivatives */
3431 if (ddx || ddy) {
3432 switch (instr->sampler_dim) {
3433 case GLSL_SAMPLER_DIM_3D:
3434 case GLSL_SAMPLER_DIM_CUBE:
3435 num_deriv_comp = 3;
3436 break;
3437 case GLSL_SAMPLER_DIM_2D:
3438 default:
3439 num_deriv_comp = 2;
3440 break;
3441 case GLSL_SAMPLER_DIM_1D:
3442 num_deriv_comp = 1;
3443 break;
3444 }
3445
3446 for (unsigned i = 0; i < num_deriv_comp; i++) {
3447 derivs[i * 2] = to_float(ctx, llvm_extract_elem(ctx, ddx, i));
3448 derivs[i * 2 + 1] = to_float(ctx, llvm_extract_elem(ctx, ddy, i));
3449 }
3450 }
3451
3452 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && coord) {
3453 for (chan = 0; chan < instr->coord_components; chan++)
3454 coords[chan] = to_float(ctx, coords[chan]);
3455 if (instr->coord_components == 3)
3456 coords[3] = LLVMGetUndef(ctx->f32);
3457 emit_prepare_cube_coords(ctx, coords, instr->coord_components, instr->op == nir_texop_txd, instr->is_array, derivs);
3458 if (num_deriv_comp)
3459 num_deriv_comp--;
3460 }
3461
3462 if (ddx || ddy) {
3463 for (unsigned i = 0; i < num_deriv_comp * 2; i++)
3464 address[count++] = derivs[i];
3465 }
3466
3467 /* Pack texture coordinates */
3468 if (coord) {
3469 address[count++] = coords[0];
3470 if (instr->coord_components > 1)
3471 address[count++] = coords[1];
3472 if (instr->coord_components > 2) {
3473 /* This seems like a bit of a hack - but it passes Vulkan CTS with it */
3474 if (instr->sampler_dim != GLSL_SAMPLER_DIM_3D && instr->op != nir_texop_txf) {
3475 coords[2] = to_float(ctx, coords[2]);
3476 coords[2] = emit_llvm_intrinsic(ctx, "llvm.rint.f32", ctx->f32, &coords[2],
3477 1, 0);
3478 coords[2] = to_integer(ctx, coords[2]);
3479 }
3480 address[count++] = coords[2];
3481 }
3482 }
3483
3484 /* Pack LOD */
3485 if ((instr->op == nir_texop_txl || instr->op == nir_texop_txf) && lod) {
3486 address[count++] = lod;
3487 } else if (instr->op == nir_texop_txf_ms && sample_index) {
3488 address[count++] = sample_index;
3489 } else if(instr->op == nir_texop_txs) {
3490 count = 0;
3491 address[count++] = lod;
3492 }
3493
3494 for (chan = 0; chan < count; chan++) {
3495 address[chan] = LLVMBuildBitCast(ctx->builder,
3496 address[chan], ctx->i32, "");
3497 }
3498
3499 if (instr->op == nir_texop_samples_identical) {
3500 LLVMValueRef txf_address[4];
3501 struct ac_tex_info txf_info = { 0 };
3502 unsigned txf_count = count;
3503 memcpy(txf_address, address, sizeof(txf_address));
3504
3505 if (!instr->is_array)
3506 txf_address[2] = ctx->i32zero;
3507 txf_address[3] = ctx->i32zero;
3508
3509 set_tex_fetch_args(ctx, &txf_info, instr, nir_texop_txf,
3510 fmask_ptr, NULL,
3511 txf_address, txf_count, 0xf);
3512
3513 result = build_tex_intrinsic(ctx, instr, &txf_info);
3514
3515 result = LLVMBuildExtractElement(ctx->builder, result, ctx->i32zero, "");
3516 result = emit_int_cmp(ctx, LLVMIntEQ, result, ctx->i32zero);
3517 goto write_result;
3518 }
3519
3520 /* Adjust the sample index according to FMASK.
3521 *
3522 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3523 * which is the identity mapping. Each nibble says which physical sample
3524 * should be fetched to get that sample.
3525 *
3526 * For example, 0x11111100 means there are only 2 samples stored and
3527 * the second sample covers 3/4 of the pixel. When reading samples 0
3528 * and 1, return physical sample 0 (determined by the first two 0s
3529 * in FMASK), otherwise return physical sample 1.
3530 *
3531 * The sample index should be adjusted as follows:
3532 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
3533 */
3534 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS) {
3535 LLVMValueRef txf_address[4];
3536 struct ac_tex_info txf_info = { 0 };
3537 unsigned txf_count = count;
3538 memcpy(txf_address, address, sizeof(txf_address));
3539
3540 if (!instr->is_array)
3541 txf_address[2] = ctx->i32zero;
3542 txf_address[3] = ctx->i32zero;
3543
3544 set_tex_fetch_args(ctx, &txf_info, instr, nir_texop_txf,
3545 fmask_ptr, NULL,
3546 txf_address, txf_count, 0xf);
3547
3548 result = build_tex_intrinsic(ctx, instr, &txf_info);
3549 LLVMValueRef four = LLVMConstInt(ctx->i32, 4, false);
3550 LLVMValueRef F = LLVMConstInt(ctx->i32, 0xf, false);
3551
3552 LLVMValueRef fmask = LLVMBuildExtractElement(ctx->builder,
3553 result,
3554 ctx->i32zero, "");
3555
3556 unsigned sample_chan = instr->is_array ? 3 : 2;
3557
3558 LLVMValueRef sample_index4 =
3559 LLVMBuildMul(ctx->builder, address[sample_chan], four, "");
3560 LLVMValueRef shifted_fmask =
3561 LLVMBuildLShr(ctx->builder, fmask, sample_index4, "");
3562 LLVMValueRef final_sample =
3563 LLVMBuildAnd(ctx->builder, shifted_fmask, F, "");
3564
3565 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3566 * resource descriptor is 0 (invalid),
3567 */
3568 LLVMValueRef fmask_desc =
3569 LLVMBuildBitCast(ctx->builder, fmask_ptr,
3570 ctx->v8i32, "");
3571
3572 LLVMValueRef fmask_word1 =
3573 LLVMBuildExtractElement(ctx->builder, fmask_desc,
3574 ctx->i32one, "");
3575
3576 LLVMValueRef word1_is_nonzero =
3577 LLVMBuildICmp(ctx->builder, LLVMIntNE,
3578 fmask_word1, ctx->i32zero, "");
3579
3580 /* Replace the MSAA sample index. */
3581 address[sample_chan] =
3582 LLVMBuildSelect(ctx->builder, word1_is_nonzero,
3583 final_sample, address[sample_chan], "");
3584 }
3585
3586 if (offsets && instr->op == nir_texop_txf) {
3587 nir_const_value *const_offset =
3588 nir_src_as_const_value(instr->src[const_src].src);
3589
3590 assert(const_offset);
3591 if (instr->coord_components > 2)
3592 address[2] = LLVMBuildAdd(ctx->builder,
3593 address[2], LLVMConstInt(ctx->i32, const_offset->i32[2], false), "");
3594 if (instr->coord_components > 1)
3595 address[1] = LLVMBuildAdd(ctx->builder,
3596 address[1], LLVMConstInt(ctx->i32, const_offset->i32[1], false), "");
3597 address[0] = LLVMBuildAdd(ctx->builder,
3598 address[0], LLVMConstInt(ctx->i32, const_offset->i32[0], false), "");
3599
3600 }
3601
3602 /* TODO TG4 support */
3603 if (instr->op == nir_texop_tg4) {
3604 if (instr->is_shadow)
3605 dmask = 1;
3606 else
3607 dmask = 1 << instr->component;
3608 }
3609 set_tex_fetch_args(ctx, &tinfo, instr, instr->op,
3610 res_ptr, samp_ptr, address, count, dmask);
3611
3612 result = build_tex_intrinsic(ctx, instr, &tinfo);
3613
3614 if (instr->op == nir_texop_query_levels)
3615 result = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, 3, false), "");
3616 else if (instr->op == nir_texop_txs &&
3617 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3618 instr->is_array) {
3619 LLVMValueRef two = LLVMConstInt(ctx->i32, 2, false);
3620 LLVMValueRef six = LLVMConstInt(ctx->i32, 6, false);
3621 LLVMValueRef z = LLVMBuildExtractElement(ctx->builder, result, two, "");
3622 z = LLVMBuildSDiv(ctx->builder, z, six, "");
3623 result = LLVMBuildInsertElement(ctx->builder, result, z, two, "");
3624 } else if (instr->dest.ssa.num_components != 4)
3625 result = trim_vector(ctx, result, instr->dest.ssa.num_components);
3626
3627 write_result:
3628 if (result) {
3629 assert(instr->dest.is_ssa);
3630 result = to_integer(ctx, result);
3631 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
3632 }
3633 }
3634
3635
3636 static void visit_phi(struct nir_to_llvm_context *ctx, nir_phi_instr *instr)
3637 {
3638 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3639 LLVMValueRef result = LLVMBuildPhi(ctx->builder, type, "");
3640
3641 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
3642 _mesa_hash_table_insert(ctx->phis, instr, result);
3643 }
3644
3645 static void visit_post_phi(struct nir_to_llvm_context *ctx,
3646 nir_phi_instr *instr,
3647 LLVMValueRef llvm_phi)
3648 {
3649 nir_foreach_phi_src(src, instr) {
3650 LLVMBasicBlockRef block = get_block(ctx, src->pred);
3651 LLVMValueRef llvm_src = get_src(ctx, src->src);
3652
3653 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
3654 }
3655 }
3656
3657 static void phi_post_pass(struct nir_to_llvm_context *ctx)
3658 {
3659 struct hash_entry *entry;
3660 hash_table_foreach(ctx->phis, entry) {
3661 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
3662 (LLVMValueRef)entry->data);
3663 }
3664 }
3665
3666
3667 static void visit_ssa_undef(struct nir_to_llvm_context *ctx,
3668 nir_ssa_undef_instr *instr)
3669 {
3670 unsigned num_components = instr->def.num_components;
3671 LLVMValueRef undef;
3672
3673 if (num_components == 1)
3674 undef = LLVMGetUndef(ctx->i32);
3675 else {
3676 undef = LLVMGetUndef(LLVMVectorType(ctx->i32, num_components));
3677 }
3678 _mesa_hash_table_insert(ctx->defs, &instr->def, undef);
3679 }
3680
3681 static void visit_jump(struct nir_to_llvm_context *ctx,
3682 nir_jump_instr *instr)
3683 {
3684 switch (instr->type) {
3685 case nir_jump_break:
3686 LLVMBuildBr(ctx->builder, ctx->break_block);
3687 LLVMClearInsertionPosition(ctx->builder);
3688 break;
3689 case nir_jump_continue:
3690 LLVMBuildBr(ctx->builder, ctx->continue_block);
3691 LLVMClearInsertionPosition(ctx->builder);
3692 break;
3693 default:
3694 fprintf(stderr, "Unknown NIR jump instr: ");
3695 nir_print_instr(&instr->instr, stderr);
3696 fprintf(stderr, "\n");
3697 abort();
3698 }
3699 }
3700
3701 static void visit_cf_list(struct nir_to_llvm_context *ctx,
3702 struct exec_list *list);
3703
3704 static void visit_block(struct nir_to_llvm_context *ctx, nir_block *block)
3705 {
3706 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->builder);
3707 nir_foreach_instr(instr, block)
3708 {
3709 switch (instr->type) {
3710 case nir_instr_type_alu:
3711 visit_alu(ctx, nir_instr_as_alu(instr));
3712 break;
3713 case nir_instr_type_load_const:
3714 visit_load_const(ctx, nir_instr_as_load_const(instr));
3715 break;
3716 case nir_instr_type_intrinsic:
3717 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
3718 break;
3719 case nir_instr_type_tex:
3720 visit_tex(ctx, nir_instr_as_tex(instr));
3721 break;
3722 case nir_instr_type_phi:
3723 visit_phi(ctx, nir_instr_as_phi(instr));
3724 break;
3725 case nir_instr_type_ssa_undef:
3726 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
3727 break;
3728 case nir_instr_type_jump:
3729 visit_jump(ctx, nir_instr_as_jump(instr));
3730 break;
3731 default:
3732 fprintf(stderr, "Unknown NIR instr type: ");
3733 nir_print_instr(instr, stderr);
3734 fprintf(stderr, "\n");
3735 abort();
3736 }
3737 }
3738
3739 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
3740 }
3741
3742 static void visit_if(struct nir_to_llvm_context *ctx, nir_if *if_stmt)
3743 {
3744 LLVMValueRef value = get_src(ctx, if_stmt->condition);
3745
3746 LLVMBasicBlockRef merge_block =
3747 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3748 LLVMBasicBlockRef if_block =
3749 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3750 LLVMBasicBlockRef else_block = merge_block;
3751 if (!exec_list_is_empty(&if_stmt->else_list))
3752 else_block = LLVMAppendBasicBlockInContext(
3753 ctx->context, ctx->main_function, "");
3754
3755 LLVMValueRef cond = LLVMBuildICmp(ctx->builder, LLVMIntNE, value,
3756 LLVMConstInt(ctx->i32, 0, false), "");
3757 LLVMBuildCondBr(ctx->builder, cond, if_block, else_block);
3758
3759 LLVMPositionBuilderAtEnd(ctx->builder, if_block);
3760 visit_cf_list(ctx, &if_stmt->then_list);
3761 if (LLVMGetInsertBlock(ctx->builder))
3762 LLVMBuildBr(ctx->builder, merge_block);
3763
3764 if (!exec_list_is_empty(&if_stmt->else_list)) {
3765 LLVMPositionBuilderAtEnd(ctx->builder, else_block);
3766 visit_cf_list(ctx, &if_stmt->else_list);
3767 if (LLVMGetInsertBlock(ctx->builder))
3768 LLVMBuildBr(ctx->builder, merge_block);
3769 }
3770
3771 LLVMPositionBuilderAtEnd(ctx->builder, merge_block);
3772 }
3773
3774 static void visit_loop(struct nir_to_llvm_context *ctx, nir_loop *loop)
3775 {
3776 LLVMBasicBlockRef continue_parent = ctx->continue_block;
3777 LLVMBasicBlockRef break_parent = ctx->break_block;
3778
3779 ctx->continue_block =
3780 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3781 ctx->break_block =
3782 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3783
3784 LLVMBuildBr(ctx->builder, ctx->continue_block);
3785 LLVMPositionBuilderAtEnd(ctx->builder, ctx->continue_block);
3786 visit_cf_list(ctx, &loop->body);
3787
3788 if (LLVMGetInsertBlock(ctx->builder))
3789 LLVMBuildBr(ctx->builder, ctx->continue_block);
3790 LLVMPositionBuilderAtEnd(ctx->builder, ctx->break_block);
3791
3792 ctx->continue_block = continue_parent;
3793 ctx->break_block = break_parent;
3794 }
3795
3796 static void visit_cf_list(struct nir_to_llvm_context *ctx,
3797 struct exec_list *list)
3798 {
3799 foreach_list_typed(nir_cf_node, node, node, list)
3800 {
3801 switch (node->type) {
3802 case nir_cf_node_block:
3803 visit_block(ctx, nir_cf_node_as_block(node));
3804 break;
3805
3806 case nir_cf_node_if:
3807 visit_if(ctx, nir_cf_node_as_if(node));
3808 break;
3809
3810 case nir_cf_node_loop:
3811 visit_loop(ctx, nir_cf_node_as_loop(node));
3812 break;
3813
3814 default:
3815 assert(0);
3816 }
3817 }
3818 }
3819
3820 static void
3821 handle_vs_input_decl(struct nir_to_llvm_context *ctx,
3822 struct nir_variable *variable)
3823 {
3824 LLVMValueRef t_list_ptr = ctx->vertex_buffers;
3825 LLVMValueRef t_offset;
3826 LLVMValueRef t_list;
3827 LLVMValueRef args[3];
3828 LLVMValueRef input;
3829 LLVMValueRef buffer_index;
3830 int index = variable->data.location - VERT_ATTRIB_GENERIC0;
3831 int idx = variable->data.location;
3832 unsigned attrib_count = glsl_count_attribute_slots(variable->type, true);
3833
3834 variable->data.driver_location = idx * 4;
3835
3836 if (ctx->options->key.vs.instance_rate_inputs & (1u << index)) {
3837 buffer_index = LLVMBuildAdd(ctx->builder, ctx->instance_id,
3838 ctx->start_instance, "");
3839 ctx->shader_info->vs.vgpr_comp_cnt = MAX2(3,
3840 ctx->shader_info->vs.vgpr_comp_cnt);
3841 } else
3842 buffer_index = LLVMBuildAdd(ctx->builder, ctx->vertex_id,
3843 ctx->base_vertex, "");
3844
3845 for (unsigned i = 0; i < attrib_count; ++i, ++idx) {
3846 t_offset = LLVMConstInt(ctx->i32, index + i, false);
3847
3848 t_list = build_indexed_load_const(ctx, t_list_ptr, t_offset);
3849 args[0] = t_list;
3850 args[1] = LLVMConstInt(ctx->i32, 0, false);
3851 args[2] = buffer_index;
3852 input = emit_llvm_intrinsic(ctx,
3853 "llvm.SI.vs.load.input", ctx->v4f32, args, 3,
3854 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND);
3855
3856 for (unsigned chan = 0; chan < 4; chan++) {
3857 LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
3858 ctx->inputs[radeon_llvm_reg_index_soa(idx, chan)] =
3859 to_integer(ctx, LLVMBuildExtractElement(ctx->builder,
3860 input, llvm_chan, ""));
3861 }
3862 }
3863 }
3864
3865
3866 static void interp_fs_input(struct nir_to_llvm_context *ctx,
3867 unsigned attr,
3868 LLVMValueRef interp_param,
3869 LLVMValueRef prim_mask,
3870 LLVMValueRef result[4])
3871 {
3872 const char *intr_name;
3873 LLVMValueRef attr_number;
3874 unsigned chan;
3875
3876 attr_number = LLVMConstInt(ctx->i32, attr, false);
3877
3878 /* fs.constant returns the param from the middle vertex, so it's not
3879 * really useful for flat shading. It's meant to be used for custom
3880 * interpolation (but the intrinsic can't fetch from the other two
3881 * vertices).
3882 *
3883 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
3884 * to do the right thing. The only reason we use fs.constant is that
3885 * fs.interp cannot be used on integers, because they can be equal
3886 * to NaN.
3887 */
3888 intr_name = interp_param ? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
3889
3890 for (chan = 0; chan < 4; chan++) {
3891 LLVMValueRef args[4];
3892 LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
3893
3894 args[0] = llvm_chan;
3895 args[1] = attr_number;
3896 args[2] = prim_mask;
3897 args[3] = interp_param;
3898 result[chan] = emit_llvm_intrinsic(ctx, intr_name,
3899 ctx->f32, args, args[3] ? 4 : 3,
3900 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND);
3901 }
3902 }
3903
3904 static void
3905 handle_fs_input_decl(struct nir_to_llvm_context *ctx,
3906 struct nir_variable *variable)
3907 {
3908 int idx = variable->data.location;
3909 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3910 LLVMValueRef interp;
3911
3912 variable->data.driver_location = idx * 4;
3913 ctx->input_mask |= ((1ull << attrib_count) - 1) << variable->data.location;
3914
3915 if (glsl_get_base_type(glsl_without_array(variable->type)) == GLSL_TYPE_FLOAT)
3916 interp = lookup_interp_param(ctx, variable->data.interpolation, INTERP_CENTER);
3917 else
3918 interp = NULL;
3919
3920 for (unsigned i = 0; i < attrib_count; ++i)
3921 ctx->inputs[radeon_llvm_reg_index_soa(idx + i, 0)] = interp;
3922
3923 }
3924
3925 static void
3926 handle_shader_input_decl(struct nir_to_llvm_context *ctx,
3927 struct nir_variable *variable)
3928 {
3929 switch (ctx->stage) {
3930 case MESA_SHADER_VERTEX:
3931 handle_vs_input_decl(ctx, variable);
3932 break;
3933 case MESA_SHADER_FRAGMENT:
3934 handle_fs_input_decl(ctx, variable);
3935 break;
3936 default:
3937 break;
3938 }
3939
3940 }
3941
3942 static void
3943 handle_fs_inputs_pre(struct nir_to_llvm_context *ctx,
3944 struct nir_shader *nir)
3945 {
3946 unsigned index = 0;
3947 for (unsigned i = 0; i < RADEON_LLVM_MAX_INPUTS; ++i) {
3948 LLVMValueRef interp_param;
3949 LLVMValueRef *inputs = ctx->inputs +radeon_llvm_reg_index_soa(i, 0);
3950
3951 if (!(ctx->input_mask & (1ull << i)))
3952 continue;
3953
3954 if (i >= VARYING_SLOT_VAR0 || i == VARYING_SLOT_PNTC) {
3955 interp_param = *inputs;
3956 interp_fs_input(ctx, index, interp_param, ctx->prim_mask,
3957 inputs);
3958
3959 if (!interp_param)
3960 ctx->shader_info->fs.flat_shaded_mask |= 1u << index;
3961 ++index;
3962 } else if (i == VARYING_SLOT_POS) {
3963 for(int i = 0; i < 3; ++i)
3964 inputs[i] = ctx->frag_pos[i];
3965
3966 inputs[3] = emit_fdiv(ctx, ctx->f32one, ctx->frag_pos[3]);
3967 }
3968 }
3969 ctx->shader_info->fs.num_interp = index;
3970 if (ctx->input_mask & (1 << VARYING_SLOT_PNTC))
3971 ctx->shader_info->fs.has_pcoord = true;
3972 ctx->shader_info->fs.input_mask = ctx->input_mask >> VARYING_SLOT_VAR0;
3973 }
3974
3975 static LLVMValueRef
3976 ac_build_alloca(struct nir_to_llvm_context *ctx,
3977 LLVMTypeRef type,
3978 const char *name)
3979 {
3980 LLVMBuilderRef builder = ctx->builder;
3981 LLVMBasicBlockRef current_block = LLVMGetInsertBlock(builder);
3982 LLVMValueRef function = LLVMGetBasicBlockParent(current_block);
3983 LLVMBasicBlockRef first_block = LLVMGetEntryBasicBlock(function);
3984 LLVMValueRef first_instr = LLVMGetFirstInstruction(first_block);
3985 LLVMBuilderRef first_builder = LLVMCreateBuilderInContext(ctx->context);
3986 LLVMValueRef res;
3987
3988 if (first_instr) {
3989 LLVMPositionBuilderBefore(first_builder, first_instr);
3990 } else {
3991 LLVMPositionBuilderAtEnd(first_builder, first_block);
3992 }
3993
3994 res = LLVMBuildAlloca(first_builder, type, name);
3995 LLVMBuildStore(builder, LLVMConstNull(type), res);
3996
3997 LLVMDisposeBuilder(first_builder);
3998
3999 return res;
4000 }
4001
4002 static LLVMValueRef si_build_alloca_undef(struct nir_to_llvm_context *ctx,
4003 LLVMTypeRef type,
4004 const char *name)
4005 {
4006 LLVMValueRef ptr = ac_build_alloca(ctx, type, name);
4007 LLVMBuildStore(ctx->builder, LLVMGetUndef(type), ptr);
4008 return ptr;
4009 }
4010
4011 static void
4012 handle_shader_output_decl(struct nir_to_llvm_context *ctx,
4013 struct nir_variable *variable)
4014 {
4015 int idx = variable->data.location;
4016 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4017
4018 variable->data.driver_location = idx * 4;
4019
4020 if (ctx->stage == MESA_SHADER_VERTEX) {
4021
4022 if (idx == VARYING_SLOT_CLIP_DIST0 ||
4023 idx == VARYING_SLOT_CULL_DIST0) {
4024 int length = glsl_get_length(variable->type);
4025 if (idx == VARYING_SLOT_CLIP_DIST0) {
4026 ctx->shader_info->vs.clip_dist_mask = (1 << length) - 1;
4027 ctx->num_clips = length;
4028 } else if (idx == VARYING_SLOT_CULL_DIST0) {
4029 ctx->shader_info->vs.cull_dist_mask = (1 << length) - 1;
4030 ctx->num_culls = length;
4031 }
4032 if (length > 4)
4033 attrib_count = 2;
4034 else
4035 attrib_count = 1;
4036 }
4037 }
4038
4039 for (unsigned i = 0; i < attrib_count; ++i) {
4040 for (unsigned chan = 0; chan < 4; chan++) {
4041 ctx->outputs[radeon_llvm_reg_index_soa(idx + i, chan)] =
4042 si_build_alloca_undef(ctx, ctx->f32, "");
4043 }
4044 }
4045 ctx->output_mask |= ((1ull << attrib_count) - 1) << variable->data.location;
4046 }
4047
4048 static void
4049 setup_locals(struct nir_to_llvm_context *ctx,
4050 struct nir_function *func)
4051 {
4052 int i, j;
4053 ctx->num_locals = 0;
4054 nir_foreach_variable(variable, &func->impl->locals) {
4055 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4056 variable->data.driver_location = ctx->num_locals * 4;
4057 ctx->num_locals += attrib_count;
4058 }
4059 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4060 if (!ctx->locals)
4061 return;
4062
4063 for (i = 0; i < ctx->num_locals; i++) {
4064 for (j = 0; j < 4; j++) {
4065 ctx->locals[i * 4 + j] =
4066 si_build_alloca_undef(ctx, ctx->f32, "temp");
4067 }
4068 }
4069 }
4070
4071 static LLVMValueRef
4072 emit_float_saturate(struct nir_to_llvm_context *ctx, LLVMValueRef v, float lo, float hi)
4073 {
4074 v = to_float(ctx, v);
4075 v = emit_intrin_2f_param(ctx, "llvm.maxnum.f32", v, LLVMConstReal(ctx->f32, lo));
4076 return emit_intrin_2f_param(ctx, "llvm.minnum.f32", v, LLVMConstReal(ctx->f32, hi));
4077 }
4078
4079
4080 static LLVMValueRef emit_pack_int16(struct nir_to_llvm_context *ctx,
4081 LLVMValueRef src0, LLVMValueRef src1)
4082 {
4083 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
4084 LLVMValueRef comp[2];
4085
4086 comp[0] = LLVMBuildAnd(ctx->builder, src0, LLVMConstInt(ctx-> i32, 65535, 0), "");
4087 comp[1] = LLVMBuildAnd(ctx->builder, src1, LLVMConstInt(ctx-> i32, 65535, 0), "");
4088 comp[1] = LLVMBuildShl(ctx->builder, comp[1], const16, "");
4089 return LLVMBuildOr(ctx->builder, comp[0], comp[1], "");
4090 }
4091
4092 /* Initialize arguments for the shader export intrinsic */
4093 static void
4094 si_llvm_init_export_args(struct nir_to_llvm_context *ctx,
4095 LLVMValueRef *values,
4096 unsigned target,
4097 LLVMValueRef *args)
4098 {
4099 /* Default is 0xf. Adjusted below depending on the format. */
4100 args[0] = LLVMConstInt(ctx->i32, target != V_008DFC_SQ_EXP_NULL ? 0xf : 0, false);
4101 /* Specify whether the EXEC mask represents the valid mask */
4102 args[1] = LLVMConstInt(ctx->i32, 0, false);
4103
4104 /* Specify whether this is the last export */
4105 args[2] = LLVMConstInt(ctx->i32, 0, false);
4106 /* Specify the target we are exporting */
4107 args[3] = LLVMConstInt(ctx->i32, target, false);
4108
4109 args[4] = LLVMConstInt(ctx->i32, 0, false); /* COMPR flag */
4110 args[5] = LLVMGetUndef(ctx->f32);
4111 args[6] = LLVMGetUndef(ctx->f32);
4112 args[7] = LLVMGetUndef(ctx->f32);
4113 args[8] = LLVMGetUndef(ctx->f32);
4114
4115 if (!values)
4116 return;
4117
4118 if (ctx->stage == MESA_SHADER_FRAGMENT && target >= V_008DFC_SQ_EXP_MRT) {
4119 LLVMValueRef val[4];
4120 unsigned index = target - V_008DFC_SQ_EXP_MRT;
4121 unsigned col_format = (ctx->options->key.fs.col_format >> (4 * index)) & 0xf;
4122 bool is_int8 = (ctx->options->key.fs.is_int8 >> index) & 1;
4123
4124 switch(col_format) {
4125 case V_028714_SPI_SHADER_ZERO:
4126 args[0] = LLVMConstInt(ctx->i32, 0x0, 0);
4127 args[3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_NULL, 0);
4128 break;
4129
4130 case V_028714_SPI_SHADER_32_R:
4131 args[0] = LLVMConstInt(ctx->i32, 0x1, 0);
4132 args[5] = values[0];
4133 break;
4134
4135 case V_028714_SPI_SHADER_32_GR:
4136 args[0] = LLVMConstInt(ctx->i32, 0x3, 0);
4137 args[5] = values[0];
4138 args[6] = values[1];
4139 break;
4140
4141 case V_028714_SPI_SHADER_32_AR:
4142 args[0] = LLVMConstInt(ctx->i32, 0x9, 0);
4143 args[5] = values[0];
4144 args[8] = values[3];
4145 break;
4146
4147 case V_028714_SPI_SHADER_FP16_ABGR:
4148 args[4] = ctx->i32one;
4149
4150 for (unsigned chan = 0; chan < 2; chan++) {
4151 LLVMValueRef pack_args[2] = {
4152 values[2 * chan],
4153 values[2 * chan + 1]
4154 };
4155 LLVMValueRef packed;
4156
4157 packed = emit_llvm_intrinsic(ctx, "llvm.SI.packf16",
4158 ctx->i32, pack_args, 2,
4159 AC_FUNC_ATTR_READNONE);
4160 args[chan + 5] = packed;
4161 }
4162 break;
4163
4164 case V_028714_SPI_SHADER_UNORM16_ABGR:
4165 for (unsigned chan = 0; chan < 4; chan++) {
4166 val[chan] = emit_float_saturate(ctx, values[chan], 0, 1);
4167 val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
4168 LLVMConstReal(ctx->f32, 65535), "");
4169 val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
4170 LLVMConstReal(ctx->f32, 0.5), "");
4171 val[chan] = LLVMBuildFPToUI(ctx->builder, val[chan],
4172 ctx->i32, "");
4173 }
4174
4175 args[4] = ctx->i32one;
4176 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4177 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4178 break;
4179
4180 case V_028714_SPI_SHADER_SNORM16_ABGR:
4181 for (unsigned chan = 0; chan < 4; chan++) {
4182 val[chan] = emit_float_saturate(ctx, values[chan], -1, 1);
4183 val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
4184 LLVMConstReal(ctx->f32, 32767), "");
4185
4186 /* If positive, add 0.5, else add -0.5. */
4187 val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
4188 LLVMBuildSelect(ctx->builder,
4189 LLVMBuildFCmp(ctx->builder, LLVMRealOGE,
4190 val[chan], ctx->f32zero, ""),
4191 LLVMConstReal(ctx->f32, 0.5),
4192 LLVMConstReal(ctx->f32, -0.5), ""), "");
4193 val[chan] = LLVMBuildFPToSI(ctx->builder, val[chan], ctx->i32, "");
4194 }
4195
4196 args[4] = ctx->i32one;
4197 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4198 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4199 break;
4200
4201 case V_028714_SPI_SHADER_UINT16_ABGR: {
4202 LLVMValueRef max = LLVMConstInt(ctx->i32, is_int8 ? 255 : 65535, 0);
4203
4204 for (unsigned chan = 0; chan < 4; chan++) {
4205 val[chan] = to_integer(ctx, values[chan]);
4206 val[chan] = emit_minmax_int(ctx, LLVMIntULT, val[chan], max);
4207 }
4208
4209 args[4] = ctx->i32one;
4210 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4211 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4212 break;
4213 }
4214
4215 case V_028714_SPI_SHADER_SINT16_ABGR: {
4216 LLVMValueRef max = LLVMConstInt(ctx->i32, is_int8 ? 127 : 32767, 0);
4217 LLVMValueRef min = LLVMConstInt(ctx->i32, is_int8 ? -128 : -32768, 0);
4218
4219 /* Clamp. */
4220 for (unsigned chan = 0; chan < 4; chan++) {
4221 val[chan] = to_integer(ctx, values[chan]);
4222 val[chan] = emit_minmax_int(ctx, LLVMIntSLT, val[chan], max);
4223 val[chan] = emit_minmax_int(ctx, LLVMIntSGT, val[chan], min);
4224 }
4225
4226 args[4] = ctx->i32one;
4227 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4228 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4229 break;
4230 }
4231
4232 default:
4233 case V_028714_SPI_SHADER_32_ABGR:
4234 memcpy(&args[5], values, sizeof(values[0]) * 4);
4235 break;
4236 }
4237 } else
4238 memcpy(&args[5], values, sizeof(values[0]) * 4);
4239
4240 for (unsigned i = 5; i < 9; ++i)
4241 args[i] = to_float(ctx, args[i]);
4242 }
4243
4244 static void
4245 handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
4246 struct nir_shader *nir)
4247 {
4248 uint32_t param_count = 0;
4249 unsigned target;
4250 unsigned pos_idx, num_pos_exports = 0;
4251 LLVMValueRef args[9];
4252 LLVMValueRef pos_args[4][9] = { { 0 } };
4253 LLVMValueRef psize_value = 0;
4254 int i;
4255 const uint64_t clip_mask = ctx->output_mask & ((1ull << VARYING_SLOT_CLIP_DIST0) |
4256 (1ull << VARYING_SLOT_CLIP_DIST1) |
4257 (1ull << VARYING_SLOT_CULL_DIST0) |
4258 (1ull << VARYING_SLOT_CULL_DIST1));
4259
4260 if (clip_mask) {
4261 LLVMValueRef slots[8];
4262 unsigned j;
4263
4264 if (ctx->shader_info->vs.cull_dist_mask)
4265 ctx->shader_info->vs.cull_dist_mask <<= ctx->num_clips;
4266
4267 i = VARYING_SLOT_CLIP_DIST0;
4268 for (j = 0; j < ctx->num_clips; j++)
4269 slots[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4270 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4271 i = VARYING_SLOT_CULL_DIST0;
4272 for (j = 0; j < ctx->num_culls; j++)
4273 slots[ctx->num_clips + j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4274 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4275
4276 for (i = ctx->num_clips + ctx->num_culls; i < 8; i++)
4277 slots[i] = LLVMGetUndef(ctx->f32);
4278
4279 if (ctx->num_clips + ctx->num_culls > 4) {
4280 target = V_008DFC_SQ_EXP_POS + 3;
4281 si_llvm_init_export_args(ctx, &slots[4], target, args);
4282 memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
4283 args, sizeof(args));
4284 }
4285
4286 target = V_008DFC_SQ_EXP_POS + 2;
4287 si_llvm_init_export_args(ctx, &slots[0], target, args);
4288 memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
4289 args, sizeof(args));
4290
4291 }
4292
4293 for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
4294 LLVMValueRef values[4];
4295 if (!(ctx->output_mask & (1ull << i)))
4296 continue;
4297
4298 for (unsigned j = 0; j < 4; j++)
4299 values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4300 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4301
4302 if (i == VARYING_SLOT_POS) {
4303 target = V_008DFC_SQ_EXP_POS;
4304 } else if (i == VARYING_SLOT_CLIP_DIST0 ||
4305 i == VARYING_SLOT_CLIP_DIST1 ||
4306 i == VARYING_SLOT_CULL_DIST0 ||
4307 i == VARYING_SLOT_CULL_DIST1) {
4308 continue;
4309 } else if (i == VARYING_SLOT_PSIZ) {
4310 ctx->shader_info->vs.writes_pointsize = true;
4311 psize_value = values[0];
4312 continue;
4313 } else if (i >= VARYING_SLOT_VAR0) {
4314 ctx->shader_info->vs.export_mask |= 1u << (i - VARYING_SLOT_VAR0);
4315 target = V_008DFC_SQ_EXP_PARAM + param_count;
4316 param_count++;
4317 }
4318
4319 si_llvm_init_export_args(ctx, values, target, args);
4320
4321 if (target >= V_008DFC_SQ_EXP_POS &&
4322 target <= (V_008DFC_SQ_EXP_POS + 3)) {
4323 memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
4324 args, sizeof(args));
4325 } else {
4326 emit_llvm_intrinsic(ctx,
4327 "llvm.SI.export",
4328 LLVMVoidTypeInContext(ctx->context),
4329 args, 9, 0);
4330 }
4331 }
4332
4333 /* We need to add the position output manually if it's missing. */
4334 if (!pos_args[0][0]) {
4335 pos_args[0][0] = LLVMConstInt(ctx->i32, 0xf, false);
4336 pos_args[0][1] = ctx->i32zero; /* EXEC mask */
4337 pos_args[0][2] = ctx->i32zero; /* last export? */
4338 pos_args[0][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS, false);
4339 pos_args[0][4] = ctx->i32zero; /* COMPR flag */
4340 pos_args[0][5] = ctx->f32zero; /* X */
4341 pos_args[0][6] = ctx->f32zero; /* Y */
4342 pos_args[0][7] = ctx->f32zero; /* Z */
4343 pos_args[0][8] = ctx->f32one; /* W */
4344 }
4345
4346 if (ctx->shader_info->vs.writes_pointsize == true) {
4347 pos_args[1][0] = LLVMConstInt(ctx->i32, (ctx->shader_info->vs.writes_pointsize == true), false); /* writemask */
4348 pos_args[1][1] = ctx->i32zero; /* EXEC mask */
4349 pos_args[1][2] = ctx->i32zero; /* last export? */
4350 pos_args[1][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS + 1, false);
4351 pos_args[1][4] = ctx->i32zero; /* COMPR flag */
4352 pos_args[1][5] = ctx->f32zero; /* X */
4353 pos_args[1][6] = ctx->f32zero; /* Y */
4354 pos_args[1][7] = ctx->f32zero; /* Z */
4355 pos_args[1][8] = ctx->f32zero; /* W */
4356
4357 if (ctx->shader_info->vs.writes_pointsize == true)
4358 pos_args[1][5] = psize_value;
4359 }
4360 for (i = 0; i < 4; i++) {
4361 if (pos_args[i][0])
4362 num_pos_exports++;
4363 }
4364
4365 pos_idx = 0;
4366 for (i = 0; i < 4; i++) {
4367 if (!pos_args[i][0])
4368 continue;
4369
4370 /* Specify the target we are exporting */
4371 pos_args[i][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS + pos_idx++, false);
4372 if (pos_idx == num_pos_exports)
4373 pos_args[i][2] = ctx->i32one;
4374 emit_llvm_intrinsic(ctx,
4375 "llvm.SI.export",
4376 LLVMVoidTypeInContext(ctx->context),
4377 pos_args[i], 9, 0);
4378 }
4379
4380 ctx->shader_info->vs.pos_exports = num_pos_exports;
4381 ctx->shader_info->vs.param_exports = param_count;
4382 }
4383
4384 static void
4385 si_export_mrt_color(struct nir_to_llvm_context *ctx,
4386 LLVMValueRef *color, unsigned param, bool is_last)
4387 {
4388 LLVMValueRef args[9];
4389 /* Export */
4390 si_llvm_init_export_args(ctx, color, param,
4391 args);
4392
4393 if (is_last) {
4394 args[1] = ctx->i32one; /* whether the EXEC mask is valid */
4395 args[2] = ctx->i32one; /* DONE bit */
4396 } else if (args[0] == ctx->i32zero)
4397 return; /* unnecessary NULL export */
4398
4399 emit_llvm_intrinsic(ctx, "llvm.SI.export",
4400 ctx->voidt, args, 9, 0);
4401 }
4402
4403 static void
4404 si_export_mrt_z(struct nir_to_llvm_context *ctx,
4405 LLVMValueRef depth, LLVMValueRef stencil,
4406 LLVMValueRef samplemask)
4407 {
4408 LLVMValueRef args[9];
4409 unsigned mask = 0;
4410 args[1] = ctx->i32one; /* whether the EXEC mask is valid */
4411 args[2] = ctx->i32one; /* DONE bit */
4412 /* Specify the target we are exporting */
4413 args[3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_MRTZ, false);
4414
4415 args[4] = ctx->i32zero; /* COMP flag */
4416 args[5] = LLVMGetUndef(ctx->f32); /* R, depth */
4417 args[6] = LLVMGetUndef(ctx->f32); /* G, stencil test val[0:7], stencil op val[8:15] */
4418 args[7] = LLVMGetUndef(ctx->f32); /* B, sample mask */
4419 args[8] = LLVMGetUndef(ctx->f32); /* A, alpha to mask */
4420
4421 if (depth) {
4422 args[5] = depth;
4423 mask |= 0x1;
4424 }
4425
4426 if (stencil) {
4427 args[6] = stencil;
4428 mask |= 0x2;
4429 }
4430
4431 if (samplemask) {
4432 args[7] = samplemask;
4433 mask |= 0x04;
4434 }
4435
4436 /* SI (except OLAND) has a bug that it only looks
4437 * at the X writemask component. */
4438 if (ctx->options->chip_class == SI &&
4439 ctx->options->family != CHIP_OLAND)
4440 mask |= 0x01;
4441
4442 args[0] = LLVMConstInt(ctx->i32, mask, false);
4443 emit_llvm_intrinsic(ctx, "llvm.SI.export",
4444 ctx->voidt, args, 9, 0);
4445 }
4446
4447 static void
4448 handle_fs_outputs_post(struct nir_to_llvm_context *ctx,
4449 struct nir_shader *nir)
4450 {
4451 unsigned index = 0;
4452 LLVMValueRef depth = NULL, stencil = NULL, samplemask = NULL;
4453
4454 for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
4455 LLVMValueRef values[4];
4456
4457 if (!(ctx->output_mask & (1ull << i)))
4458 continue;
4459
4460 if (i == FRAG_RESULT_DEPTH) {
4461 ctx->shader_info->fs.writes_z = true;
4462 depth = to_float(ctx, LLVMBuildLoad(ctx->builder,
4463 ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
4464 } else if (i == FRAG_RESULT_STENCIL) {
4465 ctx->shader_info->fs.writes_stencil = true;
4466 stencil = to_float(ctx, LLVMBuildLoad(ctx->builder,
4467 ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
4468 } else {
4469 bool last = false;
4470 for (unsigned j = 0; j < 4; j++)
4471 values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4472 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4473
4474 if (!ctx->shader_info->fs.writes_z && !ctx->shader_info->fs.writes_stencil)
4475 last = ctx->output_mask <= ((1ull << (i + 1)) - 1);
4476
4477 si_export_mrt_color(ctx, values, V_008DFC_SQ_EXP_MRT + index, last);
4478 index++;
4479 }
4480 }
4481
4482 if (depth || stencil)
4483 si_export_mrt_z(ctx, depth, stencil, samplemask);
4484 else if (!index)
4485 si_export_mrt_color(ctx, NULL, V_008DFC_SQ_EXP_NULL, true);
4486
4487 ctx->shader_info->fs.output_mask = index ? ((1ull << index) - 1) : 0;
4488 }
4489
4490 static void
4491 handle_shader_outputs_post(struct nir_to_llvm_context *ctx,
4492 struct nir_shader *nir)
4493 {
4494 switch (ctx->stage) {
4495 case MESA_SHADER_VERTEX:
4496 handle_vs_outputs_post(ctx, nir);
4497 break;
4498 case MESA_SHADER_FRAGMENT:
4499 handle_fs_outputs_post(ctx, nir);
4500 break;
4501 default:
4502 break;
4503 }
4504 }
4505
4506 static void
4507 handle_shared_compute_var(struct nir_to_llvm_context *ctx,
4508 struct nir_variable *variable, uint32_t *offset, int idx)
4509 {
4510 unsigned size = glsl_count_attribute_slots(variable->type, false);
4511 variable->data.driver_location = *offset;
4512 *offset += size;
4513 }
4514
4515 static void ac_llvm_finalize_module(struct nir_to_llvm_context * ctx)
4516 {
4517 LLVMPassManagerRef passmgr;
4518 /* Create the pass manager */
4519 passmgr = LLVMCreateFunctionPassManagerForModule(
4520 ctx->module);
4521
4522 /* This pass should eliminate all the load and store instructions */
4523 LLVMAddPromoteMemoryToRegisterPass(passmgr);
4524
4525 /* Add some optimization passes */
4526 LLVMAddScalarReplAggregatesPass(passmgr);
4527 LLVMAddLICMPass(passmgr);
4528 LLVMAddAggressiveDCEPass(passmgr);
4529 LLVMAddCFGSimplificationPass(passmgr);
4530 LLVMAddInstructionCombiningPass(passmgr);
4531
4532 /* Run the pass */
4533 LLVMInitializeFunctionPassManager(passmgr);
4534 LLVMRunFunctionPassManager(passmgr, ctx->main_function);
4535 LLVMFinalizeFunctionPassManager(passmgr);
4536
4537 LLVMDisposeBuilder(ctx->builder);
4538 LLVMDisposePassManager(passmgr);
4539 }
4540
4541 static
4542 LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
4543 struct nir_shader *nir,
4544 struct ac_shader_variant_info *shader_info,
4545 const struct ac_nir_compiler_options *options)
4546 {
4547 struct nir_to_llvm_context ctx = {0};
4548 struct nir_function *func;
4549 ctx.options = options;
4550 ctx.shader_info = shader_info;
4551 ctx.context = LLVMContextCreate();
4552 ctx.module = LLVMModuleCreateWithNameInContext("shader", ctx.context);
4553
4554 memset(shader_info, 0, sizeof(*shader_info));
4555
4556 LLVMSetTarget(ctx.module, "amdgcn--");
4557 setup_types(&ctx);
4558
4559 ctx.builder = LLVMCreateBuilderInContext(ctx.context);
4560 ctx.stage = nir->stage;
4561
4562 create_function(&ctx, nir);
4563
4564 if (nir->stage == MESA_SHADER_COMPUTE) {
4565 int num_shared = 0;
4566 nir_foreach_variable(variable, &nir->shared)
4567 num_shared++;
4568 if (num_shared) {
4569 int idx = 0;
4570 uint32_t shared_size = 0;
4571 LLVMValueRef var;
4572 LLVMTypeRef i8p = LLVMPointerType(ctx.i8, LOCAL_ADDR_SPACE);
4573 nir_foreach_variable(variable, &nir->shared) {
4574 handle_shared_compute_var(&ctx, variable, &shared_size, idx);
4575 idx++;
4576 }
4577
4578 shared_size *= 4;
4579 var = LLVMAddGlobalInAddressSpace(ctx.module,
4580 LLVMArrayType(ctx.i8, shared_size),
4581 "compute_lds",
4582 LOCAL_ADDR_SPACE);
4583 LLVMSetAlignment(var, 4);
4584 ctx.shared_memory = LLVMBuildBitCast(ctx.builder, var, i8p, "");
4585 }
4586 }
4587
4588 nir_foreach_variable(variable, &nir->inputs)
4589 handle_shader_input_decl(&ctx, variable);
4590
4591 if (nir->stage == MESA_SHADER_FRAGMENT)
4592 handle_fs_inputs_pre(&ctx, nir);
4593
4594 nir_foreach_variable(variable, &nir->outputs)
4595 handle_shader_output_decl(&ctx, variable);
4596
4597 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4598 _mesa_key_pointer_equal);
4599 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4600 _mesa_key_pointer_equal);
4601
4602 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4603
4604 setup_locals(&ctx, func);
4605
4606 visit_cf_list(&ctx, &func->impl->body);
4607 phi_post_pass(&ctx);
4608
4609 handle_shader_outputs_post(&ctx, nir);
4610 LLVMBuildRetVoid(ctx.builder);
4611
4612 ac_llvm_finalize_module(&ctx);
4613 free(ctx.locals);
4614 ralloc_free(ctx.defs);
4615 ralloc_free(ctx.phis);
4616
4617 return ctx.module;
4618 }
4619
4620 static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di, void *context)
4621 {
4622 unsigned *retval = (unsigned *)context;
4623 LLVMDiagnosticSeverity severity = LLVMGetDiagInfoSeverity(di);
4624 char *description = LLVMGetDiagInfoDescription(di);
4625
4626 if (severity == LLVMDSError) {
4627 *retval = 1;
4628 fprintf(stderr, "LLVM triggered Diagnostic Handler: %s\n",
4629 description);
4630 }
4631
4632 LLVMDisposeMessage(description);
4633 }
4634
4635 static unsigned ac_llvm_compile(LLVMModuleRef M,
4636 struct ac_shader_binary *binary,
4637 LLVMTargetMachineRef tm)
4638 {
4639 unsigned retval = 0;
4640 char *err;
4641 LLVMContextRef llvm_ctx;
4642 LLVMMemoryBufferRef out_buffer;
4643 unsigned buffer_size;
4644 const char *buffer_data;
4645 LLVMBool mem_err;
4646
4647 /* Setup Diagnostic Handler*/
4648 llvm_ctx = LLVMGetModuleContext(M);
4649
4650 LLVMContextSetDiagnosticHandler(llvm_ctx, ac_diagnostic_handler,
4651 &retval);
4652
4653 /* Compile IR*/
4654 mem_err = LLVMTargetMachineEmitToMemoryBuffer(tm, M, LLVMObjectFile,
4655 &err, &out_buffer);
4656
4657 /* Process Errors/Warnings */
4658 if (mem_err) {
4659 fprintf(stderr, "%s: %s", __FUNCTION__, err);
4660 free(err);
4661 retval = 1;
4662 goto out;
4663 }
4664
4665 /* Extract Shader Code*/
4666 buffer_size = LLVMGetBufferSize(out_buffer);
4667 buffer_data = LLVMGetBufferStart(out_buffer);
4668
4669 ac_elf_read(buffer_data, buffer_size, binary);
4670
4671 /* Clean up */
4672 LLVMDisposeMemoryBuffer(out_buffer);
4673
4674 out:
4675 return retval;
4676 }
4677
4678 void ac_compile_nir_shader(LLVMTargetMachineRef tm,
4679 struct ac_shader_binary *binary,
4680 struct ac_shader_config *config,
4681 struct ac_shader_variant_info *shader_info,
4682 struct nir_shader *nir,
4683 const struct ac_nir_compiler_options *options,
4684 bool dump_shader)
4685 {
4686
4687 LLVMModuleRef llvm_module = ac_translate_nir_to_llvm(tm, nir, shader_info,
4688 options);
4689 if (dump_shader)
4690 LLVMDumpModule(llvm_module);
4691
4692 memset(binary, 0, sizeof(*binary));
4693 int v = ac_llvm_compile(llvm_module, binary, tm);
4694 if (v) {
4695 fprintf(stderr, "compile failed\n");
4696 }
4697
4698 if (dump_shader)
4699 fprintf(stderr, "disasm:\n%s\n", binary->disasm_string);
4700
4701 ac_shader_binary_read_config(binary, config, 0);
4702
4703 LLVMContextRef ctx = LLVMGetModuleContext(llvm_module);
4704 LLVMDisposeModule(llvm_module);
4705 LLVMContextDispose(ctx);
4706
4707 if (nir->stage == MESA_SHADER_FRAGMENT) {
4708 shader_info->num_input_vgprs = 0;
4709 if (G_0286CC_PERSP_SAMPLE_ENA(config->spi_ps_input_addr))
4710 shader_info->num_input_vgprs += 2;
4711 if (G_0286CC_PERSP_CENTER_ENA(config->spi_ps_input_addr))
4712 shader_info->num_input_vgprs += 2;
4713 if (G_0286CC_PERSP_CENTROID_ENA(config->spi_ps_input_addr))
4714 shader_info->num_input_vgprs += 2;
4715 if (G_0286CC_PERSP_PULL_MODEL_ENA(config->spi_ps_input_addr))
4716 shader_info->num_input_vgprs += 3;
4717 if (G_0286CC_LINEAR_SAMPLE_ENA(config->spi_ps_input_addr))
4718 shader_info->num_input_vgprs += 2;
4719 if (G_0286CC_LINEAR_CENTER_ENA(config->spi_ps_input_addr))
4720 shader_info->num_input_vgprs += 2;
4721 if (G_0286CC_LINEAR_CENTROID_ENA(config->spi_ps_input_addr))
4722 shader_info->num_input_vgprs += 2;
4723 if (G_0286CC_LINE_STIPPLE_TEX_ENA(config->spi_ps_input_addr))
4724 shader_info->num_input_vgprs += 1;
4725 if (G_0286CC_POS_X_FLOAT_ENA(config->spi_ps_input_addr))
4726 shader_info->num_input_vgprs += 1;
4727 if (G_0286CC_POS_Y_FLOAT_ENA(config->spi_ps_input_addr))
4728 shader_info->num_input_vgprs += 1;
4729 if (G_0286CC_POS_Z_FLOAT_ENA(config->spi_ps_input_addr))
4730 shader_info->num_input_vgprs += 1;
4731 if (G_0286CC_POS_W_FLOAT_ENA(config->spi_ps_input_addr))
4732 shader_info->num_input_vgprs += 1;
4733 if (G_0286CC_FRONT_FACE_ENA(config->spi_ps_input_addr))
4734 shader_info->num_input_vgprs += 1;
4735 if (G_0286CC_ANCILLARY_ENA(config->spi_ps_input_addr))
4736 shader_info->num_input_vgprs += 1;
4737 if (G_0286CC_SAMPLE_COVERAGE_ENA(config->spi_ps_input_addr))
4738 shader_info->num_input_vgprs += 1;
4739 if (G_0286CC_POS_FIXED_PT_ENA(config->spi_ps_input_addr))
4740 shader_info->num_input_vgprs += 1;
4741 }
4742 config->num_vgprs = MAX2(config->num_vgprs, shader_info->num_input_vgprs);
4743
4744 /* +3 for scratch wave offset and VCC */
4745 config->num_sgprs = MAX2(config->num_sgprs,
4746 shader_info->num_input_sgprs + 3);
4747 if (nir->stage == MESA_SHADER_COMPUTE) {
4748 for (int i = 0; i < 3; ++i)
4749 shader_info->cs.block_size[i] = nir->info->cs.local_size[i];
4750 }
4751
4752 if (nir->stage == MESA_SHADER_FRAGMENT)
4753 shader_info->fs.early_fragment_test = nir->info->fs.early_fragment_tests;
4754 }