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ac,radv: do not emit vec3 for raw load/store on SI
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41
42 LLVMValueRef *ssa_defs;
43
44 struct hash_table *defs;
45 struct hash_table *phis;
46 struct hash_table *vars;
47
48 LLVMValueRef main_function;
49 LLVMBasicBlockRef continue_block;
50 LLVMBasicBlockRef break_block;
51
52 int num_locals;
53 LLVMValueRef *locals;
54 };
55
56 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
57 nir_deref_instr *deref_instr,
58 enum ac_descriptor_type desc_type,
59 const nir_instr *instr,
60 bool image, bool write);
61
62 static void
63 build_store_values_extended(struct ac_llvm_context *ac,
64 LLVMValueRef *values,
65 unsigned value_count,
66 unsigned value_stride,
67 LLVMValueRef vec)
68 {
69 LLVMBuilderRef builder = ac->builder;
70 unsigned i;
71
72 for (i = 0; i < value_count; i++) {
73 LLVMValueRef ptr = values[i * value_stride];
74 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
75 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
76 LLVMBuildStore(builder, value, ptr);
77 }
78 }
79
80 static enum ac_image_dim
81 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
82 bool is_array)
83 {
84 switch (dim) {
85 case GLSL_SAMPLER_DIM_1D:
86 if (ctx->chip_class >= GFX9)
87 return is_array ? ac_image_2darray : ac_image_2d;
88 return is_array ? ac_image_1darray : ac_image_1d;
89 case GLSL_SAMPLER_DIM_2D:
90 case GLSL_SAMPLER_DIM_RECT:
91 case GLSL_SAMPLER_DIM_EXTERNAL:
92 return is_array ? ac_image_2darray : ac_image_2d;
93 case GLSL_SAMPLER_DIM_3D:
94 return ac_image_3d;
95 case GLSL_SAMPLER_DIM_CUBE:
96 return ac_image_cube;
97 case GLSL_SAMPLER_DIM_MS:
98 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
99 case GLSL_SAMPLER_DIM_SUBPASS:
100 return ac_image_2darray;
101 case GLSL_SAMPLER_DIM_SUBPASS_MS:
102 return ac_image_2darraymsaa;
103 default:
104 unreachable("bad sampler dim");
105 }
106 }
107
108 static enum ac_image_dim
109 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
110 bool is_array)
111 {
112 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
113
114 if (dim == ac_image_cube ||
115 (ctx->chip_class <= GFX8 && dim == ac_image_3d))
116 dim = ac_image_2darray;
117
118 return dim;
119 }
120
121 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
122 const nir_ssa_def *def)
123 {
124 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
125 if (def->num_components > 1) {
126 type = LLVMVectorType(type, def->num_components);
127 }
128 return type;
129 }
130
131 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
132 {
133 assert(src.is_ssa);
134 return nir->ssa_defs[src.ssa->index];
135 }
136
137 static LLVMValueRef
138 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
139 {
140 LLVMValueRef ptr = get_src(ctx, src);
141 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
142 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
143
144 return LLVMBuildBitCast(ctx->ac.builder, ptr,
145 LLVMPointerType(ctx->ac.i32, addr_space), "");
146 }
147
148 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
149 const struct nir_block *b)
150 {
151 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
152 return (LLVMBasicBlockRef)entry->data;
153 }
154
155 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
156 nir_alu_src src,
157 unsigned num_components)
158 {
159 LLVMValueRef value = get_src(ctx, src.src);
160 bool need_swizzle = false;
161
162 assert(value);
163 unsigned src_components = ac_get_llvm_num_components(value);
164 for (unsigned i = 0; i < num_components; ++i) {
165 assert(src.swizzle[i] < src_components);
166 if (src.swizzle[i] != i)
167 need_swizzle = true;
168 }
169
170 if (need_swizzle || num_components != src_components) {
171 LLVMValueRef masks[] = {
172 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
173 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
174 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
175 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
176
177 if (src_components > 1 && num_components == 1) {
178 value = LLVMBuildExtractElement(ctx->ac.builder, value,
179 masks[0], "");
180 } else if (src_components == 1 && num_components > 1) {
181 LLVMValueRef values[] = {value, value, value, value};
182 value = ac_build_gather_values(&ctx->ac, values, num_components);
183 } else {
184 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
185 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
186 swizzle, "");
187 }
188 }
189 assert(!src.negate);
190 assert(!src.abs);
191 return value;
192 }
193
194 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
195 LLVMIntPredicate pred, LLVMValueRef src0,
196 LLVMValueRef src1)
197 {
198 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
199 return LLVMBuildSelect(ctx->builder, result,
200 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
201 ctx->i32_0, "");
202 }
203
204 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
205 LLVMRealPredicate pred, LLVMValueRef src0,
206 LLVMValueRef src1)
207 {
208 LLVMValueRef result;
209 src0 = ac_to_float(ctx, src0);
210 src1 = ac_to_float(ctx, src1);
211 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
212 return LLVMBuildSelect(ctx->builder, result,
213 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
214 ctx->i32_0, "");
215 }
216
217 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
218 const char *intrin,
219 LLVMTypeRef result_type,
220 LLVMValueRef src0)
221 {
222 char name[64];
223 LLVMValueRef params[] = {
224 ac_to_float(ctx, src0),
225 };
226
227 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
228 ac_get_elem_bits(ctx, result_type));
229 assert(length < sizeof(name));
230 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
231 }
232
233 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
234 const char *intrin,
235 LLVMTypeRef result_type,
236 LLVMValueRef src0, LLVMValueRef src1)
237 {
238 char name[64];
239 LLVMValueRef params[] = {
240 ac_to_float(ctx, src0),
241 ac_to_float(ctx, src1),
242 };
243
244 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
245 ac_get_elem_bits(ctx, result_type));
246 assert(length < sizeof(name));
247 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
248 }
249
250 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
251 const char *intrin,
252 LLVMTypeRef result_type,
253 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
254 {
255 char name[64];
256 LLVMValueRef params[] = {
257 ac_to_float(ctx, src0),
258 ac_to_float(ctx, src1),
259 ac_to_float(ctx, src2),
260 };
261
262 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
263 ac_get_elem_bits(ctx, result_type));
264 assert(length < sizeof(name));
265 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
266 }
267
268 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
269 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
270 {
271 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
272
273 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
274 ctx->i32_0, "");
275 return LLVMBuildSelect(ctx->builder, v,
276 ac_to_integer_or_pointer(ctx, src1),
277 ac_to_integer_or_pointer(ctx, src2), "");
278 }
279
280 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
281 LLVMValueRef src0)
282 {
283 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
284 }
285
286 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
287 const char *intrin,
288 LLVMValueRef src0, LLVMValueRef src1)
289 {
290 LLVMTypeRef ret_type;
291 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
292 LLVMValueRef res;
293 LLVMValueRef params[] = { src0, src1 };
294 ret_type = LLVMStructTypeInContext(ctx->context, types,
295 2, true);
296
297 res = ac_build_intrinsic(ctx, intrin, ret_type,
298 params, 2, AC_FUNC_ATTR_READNONE);
299
300 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
301 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
302 return res;
303 }
304
305 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
306 LLVMValueRef src0,
307 unsigned bitsize)
308 {
309 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
310 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
311 "");
312 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
313
314 switch (bitsize) {
315 case 16:
316 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
317 case 32:
318 return result;
319 case 64:
320 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
321 default:
322 unreachable("Unsupported bit size.");
323 }
324 }
325
326 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
327 LLVMValueRef src0)
328 {
329 src0 = ac_to_float(ctx, src0);
330 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
331 return LLVMBuildSExt(ctx->builder,
332 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
333 ctx->i32, "");
334 }
335
336 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
337 LLVMValueRef src0,
338 unsigned bitsize)
339 {
340 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
341
342 switch (bitsize) {
343 case 8:
344 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
345 case 16:
346 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
347 case 32:
348 return result;
349 case 64:
350 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
351 default:
352 unreachable("Unsupported bit size.");
353 }
354 }
355
356 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
357 LLVMValueRef src0)
358 {
359 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
360 return LLVMBuildSExt(ctx->builder,
361 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
362 ctx->i32, "");
363 }
364
365 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
366 LLVMValueRef src0)
367 {
368 LLVMValueRef result;
369 LLVMValueRef cond = NULL;
370
371 src0 = ac_to_float(ctx, src0);
372 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
373
374 if (ctx->chip_class >= GFX8) {
375 LLVMValueRef args[2];
376 /* Check if the result is a denormal - and flush to 0 if so. */
377 args[0] = result;
378 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
379 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
380 }
381
382 /* need to convert back up to f32 */
383 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
384
385 if (ctx->chip_class >= GFX8)
386 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
387 else {
388 /* for GFX6-GFX7 */
389 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
390 * so compare the result and flush to 0 if it's smaller.
391 */
392 LLVMValueRef temp, cond2;
393 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
394 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
395 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
396 temp, "");
397 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
398 temp, ctx->f32_0, "");
399 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
400 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
401 }
402 return result;
403 }
404
405 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
406 LLVMValueRef src0, LLVMValueRef src1)
407 {
408 LLVMValueRef dst64, result;
409 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
410 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
411
412 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
413 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
414 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
415 return result;
416 }
417
418 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
419 LLVMValueRef src0, LLVMValueRef src1)
420 {
421 LLVMValueRef dst64, result;
422 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
423 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
424
425 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
426 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
427 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
428 return result;
429 }
430
431 static LLVMValueRef emit_bitfield_extract(struct ac_llvm_context *ctx,
432 bool is_signed,
433 const LLVMValueRef srcs[3])
434 {
435 LLVMValueRef result;
436
437 if (HAVE_LLVM >= 0x0800) {
438 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
439 result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed);
440 result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, "");
441 } else {
442 /* FIXME: LLVM 7+ returns incorrect result when count is 0.
443 * https://bugs.freedesktop.org/show_bug.cgi?id=107276
444 */
445 LLVMValueRef zero = ctx->i32_0;
446 LLVMValueRef icond1 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
447 LLVMValueRef icond2 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], zero, "");
448
449 result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed);
450 result = LLVMBuildSelect(ctx->builder, icond1, srcs[0], result, "");
451 result = LLVMBuildSelect(ctx->builder, icond2, zero, result, "");
452 }
453
454 return result;
455 }
456
457 static LLVMValueRef emit_bitfield_insert(struct ac_llvm_context *ctx,
458 LLVMValueRef src0, LLVMValueRef src1,
459 LLVMValueRef src2, LLVMValueRef src3)
460 {
461 LLVMValueRef bfi_args[3], result;
462
463 bfi_args[0] = LLVMBuildShl(ctx->builder,
464 LLVMBuildSub(ctx->builder,
465 LLVMBuildShl(ctx->builder,
466 ctx->i32_1,
467 src3, ""),
468 ctx->i32_1, ""),
469 src2, "");
470 bfi_args[1] = LLVMBuildShl(ctx->builder, src1, src2, "");
471 bfi_args[2] = src0;
472
473 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, src3, LLVMConstInt(ctx->i32, 32, false), "");
474
475 /* Calculate:
476 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
477 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
478 */
479 result = LLVMBuildXor(ctx->builder, bfi_args[2],
480 LLVMBuildAnd(ctx->builder, bfi_args[0],
481 LLVMBuildXor(ctx->builder, bfi_args[1], bfi_args[2], ""), ""), "");
482
483 result = LLVMBuildSelect(ctx->builder, icond, src1, result, "");
484 return result;
485 }
486
487 static LLVMValueRef emit_pack_half_2x16(struct ac_llvm_context *ctx,
488 LLVMValueRef src0)
489 {
490 LLVMValueRef comp[2];
491
492 src0 = ac_to_float(ctx, src0);
493 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
494 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
495
496 return LLVMBuildBitCast(ctx->builder, ac_build_cvt_pkrtz_f16(ctx, comp),
497 ctx->i32, "");
498 }
499
500 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
501 LLVMValueRef src0)
502 {
503 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
504 LLVMValueRef temps[2], val;
505 int i;
506
507 for (i = 0; i < 2; i++) {
508 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
509 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
510 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
511 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
512 }
513 return ac_build_gather_values(ctx, temps, 2);
514 }
515
516 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
517 nir_op op,
518 LLVMValueRef src0)
519 {
520 unsigned mask;
521 int idx;
522 LLVMValueRef result;
523
524 if (op == nir_op_fddx_fine)
525 mask = AC_TID_MASK_LEFT;
526 else if (op == nir_op_fddy_fine)
527 mask = AC_TID_MASK_TOP;
528 else
529 mask = AC_TID_MASK_TOP_LEFT;
530
531 /* for DDX we want to next X pixel, DDY next Y pixel. */
532 if (op == nir_op_fddx_fine ||
533 op == nir_op_fddx_coarse ||
534 op == nir_op_fddx)
535 idx = 1;
536 else
537 idx = 2;
538
539 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
540 return result;
541 }
542
543 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
544 {
545 LLVMValueRef src[4], result = NULL;
546 unsigned num_components = instr->dest.dest.ssa.num_components;
547 unsigned src_components;
548 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
549
550 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
551 switch (instr->op) {
552 case nir_op_vec2:
553 case nir_op_vec3:
554 case nir_op_vec4:
555 src_components = 1;
556 break;
557 case nir_op_pack_half_2x16:
558 src_components = 2;
559 break;
560 case nir_op_unpack_half_2x16:
561 src_components = 1;
562 break;
563 case nir_op_cube_face_coord:
564 case nir_op_cube_face_index:
565 src_components = 3;
566 break;
567 default:
568 src_components = num_components;
569 break;
570 }
571 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
572 src[i] = get_alu_src(ctx, instr->src[i], src_components);
573
574 switch (instr->op) {
575 case nir_op_mov:
576 result = src[0];
577 break;
578 case nir_op_fneg:
579 src[0] = ac_to_float(&ctx->ac, src[0]);
580 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
581 break;
582 case nir_op_ineg:
583 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
584 break;
585 case nir_op_inot:
586 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
587 break;
588 case nir_op_iadd:
589 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
590 break;
591 case nir_op_fadd:
592 src[0] = ac_to_float(&ctx->ac, src[0]);
593 src[1] = ac_to_float(&ctx->ac, src[1]);
594 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
595 break;
596 case nir_op_fsub:
597 src[0] = ac_to_float(&ctx->ac, src[0]);
598 src[1] = ac_to_float(&ctx->ac, src[1]);
599 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
600 break;
601 case nir_op_isub:
602 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
603 break;
604 case nir_op_imul:
605 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
606 break;
607 case nir_op_imod:
608 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
609 break;
610 case nir_op_umod:
611 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
612 break;
613 case nir_op_fmod:
614 src[0] = ac_to_float(&ctx->ac, src[0]);
615 src[1] = ac_to_float(&ctx->ac, src[1]);
616 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
617 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
618 ac_to_float_type(&ctx->ac, def_type), result);
619 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
620 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
621 break;
622 case nir_op_frem:
623 src[0] = ac_to_float(&ctx->ac, src[0]);
624 src[1] = ac_to_float(&ctx->ac, src[1]);
625 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
626 break;
627 case nir_op_irem:
628 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
629 break;
630 case nir_op_idiv:
631 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
632 break;
633 case nir_op_udiv:
634 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
635 break;
636 case nir_op_fmul:
637 src[0] = ac_to_float(&ctx->ac, src[0]);
638 src[1] = ac_to_float(&ctx->ac, src[1]);
639 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
640 break;
641 case nir_op_frcp:
642 src[0] = ac_to_float(&ctx->ac, src[0]);
643 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
644 break;
645 case nir_op_iand:
646 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
647 break;
648 case nir_op_ior:
649 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
650 break;
651 case nir_op_ixor:
652 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
653 break;
654 case nir_op_ishl:
655 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
656 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
657 LLVMTypeOf(src[0]), "");
658 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
659 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
660 LLVMTypeOf(src[0]), "");
661 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
662 break;
663 case nir_op_ishr:
664 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
665 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
666 LLVMTypeOf(src[0]), "");
667 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
668 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
669 LLVMTypeOf(src[0]), "");
670 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
671 break;
672 case nir_op_ushr:
673 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
674 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
675 LLVMTypeOf(src[0]), "");
676 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
677 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
678 LLVMTypeOf(src[0]), "");
679 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
680 break;
681 case nir_op_ilt32:
682 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
683 break;
684 case nir_op_ine32:
685 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
686 break;
687 case nir_op_ieq32:
688 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
689 break;
690 case nir_op_ige32:
691 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
692 break;
693 case nir_op_ult32:
694 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
695 break;
696 case nir_op_uge32:
697 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
698 break;
699 case nir_op_feq32:
700 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
701 break;
702 case nir_op_fne32:
703 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
704 break;
705 case nir_op_flt32:
706 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
707 break;
708 case nir_op_fge32:
709 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
710 break;
711 case nir_op_fabs:
712 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
713 ac_to_float_type(&ctx->ac, def_type), src[0]);
714 break;
715 case nir_op_iabs:
716 result = emit_iabs(&ctx->ac, src[0]);
717 break;
718 case nir_op_imax:
719 result = ac_build_imax(&ctx->ac, src[0], src[1]);
720 break;
721 case nir_op_imin:
722 result = ac_build_imin(&ctx->ac, src[0], src[1]);
723 break;
724 case nir_op_umax:
725 result = ac_build_umax(&ctx->ac, src[0], src[1]);
726 break;
727 case nir_op_umin:
728 result = ac_build_umin(&ctx->ac, src[0], src[1]);
729 break;
730 case nir_op_isign:
731 result = ac_build_isign(&ctx->ac, src[0],
732 instr->dest.dest.ssa.bit_size);
733 break;
734 case nir_op_fsign:
735 src[0] = ac_to_float(&ctx->ac, src[0]);
736 result = ac_build_fsign(&ctx->ac, src[0],
737 instr->dest.dest.ssa.bit_size);
738 break;
739 case nir_op_ffloor:
740 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
741 ac_to_float_type(&ctx->ac, def_type), src[0]);
742 break;
743 case nir_op_ftrunc:
744 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
745 ac_to_float_type(&ctx->ac, def_type), src[0]);
746 break;
747 case nir_op_fceil:
748 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
749 ac_to_float_type(&ctx->ac, def_type), src[0]);
750 break;
751 case nir_op_fround_even:
752 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
753 ac_to_float_type(&ctx->ac, def_type),src[0]);
754 break;
755 case nir_op_ffract:
756 src[0] = ac_to_float(&ctx->ac, src[0]);
757 result = ac_build_fract(&ctx->ac, src[0],
758 instr->dest.dest.ssa.bit_size);
759 break;
760 case nir_op_fsin:
761 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
762 ac_to_float_type(&ctx->ac, def_type), src[0]);
763 break;
764 case nir_op_fcos:
765 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
766 ac_to_float_type(&ctx->ac, def_type), src[0]);
767 break;
768 case nir_op_fsqrt:
769 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
770 ac_to_float_type(&ctx->ac, def_type), src[0]);
771 break;
772 case nir_op_fexp2:
773 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
774 ac_to_float_type(&ctx->ac, def_type), src[0]);
775 break;
776 case nir_op_flog2:
777 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
778 ac_to_float_type(&ctx->ac, def_type), src[0]);
779 break;
780 case nir_op_frsq:
781 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
782 ac_to_float_type(&ctx->ac, def_type), src[0]);
783 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
784 break;
785 case nir_op_frexp_exp:
786 src[0] = ac_to_float(&ctx->ac, src[0]);
787 result = ac_build_frexp_exp(&ctx->ac, src[0],
788 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
789 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
790 result = LLVMBuildSExt(ctx->ac.builder, result,
791 ctx->ac.i32, "");
792 break;
793 case nir_op_frexp_sig:
794 src[0] = ac_to_float(&ctx->ac, src[0]);
795 result = ac_build_frexp_mant(&ctx->ac, src[0],
796 instr->dest.dest.ssa.bit_size);
797 break;
798 case nir_op_fpow:
799 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
800 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
801 break;
802 case nir_op_fmax:
803 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
804 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
805 if (ctx->ac.chip_class < GFX9 &&
806 instr->dest.dest.ssa.bit_size == 32) {
807 /* Only pre-GFX9 chips do not flush denorms. */
808 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
809 ac_to_float_type(&ctx->ac, def_type),
810 result);
811 }
812 break;
813 case nir_op_fmin:
814 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
815 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
816 if (ctx->ac.chip_class < GFX9 &&
817 instr->dest.dest.ssa.bit_size == 32) {
818 /* Only pre-GFX9 chips do not flush denorms. */
819 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
820 ac_to_float_type(&ctx->ac, def_type),
821 result);
822 }
823 break;
824 case nir_op_ffma:
825 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
826 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
827 break;
828 case nir_op_ldexp:
829 src[0] = ac_to_float(&ctx->ac, src[0]);
830 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
831 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
832 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
833 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
834 else
835 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
836 break;
837 case nir_op_ibitfield_extract:
838 result = emit_bitfield_extract(&ctx->ac, true, src);
839 break;
840 case nir_op_ubitfield_extract:
841 result = emit_bitfield_extract(&ctx->ac, false, src);
842 break;
843 case nir_op_bitfield_insert:
844 result = emit_bitfield_insert(&ctx->ac, src[0], src[1], src[2], src[3]);
845 break;
846 case nir_op_bitfield_reverse:
847 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
848 break;
849 case nir_op_bit_count:
850 result = ac_build_bit_count(&ctx->ac, src[0]);
851 break;
852 case nir_op_vec2:
853 case nir_op_vec3:
854 case nir_op_vec4:
855 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
856 src[i] = ac_to_integer(&ctx->ac, src[i]);
857 result = ac_build_gather_values(&ctx->ac, src, num_components);
858 break;
859 case nir_op_f2i8:
860 case nir_op_f2i16:
861 case nir_op_f2i32:
862 case nir_op_f2i64:
863 src[0] = ac_to_float(&ctx->ac, src[0]);
864 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
865 break;
866 case nir_op_f2u8:
867 case nir_op_f2u16:
868 case nir_op_f2u32:
869 case nir_op_f2u64:
870 src[0] = ac_to_float(&ctx->ac, src[0]);
871 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
872 break;
873 case nir_op_i2f16:
874 case nir_op_i2f32:
875 case nir_op_i2f64:
876 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
877 break;
878 case nir_op_u2f16:
879 case nir_op_u2f32:
880 case nir_op_u2f64:
881 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
882 break;
883 case nir_op_f2f16_rtz:
884 src[0] = ac_to_float(&ctx->ac, src[0]);
885 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
886 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
887 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
888 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
889 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
890 break;
891 case nir_op_f2f16_rtne:
892 case nir_op_f2f16:
893 case nir_op_f2f32:
894 case nir_op_f2f64:
895 src[0] = ac_to_float(&ctx->ac, src[0]);
896 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
897 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
898 else
899 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
900 break;
901 case nir_op_u2u8:
902 case nir_op_u2u16:
903 case nir_op_u2u32:
904 case nir_op_u2u64:
905 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
906 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
907 else
908 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
909 break;
910 case nir_op_i2i8:
911 case nir_op_i2i16:
912 case nir_op_i2i32:
913 case nir_op_i2i64:
914 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
915 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
916 else
917 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
918 break;
919 case nir_op_b32csel:
920 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
921 break;
922 case nir_op_find_lsb:
923 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
924 break;
925 case nir_op_ufind_msb:
926 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
927 break;
928 case nir_op_ifind_msb:
929 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
930 break;
931 case nir_op_uadd_carry:
932 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
933 break;
934 case nir_op_usub_borrow:
935 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
936 break;
937 case nir_op_b2f16:
938 case nir_op_b2f32:
939 case nir_op_b2f64:
940 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
941 break;
942 case nir_op_f2b32:
943 result = emit_f2b(&ctx->ac, src[0]);
944 break;
945 case nir_op_b2i8:
946 case nir_op_b2i16:
947 case nir_op_b2i32:
948 case nir_op_b2i64:
949 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
950 break;
951 case nir_op_i2b32:
952 result = emit_i2b(&ctx->ac, src[0]);
953 break;
954 case nir_op_fquantize2f16:
955 result = emit_f2f16(&ctx->ac, src[0]);
956 break;
957 case nir_op_umul_high:
958 result = emit_umul_high(&ctx->ac, src[0], src[1]);
959 break;
960 case nir_op_imul_high:
961 result = emit_imul_high(&ctx->ac, src[0], src[1]);
962 break;
963 case nir_op_pack_half_2x16:
964 result = emit_pack_half_2x16(&ctx->ac, src[0]);
965 break;
966 case nir_op_unpack_half_2x16:
967 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
968 break;
969 case nir_op_fddx:
970 case nir_op_fddy:
971 case nir_op_fddx_fine:
972 case nir_op_fddy_fine:
973 case nir_op_fddx_coarse:
974 case nir_op_fddy_coarse:
975 result = emit_ddxy(ctx, instr->op, src[0]);
976 break;
977
978 case nir_op_unpack_64_2x32_split_x: {
979 assert(ac_get_llvm_num_components(src[0]) == 1);
980 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
981 ctx->ac.v2i32,
982 "");
983 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
984 ctx->ac.i32_0, "");
985 break;
986 }
987
988 case nir_op_unpack_64_2x32_split_y: {
989 assert(ac_get_llvm_num_components(src[0]) == 1);
990 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
991 ctx->ac.v2i32,
992 "");
993 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
994 ctx->ac.i32_1, "");
995 break;
996 }
997
998 case nir_op_pack_64_2x32_split: {
999 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1000 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1001 break;
1002 }
1003
1004 case nir_op_pack_32_2x16_split: {
1005 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1006 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1007 break;
1008 }
1009
1010 case nir_op_unpack_32_2x16_split_x: {
1011 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1012 ctx->ac.v2i16,
1013 "");
1014 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1015 ctx->ac.i32_0, "");
1016 break;
1017 }
1018
1019 case nir_op_unpack_32_2x16_split_y: {
1020 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1021 ctx->ac.v2i16,
1022 "");
1023 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1024 ctx->ac.i32_1, "");
1025 break;
1026 }
1027
1028 case nir_op_cube_face_coord: {
1029 src[0] = ac_to_float(&ctx->ac, src[0]);
1030 LLVMValueRef results[2];
1031 LLVMValueRef in[3];
1032 for (unsigned chan = 0; chan < 3; chan++)
1033 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1034 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1035 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1036 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1037 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1038 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1039 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1040 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1041 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1042 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1043 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1044 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1045 result = ac_build_gather_values(&ctx->ac, results, 2);
1046 break;
1047 }
1048
1049 case nir_op_cube_face_index: {
1050 src[0] = ac_to_float(&ctx->ac, src[0]);
1051 LLVMValueRef in[3];
1052 for (unsigned chan = 0; chan < 3; chan++)
1053 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1054 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1055 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1056 break;
1057 }
1058
1059 case nir_op_fmin3:
1060 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1061 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1062 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1063 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1064 break;
1065 case nir_op_umin3:
1066 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1067 result = ac_build_umin(&ctx->ac, result, src[2]);
1068 break;
1069 case nir_op_imin3:
1070 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1071 result = ac_build_imin(&ctx->ac, result, src[2]);
1072 break;
1073 case nir_op_fmax3:
1074 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1075 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1076 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1077 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1078 break;
1079 case nir_op_umax3:
1080 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1081 result = ac_build_umax(&ctx->ac, result, src[2]);
1082 break;
1083 case nir_op_imax3:
1084 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1085 result = ac_build_imax(&ctx->ac, result, src[2]);
1086 break;
1087 case nir_op_fmed3: {
1088 src[0] = ac_to_float(&ctx->ac, src[0]);
1089 src[1] = ac_to_float(&ctx->ac, src[1]);
1090 src[2] = ac_to_float(&ctx->ac, src[2]);
1091 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1092 instr->dest.dest.ssa.bit_size);
1093 break;
1094 }
1095 case nir_op_imed3: {
1096 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1097 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1098 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1099 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1100 break;
1101 }
1102 case nir_op_umed3: {
1103 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1104 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1105 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1106 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1107 break;
1108 }
1109
1110 default:
1111 fprintf(stderr, "Unknown NIR alu instr: ");
1112 nir_print_instr(&instr->instr, stderr);
1113 fprintf(stderr, "\n");
1114 abort();
1115 }
1116
1117 if (result) {
1118 assert(instr->dest.dest.is_ssa);
1119 result = ac_to_integer_or_pointer(&ctx->ac, result);
1120 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1121 }
1122 }
1123
1124 static void visit_load_const(struct ac_nir_context *ctx,
1125 const nir_load_const_instr *instr)
1126 {
1127 LLVMValueRef values[4], value = NULL;
1128 LLVMTypeRef element_type =
1129 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1130
1131 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1132 switch (instr->def.bit_size) {
1133 case 8:
1134 values[i] = LLVMConstInt(element_type,
1135 instr->value[i].u8, false);
1136 break;
1137 case 16:
1138 values[i] = LLVMConstInt(element_type,
1139 instr->value[i].u16, false);
1140 break;
1141 case 32:
1142 values[i] = LLVMConstInt(element_type,
1143 instr->value[i].u32, false);
1144 break;
1145 case 64:
1146 values[i] = LLVMConstInt(element_type,
1147 instr->value[i].u64, false);
1148 break;
1149 default:
1150 fprintf(stderr,
1151 "unsupported nir load_const bit_size: %d\n",
1152 instr->def.bit_size);
1153 abort();
1154 }
1155 }
1156 if (instr->def.num_components > 1) {
1157 value = LLVMConstVector(values, instr->def.num_components);
1158 } else
1159 value = values[0];
1160
1161 ctx->ssa_defs[instr->def.index] = value;
1162 }
1163
1164 static LLVMValueRef
1165 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1166 {
1167 LLVMValueRef size =
1168 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1169 LLVMConstInt(ctx->ac.i32, 2, false), "");
1170
1171 /* GFX8 only */
1172 if (ctx->ac.chip_class == GFX8 && in_elements) {
1173 /* On GFX8, the descriptor contains the size in bytes,
1174 * but TXQ must return the size in elements.
1175 * The stride is always non-zero for resources using TXQ.
1176 */
1177 LLVMValueRef stride =
1178 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1179 ctx->ac.i32_1, "");
1180 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1181 LLVMConstInt(ctx->ac.i32, 16, false), "");
1182 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1183 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1184
1185 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1186 }
1187 return size;
1188 }
1189
1190 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1191 nir_variable *var,
1192 struct ac_image_args *args,
1193 const nir_tex_instr *instr)
1194 {
1195 const struct glsl_type *type = glsl_without_array(var->type);
1196 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1197 LLVMValueRef half_texel[2];
1198 LLVMValueRef compare_cube_wa = NULL;
1199 LLVMValueRef result;
1200
1201 //TODO Rect
1202 {
1203 struct ac_image_args txq_args = { 0 };
1204
1205 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1206 txq_args.opcode = ac_image_get_resinfo;
1207 txq_args.dmask = 0xf;
1208 txq_args.lod = ctx->i32_0;
1209 txq_args.resource = args->resource;
1210 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1211 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1212
1213 for (unsigned c = 0; c < 2; c++) {
1214 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1215 LLVMConstInt(ctx->i32, c, false), "");
1216 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1217 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1218 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1219 LLVMConstReal(ctx->f32, -0.5), "");
1220 }
1221 }
1222
1223 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1224
1225 for (unsigned c = 0; c < 2; c++) {
1226 LLVMValueRef tmp;
1227 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1228 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1229 }
1230
1231 /*
1232 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1233 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1234 * workaround by sampling using a scaled type and converting.
1235 * This is taken from amdgpu-pro shaders.
1236 */
1237 /* NOTE this produces some ugly code compared to amdgpu-pro,
1238 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1239 * and then reads them back. -pro generates two selects,
1240 * one s_cmp for the descriptor rewriting
1241 * one v_cmp for the coordinate and result changes.
1242 */
1243 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1244 LLVMValueRef tmp, tmp2;
1245
1246 /* workaround 8/8/8/8 uint/sint cube gather bug */
1247 /* first detect it then change to a scaled read and f2i */
1248 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1249 tmp2 = tmp;
1250
1251 /* extract the DATA_FORMAT */
1252 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1253 LLVMConstInt(ctx->i32, 6, false), false);
1254
1255 /* is the DATA_FORMAT == 8_8_8_8 */
1256 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1257
1258 if (stype == GLSL_TYPE_UINT)
1259 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1260 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1261 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1262 else
1263 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1264 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1265 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1266
1267 /* replace the NUM FORMAT in the descriptor */
1268 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false), "");
1269 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1270
1271 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1272
1273 /* don't modify the coordinates for this case */
1274 for (unsigned c = 0; c < 2; ++c)
1275 args->coords[c] = LLVMBuildSelect(
1276 ctx->builder, compare_cube_wa,
1277 orig_coords[c], args->coords[c], "");
1278 }
1279
1280 args->attributes = AC_FUNC_ATTR_READNONE;
1281 result = ac_build_image_opcode(ctx, args);
1282
1283 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1284 LLVMValueRef tmp, tmp2;
1285
1286 /* if the cube workaround is in place, f2i the result. */
1287 for (unsigned c = 0; c < 4; c++) {
1288 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1289 if (stype == GLSL_TYPE_UINT)
1290 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1291 else
1292 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1293 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1294 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1295 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1296 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1297 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1298 }
1299 }
1300 return result;
1301 }
1302
1303 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1304 {
1305 nir_deref_instr *texture_deref_instr = NULL;
1306
1307 for (unsigned i = 0; i < instr->num_srcs; i++) {
1308 switch (instr->src[i].src_type) {
1309 case nir_tex_src_texture_deref:
1310 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1311 break;
1312 default:
1313 break;
1314 }
1315 }
1316 return texture_deref_instr;
1317 }
1318
1319 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1320 const nir_tex_instr *instr,
1321 struct ac_image_args *args)
1322 {
1323 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1324 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1325
1326 if (ctx->abi->gfx9_stride_size_workaround) {
1327 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1328 args->resource,
1329 args->coords[0],
1330 ctx->ac.i32_0,
1331 util_last_bit(mask),
1332 false, true);
1333 } else {
1334 return ac_build_buffer_load_format(&ctx->ac,
1335 args->resource,
1336 args->coords[0],
1337 ctx->ac.i32_0,
1338 util_last_bit(mask),
1339 false, true);
1340 }
1341 }
1342
1343 args->opcode = ac_image_sample;
1344
1345 switch (instr->op) {
1346 case nir_texop_txf:
1347 case nir_texop_txf_ms:
1348 case nir_texop_samples_identical:
1349 args->opcode = args->level_zero ||
1350 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1351 ac_image_load : ac_image_load_mip;
1352 args->level_zero = false;
1353 break;
1354 case nir_texop_txs:
1355 case nir_texop_query_levels:
1356 args->opcode = ac_image_get_resinfo;
1357 if (!args->lod)
1358 args->lod = ctx->ac.i32_0;
1359 args->level_zero = false;
1360 break;
1361 case nir_texop_tex:
1362 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1363 assert(!args->lod);
1364 args->level_zero = true;
1365 }
1366 break;
1367 case nir_texop_tg4:
1368 args->opcode = ac_image_gather4;
1369 args->level_zero = true;
1370 break;
1371 case nir_texop_lod:
1372 args->opcode = ac_image_get_lod;
1373 break;
1374 default:
1375 break;
1376 }
1377
1378 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1379 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1380 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1381 const struct glsl_type *type = glsl_without_array(var->type);
1382 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1383 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1384 return lower_gather4_integer(&ctx->ac, var, args, instr);
1385 }
1386 }
1387
1388 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1389 if (instr->op == nir_texop_lod && ctx->ac.chip_class >= GFX9) {
1390 if ((args->dim == ac_image_2darray ||
1391 args->dim == ac_image_2d) && !args->coords[1]) {
1392 args->coords[1] = ctx->ac.i32_0;
1393 }
1394 }
1395
1396 args->attributes = AC_FUNC_ATTR_READNONE;
1397 return ac_build_image_opcode(&ctx->ac, args);
1398 }
1399
1400 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1401 nir_intrinsic_instr *instr)
1402 {
1403 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1404 LLVMValueRef index = get_src(ctx, instr->src[1]);
1405
1406 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1407 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1408 return result;
1409 }
1410
1411 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1412 nir_intrinsic_instr *instr)
1413 {
1414 LLVMValueRef ptr, addr;
1415 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1416 unsigned index = nir_intrinsic_base(instr);
1417
1418 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1419 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1420
1421 /* Load constant values from user SGPRS when possible, otherwise
1422 * fallback to the default path that loads directly from memory.
1423 */
1424 if (LLVMIsConstant(src0) &&
1425 instr->dest.ssa.bit_size == 32) {
1426 unsigned count = instr->dest.ssa.num_components;
1427 unsigned offset = index;
1428
1429 offset += LLVMConstIntGetZExtValue(src0);
1430 offset /= 4;
1431
1432 offset -= ctx->abi->base_inline_push_consts;
1433
1434 if (offset + count <= ctx->abi->num_inline_push_consts) {
1435 return ac_build_gather_values(&ctx->ac,
1436 ctx->abi->inline_push_consts + offset,
1437 count);
1438 }
1439 }
1440
1441 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1442
1443 if (instr->dest.ssa.bit_size == 8) {
1444 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1445 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1446 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1447 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1448
1449 LLVMValueRef params[3];
1450 if (load_dwords > 1) {
1451 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1452 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1453 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1454 } else {
1455 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1456 params[0] = ctx->ac.i32_0;
1457 params[1] = res;
1458 }
1459 params[2] = addr;
1460 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1461
1462 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1463 if (instr->dest.ssa.num_components > 1)
1464 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1465 return res;
1466 } else if (instr->dest.ssa.bit_size == 16) {
1467 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1468 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1469 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1470 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1471 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1472 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1473 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1474 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1475 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1476 LLVMConstInt(ctx->ac.i32, 4, false)};
1477 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1478 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1479 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1480 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1481 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1482 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1483 }
1484
1485 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1486
1487 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1488 }
1489
1490 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1491 const nir_intrinsic_instr *instr)
1492 {
1493 LLVMValueRef index = get_src(ctx, instr->src[0]);
1494
1495 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1496 }
1497
1498 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1499 {
1500 uint32_t new_mask = 0;
1501 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1502 if (mask & (1u << i))
1503 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1504 return new_mask;
1505 }
1506
1507 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1508 unsigned start, unsigned count)
1509 {
1510 LLVMValueRef mask[] = {
1511 ctx->i32_0, ctx->i32_1,
1512 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1513
1514 unsigned src_elements = ac_get_llvm_num_components(src);
1515
1516 if (count == src_elements) {
1517 assert(start == 0);
1518 return src;
1519 } else if (count == 1) {
1520 assert(start < src_elements);
1521 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1522 } else {
1523 assert(start + count <= src_elements);
1524 assert(count <= 4);
1525 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1526 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1527 }
1528 }
1529
1530 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1531 enum gl_access_qualifier access,
1532 bool may_store_unaligned,
1533 bool writeonly_memory)
1534 {
1535 unsigned cache_policy = 0;
1536
1537 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1538 * store opcodes not aligned to a dword are affected. The only way to
1539 * get unaligned stores is through shader images.
1540 */
1541 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1542 /* If this is write-only, don't keep data in L1 to prevent
1543 * evicting L1 cache lines that may be needed by other
1544 * instructions.
1545 */
1546 writeonly_memory ||
1547 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1548 cache_policy |= ac_glc;
1549 }
1550
1551 return cache_policy;
1552 }
1553
1554 static void visit_store_ssbo(struct ac_nir_context *ctx,
1555 nir_intrinsic_instr *instr)
1556 {
1557 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1558 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1559 unsigned writemask = nir_intrinsic_write_mask(instr);
1560 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1561 bool writeonly_memory = access & ACCESS_NON_READABLE;
1562 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1563
1564 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1565 get_src(ctx, instr->src[1]), true);
1566 LLVMValueRef base_data = src_data;
1567 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1568 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1569
1570 while (writemask) {
1571 int start, count;
1572 LLVMValueRef data, offset;
1573 LLVMTypeRef data_type;
1574
1575 u_bit_scan_consecutive_range(&writemask, &start, &count);
1576
1577 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1578 * writes into a 2-element and a 1-element write. */
1579 if (count == 3 &&
1580 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1581 writemask |= 1 << (start + 2);
1582 count = 2;
1583 }
1584 int num_bytes = count * elem_size_bytes; /* count in bytes */
1585
1586 /* we can only store 4 DWords at the same time.
1587 * can only happen for 64 Bit vectors. */
1588 if (num_bytes > 16) {
1589 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1590 count = 2;
1591 num_bytes = 16;
1592 }
1593
1594 /* check alignment of 16 Bit stores */
1595 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1596 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1597 count = 1;
1598 num_bytes = 2;
1599 }
1600 data = extract_vector_range(&ctx->ac, base_data, start, count);
1601
1602 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1603 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1604
1605 if (num_bytes == 1) {
1606 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1607 offset, ctx->ac.i32_0,
1608 cache_policy & ac_glc,
1609 writeonly_memory);
1610 } else if (num_bytes == 2) {
1611 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1612 offset, ctx->ac.i32_0,
1613 cache_policy & ac_glc,
1614 writeonly_memory);
1615 } else {
1616 int num_channels = num_bytes / 4;
1617
1618 switch (num_bytes) {
1619 case 16: /* v4f32 */
1620 data_type = ctx->ac.v4f32;
1621 break;
1622 case 12: /* v3f32 */
1623 data_type = ctx->ac.v3f32;
1624 break;
1625 case 8: /* v2f32 */
1626 data_type = ctx->ac.v2f32;
1627 break;
1628 case 4: /* f32 */
1629 data_type = ctx->ac.f32;
1630 break;
1631 default:
1632 unreachable("Malformed vector store.");
1633 }
1634 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1635
1636 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1637 num_channels, offset,
1638 ctx->ac.i32_0, 0,
1639 cache_policy & ac_glc,
1640 false, writeonly_memory,
1641 false);
1642 }
1643 }
1644 }
1645
1646 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1647 const nir_intrinsic_instr *instr)
1648 {
1649 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1650 const char *op;
1651 char name[64], type[8];
1652 LLVMValueRef params[6];
1653 int arg_count = 0;
1654
1655 switch (instr->intrinsic) {
1656 case nir_intrinsic_ssbo_atomic_add:
1657 op = "add";
1658 break;
1659 case nir_intrinsic_ssbo_atomic_imin:
1660 op = "smin";
1661 break;
1662 case nir_intrinsic_ssbo_atomic_umin:
1663 op = "umin";
1664 break;
1665 case nir_intrinsic_ssbo_atomic_imax:
1666 op = "smax";
1667 break;
1668 case nir_intrinsic_ssbo_atomic_umax:
1669 op = "umax";
1670 break;
1671 case nir_intrinsic_ssbo_atomic_and:
1672 op = "and";
1673 break;
1674 case nir_intrinsic_ssbo_atomic_or:
1675 op = "or";
1676 break;
1677 case nir_intrinsic_ssbo_atomic_xor:
1678 op = "xor";
1679 break;
1680 case nir_intrinsic_ssbo_atomic_exchange:
1681 op = "swap";
1682 break;
1683 case nir_intrinsic_ssbo_atomic_comp_swap:
1684 op = "cmpswap";
1685 break;
1686 default:
1687 abort();
1688 }
1689
1690 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1691 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1692 }
1693 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1694 params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
1695 get_src(ctx, instr->src[0]),
1696 true);
1697
1698 if (HAVE_LLVM >= 0x900) {
1699 /* XXX: The new raw/struct atomic intrinsics are buggy with
1700 * LLVM 8, see r358579.
1701 */
1702 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1703 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1704 params[arg_count++] = ctx->ac.i32_0; /* slc */
1705
1706 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1707 snprintf(name, sizeof(name),
1708 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1709 } else {
1710 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1711 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1712 params[arg_count++] = ctx->ac.i1false; /* slc */
1713
1714 assert(return_type == ctx->ac.i32);
1715 snprintf(name, sizeof(name),
1716 "llvm.amdgcn.buffer.atomic.%s", op);
1717 }
1718
1719 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1720 arg_count, 0);
1721 }
1722
1723 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1724 const nir_intrinsic_instr *instr)
1725 {
1726 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1727 int num_components = instr->num_components;
1728 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1729 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1730
1731 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1732 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1733 get_src(ctx, instr->src[0]), false);
1734 LLVMValueRef vindex = ctx->ac.i32_0;
1735
1736 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1737 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1738
1739 LLVMValueRef results[4];
1740 for (int i = 0; i < num_components;) {
1741 int num_elems = num_components - i;
1742 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1743 num_elems = 1;
1744 if (num_elems * elem_size_bytes > 16)
1745 num_elems = 16 / elem_size_bytes;
1746 int load_bytes = num_elems * elem_size_bytes;
1747
1748 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1749
1750 LLVMValueRef ret;
1751
1752 if (load_bytes == 1) {
1753 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1754 rsrc,
1755 offset,
1756 ctx->ac.i32_0,
1757 immoffset,
1758 cache_policy & ac_glc);
1759 } else if (load_bytes == 2) {
1760 ret = ac_build_tbuffer_load_short(&ctx->ac,
1761 rsrc,
1762 offset,
1763 ctx->ac.i32_0,
1764 immoffset,
1765 cache_policy & ac_glc);
1766 } else {
1767 int num_channels = util_next_power_of_two(load_bytes) / 4;
1768
1769 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1770 vindex, offset, immoffset, 0,
1771 cache_policy & ac_glc, 0,
1772 false, false);
1773 }
1774
1775 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1776 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1777 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1778
1779 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1780 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1781
1782 for (unsigned j = 0; j < num_elems; j++) {
1783 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1784 }
1785 i += num_elems;
1786 }
1787
1788 return ac_build_gather_values(&ctx->ac, results, num_components);
1789 }
1790
1791 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1792 const nir_intrinsic_instr *instr)
1793 {
1794 LLVMValueRef ret;
1795 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1796 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1797 int num_components = instr->num_components;
1798
1799 if (ctx->abi->load_ubo)
1800 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1801
1802 if (instr->dest.ssa.bit_size == 64)
1803 num_components *= 2;
1804
1805 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1806 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1807 LLVMValueRef results[num_components];
1808 for (unsigned i = 0; i < num_components; ++i) {
1809 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1810 load_bytes * i, 0);
1811
1812 if (load_bytes == 1) {
1813 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1814 rsrc,
1815 offset,
1816 ctx->ac.i32_0,
1817 immoffset,
1818 false);
1819 } else {
1820 assert(load_bytes == 2);
1821 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1822 rsrc,
1823 offset,
1824 ctx->ac.i32_0,
1825 immoffset,
1826 false);
1827 }
1828 }
1829 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1830 } else {
1831 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1832 NULL, 0, false, false, true, true);
1833
1834 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1835 }
1836
1837 return LLVMBuildBitCast(ctx->ac.builder, ret,
1838 get_def_type(ctx, &instr->dest.ssa), "");
1839 }
1840
1841 static void
1842 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1843 bool vs_in, unsigned *vertex_index_out,
1844 LLVMValueRef *vertex_index_ref,
1845 unsigned *const_out, LLVMValueRef *indir_out)
1846 {
1847 nir_variable *var = nir_deref_instr_get_variable(instr);
1848 nir_deref_path path;
1849 unsigned idx_lvl = 1;
1850
1851 nir_deref_path_init(&path, instr, NULL);
1852
1853 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1854 if (vertex_index_ref) {
1855 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1856 if (vertex_index_out)
1857 *vertex_index_out = 0;
1858 } else {
1859 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1860 }
1861 ++idx_lvl;
1862 }
1863
1864 uint32_t const_offset = 0;
1865 LLVMValueRef offset = NULL;
1866
1867 if (var->data.compact) {
1868 assert(instr->deref_type == nir_deref_type_array);
1869 const_offset = nir_src_as_uint(instr->arr.index);
1870 goto out;
1871 }
1872
1873 for (; path.path[idx_lvl]; ++idx_lvl) {
1874 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1875 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1876 unsigned index = path.path[idx_lvl]->strct.index;
1877
1878 for (unsigned i = 0; i < index; i++) {
1879 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1880 const_offset += glsl_count_attribute_slots(ft, vs_in);
1881 }
1882 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1883 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1884 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1885 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1886 if (offset)
1887 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1888 else
1889 offset = array_off;
1890 } else
1891 unreachable("Uhandled deref type in get_deref_instr_offset");
1892 }
1893
1894 out:
1895 nir_deref_path_finish(&path);
1896
1897 if (const_offset && offset)
1898 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1899 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1900 "");
1901
1902 *const_out = const_offset;
1903 *indir_out = offset;
1904 }
1905
1906 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1907 nir_intrinsic_instr *instr,
1908 bool load_inputs)
1909 {
1910 LLVMValueRef result;
1911 LLVMValueRef vertex_index = NULL;
1912 LLVMValueRef indir_index = NULL;
1913 unsigned const_index = 0;
1914
1915 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1916
1917 unsigned location = var->data.location;
1918 unsigned driver_location = var->data.driver_location;
1919 const bool is_patch = var->data.patch;
1920 const bool is_compact = var->data.compact;
1921
1922 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1923 false, NULL, is_patch ? NULL : &vertex_index,
1924 &const_index, &indir_index);
1925
1926 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1927
1928 LLVMTypeRef src_component_type;
1929 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1930 src_component_type = LLVMGetElementType(dest_type);
1931 else
1932 src_component_type = dest_type;
1933
1934 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1935 vertex_index, indir_index,
1936 const_index, location, driver_location,
1937 var->data.location_frac,
1938 instr->num_components,
1939 is_patch, is_compact, load_inputs);
1940 if (instr->dest.ssa.bit_size == 16) {
1941 result = ac_to_integer(&ctx->ac, result);
1942 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
1943 }
1944 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
1945 }
1946
1947 static unsigned
1948 type_scalar_size_bytes(const struct glsl_type *type)
1949 {
1950 assert(glsl_type_is_vector_or_scalar(type) ||
1951 glsl_type_is_matrix(type));
1952 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
1953 }
1954
1955 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
1956 nir_intrinsic_instr *instr)
1957 {
1958 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1959 nir_variable *var = nir_deref_instr_get_variable(deref);
1960
1961 LLVMValueRef values[8];
1962 int idx = 0;
1963 int ve = instr->dest.ssa.num_components;
1964 unsigned comp = 0;
1965 LLVMValueRef indir_index;
1966 LLVMValueRef ret;
1967 unsigned const_index;
1968 unsigned stride = 4;
1969 int mode = deref->mode;
1970
1971 if (var) {
1972 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
1973 var->data.mode == nir_var_shader_in;
1974 idx = var->data.driver_location;
1975 comp = var->data.location_frac;
1976 mode = var->data.mode;
1977
1978 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
1979 &const_index, &indir_index);
1980
1981 if (var->data.compact) {
1982 stride = 1;
1983 const_index += comp;
1984 comp = 0;
1985 }
1986 }
1987
1988 if (instr->dest.ssa.bit_size == 64 &&
1989 (deref->mode == nir_var_shader_in ||
1990 deref->mode == nir_var_shader_out ||
1991 deref->mode == nir_var_function_temp))
1992 ve *= 2;
1993
1994 switch (mode) {
1995 case nir_var_shader_in:
1996 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
1997 ctx->stage == MESA_SHADER_TESS_EVAL) {
1998 return load_tess_varyings(ctx, instr, true);
1999 }
2000
2001 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2002 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2003 LLVMValueRef indir_index;
2004 unsigned const_index, vertex_index;
2005 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2006 &const_index, &indir_index);
2007
2008 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2009 var->data.driver_location,
2010 var->data.location_frac,
2011 instr->num_components, vertex_index, const_index, type);
2012 }
2013
2014 for (unsigned chan = comp; chan < ve + comp; chan++) {
2015 if (indir_index) {
2016 unsigned count = glsl_count_attribute_slots(
2017 var->type,
2018 ctx->stage == MESA_SHADER_VERTEX);
2019 count -= chan / 4;
2020 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2021 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2022 stride, false, true);
2023
2024 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2025 tmp_vec,
2026 indir_index, "");
2027 } else
2028 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2029 }
2030 break;
2031 case nir_var_function_temp:
2032 for (unsigned chan = 0; chan < ve; chan++) {
2033 if (indir_index) {
2034 unsigned count = glsl_count_attribute_slots(
2035 var->type, false);
2036 count -= chan / 4;
2037 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2038 &ctx->ac, ctx->locals + idx + chan, count,
2039 stride, true, true);
2040
2041 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2042 tmp_vec,
2043 indir_index, "");
2044 } else {
2045 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2046 }
2047 }
2048 break;
2049 case nir_var_mem_shared: {
2050 LLVMValueRef address = get_src(ctx, instr->src[0]);
2051 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2052 return LLVMBuildBitCast(ctx->ac.builder, val,
2053 get_def_type(ctx, &instr->dest.ssa),
2054 "");
2055 }
2056 case nir_var_shader_out:
2057 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2058 return load_tess_varyings(ctx, instr, false);
2059 }
2060
2061 for (unsigned chan = comp; chan < ve + comp; chan++) {
2062 if (indir_index) {
2063 unsigned count = glsl_count_attribute_slots(
2064 var->type, false);
2065 count -= chan / 4;
2066 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2067 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2068 stride, true, true);
2069
2070 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2071 tmp_vec,
2072 indir_index, "");
2073 } else {
2074 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2075 ctx->abi->outputs[idx + chan + const_index * stride],
2076 "");
2077 }
2078 }
2079 break;
2080 case nir_var_mem_global: {
2081 LLVMValueRef address = get_src(ctx, instr->src[0]);
2082 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2083 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2084 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2085
2086 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2087 if (stride != natural_stride) {
2088 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2089 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2090 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2091
2092 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2093 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2094 values[i] = LLVMBuildLoad(ctx->ac.builder,
2095 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2096 }
2097 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2098 } else {
2099 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2100 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2101 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2102 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2103 return val;
2104 }
2105 }
2106 default:
2107 unreachable("unhandle variable mode");
2108 }
2109 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2110 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2111 }
2112
2113 static void
2114 visit_store_var(struct ac_nir_context *ctx,
2115 nir_intrinsic_instr *instr)
2116 {
2117 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2118 nir_variable *var = nir_deref_instr_get_variable(deref);
2119
2120 LLVMValueRef temp_ptr, value;
2121 int idx = 0;
2122 unsigned comp = 0;
2123 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2124 int writemask = instr->const_index[0];
2125 LLVMValueRef indir_index;
2126 unsigned const_index;
2127
2128 if (var) {
2129 get_deref_offset(ctx, deref, false,
2130 NULL, NULL, &const_index, &indir_index);
2131 idx = var->data.driver_location;
2132 comp = var->data.location_frac;
2133
2134 if (var->data.compact) {
2135 const_index += comp;
2136 comp = 0;
2137 }
2138 }
2139
2140 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2141 (deref->mode == nir_var_shader_out ||
2142 deref->mode == nir_var_function_temp)) {
2143
2144 src = LLVMBuildBitCast(ctx->ac.builder, src,
2145 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2146 "");
2147
2148 writemask = widen_mask(writemask, 2);
2149 }
2150
2151 writemask = writemask << comp;
2152
2153 switch (deref->mode) {
2154 case nir_var_shader_out:
2155
2156 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2157 LLVMValueRef vertex_index = NULL;
2158 LLVMValueRef indir_index = NULL;
2159 unsigned const_index = 0;
2160 const bool is_patch = var->data.patch;
2161
2162 get_deref_offset(ctx, deref, false, NULL,
2163 is_patch ? NULL : &vertex_index,
2164 &const_index, &indir_index);
2165
2166 ctx->abi->store_tcs_outputs(ctx->abi, var,
2167 vertex_index, indir_index,
2168 const_index, src, writemask);
2169 return;
2170 }
2171
2172 for (unsigned chan = 0; chan < 8; chan++) {
2173 int stride = 4;
2174 if (!(writemask & (1 << chan)))
2175 continue;
2176
2177 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2178
2179 if (var->data.compact)
2180 stride = 1;
2181 if (indir_index) {
2182 unsigned count = glsl_count_attribute_slots(
2183 var->type, false);
2184 count -= chan / 4;
2185 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2186 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2187 stride, true, true);
2188
2189 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2190 value, indir_index, "");
2191 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2192 count, stride, tmp_vec);
2193
2194 } else {
2195 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2196
2197 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2198 }
2199 }
2200 break;
2201 case nir_var_function_temp:
2202 for (unsigned chan = 0; chan < 8; chan++) {
2203 if (!(writemask & (1 << chan)))
2204 continue;
2205
2206 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2207 if (indir_index) {
2208 unsigned count = glsl_count_attribute_slots(
2209 var->type, false);
2210 count -= chan / 4;
2211 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2212 &ctx->ac, ctx->locals + idx + chan, count,
2213 4, true, true);
2214
2215 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2216 value, indir_index, "");
2217 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2218 count, 4, tmp_vec);
2219 } else {
2220 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2221
2222 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2223 }
2224 }
2225 break;
2226
2227 case nir_var_mem_global:
2228 case nir_var_mem_shared: {
2229 int writemask = instr->const_index[0];
2230 LLVMValueRef address = get_src(ctx, instr->src[0]);
2231 LLVMValueRef val = get_src(ctx, instr->src[1]);
2232
2233 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2234 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2235 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2236
2237 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2238 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2239 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2240
2241 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2242 stride == natural_stride) {
2243 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2244 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2245 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2246
2247 val = LLVMBuildBitCast(ctx->ac.builder, val,
2248 LLVMGetElementType(LLVMTypeOf(address)), "");
2249 LLVMBuildStore(ctx->ac.builder, val, address);
2250 } else {
2251 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2252 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2253 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2254 for (unsigned chan = 0; chan < 4; chan++) {
2255 if (!(writemask & (1 << chan)))
2256 continue;
2257
2258 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2259
2260 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2261 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2262 chan);
2263 src = LLVMBuildBitCast(ctx->ac.builder, src,
2264 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2265 LLVMBuildStore(ctx->ac.builder, src, ptr);
2266 }
2267 }
2268 break;
2269 }
2270 default:
2271 abort();
2272 break;
2273 }
2274 }
2275
2276 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2277 {
2278 switch (dim) {
2279 case GLSL_SAMPLER_DIM_BUF:
2280 return 1;
2281 case GLSL_SAMPLER_DIM_1D:
2282 return array ? 2 : 1;
2283 case GLSL_SAMPLER_DIM_2D:
2284 return array ? 3 : 2;
2285 case GLSL_SAMPLER_DIM_MS:
2286 return array ? 4 : 3;
2287 case GLSL_SAMPLER_DIM_3D:
2288 case GLSL_SAMPLER_DIM_CUBE:
2289 return 3;
2290 case GLSL_SAMPLER_DIM_RECT:
2291 case GLSL_SAMPLER_DIM_SUBPASS:
2292 return 2;
2293 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2294 return 3;
2295 default:
2296 break;
2297 }
2298 return 0;
2299 }
2300
2301 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2302 LLVMValueRef coord_x, LLVMValueRef coord_y,
2303 LLVMValueRef coord_z,
2304 LLVMValueRef sample_index,
2305 LLVMValueRef fmask_desc_ptr)
2306 {
2307 unsigned sample_chan = coord_z ? 3 : 2;
2308 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2309 addr[sample_chan] = sample_index;
2310
2311 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2312 return addr[sample_chan];
2313 }
2314
2315 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2316 {
2317 assert(instr->src[0].is_ssa);
2318 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2319 }
2320
2321 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2322 const nir_intrinsic_instr *instr,
2323 enum ac_descriptor_type desc_type,
2324 bool write)
2325 {
2326 nir_deref_instr *deref_instr =
2327 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2328 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2329
2330 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2331 }
2332
2333 static void get_image_coords(struct ac_nir_context *ctx,
2334 const nir_intrinsic_instr *instr,
2335 struct ac_image_args *args,
2336 enum glsl_sampler_dim dim,
2337 bool is_array)
2338 {
2339 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2340 LLVMValueRef masks[] = {
2341 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2342 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2343 };
2344 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2345
2346 int count;
2347 bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2348 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2349 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2350 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2351 bool gfx9_1d = ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2352 count = image_type_to_components_count(dim, is_array);
2353
2354 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2355 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2356 LLVMValueRef fmask_load_address[3];
2357 int chan;
2358
2359 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2360 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2361 if (is_array)
2362 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2363 else
2364 fmask_load_address[2] = NULL;
2365 if (add_frag_pos) {
2366 for (chan = 0; chan < 2; ++chan)
2367 fmask_load_address[chan] =
2368 LLVMBuildAdd(ctx->ac.builder, fmask_load_address[chan],
2369 LLVMBuildFPToUI(ctx->ac.builder, ctx->abi->frag_pos[chan],
2370 ctx->ac.i32, ""), "");
2371 fmask_load_address[2] = ac_to_integer(&ctx->ac, ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2372 }
2373 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2374 fmask_load_address[0],
2375 fmask_load_address[1],
2376 fmask_load_address[2],
2377 sample_index,
2378 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2379 AC_DESC_FMASK, &instr->instr, false, false));
2380 }
2381 if (count == 1 && !gfx9_1d) {
2382 if (instr->src[1].ssa->num_components)
2383 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2384 else
2385 args->coords[0] = src0;
2386 } else {
2387 int chan;
2388 if (is_ms)
2389 count--;
2390 for (chan = 0; chan < count; ++chan) {
2391 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2392 }
2393 if (add_frag_pos) {
2394 for (chan = 0; chan < 2; ++chan) {
2395 args->coords[chan] = LLVMBuildAdd(
2396 ctx->ac.builder, args->coords[chan],
2397 LLVMBuildFPToUI(
2398 ctx->ac.builder, ctx->abi->frag_pos[chan],
2399 ctx->ac.i32, ""), "");
2400 }
2401 args->coords[2] = ac_to_integer(&ctx->ac,
2402 ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2403 count++;
2404 }
2405
2406 if (gfx9_1d) {
2407 if (is_array) {
2408 args->coords[2] = args->coords[1];
2409 args->coords[1] = ctx->ac.i32_0;
2410 } else
2411 args->coords[1] = ctx->ac.i32_0;
2412 count++;
2413 }
2414
2415 if (is_ms) {
2416 args->coords[count] = sample_index;
2417 count++;
2418 }
2419 }
2420 }
2421
2422 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2423 const nir_intrinsic_instr *instr,
2424 bool write, bool atomic)
2425 {
2426 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2427 if (ctx->abi->gfx9_stride_size_workaround ||
2428 (ctx->abi->gfx9_stride_size_workaround_for_atomic && atomic)) {
2429 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2430 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2431 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2432
2433 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2434 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2435 elem_count, stride, "");
2436
2437 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2438 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2439 }
2440 return rsrc;
2441 }
2442
2443 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2444 const nir_intrinsic_instr *instr,
2445 bool bindless)
2446 {
2447 LLVMValueRef res;
2448
2449 enum glsl_sampler_dim dim;
2450 enum gl_access_qualifier access;
2451 bool is_array;
2452 if (bindless) {
2453 dim = nir_intrinsic_image_dim(instr);
2454 access = nir_intrinsic_access(instr);
2455 is_array = nir_intrinsic_image_array(instr);
2456 } else {
2457 const nir_deref_instr *image_deref = get_image_deref(instr);
2458 const struct glsl_type *type = image_deref->type;
2459 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2460 dim = glsl_get_sampler_dim(type);
2461 access = var->data.image.access;
2462 is_array = glsl_sampler_type_is_array(type);
2463 }
2464
2465 struct ac_image_args args = {};
2466
2467 args.cache_policy = get_cache_policy(ctx, access, false, false);
2468
2469 if (dim == GLSL_SAMPLER_DIM_BUF) {
2470 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2471 unsigned num_channels = util_last_bit(mask);
2472 LLVMValueRef rsrc, vindex;
2473
2474 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2475 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2476 ctx->ac.i32_0, "");
2477
2478 /* TODO: set "can_speculate" when OpenGL needs it. */
2479 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2480 ctx->ac.i32_0, num_channels,
2481 !!(args.cache_policy & ac_glc),
2482 false);
2483 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2484
2485 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2486 res = ac_to_integer(&ctx->ac, res);
2487 } else {
2488 args.opcode = ac_image_load;
2489 get_image_coords(ctx, instr, &args, dim, is_array);
2490 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2491 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2492 args.dmask = 15;
2493 args.attributes = AC_FUNC_ATTR_READONLY;
2494
2495 res = ac_build_image_opcode(&ctx->ac, &args);
2496 }
2497 return res;
2498 }
2499
2500 static void visit_image_store(struct ac_nir_context *ctx,
2501 nir_intrinsic_instr *instr,
2502 bool bindless)
2503 {
2504
2505
2506 enum glsl_sampler_dim dim;
2507 enum gl_access_qualifier access;
2508 bool is_array;
2509 if (bindless) {
2510 dim = nir_intrinsic_image_dim(instr);
2511 access = nir_intrinsic_access(instr);
2512 is_array = nir_intrinsic_image_array(instr);
2513 } else {
2514 const nir_deref_instr *image_deref = get_image_deref(instr);
2515 const struct glsl_type *type = image_deref->type;
2516 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2517 dim = glsl_get_sampler_dim(type);
2518 access = var->data.image.access;
2519 is_array = glsl_sampler_type_is_array(type);
2520 }
2521
2522 bool writeonly_memory = access & ACCESS_NON_READABLE;
2523 struct ac_image_args args = {};
2524
2525 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2526
2527 if (dim == GLSL_SAMPLER_DIM_BUF) {
2528 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2529 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2530 unsigned src_channels = ac_get_llvm_num_components(src);
2531 LLVMValueRef vindex;
2532
2533 if (src_channels == 3)
2534 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2535
2536 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2537 get_src(ctx, instr->src[1]),
2538 ctx->ac.i32_0, "");
2539
2540 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2541 ctx->ac.i32_0, src_channels,
2542 args.cache_policy & ac_glc,
2543 writeonly_memory);
2544 } else {
2545 args.opcode = ac_image_store;
2546 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2547 get_image_coords(ctx, instr, &args, dim, is_array);
2548 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2549 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2550 args.dmask = 15;
2551
2552 ac_build_image_opcode(&ctx->ac, &args);
2553 }
2554
2555 }
2556
2557 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2558 const nir_intrinsic_instr *instr,
2559 bool bindless)
2560 {
2561 LLVMValueRef params[7];
2562 int param_count = 0;
2563
2564 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2565 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2566 const char *atomic_name;
2567 char intrinsic_name[64];
2568 enum ac_atomic_op atomic_subop;
2569 MAYBE_UNUSED int length;
2570
2571 enum glsl_sampler_dim dim;
2572 bool is_unsigned = false;
2573 bool is_array;
2574 if (bindless) {
2575 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_min ||
2576 instr->intrinsic == nir_intrinsic_bindless_image_atomic_max) {
2577 const GLenum format = nir_intrinsic_format(instr);
2578 assert(format == GL_R32UI || format == GL_R32I);
2579 is_unsigned = format == GL_R32UI;
2580 }
2581 dim = nir_intrinsic_image_dim(instr);
2582 is_array = nir_intrinsic_image_array(instr);
2583 } else {
2584 const struct glsl_type *type = get_image_deref(instr)->type;
2585 is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2586 dim = glsl_get_sampler_dim(type);
2587 is_array = glsl_sampler_type_is_array(type);
2588 }
2589
2590 switch (instr->intrinsic) {
2591 case nir_intrinsic_bindless_image_atomic_add:
2592 case nir_intrinsic_image_deref_atomic_add:
2593 atomic_name = "add";
2594 atomic_subop = ac_atomic_add;
2595 break;
2596 case nir_intrinsic_bindless_image_atomic_min:
2597 case nir_intrinsic_image_deref_atomic_min:
2598 atomic_name = is_unsigned ? "umin" : "smin";
2599 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2600 break;
2601 case nir_intrinsic_bindless_image_atomic_max:
2602 case nir_intrinsic_image_deref_atomic_max:
2603 atomic_name = is_unsigned ? "umax" : "smax";
2604 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2605 break;
2606 case nir_intrinsic_bindless_image_atomic_and:
2607 case nir_intrinsic_image_deref_atomic_and:
2608 atomic_name = "and";
2609 atomic_subop = ac_atomic_and;
2610 break;
2611 case nir_intrinsic_bindless_image_atomic_or:
2612 case nir_intrinsic_image_deref_atomic_or:
2613 atomic_name = "or";
2614 atomic_subop = ac_atomic_or;
2615 break;
2616 case nir_intrinsic_bindless_image_atomic_xor:
2617 case nir_intrinsic_image_deref_atomic_xor:
2618 atomic_name = "xor";
2619 atomic_subop = ac_atomic_xor;
2620 break;
2621 case nir_intrinsic_bindless_image_atomic_exchange:
2622 case nir_intrinsic_image_deref_atomic_exchange:
2623 atomic_name = "swap";
2624 atomic_subop = ac_atomic_swap;
2625 break;
2626 case nir_intrinsic_bindless_image_atomic_comp_swap:
2627 case nir_intrinsic_image_deref_atomic_comp_swap:
2628 atomic_name = "cmpswap";
2629 atomic_subop = 0; /* not used */
2630 break;
2631 default:
2632 abort();
2633 }
2634
2635 if (cmpswap)
2636 params[param_count++] = get_src(ctx, instr->src[4]);
2637 params[param_count++] = get_src(ctx, instr->src[3]);
2638
2639 if (dim == GLSL_SAMPLER_DIM_BUF) {
2640 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2641 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2642 ctx->ac.i32_0, ""); /* vindex */
2643 params[param_count++] = ctx->ac.i32_0; /* voffset */
2644 if (HAVE_LLVM >= 0x900) {
2645 /* XXX: The new raw/struct atomic intrinsics are buggy
2646 * with LLVM 8, see r358579.
2647 */
2648 params[param_count++] = ctx->ac.i32_0; /* soffset */
2649 params[param_count++] = ctx->ac.i32_0; /* slc */
2650
2651 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2652 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2653 } else {
2654 params[param_count++] = ctx->ac.i1false; /* slc */
2655
2656 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2657 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2658 }
2659
2660 assert(length < sizeof(intrinsic_name));
2661 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2662 params, param_count, 0);
2663 } else {
2664 struct ac_image_args args = {};
2665 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2666 args.atomic = atomic_subop;
2667 args.data[0] = params[0];
2668 if (cmpswap)
2669 args.data[1] = params[1];
2670 get_image_coords(ctx, instr, &args, dim, is_array);
2671 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2672 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2673
2674 return ac_build_image_opcode(&ctx->ac, &args);
2675 }
2676 }
2677
2678 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2679 const nir_intrinsic_instr *instr,
2680 bool bindless)
2681 {
2682 enum glsl_sampler_dim dim;
2683 bool is_array;
2684 if (bindless) {
2685 dim = nir_intrinsic_image_dim(instr);
2686 is_array = nir_intrinsic_image_array(instr);
2687 } else {
2688 const struct glsl_type *type = get_image_deref(instr)->type;
2689 dim = glsl_get_sampler_dim(type);
2690 is_array = glsl_sampler_type_is_array(type);
2691 }
2692
2693 struct ac_image_args args = { 0 };
2694 args.dim = get_ac_sampler_dim(&ctx->ac, dim, is_array);
2695 args.dmask = 0xf;
2696 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2697 args.opcode = ac_image_get_resinfo;
2698 args.lod = ctx->ac.i32_0;
2699 args.attributes = AC_FUNC_ATTR_READNONE;
2700
2701 return ac_build_image_opcode(&ctx->ac, &args);
2702 }
2703
2704 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2705 const nir_intrinsic_instr *instr,
2706 bool bindless)
2707 {
2708 LLVMValueRef res;
2709
2710 enum glsl_sampler_dim dim;
2711 bool is_array;
2712 if (bindless) {
2713 dim = nir_intrinsic_image_dim(instr);
2714 is_array = nir_intrinsic_image_array(instr);
2715 } else {
2716 const struct glsl_type *type = get_image_deref(instr)->type;
2717 dim = glsl_get_sampler_dim(type);
2718 is_array = glsl_sampler_type_is_array(type);
2719 }
2720
2721 if (dim == GLSL_SAMPLER_DIM_BUF)
2722 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2723
2724 struct ac_image_args args = { 0 };
2725
2726 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2727 args.dmask = 0xf;
2728 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2729 args.opcode = ac_image_get_resinfo;
2730 args.lod = ctx->ac.i32_0;
2731 args.attributes = AC_FUNC_ATTR_READNONE;
2732
2733 res = ac_build_image_opcode(&ctx->ac, &args);
2734
2735 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2736
2737 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2738 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2739 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2740 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2741 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2742 }
2743 if (ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2744 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2745 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2746 ctx->ac.i32_1, "");
2747
2748 }
2749 return res;
2750 }
2751
2752 static void emit_membar(struct ac_llvm_context *ac,
2753 const nir_intrinsic_instr *instr)
2754 {
2755 unsigned waitcnt = NOOP_WAITCNT;
2756
2757 switch (instr->intrinsic) {
2758 case nir_intrinsic_memory_barrier:
2759 case nir_intrinsic_group_memory_barrier:
2760 waitcnt &= VM_CNT & LGKM_CNT;
2761 break;
2762 case nir_intrinsic_memory_barrier_atomic_counter:
2763 case nir_intrinsic_memory_barrier_buffer:
2764 case nir_intrinsic_memory_barrier_image:
2765 waitcnt &= VM_CNT;
2766 break;
2767 case nir_intrinsic_memory_barrier_shared:
2768 waitcnt &= LGKM_CNT;
2769 break;
2770 default:
2771 break;
2772 }
2773 if (waitcnt != NOOP_WAITCNT)
2774 ac_build_waitcnt(ac, waitcnt);
2775 }
2776
2777 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2778 {
2779 /* GFX6 only (thanks to a hw bug workaround):
2780 * The real barrier instruction isn’t needed, because an entire patch
2781 * always fits into a single wave.
2782 */
2783 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2784 ac_build_waitcnt(ac, LGKM_CNT & VM_CNT);
2785 return;
2786 }
2787 ac_build_s_barrier(ac);
2788 }
2789
2790 static void emit_discard(struct ac_nir_context *ctx,
2791 const nir_intrinsic_instr *instr)
2792 {
2793 LLVMValueRef cond;
2794
2795 if (instr->intrinsic == nir_intrinsic_discard_if) {
2796 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2797 get_src(ctx, instr->src[0]),
2798 ctx->ac.i32_0, "");
2799 } else {
2800 assert(instr->intrinsic == nir_intrinsic_discard);
2801 cond = ctx->ac.i1false;
2802 }
2803
2804 ctx->abi->emit_kill(ctx->abi, cond);
2805 }
2806
2807 static LLVMValueRef
2808 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2809 {
2810 LLVMValueRef result;
2811 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2812 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2813 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2814
2815 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2816 }
2817
2818 static LLVMValueRef
2819 visit_load_subgroup_id(struct ac_nir_context *ctx)
2820 {
2821 if (ctx->stage == MESA_SHADER_COMPUTE) {
2822 LLVMValueRef result;
2823 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2824 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2825 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2826 } else {
2827 return LLVMConstInt(ctx->ac.i32, 0, false);
2828 }
2829 }
2830
2831 static LLVMValueRef
2832 visit_load_num_subgroups(struct ac_nir_context *ctx)
2833 {
2834 if (ctx->stage == MESA_SHADER_COMPUTE) {
2835 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2836 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2837 } else {
2838 return LLVMConstInt(ctx->ac.i32, 1, false);
2839 }
2840 }
2841
2842 static LLVMValueRef
2843 visit_first_invocation(struct ac_nir_context *ctx)
2844 {
2845 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2846
2847 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2848 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2849 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2850 "llvm.cttz.i64",
2851 ctx->ac.i64, args, 2,
2852 AC_FUNC_ATTR_NOUNWIND |
2853 AC_FUNC_ATTR_READNONE);
2854
2855 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2856 }
2857
2858 static LLVMValueRef
2859 visit_load_shared(struct ac_nir_context *ctx,
2860 const nir_intrinsic_instr *instr)
2861 {
2862 LLVMValueRef values[4], derived_ptr, index, ret;
2863
2864 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2865
2866 for (int chan = 0; chan < instr->num_components; chan++) {
2867 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2868 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2869 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2870 }
2871
2872 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2873 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2874 }
2875
2876 static void
2877 visit_store_shared(struct ac_nir_context *ctx,
2878 const nir_intrinsic_instr *instr)
2879 {
2880 LLVMValueRef derived_ptr, data,index;
2881 LLVMBuilderRef builder = ctx->ac.builder;
2882
2883 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2884 LLVMValueRef src = get_src(ctx, instr->src[0]);
2885
2886 int writemask = nir_intrinsic_write_mask(instr);
2887 for (int chan = 0; chan < 4; chan++) {
2888 if (!(writemask & (1 << chan))) {
2889 continue;
2890 }
2891 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2892 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2893 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2894 LLVMBuildStore(builder, data, derived_ptr);
2895 }
2896 }
2897
2898 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2899 const nir_intrinsic_instr *instr,
2900 LLVMValueRef ptr, int src_idx)
2901 {
2902 LLVMValueRef result;
2903 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2904
2905 const char *sync_scope = HAVE_LLVM >= 0x0900 ? "workgroup-one-as" : "workgroup";
2906
2907 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2908 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2909 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2910 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
2911 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2912 } else {
2913 LLVMAtomicRMWBinOp op;
2914 switch (instr->intrinsic) {
2915 case nir_intrinsic_shared_atomic_add:
2916 case nir_intrinsic_deref_atomic_add:
2917 op = LLVMAtomicRMWBinOpAdd;
2918 break;
2919 case nir_intrinsic_shared_atomic_umin:
2920 case nir_intrinsic_deref_atomic_umin:
2921 op = LLVMAtomicRMWBinOpUMin;
2922 break;
2923 case nir_intrinsic_shared_atomic_umax:
2924 case nir_intrinsic_deref_atomic_umax:
2925 op = LLVMAtomicRMWBinOpUMax;
2926 break;
2927 case nir_intrinsic_shared_atomic_imin:
2928 case nir_intrinsic_deref_atomic_imin:
2929 op = LLVMAtomicRMWBinOpMin;
2930 break;
2931 case nir_intrinsic_shared_atomic_imax:
2932 case nir_intrinsic_deref_atomic_imax:
2933 op = LLVMAtomicRMWBinOpMax;
2934 break;
2935 case nir_intrinsic_shared_atomic_and:
2936 case nir_intrinsic_deref_atomic_and:
2937 op = LLVMAtomicRMWBinOpAnd;
2938 break;
2939 case nir_intrinsic_shared_atomic_or:
2940 case nir_intrinsic_deref_atomic_or:
2941 op = LLVMAtomicRMWBinOpOr;
2942 break;
2943 case nir_intrinsic_shared_atomic_xor:
2944 case nir_intrinsic_deref_atomic_xor:
2945 op = LLVMAtomicRMWBinOpXor;
2946 break;
2947 case nir_intrinsic_shared_atomic_exchange:
2948 case nir_intrinsic_deref_atomic_exchange:
2949 op = LLVMAtomicRMWBinOpXchg;
2950 break;
2951 default:
2952 return NULL;
2953 }
2954
2955 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
2956 }
2957 return result;
2958 }
2959
2960 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
2961 {
2962 LLVMValueRef values[2];
2963 LLVMValueRef pos[2];
2964
2965 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
2966 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
2967
2968 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
2969 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
2970 return ac_build_gather_values(&ctx->ac, values, 2);
2971 }
2972
2973 static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
2974 const nir_intrinsic_instr *instr)
2975 {
2976 LLVMValueRef result[4];
2977 LLVMValueRef interp_param;
2978 unsigned location;
2979 unsigned chan;
2980 LLVMValueRef src_c0 = NULL;
2981 LLVMValueRef src_c1 = NULL;
2982 LLVMValueRef src0 = NULL;
2983
2984 nir_deref_instr *deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2985 nir_variable *var = nir_deref_instr_get_variable(deref_instr);
2986 int input_base = ctx->abi->fs_input_attr_indices[var->data.location - VARYING_SLOT_VAR0];
2987 switch (instr->intrinsic) {
2988 case nir_intrinsic_interp_deref_at_centroid:
2989 location = INTERP_CENTROID;
2990 break;
2991 case nir_intrinsic_interp_deref_at_sample:
2992 case nir_intrinsic_interp_deref_at_offset:
2993 location = INTERP_CENTER;
2994 src0 = get_src(ctx, instr->src[1]);
2995 break;
2996 default:
2997 break;
2998 }
2999
3000 if (instr->intrinsic == nir_intrinsic_interp_deref_at_offset) {
3001 src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_0, ""));
3002 src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_1, ""));
3003 } else if (instr->intrinsic == nir_intrinsic_interp_deref_at_sample) {
3004 LLVMValueRef sample_position;
3005 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3006
3007 /* fetch sample ID */
3008 sample_position = ctx->abi->load_sample_position(ctx->abi, src0);
3009
3010 src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_0, "");
3011 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3012 src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_1, "");
3013 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3014 }
3015 interp_param = ctx->abi->lookup_interp_param(ctx->abi, var->data.interpolation, location);
3016
3017 if (location == INTERP_CENTER) {
3018 LLVMValueRef ij_out[2];
3019 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3020
3021 /*
3022 * take the I then J parameters, and the DDX/Y for it, and
3023 * calculate the IJ inputs for the interpolator.
3024 * temp1 = ddx * offset/sample.x + I;
3025 * interp_param.I = ddy * offset/sample.y + temp1;
3026 * temp1 = ddx * offset/sample.x + J;
3027 * interp_param.J = ddy * offset/sample.y + temp1;
3028 */
3029 for (unsigned i = 0; i < 2; i++) {
3030 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3031 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3032 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3033 ddxy_out, ix_ll, "");
3034 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3035 ddxy_out, iy_ll, "");
3036 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3037 interp_param, ix_ll, "");
3038 LLVMValueRef temp1, temp2;
3039
3040 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3041 ctx->ac.f32, "");
3042
3043 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3044 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3045
3046 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3047 temp2, ctx->ac.i32, "");
3048 }
3049 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3050
3051 }
3052
3053 LLVMValueRef attrib_idx = ctx->ac.i32_0;
3054 while(deref_instr->deref_type != nir_deref_type_var) {
3055 if (deref_instr->deref_type == nir_deref_type_array) {
3056 unsigned array_size = glsl_count_attribute_slots(deref_instr->type, false);
3057
3058 LLVMValueRef offset;
3059 if (nir_src_is_const(deref_instr->arr.index)) {
3060 offset = LLVMConstInt(ctx->ac.i32, array_size * nir_src_as_uint(deref_instr->arr.index), false);
3061 } else {
3062 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3063
3064 offset = LLVMBuildMul(ctx->ac.builder, indirect,
3065 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3066 }
3067
3068 attrib_idx = LLVMBuildAdd(ctx->ac.builder, attrib_idx, offset, "");
3069 deref_instr = nir_src_as_deref(deref_instr->parent);
3070 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3071 LLVMValueRef offset;
3072 unsigned sidx = deref_instr->strct.index;
3073 deref_instr = nir_src_as_deref(deref_instr->parent);
3074 offset = LLVMConstInt(ctx->ac.i32, glsl_get_struct_location_offset(deref_instr->type, sidx), false);
3075 attrib_idx = LLVMBuildAdd(ctx->ac.builder, attrib_idx, offset, "");
3076 } else {
3077 unreachable("Unsupported deref type");
3078 }
3079
3080 }
3081
3082 unsigned attrib_size = glsl_count_attribute_slots(var->type, false);
3083 for (chan = 0; chan < 4; chan++) {
3084 LLVMValueRef gather = LLVMGetUndef(LLVMVectorType(ctx->ac.f32, attrib_size));
3085 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false);
3086
3087 for (unsigned idx = 0; idx < attrib_size; ++idx) {
3088 LLVMValueRef v, attr_number;
3089
3090 attr_number = LLVMConstInt(ctx->ac.i32, input_base + idx, false);
3091 if (interp_param) {
3092 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3093 interp_param, ctx->ac.v2f32, "");
3094 LLVMValueRef i = LLVMBuildExtractElement(
3095 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3096 LLVMValueRef j = LLVMBuildExtractElement(
3097 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3098
3099 v = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3100 ctx->abi->prim_mask, i, j);
3101 } else {
3102 v = ac_build_fs_interp_mov(&ctx->ac, LLVMConstInt(ctx->ac.i32, 2, false),
3103 llvm_chan, attr_number, ctx->abi->prim_mask);
3104 }
3105
3106 gather = LLVMBuildInsertElement(ctx->ac.builder, gather, v,
3107 LLVMConstInt(ctx->ac.i32, idx, false), "");
3108 }
3109
3110 result[chan] = LLVMBuildExtractElement(ctx->ac.builder, gather, attrib_idx, "");
3111
3112 }
3113 return ac_build_varying_gather_values(&ctx->ac, result, instr->num_components,
3114 var->data.location_frac);
3115 }
3116
3117 static void visit_intrinsic(struct ac_nir_context *ctx,
3118 nir_intrinsic_instr *instr)
3119 {
3120 LLVMValueRef result = NULL;
3121
3122 switch (instr->intrinsic) {
3123 case nir_intrinsic_ballot:
3124 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3125 break;
3126 case nir_intrinsic_read_invocation:
3127 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3128 get_src(ctx, instr->src[1]));
3129 break;
3130 case nir_intrinsic_read_first_invocation:
3131 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3132 break;
3133 case nir_intrinsic_load_subgroup_invocation:
3134 result = ac_get_thread_id(&ctx->ac);
3135 break;
3136 case nir_intrinsic_load_work_group_id: {
3137 LLVMValueRef values[3];
3138
3139 for (int i = 0; i < 3; i++) {
3140 values[i] = ctx->abi->workgroup_ids[i] ?
3141 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3142 }
3143
3144 result = ac_build_gather_values(&ctx->ac, values, 3);
3145 break;
3146 }
3147 case nir_intrinsic_load_base_vertex:
3148 case nir_intrinsic_load_first_vertex:
3149 result = ctx->abi->load_base_vertex(ctx->abi);
3150 break;
3151 case nir_intrinsic_load_local_group_size:
3152 result = ctx->abi->load_local_group_size(ctx->abi);
3153 break;
3154 case nir_intrinsic_load_vertex_id:
3155 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3156 ctx->abi->base_vertex, "");
3157 break;
3158 case nir_intrinsic_load_vertex_id_zero_base: {
3159 result = ctx->abi->vertex_id;
3160 break;
3161 }
3162 case nir_intrinsic_load_local_invocation_id: {
3163 result = ctx->abi->local_invocation_ids;
3164 break;
3165 }
3166 case nir_intrinsic_load_base_instance:
3167 result = ctx->abi->start_instance;
3168 break;
3169 case nir_intrinsic_load_draw_id:
3170 result = ctx->abi->draw_id;
3171 break;
3172 case nir_intrinsic_load_view_index:
3173 result = ctx->abi->view_index;
3174 break;
3175 case nir_intrinsic_load_invocation_id:
3176 if (ctx->stage == MESA_SHADER_TESS_CTRL)
3177 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3178 else
3179 result = ctx->abi->gs_invocation_id;
3180 break;
3181 case nir_intrinsic_load_primitive_id:
3182 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3183 result = ctx->abi->gs_prim_id;
3184 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3185 result = ctx->abi->tcs_patch_id;
3186 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3187 result = ctx->abi->tes_patch_id;
3188 } else
3189 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3190 break;
3191 case nir_intrinsic_load_sample_id:
3192 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3193 break;
3194 case nir_intrinsic_load_sample_pos:
3195 result = load_sample_pos(ctx);
3196 break;
3197 case nir_intrinsic_load_sample_mask_in:
3198 result = ctx->abi->load_sample_mask_in(ctx->abi);
3199 break;
3200 case nir_intrinsic_load_frag_coord: {
3201 LLVMValueRef values[4] = {
3202 ctx->abi->frag_pos[0],
3203 ctx->abi->frag_pos[1],
3204 ctx->abi->frag_pos[2],
3205 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3206 };
3207 result = ac_to_integer(&ctx->ac,
3208 ac_build_gather_values(&ctx->ac, values, 4));
3209 break;
3210 }
3211 case nir_intrinsic_load_front_face:
3212 result = ctx->abi->front_face;
3213 break;
3214 case nir_intrinsic_load_helper_invocation:
3215 result = ac_build_load_helper_invocation(&ctx->ac);
3216 break;
3217 case nir_intrinsic_load_instance_id:
3218 result = ctx->abi->instance_id;
3219 break;
3220 case nir_intrinsic_load_num_work_groups:
3221 result = ctx->abi->num_work_groups;
3222 break;
3223 case nir_intrinsic_load_local_invocation_index:
3224 result = visit_load_local_invocation_index(ctx);
3225 break;
3226 case nir_intrinsic_load_subgroup_id:
3227 result = visit_load_subgroup_id(ctx);
3228 break;
3229 case nir_intrinsic_load_num_subgroups:
3230 result = visit_load_num_subgroups(ctx);
3231 break;
3232 case nir_intrinsic_first_invocation:
3233 result = visit_first_invocation(ctx);
3234 break;
3235 case nir_intrinsic_load_push_constant:
3236 result = visit_load_push_constant(ctx, instr);
3237 break;
3238 case nir_intrinsic_vulkan_resource_index: {
3239 LLVMValueRef index = get_src(ctx, instr->src[0]);
3240 unsigned desc_set = nir_intrinsic_desc_set(instr);
3241 unsigned binding = nir_intrinsic_binding(instr);
3242
3243 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3244 binding);
3245 break;
3246 }
3247 case nir_intrinsic_vulkan_resource_reindex:
3248 result = visit_vulkan_resource_reindex(ctx, instr);
3249 break;
3250 case nir_intrinsic_store_ssbo:
3251 visit_store_ssbo(ctx, instr);
3252 break;
3253 case nir_intrinsic_load_ssbo:
3254 result = visit_load_buffer(ctx, instr);
3255 break;
3256 case nir_intrinsic_ssbo_atomic_add:
3257 case nir_intrinsic_ssbo_atomic_imin:
3258 case nir_intrinsic_ssbo_atomic_umin:
3259 case nir_intrinsic_ssbo_atomic_imax:
3260 case nir_intrinsic_ssbo_atomic_umax:
3261 case nir_intrinsic_ssbo_atomic_and:
3262 case nir_intrinsic_ssbo_atomic_or:
3263 case nir_intrinsic_ssbo_atomic_xor:
3264 case nir_intrinsic_ssbo_atomic_exchange:
3265 case nir_intrinsic_ssbo_atomic_comp_swap:
3266 result = visit_atomic_ssbo(ctx, instr);
3267 break;
3268 case nir_intrinsic_load_ubo:
3269 result = visit_load_ubo_buffer(ctx, instr);
3270 break;
3271 case nir_intrinsic_get_buffer_size:
3272 result = visit_get_buffer_size(ctx, instr);
3273 break;
3274 case nir_intrinsic_load_deref:
3275 result = visit_load_var(ctx, instr);
3276 break;
3277 case nir_intrinsic_store_deref:
3278 visit_store_var(ctx, instr);
3279 break;
3280 case nir_intrinsic_load_shared:
3281 result = visit_load_shared(ctx, instr);
3282 break;
3283 case nir_intrinsic_store_shared:
3284 visit_store_shared(ctx, instr);
3285 break;
3286 case nir_intrinsic_bindless_image_samples:
3287 result = visit_image_samples(ctx, instr, true);
3288 break;
3289 case nir_intrinsic_image_deref_samples:
3290 result = visit_image_samples(ctx, instr, false);
3291 break;
3292 case nir_intrinsic_bindless_image_load:
3293 result = visit_image_load(ctx, instr, true);
3294 break;
3295 case nir_intrinsic_image_deref_load:
3296 result = visit_image_load(ctx, instr, false);
3297 break;
3298 case nir_intrinsic_bindless_image_store:
3299 visit_image_store(ctx, instr, true);
3300 break;
3301 case nir_intrinsic_image_deref_store:
3302 visit_image_store(ctx, instr, false);
3303 break;
3304 case nir_intrinsic_bindless_image_atomic_add:
3305 case nir_intrinsic_bindless_image_atomic_min:
3306 case nir_intrinsic_bindless_image_atomic_max:
3307 case nir_intrinsic_bindless_image_atomic_and:
3308 case nir_intrinsic_bindless_image_atomic_or:
3309 case nir_intrinsic_bindless_image_atomic_xor:
3310 case nir_intrinsic_bindless_image_atomic_exchange:
3311 case nir_intrinsic_bindless_image_atomic_comp_swap:
3312 result = visit_image_atomic(ctx, instr, true);
3313 break;
3314 case nir_intrinsic_image_deref_atomic_add:
3315 case nir_intrinsic_image_deref_atomic_min:
3316 case nir_intrinsic_image_deref_atomic_max:
3317 case nir_intrinsic_image_deref_atomic_and:
3318 case nir_intrinsic_image_deref_atomic_or:
3319 case nir_intrinsic_image_deref_atomic_xor:
3320 case nir_intrinsic_image_deref_atomic_exchange:
3321 case nir_intrinsic_image_deref_atomic_comp_swap:
3322 result = visit_image_atomic(ctx, instr, false);
3323 break;
3324 case nir_intrinsic_bindless_image_size:
3325 result = visit_image_size(ctx, instr, true);
3326 break;
3327 case nir_intrinsic_image_deref_size:
3328 result = visit_image_size(ctx, instr, false);
3329 break;
3330 case nir_intrinsic_shader_clock:
3331 result = ac_build_shader_clock(&ctx->ac);
3332 break;
3333 case nir_intrinsic_discard:
3334 case nir_intrinsic_discard_if:
3335 emit_discard(ctx, instr);
3336 break;
3337 case nir_intrinsic_memory_barrier:
3338 case nir_intrinsic_group_memory_barrier:
3339 case nir_intrinsic_memory_barrier_atomic_counter:
3340 case nir_intrinsic_memory_barrier_buffer:
3341 case nir_intrinsic_memory_barrier_image:
3342 case nir_intrinsic_memory_barrier_shared:
3343 emit_membar(&ctx->ac, instr);
3344 break;
3345 case nir_intrinsic_barrier:
3346 ac_emit_barrier(&ctx->ac, ctx->stage);
3347 break;
3348 case nir_intrinsic_shared_atomic_add:
3349 case nir_intrinsic_shared_atomic_imin:
3350 case nir_intrinsic_shared_atomic_umin:
3351 case nir_intrinsic_shared_atomic_imax:
3352 case nir_intrinsic_shared_atomic_umax:
3353 case nir_intrinsic_shared_atomic_and:
3354 case nir_intrinsic_shared_atomic_or:
3355 case nir_intrinsic_shared_atomic_xor:
3356 case nir_intrinsic_shared_atomic_exchange:
3357 case nir_intrinsic_shared_atomic_comp_swap: {
3358 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3359 result = visit_var_atomic(ctx, instr, ptr, 1);
3360 break;
3361 }
3362 case nir_intrinsic_deref_atomic_add:
3363 case nir_intrinsic_deref_atomic_imin:
3364 case nir_intrinsic_deref_atomic_umin:
3365 case nir_intrinsic_deref_atomic_imax:
3366 case nir_intrinsic_deref_atomic_umax:
3367 case nir_intrinsic_deref_atomic_and:
3368 case nir_intrinsic_deref_atomic_or:
3369 case nir_intrinsic_deref_atomic_xor:
3370 case nir_intrinsic_deref_atomic_exchange:
3371 case nir_intrinsic_deref_atomic_comp_swap: {
3372 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3373 result = visit_var_atomic(ctx, instr, ptr, 1);
3374 break;
3375 }
3376 case nir_intrinsic_interp_deref_at_centroid:
3377 case nir_intrinsic_interp_deref_at_sample:
3378 case nir_intrinsic_interp_deref_at_offset:
3379 result = visit_interp(ctx, instr);
3380 break;
3381 case nir_intrinsic_emit_vertex:
3382 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3383 break;
3384 case nir_intrinsic_end_primitive:
3385 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3386 break;
3387 case nir_intrinsic_load_tess_coord:
3388 result = ctx->abi->load_tess_coord(ctx->abi);
3389 break;
3390 case nir_intrinsic_load_tess_level_outer:
3391 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
3392 break;
3393 case nir_intrinsic_load_tess_level_inner:
3394 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
3395 break;
3396 case nir_intrinsic_load_patch_vertices_in:
3397 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3398 break;
3399 case nir_intrinsic_vote_all: {
3400 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3401 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3402 break;
3403 }
3404 case nir_intrinsic_vote_any: {
3405 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3406 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3407 break;
3408 }
3409 case nir_intrinsic_shuffle:
3410 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3411 get_src(ctx, instr->src[1]));
3412 break;
3413 case nir_intrinsic_reduce:
3414 result = ac_build_reduce(&ctx->ac,
3415 get_src(ctx, instr->src[0]),
3416 instr->const_index[0],
3417 instr->const_index[1]);
3418 break;
3419 case nir_intrinsic_inclusive_scan:
3420 result = ac_build_inclusive_scan(&ctx->ac,
3421 get_src(ctx, instr->src[0]),
3422 instr->const_index[0]);
3423 break;
3424 case nir_intrinsic_exclusive_scan:
3425 result = ac_build_exclusive_scan(&ctx->ac,
3426 get_src(ctx, instr->src[0]),
3427 instr->const_index[0]);
3428 break;
3429 case nir_intrinsic_quad_broadcast: {
3430 unsigned lane = nir_src_as_uint(instr->src[1]);
3431 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3432 lane, lane, lane, lane);
3433 break;
3434 }
3435 case nir_intrinsic_quad_swap_horizontal:
3436 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3437 break;
3438 case nir_intrinsic_quad_swap_vertical:
3439 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3440 break;
3441 case nir_intrinsic_quad_swap_diagonal:
3442 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3443 break;
3444 default:
3445 fprintf(stderr, "Unknown intrinsic: ");
3446 nir_print_instr(&instr->instr, stderr);
3447 fprintf(stderr, "\n");
3448 break;
3449 }
3450 if (result) {
3451 ctx->ssa_defs[instr->dest.ssa.index] = result;
3452 }
3453 }
3454
3455 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3456 unsigned base_index,
3457 unsigned constant_index,
3458 LLVMValueRef dynamic_index)
3459 {
3460 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3461 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3462 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3463
3464 /* Bindless uniforms are 64bit so multiple index by 8 */
3465 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3466 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3467
3468 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3469
3470 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3471 NULL, 0, false, false, true, true);
3472
3473 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3474 }
3475
3476 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3477 nir_deref_instr *deref_instr,
3478 enum ac_descriptor_type desc_type,
3479 const nir_instr *instr,
3480 bool image, bool write)
3481 {
3482 LLVMValueRef index = NULL;
3483 unsigned constant_index = 0;
3484 unsigned descriptor_set;
3485 unsigned base_index;
3486 bool bindless = false;
3487
3488 if (!deref_instr) {
3489 descriptor_set = 0;
3490 if (image) {
3491 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3492 base_index = 0;
3493 bindless = true;
3494 index = get_src(ctx, img_instr->src[0]);
3495 } else {
3496 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3497 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3498 nir_tex_src_sampler_handle);
3499 if (sampSrcIdx != -1) {
3500 base_index = 0;
3501 bindless = true;
3502 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3503 } else {
3504 assert(tex_instr && !image);
3505 base_index = tex_instr->sampler_index;
3506 }
3507 }
3508 } else {
3509 while(deref_instr->deref_type != nir_deref_type_var) {
3510 if (deref_instr->deref_type == nir_deref_type_array) {
3511 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3512 if (!array_size)
3513 array_size = 1;
3514
3515 if (nir_src_is_const(deref_instr->arr.index)) {
3516 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3517 } else {
3518 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3519
3520 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3521 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3522
3523 if (!index)
3524 index = indirect;
3525 else
3526 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3527 }
3528
3529 deref_instr = nir_src_as_deref(deref_instr->parent);
3530 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3531 unsigned sidx = deref_instr->strct.index;
3532 deref_instr = nir_src_as_deref(deref_instr->parent);
3533 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3534 } else {
3535 unreachable("Unsupported deref type");
3536 }
3537 }
3538 descriptor_set = deref_instr->var->data.descriptor_set;
3539
3540 if (deref_instr->var->data.bindless) {
3541 /* For now just assert on unhandled variable types */
3542 assert(deref_instr->var->data.mode == nir_var_uniform);
3543
3544 base_index = deref_instr->var->data.driver_location;
3545 bindless = true;
3546
3547 index = index ? index : ctx->ac.i32_0;
3548 index = get_bindless_index_from_uniform(ctx, base_index,
3549 constant_index, index);
3550 } else
3551 base_index = deref_instr->var->data.binding;
3552 }
3553
3554 return ctx->abi->load_sampler_desc(ctx->abi,
3555 descriptor_set,
3556 base_index,
3557 constant_index, index,
3558 desc_type, image, write, bindless);
3559 }
3560
3561 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3562 *
3563 * GFX6-GFX7:
3564 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3565 * filtering manually. The driver sets img7 to a mask clearing
3566 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3567 * s_and_b32 samp0, samp0, img7
3568 *
3569 * GFX8:
3570 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3571 */
3572 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3573 LLVMValueRef res, LLVMValueRef samp)
3574 {
3575 LLVMBuilderRef builder = ctx->ac.builder;
3576 LLVMValueRef img7, samp0;
3577
3578 if (ctx->ac.chip_class >= GFX8)
3579 return samp;
3580
3581 img7 = LLVMBuildExtractElement(builder, res,
3582 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3583 samp0 = LLVMBuildExtractElement(builder, samp,
3584 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3585 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3586 return LLVMBuildInsertElement(builder, samp, samp0,
3587 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3588 }
3589
3590 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3591 nir_tex_instr *instr,
3592 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3593 LLVMValueRef *fmask_ptr)
3594 {
3595 nir_deref_instr *texture_deref_instr = NULL;
3596 nir_deref_instr *sampler_deref_instr = NULL;
3597 int plane = -1;
3598
3599 for (unsigned i = 0; i < instr->num_srcs; i++) {
3600 switch (instr->src[i].src_type) {
3601 case nir_tex_src_texture_deref:
3602 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3603 break;
3604 case nir_tex_src_sampler_deref:
3605 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3606 break;
3607 case nir_tex_src_plane:
3608 plane = nir_src_as_int(instr->src[i].src);
3609 break;
3610 default:
3611 break;
3612 }
3613 }
3614
3615 if (!sampler_deref_instr)
3616 sampler_deref_instr = texture_deref_instr;
3617
3618 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3619
3620 if (plane >= 0) {
3621 assert(instr->op != nir_texop_txf_ms &&
3622 instr->op != nir_texop_samples_identical);
3623 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3624
3625 main_descriptor = AC_DESC_PLANE_0 + plane;
3626 }
3627
3628 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3629
3630 if (samp_ptr) {
3631 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3632 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3633 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3634 }
3635 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3636 instr->op == nir_texop_samples_identical))
3637 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3638 }
3639
3640 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3641 LLVMValueRef coord)
3642 {
3643 coord = ac_to_float(ctx, coord);
3644 coord = ac_build_round(ctx, coord);
3645 coord = ac_to_integer(ctx, coord);
3646 return coord;
3647 }
3648
3649 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3650 {
3651 LLVMValueRef result = NULL;
3652 struct ac_image_args args = { 0 };
3653 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3654 LLVMValueRef ddx = NULL, ddy = NULL;
3655 unsigned offset_src = 0;
3656
3657 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3658
3659 for (unsigned i = 0; i < instr->num_srcs; i++) {
3660 switch (instr->src[i].src_type) {
3661 case nir_tex_src_coord: {
3662 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3663 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3664 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3665 break;
3666 }
3667 case nir_tex_src_projector:
3668 break;
3669 case nir_tex_src_comparator:
3670 if (instr->is_shadow)
3671 args.compare = get_src(ctx, instr->src[i].src);
3672 break;
3673 case nir_tex_src_offset:
3674 args.offset = get_src(ctx, instr->src[i].src);
3675 offset_src = i;
3676 break;
3677 case nir_tex_src_bias:
3678 if (instr->op == nir_texop_txb)
3679 args.bias = get_src(ctx, instr->src[i].src);
3680 break;
3681 case nir_tex_src_lod: {
3682 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
3683 args.level_zero = true;
3684 else
3685 args.lod = get_src(ctx, instr->src[i].src);
3686 break;
3687 }
3688 case nir_tex_src_ms_index:
3689 sample_index = get_src(ctx, instr->src[i].src);
3690 break;
3691 case nir_tex_src_ms_mcs:
3692 break;
3693 case nir_tex_src_ddx:
3694 ddx = get_src(ctx, instr->src[i].src);
3695 break;
3696 case nir_tex_src_ddy:
3697 ddy = get_src(ctx, instr->src[i].src);
3698 break;
3699 case nir_tex_src_texture_offset:
3700 case nir_tex_src_sampler_offset:
3701 case nir_tex_src_plane:
3702 default:
3703 break;
3704 }
3705 }
3706
3707 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3708 result = get_buffer_size(ctx, args.resource, true);
3709 goto write_result;
3710 }
3711
3712 if (instr->op == nir_texop_texture_samples) {
3713 LLVMValueRef res, samples, is_msaa;
3714 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3715 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3716 LLVMConstInt(ctx->ac.i32, 3, false), "");
3717 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3718 LLVMConstInt(ctx->ac.i32, 28, false), "");
3719 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3720 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3721 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3722 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3723
3724 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3725 LLVMConstInt(ctx->ac.i32, 16, false), "");
3726 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3727 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3728 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3729 samples, "");
3730 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3731 ctx->ac.i32_1, "");
3732 result = samples;
3733 goto write_result;
3734 }
3735
3736 if (args.offset && instr->op != nir_texop_txf) {
3737 LLVMValueRef offset[3], pack;
3738 for (unsigned chan = 0; chan < 3; ++chan)
3739 offset[chan] = ctx->ac.i32_0;
3740
3741 unsigned num_components = ac_get_llvm_num_components(args.offset);
3742 for (unsigned chan = 0; chan < num_components; chan++) {
3743 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3744 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3745 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3746 if (chan)
3747 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3748 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3749 }
3750 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3751 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3752 args.offset = pack;
3753 }
3754
3755 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3756 * so the depth comparison value isn't clamped for Z16 and
3757 * Z24 anymore. Do it manually here.
3758 *
3759 * It's unnecessary if the original texture format was
3760 * Z32_FLOAT, but we don't know that here.
3761 */
3762 if (args.compare && ctx->ac.chip_class >= GFX8 && ctx->abi->clamp_shadow_reference)
3763 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3764
3765 /* pack derivatives */
3766 if (ddx || ddy) {
3767 int num_src_deriv_channels, num_dest_deriv_channels;
3768 switch (instr->sampler_dim) {
3769 case GLSL_SAMPLER_DIM_3D:
3770 case GLSL_SAMPLER_DIM_CUBE:
3771 num_src_deriv_channels = 3;
3772 num_dest_deriv_channels = 3;
3773 break;
3774 case GLSL_SAMPLER_DIM_2D:
3775 default:
3776 num_src_deriv_channels = 2;
3777 num_dest_deriv_channels = 2;
3778 break;
3779 case GLSL_SAMPLER_DIM_1D:
3780 num_src_deriv_channels = 1;
3781 if (ctx->ac.chip_class >= GFX9) {
3782 num_dest_deriv_channels = 2;
3783 } else {
3784 num_dest_deriv_channels = 1;
3785 }
3786 break;
3787 }
3788
3789 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3790 args.derivs[i] = ac_to_float(&ctx->ac,
3791 ac_llvm_extract_elem(&ctx->ac, ddx, i));
3792 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
3793 ac_llvm_extract_elem(&ctx->ac, ddy, i));
3794 }
3795 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3796 args.derivs[i] = ctx->ac.f32_0;
3797 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3798 }
3799 }
3800
3801 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
3802 for (unsigned chan = 0; chan < instr->coord_components; chan++)
3803 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
3804 if (instr->coord_components == 3)
3805 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
3806 ac_prepare_cube_coords(&ctx->ac,
3807 instr->op == nir_texop_txd, instr->is_array,
3808 instr->op == nir_texop_lod, args.coords, args.derivs);
3809 }
3810
3811 /* Texture coordinates fixups */
3812 if (instr->coord_components > 1 &&
3813 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3814 instr->is_array &&
3815 instr->op != nir_texop_txf) {
3816 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
3817 }
3818
3819 if (instr->coord_components > 2 &&
3820 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3821 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3822 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3823 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3824 instr->is_array &&
3825 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3826 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
3827 }
3828
3829 if (ctx->ac.chip_class >= GFX9 &&
3830 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3831 instr->op != nir_texop_lod) {
3832 LLVMValueRef filler;
3833 if (instr->op == nir_texop_txf)
3834 filler = ctx->ac.i32_0;
3835 else
3836 filler = LLVMConstReal(ctx->ac.f32, 0.5);
3837
3838 if (instr->is_array)
3839 args.coords[2] = args.coords[1];
3840 args.coords[1] = filler;
3841 }
3842
3843 /* Pack sample index */
3844 if (instr->op == nir_texop_txf_ms && sample_index)
3845 args.coords[instr->coord_components] = sample_index;
3846
3847 if (instr->op == nir_texop_samples_identical) {
3848 struct ac_image_args txf_args = { 0 };
3849 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
3850
3851 txf_args.dmask = 0xf;
3852 txf_args.resource = fmask_ptr;
3853 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
3854 result = build_tex_intrinsic(ctx, instr, &txf_args);
3855
3856 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3857 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
3858 goto write_result;
3859 }
3860
3861 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS &&
3862 instr->op != nir_texop_txs) {
3863 unsigned sample_chan = instr->is_array ? 3 : 2;
3864 args.coords[sample_chan] = adjust_sample_index_using_fmask(
3865 &ctx->ac, args.coords[0], args.coords[1],
3866 instr->is_array ? args.coords[2] : NULL,
3867 args.coords[sample_chan], fmask_ptr);
3868 }
3869
3870 if (args.offset && instr->op == nir_texop_txf) {
3871 int num_offsets = instr->src[offset_src].src.ssa->num_components;
3872 num_offsets = MIN2(num_offsets, instr->coord_components);
3873 for (unsigned i = 0; i < num_offsets; ++i) {
3874 args.coords[i] = LLVMBuildAdd(
3875 ctx->ac.builder, args.coords[i],
3876 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
3877 }
3878 args.offset = NULL;
3879 }
3880
3881 /* TODO TG4 support */
3882 args.dmask = 0xf;
3883 if (instr->op == nir_texop_tg4) {
3884 if (instr->is_shadow)
3885 args.dmask = 1;
3886 else
3887 args.dmask = 1 << instr->component;
3888 }
3889
3890 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
3891 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
3892 result = build_tex_intrinsic(ctx, instr, &args);
3893
3894 if (instr->op == nir_texop_query_levels)
3895 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
3896 else if (instr->is_shadow && instr->is_new_style_shadow &&
3897 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
3898 instr->op != nir_texop_tg4)
3899 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3900 else if (instr->op == nir_texop_txs &&
3901 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3902 instr->is_array) {
3903 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3904 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3905 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3906 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3907 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
3908 } else if (ctx->ac.chip_class >= GFX9 &&
3909 instr->op == nir_texop_txs &&
3910 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3911 instr->is_array) {
3912 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3913 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3914 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
3915 ctx->ac.i32_1, "");
3916 } else if (instr->dest.ssa.num_components != 4)
3917 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
3918
3919 write_result:
3920 if (result) {
3921 assert(instr->dest.is_ssa);
3922 result = ac_to_integer(&ctx->ac, result);
3923 ctx->ssa_defs[instr->dest.ssa.index] = result;
3924 }
3925 }
3926
3927
3928 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
3929 {
3930 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3931 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
3932
3933 ctx->ssa_defs[instr->dest.ssa.index] = result;
3934 _mesa_hash_table_insert(ctx->phis, instr, result);
3935 }
3936
3937 static void visit_post_phi(struct ac_nir_context *ctx,
3938 nir_phi_instr *instr,
3939 LLVMValueRef llvm_phi)
3940 {
3941 nir_foreach_phi_src(src, instr) {
3942 LLVMBasicBlockRef block = get_block(ctx, src->pred);
3943 LLVMValueRef llvm_src = get_src(ctx, src->src);
3944
3945 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
3946 }
3947 }
3948
3949 static void phi_post_pass(struct ac_nir_context *ctx)
3950 {
3951 hash_table_foreach(ctx->phis, entry) {
3952 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
3953 (LLVMValueRef)entry->data);
3954 }
3955 }
3956
3957
3958 static void visit_ssa_undef(struct ac_nir_context *ctx,
3959 const nir_ssa_undef_instr *instr)
3960 {
3961 unsigned num_components = instr->def.num_components;
3962 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
3963 LLVMValueRef undef;
3964
3965 if (num_components == 1)
3966 undef = LLVMGetUndef(type);
3967 else {
3968 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
3969 }
3970 ctx->ssa_defs[instr->def.index] = undef;
3971 }
3972
3973 static void visit_jump(struct ac_llvm_context *ctx,
3974 const nir_jump_instr *instr)
3975 {
3976 switch (instr->type) {
3977 case nir_jump_break:
3978 ac_build_break(ctx);
3979 break;
3980 case nir_jump_continue:
3981 ac_build_continue(ctx);
3982 break;
3983 default:
3984 fprintf(stderr, "Unknown NIR jump instr: ");
3985 nir_print_instr(&instr->instr, stderr);
3986 fprintf(stderr, "\n");
3987 abort();
3988 }
3989 }
3990
3991 static LLVMTypeRef
3992 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
3993 enum glsl_base_type type)
3994 {
3995 switch (type) {
3996 case GLSL_TYPE_INT:
3997 case GLSL_TYPE_UINT:
3998 case GLSL_TYPE_BOOL:
3999 case GLSL_TYPE_SUBROUTINE:
4000 return ac->i32;
4001 case GLSL_TYPE_INT8:
4002 case GLSL_TYPE_UINT8:
4003 return ac->i8;
4004 case GLSL_TYPE_INT16:
4005 case GLSL_TYPE_UINT16:
4006 return ac->i16;
4007 case GLSL_TYPE_FLOAT:
4008 return ac->f32;
4009 case GLSL_TYPE_FLOAT16:
4010 return ac->f16;
4011 case GLSL_TYPE_INT64:
4012 case GLSL_TYPE_UINT64:
4013 return ac->i64;
4014 case GLSL_TYPE_DOUBLE:
4015 return ac->f64;
4016 default:
4017 unreachable("unknown GLSL type");
4018 }
4019 }
4020
4021 static LLVMTypeRef
4022 glsl_to_llvm_type(struct ac_llvm_context *ac,
4023 const struct glsl_type *type)
4024 {
4025 if (glsl_type_is_scalar(type)) {
4026 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4027 }
4028
4029 if (glsl_type_is_vector(type)) {
4030 return LLVMVectorType(
4031 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4032 glsl_get_vector_elements(type));
4033 }
4034
4035 if (glsl_type_is_matrix(type)) {
4036 return LLVMArrayType(
4037 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4038 glsl_get_matrix_columns(type));
4039 }
4040
4041 if (glsl_type_is_array(type)) {
4042 return LLVMArrayType(
4043 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4044 glsl_get_length(type));
4045 }
4046
4047 assert(glsl_type_is_struct_or_ifc(type));
4048
4049 LLVMTypeRef member_types[glsl_get_length(type)];
4050
4051 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4052 member_types[i] =
4053 glsl_to_llvm_type(ac,
4054 glsl_get_struct_field(type, i));
4055 }
4056
4057 return LLVMStructTypeInContext(ac->context, member_types,
4058 glsl_get_length(type), false);
4059 }
4060
4061 static void visit_deref(struct ac_nir_context *ctx,
4062 nir_deref_instr *instr)
4063 {
4064 if (instr->mode != nir_var_mem_shared &&
4065 instr->mode != nir_var_mem_global)
4066 return;
4067
4068 LLVMValueRef result = NULL;
4069 switch(instr->deref_type) {
4070 case nir_deref_type_var: {
4071 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4072 result = entry->data;
4073 break;
4074 }
4075 case nir_deref_type_struct:
4076 if (instr->mode == nir_var_mem_global) {
4077 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4078 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4079 instr->strct.index);
4080 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4081 LLVMConstInt(ctx->ac.i32, offset, 0));
4082 } else {
4083 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4084 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4085 }
4086 break;
4087 case nir_deref_type_array:
4088 if (instr->mode == nir_var_mem_global) {
4089 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4090 unsigned stride = glsl_get_explicit_stride(parent->type);
4091
4092 if ((glsl_type_is_matrix(parent->type) &&
4093 glsl_matrix_type_is_row_major(parent->type)) ||
4094 (glsl_type_is_vector(parent->type) && stride == 0))
4095 stride = type_scalar_size_bytes(parent->type);
4096
4097 assert(stride > 0);
4098 LLVMValueRef index = get_src(ctx, instr->arr.index);
4099 if (LLVMTypeOf(index) != ctx->ac.i64)
4100 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4101
4102 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4103
4104 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4105 } else {
4106 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4107 get_src(ctx, instr->arr.index));
4108 }
4109 break;
4110 case nir_deref_type_ptr_as_array:
4111 if (instr->mode == nir_var_mem_global) {
4112 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4113
4114 LLVMValueRef index = get_src(ctx, instr->arr.index);
4115 if (LLVMTypeOf(index) != ctx->ac.i64)
4116 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4117
4118 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4119
4120 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4121 } else {
4122 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4123 get_src(ctx, instr->arr.index));
4124 }
4125 break;
4126 case nir_deref_type_cast: {
4127 result = get_src(ctx, instr->parent);
4128
4129 /* We can't use the structs from LLVM because the shader
4130 * specifies its own offsets. */
4131 LLVMTypeRef pointee_type = ctx->ac.i8;
4132 if (instr->mode == nir_var_mem_shared)
4133 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4134
4135 unsigned address_space;
4136
4137 switch(instr->mode) {
4138 case nir_var_mem_shared:
4139 address_space = AC_ADDR_SPACE_LDS;
4140 break;
4141 case nir_var_mem_global:
4142 address_space = AC_ADDR_SPACE_GLOBAL;
4143 break;
4144 default:
4145 unreachable("Unhandled address space");
4146 }
4147
4148 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4149
4150 if (LLVMTypeOf(result) != type) {
4151 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4152 result = LLVMBuildBitCast(ctx->ac.builder, result,
4153 type, "");
4154 } else {
4155 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4156 type, "");
4157 }
4158 }
4159 break;
4160 }
4161 default:
4162 unreachable("Unhandled deref_instr deref type");
4163 }
4164
4165 ctx->ssa_defs[instr->dest.ssa.index] = result;
4166 }
4167
4168 static void visit_cf_list(struct ac_nir_context *ctx,
4169 struct exec_list *list);
4170
4171 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4172 {
4173 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->ac.builder);
4174 nir_foreach_instr(instr, block)
4175 {
4176 switch (instr->type) {
4177 case nir_instr_type_alu:
4178 visit_alu(ctx, nir_instr_as_alu(instr));
4179 break;
4180 case nir_instr_type_load_const:
4181 visit_load_const(ctx, nir_instr_as_load_const(instr));
4182 break;
4183 case nir_instr_type_intrinsic:
4184 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4185 break;
4186 case nir_instr_type_tex:
4187 visit_tex(ctx, nir_instr_as_tex(instr));
4188 break;
4189 case nir_instr_type_phi:
4190 visit_phi(ctx, nir_instr_as_phi(instr));
4191 break;
4192 case nir_instr_type_ssa_undef:
4193 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4194 break;
4195 case nir_instr_type_jump:
4196 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4197 break;
4198 case nir_instr_type_deref:
4199 visit_deref(ctx, nir_instr_as_deref(instr));
4200 break;
4201 default:
4202 fprintf(stderr, "Unknown NIR instr type: ");
4203 nir_print_instr(instr, stderr);
4204 fprintf(stderr, "\n");
4205 abort();
4206 }
4207 }
4208
4209 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
4210 }
4211
4212 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4213 {
4214 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4215
4216 nir_block *then_block =
4217 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4218
4219 ac_build_uif(&ctx->ac, value, then_block->index);
4220
4221 visit_cf_list(ctx, &if_stmt->then_list);
4222
4223 if (!exec_list_is_empty(&if_stmt->else_list)) {
4224 nir_block *else_block =
4225 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4226
4227 ac_build_else(&ctx->ac, else_block->index);
4228 visit_cf_list(ctx, &if_stmt->else_list);
4229 }
4230
4231 ac_build_endif(&ctx->ac, then_block->index);
4232 }
4233
4234 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4235 {
4236 nir_block *first_loop_block =
4237 (nir_block *) exec_list_get_head(&loop->body);
4238
4239 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4240
4241 visit_cf_list(ctx, &loop->body);
4242
4243 ac_build_endloop(&ctx->ac, first_loop_block->index);
4244 }
4245
4246 static void visit_cf_list(struct ac_nir_context *ctx,
4247 struct exec_list *list)
4248 {
4249 foreach_list_typed(nir_cf_node, node, node, list)
4250 {
4251 switch (node->type) {
4252 case nir_cf_node_block:
4253 visit_block(ctx, nir_cf_node_as_block(node));
4254 break;
4255
4256 case nir_cf_node_if:
4257 visit_if(ctx, nir_cf_node_as_if(node));
4258 break;
4259
4260 case nir_cf_node_loop:
4261 visit_loop(ctx, nir_cf_node_as_loop(node));
4262 break;
4263
4264 default:
4265 assert(0);
4266 }
4267 }
4268 }
4269
4270 void
4271 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4272 struct ac_shader_abi *abi,
4273 struct nir_shader *nir,
4274 struct nir_variable *variable,
4275 gl_shader_stage stage)
4276 {
4277 unsigned output_loc = variable->data.driver_location / 4;
4278 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4279
4280 /* tess ctrl has it's own load/store paths for outputs */
4281 if (stage == MESA_SHADER_TESS_CTRL)
4282 return;
4283
4284 if (stage == MESA_SHADER_VERTEX ||
4285 stage == MESA_SHADER_TESS_EVAL ||
4286 stage == MESA_SHADER_GEOMETRY) {
4287 int idx = variable->data.location + variable->data.index;
4288 if (idx == VARYING_SLOT_CLIP_DIST0) {
4289 int length = nir->info.clip_distance_array_size +
4290 nir->info.cull_distance_array_size;
4291
4292 if (length > 4)
4293 attrib_count = 2;
4294 else
4295 attrib_count = 1;
4296 }
4297 }
4298
4299 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4300 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4301 for (unsigned i = 0; i < attrib_count; ++i) {
4302 for (unsigned chan = 0; chan < 4; chan++) {
4303 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4304 ac_build_alloca_undef(ctx, type, "");
4305 }
4306 }
4307 }
4308
4309 static void
4310 setup_locals(struct ac_nir_context *ctx,
4311 struct nir_function *func)
4312 {
4313 int i, j;
4314 ctx->num_locals = 0;
4315 nir_foreach_variable(variable, &func->impl->locals) {
4316 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4317 variable->data.driver_location = ctx->num_locals * 4;
4318 variable->data.location_frac = 0;
4319 ctx->num_locals += attrib_count;
4320 }
4321 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4322 if (!ctx->locals)
4323 return;
4324
4325 for (i = 0; i < ctx->num_locals; i++) {
4326 for (j = 0; j < 4; j++) {
4327 ctx->locals[i * 4 + j] =
4328 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4329 }
4330 }
4331 }
4332
4333 static void
4334 setup_shared(struct ac_nir_context *ctx,
4335 struct nir_shader *nir)
4336 {
4337 nir_foreach_variable(variable, &nir->shared) {
4338 LLVMValueRef shared =
4339 LLVMAddGlobalInAddressSpace(
4340 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4341 variable->name ? variable->name : "",
4342 AC_ADDR_SPACE_LDS);
4343 _mesa_hash_table_insert(ctx->vars, variable, shared);
4344 }
4345 }
4346
4347 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4348 struct nir_shader *nir)
4349 {
4350 struct ac_nir_context ctx = {};
4351 struct nir_function *func;
4352
4353 ctx.ac = *ac;
4354 ctx.abi = abi;
4355
4356 ctx.stage = nir->info.stage;
4357
4358 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4359
4360 nir_foreach_variable(variable, &nir->outputs)
4361 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4362 ctx.stage);
4363
4364 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4365 _mesa_key_pointer_equal);
4366 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4367 _mesa_key_pointer_equal);
4368 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4369 _mesa_key_pointer_equal);
4370
4371 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4372
4373 nir_index_ssa_defs(func->impl);
4374 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4375
4376 setup_locals(&ctx, func);
4377
4378 if (gl_shader_stage_is_compute(nir->info.stage))
4379 setup_shared(&ctx, nir);
4380
4381 visit_cf_list(&ctx, &func->impl->body);
4382 phi_post_pass(&ctx);
4383
4384 if (!gl_shader_stage_is_compute(nir->info.stage))
4385 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4386 ctx.abi->outputs);
4387
4388 free(ctx.locals);
4389 free(ctx.ssa_defs);
4390 ralloc_free(ctx.defs);
4391 ralloc_free(ctx.phis);
4392 ralloc_free(ctx.vars);
4393 }
4394
4395 void
4396 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4397 {
4398 /* While it would be nice not to have this flag, we are constrained
4399 * by the reality that LLVM 5.0 doesn't have working VGPR indexing
4400 * on GFX9.
4401 */
4402 bool llvm_has_working_vgpr_indexing = chip_class <= GFX8;
4403
4404 /* TODO: Indirect indexing of GS inputs is unimplemented.
4405 *
4406 * TCS and TES load inputs directly from LDS or offchip memory, so
4407 * indirect indexing is trivial.
4408 */
4409 nir_variable_mode indirect_mask = 0;
4410 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4411 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4412 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4413 !llvm_has_working_vgpr_indexing)) {
4414 indirect_mask |= nir_var_shader_in;
4415 }
4416 if (!llvm_has_working_vgpr_indexing &&
4417 nir->info.stage != MESA_SHADER_TESS_CTRL)
4418 indirect_mask |= nir_var_shader_out;
4419
4420 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4421 * smart enough to handle indirects without causing excess spilling
4422 * causing the gpu to hang.
4423 *
4424 * See the following thread for more details of the problem:
4425 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4426 */
4427 indirect_mask |= nir_var_function_temp;
4428
4429 nir_lower_indirect_derefs(nir, indirect_mask);
4430 }
4431
4432 static unsigned
4433 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4434 {
4435 if (intrin->intrinsic != nir_intrinsic_store_deref)
4436 return 0;
4437
4438 nir_variable *var =
4439 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4440
4441 if (var->data.mode != nir_var_shader_out)
4442 return 0;
4443
4444 unsigned writemask = 0;
4445 const int location = var->data.location;
4446 unsigned first_component = var->data.location_frac;
4447 unsigned num_comps = intrin->dest.ssa.num_components;
4448
4449 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4450 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4451 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4452 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4453
4454 return writemask;
4455 }
4456
4457 static void
4458 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4459 unsigned *cond_block_tf_writemask,
4460 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4461 {
4462 switch (cf_node->type) {
4463 case nir_cf_node_block: {
4464 nir_block *block = nir_cf_node_as_block(cf_node);
4465 nir_foreach_instr(instr, block) {
4466 if (instr->type != nir_instr_type_intrinsic)
4467 continue;
4468
4469 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4470 if (intrin->intrinsic == nir_intrinsic_barrier) {
4471
4472 /* If we find a barrier in nested control flow put this in the
4473 * too hard basket. In GLSL this is not possible but it is in
4474 * SPIR-V.
4475 */
4476 if (is_nested_cf) {
4477 *tessfactors_are_def_in_all_invocs = false;
4478 return;
4479 }
4480
4481 /* The following case must be prevented:
4482 * gl_TessLevelInner = ...;
4483 * barrier();
4484 * if (gl_InvocationID == 1)
4485 * gl_TessLevelInner = ...;
4486 *
4487 * If you consider disjoint code segments separated by barriers, each
4488 * such segment that writes tess factor channels should write the same
4489 * channels in all codepaths within that segment.
4490 */
4491 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4492 /* Accumulate the result: */
4493 *tessfactors_are_def_in_all_invocs &=
4494 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4495
4496 /* Analyze the next code segment from scratch. */
4497 *upper_block_tf_writemask = 0;
4498 *cond_block_tf_writemask = 0;
4499 }
4500 } else
4501 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4502 }
4503
4504 break;
4505 }
4506 case nir_cf_node_if: {
4507 unsigned then_tessfactor_writemask = 0;
4508 unsigned else_tessfactor_writemask = 0;
4509
4510 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4511 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4512 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4513 cond_block_tf_writemask,
4514 tessfactors_are_def_in_all_invocs, true);
4515 }
4516
4517 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4518 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4519 cond_block_tf_writemask,
4520 tessfactors_are_def_in_all_invocs, true);
4521 }
4522
4523 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4524 /* If both statements write the same tess factor channels,
4525 * we can say that the upper block writes them too.
4526 */
4527 *upper_block_tf_writemask |= then_tessfactor_writemask &
4528 else_tessfactor_writemask;
4529 *cond_block_tf_writemask |= then_tessfactor_writemask |
4530 else_tessfactor_writemask;
4531 }
4532
4533 break;
4534 }
4535 case nir_cf_node_loop: {
4536 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4537 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4538 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4539 cond_block_tf_writemask,
4540 tessfactors_are_def_in_all_invocs, true);
4541 }
4542
4543 break;
4544 }
4545 default:
4546 unreachable("unknown cf node type");
4547 }
4548 }
4549
4550 bool
4551 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4552 {
4553 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4554
4555 /* The pass works as follows:
4556 * If all codepaths write tess factors, we can say that all
4557 * invocations define tess factors.
4558 *
4559 * Each tess factor channel is tracked separately.
4560 */
4561 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4562 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4563
4564 /* Initial value = true. Here the pass will accumulate results from
4565 * multiple segments surrounded by barriers. If tess factors aren't
4566 * written at all, it's a shader bug and we don't care if this will be
4567 * true.
4568 */
4569 bool tessfactors_are_def_in_all_invocs = true;
4570
4571 nir_foreach_function(function, nir) {
4572 if (function->impl) {
4573 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4574 scan_tess_ctrl(node, &main_block_tf_writemask,
4575 &cond_block_tf_writemask,
4576 &tessfactors_are_def_in_all_invocs,
4577 false);
4578 }
4579 }
4580 }
4581
4582 /* Accumulate the result for the last code segment separated by a
4583 * barrier.
4584 */
4585 if (main_block_tf_writemask || cond_block_tf_writemask) {
4586 tessfactors_are_def_in_all_invocs &=
4587 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4588 }
4589
4590 return tessfactors_are_def_in_all_invocs;
4591 }