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ac/nir: remove useles LLVMGetUndef for nir_op_pack_64_2x32_split
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41
42 LLVMValueRef *ssa_defs;
43
44 struct hash_table *defs;
45 struct hash_table *phis;
46 struct hash_table *vars;
47
48 LLVMValueRef main_function;
49 LLVMBasicBlockRef continue_block;
50 LLVMBasicBlockRef break_block;
51
52 int num_locals;
53 LLVMValueRef *locals;
54 };
55
56 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
57 nir_deref_instr *deref_instr,
58 enum ac_descriptor_type desc_type,
59 const nir_instr *instr,
60 bool image, bool write);
61
62 static void
63 build_store_values_extended(struct ac_llvm_context *ac,
64 LLVMValueRef *values,
65 unsigned value_count,
66 unsigned value_stride,
67 LLVMValueRef vec)
68 {
69 LLVMBuilderRef builder = ac->builder;
70 unsigned i;
71
72 for (i = 0; i < value_count; i++) {
73 LLVMValueRef ptr = values[i * value_stride];
74 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
75 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
76 LLVMBuildStore(builder, value, ptr);
77 }
78 }
79
80 static enum ac_image_dim
81 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
82 bool is_array)
83 {
84 switch (dim) {
85 case GLSL_SAMPLER_DIM_1D:
86 if (ctx->chip_class >= GFX9)
87 return is_array ? ac_image_2darray : ac_image_2d;
88 return is_array ? ac_image_1darray : ac_image_1d;
89 case GLSL_SAMPLER_DIM_2D:
90 case GLSL_SAMPLER_DIM_RECT:
91 case GLSL_SAMPLER_DIM_EXTERNAL:
92 return is_array ? ac_image_2darray : ac_image_2d;
93 case GLSL_SAMPLER_DIM_3D:
94 return ac_image_3d;
95 case GLSL_SAMPLER_DIM_CUBE:
96 return ac_image_cube;
97 case GLSL_SAMPLER_DIM_MS:
98 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
99 case GLSL_SAMPLER_DIM_SUBPASS:
100 return ac_image_2darray;
101 case GLSL_SAMPLER_DIM_SUBPASS_MS:
102 return ac_image_2darraymsaa;
103 default:
104 unreachable("bad sampler dim");
105 }
106 }
107
108 static enum ac_image_dim
109 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
110 bool is_array)
111 {
112 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
113
114 if (dim == ac_image_cube ||
115 (ctx->chip_class <= VI && dim == ac_image_3d))
116 dim = ac_image_2darray;
117
118 return dim;
119 }
120
121 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
122 const nir_ssa_def *def)
123 {
124 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
125 if (def->num_components > 1) {
126 type = LLVMVectorType(type, def->num_components);
127 }
128 return type;
129 }
130
131 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
132 {
133 assert(src.is_ssa);
134 return nir->ssa_defs[src.ssa->index];
135 }
136
137 static LLVMValueRef
138 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
139 {
140 LLVMValueRef ptr = get_src(ctx, src);
141 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
142 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
143
144 return LLVMBuildBitCast(ctx->ac.builder, ptr,
145 LLVMPointerType(ctx->ac.i32, addr_space), "");
146 }
147
148 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
149 const struct nir_block *b)
150 {
151 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
152 return (LLVMBasicBlockRef)entry->data;
153 }
154
155 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
156 nir_alu_src src,
157 unsigned num_components)
158 {
159 LLVMValueRef value = get_src(ctx, src.src);
160 bool need_swizzle = false;
161
162 assert(value);
163 unsigned src_components = ac_get_llvm_num_components(value);
164 for (unsigned i = 0; i < num_components; ++i) {
165 assert(src.swizzle[i] < src_components);
166 if (src.swizzle[i] != i)
167 need_swizzle = true;
168 }
169
170 if (need_swizzle || num_components != src_components) {
171 LLVMValueRef masks[] = {
172 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
173 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
174 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
175 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
176
177 if (src_components > 1 && num_components == 1) {
178 value = LLVMBuildExtractElement(ctx->ac.builder, value,
179 masks[0], "");
180 } else if (src_components == 1 && num_components > 1) {
181 LLVMValueRef values[] = {value, value, value, value};
182 value = ac_build_gather_values(&ctx->ac, values, num_components);
183 } else {
184 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
185 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
186 swizzle, "");
187 }
188 }
189 assert(!src.negate);
190 assert(!src.abs);
191 return value;
192 }
193
194 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
195 LLVMIntPredicate pred, LLVMValueRef src0,
196 LLVMValueRef src1)
197 {
198 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
199 return LLVMBuildSelect(ctx->builder, result,
200 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
201 ctx->i32_0, "");
202 }
203
204 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
205 LLVMRealPredicate pred, LLVMValueRef src0,
206 LLVMValueRef src1)
207 {
208 LLVMValueRef result;
209 src0 = ac_to_float(ctx, src0);
210 src1 = ac_to_float(ctx, src1);
211 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
212 return LLVMBuildSelect(ctx->builder, result,
213 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
214 ctx->i32_0, "");
215 }
216
217 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
218 const char *intrin,
219 LLVMTypeRef result_type,
220 LLVMValueRef src0)
221 {
222 char name[64];
223 LLVMValueRef params[] = {
224 ac_to_float(ctx, src0),
225 };
226
227 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
228 ac_get_elem_bits(ctx, result_type));
229 assert(length < sizeof(name));
230 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
231 }
232
233 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
234 const char *intrin,
235 LLVMTypeRef result_type,
236 LLVMValueRef src0, LLVMValueRef src1)
237 {
238 char name[64];
239 LLVMValueRef params[] = {
240 ac_to_float(ctx, src0),
241 ac_to_float(ctx, src1),
242 };
243
244 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
245 ac_get_elem_bits(ctx, result_type));
246 assert(length < sizeof(name));
247 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
248 }
249
250 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
251 const char *intrin,
252 LLVMTypeRef result_type,
253 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
254 {
255 char name[64];
256 LLVMValueRef params[] = {
257 ac_to_float(ctx, src0),
258 ac_to_float(ctx, src1),
259 ac_to_float(ctx, src2),
260 };
261
262 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
263 ac_get_elem_bits(ctx, result_type));
264 assert(length < sizeof(name));
265 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
266 }
267
268 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
269 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
270 {
271 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
272
273 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
274 ctx->i32_0, "");
275 return LLVMBuildSelect(ctx->builder, v,
276 ac_to_integer_or_pointer(ctx, src1),
277 ac_to_integer_or_pointer(ctx, src2), "");
278 }
279
280 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
281 LLVMValueRef src0)
282 {
283 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
284 }
285
286 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
287 const char *intrin,
288 LLVMValueRef src0, LLVMValueRef src1)
289 {
290 LLVMTypeRef ret_type;
291 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
292 LLVMValueRef res;
293 LLVMValueRef params[] = { src0, src1 };
294 ret_type = LLVMStructTypeInContext(ctx->context, types,
295 2, true);
296
297 res = ac_build_intrinsic(ctx, intrin, ret_type,
298 params, 2, AC_FUNC_ATTR_READNONE);
299
300 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
301 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
302 return res;
303 }
304
305 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
306 LLVMValueRef src0,
307 unsigned bitsize)
308 {
309 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
310 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
311 "");
312 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
313
314 switch (bitsize) {
315 case 16:
316 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
317 case 32:
318 return result;
319 case 64:
320 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
321 default:
322 unreachable("Unsupported bit size.");
323 }
324 }
325
326 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
327 LLVMValueRef src0)
328 {
329 src0 = ac_to_float(ctx, src0);
330 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
331 return LLVMBuildSExt(ctx->builder,
332 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
333 ctx->i32, "");
334 }
335
336 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
337 LLVMValueRef src0,
338 unsigned bitsize)
339 {
340 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
341
342 switch (bitsize) {
343 case 8:
344 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
345 case 16:
346 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
347 case 32:
348 return result;
349 case 64:
350 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
351 default:
352 unreachable("Unsupported bit size.");
353 }
354 }
355
356 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
357 LLVMValueRef src0)
358 {
359 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
360 return LLVMBuildSExt(ctx->builder,
361 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
362 ctx->i32, "");
363 }
364
365 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
366 LLVMValueRef src0)
367 {
368 LLVMValueRef result;
369 LLVMValueRef cond = NULL;
370
371 src0 = ac_to_float(ctx, src0);
372 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
373
374 if (ctx->chip_class >= VI) {
375 LLVMValueRef args[2];
376 /* Check if the result is a denormal - and flush to 0 if so. */
377 args[0] = result;
378 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
379 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
380 }
381
382 /* need to convert back up to f32 */
383 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
384
385 if (ctx->chip_class >= VI)
386 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
387 else {
388 /* for SI/CIK */
389 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
390 * so compare the result and flush to 0 if it's smaller.
391 */
392 LLVMValueRef temp, cond2;
393 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
394 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
395 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
396 temp, "");
397 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
398 temp, ctx->f32_0, "");
399 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
400 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
401 }
402 return result;
403 }
404
405 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
406 LLVMValueRef src0, LLVMValueRef src1)
407 {
408 LLVMValueRef dst64, result;
409 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
410 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
411
412 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
413 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
414 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
415 return result;
416 }
417
418 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
419 LLVMValueRef src0, LLVMValueRef src1)
420 {
421 LLVMValueRef dst64, result;
422 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
423 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
424
425 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
426 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
427 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
428 return result;
429 }
430
431 static LLVMValueRef emit_bitfield_extract(struct ac_llvm_context *ctx,
432 bool is_signed,
433 const LLVMValueRef srcs[3])
434 {
435 LLVMValueRef result;
436
437 if (HAVE_LLVM >= 0x0800) {
438 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
439 result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed);
440 result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, "");
441 } else {
442 /* FIXME: LLVM 7+ returns incorrect result when count is 0.
443 * https://bugs.freedesktop.org/show_bug.cgi?id=107276
444 */
445 LLVMValueRef zero = ctx->i32_0;
446 LLVMValueRef icond1 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
447 LLVMValueRef icond2 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], zero, "");
448
449 result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed);
450 result = LLVMBuildSelect(ctx->builder, icond1, srcs[0], result, "");
451 result = LLVMBuildSelect(ctx->builder, icond2, zero, result, "");
452 }
453
454 return result;
455 }
456
457 static LLVMValueRef emit_bitfield_insert(struct ac_llvm_context *ctx,
458 LLVMValueRef src0, LLVMValueRef src1,
459 LLVMValueRef src2, LLVMValueRef src3)
460 {
461 LLVMValueRef bfi_args[3], result;
462
463 bfi_args[0] = LLVMBuildShl(ctx->builder,
464 LLVMBuildSub(ctx->builder,
465 LLVMBuildShl(ctx->builder,
466 ctx->i32_1,
467 src3, ""),
468 ctx->i32_1, ""),
469 src2, "");
470 bfi_args[1] = LLVMBuildShl(ctx->builder, src1, src2, "");
471 bfi_args[2] = src0;
472
473 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, src3, LLVMConstInt(ctx->i32, 32, false), "");
474
475 /* Calculate:
476 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
477 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
478 */
479 result = LLVMBuildXor(ctx->builder, bfi_args[2],
480 LLVMBuildAnd(ctx->builder, bfi_args[0],
481 LLVMBuildXor(ctx->builder, bfi_args[1], bfi_args[2], ""), ""), "");
482
483 result = LLVMBuildSelect(ctx->builder, icond, src1, result, "");
484 return result;
485 }
486
487 static LLVMValueRef emit_pack_half_2x16(struct ac_llvm_context *ctx,
488 LLVMValueRef src0)
489 {
490 LLVMValueRef comp[2];
491
492 src0 = ac_to_float(ctx, src0);
493 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
494 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
495
496 return LLVMBuildBitCast(ctx->builder, ac_build_cvt_pkrtz_f16(ctx, comp),
497 ctx->i32, "");
498 }
499
500 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
501 LLVMValueRef src0)
502 {
503 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
504 LLVMValueRef temps[2], val;
505 int i;
506
507 for (i = 0; i < 2; i++) {
508 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
509 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
510 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
511 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
512 }
513 return ac_build_gather_values(ctx, temps, 2);
514 }
515
516 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
517 nir_op op,
518 LLVMValueRef src0)
519 {
520 unsigned mask;
521 int idx;
522 LLVMValueRef result;
523
524 if (op == nir_op_fddx_fine)
525 mask = AC_TID_MASK_LEFT;
526 else if (op == nir_op_fddy_fine)
527 mask = AC_TID_MASK_TOP;
528 else
529 mask = AC_TID_MASK_TOP_LEFT;
530
531 /* for DDX we want to next X pixel, DDY next Y pixel. */
532 if (op == nir_op_fddx_fine ||
533 op == nir_op_fddx_coarse ||
534 op == nir_op_fddx)
535 idx = 1;
536 else
537 idx = 2;
538
539 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
540 return result;
541 }
542
543 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
544 {
545 LLVMValueRef src[4], result = NULL;
546 unsigned num_components = instr->dest.dest.ssa.num_components;
547 unsigned src_components;
548 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
549
550 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
551 switch (instr->op) {
552 case nir_op_vec2:
553 case nir_op_vec3:
554 case nir_op_vec4:
555 src_components = 1;
556 break;
557 case nir_op_pack_half_2x16:
558 src_components = 2;
559 break;
560 case nir_op_unpack_half_2x16:
561 src_components = 1;
562 break;
563 case nir_op_cube_face_coord:
564 case nir_op_cube_face_index:
565 src_components = 3;
566 break;
567 default:
568 src_components = num_components;
569 break;
570 }
571 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
572 src[i] = get_alu_src(ctx, instr->src[i], src_components);
573
574 switch (instr->op) {
575 case nir_op_fmov:
576 case nir_op_imov:
577 result = src[0];
578 break;
579 case nir_op_fneg:
580 src[0] = ac_to_float(&ctx->ac, src[0]);
581 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
582 break;
583 case nir_op_ineg:
584 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
585 break;
586 case nir_op_inot:
587 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
588 break;
589 case nir_op_iadd:
590 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
591 break;
592 case nir_op_fadd:
593 src[0] = ac_to_float(&ctx->ac, src[0]);
594 src[1] = ac_to_float(&ctx->ac, src[1]);
595 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
596 break;
597 case nir_op_fsub:
598 src[0] = ac_to_float(&ctx->ac, src[0]);
599 src[1] = ac_to_float(&ctx->ac, src[1]);
600 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
601 break;
602 case nir_op_isub:
603 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
604 break;
605 case nir_op_imul:
606 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
607 break;
608 case nir_op_imod:
609 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
610 break;
611 case nir_op_umod:
612 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
613 break;
614 case nir_op_fmod:
615 src[0] = ac_to_float(&ctx->ac, src[0]);
616 src[1] = ac_to_float(&ctx->ac, src[1]);
617 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
618 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
619 ac_to_float_type(&ctx->ac, def_type), result);
620 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
621 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
622 break;
623 case nir_op_frem:
624 src[0] = ac_to_float(&ctx->ac, src[0]);
625 src[1] = ac_to_float(&ctx->ac, src[1]);
626 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
627 break;
628 case nir_op_irem:
629 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
630 break;
631 case nir_op_idiv:
632 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
633 break;
634 case nir_op_udiv:
635 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
636 break;
637 case nir_op_fmul:
638 src[0] = ac_to_float(&ctx->ac, src[0]);
639 src[1] = ac_to_float(&ctx->ac, src[1]);
640 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
641 break;
642 case nir_op_frcp:
643 src[0] = ac_to_float(&ctx->ac, src[0]);
644 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
645 break;
646 case nir_op_iand:
647 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
648 break;
649 case nir_op_ior:
650 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
651 break;
652 case nir_op_ixor:
653 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
654 break;
655 case nir_op_ishl:
656 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
657 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
658 LLVMTypeOf(src[0]), "");
659 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
660 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
661 LLVMTypeOf(src[0]), "");
662 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
663 break;
664 case nir_op_ishr:
665 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
666 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
667 LLVMTypeOf(src[0]), "");
668 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
669 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
670 LLVMTypeOf(src[0]), "");
671 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
672 break;
673 case nir_op_ushr:
674 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
675 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
676 LLVMTypeOf(src[0]), "");
677 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
678 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
679 LLVMTypeOf(src[0]), "");
680 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
681 break;
682 case nir_op_ilt32:
683 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
684 break;
685 case nir_op_ine32:
686 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
687 break;
688 case nir_op_ieq32:
689 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
690 break;
691 case nir_op_ige32:
692 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
693 break;
694 case nir_op_ult32:
695 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
696 break;
697 case nir_op_uge32:
698 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
699 break;
700 case nir_op_feq32:
701 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
702 break;
703 case nir_op_fne32:
704 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
705 break;
706 case nir_op_flt32:
707 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
708 break;
709 case nir_op_fge32:
710 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
711 break;
712 case nir_op_fabs:
713 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
714 ac_to_float_type(&ctx->ac, def_type), src[0]);
715 break;
716 case nir_op_iabs:
717 result = emit_iabs(&ctx->ac, src[0]);
718 break;
719 case nir_op_imax:
720 result = ac_build_imax(&ctx->ac, src[0], src[1]);
721 break;
722 case nir_op_imin:
723 result = ac_build_imin(&ctx->ac, src[0], src[1]);
724 break;
725 case nir_op_umax:
726 result = ac_build_umax(&ctx->ac, src[0], src[1]);
727 break;
728 case nir_op_umin:
729 result = ac_build_umin(&ctx->ac, src[0], src[1]);
730 break;
731 case nir_op_isign:
732 result = ac_build_isign(&ctx->ac, src[0],
733 instr->dest.dest.ssa.bit_size);
734 break;
735 case nir_op_fsign:
736 src[0] = ac_to_float(&ctx->ac, src[0]);
737 result = ac_build_fsign(&ctx->ac, src[0],
738 instr->dest.dest.ssa.bit_size);
739 break;
740 case nir_op_ffloor:
741 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
742 ac_to_float_type(&ctx->ac, def_type), src[0]);
743 break;
744 case nir_op_ftrunc:
745 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
746 ac_to_float_type(&ctx->ac, def_type), src[0]);
747 break;
748 case nir_op_fceil:
749 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
750 ac_to_float_type(&ctx->ac, def_type), src[0]);
751 break;
752 case nir_op_fround_even:
753 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
754 ac_to_float_type(&ctx->ac, def_type),src[0]);
755 break;
756 case nir_op_ffract:
757 src[0] = ac_to_float(&ctx->ac, src[0]);
758 result = ac_build_fract(&ctx->ac, src[0],
759 instr->dest.dest.ssa.bit_size);
760 break;
761 case nir_op_fsin:
762 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
763 ac_to_float_type(&ctx->ac, def_type), src[0]);
764 break;
765 case nir_op_fcos:
766 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
767 ac_to_float_type(&ctx->ac, def_type), src[0]);
768 break;
769 case nir_op_fsqrt:
770 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
771 ac_to_float_type(&ctx->ac, def_type), src[0]);
772 break;
773 case nir_op_fexp2:
774 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
775 ac_to_float_type(&ctx->ac, def_type), src[0]);
776 break;
777 case nir_op_flog2:
778 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
779 ac_to_float_type(&ctx->ac, def_type), src[0]);
780 break;
781 case nir_op_frsq:
782 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
783 ac_to_float_type(&ctx->ac, def_type), src[0]);
784 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
785 break;
786 case nir_op_frexp_exp:
787 src[0] = ac_to_float(&ctx->ac, src[0]);
788 result = ac_build_frexp_exp(&ctx->ac, src[0],
789 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
790 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
791 result = LLVMBuildSExt(ctx->ac.builder, result,
792 ctx->ac.i32, "");
793 break;
794 case nir_op_frexp_sig:
795 src[0] = ac_to_float(&ctx->ac, src[0]);
796 result = ac_build_frexp_mant(&ctx->ac, src[0],
797 instr->dest.dest.ssa.bit_size);
798 break;
799 case nir_op_fpow:
800 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
801 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
802 break;
803 case nir_op_fmax:
804 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
805 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
806 if (ctx->ac.chip_class < GFX9 &&
807 instr->dest.dest.ssa.bit_size == 32) {
808 /* Only pre-GFX9 chips do not flush denorms. */
809 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
810 ac_to_float_type(&ctx->ac, def_type),
811 result);
812 }
813 break;
814 case nir_op_fmin:
815 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
816 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
817 if (ctx->ac.chip_class < GFX9 &&
818 instr->dest.dest.ssa.bit_size == 32) {
819 /* Only pre-GFX9 chips do not flush denorms. */
820 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
821 ac_to_float_type(&ctx->ac, def_type),
822 result);
823 }
824 break;
825 case nir_op_ffma:
826 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
827 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
828 break;
829 case nir_op_ldexp:
830 src[0] = ac_to_float(&ctx->ac, src[0]);
831 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
832 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
833 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
834 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
835 else
836 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
837 break;
838 case nir_op_ibitfield_extract:
839 result = emit_bitfield_extract(&ctx->ac, true, src);
840 break;
841 case nir_op_ubitfield_extract:
842 result = emit_bitfield_extract(&ctx->ac, false, src);
843 break;
844 case nir_op_bitfield_insert:
845 result = emit_bitfield_insert(&ctx->ac, src[0], src[1], src[2], src[3]);
846 break;
847 case nir_op_bitfield_reverse:
848 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
849 break;
850 case nir_op_bit_count:
851 result = ac_build_bit_count(&ctx->ac, src[0]);
852 break;
853 case nir_op_vec2:
854 case nir_op_vec3:
855 case nir_op_vec4:
856 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
857 src[i] = ac_to_integer(&ctx->ac, src[i]);
858 result = ac_build_gather_values(&ctx->ac, src, num_components);
859 break;
860 case nir_op_f2i8:
861 case nir_op_f2i16:
862 case nir_op_f2i32:
863 case nir_op_f2i64:
864 src[0] = ac_to_float(&ctx->ac, src[0]);
865 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
866 break;
867 case nir_op_f2u8:
868 case nir_op_f2u16:
869 case nir_op_f2u32:
870 case nir_op_f2u64:
871 src[0] = ac_to_float(&ctx->ac, src[0]);
872 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
873 break;
874 case nir_op_i2f16:
875 case nir_op_i2f32:
876 case nir_op_i2f64:
877 src[0] = ac_to_integer(&ctx->ac, src[0]);
878 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
879 break;
880 case nir_op_u2f16:
881 case nir_op_u2f32:
882 case nir_op_u2f64:
883 src[0] = ac_to_integer(&ctx->ac, src[0]);
884 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
885 break;
886 case nir_op_f2f16_rtz:
887 src[0] = ac_to_float(&ctx->ac, src[0]);
888 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
889 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
890 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
891 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
892 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
893 break;
894 case nir_op_f2f16_rtne:
895 case nir_op_f2f16:
896 case nir_op_f2f32:
897 case nir_op_f2f64:
898 src[0] = ac_to_float(&ctx->ac, src[0]);
899 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
900 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
901 else
902 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
903 break;
904 case nir_op_u2u8:
905 case nir_op_u2u16:
906 case nir_op_u2u32:
907 case nir_op_u2u64:
908 src[0] = ac_to_integer(&ctx->ac, src[0]);
909 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
910 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
911 else
912 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
913 break;
914 case nir_op_i2i8:
915 case nir_op_i2i16:
916 case nir_op_i2i32:
917 case nir_op_i2i64:
918 src[0] = ac_to_integer(&ctx->ac, src[0]);
919 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
920 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
921 else
922 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
923 break;
924 case nir_op_b32csel:
925 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
926 break;
927 case nir_op_find_lsb:
928 src[0] = ac_to_integer(&ctx->ac, src[0]);
929 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
930 break;
931 case nir_op_ufind_msb:
932 src[0] = ac_to_integer(&ctx->ac, src[0]);
933 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
934 break;
935 case nir_op_ifind_msb:
936 src[0] = ac_to_integer(&ctx->ac, src[0]);
937 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
938 break;
939 case nir_op_uadd_carry:
940 src[0] = ac_to_integer(&ctx->ac, src[0]);
941 src[1] = ac_to_integer(&ctx->ac, src[1]);
942 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
943 break;
944 case nir_op_usub_borrow:
945 src[0] = ac_to_integer(&ctx->ac, src[0]);
946 src[1] = ac_to_integer(&ctx->ac, src[1]);
947 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
948 break;
949 case nir_op_b2f16:
950 case nir_op_b2f32:
951 case nir_op_b2f64:
952 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
953 break;
954 case nir_op_f2b32:
955 result = emit_f2b(&ctx->ac, src[0]);
956 break;
957 case nir_op_b2i8:
958 case nir_op_b2i16:
959 case nir_op_b2i32:
960 case nir_op_b2i64:
961 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
962 break;
963 case nir_op_i2b32:
964 src[0] = ac_to_integer(&ctx->ac, src[0]);
965 result = emit_i2b(&ctx->ac, src[0]);
966 break;
967 case nir_op_fquantize2f16:
968 result = emit_f2f16(&ctx->ac, src[0]);
969 break;
970 case nir_op_umul_high:
971 src[0] = ac_to_integer(&ctx->ac, src[0]);
972 src[1] = ac_to_integer(&ctx->ac, src[1]);
973 result = emit_umul_high(&ctx->ac, src[0], src[1]);
974 break;
975 case nir_op_imul_high:
976 src[0] = ac_to_integer(&ctx->ac, src[0]);
977 src[1] = ac_to_integer(&ctx->ac, src[1]);
978 result = emit_imul_high(&ctx->ac, src[0], src[1]);
979 break;
980 case nir_op_pack_half_2x16:
981 result = emit_pack_half_2x16(&ctx->ac, src[0]);
982 break;
983 case nir_op_unpack_half_2x16:
984 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
985 break;
986 case nir_op_fddx:
987 case nir_op_fddy:
988 case nir_op_fddx_fine:
989 case nir_op_fddy_fine:
990 case nir_op_fddx_coarse:
991 case nir_op_fddy_coarse:
992 result = emit_ddxy(ctx, instr->op, src[0]);
993 break;
994
995 case nir_op_unpack_64_2x32_split_x: {
996 assert(ac_get_llvm_num_components(src[0]) == 1);
997 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
998 ctx->ac.v2i32,
999 "");
1000 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1001 ctx->ac.i32_0, "");
1002 break;
1003 }
1004
1005 case nir_op_unpack_64_2x32_split_y: {
1006 assert(ac_get_llvm_num_components(src[0]) == 1);
1007 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1008 ctx->ac.v2i32,
1009 "");
1010 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1011 ctx->ac.i32_1, "");
1012 break;
1013 }
1014
1015 case nir_op_pack_64_2x32_split: {
1016 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1017 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1018 break;
1019 }
1020
1021 case nir_op_pack_32_2x16_split: {
1022 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1023 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1024 break;
1025 }
1026
1027 case nir_op_unpack_32_2x16_split_x: {
1028 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1029 ctx->ac.v2i16,
1030 "");
1031 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1032 ctx->ac.i32_0, "");
1033 break;
1034 }
1035
1036 case nir_op_unpack_32_2x16_split_y: {
1037 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1038 ctx->ac.v2i16,
1039 "");
1040 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1041 ctx->ac.i32_1, "");
1042 break;
1043 }
1044
1045 case nir_op_cube_face_coord: {
1046 src[0] = ac_to_float(&ctx->ac, src[0]);
1047 LLVMValueRef results[2];
1048 LLVMValueRef in[3];
1049 for (unsigned chan = 0; chan < 3; chan++)
1050 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1051 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1052 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1053 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1054 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1055 result = ac_build_gather_values(&ctx->ac, results, 2);
1056 break;
1057 }
1058
1059 case nir_op_cube_face_index: {
1060 src[0] = ac_to_float(&ctx->ac, src[0]);
1061 LLVMValueRef in[3];
1062 for (unsigned chan = 0; chan < 3; chan++)
1063 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1064 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1065 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1066 break;
1067 }
1068
1069 case nir_op_fmin3:
1070 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1071 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1072 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1073 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1074 break;
1075 case nir_op_umin3:
1076 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1077 result = ac_build_umin(&ctx->ac, result, src[2]);
1078 break;
1079 case nir_op_imin3:
1080 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1081 result = ac_build_imin(&ctx->ac, result, src[2]);
1082 break;
1083 case nir_op_fmax3:
1084 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1085 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1086 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1087 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1088 break;
1089 case nir_op_umax3:
1090 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1091 result = ac_build_umax(&ctx->ac, result, src[2]);
1092 break;
1093 case nir_op_imax3:
1094 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1095 result = ac_build_imax(&ctx->ac, result, src[2]);
1096 break;
1097 case nir_op_fmed3: {
1098 src[0] = ac_to_float(&ctx->ac, src[0]);
1099 src[1] = ac_to_float(&ctx->ac, src[1]);
1100 src[2] = ac_to_float(&ctx->ac, src[2]);
1101 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1102 instr->dest.dest.ssa.bit_size);
1103 break;
1104 }
1105 case nir_op_imed3: {
1106 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1107 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1108 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1109 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1110 break;
1111 }
1112 case nir_op_umed3: {
1113 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1114 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1115 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1116 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1117 break;
1118 }
1119
1120 default:
1121 fprintf(stderr, "Unknown NIR alu instr: ");
1122 nir_print_instr(&instr->instr, stderr);
1123 fprintf(stderr, "\n");
1124 abort();
1125 }
1126
1127 if (result) {
1128 assert(instr->dest.dest.is_ssa);
1129 result = ac_to_integer_or_pointer(&ctx->ac, result);
1130 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1131 }
1132 }
1133
1134 static void visit_load_const(struct ac_nir_context *ctx,
1135 const nir_load_const_instr *instr)
1136 {
1137 LLVMValueRef values[4], value = NULL;
1138 LLVMTypeRef element_type =
1139 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1140
1141 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1142 switch (instr->def.bit_size) {
1143 case 8:
1144 values[i] = LLVMConstInt(element_type,
1145 instr->value.u8[i], false);
1146 break;
1147 case 16:
1148 values[i] = LLVMConstInt(element_type,
1149 instr->value.u16[i], false);
1150 break;
1151 case 32:
1152 values[i] = LLVMConstInt(element_type,
1153 instr->value.u32[i], false);
1154 break;
1155 case 64:
1156 values[i] = LLVMConstInt(element_type,
1157 instr->value.u64[i], false);
1158 break;
1159 default:
1160 fprintf(stderr,
1161 "unsupported nir load_const bit_size: %d\n",
1162 instr->def.bit_size);
1163 abort();
1164 }
1165 }
1166 if (instr->def.num_components > 1) {
1167 value = LLVMConstVector(values, instr->def.num_components);
1168 } else
1169 value = values[0];
1170
1171 ctx->ssa_defs[instr->def.index] = value;
1172 }
1173
1174 static LLVMValueRef
1175 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1176 {
1177 LLVMValueRef size =
1178 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1179 LLVMConstInt(ctx->ac.i32, 2, false), "");
1180
1181 /* VI only */
1182 if (ctx->ac.chip_class == VI && in_elements) {
1183 /* On VI, the descriptor contains the size in bytes,
1184 * but TXQ must return the size in elements.
1185 * The stride is always non-zero for resources using TXQ.
1186 */
1187 LLVMValueRef stride =
1188 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1189 ctx->ac.i32_1, "");
1190 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1191 LLVMConstInt(ctx->ac.i32, 16, false), "");
1192 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1193 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1194
1195 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1196 }
1197 return size;
1198 }
1199
1200 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1201 nir_variable *var,
1202 struct ac_image_args *args,
1203 const nir_tex_instr *instr)
1204 {
1205 const struct glsl_type *type = glsl_without_array(var->type);
1206 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1207 LLVMValueRef half_texel[2];
1208 LLVMValueRef compare_cube_wa = NULL;
1209 LLVMValueRef result;
1210
1211 //TODO Rect
1212 {
1213 struct ac_image_args txq_args = { 0 };
1214
1215 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1216 txq_args.opcode = ac_image_get_resinfo;
1217 txq_args.dmask = 0xf;
1218 txq_args.lod = ctx->i32_0;
1219 txq_args.resource = args->resource;
1220 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1221 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1222
1223 for (unsigned c = 0; c < 2; c++) {
1224 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1225 LLVMConstInt(ctx->i32, c, false), "");
1226 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1227 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1228 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1229 LLVMConstReal(ctx->f32, -0.5), "");
1230 }
1231 }
1232
1233 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1234
1235 for (unsigned c = 0; c < 2; c++) {
1236 LLVMValueRef tmp;
1237 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1238 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1239 }
1240
1241 /*
1242 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1243 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1244 * workaround by sampling using a scaled type and converting.
1245 * This is taken from amdgpu-pro shaders.
1246 */
1247 /* NOTE this produces some ugly code compared to amdgpu-pro,
1248 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1249 * and then reads them back. -pro generates two selects,
1250 * one s_cmp for the descriptor rewriting
1251 * one v_cmp for the coordinate and result changes.
1252 */
1253 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1254 LLVMValueRef tmp, tmp2;
1255
1256 /* workaround 8/8/8/8 uint/sint cube gather bug */
1257 /* first detect it then change to a scaled read and f2i */
1258 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1259 tmp2 = tmp;
1260
1261 /* extract the DATA_FORMAT */
1262 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1263 LLVMConstInt(ctx->i32, 6, false), false);
1264
1265 /* is the DATA_FORMAT == 8_8_8_8 */
1266 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1267
1268 if (stype == GLSL_TYPE_UINT)
1269 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1270 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1271 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1272 else
1273 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1274 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1275 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1276
1277 /* replace the NUM FORMAT in the descriptor */
1278 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT_GFX6, false), "");
1279 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1280
1281 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1282
1283 /* don't modify the coordinates for this case */
1284 for (unsigned c = 0; c < 2; ++c)
1285 args->coords[c] = LLVMBuildSelect(
1286 ctx->builder, compare_cube_wa,
1287 orig_coords[c], args->coords[c], "");
1288 }
1289
1290 args->attributes = AC_FUNC_ATTR_READNONE;
1291 result = ac_build_image_opcode(ctx, args);
1292
1293 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1294 LLVMValueRef tmp, tmp2;
1295
1296 /* if the cube workaround is in place, f2i the result. */
1297 for (unsigned c = 0; c < 4; c++) {
1298 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1299 if (stype == GLSL_TYPE_UINT)
1300 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1301 else
1302 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1303 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1304 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1305 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1306 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1307 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1308 }
1309 }
1310 return result;
1311 }
1312
1313 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1314 {
1315 nir_deref_instr *texture_deref_instr = NULL;
1316
1317 for (unsigned i = 0; i < instr->num_srcs; i++) {
1318 switch (instr->src[i].src_type) {
1319 case nir_tex_src_texture_deref:
1320 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1321 break;
1322 default:
1323 break;
1324 }
1325 }
1326 return texture_deref_instr;
1327 }
1328
1329 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1330 const nir_tex_instr *instr,
1331 struct ac_image_args *args)
1332 {
1333 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1334 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1335
1336 if (ctx->abi->gfx9_stride_size_workaround) {
1337 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1338 args->resource,
1339 args->coords[0],
1340 ctx->ac.i32_0,
1341 util_last_bit(mask),
1342 false, true);
1343 } else {
1344 return ac_build_buffer_load_format(&ctx->ac,
1345 args->resource,
1346 args->coords[0],
1347 ctx->ac.i32_0,
1348 util_last_bit(mask),
1349 false, true);
1350 }
1351 }
1352
1353 args->opcode = ac_image_sample;
1354
1355 switch (instr->op) {
1356 case nir_texop_txf:
1357 case nir_texop_txf_ms:
1358 case nir_texop_samples_identical:
1359 args->opcode = args->level_zero ||
1360 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1361 ac_image_load : ac_image_load_mip;
1362 args->level_zero = false;
1363 break;
1364 case nir_texop_txs:
1365 case nir_texop_query_levels:
1366 args->opcode = ac_image_get_resinfo;
1367 if (!args->lod)
1368 args->lod = ctx->ac.i32_0;
1369 args->level_zero = false;
1370 break;
1371 case nir_texop_tex:
1372 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1373 assert(!args->lod);
1374 args->level_zero = true;
1375 }
1376 break;
1377 case nir_texop_tg4:
1378 args->opcode = ac_image_gather4;
1379 args->level_zero = true;
1380 break;
1381 case nir_texop_lod:
1382 args->opcode = ac_image_get_lod;
1383 break;
1384 default:
1385 break;
1386 }
1387
1388 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= VI) {
1389 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1390 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1391 const struct glsl_type *type = glsl_without_array(var->type);
1392 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1393 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1394 return lower_gather4_integer(&ctx->ac, var, args, instr);
1395 }
1396 }
1397
1398 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1399 if (instr->op == nir_texop_lod && ctx->ac.chip_class >= GFX9) {
1400 if ((args->dim == ac_image_2darray ||
1401 args->dim == ac_image_2d) && !args->coords[1]) {
1402 args->coords[1] = ctx->ac.i32_0;
1403 }
1404 }
1405
1406 args->attributes = AC_FUNC_ATTR_READNONE;
1407 return ac_build_image_opcode(&ctx->ac, args);
1408 }
1409
1410 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1411 nir_intrinsic_instr *instr)
1412 {
1413 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1414 LLVMValueRef index = get_src(ctx, instr->src[1]);
1415
1416 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1417 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1418 return result;
1419 }
1420
1421 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1422 nir_intrinsic_instr *instr)
1423 {
1424 LLVMValueRef ptr, addr;
1425 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1426 unsigned index = nir_intrinsic_base(instr);
1427
1428 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1429 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1430
1431 /* Load constant values from user SGPRS when possible, otherwise
1432 * fallback to the default path that loads directly from memory.
1433 */
1434 if (LLVMIsConstant(src0) &&
1435 instr->dest.ssa.bit_size == 32) {
1436 unsigned count = instr->dest.ssa.num_components;
1437 unsigned offset = index;
1438
1439 offset += LLVMConstIntGetZExtValue(src0);
1440 offset /= 4;
1441
1442 offset -= ctx->abi->base_inline_push_consts;
1443
1444 if (offset + count <= ctx->abi->num_inline_push_consts) {
1445 return ac_build_gather_values(&ctx->ac,
1446 ctx->abi->inline_push_consts + offset,
1447 count);
1448 }
1449 }
1450
1451 ptr = ac_build_gep0(&ctx->ac, ctx->abi->push_constants, addr);
1452
1453 if (instr->dest.ssa.bit_size == 8) {
1454 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1455 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1456 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1457 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1458
1459 LLVMValueRef params[3];
1460 if (load_dwords > 1) {
1461 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1462 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1463 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1464 } else {
1465 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1466 params[0] = ctx->ac.i32_0;
1467 params[1] = res;
1468 }
1469 params[2] = addr;
1470 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1471
1472 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1473 if (instr->dest.ssa.num_components > 1)
1474 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1475 return res;
1476 } else if (instr->dest.ssa.bit_size == 16) {
1477 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1478 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1479 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1480 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1481 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1482 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1483 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1484 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1485 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1486 LLVMConstInt(ctx->ac.i32, 4, false)};
1487 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1488 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1489 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1490 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1491 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1492 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1493 }
1494
1495 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1496
1497 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1498 }
1499
1500 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1501 const nir_intrinsic_instr *instr)
1502 {
1503 LLVMValueRef index = get_src(ctx, instr->src[0]);
1504
1505 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1506 }
1507
1508 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1509 {
1510 uint32_t new_mask = 0;
1511 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1512 if (mask & (1u << i))
1513 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1514 return new_mask;
1515 }
1516
1517 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1518 unsigned start, unsigned count)
1519 {
1520 LLVMValueRef mask[] = {
1521 ctx->i32_0, ctx->i32_1,
1522 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1523
1524 unsigned src_elements = ac_get_llvm_num_components(src);
1525
1526 if (count == src_elements) {
1527 assert(start == 0);
1528 return src;
1529 } else if (count == 1) {
1530 assert(start < src_elements);
1531 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1532 } else {
1533 assert(start + count <= src_elements);
1534 assert(count <= 4);
1535 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1536 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1537 }
1538 }
1539
1540 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1541 enum gl_access_qualifier access,
1542 bool may_store_unaligned,
1543 bool writeonly_memory)
1544 {
1545 unsigned cache_policy = 0;
1546
1547 /* SI has a TC L1 bug causing corruption of 8bit/16bit stores. All
1548 * store opcodes not aligned to a dword are affected. The only way to
1549 * get unaligned stores is through shader images.
1550 */
1551 if (((may_store_unaligned && ctx->ac.chip_class == SI) ||
1552 /* If this is write-only, don't keep data in L1 to prevent
1553 * evicting L1 cache lines that may be needed by other
1554 * instructions.
1555 */
1556 writeonly_memory ||
1557 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1558 cache_policy |= ac_glc;
1559 }
1560
1561 return cache_policy;
1562 }
1563
1564 static void visit_store_ssbo(struct ac_nir_context *ctx,
1565 nir_intrinsic_instr *instr)
1566 {
1567 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1568 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1569 unsigned writemask = nir_intrinsic_write_mask(instr);
1570 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1571 bool writeonly_memory = access & ACCESS_NON_READABLE;
1572 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1573
1574 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1575 get_src(ctx, instr->src[1]), true);
1576 LLVMValueRef base_data = src_data;
1577 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1578 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1579
1580 while (writemask) {
1581 int start, count;
1582 LLVMValueRef data, offset;
1583 LLVMTypeRef data_type;
1584
1585 u_bit_scan_consecutive_range(&writemask, &start, &count);
1586
1587 /* Due to an LLVM limitation, split 3-element writes
1588 * into a 2-element and a 1-element write. */
1589 if (count == 3) {
1590 writemask |= 1 << (start + 2);
1591 count = 2;
1592 }
1593 int num_bytes = count * elem_size_bytes; /* count in bytes */
1594
1595 /* we can only store 4 DWords at the same time.
1596 * can only happen for 64 Bit vectors. */
1597 if (num_bytes > 16) {
1598 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1599 count = 2;
1600 num_bytes = 16;
1601 }
1602
1603 /* check alignment of 16 Bit stores */
1604 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1605 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1606 count = 1;
1607 num_bytes = 2;
1608 }
1609 data = extract_vector_range(&ctx->ac, base_data, start, count);
1610
1611 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1612 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1613
1614 if (num_bytes == 1) {
1615 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1616 offset, ctx->ac.i32_0,
1617 cache_policy & ac_glc,
1618 writeonly_memory);
1619 } else if (num_bytes == 2) {
1620 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1621 offset, ctx->ac.i32_0,
1622 cache_policy & ac_glc,
1623 writeonly_memory);
1624 } else {
1625 int num_channels = num_bytes / 4;
1626
1627 switch (num_bytes) {
1628 case 16: /* v4f32 */
1629 data_type = ctx->ac.v4f32;
1630 break;
1631 case 8: /* v2f32 */
1632 data_type = ctx->ac.v2f32;
1633 break;
1634 case 4: /* f32 */
1635 data_type = ctx->ac.f32;
1636 break;
1637 default:
1638 unreachable("Malformed vector store.");
1639 }
1640 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1641
1642 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1643 num_channels, offset,
1644 ctx->ac.i32_0, 0,
1645 cache_policy & ac_glc,
1646 false, writeonly_memory,
1647 false);
1648 }
1649 }
1650 }
1651
1652 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1653 const nir_intrinsic_instr *instr)
1654 {
1655 const char *op;
1656 char name[64];
1657 LLVMValueRef params[6];
1658 int arg_count = 0;
1659
1660 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1661 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1662 }
1663 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1664 params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
1665 get_src(ctx, instr->src[0]),
1666 true);
1667 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1668 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1669 params[arg_count++] = ctx->ac.i1false; /* slc */
1670
1671 switch (instr->intrinsic) {
1672 case nir_intrinsic_ssbo_atomic_add:
1673 op = "add";
1674 break;
1675 case nir_intrinsic_ssbo_atomic_imin:
1676 op = "smin";
1677 break;
1678 case nir_intrinsic_ssbo_atomic_umin:
1679 op = "umin";
1680 break;
1681 case nir_intrinsic_ssbo_atomic_imax:
1682 op = "smax";
1683 break;
1684 case nir_intrinsic_ssbo_atomic_umax:
1685 op = "umax";
1686 break;
1687 case nir_intrinsic_ssbo_atomic_and:
1688 op = "and";
1689 break;
1690 case nir_intrinsic_ssbo_atomic_or:
1691 op = "or";
1692 break;
1693 case nir_intrinsic_ssbo_atomic_xor:
1694 op = "xor";
1695 break;
1696 case nir_intrinsic_ssbo_atomic_exchange:
1697 op = "swap";
1698 break;
1699 case nir_intrinsic_ssbo_atomic_comp_swap:
1700 op = "cmpswap";
1701 break;
1702 default:
1703 abort();
1704 }
1705
1706 if (HAVE_LLVM >= 0x900 &&
1707 instr->intrinsic != nir_intrinsic_ssbo_atomic_comp_swap) {
1708 snprintf(name, sizeof(name),
1709 "llvm.amdgcn.buffer.atomic.%s.i32", op);
1710 } else {
1711 snprintf(name, sizeof(name),
1712 "llvm.amdgcn.buffer.atomic.%s", op);
1713 }
1714
1715 return ac_build_intrinsic(&ctx->ac, name, ctx->ac.i32, params, arg_count, 0);
1716 }
1717
1718 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1719 const nir_intrinsic_instr *instr)
1720 {
1721 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1722 int num_components = instr->num_components;
1723 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1724 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1725
1726 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1727 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1728 get_src(ctx, instr->src[0]), false);
1729 LLVMValueRef vindex = ctx->ac.i32_0;
1730
1731 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1732 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1733
1734 LLVMValueRef results[4];
1735 for (int i = 0; i < num_components;) {
1736 int num_elems = num_components - i;
1737 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1738 num_elems = 1;
1739 if (num_elems * elem_size_bytes > 16)
1740 num_elems = 16 / elem_size_bytes;
1741 int load_bytes = num_elems * elem_size_bytes;
1742
1743 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1744
1745 LLVMValueRef ret;
1746
1747 if (load_bytes == 1) {
1748 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1749 rsrc,
1750 offset,
1751 ctx->ac.i32_0,
1752 immoffset,
1753 cache_policy & ac_glc);
1754 } else if (load_bytes == 2) {
1755 ret = ac_build_tbuffer_load_short(&ctx->ac,
1756 rsrc,
1757 offset,
1758 ctx->ac.i32_0,
1759 immoffset,
1760 cache_policy & ac_glc);
1761 } else {
1762 int num_channels = util_next_power_of_two(load_bytes) / 4;
1763
1764 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1765 vindex, offset, immoffset, 0,
1766 cache_policy & ac_glc, 0,
1767 false, false);
1768 }
1769
1770 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1771 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1772 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1773
1774 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1775 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1776
1777 for (unsigned j = 0; j < num_elems; j++) {
1778 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1779 }
1780 i += num_elems;
1781 }
1782
1783 return ac_build_gather_values(&ctx->ac, results, num_components);
1784 }
1785
1786 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1787 const nir_intrinsic_instr *instr)
1788 {
1789 LLVMValueRef ret;
1790 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1791 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1792 int num_components = instr->num_components;
1793
1794 if (ctx->abi->load_ubo)
1795 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1796
1797 if (instr->dest.ssa.bit_size == 64)
1798 num_components *= 2;
1799
1800 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1801 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1802 LLVMValueRef results[num_components];
1803 for (unsigned i = 0; i < num_components; ++i) {
1804 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1805 load_bytes * i, 0);
1806
1807 if (load_bytes == 1) {
1808 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1809 rsrc,
1810 offset,
1811 ctx->ac.i32_0,
1812 immoffset,
1813 false);
1814 } else {
1815 assert(load_bytes == 2);
1816 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1817 rsrc,
1818 offset,
1819 ctx->ac.i32_0,
1820 immoffset,
1821 false);
1822 }
1823 }
1824 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1825 } else {
1826 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1827 NULL, 0, false, false, true, true);
1828
1829 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1830 }
1831
1832 return LLVMBuildBitCast(ctx->ac.builder, ret,
1833 get_def_type(ctx, &instr->dest.ssa), "");
1834 }
1835
1836 static void
1837 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1838 bool vs_in, unsigned *vertex_index_out,
1839 LLVMValueRef *vertex_index_ref,
1840 unsigned *const_out, LLVMValueRef *indir_out)
1841 {
1842 nir_variable *var = nir_deref_instr_get_variable(instr);
1843 nir_deref_path path;
1844 unsigned idx_lvl = 1;
1845
1846 nir_deref_path_init(&path, instr, NULL);
1847
1848 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1849 if (vertex_index_ref) {
1850 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1851 if (vertex_index_out)
1852 *vertex_index_out = 0;
1853 } else {
1854 nir_const_value *v = nir_src_as_const_value(path.path[idx_lvl]->arr.index);
1855 assert(v);
1856 *vertex_index_out = v->u32[0];
1857 }
1858 ++idx_lvl;
1859 }
1860
1861 uint32_t const_offset = 0;
1862 LLVMValueRef offset = NULL;
1863
1864 if (var->data.compact) {
1865 assert(instr->deref_type == nir_deref_type_array);
1866 nir_const_value *v = nir_src_as_const_value(instr->arr.index);
1867 assert(v);
1868 const_offset = v->u32[0];
1869 goto out;
1870 }
1871
1872 for (; path.path[idx_lvl]; ++idx_lvl) {
1873 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1874 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1875 unsigned index = path.path[idx_lvl]->strct.index;
1876
1877 for (unsigned i = 0; i < index; i++) {
1878 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1879 const_offset += glsl_count_attribute_slots(ft, vs_in);
1880 }
1881 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1882 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1883 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1884 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1885 if (offset)
1886 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1887 else
1888 offset = array_off;
1889 } else
1890 unreachable("Uhandled deref type in get_deref_instr_offset");
1891 }
1892
1893 out:
1894 nir_deref_path_finish(&path);
1895
1896 if (const_offset && offset)
1897 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1898 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1899 "");
1900
1901 *const_out = const_offset;
1902 *indir_out = offset;
1903 }
1904
1905 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1906 nir_intrinsic_instr *instr,
1907 bool load_inputs)
1908 {
1909 LLVMValueRef result;
1910 LLVMValueRef vertex_index = NULL;
1911 LLVMValueRef indir_index = NULL;
1912 unsigned const_index = 0;
1913
1914 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1915
1916 unsigned location = var->data.location;
1917 unsigned driver_location = var->data.driver_location;
1918 const bool is_patch = var->data.patch;
1919 const bool is_compact = var->data.compact;
1920
1921 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1922 false, NULL, is_patch ? NULL : &vertex_index,
1923 &const_index, &indir_index);
1924
1925 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1926
1927 LLVMTypeRef src_component_type;
1928 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1929 src_component_type = LLVMGetElementType(dest_type);
1930 else
1931 src_component_type = dest_type;
1932
1933 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1934 vertex_index, indir_index,
1935 const_index, location, driver_location,
1936 var->data.location_frac,
1937 instr->num_components,
1938 is_patch, is_compact, load_inputs);
1939 if (instr->dest.ssa.bit_size == 16) {
1940 result = ac_to_integer(&ctx->ac, result);
1941 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
1942 }
1943 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
1944 }
1945
1946 static unsigned
1947 type_scalar_size_bytes(const struct glsl_type *type)
1948 {
1949 assert(glsl_type_is_vector_or_scalar(type) ||
1950 glsl_type_is_matrix(type));
1951 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
1952 }
1953
1954 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
1955 nir_intrinsic_instr *instr)
1956 {
1957 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1958 nir_variable *var = nir_deref_instr_get_variable(deref);
1959
1960 LLVMValueRef values[8];
1961 int idx = 0;
1962 int ve = instr->dest.ssa.num_components;
1963 unsigned comp = 0;
1964 LLVMValueRef indir_index;
1965 LLVMValueRef ret;
1966 unsigned const_index;
1967 unsigned stride = 4;
1968 int mode = deref->mode;
1969
1970 if (var) {
1971 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
1972 var->data.mode == nir_var_shader_in;
1973 idx = var->data.driver_location;
1974 comp = var->data.location_frac;
1975 mode = var->data.mode;
1976
1977 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
1978 &const_index, &indir_index);
1979
1980 if (var->data.compact) {
1981 stride = 1;
1982 const_index += comp;
1983 comp = 0;
1984 }
1985 }
1986
1987 if (instr->dest.ssa.bit_size == 64 &&
1988 (deref->mode == nir_var_shader_in ||
1989 deref->mode == nir_var_shader_out ||
1990 deref->mode == nir_var_function_temp))
1991 ve *= 2;
1992
1993 switch (mode) {
1994 case nir_var_shader_in:
1995 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
1996 ctx->stage == MESA_SHADER_TESS_EVAL) {
1997 return load_tess_varyings(ctx, instr, true);
1998 }
1999
2000 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2001 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2002 LLVMValueRef indir_index;
2003 unsigned const_index, vertex_index;
2004 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2005 &const_index, &indir_index);
2006
2007 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2008 var->data.driver_location,
2009 var->data.location_frac,
2010 instr->num_components, vertex_index, const_index, type);
2011 }
2012
2013 for (unsigned chan = comp; chan < ve + comp; chan++) {
2014 if (indir_index) {
2015 unsigned count = glsl_count_attribute_slots(
2016 var->type,
2017 ctx->stage == MESA_SHADER_VERTEX);
2018 count -= chan / 4;
2019 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2020 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2021 stride, false, true);
2022
2023 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2024 tmp_vec,
2025 indir_index, "");
2026 } else
2027 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2028 }
2029 break;
2030 case nir_var_function_temp:
2031 for (unsigned chan = 0; chan < ve; chan++) {
2032 if (indir_index) {
2033 unsigned count = glsl_count_attribute_slots(
2034 var->type, false);
2035 count -= chan / 4;
2036 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2037 &ctx->ac, ctx->locals + idx + chan, count,
2038 stride, true, true);
2039
2040 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2041 tmp_vec,
2042 indir_index, "");
2043 } else {
2044 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2045 }
2046 }
2047 break;
2048 case nir_var_mem_shared: {
2049 LLVMValueRef address = get_src(ctx, instr->src[0]);
2050 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2051 return LLVMBuildBitCast(ctx->ac.builder, val,
2052 get_def_type(ctx, &instr->dest.ssa),
2053 "");
2054 }
2055 case nir_var_shader_out:
2056 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2057 return load_tess_varyings(ctx, instr, false);
2058 }
2059
2060 for (unsigned chan = comp; chan < ve + comp; chan++) {
2061 if (indir_index) {
2062 unsigned count = glsl_count_attribute_slots(
2063 var->type, false);
2064 count -= chan / 4;
2065 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2066 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2067 stride, true, true);
2068
2069 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2070 tmp_vec,
2071 indir_index, "");
2072 } else {
2073 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2074 ctx->abi->outputs[idx + chan + const_index * stride],
2075 "");
2076 }
2077 }
2078 break;
2079 case nir_var_mem_global: {
2080 LLVMValueRef address = get_src(ctx, instr->src[0]);
2081 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2082 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2083 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2084
2085 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2086 if (stride != natural_stride) {
2087 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2088 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2089 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2090
2091 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2092 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2093 values[i] = LLVMBuildLoad(ctx->ac.builder,
2094 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2095 }
2096 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2097 } else {
2098 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2099 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2100 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2101 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2102 return val;
2103 }
2104 }
2105 default:
2106 unreachable("unhandle variable mode");
2107 }
2108 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2109 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2110 }
2111
2112 static void
2113 visit_store_var(struct ac_nir_context *ctx,
2114 nir_intrinsic_instr *instr)
2115 {
2116 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2117 nir_variable *var = nir_deref_instr_get_variable(deref);
2118
2119 LLVMValueRef temp_ptr, value;
2120 int idx = 0;
2121 unsigned comp = 0;
2122 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2123 int writemask = instr->const_index[0];
2124 LLVMValueRef indir_index;
2125 unsigned const_index;
2126
2127 if (var) {
2128 get_deref_offset(ctx, deref, false,
2129 NULL, NULL, &const_index, &indir_index);
2130 idx = var->data.driver_location;
2131 comp = var->data.location_frac;
2132
2133 if (var->data.compact) {
2134 const_index += comp;
2135 comp = 0;
2136 }
2137 }
2138
2139 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2140 (deref->mode == nir_var_shader_out ||
2141 deref->mode == nir_var_function_temp)) {
2142
2143 src = LLVMBuildBitCast(ctx->ac.builder, src,
2144 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2145 "");
2146
2147 writemask = widen_mask(writemask, 2);
2148 }
2149
2150 writemask = writemask << comp;
2151
2152 switch (deref->mode) {
2153 case nir_var_shader_out:
2154
2155 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2156 LLVMValueRef vertex_index = NULL;
2157 LLVMValueRef indir_index = NULL;
2158 unsigned const_index = 0;
2159 const bool is_patch = var->data.patch;
2160
2161 get_deref_offset(ctx, deref, false, NULL,
2162 is_patch ? NULL : &vertex_index,
2163 &const_index, &indir_index);
2164
2165 ctx->abi->store_tcs_outputs(ctx->abi, var,
2166 vertex_index, indir_index,
2167 const_index, src, writemask);
2168 return;
2169 }
2170
2171 for (unsigned chan = 0; chan < 8; chan++) {
2172 int stride = 4;
2173 if (!(writemask & (1 << chan)))
2174 continue;
2175
2176 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2177
2178 if (var->data.compact)
2179 stride = 1;
2180 if (indir_index) {
2181 unsigned count = glsl_count_attribute_slots(
2182 var->type, false);
2183 count -= chan / 4;
2184 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2185 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2186 stride, true, true);
2187
2188 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2189 value, indir_index, "");
2190 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2191 count, stride, tmp_vec);
2192
2193 } else {
2194 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2195
2196 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2197 }
2198 }
2199 break;
2200 case nir_var_function_temp:
2201 for (unsigned chan = 0; chan < 8; chan++) {
2202 if (!(writemask & (1 << chan)))
2203 continue;
2204
2205 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2206 if (indir_index) {
2207 unsigned count = glsl_count_attribute_slots(
2208 var->type, false);
2209 count -= chan / 4;
2210 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2211 &ctx->ac, ctx->locals + idx + chan, count,
2212 4, true, true);
2213
2214 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2215 value, indir_index, "");
2216 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2217 count, 4, tmp_vec);
2218 } else {
2219 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2220
2221 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2222 }
2223 }
2224 break;
2225
2226 case nir_var_mem_global:
2227 case nir_var_mem_shared: {
2228 int writemask = instr->const_index[0];
2229 LLVMValueRef address = get_src(ctx, instr->src[0]);
2230 LLVMValueRef val = get_src(ctx, instr->src[1]);
2231
2232 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2233 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2234 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2235
2236 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2237 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2238 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2239
2240 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2241 stride == natural_stride) {
2242 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2243 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2244 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2245
2246 val = LLVMBuildBitCast(ctx->ac.builder, val,
2247 LLVMGetElementType(LLVMTypeOf(address)), "");
2248 LLVMBuildStore(ctx->ac.builder, val, address);
2249 } else {
2250 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2251 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2252 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2253 for (unsigned chan = 0; chan < 4; chan++) {
2254 if (!(writemask & (1 << chan)))
2255 continue;
2256
2257 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2258
2259 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2260 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2261 chan);
2262 src = LLVMBuildBitCast(ctx->ac.builder, src,
2263 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2264 LLVMBuildStore(ctx->ac.builder, src, ptr);
2265 }
2266 }
2267 break;
2268 }
2269 default:
2270 abort();
2271 break;
2272 }
2273 }
2274
2275 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2276 {
2277 switch (dim) {
2278 case GLSL_SAMPLER_DIM_BUF:
2279 return 1;
2280 case GLSL_SAMPLER_DIM_1D:
2281 return array ? 2 : 1;
2282 case GLSL_SAMPLER_DIM_2D:
2283 return array ? 3 : 2;
2284 case GLSL_SAMPLER_DIM_MS:
2285 return array ? 4 : 3;
2286 case GLSL_SAMPLER_DIM_3D:
2287 case GLSL_SAMPLER_DIM_CUBE:
2288 return 3;
2289 case GLSL_SAMPLER_DIM_RECT:
2290 case GLSL_SAMPLER_DIM_SUBPASS:
2291 return 2;
2292 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2293 return 3;
2294 default:
2295 break;
2296 }
2297 return 0;
2298 }
2299
2300
2301 /* Adjust the sample index according to FMASK.
2302 *
2303 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
2304 * which is the identity mapping. Each nibble says which physical sample
2305 * should be fetched to get that sample.
2306 *
2307 * For example, 0x11111100 means there are only 2 samples stored and
2308 * the second sample covers 3/4 of the pixel. When reading samples 0
2309 * and 1, return physical sample 0 (determined by the first two 0s
2310 * in FMASK), otherwise return physical sample 1.
2311 *
2312 * The sample index should be adjusted as follows:
2313 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
2314 */
2315 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2316 LLVMValueRef coord_x, LLVMValueRef coord_y,
2317 LLVMValueRef coord_z,
2318 LLVMValueRef sample_index,
2319 LLVMValueRef fmask_desc_ptr)
2320 {
2321 struct ac_image_args args = {0};
2322 LLVMValueRef res;
2323
2324 args.coords[0] = coord_x;
2325 args.coords[1] = coord_y;
2326 if (coord_z)
2327 args.coords[2] = coord_z;
2328
2329 args.opcode = ac_image_load;
2330 args.dim = coord_z ? ac_image_2darray : ac_image_2d;
2331 args.resource = fmask_desc_ptr;
2332 args.dmask = 0xf;
2333 args.attributes = AC_FUNC_ATTR_READNONE;
2334
2335 res = ac_build_image_opcode(ctx, &args);
2336
2337 res = ac_to_integer(ctx, res);
2338 LLVMValueRef four = LLVMConstInt(ctx->i32, 4, false);
2339 LLVMValueRef F = LLVMConstInt(ctx->i32, 0xf, false);
2340
2341 LLVMValueRef fmask = LLVMBuildExtractElement(ctx->builder,
2342 res,
2343 ctx->i32_0, "");
2344
2345 LLVMValueRef sample_index4 =
2346 LLVMBuildMul(ctx->builder, sample_index, four, "");
2347 LLVMValueRef shifted_fmask =
2348 LLVMBuildLShr(ctx->builder, fmask, sample_index4, "");
2349 LLVMValueRef final_sample =
2350 LLVMBuildAnd(ctx->builder, shifted_fmask, F, "");
2351
2352 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
2353 * resource descriptor is 0 (invalid),
2354 */
2355 LLVMValueRef fmask_desc =
2356 LLVMBuildBitCast(ctx->builder, fmask_desc_ptr,
2357 ctx->v8i32, "");
2358
2359 LLVMValueRef fmask_word1 =
2360 LLVMBuildExtractElement(ctx->builder, fmask_desc,
2361 ctx->i32_1, "");
2362
2363 LLVMValueRef word1_is_nonzero =
2364 LLVMBuildICmp(ctx->builder, LLVMIntNE,
2365 fmask_word1, ctx->i32_0, "");
2366
2367 /* Replace the MSAA sample index. */
2368 sample_index =
2369 LLVMBuildSelect(ctx->builder, word1_is_nonzero,
2370 final_sample, sample_index, "");
2371 return sample_index;
2372 }
2373
2374 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2375 {
2376 assert(instr->src[0].is_ssa);
2377 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2378 }
2379
2380 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2381 const nir_intrinsic_instr *instr,
2382 enum ac_descriptor_type desc_type,
2383 bool write)
2384 {
2385 nir_deref_instr *deref_instr =
2386 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2387 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2388
2389 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2390 }
2391
2392 static void get_image_coords(struct ac_nir_context *ctx,
2393 const nir_intrinsic_instr *instr,
2394 struct ac_image_args *args,
2395 enum glsl_sampler_dim dim,
2396 bool is_array)
2397 {
2398 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2399 LLVMValueRef masks[] = {
2400 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2401 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2402 };
2403 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2404
2405 int count;
2406 bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2407 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2408 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2409 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2410 bool gfx9_1d = ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2411 count = image_type_to_components_count(dim, is_array);
2412
2413 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2414 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2415 LLVMValueRef fmask_load_address[3];
2416 int chan;
2417
2418 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2419 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2420 if (is_array)
2421 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2422 else
2423 fmask_load_address[2] = NULL;
2424 if (add_frag_pos) {
2425 for (chan = 0; chan < 2; ++chan)
2426 fmask_load_address[chan] =
2427 LLVMBuildAdd(ctx->ac.builder, fmask_load_address[chan],
2428 LLVMBuildFPToUI(ctx->ac.builder, ctx->abi->frag_pos[chan],
2429 ctx->ac.i32, ""), "");
2430 fmask_load_address[2] = ac_to_integer(&ctx->ac, ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2431 }
2432 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2433 fmask_load_address[0],
2434 fmask_load_address[1],
2435 fmask_load_address[2],
2436 sample_index,
2437 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2438 AC_DESC_FMASK, &instr->instr, false, false));
2439 }
2440 if (count == 1 && !gfx9_1d) {
2441 if (instr->src[1].ssa->num_components)
2442 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2443 else
2444 args->coords[0] = src0;
2445 } else {
2446 int chan;
2447 if (is_ms)
2448 count--;
2449 for (chan = 0; chan < count; ++chan) {
2450 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2451 }
2452 if (add_frag_pos) {
2453 for (chan = 0; chan < 2; ++chan) {
2454 args->coords[chan] = LLVMBuildAdd(
2455 ctx->ac.builder, args->coords[chan],
2456 LLVMBuildFPToUI(
2457 ctx->ac.builder, ctx->abi->frag_pos[chan],
2458 ctx->ac.i32, ""), "");
2459 }
2460 args->coords[2] = ac_to_integer(&ctx->ac,
2461 ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2462 count++;
2463 }
2464
2465 if (gfx9_1d) {
2466 if (is_array) {
2467 args->coords[2] = args->coords[1];
2468 args->coords[1] = ctx->ac.i32_0;
2469 } else
2470 args->coords[1] = ctx->ac.i32_0;
2471 count++;
2472 }
2473
2474 if (is_ms) {
2475 args->coords[count] = sample_index;
2476 count++;
2477 }
2478 }
2479 }
2480
2481 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2482 const nir_intrinsic_instr *instr, bool write)
2483 {
2484 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2485 if (ctx->abi->gfx9_stride_size_workaround) {
2486 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2487 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2488 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2489
2490 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2491 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2492 elem_count, stride, "");
2493
2494 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2495 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2496 }
2497 return rsrc;
2498 }
2499
2500 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2501 const nir_intrinsic_instr *instr,
2502 bool bindless)
2503 {
2504 LLVMValueRef res;
2505
2506 enum glsl_sampler_dim dim;
2507 enum gl_access_qualifier access;
2508 bool is_array;
2509 if (bindless) {
2510 dim = nir_intrinsic_image_dim(instr);
2511 access = nir_intrinsic_access(instr);
2512 is_array = nir_intrinsic_image_array(instr);
2513 } else {
2514 const nir_deref_instr *image_deref = get_image_deref(instr);
2515 const struct glsl_type *type = image_deref->type;
2516 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2517 dim = glsl_get_sampler_dim(type);
2518 access = var->data.image.access;
2519 is_array = glsl_sampler_type_is_array(type);
2520 }
2521
2522 struct ac_image_args args = {};
2523
2524 args.cache_policy = get_cache_policy(ctx, access, false, false);
2525
2526 if (dim == GLSL_SAMPLER_DIM_BUF) {
2527 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2528 unsigned num_channels = util_last_bit(mask);
2529 LLVMValueRef rsrc, vindex;
2530
2531 rsrc = get_image_buffer_descriptor(ctx, instr, false);
2532 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2533 ctx->ac.i32_0, "");
2534
2535 /* TODO: set "can_speculate" when OpenGL needs it. */
2536 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2537 ctx->ac.i32_0, num_channels,
2538 !!(args.cache_policy & ac_glc),
2539 false);
2540 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2541
2542 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2543 res = ac_to_integer(&ctx->ac, res);
2544 } else {
2545 args.opcode = ac_image_load;
2546 get_image_coords(ctx, instr, &args, dim, is_array);
2547 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2548 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2549 args.dmask = 15;
2550 args.attributes = AC_FUNC_ATTR_READONLY;
2551
2552 res = ac_build_image_opcode(&ctx->ac, &args);
2553 }
2554 return ac_to_integer(&ctx->ac, res);
2555 }
2556
2557 static void visit_image_store(struct ac_nir_context *ctx,
2558 nir_intrinsic_instr *instr,
2559 bool bindless)
2560 {
2561
2562
2563 enum glsl_sampler_dim dim;
2564 enum gl_access_qualifier access;
2565 bool is_array;
2566 if (bindless) {
2567 dim = nir_intrinsic_image_dim(instr);
2568 access = nir_intrinsic_access(instr);
2569 is_array = nir_intrinsic_image_array(instr);
2570 } else {
2571 const nir_deref_instr *image_deref = get_image_deref(instr);
2572 const struct glsl_type *type = image_deref->type;
2573 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2574 dim = glsl_get_sampler_dim(type);
2575 access = var->data.image.access;
2576 is_array = glsl_sampler_type_is_array(type);
2577 }
2578
2579 bool writeonly_memory = access & ACCESS_NON_READABLE;
2580 struct ac_image_args args = {};
2581
2582 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2583
2584 if (dim == GLSL_SAMPLER_DIM_BUF) {
2585 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true);
2586 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2587 unsigned src_channels = ac_get_llvm_num_components(src);
2588 LLVMValueRef vindex;
2589
2590 if (src_channels == 3)
2591 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2592
2593 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2594 get_src(ctx, instr->src[1]),
2595 ctx->ac.i32_0, "");
2596
2597 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2598 ctx->ac.i32_0, src_channels,
2599 args.cache_policy & ac_glc,
2600 writeonly_memory);
2601 } else {
2602 args.opcode = ac_image_store;
2603 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2604 get_image_coords(ctx, instr, &args, dim, is_array);
2605 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2606 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2607 args.dmask = 15;
2608
2609 ac_build_image_opcode(&ctx->ac, &args);
2610 }
2611
2612 }
2613
2614 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2615 const nir_intrinsic_instr *instr,
2616 bool bindless)
2617 {
2618 LLVMValueRef params[7];
2619 int param_count = 0;
2620
2621 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2622 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2623 const char *atomic_name;
2624 char intrinsic_name[64];
2625 enum ac_atomic_op atomic_subop;
2626 MAYBE_UNUSED int length;
2627
2628 enum glsl_sampler_dim dim;
2629 bool is_unsigned;
2630 bool is_array;
2631 if (bindless) {
2632 if (instr->intrinsic == nir_intrinsic_image_atomic_min ||
2633 instr->intrinsic == nir_intrinsic_image_atomic_max) {
2634 const GLenum format = nir_intrinsic_format(instr);
2635 assert(format == GL_R32UI || format == GL_R32I);
2636 is_unsigned = format == GL_R32UI;
2637 }
2638 dim = nir_intrinsic_image_dim(instr);
2639 is_array = nir_intrinsic_image_array(instr);
2640 } else {
2641 const struct glsl_type *type = get_image_deref(instr)->type;
2642 is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2643 dim = glsl_get_sampler_dim(type);
2644 is_array = glsl_sampler_type_is_array(type);
2645 }
2646
2647 switch (instr->intrinsic) {
2648 case nir_intrinsic_bindless_image_atomic_add:
2649 case nir_intrinsic_image_deref_atomic_add:
2650 atomic_name = "add";
2651 atomic_subop = ac_atomic_add;
2652 break;
2653 case nir_intrinsic_bindless_image_atomic_min:
2654 case nir_intrinsic_image_deref_atomic_min:
2655 atomic_name = is_unsigned ? "umin" : "smin";
2656 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2657 break;
2658 case nir_intrinsic_bindless_image_atomic_max:
2659 case nir_intrinsic_image_deref_atomic_max:
2660 atomic_name = is_unsigned ? "umax" : "smax";
2661 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2662 break;
2663 case nir_intrinsic_bindless_image_atomic_and:
2664 case nir_intrinsic_image_deref_atomic_and:
2665 atomic_name = "and";
2666 atomic_subop = ac_atomic_and;
2667 break;
2668 case nir_intrinsic_bindless_image_atomic_or:
2669 case nir_intrinsic_image_deref_atomic_or:
2670 atomic_name = "or";
2671 atomic_subop = ac_atomic_or;
2672 break;
2673 case nir_intrinsic_bindless_image_atomic_xor:
2674 case nir_intrinsic_image_deref_atomic_xor:
2675 atomic_name = "xor";
2676 atomic_subop = ac_atomic_xor;
2677 break;
2678 case nir_intrinsic_bindless_image_atomic_exchange:
2679 case nir_intrinsic_image_deref_atomic_exchange:
2680 atomic_name = "swap";
2681 atomic_subop = ac_atomic_swap;
2682 break;
2683 case nir_intrinsic_bindless_image_atomic_comp_swap:
2684 case nir_intrinsic_image_deref_atomic_comp_swap:
2685 atomic_name = "cmpswap";
2686 atomic_subop = 0; /* not used */
2687 break;
2688 default:
2689 abort();
2690 }
2691
2692 if (cmpswap)
2693 params[param_count++] = get_src(ctx, instr->src[4]);
2694 params[param_count++] = get_src(ctx, instr->src[3]);
2695
2696 if (dim == GLSL_SAMPLER_DIM_BUF) {
2697 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true);
2698 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2699 ctx->ac.i32_0, ""); /* vindex */
2700 params[param_count++] = ctx->ac.i32_0; /* voffset */
2701 if (HAVE_LLVM >= 0x800) {
2702 params[param_count++] = ctx->ac.i32_0; /* soffset */
2703 params[param_count++] = ctx->ac.i32_0; /* slc */
2704
2705 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2706 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2707 } else {
2708 params[param_count++] = ctx->ac.i1false; /* slc */
2709
2710 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2711 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2712 }
2713
2714 assert(length < sizeof(intrinsic_name));
2715 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2716 params, param_count, 0);
2717 } else {
2718 struct ac_image_args args = {};
2719 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2720 args.atomic = atomic_subop;
2721 args.data[0] = params[0];
2722 if (cmpswap)
2723 args.data[1] = params[1];
2724 get_image_coords(ctx, instr, &args, dim, is_array);
2725 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2726 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2727
2728 return ac_build_image_opcode(&ctx->ac, &args);
2729 }
2730 }
2731
2732 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2733 const nir_intrinsic_instr *instr,
2734 bool bindless)
2735 {
2736 enum glsl_sampler_dim dim;
2737 bool is_array;
2738 if (bindless) {
2739 dim = nir_intrinsic_image_dim(instr);
2740 is_array = nir_intrinsic_image_array(instr);
2741 } else {
2742 const struct glsl_type *type = get_image_deref(instr)->type;
2743 dim = glsl_get_sampler_dim(type);
2744 is_array = glsl_sampler_type_is_array(type);
2745 }
2746
2747 struct ac_image_args args = { 0 };
2748 args.dim = get_ac_sampler_dim(&ctx->ac, dim, is_array);
2749 args.dmask = 0xf;
2750 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2751 args.opcode = ac_image_get_resinfo;
2752 args.lod = ctx->ac.i32_0;
2753 args.attributes = AC_FUNC_ATTR_READNONE;
2754
2755 return ac_build_image_opcode(&ctx->ac, &args);
2756 }
2757
2758 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2759 const nir_intrinsic_instr *instr,
2760 bool bindless)
2761 {
2762 LLVMValueRef res;
2763
2764 enum glsl_sampler_dim dim;
2765 bool is_array;
2766 if (bindless) {
2767 dim = nir_intrinsic_image_dim(instr);
2768 is_array = nir_intrinsic_image_array(instr);
2769 } else {
2770 const struct glsl_type *type = get_image_deref(instr)->type;
2771 dim = glsl_get_sampler_dim(type);
2772 is_array = glsl_sampler_type_is_array(type);
2773 }
2774
2775 if (dim == GLSL_SAMPLER_DIM_BUF)
2776 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2777
2778 struct ac_image_args args = { 0 };
2779
2780 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2781 args.dmask = 0xf;
2782 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2783 args.opcode = ac_image_get_resinfo;
2784 args.lod = ctx->ac.i32_0;
2785 args.attributes = AC_FUNC_ATTR_READNONE;
2786
2787 res = ac_build_image_opcode(&ctx->ac, &args);
2788
2789 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2790
2791 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2792 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2793 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2794 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2795 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2796 }
2797 if (ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2798 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2799 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2800 ctx->ac.i32_1, "");
2801
2802 }
2803 return res;
2804 }
2805
2806 static void emit_membar(struct ac_llvm_context *ac,
2807 const nir_intrinsic_instr *instr)
2808 {
2809 unsigned waitcnt = NOOP_WAITCNT;
2810
2811 switch (instr->intrinsic) {
2812 case nir_intrinsic_memory_barrier:
2813 case nir_intrinsic_group_memory_barrier:
2814 waitcnt &= VM_CNT & LGKM_CNT;
2815 break;
2816 case nir_intrinsic_memory_barrier_atomic_counter:
2817 case nir_intrinsic_memory_barrier_buffer:
2818 case nir_intrinsic_memory_barrier_image:
2819 waitcnt &= VM_CNT;
2820 break;
2821 case nir_intrinsic_memory_barrier_shared:
2822 waitcnt &= LGKM_CNT;
2823 break;
2824 default:
2825 break;
2826 }
2827 if (waitcnt != NOOP_WAITCNT)
2828 ac_build_waitcnt(ac, waitcnt);
2829 }
2830
2831 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2832 {
2833 /* SI only (thanks to a hw bug workaround):
2834 * The real barrier instruction isn’t needed, because an entire patch
2835 * always fits into a single wave.
2836 */
2837 if (ac->chip_class == SI && stage == MESA_SHADER_TESS_CTRL) {
2838 ac_build_waitcnt(ac, LGKM_CNT & VM_CNT);
2839 return;
2840 }
2841 ac_build_s_barrier(ac);
2842 }
2843
2844 static void emit_discard(struct ac_nir_context *ctx,
2845 const nir_intrinsic_instr *instr)
2846 {
2847 LLVMValueRef cond;
2848
2849 if (instr->intrinsic == nir_intrinsic_discard_if) {
2850 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2851 get_src(ctx, instr->src[0]),
2852 ctx->ac.i32_0, "");
2853 } else {
2854 assert(instr->intrinsic == nir_intrinsic_discard);
2855 cond = ctx->ac.i1false;
2856 }
2857
2858 ctx->abi->emit_kill(ctx->abi, cond);
2859 }
2860
2861 static LLVMValueRef
2862 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2863 {
2864 LLVMValueRef result;
2865 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2866 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2867 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2868
2869 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2870 }
2871
2872 static LLVMValueRef
2873 visit_load_subgroup_id(struct ac_nir_context *ctx)
2874 {
2875 if (ctx->stage == MESA_SHADER_COMPUTE) {
2876 LLVMValueRef result;
2877 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2878 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2879 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2880 } else {
2881 return LLVMConstInt(ctx->ac.i32, 0, false);
2882 }
2883 }
2884
2885 static LLVMValueRef
2886 visit_load_num_subgroups(struct ac_nir_context *ctx)
2887 {
2888 if (ctx->stage == MESA_SHADER_COMPUTE) {
2889 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2890 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2891 } else {
2892 return LLVMConstInt(ctx->ac.i32, 1, false);
2893 }
2894 }
2895
2896 static LLVMValueRef
2897 visit_first_invocation(struct ac_nir_context *ctx)
2898 {
2899 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2900
2901 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2902 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2903 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2904 "llvm.cttz.i64",
2905 ctx->ac.i64, args, 2,
2906 AC_FUNC_ATTR_NOUNWIND |
2907 AC_FUNC_ATTR_READNONE);
2908
2909 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2910 }
2911
2912 static LLVMValueRef
2913 visit_load_shared(struct ac_nir_context *ctx,
2914 const nir_intrinsic_instr *instr)
2915 {
2916 LLVMValueRef values[4], derived_ptr, index, ret;
2917
2918 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2919
2920 for (int chan = 0; chan < instr->num_components; chan++) {
2921 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2922 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2923 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2924 }
2925
2926 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2927 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2928 }
2929
2930 static void
2931 visit_store_shared(struct ac_nir_context *ctx,
2932 const nir_intrinsic_instr *instr)
2933 {
2934 LLVMValueRef derived_ptr, data,index;
2935 LLVMBuilderRef builder = ctx->ac.builder;
2936
2937 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2938 LLVMValueRef src = get_src(ctx, instr->src[0]);
2939
2940 int writemask = nir_intrinsic_write_mask(instr);
2941 for (int chan = 0; chan < 4; chan++) {
2942 if (!(writemask & (1 << chan))) {
2943 continue;
2944 }
2945 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2946 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2947 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2948 LLVMBuildStore(builder, data, derived_ptr);
2949 }
2950 }
2951
2952 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2953 const nir_intrinsic_instr *instr,
2954 LLVMValueRef ptr, int src_idx)
2955 {
2956 LLVMValueRef result;
2957 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2958
2959 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2960 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2961 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2962 result = LLVMBuildAtomicCmpXchg(ctx->ac.builder,
2963 ptr, src, src1,
2964 LLVMAtomicOrderingSequentiallyConsistent,
2965 LLVMAtomicOrderingSequentiallyConsistent,
2966 false);
2967 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2968 } else {
2969 LLVMAtomicRMWBinOp op;
2970 switch (instr->intrinsic) {
2971 case nir_intrinsic_shared_atomic_add:
2972 case nir_intrinsic_deref_atomic_add:
2973 op = LLVMAtomicRMWBinOpAdd;
2974 break;
2975 case nir_intrinsic_shared_atomic_umin:
2976 case nir_intrinsic_deref_atomic_umin:
2977 op = LLVMAtomicRMWBinOpUMin;
2978 break;
2979 case nir_intrinsic_shared_atomic_umax:
2980 case nir_intrinsic_deref_atomic_umax:
2981 op = LLVMAtomicRMWBinOpUMax;
2982 break;
2983 case nir_intrinsic_shared_atomic_imin:
2984 case nir_intrinsic_deref_atomic_imin:
2985 op = LLVMAtomicRMWBinOpMin;
2986 break;
2987 case nir_intrinsic_shared_atomic_imax:
2988 case nir_intrinsic_deref_atomic_imax:
2989 op = LLVMAtomicRMWBinOpMax;
2990 break;
2991 case nir_intrinsic_shared_atomic_and:
2992 case nir_intrinsic_deref_atomic_and:
2993 op = LLVMAtomicRMWBinOpAnd;
2994 break;
2995 case nir_intrinsic_shared_atomic_or:
2996 case nir_intrinsic_deref_atomic_or:
2997 op = LLVMAtomicRMWBinOpOr;
2998 break;
2999 case nir_intrinsic_shared_atomic_xor:
3000 case nir_intrinsic_deref_atomic_xor:
3001 op = LLVMAtomicRMWBinOpXor;
3002 break;
3003 case nir_intrinsic_shared_atomic_exchange:
3004 case nir_intrinsic_deref_atomic_exchange:
3005 op = LLVMAtomicRMWBinOpXchg;
3006 break;
3007 default:
3008 return NULL;
3009 }
3010
3011 result = LLVMBuildAtomicRMW(ctx->ac.builder, op, ptr, ac_to_integer(&ctx->ac, src),
3012 LLVMAtomicOrderingSequentiallyConsistent,
3013 false);
3014 }
3015 return result;
3016 }
3017
3018 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3019 {
3020 LLVMValueRef values[2];
3021 LLVMValueRef pos[2];
3022
3023 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
3024 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
3025
3026 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3027 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3028 return ac_build_gather_values(&ctx->ac, values, 2);
3029 }
3030
3031 static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
3032 const nir_intrinsic_instr *instr)
3033 {
3034 LLVMValueRef result[4];
3035 LLVMValueRef interp_param;
3036 unsigned location;
3037 unsigned chan;
3038 LLVMValueRef src_c0 = NULL;
3039 LLVMValueRef src_c1 = NULL;
3040 LLVMValueRef src0 = NULL;
3041
3042 nir_deref_instr *deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3043 nir_variable *var = nir_deref_instr_get_variable(deref_instr);
3044 int input_base = ctx->abi->fs_input_attr_indices[var->data.location - VARYING_SLOT_VAR0];
3045 switch (instr->intrinsic) {
3046 case nir_intrinsic_interp_deref_at_centroid:
3047 location = INTERP_CENTROID;
3048 break;
3049 case nir_intrinsic_interp_deref_at_sample:
3050 case nir_intrinsic_interp_deref_at_offset:
3051 location = INTERP_CENTER;
3052 src0 = get_src(ctx, instr->src[1]);
3053 break;
3054 default:
3055 break;
3056 }
3057
3058 if (instr->intrinsic == nir_intrinsic_interp_deref_at_offset) {
3059 src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_0, ""));
3060 src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_1, ""));
3061 } else if (instr->intrinsic == nir_intrinsic_interp_deref_at_sample) {
3062 LLVMValueRef sample_position;
3063 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3064
3065 /* fetch sample ID */
3066 sample_position = ctx->abi->load_sample_position(ctx->abi, src0);
3067
3068 src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_0, "");
3069 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3070 src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_1, "");
3071 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3072 }
3073 interp_param = ctx->abi->lookup_interp_param(ctx->abi, var->data.interpolation, location);
3074
3075 if (location == INTERP_CENTER) {
3076 LLVMValueRef ij_out[2];
3077 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3078
3079 /*
3080 * take the I then J parameters, and the DDX/Y for it, and
3081 * calculate the IJ inputs for the interpolator.
3082 * temp1 = ddx * offset/sample.x + I;
3083 * interp_param.I = ddy * offset/sample.y + temp1;
3084 * temp1 = ddx * offset/sample.x + J;
3085 * interp_param.J = ddy * offset/sample.y + temp1;
3086 */
3087 for (unsigned i = 0; i < 2; i++) {
3088 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3089 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3090 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3091 ddxy_out, ix_ll, "");
3092 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3093 ddxy_out, iy_ll, "");
3094 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3095 interp_param, ix_ll, "");
3096 LLVMValueRef temp1, temp2;
3097
3098 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3099 ctx->ac.f32, "");
3100
3101 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3102 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3103
3104 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3105 temp2, ctx->ac.i32, "");
3106 }
3107 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3108
3109 }
3110
3111 LLVMValueRef attrib_idx = ctx->ac.i32_0;
3112 while(deref_instr->deref_type != nir_deref_type_var) {
3113 if (deref_instr->deref_type == nir_deref_type_array) {
3114 unsigned array_size = glsl_count_attribute_slots(deref_instr->type, false);
3115
3116 LLVMValueRef offset;
3117 nir_const_value *const_value = nir_src_as_const_value(deref_instr->arr.index);
3118 if (const_value) {
3119 offset = LLVMConstInt(ctx->ac.i32, array_size * const_value->u32[0], false);
3120 } else {
3121 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3122
3123 offset = LLVMBuildMul(ctx->ac.builder, indirect,
3124 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3125 }
3126
3127 attrib_idx = LLVMBuildAdd(ctx->ac.builder, attrib_idx, offset, "");
3128 deref_instr = nir_src_as_deref(deref_instr->parent);
3129 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3130 LLVMValueRef offset;
3131 unsigned sidx = deref_instr->strct.index;
3132 deref_instr = nir_src_as_deref(deref_instr->parent);
3133 offset = LLVMConstInt(ctx->ac.i32, glsl_get_struct_location_offset(deref_instr->type, sidx), false);
3134 attrib_idx = LLVMBuildAdd(ctx->ac.builder, attrib_idx, offset, "");
3135 } else {
3136 unreachable("Unsupported deref type");
3137 }
3138
3139 }
3140
3141 unsigned attrib_size = glsl_count_attribute_slots(var->type, false);
3142 for (chan = 0; chan < 4; chan++) {
3143 LLVMValueRef gather = LLVMGetUndef(LLVMVectorType(ctx->ac.f32, attrib_size));
3144 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false);
3145
3146 for (unsigned idx = 0; idx < attrib_size; ++idx) {
3147 LLVMValueRef v, attr_number;
3148
3149 attr_number = LLVMConstInt(ctx->ac.i32, input_base + idx, false);
3150 if (interp_param) {
3151 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3152 interp_param, ctx->ac.v2f32, "");
3153 LLVMValueRef i = LLVMBuildExtractElement(
3154 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3155 LLVMValueRef j = LLVMBuildExtractElement(
3156 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3157
3158 v = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3159 ctx->abi->prim_mask, i, j);
3160 } else {
3161 v = ac_build_fs_interp_mov(&ctx->ac, LLVMConstInt(ctx->ac.i32, 2, false),
3162 llvm_chan, attr_number, ctx->abi->prim_mask);
3163 }
3164
3165 gather = LLVMBuildInsertElement(ctx->ac.builder, gather, v,
3166 LLVMConstInt(ctx->ac.i32, idx, false), "");
3167 }
3168
3169 result[chan] = LLVMBuildExtractElement(ctx->ac.builder, gather, attrib_idx, "");
3170
3171 }
3172 return ac_build_varying_gather_values(&ctx->ac, result, instr->num_components,
3173 var->data.location_frac);
3174 }
3175
3176 static void visit_intrinsic(struct ac_nir_context *ctx,
3177 nir_intrinsic_instr *instr)
3178 {
3179 LLVMValueRef result = NULL;
3180
3181 switch (instr->intrinsic) {
3182 case nir_intrinsic_ballot:
3183 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3184 break;
3185 case nir_intrinsic_read_invocation:
3186 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3187 get_src(ctx, instr->src[1]));
3188 break;
3189 case nir_intrinsic_read_first_invocation:
3190 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3191 break;
3192 case nir_intrinsic_load_subgroup_invocation:
3193 result = ac_get_thread_id(&ctx->ac);
3194 break;
3195 case nir_intrinsic_load_work_group_id: {
3196 LLVMValueRef values[3];
3197
3198 for (int i = 0; i < 3; i++) {
3199 values[i] = ctx->abi->workgroup_ids[i] ?
3200 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3201 }
3202
3203 result = ac_build_gather_values(&ctx->ac, values, 3);
3204 break;
3205 }
3206 case nir_intrinsic_load_base_vertex:
3207 case nir_intrinsic_load_first_vertex:
3208 result = ctx->abi->load_base_vertex(ctx->abi);
3209 break;
3210 case nir_intrinsic_load_local_group_size:
3211 result = ctx->abi->load_local_group_size(ctx->abi);
3212 break;
3213 case nir_intrinsic_load_vertex_id:
3214 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3215 ctx->abi->base_vertex, "");
3216 break;
3217 case nir_intrinsic_load_vertex_id_zero_base: {
3218 result = ctx->abi->vertex_id;
3219 break;
3220 }
3221 case nir_intrinsic_load_local_invocation_id: {
3222 result = ctx->abi->local_invocation_ids;
3223 break;
3224 }
3225 case nir_intrinsic_load_base_instance:
3226 result = ctx->abi->start_instance;
3227 break;
3228 case nir_intrinsic_load_draw_id:
3229 result = ctx->abi->draw_id;
3230 break;
3231 case nir_intrinsic_load_view_index:
3232 result = ctx->abi->view_index;
3233 break;
3234 case nir_intrinsic_load_invocation_id:
3235 if (ctx->stage == MESA_SHADER_TESS_CTRL)
3236 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3237 else
3238 result = ctx->abi->gs_invocation_id;
3239 break;
3240 case nir_intrinsic_load_primitive_id:
3241 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3242 result = ctx->abi->gs_prim_id;
3243 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3244 result = ctx->abi->tcs_patch_id;
3245 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3246 result = ctx->abi->tes_patch_id;
3247 } else
3248 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3249 break;
3250 case nir_intrinsic_load_sample_id:
3251 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3252 break;
3253 case nir_intrinsic_load_sample_pos:
3254 result = load_sample_pos(ctx);
3255 break;
3256 case nir_intrinsic_load_sample_mask_in:
3257 result = ctx->abi->load_sample_mask_in(ctx->abi);
3258 break;
3259 case nir_intrinsic_load_frag_coord: {
3260 LLVMValueRef values[4] = {
3261 ctx->abi->frag_pos[0],
3262 ctx->abi->frag_pos[1],
3263 ctx->abi->frag_pos[2],
3264 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3265 };
3266 result = ac_to_integer(&ctx->ac,
3267 ac_build_gather_values(&ctx->ac, values, 4));
3268 break;
3269 }
3270 case nir_intrinsic_load_front_face:
3271 result = ctx->abi->front_face;
3272 break;
3273 case nir_intrinsic_load_helper_invocation:
3274 result = ac_build_load_helper_invocation(&ctx->ac);
3275 break;
3276 case nir_intrinsic_load_instance_id:
3277 result = ctx->abi->instance_id;
3278 break;
3279 case nir_intrinsic_load_num_work_groups:
3280 result = ctx->abi->num_work_groups;
3281 break;
3282 case nir_intrinsic_load_local_invocation_index:
3283 result = visit_load_local_invocation_index(ctx);
3284 break;
3285 case nir_intrinsic_load_subgroup_id:
3286 result = visit_load_subgroup_id(ctx);
3287 break;
3288 case nir_intrinsic_load_num_subgroups:
3289 result = visit_load_num_subgroups(ctx);
3290 break;
3291 case nir_intrinsic_first_invocation:
3292 result = visit_first_invocation(ctx);
3293 break;
3294 case nir_intrinsic_load_push_constant:
3295 result = visit_load_push_constant(ctx, instr);
3296 break;
3297 case nir_intrinsic_vulkan_resource_index: {
3298 LLVMValueRef index = get_src(ctx, instr->src[0]);
3299 unsigned desc_set = nir_intrinsic_desc_set(instr);
3300 unsigned binding = nir_intrinsic_binding(instr);
3301
3302 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3303 binding);
3304 break;
3305 }
3306 case nir_intrinsic_vulkan_resource_reindex:
3307 result = visit_vulkan_resource_reindex(ctx, instr);
3308 break;
3309 case nir_intrinsic_store_ssbo:
3310 visit_store_ssbo(ctx, instr);
3311 break;
3312 case nir_intrinsic_load_ssbo:
3313 result = visit_load_buffer(ctx, instr);
3314 break;
3315 case nir_intrinsic_ssbo_atomic_add:
3316 case nir_intrinsic_ssbo_atomic_imin:
3317 case nir_intrinsic_ssbo_atomic_umin:
3318 case nir_intrinsic_ssbo_atomic_imax:
3319 case nir_intrinsic_ssbo_atomic_umax:
3320 case nir_intrinsic_ssbo_atomic_and:
3321 case nir_intrinsic_ssbo_atomic_or:
3322 case nir_intrinsic_ssbo_atomic_xor:
3323 case nir_intrinsic_ssbo_atomic_exchange:
3324 case nir_intrinsic_ssbo_atomic_comp_swap:
3325 result = visit_atomic_ssbo(ctx, instr);
3326 break;
3327 case nir_intrinsic_load_ubo:
3328 result = visit_load_ubo_buffer(ctx, instr);
3329 break;
3330 case nir_intrinsic_get_buffer_size:
3331 result = visit_get_buffer_size(ctx, instr);
3332 break;
3333 case nir_intrinsic_load_deref:
3334 result = visit_load_var(ctx, instr);
3335 break;
3336 case nir_intrinsic_store_deref:
3337 visit_store_var(ctx, instr);
3338 break;
3339 case nir_intrinsic_load_shared:
3340 result = visit_load_shared(ctx, instr);
3341 break;
3342 case nir_intrinsic_store_shared:
3343 visit_store_shared(ctx, instr);
3344 break;
3345 case nir_intrinsic_bindless_image_samples:
3346 result = visit_image_samples(ctx, instr, true);
3347 break;
3348 case nir_intrinsic_image_deref_samples:
3349 result = visit_image_samples(ctx, instr, false);
3350 break;
3351 case nir_intrinsic_bindless_image_load:
3352 result = visit_image_load(ctx, instr, true);
3353 break;
3354 case nir_intrinsic_image_deref_load:
3355 result = visit_image_load(ctx, instr, false);
3356 break;
3357 case nir_intrinsic_bindless_image_store:
3358 visit_image_store(ctx, instr, true);
3359 break;
3360 case nir_intrinsic_image_deref_store:
3361 visit_image_store(ctx, instr, false);
3362 break;
3363 case nir_intrinsic_bindless_image_atomic_add:
3364 case nir_intrinsic_bindless_image_atomic_min:
3365 case nir_intrinsic_bindless_image_atomic_max:
3366 case nir_intrinsic_bindless_image_atomic_and:
3367 case nir_intrinsic_bindless_image_atomic_or:
3368 case nir_intrinsic_bindless_image_atomic_xor:
3369 case nir_intrinsic_bindless_image_atomic_exchange:
3370 case nir_intrinsic_bindless_image_atomic_comp_swap:
3371 result = visit_image_atomic(ctx, instr, true);
3372 break;
3373 case nir_intrinsic_image_deref_atomic_add:
3374 case nir_intrinsic_image_deref_atomic_min:
3375 case nir_intrinsic_image_deref_atomic_max:
3376 case nir_intrinsic_image_deref_atomic_and:
3377 case nir_intrinsic_image_deref_atomic_or:
3378 case nir_intrinsic_image_deref_atomic_xor:
3379 case nir_intrinsic_image_deref_atomic_exchange:
3380 case nir_intrinsic_image_deref_atomic_comp_swap:
3381 result = visit_image_atomic(ctx, instr, false);
3382 break;
3383 case nir_intrinsic_bindless_image_size:
3384 result = visit_image_size(ctx, instr, true);
3385 break;
3386 case nir_intrinsic_image_deref_size:
3387 result = visit_image_size(ctx, instr, false);
3388 break;
3389 case nir_intrinsic_shader_clock:
3390 result = ac_build_shader_clock(&ctx->ac);
3391 break;
3392 case nir_intrinsic_discard:
3393 case nir_intrinsic_discard_if:
3394 emit_discard(ctx, instr);
3395 break;
3396 case nir_intrinsic_memory_barrier:
3397 case nir_intrinsic_group_memory_barrier:
3398 case nir_intrinsic_memory_barrier_atomic_counter:
3399 case nir_intrinsic_memory_barrier_buffer:
3400 case nir_intrinsic_memory_barrier_image:
3401 case nir_intrinsic_memory_barrier_shared:
3402 emit_membar(&ctx->ac, instr);
3403 break;
3404 case nir_intrinsic_barrier:
3405 ac_emit_barrier(&ctx->ac, ctx->stage);
3406 break;
3407 case nir_intrinsic_shared_atomic_add:
3408 case nir_intrinsic_shared_atomic_imin:
3409 case nir_intrinsic_shared_atomic_umin:
3410 case nir_intrinsic_shared_atomic_imax:
3411 case nir_intrinsic_shared_atomic_umax:
3412 case nir_intrinsic_shared_atomic_and:
3413 case nir_intrinsic_shared_atomic_or:
3414 case nir_intrinsic_shared_atomic_xor:
3415 case nir_intrinsic_shared_atomic_exchange:
3416 case nir_intrinsic_shared_atomic_comp_swap: {
3417 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3418 result = visit_var_atomic(ctx, instr, ptr, 1);
3419 break;
3420 }
3421 case nir_intrinsic_deref_atomic_add:
3422 case nir_intrinsic_deref_atomic_imin:
3423 case nir_intrinsic_deref_atomic_umin:
3424 case nir_intrinsic_deref_atomic_imax:
3425 case nir_intrinsic_deref_atomic_umax:
3426 case nir_intrinsic_deref_atomic_and:
3427 case nir_intrinsic_deref_atomic_or:
3428 case nir_intrinsic_deref_atomic_xor:
3429 case nir_intrinsic_deref_atomic_exchange:
3430 case nir_intrinsic_deref_atomic_comp_swap: {
3431 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3432 result = visit_var_atomic(ctx, instr, ptr, 1);
3433 break;
3434 }
3435 case nir_intrinsic_interp_deref_at_centroid:
3436 case nir_intrinsic_interp_deref_at_sample:
3437 case nir_intrinsic_interp_deref_at_offset:
3438 result = visit_interp(ctx, instr);
3439 break;
3440 case nir_intrinsic_emit_vertex:
3441 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3442 break;
3443 case nir_intrinsic_end_primitive:
3444 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3445 break;
3446 case nir_intrinsic_load_tess_coord:
3447 result = ctx->abi->load_tess_coord(ctx->abi);
3448 break;
3449 case nir_intrinsic_load_tess_level_outer:
3450 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
3451 break;
3452 case nir_intrinsic_load_tess_level_inner:
3453 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
3454 break;
3455 case nir_intrinsic_load_patch_vertices_in:
3456 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3457 break;
3458 case nir_intrinsic_vote_all: {
3459 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3460 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3461 break;
3462 }
3463 case nir_intrinsic_vote_any: {
3464 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3465 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3466 break;
3467 }
3468 case nir_intrinsic_shuffle:
3469 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3470 get_src(ctx, instr->src[1]));
3471 break;
3472 case nir_intrinsic_reduce:
3473 result = ac_build_reduce(&ctx->ac,
3474 get_src(ctx, instr->src[0]),
3475 instr->const_index[0],
3476 instr->const_index[1]);
3477 break;
3478 case nir_intrinsic_inclusive_scan:
3479 result = ac_build_inclusive_scan(&ctx->ac,
3480 get_src(ctx, instr->src[0]),
3481 instr->const_index[0]);
3482 break;
3483 case nir_intrinsic_exclusive_scan:
3484 result = ac_build_exclusive_scan(&ctx->ac,
3485 get_src(ctx, instr->src[0]),
3486 instr->const_index[0]);
3487 break;
3488 case nir_intrinsic_quad_broadcast: {
3489 unsigned lane = nir_src_as_const_value(instr->src[1])->u32[0];
3490 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3491 lane, lane, lane, lane);
3492 break;
3493 }
3494 case nir_intrinsic_quad_swap_horizontal:
3495 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3496 break;
3497 case nir_intrinsic_quad_swap_vertical:
3498 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3499 break;
3500 case nir_intrinsic_quad_swap_diagonal:
3501 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3502 break;
3503 default:
3504 fprintf(stderr, "Unknown intrinsic: ");
3505 nir_print_instr(&instr->instr, stderr);
3506 fprintf(stderr, "\n");
3507 break;
3508 }
3509 if (result) {
3510 ctx->ssa_defs[instr->dest.ssa.index] = result;
3511 }
3512 }
3513
3514 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3515 unsigned base_index,
3516 unsigned constant_index,
3517 LLVMValueRef dynamic_index)
3518 {
3519 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3520 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3521 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3522
3523 /* Bindless uniforms are 64bit so multiple index by 8 */
3524 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3525 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3526
3527 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3528
3529 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3530 NULL, 0, false, false, true, true);
3531
3532 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3533 }
3534
3535 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3536 nir_deref_instr *deref_instr,
3537 enum ac_descriptor_type desc_type,
3538 const nir_instr *instr,
3539 bool image, bool write)
3540 {
3541 LLVMValueRef index = NULL;
3542 unsigned constant_index = 0;
3543 unsigned descriptor_set;
3544 unsigned base_index;
3545 bool bindless = false;
3546
3547 if (!deref_instr) {
3548 descriptor_set = 0;
3549 if (image) {
3550 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3551 base_index = 0;
3552 bindless = true;
3553 index = get_src(ctx, img_instr->src[0]);
3554 } else {
3555 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3556 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3557 nir_tex_src_sampler_handle);
3558 if (sampSrcIdx != -1) {
3559 base_index = 0;
3560 bindless = true;
3561 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3562 } else {
3563 assert(tex_instr && !image);
3564 base_index = tex_instr->sampler_index;
3565 }
3566 }
3567 } else {
3568 while(deref_instr->deref_type != nir_deref_type_var) {
3569 if (deref_instr->deref_type == nir_deref_type_array) {
3570 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3571 if (!array_size)
3572 array_size = 1;
3573
3574 nir_const_value *const_value = nir_src_as_const_value(deref_instr->arr.index);
3575 if (const_value) {
3576 constant_index += array_size * const_value->u32[0];
3577 } else {
3578 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3579
3580 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3581 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3582
3583 if (!index)
3584 index = indirect;
3585 else
3586 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3587 }
3588
3589 deref_instr = nir_src_as_deref(deref_instr->parent);
3590 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3591 unsigned sidx = deref_instr->strct.index;
3592 deref_instr = nir_src_as_deref(deref_instr->parent);
3593 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3594 } else {
3595 unreachable("Unsupported deref type");
3596 }
3597 }
3598 descriptor_set = deref_instr->var->data.descriptor_set;
3599
3600 if (deref_instr->var->data.bindless) {
3601 /* For now just assert on unhandled variable types */
3602 assert(deref_instr->var->data.mode == nir_var_uniform);
3603
3604 base_index = deref_instr->var->data.driver_location;
3605 bindless = true;
3606
3607 index = index ? index : ctx->ac.i32_0;
3608 index = get_bindless_index_from_uniform(ctx, base_index,
3609 constant_index, index);
3610 } else
3611 base_index = deref_instr->var->data.binding;
3612 }
3613
3614 return ctx->abi->load_sampler_desc(ctx->abi,
3615 descriptor_set,
3616 base_index,
3617 constant_index, index,
3618 desc_type, image, write, bindless);
3619 }
3620
3621 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3622 *
3623 * SI-CI:
3624 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3625 * filtering manually. The driver sets img7 to a mask clearing
3626 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3627 * s_and_b32 samp0, samp0, img7
3628 *
3629 * VI:
3630 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3631 */
3632 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3633 LLVMValueRef res, LLVMValueRef samp)
3634 {
3635 LLVMBuilderRef builder = ctx->ac.builder;
3636 LLVMValueRef img7, samp0;
3637
3638 if (ctx->ac.chip_class >= VI)
3639 return samp;
3640
3641 img7 = LLVMBuildExtractElement(builder, res,
3642 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3643 samp0 = LLVMBuildExtractElement(builder, samp,
3644 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3645 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3646 return LLVMBuildInsertElement(builder, samp, samp0,
3647 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3648 }
3649
3650 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3651 nir_tex_instr *instr,
3652 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3653 LLVMValueRef *fmask_ptr)
3654 {
3655 nir_deref_instr *texture_deref_instr = NULL;
3656 nir_deref_instr *sampler_deref_instr = NULL;
3657
3658 for (unsigned i = 0; i < instr->num_srcs; i++) {
3659 switch (instr->src[i].src_type) {
3660 case nir_tex_src_texture_deref:
3661 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3662 break;
3663 case nir_tex_src_sampler_deref:
3664 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3665 break;
3666 default:
3667 break;
3668 }
3669 }
3670
3671 if (!sampler_deref_instr)
3672 sampler_deref_instr = texture_deref_instr;
3673
3674 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF)
3675 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_BUFFER, &instr->instr, false, false);
3676 else
3677 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_IMAGE, &instr->instr, false, false);
3678 if (samp_ptr) {
3679 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3680 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3681 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3682 }
3683 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3684 instr->op == nir_texop_samples_identical))
3685 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3686 }
3687
3688 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3689 LLVMValueRef coord)
3690 {
3691 coord = ac_to_float(ctx, coord);
3692 coord = ac_build_round(ctx, coord);
3693 coord = ac_to_integer(ctx, coord);
3694 return coord;
3695 }
3696
3697 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3698 {
3699 LLVMValueRef result = NULL;
3700 struct ac_image_args args = { 0 };
3701 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3702 LLVMValueRef ddx = NULL, ddy = NULL;
3703 unsigned offset_src = 0;
3704
3705 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3706
3707 for (unsigned i = 0; i < instr->num_srcs; i++) {
3708 switch (instr->src[i].src_type) {
3709 case nir_tex_src_coord: {
3710 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3711 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3712 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3713 break;
3714 }
3715 case nir_tex_src_projector:
3716 break;
3717 case nir_tex_src_comparator:
3718 if (instr->is_shadow)
3719 args.compare = get_src(ctx, instr->src[i].src);
3720 break;
3721 case nir_tex_src_offset:
3722 args.offset = get_src(ctx, instr->src[i].src);
3723 offset_src = i;
3724 break;
3725 case nir_tex_src_bias:
3726 if (instr->op == nir_texop_txb)
3727 args.bias = get_src(ctx, instr->src[i].src);
3728 break;
3729 case nir_tex_src_lod: {
3730 nir_const_value *val = nir_src_as_const_value(instr->src[i].src);
3731
3732 if (val && val->i32[0] == 0)
3733 args.level_zero = true;
3734 else
3735 args.lod = get_src(ctx, instr->src[i].src);
3736 break;
3737 }
3738 case nir_tex_src_ms_index:
3739 sample_index = get_src(ctx, instr->src[i].src);
3740 break;
3741 case nir_tex_src_ms_mcs:
3742 break;
3743 case nir_tex_src_ddx:
3744 ddx = get_src(ctx, instr->src[i].src);
3745 break;
3746 case nir_tex_src_ddy:
3747 ddy = get_src(ctx, instr->src[i].src);
3748 break;
3749 case nir_tex_src_texture_offset:
3750 case nir_tex_src_sampler_offset:
3751 case nir_tex_src_plane:
3752 default:
3753 break;
3754 }
3755 }
3756
3757 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3758 result = get_buffer_size(ctx, args.resource, true);
3759 goto write_result;
3760 }
3761
3762 if (instr->op == nir_texop_texture_samples) {
3763 LLVMValueRef res, samples, is_msaa;
3764 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3765 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3766 LLVMConstInt(ctx->ac.i32, 3, false), "");
3767 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3768 LLVMConstInt(ctx->ac.i32, 28, false), "");
3769 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3770 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3771 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3772 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3773
3774 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3775 LLVMConstInt(ctx->ac.i32, 16, false), "");
3776 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3777 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3778 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3779 samples, "");
3780 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3781 ctx->ac.i32_1, "");
3782 result = samples;
3783 goto write_result;
3784 }
3785
3786 if (args.offset && instr->op != nir_texop_txf) {
3787 LLVMValueRef offset[3], pack;
3788 for (unsigned chan = 0; chan < 3; ++chan)
3789 offset[chan] = ctx->ac.i32_0;
3790
3791 unsigned num_components = ac_get_llvm_num_components(args.offset);
3792 for (unsigned chan = 0; chan < num_components; chan++) {
3793 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3794 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3795 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3796 if (chan)
3797 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3798 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3799 }
3800 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3801 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3802 args.offset = pack;
3803 }
3804
3805 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3806 * so the depth comparison value isn't clamped for Z16 and
3807 * Z24 anymore. Do it manually here.
3808 *
3809 * It's unnecessary if the original texture format was
3810 * Z32_FLOAT, but we don't know that here.
3811 */
3812 if (args.compare && ctx->ac.chip_class >= VI && ctx->abi->clamp_shadow_reference)
3813 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3814
3815 /* pack derivatives */
3816 if (ddx || ddy) {
3817 int num_src_deriv_channels, num_dest_deriv_channels;
3818 switch (instr->sampler_dim) {
3819 case GLSL_SAMPLER_DIM_3D:
3820 case GLSL_SAMPLER_DIM_CUBE:
3821 num_src_deriv_channels = 3;
3822 num_dest_deriv_channels = 3;
3823 break;
3824 case GLSL_SAMPLER_DIM_2D:
3825 default:
3826 num_src_deriv_channels = 2;
3827 num_dest_deriv_channels = 2;
3828 break;
3829 case GLSL_SAMPLER_DIM_1D:
3830 num_src_deriv_channels = 1;
3831 if (ctx->ac.chip_class >= GFX9) {
3832 num_dest_deriv_channels = 2;
3833 } else {
3834 num_dest_deriv_channels = 1;
3835 }
3836 break;
3837 }
3838
3839 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3840 args.derivs[i] = ac_to_float(&ctx->ac,
3841 ac_llvm_extract_elem(&ctx->ac, ddx, i));
3842 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
3843 ac_llvm_extract_elem(&ctx->ac, ddy, i));
3844 }
3845 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3846 args.derivs[i] = ctx->ac.f32_0;
3847 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3848 }
3849 }
3850
3851 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
3852 for (unsigned chan = 0; chan < instr->coord_components; chan++)
3853 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
3854 if (instr->coord_components == 3)
3855 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
3856 ac_prepare_cube_coords(&ctx->ac,
3857 instr->op == nir_texop_txd, instr->is_array,
3858 instr->op == nir_texop_lod, args.coords, args.derivs);
3859 }
3860
3861 /* Texture coordinates fixups */
3862 if (instr->coord_components > 1 &&
3863 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3864 instr->is_array &&
3865 instr->op != nir_texop_txf) {
3866 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
3867 }
3868
3869 if (instr->coord_components > 2 &&
3870 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3871 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3872 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3873 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3874 instr->is_array &&
3875 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3876 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
3877 }
3878
3879 if (ctx->ac.chip_class >= GFX9 &&
3880 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3881 instr->op != nir_texop_lod) {
3882 LLVMValueRef filler;
3883 if (instr->op == nir_texop_txf)
3884 filler = ctx->ac.i32_0;
3885 else
3886 filler = LLVMConstReal(ctx->ac.f32, 0.5);
3887
3888 if (instr->is_array)
3889 args.coords[2] = args.coords[1];
3890 args.coords[1] = filler;
3891 }
3892
3893 /* Pack sample index */
3894 if (instr->op == nir_texop_txf_ms && sample_index)
3895 args.coords[instr->coord_components] = sample_index;
3896
3897 if (instr->op == nir_texop_samples_identical) {
3898 struct ac_image_args txf_args = { 0 };
3899 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
3900
3901 txf_args.dmask = 0xf;
3902 txf_args.resource = fmask_ptr;
3903 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
3904 result = build_tex_intrinsic(ctx, instr, &txf_args);
3905
3906 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3907 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
3908 goto write_result;
3909 }
3910
3911 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS &&
3912 instr->op != nir_texop_txs) {
3913 unsigned sample_chan = instr->is_array ? 3 : 2;
3914 args.coords[sample_chan] = adjust_sample_index_using_fmask(
3915 &ctx->ac, args.coords[0], args.coords[1],
3916 instr->is_array ? args.coords[2] : NULL,
3917 args.coords[sample_chan], fmask_ptr);
3918 }
3919
3920 if (args.offset && instr->op == nir_texop_txf) {
3921 nir_const_value *const_offset =
3922 nir_src_as_const_value(instr->src[offset_src].src);
3923 int num_offsets = instr->src[offset_src].src.ssa->num_components;
3924 assert(const_offset);
3925 num_offsets = MIN2(num_offsets, instr->coord_components);
3926 for (unsigned i = 0; i < num_offsets; ++i) {
3927 args.coords[i] = LLVMBuildAdd(
3928 ctx->ac.builder, args.coords[i],
3929 LLVMConstInt(ctx->ac.i32, const_offset->i32[i], false), "");
3930 }
3931 args.offset = NULL;
3932 }
3933
3934 /* TODO TG4 support */
3935 args.dmask = 0xf;
3936 if (instr->op == nir_texop_tg4) {
3937 if (instr->is_shadow)
3938 args.dmask = 1;
3939 else
3940 args.dmask = 1 << instr->component;
3941 }
3942
3943 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
3944 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
3945 result = build_tex_intrinsic(ctx, instr, &args);
3946
3947 if (instr->op == nir_texop_query_levels)
3948 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
3949 else if (instr->is_shadow && instr->is_new_style_shadow &&
3950 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
3951 instr->op != nir_texop_tg4)
3952 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3953 else if (instr->op == nir_texop_txs &&
3954 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3955 instr->is_array) {
3956 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3957 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3958 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3959 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3960 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
3961 } else if (ctx->ac.chip_class >= GFX9 &&
3962 instr->op == nir_texop_txs &&
3963 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3964 instr->is_array) {
3965 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3966 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3967 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
3968 ctx->ac.i32_1, "");
3969 } else if (instr->dest.ssa.num_components != 4)
3970 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
3971
3972 write_result:
3973 if (result) {
3974 assert(instr->dest.is_ssa);
3975 result = ac_to_integer(&ctx->ac, result);
3976 ctx->ssa_defs[instr->dest.ssa.index] = result;
3977 }
3978 }
3979
3980
3981 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
3982 {
3983 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3984 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
3985
3986 ctx->ssa_defs[instr->dest.ssa.index] = result;
3987 _mesa_hash_table_insert(ctx->phis, instr, result);
3988 }
3989
3990 static void visit_post_phi(struct ac_nir_context *ctx,
3991 nir_phi_instr *instr,
3992 LLVMValueRef llvm_phi)
3993 {
3994 nir_foreach_phi_src(src, instr) {
3995 LLVMBasicBlockRef block = get_block(ctx, src->pred);
3996 LLVMValueRef llvm_src = get_src(ctx, src->src);
3997
3998 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
3999 }
4000 }
4001
4002 static void phi_post_pass(struct ac_nir_context *ctx)
4003 {
4004 hash_table_foreach(ctx->phis, entry) {
4005 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4006 (LLVMValueRef)entry->data);
4007 }
4008 }
4009
4010
4011 static void visit_ssa_undef(struct ac_nir_context *ctx,
4012 const nir_ssa_undef_instr *instr)
4013 {
4014 unsigned num_components = instr->def.num_components;
4015 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4016 LLVMValueRef undef;
4017
4018 if (num_components == 1)
4019 undef = LLVMGetUndef(type);
4020 else {
4021 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4022 }
4023 ctx->ssa_defs[instr->def.index] = undef;
4024 }
4025
4026 static void visit_jump(struct ac_llvm_context *ctx,
4027 const nir_jump_instr *instr)
4028 {
4029 switch (instr->type) {
4030 case nir_jump_break:
4031 ac_build_break(ctx);
4032 break;
4033 case nir_jump_continue:
4034 ac_build_continue(ctx);
4035 break;
4036 default:
4037 fprintf(stderr, "Unknown NIR jump instr: ");
4038 nir_print_instr(&instr->instr, stderr);
4039 fprintf(stderr, "\n");
4040 abort();
4041 }
4042 }
4043
4044 static LLVMTypeRef
4045 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4046 enum glsl_base_type type)
4047 {
4048 switch (type) {
4049 case GLSL_TYPE_INT:
4050 case GLSL_TYPE_UINT:
4051 case GLSL_TYPE_BOOL:
4052 case GLSL_TYPE_SUBROUTINE:
4053 return ac->i32;
4054 case GLSL_TYPE_INT8:
4055 case GLSL_TYPE_UINT8:
4056 return ac->i8;
4057 case GLSL_TYPE_INT16:
4058 case GLSL_TYPE_UINT16:
4059 return ac->i16;
4060 case GLSL_TYPE_FLOAT:
4061 return ac->f32;
4062 case GLSL_TYPE_FLOAT16:
4063 return ac->f16;
4064 case GLSL_TYPE_INT64:
4065 case GLSL_TYPE_UINT64:
4066 return ac->i64;
4067 case GLSL_TYPE_DOUBLE:
4068 return ac->f64;
4069 default:
4070 unreachable("unknown GLSL type");
4071 }
4072 }
4073
4074 static LLVMTypeRef
4075 glsl_to_llvm_type(struct ac_llvm_context *ac,
4076 const struct glsl_type *type)
4077 {
4078 if (glsl_type_is_scalar(type)) {
4079 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4080 }
4081
4082 if (glsl_type_is_vector(type)) {
4083 return LLVMVectorType(
4084 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4085 glsl_get_vector_elements(type));
4086 }
4087
4088 if (glsl_type_is_matrix(type)) {
4089 return LLVMArrayType(
4090 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4091 glsl_get_matrix_columns(type));
4092 }
4093
4094 if (glsl_type_is_array(type)) {
4095 return LLVMArrayType(
4096 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4097 glsl_get_length(type));
4098 }
4099
4100 assert(glsl_type_is_struct_or_ifc(type));
4101
4102 LLVMTypeRef member_types[glsl_get_length(type)];
4103
4104 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4105 member_types[i] =
4106 glsl_to_llvm_type(ac,
4107 glsl_get_struct_field(type, i));
4108 }
4109
4110 return LLVMStructTypeInContext(ac->context, member_types,
4111 glsl_get_length(type), false);
4112 }
4113
4114 static void visit_deref(struct ac_nir_context *ctx,
4115 nir_deref_instr *instr)
4116 {
4117 if (instr->mode != nir_var_mem_shared &&
4118 instr->mode != nir_var_mem_global)
4119 return;
4120
4121 LLVMValueRef result = NULL;
4122 switch(instr->deref_type) {
4123 case nir_deref_type_var: {
4124 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4125 result = entry->data;
4126 break;
4127 }
4128 case nir_deref_type_struct:
4129 if (instr->mode == nir_var_mem_global) {
4130 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4131 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4132 instr->strct.index);
4133 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4134 LLVMConstInt(ctx->ac.i32, offset, 0));
4135 } else {
4136 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4137 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4138 }
4139 break;
4140 case nir_deref_type_array:
4141 if (instr->mode == nir_var_mem_global) {
4142 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4143 unsigned stride = glsl_get_explicit_stride(parent->type);
4144
4145 if ((glsl_type_is_matrix(parent->type) &&
4146 glsl_matrix_type_is_row_major(parent->type)) ||
4147 (glsl_type_is_vector(parent->type) && stride == 0))
4148 stride = type_scalar_size_bytes(parent->type);
4149
4150 assert(stride > 0);
4151 LLVMValueRef index = get_src(ctx, instr->arr.index);
4152 if (LLVMTypeOf(index) != ctx->ac.i64)
4153 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4154
4155 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4156
4157 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4158 } else {
4159 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4160 get_src(ctx, instr->arr.index));
4161 }
4162 break;
4163 case nir_deref_type_ptr_as_array:
4164 if (instr->mode == nir_var_mem_global) {
4165 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4166
4167 LLVMValueRef index = get_src(ctx, instr->arr.index);
4168 if (LLVMTypeOf(index) != ctx->ac.i64)
4169 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4170
4171 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4172
4173 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4174 } else {
4175 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4176 get_src(ctx, instr->arr.index));
4177 }
4178 break;
4179 case nir_deref_type_cast: {
4180 result = get_src(ctx, instr->parent);
4181
4182 /* We can't use the structs from LLVM because the shader
4183 * specifies its own offsets. */
4184 LLVMTypeRef pointee_type = ctx->ac.i8;
4185 if (instr->mode == nir_var_mem_shared)
4186 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4187
4188 unsigned address_space;
4189
4190 switch(instr->mode) {
4191 case nir_var_mem_shared:
4192 address_space = AC_ADDR_SPACE_LDS;
4193 break;
4194 case nir_var_mem_global:
4195 address_space = AC_ADDR_SPACE_GLOBAL;
4196 break;
4197 default:
4198 unreachable("Unhandled address space");
4199 }
4200
4201 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4202
4203 if (LLVMTypeOf(result) != type) {
4204 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4205 result = LLVMBuildBitCast(ctx->ac.builder, result,
4206 type, "");
4207 } else {
4208 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4209 type, "");
4210 }
4211 }
4212 break;
4213 }
4214 default:
4215 unreachable("Unhandled deref_instr deref type");
4216 }
4217
4218 ctx->ssa_defs[instr->dest.ssa.index] = result;
4219 }
4220
4221 static void visit_cf_list(struct ac_nir_context *ctx,
4222 struct exec_list *list);
4223
4224 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4225 {
4226 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->ac.builder);
4227 nir_foreach_instr(instr, block)
4228 {
4229 switch (instr->type) {
4230 case nir_instr_type_alu:
4231 visit_alu(ctx, nir_instr_as_alu(instr));
4232 break;
4233 case nir_instr_type_load_const:
4234 visit_load_const(ctx, nir_instr_as_load_const(instr));
4235 break;
4236 case nir_instr_type_intrinsic:
4237 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4238 break;
4239 case nir_instr_type_tex:
4240 visit_tex(ctx, nir_instr_as_tex(instr));
4241 break;
4242 case nir_instr_type_phi:
4243 visit_phi(ctx, nir_instr_as_phi(instr));
4244 break;
4245 case nir_instr_type_ssa_undef:
4246 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4247 break;
4248 case nir_instr_type_jump:
4249 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4250 break;
4251 case nir_instr_type_deref:
4252 visit_deref(ctx, nir_instr_as_deref(instr));
4253 break;
4254 default:
4255 fprintf(stderr, "Unknown NIR instr type: ");
4256 nir_print_instr(instr, stderr);
4257 fprintf(stderr, "\n");
4258 abort();
4259 }
4260 }
4261
4262 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
4263 }
4264
4265 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4266 {
4267 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4268
4269 nir_block *then_block =
4270 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4271
4272 ac_build_uif(&ctx->ac, value, then_block->index);
4273
4274 visit_cf_list(ctx, &if_stmt->then_list);
4275
4276 if (!exec_list_is_empty(&if_stmt->else_list)) {
4277 nir_block *else_block =
4278 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4279
4280 ac_build_else(&ctx->ac, else_block->index);
4281 visit_cf_list(ctx, &if_stmt->else_list);
4282 }
4283
4284 ac_build_endif(&ctx->ac, then_block->index);
4285 }
4286
4287 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4288 {
4289 nir_block *first_loop_block =
4290 (nir_block *) exec_list_get_head(&loop->body);
4291
4292 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4293
4294 visit_cf_list(ctx, &loop->body);
4295
4296 ac_build_endloop(&ctx->ac, first_loop_block->index);
4297 }
4298
4299 static void visit_cf_list(struct ac_nir_context *ctx,
4300 struct exec_list *list)
4301 {
4302 foreach_list_typed(nir_cf_node, node, node, list)
4303 {
4304 switch (node->type) {
4305 case nir_cf_node_block:
4306 visit_block(ctx, nir_cf_node_as_block(node));
4307 break;
4308
4309 case nir_cf_node_if:
4310 visit_if(ctx, nir_cf_node_as_if(node));
4311 break;
4312
4313 case nir_cf_node_loop:
4314 visit_loop(ctx, nir_cf_node_as_loop(node));
4315 break;
4316
4317 default:
4318 assert(0);
4319 }
4320 }
4321 }
4322
4323 void
4324 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4325 struct ac_shader_abi *abi,
4326 struct nir_shader *nir,
4327 struct nir_variable *variable,
4328 gl_shader_stage stage)
4329 {
4330 unsigned output_loc = variable->data.driver_location / 4;
4331 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4332
4333 /* tess ctrl has it's own load/store paths for outputs */
4334 if (stage == MESA_SHADER_TESS_CTRL)
4335 return;
4336
4337 if (stage == MESA_SHADER_VERTEX ||
4338 stage == MESA_SHADER_TESS_EVAL ||
4339 stage == MESA_SHADER_GEOMETRY) {
4340 int idx = variable->data.location + variable->data.index;
4341 if (idx == VARYING_SLOT_CLIP_DIST0) {
4342 int length = nir->info.clip_distance_array_size +
4343 nir->info.cull_distance_array_size;
4344
4345 if (length > 4)
4346 attrib_count = 2;
4347 else
4348 attrib_count = 1;
4349 }
4350 }
4351
4352 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4353 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4354 for (unsigned i = 0; i < attrib_count; ++i) {
4355 for (unsigned chan = 0; chan < 4; chan++) {
4356 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4357 ac_build_alloca_undef(ctx, type, "");
4358 }
4359 }
4360 }
4361
4362 static void
4363 setup_locals(struct ac_nir_context *ctx,
4364 struct nir_function *func)
4365 {
4366 int i, j;
4367 ctx->num_locals = 0;
4368 nir_foreach_variable(variable, &func->impl->locals) {
4369 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4370 variable->data.driver_location = ctx->num_locals * 4;
4371 variable->data.location_frac = 0;
4372 ctx->num_locals += attrib_count;
4373 }
4374 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4375 if (!ctx->locals)
4376 return;
4377
4378 for (i = 0; i < ctx->num_locals; i++) {
4379 for (j = 0; j < 4; j++) {
4380 ctx->locals[i * 4 + j] =
4381 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4382 }
4383 }
4384 }
4385
4386 static void
4387 setup_shared(struct ac_nir_context *ctx,
4388 struct nir_shader *nir)
4389 {
4390 nir_foreach_variable(variable, &nir->shared) {
4391 LLVMValueRef shared =
4392 LLVMAddGlobalInAddressSpace(
4393 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4394 variable->name ? variable->name : "",
4395 AC_ADDR_SPACE_LDS);
4396 _mesa_hash_table_insert(ctx->vars, variable, shared);
4397 }
4398 }
4399
4400 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4401 struct nir_shader *nir)
4402 {
4403 struct ac_nir_context ctx = {};
4404 struct nir_function *func;
4405
4406 ctx.ac = *ac;
4407 ctx.abi = abi;
4408
4409 ctx.stage = nir->info.stage;
4410
4411 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4412
4413 nir_foreach_variable(variable, &nir->outputs)
4414 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4415 ctx.stage);
4416
4417 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4418 _mesa_key_pointer_equal);
4419 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4420 _mesa_key_pointer_equal);
4421 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4422 _mesa_key_pointer_equal);
4423
4424 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4425
4426 nir_index_ssa_defs(func->impl);
4427 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4428
4429 setup_locals(&ctx, func);
4430
4431 if (gl_shader_stage_is_compute(nir->info.stage))
4432 setup_shared(&ctx, nir);
4433
4434 visit_cf_list(&ctx, &func->impl->body);
4435 phi_post_pass(&ctx);
4436
4437 if (!gl_shader_stage_is_compute(nir->info.stage))
4438 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4439 ctx.abi->outputs);
4440
4441 free(ctx.locals);
4442 free(ctx.ssa_defs);
4443 ralloc_free(ctx.defs);
4444 ralloc_free(ctx.phis);
4445 ralloc_free(ctx.vars);
4446 }
4447
4448 void
4449 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4450 {
4451 /* While it would be nice not to have this flag, we are constrained
4452 * by the reality that LLVM 5.0 doesn't have working VGPR indexing
4453 * on GFX9.
4454 */
4455 bool llvm_has_working_vgpr_indexing = chip_class <= VI;
4456
4457 /* TODO: Indirect indexing of GS inputs is unimplemented.
4458 *
4459 * TCS and TES load inputs directly from LDS or offchip memory, so
4460 * indirect indexing is trivial.
4461 */
4462 nir_variable_mode indirect_mask = 0;
4463 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4464 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4465 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4466 !llvm_has_working_vgpr_indexing)) {
4467 indirect_mask |= nir_var_shader_in;
4468 }
4469 if (!llvm_has_working_vgpr_indexing &&
4470 nir->info.stage != MESA_SHADER_TESS_CTRL)
4471 indirect_mask |= nir_var_shader_out;
4472
4473 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4474 * smart enough to handle indirects without causing excess spilling
4475 * causing the gpu to hang.
4476 *
4477 * See the following thread for more details of the problem:
4478 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4479 */
4480 indirect_mask |= nir_var_function_temp;
4481
4482 nir_lower_indirect_derefs(nir, indirect_mask);
4483 }
4484
4485 static unsigned
4486 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4487 {
4488 if (intrin->intrinsic != nir_intrinsic_store_deref)
4489 return 0;
4490
4491 nir_variable *var =
4492 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4493
4494 if (var->data.mode != nir_var_shader_out)
4495 return 0;
4496
4497 unsigned writemask = 0;
4498 const int location = var->data.location;
4499 unsigned first_component = var->data.location_frac;
4500 unsigned num_comps = intrin->dest.ssa.num_components;
4501
4502 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4503 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4504 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4505 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4506
4507 return writemask;
4508 }
4509
4510 static void
4511 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4512 unsigned *cond_block_tf_writemask,
4513 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4514 {
4515 switch (cf_node->type) {
4516 case nir_cf_node_block: {
4517 nir_block *block = nir_cf_node_as_block(cf_node);
4518 nir_foreach_instr(instr, block) {
4519 if (instr->type != nir_instr_type_intrinsic)
4520 continue;
4521
4522 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4523 if (intrin->intrinsic == nir_intrinsic_barrier) {
4524
4525 /* If we find a barrier in nested control flow put this in the
4526 * too hard basket. In GLSL this is not possible but it is in
4527 * SPIR-V.
4528 */
4529 if (is_nested_cf) {
4530 *tessfactors_are_def_in_all_invocs = false;
4531 return;
4532 }
4533
4534 /* The following case must be prevented:
4535 * gl_TessLevelInner = ...;
4536 * barrier();
4537 * if (gl_InvocationID == 1)
4538 * gl_TessLevelInner = ...;
4539 *
4540 * If you consider disjoint code segments separated by barriers, each
4541 * such segment that writes tess factor channels should write the same
4542 * channels in all codepaths within that segment.
4543 */
4544 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4545 /* Accumulate the result: */
4546 *tessfactors_are_def_in_all_invocs &=
4547 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4548
4549 /* Analyze the next code segment from scratch. */
4550 *upper_block_tf_writemask = 0;
4551 *cond_block_tf_writemask = 0;
4552 }
4553 } else
4554 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4555 }
4556
4557 break;
4558 }
4559 case nir_cf_node_if: {
4560 unsigned then_tessfactor_writemask = 0;
4561 unsigned else_tessfactor_writemask = 0;
4562
4563 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4564 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4565 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4566 cond_block_tf_writemask,
4567 tessfactors_are_def_in_all_invocs, true);
4568 }
4569
4570 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4571 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4572 cond_block_tf_writemask,
4573 tessfactors_are_def_in_all_invocs, true);
4574 }
4575
4576 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4577 /* If both statements write the same tess factor channels,
4578 * we can say that the upper block writes them too.
4579 */
4580 *upper_block_tf_writemask |= then_tessfactor_writemask &
4581 else_tessfactor_writemask;
4582 *cond_block_tf_writemask |= then_tessfactor_writemask |
4583 else_tessfactor_writemask;
4584 }
4585
4586 break;
4587 }
4588 case nir_cf_node_loop: {
4589 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4590 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4591 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4592 cond_block_tf_writemask,
4593 tessfactors_are_def_in_all_invocs, true);
4594 }
4595
4596 break;
4597 }
4598 default:
4599 unreachable("unknown cf node type");
4600 }
4601 }
4602
4603 bool
4604 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4605 {
4606 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4607
4608 /* The pass works as follows:
4609 * If all codepaths write tess factors, we can say that all
4610 * invocations define tess factors.
4611 *
4612 * Each tess factor channel is tracked separately.
4613 */
4614 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4615 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4616
4617 /* Initial value = true. Here the pass will accumulate results from
4618 * multiple segments surrounded by barriers. If tess factors aren't
4619 * written at all, it's a shader bug and we don't care if this will be
4620 * true.
4621 */
4622 bool tessfactors_are_def_in_all_invocs = true;
4623
4624 nir_foreach_function(function, nir) {
4625 if (function->impl) {
4626 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4627 scan_tess_ctrl(node, &main_block_tf_writemask,
4628 &cond_block_tf_writemask,
4629 &tessfactors_are_def_in_all_invocs,
4630 false);
4631 }
4632 }
4633 }
4634
4635 /* Accumulate the result for the last code segment separated by a
4636 * barrier.
4637 */
4638 if (main_block_tf_writemask || cond_block_tf_writemask) {
4639 tessfactors_are_def_in_all_invocs &=
4640 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4641 }
4642
4643 return tessfactors_are_def_in_all_invocs;
4644 }