2 * Copyright © 2016 Bas Nieuwenhuizen
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
30 #include "../vulkan/radv_descriptor_set.h"
31 #include "util/bitscan.h"
32 #include <llvm-c/Transforms/Scalar.h>
33 #include "ac_shader_info.h"
34 #include "ac_exp_param.h"
36 enum radeon_llvm_calling_convention
{
37 RADEON_LLVM_AMDGPU_VS
= 87,
38 RADEON_LLVM_AMDGPU_GS
= 88,
39 RADEON_LLVM_AMDGPU_PS
= 89,
40 RADEON_LLVM_AMDGPU_CS
= 90,
43 #define CONST_ADDR_SPACE 2
44 #define LOCAL_ADDR_SPACE 3
46 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
47 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
56 struct nir_to_llvm_context
{
57 struct ac_llvm_context ac
;
58 const struct ac_nir_compiler_options
*options
;
59 struct ac_shader_variant_info
*shader_info
;
60 unsigned max_workgroup_size
;
61 LLVMContextRef context
;
63 LLVMBuilderRef builder
;
64 LLVMValueRef main_function
;
66 struct hash_table
*defs
;
67 struct hash_table
*phis
;
69 LLVMValueRef descriptor_sets
[AC_UD_MAX_SETS
];
70 LLVMValueRef ring_offsets
;
71 LLVMValueRef push_constants
;
72 LLVMValueRef num_work_groups
;
73 LLVMValueRef workgroup_ids
;
74 LLVMValueRef local_invocation_ids
;
77 LLVMValueRef vertex_buffers
;
78 LLVMValueRef base_vertex
;
79 LLVMValueRef start_instance
;
80 LLVMValueRef draw_index
;
81 LLVMValueRef vertex_id
;
82 LLVMValueRef rel_auto_id
;
83 LLVMValueRef vs_prim_id
;
84 LLVMValueRef instance_id
;
85 LLVMValueRef ls_out_layout
;
86 LLVMValueRef es2gs_offset
;
88 LLVMValueRef tcs_offchip_layout
;
89 LLVMValueRef tcs_out_offsets
;
90 LLVMValueRef tcs_out_layout
;
91 LLVMValueRef tcs_in_layout
;
93 LLVMValueRef tess_factor_offset
;
94 LLVMValueRef tcs_patch_id
;
95 LLVMValueRef tcs_rel_ids
;
96 LLVMValueRef tes_rel_patch_id
;
97 LLVMValueRef tes_patch_id
;
101 LLVMValueRef gsvs_ring_stride
;
102 LLVMValueRef gsvs_num_entries
;
103 LLVMValueRef gs2vs_offset
;
104 LLVMValueRef gs_wave_id
;
105 LLVMValueRef gs_vtx_offset
[6];
106 LLVMValueRef gs_prim_id
, gs_invocation_id
;
108 LLVMValueRef esgs_ring
;
109 LLVMValueRef gsvs_ring
;
110 LLVMValueRef hs_ring_tess_offchip
;
111 LLVMValueRef hs_ring_tess_factor
;
113 LLVMValueRef prim_mask
;
114 LLVMValueRef sample_pos_offset
;
115 LLVMValueRef persp_sample
, persp_center
, persp_centroid
;
116 LLVMValueRef linear_sample
, linear_center
, linear_centroid
;
117 LLVMValueRef front_face
;
118 LLVMValueRef ancillary
;
119 LLVMValueRef sample_coverage
;
120 LLVMValueRef frag_pos
[4];
122 LLVMBasicBlockRef continue_block
;
123 LLVMBasicBlockRef break_block
;
143 LLVMValueRef i1false
;
144 LLVMValueRef i32zero
;
146 LLVMValueRef f32zero
;
148 LLVMValueRef v4f32empty
;
150 unsigned uniform_md_kind
;
151 LLVMValueRef empty_md
;
152 gl_shader_stage stage
;
155 LLVMValueRef inputs
[RADEON_LLVM_MAX_INPUTS
* 4];
156 LLVMValueRef outputs
[RADEON_LLVM_MAX_OUTPUTS
* 4];
158 LLVMValueRef shared_memory
;
160 uint64_t output_mask
;
162 LLVMValueRef
*locals
;
164 uint8_t num_output_clips
;
165 uint8_t num_output_culls
;
167 bool has_ds_bpermute
;
169 bool is_gs_copy_shader
;
170 LLVMValueRef gs_next_vertex
;
171 unsigned gs_max_out_vertices
;
173 unsigned tes_primitive_mode
;
174 uint64_t tess_outputs_written
;
175 uint64_t tess_patch_outputs_written
;
178 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
179 const nir_deref_var
*deref
,
180 enum desc_type desc_type
);
181 static unsigned radeon_llvm_reg_index_soa(unsigned index
, unsigned chan
)
183 return (index
* 4) + chan
;
186 static unsigned shader_io_get_unique_index(gl_varying_slot slot
)
188 /* handle patch indices separate */
189 if (slot
== VARYING_SLOT_TESS_LEVEL_OUTER
)
191 if (slot
== VARYING_SLOT_TESS_LEVEL_INNER
)
193 if (slot
>= VARYING_SLOT_PATCH0
&& slot
<= VARYING_SLOT_TESS_MAX
)
194 return 2 + (slot
- VARYING_SLOT_PATCH0
);
196 if (slot
== VARYING_SLOT_POS
)
198 if (slot
== VARYING_SLOT_PSIZ
)
200 if (slot
== VARYING_SLOT_CLIP_DIST0
)
202 /* 3 is reserved for clip dist as well */
203 if (slot
>= VARYING_SLOT_VAR0
&& slot
<= VARYING_SLOT_VAR31
)
204 return 4 + (slot
- VARYING_SLOT_VAR0
);
205 unreachable("illegal slot in get unique index\n");
208 static unsigned llvm_get_type_size(LLVMTypeRef type
)
210 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
213 case LLVMIntegerTypeKind
:
214 return LLVMGetIntTypeWidth(type
) / 8;
215 case LLVMFloatTypeKind
:
217 case LLVMPointerTypeKind
:
219 case LLVMVectorTypeKind
:
220 return LLVMGetVectorSize(type
) *
221 llvm_get_type_size(LLVMGetElementType(type
));
228 static void set_llvm_calling_convention(LLVMValueRef func
,
229 gl_shader_stage stage
)
231 enum radeon_llvm_calling_convention calling_conv
;
234 case MESA_SHADER_VERTEX
:
235 case MESA_SHADER_TESS_CTRL
:
236 case MESA_SHADER_TESS_EVAL
:
237 calling_conv
= RADEON_LLVM_AMDGPU_VS
;
239 case MESA_SHADER_GEOMETRY
:
240 calling_conv
= RADEON_LLVM_AMDGPU_GS
;
242 case MESA_SHADER_FRAGMENT
:
243 calling_conv
= RADEON_LLVM_AMDGPU_PS
;
245 case MESA_SHADER_COMPUTE
:
246 calling_conv
= RADEON_LLVM_AMDGPU_CS
;
249 unreachable("Unhandle shader type");
252 LLVMSetFunctionCallConv(func
, calling_conv
);
257 LLVMTypeRef types
[MAX_ARGS
];
258 LLVMValueRef
*assign
[MAX_ARGS
];
259 unsigned array_params_mask
;
261 uint8_t user_sgpr_count
;
263 uint8_t num_user_sgprs_used
;
264 uint8_t num_sgprs_used
;
265 uint8_t num_vgprs_used
;
269 add_argument(struct arg_info
*info
,
270 LLVMTypeRef type
, LLVMValueRef
*param_ptr
)
272 assert(info
->count
< MAX_ARGS
);
273 info
->assign
[info
->count
] = param_ptr
;
274 info
->types
[info
->count
] = type
;
279 add_sgpr_argument(struct arg_info
*info
,
280 LLVMTypeRef type
, LLVMValueRef
*param_ptr
)
282 add_argument(info
, type
, param_ptr
);
283 info
->num_sgprs_used
+= llvm_get_type_size(type
) / 4;
288 add_user_sgpr_argument(struct arg_info
*info
,
290 LLVMValueRef
*param_ptr
)
292 add_sgpr_argument(info
, type
, param_ptr
);
293 info
->num_user_sgprs_used
+= llvm_get_type_size(type
) / 4;
294 info
->user_sgpr_count
++;
298 add_vgpr_argument(struct arg_info
*info
,
300 LLVMValueRef
*param_ptr
)
302 add_argument(info
, type
, param_ptr
);
303 info
->num_vgprs_used
+= llvm_get_type_size(type
) / 4;
307 add_user_sgpr_array_argument(struct arg_info
*info
,
309 LLVMValueRef
*param_ptr
)
311 info
->array_params_mask
|= (1 << info
->count
);
312 add_user_sgpr_argument(info
, type
, param_ptr
);
315 static void assign_arguments(LLVMValueRef main_function
,
316 struct arg_info
*info
)
319 for (i
= 0; i
< info
->count
; i
++) {
321 *info
->assign
[i
] = LLVMGetParam(main_function
, i
);
326 create_llvm_function(LLVMContextRef ctx
, LLVMModuleRef module
,
327 LLVMBuilderRef builder
, LLVMTypeRef
*return_types
,
328 unsigned num_return_elems
,
329 struct arg_info
*args
,
330 unsigned max_workgroup_size
,
333 LLVMTypeRef main_function_type
, ret_type
;
334 LLVMBasicBlockRef main_function_body
;
336 if (num_return_elems
)
337 ret_type
= LLVMStructTypeInContext(ctx
, return_types
,
338 num_return_elems
, true);
340 ret_type
= LLVMVoidTypeInContext(ctx
);
342 /* Setup the function */
344 LLVMFunctionType(ret_type
, args
->types
, args
->count
, 0);
345 LLVMValueRef main_function
=
346 LLVMAddFunction(module
, "main", main_function_type
);
348 LLVMAppendBasicBlockInContext(ctx
, main_function
, "main_body");
349 LLVMPositionBuilderAtEnd(builder
, main_function_body
);
351 LLVMSetFunctionCallConv(main_function
, RADEON_LLVM_AMDGPU_CS
);
352 for (unsigned i
= 0; i
< args
->sgpr_count
; ++i
) {
353 if (args
->array_params_mask
& (1 << i
)) {
354 LLVMValueRef P
= LLVMGetParam(main_function
, i
);
355 ac_add_function_attr(ctx
, main_function
, i
+ 1, AC_FUNC_ATTR_BYVAL
);
356 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
359 ac_add_function_attr(ctx
, main_function
, i
+ 1, AC_FUNC_ATTR_INREG
);
363 if (max_workgroup_size
) {
364 ac_llvm_add_target_dep_function_attr(main_function
,
365 "amdgpu-max-work-group-size",
369 /* These were copied from some LLVM test. */
370 LLVMAddTargetDependentFunctionAttr(main_function
,
371 "less-precise-fpmad",
373 LLVMAddTargetDependentFunctionAttr(main_function
,
376 LLVMAddTargetDependentFunctionAttr(main_function
,
379 LLVMAddTargetDependentFunctionAttr(main_function
,
383 return main_function
;
386 static LLVMTypeRef
const_array(LLVMTypeRef elem_type
, int num_elements
)
388 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
392 static LLVMValueRef
get_shared_memory_ptr(struct nir_to_llvm_context
*ctx
,
400 offset
= LLVMConstInt(ctx
->i32
, idx
* 16, false);
402 ptr
= ctx
->shared_memory
;
403 ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &offset
, 1, "");
404 addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
405 ptr
= LLVMBuildBitCast(ctx
->builder
, ptr
, LLVMPointerType(type
, addr_space
), "");
409 static LLVMTypeRef
to_integer_type_scalar(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
411 if (t
== ctx
->f16
|| t
== ctx
->i16
)
413 else if (t
== ctx
->f32
|| t
== ctx
->i32
)
415 else if (t
== ctx
->f64
|| t
== ctx
->i64
)
418 unreachable("Unhandled integer size");
421 static LLVMTypeRef
to_integer_type(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
423 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
424 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
425 return LLVMVectorType(to_integer_type_scalar(ctx
, elem_type
),
426 LLVMGetVectorSize(t
));
428 return to_integer_type_scalar(ctx
, t
);
431 static LLVMValueRef
to_integer(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
)
433 LLVMTypeRef type
= LLVMTypeOf(v
);
434 return LLVMBuildBitCast(ctx
->builder
, v
, to_integer_type(ctx
, type
), "");
437 static LLVMTypeRef
to_float_type_scalar(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
439 if (t
== ctx
->i16
|| t
== ctx
->f16
)
441 else if (t
== ctx
->i32
|| t
== ctx
->f32
)
443 else if (t
== ctx
->i64
|| t
== ctx
->f64
)
446 unreachable("Unhandled float size");
449 static LLVMTypeRef
to_float_type(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
451 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
452 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
453 return LLVMVectorType(to_float_type_scalar(ctx
, elem_type
),
454 LLVMGetVectorSize(t
));
456 return to_float_type_scalar(ctx
, t
);
459 static LLVMValueRef
to_float(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
)
461 LLVMTypeRef type
= LLVMTypeOf(v
);
462 return LLVMBuildBitCast(ctx
->builder
, v
, to_float_type(ctx
, type
), "");
465 static int get_elem_bits(struct nir_to_llvm_context
*ctx
, LLVMTypeRef type
)
467 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
468 type
= LLVMGetElementType(type
);
470 if (LLVMGetTypeKind(type
) == LLVMIntegerTypeKind
)
471 return LLVMGetIntTypeWidth(type
);
473 if (type
== ctx
->f16
)
475 if (type
== ctx
->f32
)
477 if (type
== ctx
->f64
)
480 unreachable("Unhandled type kind in get_elem_bits");
483 static LLVMValueRef
unpack_param(struct nir_to_llvm_context
*ctx
,
484 LLVMValueRef param
, unsigned rshift
,
487 LLVMValueRef value
= param
;
489 value
= LLVMBuildLShr(ctx
->builder
, value
,
490 LLVMConstInt(ctx
->i32
, rshift
, false), "");
492 if (rshift
+ bitwidth
< 32) {
493 unsigned mask
= (1 << bitwidth
) - 1;
494 value
= LLVMBuildAnd(ctx
->builder
, value
,
495 LLVMConstInt(ctx
->i32
, mask
, false), "");
500 static LLVMValueRef
get_rel_patch_id(struct nir_to_llvm_context
*ctx
)
502 switch (ctx
->stage
) {
503 case MESA_SHADER_TESS_CTRL
:
504 return unpack_param(ctx
, ctx
->tcs_rel_ids
, 0, 8);
505 case MESA_SHADER_TESS_EVAL
:
506 return ctx
->tes_rel_patch_id
;
509 unreachable("Illegal stage");
513 /* Tessellation shaders pass outputs to the next shader using LDS.
515 * LS outputs = TCS inputs
516 * TCS outputs = TES inputs
519 * - TCS inputs for patch 0
520 * - TCS inputs for patch 1
521 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
523 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
524 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
525 * - TCS outputs for patch 1
526 * - Per-patch TCS outputs for patch 1
527 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
528 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
531 * All three shaders VS(LS), TCS, TES share the same LDS space.
534 get_tcs_in_patch_stride(struct nir_to_llvm_context
*ctx
)
536 if (ctx
->stage
== MESA_SHADER_VERTEX
)
537 return unpack_param(ctx
, ctx
->ls_out_layout
, 0, 13);
538 else if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
539 return unpack_param(ctx
, ctx
->tcs_in_layout
, 0, 13);
547 get_tcs_out_patch_stride(struct nir_to_llvm_context
*ctx
)
549 return unpack_param(ctx
, ctx
->tcs_out_layout
, 0, 13);
553 get_tcs_out_patch0_offset(struct nir_to_llvm_context
*ctx
)
555 return LLVMBuildMul(ctx
->builder
,
556 unpack_param(ctx
, ctx
->tcs_out_offsets
, 0, 16),
557 LLVMConstInt(ctx
->i32
, 4, false), "");
561 get_tcs_out_patch0_patch_data_offset(struct nir_to_llvm_context
*ctx
)
563 return LLVMBuildMul(ctx
->builder
,
564 unpack_param(ctx
, ctx
->tcs_out_offsets
, 16, 16),
565 LLVMConstInt(ctx
->i32
, 4, false), "");
569 get_tcs_in_current_patch_offset(struct nir_to_llvm_context
*ctx
)
571 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
572 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
574 return LLVMBuildMul(ctx
->builder
, patch_stride
, rel_patch_id
, "");
578 get_tcs_out_current_patch_offset(struct nir_to_llvm_context
*ctx
)
580 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
581 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
582 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
584 return LLVMBuildAdd(ctx
->builder
, patch0_offset
,
585 LLVMBuildMul(ctx
->builder
, patch_stride
,
591 get_tcs_out_current_patch_data_offset(struct nir_to_llvm_context
*ctx
)
593 LLVMValueRef patch0_patch_data_offset
=
594 get_tcs_out_patch0_patch_data_offset(ctx
);
595 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
596 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
598 return LLVMBuildAdd(ctx
->builder
, patch0_patch_data_offset
,
599 LLVMBuildMul(ctx
->builder
, patch_stride
,
604 static void set_userdata_location(struct ac_userdata_info
*ud_info
, uint8_t *sgpr_idx
, uint8_t num_sgprs
)
606 ud_info
->sgpr_idx
= *sgpr_idx
;
607 ud_info
->num_sgprs
= num_sgprs
;
608 ud_info
->indirect
= false;
609 ud_info
->indirect_offset
= 0;
610 *sgpr_idx
+= num_sgprs
;
613 static void set_userdata_location_shader(struct nir_to_llvm_context
*ctx
,
614 int idx
, uint8_t *sgpr_idx
, uint8_t num_sgprs
)
616 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.shader_data
[idx
], sgpr_idx
, num_sgprs
);
620 static void set_userdata_location_indirect(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
,
621 uint32_t indirect_offset
)
623 ud_info
->sgpr_idx
= sgpr_idx
;
624 ud_info
->num_sgprs
= num_sgprs
;
625 ud_info
->indirect
= true;
626 ud_info
->indirect_offset
= indirect_offset
;
629 static void declare_tess_lds(struct nir_to_llvm_context
*ctx
)
631 unsigned lds_size
= ctx
->options
->chip_class
>= CIK
? 65536 : 32768;
632 ctx
->lds
= LLVMBuildIntToPtr(ctx
->builder
, ctx
->i32zero
,
633 LLVMPointerType(LLVMArrayType(ctx
->i32
, lds_size
/ 4), LOCAL_ADDR_SPACE
),
637 struct user_sgpr_info
{
638 bool need_ring_offsets
;
640 bool indirect_all_descriptor_sets
;
643 static void allocate_user_sgprs(struct nir_to_llvm_context
*ctx
,
644 struct user_sgpr_info
*user_sgpr_info
)
646 memset(user_sgpr_info
, 0, sizeof(struct user_sgpr_info
));
648 /* until we sort out scratch/global buffers always assign ring offsets for gs/vs/es */
649 if (ctx
->stage
== MESA_SHADER_GEOMETRY
||
650 ctx
->stage
== MESA_SHADER_VERTEX
||
651 ctx
->stage
== MESA_SHADER_TESS_CTRL
||
652 ctx
->stage
== MESA_SHADER_TESS_EVAL
||
653 ctx
->is_gs_copy_shader
)
654 user_sgpr_info
->need_ring_offsets
= true;
656 if (ctx
->stage
== MESA_SHADER_FRAGMENT
&&
657 ctx
->shader_info
->info
.ps
.needs_sample_positions
)
658 user_sgpr_info
->need_ring_offsets
= true;
660 /* 2 user sgprs will nearly always be allocated for scratch/rings */
661 if (ctx
->options
->supports_spill
|| user_sgpr_info
->need_ring_offsets
) {
662 user_sgpr_info
->sgpr_count
+= 2;
665 switch (ctx
->stage
) {
666 case MESA_SHADER_COMPUTE
:
667 user_sgpr_info
->sgpr_count
+= ctx
->shader_info
->info
.cs
.grid_components_used
;
669 case MESA_SHADER_FRAGMENT
:
670 user_sgpr_info
->sgpr_count
+= ctx
->shader_info
->info
.ps
.needs_sample_positions
;
672 case MESA_SHADER_VERTEX
:
673 if (!ctx
->is_gs_copy_shader
) {
674 user_sgpr_info
->sgpr_count
+= ctx
->shader_info
->info
.vs
.has_vertex_buffers
? 2 : 0;
675 if (ctx
->shader_info
->info
.vs
.needs_draw_id
) {
676 user_sgpr_info
->sgpr_count
+= 3;
678 user_sgpr_info
->sgpr_count
+= 2;
681 if (ctx
->options
->key
.vs
.as_ls
)
682 user_sgpr_info
->sgpr_count
++;
684 case MESA_SHADER_TESS_CTRL
:
685 user_sgpr_info
->sgpr_count
+= 4;
687 case MESA_SHADER_TESS_EVAL
:
688 user_sgpr_info
->sgpr_count
+= 1;
690 case MESA_SHADER_GEOMETRY
:
691 user_sgpr_info
->sgpr_count
+= 2;
697 if (ctx
->shader_info
->info
.needs_push_constants
)
698 user_sgpr_info
->sgpr_count
+= 2;
700 uint32_t remaining_sgprs
= 16 - user_sgpr_info
->sgpr_count
;
701 if (remaining_sgprs
/ 2 < util_bitcount(ctx
->shader_info
->info
.desc_set_used_mask
)) {
702 user_sgpr_info
->sgpr_count
+= 2;
703 user_sgpr_info
->indirect_all_descriptor_sets
= true;
705 user_sgpr_info
->sgpr_count
+= util_bitcount(ctx
->shader_info
->info
.desc_set_used_mask
) * 2;
709 static void create_function(struct nir_to_llvm_context
*ctx
)
711 unsigned num_sets
= ctx
->options
->layout
? ctx
->options
->layout
->num_sets
: 0;
712 uint8_t user_sgpr_idx
;
713 struct user_sgpr_info user_sgpr_info
;
714 struct arg_info args
= {};
715 LLVMValueRef desc_sets
;
717 allocate_user_sgprs(ctx
, &user_sgpr_info
);
718 if (user_sgpr_info
.need_ring_offsets
&& !ctx
->options
->supports_spill
) {
719 add_user_sgpr_argument(&args
, const_array(ctx
->v16i8
, 16), &ctx
->ring_offsets
); /* address of rings */
722 /* 1 for each descriptor set */
723 if (!user_sgpr_info
.indirect_all_descriptor_sets
) {
724 for (unsigned i
= 0; i
< num_sets
; ++i
) {
725 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
726 add_user_sgpr_array_argument(&args
, const_array(ctx
->i8
, 1024 * 1024), &ctx
->descriptor_sets
[i
]);
730 add_user_sgpr_array_argument(&args
, const_array(const_array(ctx
->i8
, 1024 * 1024), 32), &desc_sets
);
732 if (ctx
->shader_info
->info
.needs_push_constants
) {
733 /* 1 for push constants and dynamic descriptors */
734 add_user_sgpr_array_argument(&args
, const_array(ctx
->i8
, 1024 * 1024), &ctx
->push_constants
);
737 switch (ctx
->stage
) {
738 case MESA_SHADER_COMPUTE
:
739 if (ctx
->shader_info
->info
.cs
.grid_components_used
)
740 add_user_sgpr_argument(&args
, LLVMVectorType(ctx
->i32
, ctx
->shader_info
->info
.cs
.grid_components_used
), &ctx
->num_work_groups
); /* grid size */
741 add_sgpr_argument(&args
, LLVMVectorType(ctx
->i32
, 3), &ctx
->workgroup_ids
);
742 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->tg_size
);
743 add_vgpr_argument(&args
, LLVMVectorType(ctx
->i32
, 3), &ctx
->local_invocation_ids
);
745 case MESA_SHADER_VERTEX
:
746 if (!ctx
->is_gs_copy_shader
) {
747 if (ctx
->shader_info
->info
.vs
.has_vertex_buffers
)
748 add_user_sgpr_argument(&args
, const_array(ctx
->v16i8
, 16), &ctx
->vertex_buffers
); /* vertex buffers */
749 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->base_vertex
); // base vertex
750 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->start_instance
);// start instance
751 if (ctx
->shader_info
->info
.vs
.needs_draw_id
)
752 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->draw_index
); // draw id
754 if (ctx
->options
->key
.vs
.as_es
)
755 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->es2gs_offset
); // es2gs offset
756 else if (ctx
->options
->key
.vs
.as_ls
)
757 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->ls_out_layout
); // ls out layout
758 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->vertex_id
); // vertex id
759 if (!ctx
->is_gs_copy_shader
) {
760 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->rel_auto_id
); // rel auto id
761 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->vs_prim_id
); // vs prim id
762 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->instance_id
); // instance id
765 case MESA_SHADER_TESS_CTRL
:
766 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_offchip_layout
); // tcs offchip layout
767 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_out_offsets
); // tcs out offsets
768 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_out_layout
); // tcs out layout
769 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_in_layout
); // tcs in layout
770 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->oc_lds
); // param oc lds
771 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->tess_factor_offset
); // tess factor offset
772 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_patch_id
); // patch id
773 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_rel_ids
); // rel ids;
775 case MESA_SHADER_TESS_EVAL
:
776 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_offchip_layout
); // tcs offchip layout
777 if (ctx
->options
->key
.tes
.as_es
) {
778 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->oc_lds
); // OC LDS
779 add_sgpr_argument(&args
, ctx
->i32
, NULL
); //
780 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->es2gs_offset
); // es2gs offset
782 add_sgpr_argument(&args
, ctx
->i32
, NULL
); //
783 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->oc_lds
); // OC LDS
785 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->tes_u
); // tes_u
786 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->tes_v
); // tes_v
787 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->tes_rel_patch_id
); // tes rel patch id
788 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->tes_patch_id
); // tes patch id
790 case MESA_SHADER_GEOMETRY
:
791 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->gsvs_ring_stride
); // gsvs stride
792 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->gsvs_num_entries
); // gsvs num entires
793 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->gs2vs_offset
); // gs2vs offset
794 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->gs_wave_id
); // wave id
795 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]); // vtx0
796 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]); // vtx1
797 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_prim_id
); // prim id
798 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
799 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
800 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
801 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
802 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_invocation_id
);
804 case MESA_SHADER_FRAGMENT
:
805 if (ctx
->shader_info
->info
.ps
.needs_sample_positions
)
806 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->sample_pos_offset
); /* sample position offset */
807 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->prim_mask
); /* prim mask */
808 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->persp_sample
); /* persp sample */
809 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->persp_center
); /* persp center */
810 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->persp_centroid
); /* persp centroid */
811 add_vgpr_argument(&args
, ctx
->v3i32
, NULL
); /* persp pull model */
812 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->linear_sample
); /* linear sample */
813 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->linear_center
); /* linear center */
814 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->linear_centroid
); /* linear centroid */
815 add_vgpr_argument(&args
, ctx
->f32
, NULL
); /* line stipple tex */
816 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->frag_pos
[0]); /* pos x float */
817 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->frag_pos
[1]); /* pos y float */
818 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->frag_pos
[2]); /* pos z float */
819 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->frag_pos
[3]); /* pos w float */
820 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->front_face
); /* front face */
821 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->ancillary
); /* ancillary */
822 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->sample_coverage
); /* sample coverage */
823 add_vgpr_argument(&args
, ctx
->i32
, NULL
); /* fixed pt */
826 unreachable("Shader stage not implemented");
829 ctx
->main_function
= create_llvm_function(
830 ctx
->context
, ctx
->module
, ctx
->builder
, NULL
, 0, &args
,
831 ctx
->max_workgroup_size
,
832 ctx
->options
->unsafe_math
);
833 set_llvm_calling_convention(ctx
->main_function
, ctx
->stage
);
836 ctx
->shader_info
->num_input_vgprs
= 0;
837 ctx
->shader_info
->num_input_sgprs
= ctx
->shader_info
->num_user_sgprs
=
838 ctx
->options
->supports_spill
? 2 : 0;
840 ctx
->shader_info
->num_user_sgprs
+= args
.num_user_sgprs_used
;
841 ctx
->shader_info
->num_input_sgprs
+= args
.num_sgprs_used
;
843 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
844 ctx
->shader_info
->num_input_vgprs
= args
.num_vgprs_used
;
846 assign_arguments(ctx
->main_function
, &args
);
850 if (ctx
->options
->supports_spill
|| user_sgpr_info
.need_ring_offsets
) {
851 set_userdata_location_shader(ctx
, AC_UD_SCRATCH_RING_OFFSETS
, &user_sgpr_idx
, 2);
852 if (ctx
->options
->supports_spill
) {
853 ctx
->ring_offsets
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.implicit.buffer.ptr",
854 LLVMPointerType(ctx
->i8
, CONST_ADDR_SPACE
),
855 NULL
, 0, AC_FUNC_ATTR_READNONE
);
856 ctx
->ring_offsets
= LLVMBuildBitCast(ctx
->builder
, ctx
->ring_offsets
,
857 const_array(ctx
->v16i8
, 16), "");
861 if (!user_sgpr_info
.indirect_all_descriptor_sets
) {
862 for (unsigned i
= 0; i
< num_sets
; ++i
) {
863 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
864 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.descriptor_sets
[i
], &user_sgpr_idx
, 2);
866 ctx
->descriptor_sets
[i
] = NULL
;
869 uint32_t desc_sgpr_idx
= user_sgpr_idx
;
870 set_userdata_location_shader(ctx
, AC_UD_INDIRECT_DESCRIPTOR_SETS
, &user_sgpr_idx
, 2);
872 for (unsigned i
= 0; i
< num_sets
; ++i
) {
873 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
874 set_userdata_location_indirect(&ctx
->shader_info
->user_sgprs_locs
.descriptor_sets
[i
], desc_sgpr_idx
, 2, i
* 8);
875 ctx
->descriptor_sets
[i
] = ac_build_indexed_load_const(&ctx
->ac
, desc_sets
, LLVMConstInt(ctx
->i32
, i
, false));
878 ctx
->descriptor_sets
[i
] = NULL
;
880 ctx
->shader_info
->need_indirect_descriptor_sets
= true;
883 if (ctx
->shader_info
->info
.needs_push_constants
) {
884 set_userdata_location_shader(ctx
, AC_UD_PUSH_CONSTANTS
, &user_sgpr_idx
, 2);
887 switch (ctx
->stage
) {
888 case MESA_SHADER_COMPUTE
:
889 if (ctx
->shader_info
->info
.cs
.grid_components_used
) {
890 set_userdata_location_shader(ctx
, AC_UD_CS_GRID_SIZE
, &user_sgpr_idx
, ctx
->shader_info
->info
.cs
.grid_components_used
);
893 case MESA_SHADER_VERTEX
:
894 if (!ctx
->is_gs_copy_shader
) {
895 if (ctx
->shader_info
->info
.vs
.has_vertex_buffers
) {
896 set_userdata_location_shader(ctx
, AC_UD_VS_VERTEX_BUFFERS
, &user_sgpr_idx
, 2);
899 if (ctx
->shader_info
->info
.vs
.needs_draw_id
)
902 set_userdata_location_shader(ctx
, AC_UD_VS_BASE_VERTEX_START_INSTANCE
, &user_sgpr_idx
, vs_num
);
904 if (ctx
->options
->key
.vs
.as_ls
) {
905 set_userdata_location_shader(ctx
, AC_UD_VS_LS_TCS_IN_LAYOUT
, &user_sgpr_idx
, 1);
907 if (ctx
->options
->key
.vs
.as_ls
)
908 declare_tess_lds(ctx
);
910 case MESA_SHADER_TESS_CTRL
:
911 set_userdata_location_shader(ctx
, AC_UD_TCS_OFFCHIP_LAYOUT
, &user_sgpr_idx
, 4);
912 declare_tess_lds(ctx
);
914 case MESA_SHADER_TESS_EVAL
:
915 set_userdata_location_shader(ctx
, AC_UD_TES_OFFCHIP_LAYOUT
, &user_sgpr_idx
, 1);
917 case MESA_SHADER_GEOMETRY
:
918 set_userdata_location_shader(ctx
, AC_UD_GS_VS_RING_STRIDE_ENTRIES
, &user_sgpr_idx
, 2);
920 case MESA_SHADER_FRAGMENT
:
921 if (ctx
->shader_info
->info
.ps
.needs_sample_positions
) {
922 set_userdata_location_shader(ctx
, AC_UD_PS_SAMPLE_POS_OFFSET
, &user_sgpr_idx
, 1);
926 unreachable("Shader stage not implemented");
930 static void setup_types(struct nir_to_llvm_context
*ctx
)
932 LLVMValueRef args
[4];
934 ctx
->voidt
= LLVMVoidTypeInContext(ctx
->context
);
935 ctx
->i1
= LLVMIntTypeInContext(ctx
->context
, 1);
936 ctx
->i8
= LLVMIntTypeInContext(ctx
->context
, 8);
937 ctx
->i16
= LLVMIntTypeInContext(ctx
->context
, 16);
938 ctx
->i32
= LLVMIntTypeInContext(ctx
->context
, 32);
939 ctx
->i64
= LLVMIntTypeInContext(ctx
->context
, 64);
940 ctx
->v2i32
= LLVMVectorType(ctx
->i32
, 2);
941 ctx
->v3i32
= LLVMVectorType(ctx
->i32
, 3);
942 ctx
->v4i32
= LLVMVectorType(ctx
->i32
, 4);
943 ctx
->v8i32
= LLVMVectorType(ctx
->i32
, 8);
944 ctx
->f32
= LLVMFloatTypeInContext(ctx
->context
);
945 ctx
->f16
= LLVMHalfTypeInContext(ctx
->context
);
946 ctx
->f64
= LLVMDoubleTypeInContext(ctx
->context
);
947 ctx
->v2f32
= LLVMVectorType(ctx
->f32
, 2);
948 ctx
->v4f32
= LLVMVectorType(ctx
->f32
, 4);
949 ctx
->v16i8
= LLVMVectorType(ctx
->i8
, 16);
951 ctx
->i1false
= LLVMConstInt(ctx
->i1
, 0, false);
952 ctx
->i1true
= LLVMConstInt(ctx
->i1
, 1, false);
953 ctx
->i32zero
= LLVMConstInt(ctx
->i32
, 0, false);
954 ctx
->i32one
= LLVMConstInt(ctx
->i32
, 1, false);
955 ctx
->f32zero
= LLVMConstReal(ctx
->f32
, 0.0);
956 ctx
->f32one
= LLVMConstReal(ctx
->f32
, 1.0);
958 args
[0] = ctx
->f32zero
;
959 args
[1] = ctx
->f32zero
;
960 args
[2] = ctx
->f32zero
;
961 args
[3] = ctx
->f32one
;
962 ctx
->v4f32empty
= LLVMConstVector(args
, 4);
964 ctx
->uniform_md_kind
=
965 LLVMGetMDKindIDInContext(ctx
->context
, "amdgpu.uniform", 14);
966 ctx
->empty_md
= LLVMMDNodeInContext(ctx
->context
, NULL
, 0);
968 args
[0] = LLVMConstReal(ctx
->f32
, 2.5);
971 static int get_llvm_num_components(LLVMValueRef value
)
973 LLVMTypeRef type
= LLVMTypeOf(value
);
974 unsigned num_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
975 ? LLVMGetVectorSize(type
)
977 return num_components
;
980 static LLVMValueRef
llvm_extract_elem(struct nir_to_llvm_context
*ctx
,
984 int count
= get_llvm_num_components(value
);
986 assert(index
< count
);
990 return LLVMBuildExtractElement(ctx
->builder
, value
,
991 LLVMConstInt(ctx
->i32
, index
, false), "");
994 static LLVMValueRef
trim_vector(struct nir_to_llvm_context
*ctx
,
995 LLVMValueRef value
, unsigned count
)
997 unsigned num_components
= get_llvm_num_components(value
);
998 if (count
== num_components
)
1001 LLVMValueRef masks
[] = {
1002 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
1003 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false)};
1006 return LLVMBuildExtractElement(ctx
->builder
, value
, masks
[0],
1009 LLVMValueRef swizzle
= LLVMConstVector(masks
, count
);
1010 return LLVMBuildShuffleVector(ctx
->builder
, value
, value
, swizzle
, "");
1014 build_store_values_extended(struct nir_to_llvm_context
*ctx
,
1015 LLVMValueRef
*values
,
1016 unsigned value_count
,
1017 unsigned value_stride
,
1020 LLVMBuilderRef builder
= ctx
->builder
;
1023 if (value_count
== 1) {
1024 LLVMBuildStore(builder
, vec
, values
[0]);
1028 for (i
= 0; i
< value_count
; i
++) {
1029 LLVMValueRef ptr
= values
[i
* value_stride
];
1030 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, i
, false);
1031 LLVMValueRef value
= LLVMBuildExtractElement(builder
, vec
, index
, "");
1032 LLVMBuildStore(builder
, value
, ptr
);
1036 static LLVMTypeRef
get_def_type(struct nir_to_llvm_context
*ctx
,
1037 const nir_ssa_def
*def
)
1039 LLVMTypeRef type
= LLVMIntTypeInContext(ctx
->context
, def
->bit_size
);
1040 if (def
->num_components
> 1) {
1041 type
= LLVMVectorType(type
, def
->num_components
);
1046 static LLVMValueRef
get_src(struct nir_to_llvm_context
*ctx
, nir_src src
)
1049 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, src
.ssa
);
1050 return (LLVMValueRef
)entry
->data
;
1054 static LLVMBasicBlockRef
get_block(struct nir_to_llvm_context
*ctx
,
1055 const struct nir_block
*b
)
1057 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, b
);
1058 return (LLVMBasicBlockRef
)entry
->data
;
1061 static LLVMValueRef
get_alu_src(struct nir_to_llvm_context
*ctx
,
1063 unsigned num_components
)
1065 LLVMValueRef value
= get_src(ctx
, src
.src
);
1066 bool need_swizzle
= false;
1069 LLVMTypeRef type
= LLVMTypeOf(value
);
1070 unsigned src_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
1071 ? LLVMGetVectorSize(type
)
1074 for (unsigned i
= 0; i
< num_components
; ++i
) {
1075 assert(src
.swizzle
[i
] < src_components
);
1076 if (src
.swizzle
[i
] != i
)
1077 need_swizzle
= true;
1080 if (need_swizzle
|| num_components
!= src_components
) {
1081 LLVMValueRef masks
[] = {
1082 LLVMConstInt(ctx
->i32
, src
.swizzle
[0], false),
1083 LLVMConstInt(ctx
->i32
, src
.swizzle
[1], false),
1084 LLVMConstInt(ctx
->i32
, src
.swizzle
[2], false),
1085 LLVMConstInt(ctx
->i32
, src
.swizzle
[3], false)};
1087 if (src_components
> 1 && num_components
== 1) {
1088 value
= LLVMBuildExtractElement(ctx
->builder
, value
,
1090 } else if (src_components
== 1 && num_components
> 1) {
1091 LLVMValueRef values
[] = {value
, value
, value
, value
};
1092 value
= ac_build_gather_values(&ctx
->ac
, values
, num_components
);
1094 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
1095 value
= LLVMBuildShuffleVector(ctx
->builder
, value
, value
,
1099 assert(!src
.negate
);
1104 static LLVMValueRef
emit_int_cmp(struct nir_to_llvm_context
*ctx
,
1105 LLVMIntPredicate pred
, LLVMValueRef src0
,
1108 LLVMValueRef result
= LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, "");
1109 return LLVMBuildSelect(ctx
->builder
, result
,
1110 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
1111 LLVMConstInt(ctx
->i32
, 0, false), "");
1114 static LLVMValueRef
emit_float_cmp(struct nir_to_llvm_context
*ctx
,
1115 LLVMRealPredicate pred
, LLVMValueRef src0
,
1118 LLVMValueRef result
;
1119 src0
= to_float(ctx
, src0
);
1120 src1
= to_float(ctx
, src1
);
1121 result
= LLVMBuildFCmp(ctx
->builder
, pred
, src0
, src1
, "");
1122 return LLVMBuildSelect(ctx
->builder
, result
,
1123 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
1124 LLVMConstInt(ctx
->i32
, 0, false), "");
1127 static LLVMValueRef
emit_intrin_1f_param(struct nir_to_llvm_context
*ctx
,
1129 LLVMTypeRef result_type
,
1133 LLVMValueRef params
[] = {
1134 to_float(ctx
, src0
),
1137 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
1138 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 1, AC_FUNC_ATTR_READNONE
);
1141 static LLVMValueRef
emit_intrin_2f_param(struct nir_to_llvm_context
*ctx
,
1143 LLVMTypeRef result_type
,
1144 LLVMValueRef src0
, LLVMValueRef src1
)
1147 LLVMValueRef params
[] = {
1148 to_float(ctx
, src0
),
1149 to_float(ctx
, src1
),
1152 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
1153 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 2, AC_FUNC_ATTR_READNONE
);
1156 static LLVMValueRef
emit_intrin_3f_param(struct nir_to_llvm_context
*ctx
,
1158 LLVMTypeRef result_type
,
1159 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
1162 LLVMValueRef params
[] = {
1163 to_float(ctx
, src0
),
1164 to_float(ctx
, src1
),
1165 to_float(ctx
, src2
),
1168 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
1169 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 3, AC_FUNC_ATTR_READNONE
);
1172 static LLVMValueRef
emit_bcsel(struct nir_to_llvm_context
*ctx
,
1173 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
1175 LLVMValueRef v
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, src0
,
1177 return LLVMBuildSelect(ctx
->builder
, v
, src1
, src2
, "");
1180 static LLVMValueRef
emit_find_lsb(struct nir_to_llvm_context
*ctx
,
1183 LLVMValueRef params
[2] = {
1186 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
1187 * add special code to check for x=0. The reason is that
1188 * the LLVM behavior for x=0 is different from what we
1191 * The hardware already implements the correct behavior.
1193 LLVMConstInt(ctx
->i32
, 1, false),
1195 return ac_build_intrinsic(&ctx
->ac
, "llvm.cttz.i32", ctx
->i32
, params
, 2, AC_FUNC_ATTR_READNONE
);
1198 static LLVMValueRef
emit_ifind_msb(struct nir_to_llvm_context
*ctx
,
1201 return ac_build_imsb(&ctx
->ac
, src0
, ctx
->i32
);
1204 static LLVMValueRef
emit_ufind_msb(struct nir_to_llvm_context
*ctx
,
1207 return ac_build_umsb(&ctx
->ac
, src0
, ctx
->i32
);
1210 static LLVMValueRef
emit_minmax_int(struct nir_to_llvm_context
*ctx
,
1211 LLVMIntPredicate pred
,
1212 LLVMValueRef src0
, LLVMValueRef src1
)
1214 return LLVMBuildSelect(ctx
->builder
,
1215 LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, ""),
1220 static LLVMValueRef
emit_iabs(struct nir_to_llvm_context
*ctx
,
1223 return emit_minmax_int(ctx
, LLVMIntSGT
, src0
,
1224 LLVMBuildNeg(ctx
->builder
, src0
, ""));
1227 static LLVMValueRef
emit_fsign(struct nir_to_llvm_context
*ctx
,
1230 LLVMValueRef cmp
, val
;
1232 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGT
, src0
, ctx
->f32zero
, "");
1233 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->f32one
, src0
, "");
1234 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
, val
, ctx
->f32zero
, "");
1235 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstReal(ctx
->f32
, -1.0), "");
1239 static LLVMValueRef
emit_isign(struct nir_to_llvm_context
*ctx
,
1242 LLVMValueRef cmp
, val
;
1244 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGT
, src0
, ctx
->i32zero
, "");
1245 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->i32one
, src0
, "");
1246 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGE
, val
, ctx
->i32zero
, "");
1247 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstInt(ctx
->i32
, -1, true), "");
1251 static LLVMValueRef
emit_ffract(struct nir_to_llvm_context
*ctx
,
1254 const char *intr
= "llvm.floor.f32";
1255 LLVMValueRef fsrc0
= to_float(ctx
, src0
);
1256 LLVMValueRef params
[] = {
1259 LLVMValueRef floor
= ac_build_intrinsic(&ctx
->ac
, intr
,
1260 ctx
->f32
, params
, 1,
1261 AC_FUNC_ATTR_READNONE
);
1262 return LLVMBuildFSub(ctx
->builder
, fsrc0
, floor
, "");
1265 static LLVMValueRef
emit_uint_carry(struct nir_to_llvm_context
*ctx
,
1267 LLVMValueRef src0
, LLVMValueRef src1
)
1269 LLVMTypeRef ret_type
;
1270 LLVMTypeRef types
[] = { ctx
->i32
, ctx
->i1
};
1272 LLVMValueRef params
[] = { src0
, src1
};
1273 ret_type
= LLVMStructTypeInContext(ctx
->context
, types
,
1276 res
= ac_build_intrinsic(&ctx
->ac
, intrin
, ret_type
,
1277 params
, 2, AC_FUNC_ATTR_READNONE
);
1279 res
= LLVMBuildExtractValue(ctx
->builder
, res
, 1, "");
1280 res
= LLVMBuildZExt(ctx
->builder
, res
, ctx
->i32
, "");
1284 static LLVMValueRef
emit_b2f(struct nir_to_llvm_context
*ctx
,
1287 return LLVMBuildAnd(ctx
->builder
, src0
, LLVMBuildBitCast(ctx
->builder
, LLVMConstReal(ctx
->f32
, 1.0), ctx
->i32
, ""), "");
1290 static LLVMValueRef
emit_f2f16(struct nir_to_llvm_context
*ctx
,
1293 LLVMValueRef result
;
1296 src0
= to_float(ctx
, src0
);
1297 result
= LLVMBuildFPTrunc(ctx
->builder
, src0
, ctx
->f16
, "");
1299 /* TODO SI/CIK options here */
1300 if (ctx
->options
->chip_class
>= VI
) {
1301 LLVMValueRef args
[2];
1302 /* Check if the result is a denormal - and flush to 0 if so. */
1304 args
[1] = LLVMConstInt(ctx
->i32
, N_SUBNORMAL
| P_SUBNORMAL
, false);
1305 cond
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.class.f16", ctx
->i1
, args
, 2, AC_FUNC_ATTR_READNONE
);
1308 /* need to convert back up to f32 */
1309 result
= LLVMBuildFPExt(ctx
->builder
, result
, ctx
->f32
, "");
1311 if (ctx
->options
->chip_class
>= VI
)
1312 result
= LLVMBuildSelect(ctx
->builder
, cond
, ctx
->f32zero
, result
, "");
1317 static LLVMValueRef
emit_umul_high(struct nir_to_llvm_context
*ctx
,
1318 LLVMValueRef src0
, LLVMValueRef src1
)
1320 LLVMValueRef dst64
, result
;
1321 src0
= LLVMBuildZExt(ctx
->builder
, src0
, ctx
->i64
, "");
1322 src1
= LLVMBuildZExt(ctx
->builder
, src1
, ctx
->i64
, "");
1324 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1325 dst64
= LLVMBuildLShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1326 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1330 static LLVMValueRef
emit_imul_high(struct nir_to_llvm_context
*ctx
,
1331 LLVMValueRef src0
, LLVMValueRef src1
)
1333 LLVMValueRef dst64
, result
;
1334 src0
= LLVMBuildSExt(ctx
->builder
, src0
, ctx
->i64
, "");
1335 src1
= LLVMBuildSExt(ctx
->builder
, src1
, ctx
->i64
, "");
1337 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1338 dst64
= LLVMBuildAShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1339 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1343 static LLVMValueRef
emit_bitfield_extract(struct nir_to_llvm_context
*ctx
,
1345 const LLVMValueRef srcs
[3])
1347 LLVMValueRef result
;
1348 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, srcs
[2], LLVMConstInt(ctx
->i32
, 32, false), "");
1350 result
= ac_build_bfe(&ctx
->ac
, srcs
[0], srcs
[1], srcs
[2], is_signed
);
1351 result
= LLVMBuildSelect(ctx
->builder
, icond
, srcs
[0], result
, "");
1355 static LLVMValueRef
emit_bitfield_insert(struct nir_to_llvm_context
*ctx
,
1356 LLVMValueRef src0
, LLVMValueRef src1
,
1357 LLVMValueRef src2
, LLVMValueRef src3
)
1359 LLVMValueRef bfi_args
[3], result
;
1361 bfi_args
[0] = LLVMBuildShl(ctx
->builder
,
1362 LLVMBuildSub(ctx
->builder
,
1363 LLVMBuildShl(ctx
->builder
,
1368 bfi_args
[1] = LLVMBuildShl(ctx
->builder
, src1
, src2
, "");
1371 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, src3
, LLVMConstInt(ctx
->i32
, 32, false), "");
1374 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
1375 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
1377 result
= LLVMBuildXor(ctx
->builder
, bfi_args
[2],
1378 LLVMBuildAnd(ctx
->builder
, bfi_args
[0],
1379 LLVMBuildXor(ctx
->builder
, bfi_args
[1], bfi_args
[2], ""), ""), "");
1381 result
= LLVMBuildSelect(ctx
->builder
, icond
, src1
, result
, "");
1385 static LLVMValueRef
emit_pack_half_2x16(struct nir_to_llvm_context
*ctx
,
1388 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1390 LLVMValueRef comp
[2];
1392 src0
= to_float(ctx
, src0
);
1393 comp
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, "");
1394 comp
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, "");
1395 for (i
= 0; i
< 2; i
++) {
1396 comp
[i
] = LLVMBuildFPTrunc(ctx
->builder
, comp
[i
], ctx
->f16
, "");
1397 comp
[i
] = LLVMBuildBitCast(ctx
->builder
, comp
[i
], ctx
->i16
, "");
1398 comp
[i
] = LLVMBuildZExt(ctx
->builder
, comp
[i
], ctx
->i32
, "");
1401 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
1402 comp
[0] = LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
1407 static LLVMValueRef
emit_unpack_half_2x16(struct nir_to_llvm_context
*ctx
,
1410 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1411 LLVMValueRef temps
[2], result
, val
;
1414 for (i
= 0; i
< 2; i
++) {
1415 val
= i
== 1 ? LLVMBuildLShr(ctx
->builder
, src0
, const16
, "") : src0
;
1416 val
= LLVMBuildTrunc(ctx
->builder
, val
, ctx
->i16
, "");
1417 val
= LLVMBuildBitCast(ctx
->builder
, val
, ctx
->f16
, "");
1418 temps
[i
] = LLVMBuildFPExt(ctx
->builder
, val
, ctx
->f32
, "");
1421 result
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), temps
[0],
1423 result
= LLVMBuildInsertElement(ctx
->builder
, result
, temps
[1],
1428 static LLVMValueRef
emit_ddxy(struct nir_to_llvm_context
*ctx
,
1434 LLVMValueRef result
;
1435 ctx
->has_ddxy
= true;
1437 if (!ctx
->lds
&& !ctx
->has_ds_bpermute
)
1438 ctx
->lds
= LLVMAddGlobalInAddressSpace(ctx
->module
,
1439 LLVMArrayType(ctx
->i32
, 64),
1440 "ddxy_lds", LOCAL_ADDR_SPACE
);
1442 if (op
== nir_op_fddx_fine
|| op
== nir_op_fddx
)
1443 mask
= AC_TID_MASK_LEFT
;
1444 else if (op
== nir_op_fddy_fine
|| op
== nir_op_fddy
)
1445 mask
= AC_TID_MASK_TOP
;
1447 mask
= AC_TID_MASK_TOP_LEFT
;
1449 /* for DDX we want to next X pixel, DDY next Y pixel. */
1450 if (op
== nir_op_fddx_fine
||
1451 op
== nir_op_fddx_coarse
||
1457 result
= ac_build_ddxy(&ctx
->ac
, ctx
->has_ds_bpermute
,
1458 mask
, idx
, ctx
->lds
,
1464 * this takes an I,J coordinate pair,
1465 * and works out the X and Y derivatives.
1466 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
1468 static LLVMValueRef
emit_ddxy_interp(
1469 struct nir_to_llvm_context
*ctx
,
1470 LLVMValueRef interp_ij
)
1472 LLVMValueRef result
[4], a
;
1475 for (i
= 0; i
< 2; i
++) {
1476 a
= LLVMBuildExtractElement(ctx
->builder
, interp_ij
,
1477 LLVMConstInt(ctx
->i32
, i
, false), "");
1478 result
[i
] = emit_ddxy(ctx
, nir_op_fddx
, a
);
1479 result
[2+i
] = emit_ddxy(ctx
, nir_op_fddy
, a
);
1481 return ac_build_gather_values(&ctx
->ac
, result
, 4);
1484 static void visit_alu(struct nir_to_llvm_context
*ctx
, const nir_alu_instr
*instr
)
1486 LLVMValueRef src
[4], result
= NULL
;
1487 unsigned num_components
= instr
->dest
.dest
.ssa
.num_components
;
1488 unsigned src_components
;
1489 LLVMTypeRef def_type
= get_def_type(ctx
, &instr
->dest
.dest
.ssa
);
1491 assert(nir_op_infos
[instr
->op
].num_inputs
<= ARRAY_SIZE(src
));
1492 switch (instr
->op
) {
1498 case nir_op_pack_half_2x16
:
1501 case nir_op_unpack_half_2x16
:
1505 src_components
= num_components
;
1508 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1509 src
[i
] = get_alu_src(ctx
, instr
->src
[i
], src_components
);
1511 switch (instr
->op
) {
1517 src
[0] = to_float(ctx
, src
[0]);
1518 result
= LLVMBuildFNeg(ctx
->builder
, src
[0], "");
1521 result
= LLVMBuildNeg(ctx
->builder
, src
[0], "");
1524 result
= LLVMBuildNot(ctx
->builder
, src
[0], "");
1527 result
= LLVMBuildAdd(ctx
->builder
, src
[0], src
[1], "");
1530 src
[0] = to_float(ctx
, src
[0]);
1531 src
[1] = to_float(ctx
, src
[1]);
1532 result
= LLVMBuildFAdd(ctx
->builder
, src
[0], src
[1], "");
1535 src
[0] = to_float(ctx
, src
[0]);
1536 src
[1] = to_float(ctx
, src
[1]);
1537 result
= LLVMBuildFSub(ctx
->builder
, src
[0], src
[1], "");
1540 result
= LLVMBuildSub(ctx
->builder
, src
[0], src
[1], "");
1543 result
= LLVMBuildMul(ctx
->builder
, src
[0], src
[1], "");
1546 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1549 result
= LLVMBuildURem(ctx
->builder
, src
[0], src
[1], "");
1552 src
[0] = to_float(ctx
, src
[0]);
1553 src
[1] = to_float(ctx
, src
[1]);
1554 result
= ac_build_fdiv(&ctx
->ac
, src
[0], src
[1]);
1555 result
= emit_intrin_1f_param(ctx
, "llvm.floor",
1556 to_float_type(ctx
, def_type
), result
);
1557 result
= LLVMBuildFMul(ctx
->builder
, src
[1] , result
, "");
1558 result
= LLVMBuildFSub(ctx
->builder
, src
[0], result
, "");
1561 src
[0] = to_float(ctx
, src
[0]);
1562 src
[1] = to_float(ctx
, src
[1]);
1563 result
= LLVMBuildFRem(ctx
->builder
, src
[0], src
[1], "");
1566 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1569 result
= LLVMBuildSDiv(ctx
->builder
, src
[0], src
[1], "");
1572 result
= LLVMBuildUDiv(ctx
->builder
, src
[0], src
[1], "");
1575 src
[0] = to_float(ctx
, src
[0]);
1576 src
[1] = to_float(ctx
, src
[1]);
1577 result
= LLVMBuildFMul(ctx
->builder
, src
[0], src
[1], "");
1580 src
[0] = to_float(ctx
, src
[0]);
1581 src
[1] = to_float(ctx
, src
[1]);
1582 result
= ac_build_fdiv(&ctx
->ac
, src
[0], src
[1]);
1585 src
[0] = to_float(ctx
, src
[0]);
1586 result
= ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, src
[0]);
1589 result
= LLVMBuildAnd(ctx
->builder
, src
[0], src
[1], "");
1592 result
= LLVMBuildOr(ctx
->builder
, src
[0], src
[1], "");
1595 result
= LLVMBuildXor(ctx
->builder
, src
[0], src
[1], "");
1598 result
= LLVMBuildShl(ctx
->builder
, src
[0], src
[1], "");
1601 result
= LLVMBuildAShr(ctx
->builder
, src
[0], src
[1], "");
1604 result
= LLVMBuildLShr(ctx
->builder
, src
[0], src
[1], "");
1607 result
= emit_int_cmp(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1610 result
= emit_int_cmp(ctx
, LLVMIntNE
, src
[0], src
[1]);
1613 result
= emit_int_cmp(ctx
, LLVMIntEQ
, src
[0], src
[1]);
1616 result
= emit_int_cmp(ctx
, LLVMIntSGE
, src
[0], src
[1]);
1619 result
= emit_int_cmp(ctx
, LLVMIntULT
, src
[0], src
[1]);
1622 result
= emit_int_cmp(ctx
, LLVMIntUGE
, src
[0], src
[1]);
1625 result
= emit_float_cmp(ctx
, LLVMRealUEQ
, src
[0], src
[1]);
1628 result
= emit_float_cmp(ctx
, LLVMRealUNE
, src
[0], src
[1]);
1631 result
= emit_float_cmp(ctx
, LLVMRealULT
, src
[0], src
[1]);
1634 result
= emit_float_cmp(ctx
, LLVMRealUGE
, src
[0], src
[1]);
1637 result
= emit_intrin_1f_param(ctx
, "llvm.fabs",
1638 to_float_type(ctx
, def_type
), src
[0]);
1641 result
= emit_iabs(ctx
, src
[0]);
1644 result
= emit_minmax_int(ctx
, LLVMIntSGT
, src
[0], src
[1]);
1647 result
= emit_minmax_int(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1650 result
= emit_minmax_int(ctx
, LLVMIntUGT
, src
[0], src
[1]);
1653 result
= emit_minmax_int(ctx
, LLVMIntULT
, src
[0], src
[1]);
1656 result
= emit_isign(ctx
, src
[0]);
1659 src
[0] = to_float(ctx
, src
[0]);
1660 result
= emit_fsign(ctx
, src
[0]);
1663 result
= emit_intrin_1f_param(ctx
, "llvm.floor",
1664 to_float_type(ctx
, def_type
), src
[0]);
1667 result
= emit_intrin_1f_param(ctx
, "llvm.trunc",
1668 to_float_type(ctx
, def_type
), src
[0]);
1671 result
= emit_intrin_1f_param(ctx
, "llvm.ceil",
1672 to_float_type(ctx
, def_type
), src
[0]);
1674 case nir_op_fround_even
:
1675 result
= emit_intrin_1f_param(ctx
, "llvm.rint",
1676 to_float_type(ctx
, def_type
),src
[0]);
1679 result
= emit_ffract(ctx
, src
[0]);
1682 result
= emit_intrin_1f_param(ctx
, "llvm.sin",
1683 to_float_type(ctx
, def_type
), src
[0]);
1686 result
= emit_intrin_1f_param(ctx
, "llvm.cos",
1687 to_float_type(ctx
, def_type
), src
[0]);
1690 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt",
1691 to_float_type(ctx
, def_type
), src
[0]);
1694 result
= emit_intrin_1f_param(ctx
, "llvm.exp2",
1695 to_float_type(ctx
, def_type
), src
[0]);
1698 result
= emit_intrin_1f_param(ctx
, "llvm.log2",
1699 to_float_type(ctx
, def_type
), src
[0]);
1702 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt",
1703 to_float_type(ctx
, def_type
), src
[0]);
1704 result
= ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, result
);
1707 result
= emit_intrin_2f_param(ctx
, "llvm.pow",
1708 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1711 result
= emit_intrin_2f_param(ctx
, "llvm.maxnum",
1712 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1713 if (instr
->dest
.dest
.ssa
.bit_size
== 32)
1714 result
= emit_intrin_1f_param(ctx
, "llvm.canonicalize",
1715 to_float_type(ctx
, def_type
),
1719 result
= emit_intrin_2f_param(ctx
, "llvm.minnum",
1720 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1721 if (instr
->dest
.dest
.ssa
.bit_size
== 32)
1722 result
= emit_intrin_1f_param(ctx
, "llvm.canonicalize",
1723 to_float_type(ctx
, def_type
),
1727 result
= emit_intrin_3f_param(ctx
, "llvm.fma",
1728 to_float_type(ctx
, def_type
), src
[0], src
[1], src
[2]);
1730 case nir_op_ibitfield_extract
:
1731 result
= emit_bitfield_extract(ctx
, true, src
);
1733 case nir_op_ubitfield_extract
:
1734 result
= emit_bitfield_extract(ctx
, false, src
);
1736 case nir_op_bitfield_insert
:
1737 result
= emit_bitfield_insert(ctx
, src
[0], src
[1], src
[2], src
[3]);
1739 case nir_op_bitfield_reverse
:
1740 result
= ac_build_intrinsic(&ctx
->ac
, "llvm.bitreverse.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1742 case nir_op_bit_count
:
1743 result
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1748 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1749 src
[i
] = to_integer(ctx
, src
[i
]);
1750 result
= ac_build_gather_values(&ctx
->ac
, src
, num_components
);
1754 src
[0] = to_float(ctx
, src
[0]);
1755 result
= LLVMBuildFPToSI(ctx
->builder
, src
[0], def_type
, "");
1759 src
[0] = to_float(ctx
, src
[0]);
1760 result
= LLVMBuildFPToUI(ctx
->builder
, src
[0], def_type
, "");
1764 result
= LLVMBuildSIToFP(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1768 result
= LLVMBuildUIToFP(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1771 result
= LLVMBuildFPExt(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1774 result
= LLVMBuildFPTrunc(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1778 if (get_elem_bits(ctx
, LLVMTypeOf(src
[0])) < get_elem_bits(ctx
, def_type
))
1779 result
= LLVMBuildZExt(ctx
->builder
, src
[0], def_type
, "");
1781 result
= LLVMBuildTrunc(ctx
->builder
, src
[0], def_type
, "");
1785 if (get_elem_bits(ctx
, LLVMTypeOf(src
[0])) < get_elem_bits(ctx
, def_type
))
1786 result
= LLVMBuildSExt(ctx
->builder
, src
[0], def_type
, "");
1788 result
= LLVMBuildTrunc(ctx
->builder
, src
[0], def_type
, "");
1791 result
= emit_bcsel(ctx
, src
[0], src
[1], src
[2]);
1793 case nir_op_find_lsb
:
1794 result
= emit_find_lsb(ctx
, src
[0]);
1796 case nir_op_ufind_msb
:
1797 result
= emit_ufind_msb(ctx
, src
[0]);
1799 case nir_op_ifind_msb
:
1800 result
= emit_ifind_msb(ctx
, src
[0]);
1802 case nir_op_uadd_carry
:
1803 result
= emit_uint_carry(ctx
, "llvm.uadd.with.overflow.i32", src
[0], src
[1]);
1805 case nir_op_usub_borrow
:
1806 result
= emit_uint_carry(ctx
, "llvm.usub.with.overflow.i32", src
[0], src
[1]);
1809 result
= emit_b2f(ctx
, src
[0]);
1811 case nir_op_fquantize2f16
:
1812 result
= emit_f2f16(ctx
, src
[0]);
1814 case nir_op_umul_high
:
1815 result
= emit_umul_high(ctx
, src
[0], src
[1]);
1817 case nir_op_imul_high
:
1818 result
= emit_imul_high(ctx
, src
[0], src
[1]);
1820 case nir_op_pack_half_2x16
:
1821 result
= emit_pack_half_2x16(ctx
, src
[0]);
1823 case nir_op_unpack_half_2x16
:
1824 result
= emit_unpack_half_2x16(ctx
, src
[0]);
1828 case nir_op_fddx_fine
:
1829 case nir_op_fddy_fine
:
1830 case nir_op_fddx_coarse
:
1831 case nir_op_fddy_coarse
:
1832 result
= emit_ddxy(ctx
, instr
->op
, src
[0]);
1835 fprintf(stderr
, "Unknown NIR alu instr: ");
1836 nir_print_instr(&instr
->instr
, stderr
);
1837 fprintf(stderr
, "\n");
1842 assert(instr
->dest
.dest
.is_ssa
);
1843 result
= to_integer(ctx
, result
);
1844 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.dest
.ssa
,
1849 static void visit_load_const(struct nir_to_llvm_context
*ctx
,
1850 const nir_load_const_instr
*instr
)
1852 LLVMValueRef values
[4], value
= NULL
;
1853 LLVMTypeRef element_type
=
1854 LLVMIntTypeInContext(ctx
->context
, instr
->def
.bit_size
);
1856 for (unsigned i
= 0; i
< instr
->def
.num_components
; ++i
) {
1857 switch (instr
->def
.bit_size
) {
1859 values
[i
] = LLVMConstInt(element_type
,
1860 instr
->value
.u32
[i
], false);
1863 values
[i
] = LLVMConstInt(element_type
,
1864 instr
->value
.u64
[i
], false);
1868 "unsupported nir load_const bit_size: %d\n",
1869 instr
->def
.bit_size
);
1873 if (instr
->def
.num_components
> 1) {
1874 value
= LLVMConstVector(values
, instr
->def
.num_components
);
1878 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, value
);
1881 static LLVMValueRef
cast_ptr(struct nir_to_llvm_context
*ctx
, LLVMValueRef ptr
,
1884 int addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
1885 return LLVMBuildBitCast(ctx
->builder
, ptr
,
1886 LLVMPointerType(type
, addr_space
), "");
1890 get_buffer_size(struct nir_to_llvm_context
*ctx
, LLVMValueRef descriptor
, bool in_elements
)
1893 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1894 LLVMConstInt(ctx
->i32
, 2, false), "");
1897 if (ctx
->options
->chip_class
>= VI
&& in_elements
) {
1898 /* On VI, the descriptor contains the size in bytes,
1899 * but TXQ must return the size in elements.
1900 * The stride is always non-zero for resources using TXQ.
1902 LLVMValueRef stride
=
1903 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1904 LLVMConstInt(ctx
->i32
, 1, false), "");
1905 stride
= LLVMBuildLShr(ctx
->builder
, stride
,
1906 LLVMConstInt(ctx
->i32
, 16, false), "");
1907 stride
= LLVMBuildAnd(ctx
->builder
, stride
,
1908 LLVMConstInt(ctx
->i32
, 0x3fff, false), "");
1910 size
= LLVMBuildUDiv(ctx
->builder
, size
, stride
, "");
1916 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
1919 static void build_int_type_name(
1921 char *buf
, unsigned bufsize
)
1923 assert(bufsize
>= 6);
1925 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
1926 snprintf(buf
, bufsize
, "v%ui32",
1927 LLVMGetVectorSize(type
));
1932 static LLVMValueRef
radv_lower_gather4_integer(struct nir_to_llvm_context
*ctx
,
1933 struct ac_image_args
*args
,
1934 const nir_tex_instr
*instr
)
1936 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
1937 LLVMValueRef coord
= args
->addr
;
1938 LLVMValueRef half_texel
[2];
1939 LLVMValueRef compare_cube_wa
;
1940 LLVMValueRef result
;
1942 unsigned coord_vgpr_index
= (unsigned)args
->offset
+ (unsigned)args
->compare
;
1946 struct ac_image_args txq_args
= { 0 };
1948 txq_args
.da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
1949 txq_args
.opcode
= ac_image_get_resinfo
;
1950 txq_args
.dmask
= 0xf;
1951 txq_args
.addr
= ctx
->i32zero
;
1952 txq_args
.resource
= args
->resource
;
1953 LLVMValueRef size
= ac_build_image_opcode(&ctx
->ac
, &txq_args
);
1955 for (c
= 0; c
< 2; c
++) {
1956 half_texel
[c
] = LLVMBuildExtractElement(ctx
->builder
, size
,
1957 LLVMConstInt(ctx
->i32
, c
, false), "");
1958 half_texel
[c
] = LLVMBuildUIToFP(ctx
->builder
, half_texel
[c
], ctx
->f32
, "");
1959 half_texel
[c
] = ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, half_texel
[c
]);
1960 half_texel
[c
] = LLVMBuildFMul(ctx
->builder
, half_texel
[c
],
1961 LLVMConstReal(ctx
->f32
, -0.5), "");
1965 LLVMValueRef orig_coords
= args
->addr
;
1967 for (c
= 0; c
< 2; c
++) {
1969 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
1970 tmp
= LLVMBuildExtractElement(ctx
->builder
, coord
, index
, "");
1971 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
1972 tmp
= LLVMBuildFAdd(ctx
->builder
, tmp
, half_texel
[c
], "");
1973 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
1974 coord
= LLVMBuildInsertElement(ctx
->builder
, coord
, tmp
, index
, "");
1979 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1980 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1981 * workaround by sampling using a scaled type and converting.
1982 * This is taken from amdgpu-pro shaders.
1984 /* NOTE this produces some ugly code compared to amdgpu-pro,
1985 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1986 * and then reads them back. -pro generates two selects,
1987 * one s_cmp for the descriptor rewriting
1988 * one v_cmp for the coordinate and result changes.
1990 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
) {
1991 LLVMValueRef tmp
, tmp2
;
1993 /* workaround 8/8/8/8 uint/sint cube gather bug */
1994 /* first detect it then change to a scaled read and f2i */
1995 tmp
= LLVMBuildExtractElement(ctx
->builder
, args
->resource
, ctx
->i32one
, "");
1998 /* extract the DATA_FORMAT */
1999 tmp
= ac_build_bfe(&ctx
->ac
, tmp
, LLVMConstInt(ctx
->i32
, 20, false),
2000 LLVMConstInt(ctx
->i32
, 6, false), false);
2002 /* is the DATA_FORMAT == 8_8_8_8 */
2003 compare_cube_wa
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, tmp
, LLVMConstInt(ctx
->i32
, V_008F14_IMG_DATA_FORMAT_8_8_8_8
, false), "");
2005 if (stype
== GLSL_TYPE_UINT
)
2006 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
2007 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, LLVMConstInt(ctx
->i32
, 0x8000000, false),
2008 LLVMConstInt(ctx
->i32
, 0x10000000, false), "");
2010 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
2011 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, LLVMConstInt(ctx
->i32
, 0xc000000, false),
2012 LLVMConstInt(ctx
->i32
, 0x14000000, false), "");
2014 /* replace the NUM FORMAT in the descriptor */
2015 tmp2
= LLVMBuildAnd(ctx
->builder
, tmp2
, LLVMConstInt(ctx
->i32
, C_008F14_NUM_FORMAT_GFX6
, false), "");
2016 tmp2
= LLVMBuildOr(ctx
->builder
, tmp2
, tmp
, "");
2018 args
->resource
= LLVMBuildInsertElement(ctx
->builder
, args
->resource
, tmp2
, ctx
->i32one
, "");
2020 /* don't modify the coordinates for this case */
2021 coord
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, orig_coords
, coord
, "");
2024 result
= ac_build_image_opcode(&ctx
->ac
, args
);
2026 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
) {
2027 LLVMValueRef tmp
, tmp2
;
2029 /* if the cube workaround is in place, f2i the result. */
2030 for (c
= 0; c
< 4; c
++) {
2031 tmp
= LLVMBuildExtractElement(ctx
->builder
, result
, LLVMConstInt(ctx
->i32
, c
, false), "");
2032 if (stype
== GLSL_TYPE_UINT
)
2033 tmp2
= LLVMBuildFPToUI(ctx
->builder
, tmp
, ctx
->i32
, "");
2035 tmp2
= LLVMBuildFPToSI(ctx
->builder
, tmp
, ctx
->i32
, "");
2036 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
2037 tmp2
= LLVMBuildBitCast(ctx
->builder
, tmp2
, ctx
->i32
, "");
2038 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, tmp2
, tmp
, "");
2039 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
2040 result
= LLVMBuildInsertElement(ctx
->builder
, result
, tmp
, LLVMConstInt(ctx
->i32
, c
, false), "");
2046 static LLVMValueRef
build_tex_intrinsic(struct nir_to_llvm_context
*ctx
,
2047 const nir_tex_instr
*instr
,
2049 struct ac_image_args
*args
)
2051 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
2052 return ac_build_buffer_load_format(&ctx
->ac
,
2055 LLVMConstInt(ctx
->i32
, 0, false),
2059 args
->opcode
= ac_image_sample
;
2060 args
->compare
= instr
->is_shadow
;
2062 switch (instr
->op
) {
2064 case nir_texop_txf_ms
:
2065 case nir_texop_samples_identical
:
2066 args
->opcode
= instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
? ac_image_load
: ac_image_load_mip
;
2067 args
->compare
= false;
2068 args
->offset
= false;
2075 args
->level_zero
= true;
2080 case nir_texop_query_levels
:
2081 args
->opcode
= ac_image_get_resinfo
;
2084 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
2085 args
->level_zero
= true;
2091 args
->opcode
= ac_image_gather4
;
2092 args
->level_zero
= true;
2095 args
->opcode
= ac_image_get_lod
;
2096 args
->compare
= false;
2097 args
->offset
= false;
2103 if (instr
->op
== nir_texop_tg4
) {
2104 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
2105 if (stype
== GLSL_TYPE_UINT
|| stype
== GLSL_TYPE_INT
) {
2106 return radv_lower_gather4_integer(ctx
, args
, instr
);
2109 return ac_build_image_opcode(&ctx
->ac
, args
);
2112 static LLVMValueRef
visit_vulkan_resource_index(struct nir_to_llvm_context
*ctx
,
2113 nir_intrinsic_instr
*instr
)
2115 LLVMValueRef index
= get_src(ctx
, instr
->src
[0]);
2116 unsigned desc_set
= nir_intrinsic_desc_set(instr
);
2117 unsigned binding
= nir_intrinsic_binding(instr
);
2118 LLVMValueRef desc_ptr
= ctx
->descriptor_sets
[desc_set
];
2119 struct radv_pipeline_layout
*pipeline_layout
= ctx
->options
->layout
;
2120 struct radv_descriptor_set_layout
*layout
= pipeline_layout
->set
[desc_set
].layout
;
2121 unsigned base_offset
= layout
->binding
[binding
].offset
;
2122 LLVMValueRef offset
, stride
;
2124 if (layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
||
2125 layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
) {
2126 unsigned idx
= pipeline_layout
->set
[desc_set
].dynamic_offset_start
+
2127 layout
->binding
[binding
].dynamic_offset_offset
;
2128 desc_ptr
= ctx
->push_constants
;
2129 base_offset
= pipeline_layout
->push_constant_size
+ 16 * idx
;
2130 stride
= LLVMConstInt(ctx
->i32
, 16, false);
2132 stride
= LLVMConstInt(ctx
->i32
, layout
->binding
[binding
].size
, false);
2134 offset
= LLVMConstInt(ctx
->i32
, base_offset
, false);
2135 index
= LLVMBuildMul(ctx
->builder
, index
, stride
, "");
2136 offset
= LLVMBuildAdd(ctx
->builder
, offset
, index
, "");
2138 desc_ptr
= ac_build_gep0(&ctx
->ac
, desc_ptr
, offset
);
2139 desc_ptr
= cast_ptr(ctx
, desc_ptr
, ctx
->v4i32
);
2140 LLVMSetMetadata(desc_ptr
, ctx
->uniform_md_kind
, ctx
->empty_md
);
2142 return LLVMBuildLoad(ctx
->builder
, desc_ptr
, "");
2145 static LLVMValueRef
visit_load_push_constant(struct nir_to_llvm_context
*ctx
,
2146 nir_intrinsic_instr
*instr
)
2148 LLVMValueRef ptr
, addr
;
2150 addr
= LLVMConstInt(ctx
->i32
, nir_intrinsic_base(instr
), 0);
2151 addr
= LLVMBuildAdd(ctx
->builder
, addr
, get_src(ctx
, instr
->src
[0]), "");
2153 ptr
= ac_build_gep0(&ctx
->ac
, ctx
->push_constants
, addr
);
2154 ptr
= cast_ptr(ctx
, ptr
, get_def_type(ctx
, &instr
->dest
.ssa
));
2156 return LLVMBuildLoad(ctx
->builder
, ptr
, "");
2159 static LLVMValueRef
visit_get_buffer_size(struct nir_to_llvm_context
*ctx
,
2160 const nir_intrinsic_instr
*instr
)
2162 LLVMValueRef desc
= get_src(ctx
, instr
->src
[0]);
2164 return get_buffer_size(ctx
, desc
, false);
2166 static void visit_store_ssbo(struct nir_to_llvm_context
*ctx
,
2167 nir_intrinsic_instr
*instr
)
2169 const char *store_name
;
2170 LLVMValueRef src_data
= get_src(ctx
, instr
->src
[0]);
2171 LLVMTypeRef data_type
= ctx
->f32
;
2172 int elem_size_mult
= get_elem_bits(ctx
, LLVMTypeOf(src_data
)) / 32;
2173 int components_32bit
= elem_size_mult
* instr
->num_components
;
2174 unsigned writemask
= nir_intrinsic_write_mask(instr
);
2175 LLVMValueRef base_data
, base_offset
;
2176 LLVMValueRef params
[6];
2178 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2179 ctx
->shader_info
->fs
.writes_memory
= true;
2181 params
[1] = get_src(ctx
, instr
->src
[1]);
2182 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
2183 params
[4] = ctx
->i1false
; /* glc */
2184 params
[5] = ctx
->i1false
; /* slc */
2186 if (components_32bit
> 1)
2187 data_type
= LLVMVectorType(ctx
->f32
, components_32bit
);
2189 base_data
= to_float(ctx
, src_data
);
2190 base_data
= trim_vector(ctx
, base_data
, instr
->num_components
);
2191 base_data
= LLVMBuildBitCast(ctx
->builder
, base_data
,
2193 base_offset
= get_src(ctx
, instr
->src
[2]); /* voffset */
2197 LLVMValueRef offset
;
2199 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
2201 /* Due to an LLVM limitation, split 3-element writes
2202 * into a 2-element and a 1-element write. */
2204 writemask
|= 1 << (start
+ 2);
2208 start
*= elem_size_mult
;
2209 count
*= elem_size_mult
;
2212 writemask
|= ((1u << (count
- 4)) - 1u) << (start
+ 4);
2217 store_name
= "llvm.amdgcn.buffer.store.v4f32";
2219 } else if (count
== 2) {
2220 tmp
= LLVMBuildExtractElement(ctx
->builder
,
2221 base_data
, LLVMConstInt(ctx
->i32
, start
, false), "");
2222 data
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), tmp
,
2225 tmp
= LLVMBuildExtractElement(ctx
->builder
,
2226 base_data
, LLVMConstInt(ctx
->i32
, start
+ 1, false), "");
2227 data
= LLVMBuildInsertElement(ctx
->builder
, data
, tmp
,
2229 store_name
= "llvm.amdgcn.buffer.store.v2f32";
2233 if (get_llvm_num_components(base_data
) > 1)
2234 data
= LLVMBuildExtractElement(ctx
->builder
, base_data
,
2235 LLVMConstInt(ctx
->i32
, start
, false), "");
2238 store_name
= "llvm.amdgcn.buffer.store.f32";
2241 offset
= base_offset
;
2243 offset
= LLVMBuildAdd(ctx
->builder
, offset
, LLVMConstInt(ctx
->i32
, start
* 4, false), "");
2247 ac_build_intrinsic(&ctx
->ac
, store_name
,
2248 ctx
->voidt
, params
, 6, 0);
2252 static LLVMValueRef
visit_atomic_ssbo(struct nir_to_llvm_context
*ctx
,
2253 const nir_intrinsic_instr
*instr
)
2256 LLVMValueRef params
[6];
2258 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2259 ctx
->shader_info
->fs
.writes_memory
= true;
2261 if (instr
->intrinsic
== nir_intrinsic_ssbo_atomic_comp_swap
) {
2262 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[3]), 0);
2264 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[2]), 0);
2265 params
[arg_count
++] = get_src(ctx
, instr
->src
[0]);
2266 params
[arg_count
++] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
2267 params
[arg_count
++] = get_src(ctx
, instr
->src
[1]); /* voffset */
2268 params
[arg_count
++] = ctx
->i1false
; /* slc */
2270 switch (instr
->intrinsic
) {
2271 case nir_intrinsic_ssbo_atomic_add
:
2272 name
= "llvm.amdgcn.buffer.atomic.add";
2274 case nir_intrinsic_ssbo_atomic_imin
:
2275 name
= "llvm.amdgcn.buffer.atomic.smin";
2277 case nir_intrinsic_ssbo_atomic_umin
:
2278 name
= "llvm.amdgcn.buffer.atomic.umin";
2280 case nir_intrinsic_ssbo_atomic_imax
:
2281 name
= "llvm.amdgcn.buffer.atomic.smax";
2283 case nir_intrinsic_ssbo_atomic_umax
:
2284 name
= "llvm.amdgcn.buffer.atomic.umax";
2286 case nir_intrinsic_ssbo_atomic_and
:
2287 name
= "llvm.amdgcn.buffer.atomic.and";
2289 case nir_intrinsic_ssbo_atomic_or
:
2290 name
= "llvm.amdgcn.buffer.atomic.or";
2292 case nir_intrinsic_ssbo_atomic_xor
:
2293 name
= "llvm.amdgcn.buffer.atomic.xor";
2295 case nir_intrinsic_ssbo_atomic_exchange
:
2296 name
= "llvm.amdgcn.buffer.atomic.swap";
2298 case nir_intrinsic_ssbo_atomic_comp_swap
:
2299 name
= "llvm.amdgcn.buffer.atomic.cmpswap";
2305 return ac_build_intrinsic(&ctx
->ac
, name
, ctx
->i32
, params
, arg_count
, 0);
2308 static LLVMValueRef
visit_load_buffer(struct nir_to_llvm_context
*ctx
,
2309 const nir_intrinsic_instr
*instr
)
2311 LLVMValueRef results
[2];
2312 int load_components
;
2313 int num_components
= instr
->num_components
;
2314 if (instr
->dest
.ssa
.bit_size
== 64)
2315 num_components
*= 2;
2317 for (int i
= 0; i
< num_components
; i
+= load_components
) {
2318 load_components
= MIN2(num_components
- i
, 4);
2319 const char *load_name
;
2320 LLVMTypeRef data_type
= ctx
->f32
;
2321 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, i
* 4, false);
2322 offset
= LLVMBuildAdd(ctx
->builder
, get_src(ctx
, instr
->src
[1]), offset
, "");
2324 if (load_components
== 3)
2325 data_type
= LLVMVectorType(ctx
->f32
, 4);
2326 else if (load_components
> 1)
2327 data_type
= LLVMVectorType(ctx
->f32
, load_components
);
2329 if (load_components
>= 3)
2330 load_name
= "llvm.amdgcn.buffer.load.v4f32";
2331 else if (load_components
== 2)
2332 load_name
= "llvm.amdgcn.buffer.load.v2f32";
2333 else if (load_components
== 1)
2334 load_name
= "llvm.amdgcn.buffer.load.f32";
2336 unreachable("unhandled number of components");
2338 LLVMValueRef params
[] = {
2339 get_src(ctx
, instr
->src
[0]),
2340 LLVMConstInt(ctx
->i32
, 0, false),
2346 results
[i
] = ac_build_intrinsic(&ctx
->ac
, load_name
, data_type
, params
, 5, 0);
2350 LLVMValueRef ret
= results
[0];
2351 if (num_components
> 4 || num_components
== 3) {
2352 LLVMValueRef masks
[] = {
2353 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
2354 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false),
2355 LLVMConstInt(ctx
->i32
, 4, false), LLVMConstInt(ctx
->i32
, 5, false),
2356 LLVMConstInt(ctx
->i32
, 6, false), LLVMConstInt(ctx
->i32
, 7, false)
2359 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
2360 ret
= LLVMBuildShuffleVector(ctx
->builder
, results
[0],
2361 results
[num_components
> 4 ? 1 : 0], swizzle
, "");
2364 return LLVMBuildBitCast(ctx
->builder
, ret
,
2365 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2368 static LLVMValueRef
visit_load_ubo_buffer(struct nir_to_llvm_context
*ctx
,
2369 const nir_intrinsic_instr
*instr
)
2371 LLVMValueRef results
[8], ret
;
2372 LLVMValueRef rsrc
= get_src(ctx
, instr
->src
[0]);
2373 LLVMValueRef offset
= get_src(ctx
, instr
->src
[1]);
2374 int num_components
= instr
->num_components
;
2376 rsrc
= LLVMBuildBitCast(ctx
->builder
, rsrc
, LLVMVectorType(ctx
->i8
, 16), "");
2378 if (instr
->dest
.ssa
.bit_size
== 64)
2379 num_components
*= 2;
2381 for (unsigned i
= 0; i
< num_components
; ++i
) {
2382 LLVMValueRef params
[] = {
2384 LLVMBuildAdd(ctx
->builder
, LLVMConstInt(ctx
->i32
, 4 * i
, 0),
2387 results
[i
] = ac_build_intrinsic(&ctx
->ac
, "llvm.SI.load.const", ctx
->f32
,
2389 AC_FUNC_ATTR_READNONE
|
2390 AC_FUNC_ATTR_LEGACY
);
2394 ret
= ac_build_gather_values(&ctx
->ac
, results
, instr
->num_components
);
2395 return LLVMBuildBitCast(ctx
->builder
, ret
,
2396 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2400 radv_get_deref_offset(struct nir_to_llvm_context
*ctx
, nir_deref_var
*deref
,
2401 bool vs_in
, unsigned *vertex_index_out
,
2402 LLVMValueRef
*vertex_index_ref
,
2403 unsigned *const_out
, LLVMValueRef
*indir_out
)
2405 unsigned const_offset
= 0;
2406 nir_deref
*tail
= &deref
->deref
;
2407 LLVMValueRef offset
= NULL
;
2409 if (vertex_index_out
!= NULL
|| vertex_index_ref
!= NULL
) {
2411 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2412 if (vertex_index_out
)
2413 *vertex_index_out
= deref_array
->base_offset
;
2415 if (vertex_index_ref
) {
2416 LLVMValueRef vtx
= LLVMConstInt(ctx
->i32
, deref_array
->base_offset
, false);
2417 if (deref_array
->deref_array_type
== nir_deref_array_type_indirect
) {
2418 vtx
= LLVMBuildAdd(ctx
->builder
, vtx
, get_src(ctx
, deref_array
->indirect
), "");
2420 *vertex_index_ref
= vtx
;
2424 if (deref
->var
->data
.compact
) {
2425 assert(tail
->child
->deref_type
== nir_deref_type_array
);
2426 assert(glsl_type_is_scalar(glsl_without_array(deref
->var
->type
)));
2427 nir_deref_array
*deref_array
= nir_deref_as_array(tail
->child
);
2428 /* We always lower indirect dereferences for "compact" array vars. */
2429 assert(deref_array
->deref_array_type
== nir_deref_array_type_direct
);
2431 const_offset
= deref_array
->base_offset
;
2435 while (tail
->child
!= NULL
) {
2436 const struct glsl_type
*parent_type
= tail
->type
;
2439 if (tail
->deref_type
== nir_deref_type_array
) {
2440 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2441 LLVMValueRef index
, stride
, local_offset
;
2442 unsigned size
= glsl_count_attribute_slots(tail
->type
, vs_in
);
2444 const_offset
+= size
* deref_array
->base_offset
;
2445 if (deref_array
->deref_array_type
== nir_deref_array_type_direct
)
2448 assert(deref_array
->deref_array_type
== nir_deref_array_type_indirect
);
2449 index
= get_src(ctx
, deref_array
->indirect
);
2450 stride
= LLVMConstInt(ctx
->i32
, size
, 0);
2451 local_offset
= LLVMBuildMul(ctx
->builder
, stride
, index
, "");
2454 offset
= LLVMBuildAdd(ctx
->builder
, offset
, local_offset
, "");
2456 offset
= local_offset
;
2457 } else if (tail
->deref_type
== nir_deref_type_struct
) {
2458 nir_deref_struct
*deref_struct
= nir_deref_as_struct(tail
);
2460 for (unsigned i
= 0; i
< deref_struct
->index
; i
++) {
2461 const struct glsl_type
*ft
= glsl_get_struct_field(parent_type
, i
);
2462 const_offset
+= glsl_count_attribute_slots(ft
, vs_in
);
2465 unreachable("unsupported deref type");
2469 if (const_offset
&& offset
)
2470 offset
= LLVMBuildAdd(ctx
->builder
, offset
,
2471 LLVMConstInt(ctx
->i32
, const_offset
, 0),
2474 *const_out
= const_offset
;
2475 *indir_out
= offset
;
2479 lds_load(struct nir_to_llvm_context
*ctx
,
2480 LLVMValueRef dw_addr
)
2483 value
= ac_build_indexed_load(&ctx
->ac
, ctx
->lds
, dw_addr
, false);
2488 lds_store(struct nir_to_llvm_context
*ctx
,
2489 LLVMValueRef dw_addr
, LLVMValueRef value
)
2491 value
= LLVMBuildBitCast(ctx
->builder
, value
, ctx
->i32
, "");
2492 ac_build_indexed_store(&ctx
->ac
, ctx
->lds
,
2496 /* The offchip buffer layout for TCS->TES is
2498 * - attribute 0 of patch 0 vertex 0
2499 * - attribute 0 of patch 0 vertex 1
2500 * - attribute 0 of patch 0 vertex 2
2502 * - attribute 0 of patch 1 vertex 0
2503 * - attribute 0 of patch 1 vertex 1
2505 * - attribute 1 of patch 0 vertex 0
2506 * - attribute 1 of patch 0 vertex 1
2508 * - per patch attribute 0 of patch 0
2509 * - per patch attribute 0 of patch 1
2512 * Note that every attribute has 4 components.
2514 static LLVMValueRef
get_tcs_tes_buffer_address(struct nir_to_llvm_context
*ctx
,
2515 LLVMValueRef vertex_index
,
2516 LLVMValueRef param_index
)
2518 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
2519 LLVMValueRef param_stride
, constant16
;
2520 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
2522 vertices_per_patch
= unpack_param(ctx
, ctx
->tcs_offchip_layout
, 9, 6);
2523 num_patches
= unpack_param(ctx
, ctx
->tcs_offchip_layout
, 0, 9);
2524 total_vertices
= LLVMBuildMul(ctx
->builder
, vertices_per_patch
,
2527 constant16
= LLVMConstInt(ctx
->i32
, 16, false);
2529 base_addr
= LLVMBuildMul(ctx
->builder
, rel_patch_id
,
2530 vertices_per_patch
, "");
2532 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2535 param_stride
= total_vertices
;
2537 base_addr
= rel_patch_id
;
2538 param_stride
= num_patches
;
2541 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2542 LLVMBuildMul(ctx
->builder
, param_index
,
2543 param_stride
, ""), "");
2545 base_addr
= LLVMBuildMul(ctx
->builder
, base_addr
, constant16
, "");
2547 if (!vertex_index
) {
2548 LLVMValueRef patch_data_offset
=
2549 unpack_param(ctx
, ctx
->tcs_offchip_layout
, 16, 16);
2551 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2552 patch_data_offset
, "");
2557 static LLVMValueRef
get_tcs_tes_buffer_address_params(struct nir_to_llvm_context
*ctx
,
2559 unsigned const_index
,
2561 LLVMValueRef vertex_index
,
2562 LLVMValueRef indir_index
)
2564 LLVMValueRef param_index
;
2567 param_index
= LLVMBuildAdd(ctx
->builder
, LLVMConstInt(ctx
->i32
, param
, false),
2570 if (const_index
&& !is_compact
)
2571 param
+= const_index
;
2572 param_index
= LLVMConstInt(ctx
->i32
, param
, false);
2574 return get_tcs_tes_buffer_address(ctx
, vertex_index
, param_index
);
2578 mark_tess_output(struct nir_to_llvm_context
*ctx
,
2579 bool is_patch
, uint32_t param
)
2583 ctx
->tess_patch_outputs_written
|= (1ull << param
);
2585 ctx
->tess_outputs_written
|= (1ull << param
);
2589 get_dw_address(struct nir_to_llvm_context
*ctx
,
2590 LLVMValueRef dw_addr
,
2592 unsigned const_index
,
2593 bool compact_const_index
,
2594 LLVMValueRef vertex_index
,
2595 LLVMValueRef stride
,
2596 LLVMValueRef indir_index
)
2601 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2602 LLVMBuildMul(ctx
->builder
,
2608 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2609 LLVMBuildMul(ctx
->builder
, indir_index
,
2610 LLVMConstInt(ctx
->i32
, 4, false), ""), "");
2611 else if (const_index
&& !compact_const_index
)
2612 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2613 LLVMConstInt(ctx
->i32
, const_index
, false), "");
2615 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2616 LLVMConstInt(ctx
->i32
, param
* 4, false), "");
2618 if (const_index
&& compact_const_index
)
2619 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2620 LLVMConstInt(ctx
->i32
, const_index
, false), "");
2625 load_tcs_input(struct nir_to_llvm_context
*ctx
,
2626 nir_intrinsic_instr
*instr
)
2628 LLVMValueRef dw_addr
, stride
;
2629 unsigned const_index
;
2630 LLVMValueRef vertex_index
;
2631 LLVMValueRef indir_index
;
2633 LLVMValueRef value
[4], result
;
2634 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2635 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2636 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2637 radv_get_deref_offset(ctx
, instr
->variables
[0],
2638 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2639 &const_index
, &indir_index
);
2641 stride
= unpack_param(ctx
, ctx
->tcs_in_layout
, 13, 8);
2642 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
2643 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2646 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2647 value
[i
] = lds_load(ctx
, dw_addr
);
2648 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2651 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2652 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2657 load_tcs_output(struct nir_to_llvm_context
*ctx
,
2658 nir_intrinsic_instr
*instr
)
2660 LLVMValueRef dw_addr
, stride
;
2661 LLVMValueRef value
[4], result
;
2662 LLVMValueRef vertex_index
= NULL
;
2663 LLVMValueRef indir_index
= NULL
;
2664 unsigned const_index
= 0;
2666 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2667 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2668 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2669 radv_get_deref_offset(ctx
, instr
->variables
[0],
2670 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2671 &const_index
, &indir_index
);
2673 if (!instr
->variables
[0]->var
->data
.patch
) {
2674 stride
= unpack_param(ctx
, ctx
->tcs_out_layout
, 13, 8);
2675 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
2677 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
2680 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2683 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2684 value
[i
] = lds_load(ctx
, dw_addr
);
2685 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2688 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2689 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2694 store_tcs_output(struct nir_to_llvm_context
*ctx
,
2695 nir_intrinsic_instr
*instr
,
2699 LLVMValueRef stride
, dw_addr
;
2700 LLVMValueRef buf_addr
= NULL
;
2701 LLVMValueRef vertex_index
= NULL
;
2702 LLVMValueRef indir_index
= NULL
;
2703 unsigned const_index
= 0;
2705 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2706 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2708 radv_get_deref_offset(ctx
, instr
->variables
[0],
2709 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2710 &const_index
, &indir_index
);
2712 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2713 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CLIP_DIST0
&&
2714 is_compact
&& const_index
> 3) {
2719 if (!instr
->variables
[0]->var
->data
.patch
) {
2720 stride
= unpack_param(ctx
, ctx
->tcs_out_layout
, 13, 8);
2721 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
2723 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
2726 mark_tess_output(ctx
, instr
->variables
[0]->var
->data
.patch
, param
);
2728 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2730 buf_addr
= get_tcs_tes_buffer_address_params(ctx
, param
, const_index
, is_compact
,
2731 vertex_index
, indir_index
);
2733 unsigned base
= is_compact
? const_index
: 0;
2734 for (unsigned chan
= 0; chan
< 8; chan
++) {
2735 bool is_tess_factor
= false;
2736 if (!(writemask
& (1 << chan
)))
2738 LLVMValueRef value
= llvm_extract_elem(ctx
, src
, chan
);
2740 lds_store(ctx
, dw_addr
, value
);
2742 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_TESS_LEVEL_INNER
||
2743 instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_TESS_LEVEL_OUTER
)
2744 is_tess_factor
= true;
2746 if (!is_tess_factor
&& writemask
!= 0xF)
2747 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, value
, 1,
2748 buf_addr
, ctx
->oc_lds
,
2749 4 * (base
+ chan
), 1, 0, true, false);
2751 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2755 if (writemask
== 0xF) {
2756 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, src
, 4,
2757 buf_addr
, ctx
->oc_lds
,
2758 (base
* 4), 1, 0, true, false);
2763 load_tes_input(struct nir_to_llvm_context
*ctx
,
2764 const nir_intrinsic_instr
*instr
)
2766 LLVMValueRef buf_addr
;
2767 LLVMValueRef result
;
2768 LLVMValueRef vertex_index
= NULL
;
2769 LLVMValueRef indir_index
= NULL
;
2770 unsigned const_index
= 0;
2772 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2773 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2775 radv_get_deref_offset(ctx
, instr
->variables
[0],
2776 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2777 &const_index
, &indir_index
);
2778 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2779 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CLIP_DIST0
&&
2780 is_compact
&& const_index
> 3) {
2784 buf_addr
= get_tcs_tes_buffer_address_params(ctx
, param
, const_index
,
2785 is_compact
, vertex_index
, indir_index
);
2787 result
= ac_build_buffer_load(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, instr
->num_components
, NULL
,
2788 buf_addr
, ctx
->oc_lds
, is_compact
? (4 * const_index
) : 0, 1, 0, true, false);
2789 result
= trim_vector(ctx
, result
, instr
->num_components
);
2790 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2795 load_gs_input(struct nir_to_llvm_context
*ctx
,
2796 nir_intrinsic_instr
*instr
)
2798 LLVMValueRef indir_index
, vtx_offset
;
2799 unsigned const_index
;
2800 LLVMValueRef args
[9];
2801 unsigned param
, vtx_offset_param
;
2802 LLVMValueRef value
[4], result
;
2803 unsigned vertex_index
;
2804 radv_get_deref_offset(ctx
, instr
->variables
[0],
2805 false, &vertex_index
, NULL
,
2806 &const_index
, &indir_index
);
2807 vtx_offset_param
= vertex_index
;
2808 assert(vtx_offset_param
< 6);
2809 vtx_offset
= LLVMBuildMul(ctx
->builder
, ctx
->gs_vtx_offset
[vtx_offset_param
],
2810 LLVMConstInt(ctx
->i32
, 4, false), "");
2812 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2813 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2815 args
[0] = ctx
->esgs_ring
;
2816 args
[1] = vtx_offset
;
2817 args
[2] = LLVMConstInt(ctx
->i32
, (param
* 4 + i
+ const_index
) * 256, false);
2818 args
[3] = ctx
->i32zero
;
2819 args
[4] = ctx
->i32one
; /* OFFEN */
2820 args
[5] = ctx
->i32zero
; /* IDXEN */
2821 args
[6] = ctx
->i32one
; /* GLC */
2822 args
[7] = ctx
->i32zero
; /* SLC */
2823 args
[8] = ctx
->i32zero
; /* TFE */
2825 value
[i
] = ac_build_intrinsic(&ctx
->ac
, "llvm.SI.buffer.load.dword.i32.i32",
2827 AC_FUNC_ATTR_READONLY
|
2828 AC_FUNC_ATTR_LEGACY
);
2830 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2835 static LLVMValueRef
visit_load_var(struct nir_to_llvm_context
*ctx
,
2836 nir_intrinsic_instr
*instr
)
2838 LLVMValueRef values
[8];
2839 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2840 int ve
= instr
->dest
.ssa
.num_components
;
2841 LLVMValueRef indir_index
;
2843 unsigned const_index
;
2844 bool vs_in
= ctx
->stage
== MESA_SHADER_VERTEX
&&
2845 instr
->variables
[0]->var
->data
.mode
== nir_var_shader_in
;
2846 radv_get_deref_offset(ctx
, instr
->variables
[0], vs_in
, NULL
, NULL
,
2847 &const_index
, &indir_index
);
2849 if (instr
->dest
.ssa
.bit_size
== 64)
2852 switch (instr
->variables
[0]->var
->data
.mode
) {
2853 case nir_var_shader_in
:
2854 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
2855 return load_tcs_input(ctx
, instr
);
2856 if (ctx
->stage
== MESA_SHADER_TESS_EVAL
)
2857 return load_tes_input(ctx
, instr
);
2858 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
2859 return load_gs_input(ctx
, instr
);
2861 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2863 unsigned count
= glsl_count_attribute_slots(
2864 instr
->variables
[0]->var
->type
,
2865 ctx
->stage
== MESA_SHADER_VERTEX
);
2867 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2868 &ctx
->ac
, ctx
->inputs
+ idx
+ chan
, count
,
2871 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2875 values
[chan
] = ctx
->inputs
[idx
+ chan
+ const_index
* 4];
2879 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2881 unsigned count
= glsl_count_attribute_slots(
2882 instr
->variables
[0]->var
->type
, false);
2884 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2885 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
2888 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2892 values
[chan
] = LLVMBuildLoad(ctx
->builder
, ctx
->locals
[idx
+ chan
+ const_index
* 4], "");
2896 case nir_var_shader_out
:
2897 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
2898 return load_tcs_output(ctx
, instr
);
2899 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2901 unsigned count
= glsl_count_attribute_slots(
2902 instr
->variables
[0]->var
->type
, false);
2904 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2905 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2908 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2912 values
[chan
] = LLVMBuildLoad(ctx
->builder
,
2913 ctx
->outputs
[idx
+ chan
+ const_index
* 4],
2918 case nir_var_shared
: {
2919 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2920 LLVMValueRef derived_ptr
;
2923 indir_index
= LLVMBuildMul(ctx
->builder
, indir_index
, LLVMConstInt(ctx
->i32
, 4, false), "");
2925 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2926 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
2928 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
2929 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
2931 values
[chan
] = LLVMBuildLoad(ctx
->builder
, derived_ptr
, "");
2936 unreachable("unhandle variable mode");
2938 ret
= ac_build_gather_values(&ctx
->ac
, values
, ve
);
2939 return LLVMBuildBitCast(ctx
->builder
, ret
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2943 visit_store_var(struct nir_to_llvm_context
*ctx
,
2944 nir_intrinsic_instr
*instr
)
2946 LLVMValueRef temp_ptr
, value
;
2947 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2948 LLVMValueRef src
= to_float(ctx
, get_src(ctx
, instr
->src
[0]));
2949 int writemask
= instr
->const_index
[0];
2950 LLVMValueRef indir_index
;
2951 unsigned const_index
;
2952 radv_get_deref_offset(ctx
, instr
->variables
[0], false,
2953 NULL
, NULL
, &const_index
, &indir_index
);
2955 if (get_elem_bits(ctx
, LLVMTypeOf(src
)) == 64) {
2956 int old_writemask
= writemask
;
2958 src
= LLVMBuildBitCast(ctx
->builder
, src
,
2959 LLVMVectorType(ctx
->f32
, get_llvm_num_components(src
) * 2),
2963 for (unsigned chan
= 0; chan
< 4; chan
++) {
2964 if (old_writemask
& (1 << chan
))
2965 writemask
|= 3u << (2 * chan
);
2969 switch (instr
->variables
[0]->var
->data
.mode
) {
2970 case nir_var_shader_out
:
2972 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
2973 store_tcs_output(ctx
, instr
, src
, writemask
);
2977 for (unsigned chan
= 0; chan
< 8; chan
++) {
2979 if (!(writemask
& (1 << chan
)))
2982 value
= llvm_extract_elem(ctx
, src
, chan
);
2984 if (instr
->variables
[0]->var
->data
.compact
)
2987 unsigned count
= glsl_count_attribute_slots(
2988 instr
->variables
[0]->var
->type
, false);
2990 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2991 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2994 if (get_llvm_num_components(tmp_vec
) > 1) {
2995 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
2996 value
, indir_index
, "");
2999 build_store_values_extended(ctx
, ctx
->outputs
+ idx
+ chan
,
3000 count
, stride
, tmp_vec
);
3003 temp_ptr
= ctx
->outputs
[idx
+ chan
+ const_index
* stride
];
3005 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
3010 for (unsigned chan
= 0; chan
< 8; chan
++) {
3011 if (!(writemask
& (1 << chan
)))
3014 value
= llvm_extract_elem(ctx
, src
, chan
);
3016 unsigned count
= glsl_count_attribute_slots(
3017 instr
->variables
[0]->var
->type
, false);
3019 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
3020 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
3023 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
3024 value
, indir_index
, "");
3025 build_store_values_extended(ctx
, ctx
->locals
+ idx
+ chan
,
3028 temp_ptr
= ctx
->locals
[idx
+ chan
+ const_index
* 4];
3030 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
3034 case nir_var_shared
: {
3035 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
3038 indir_index
= LLVMBuildMul(ctx
->builder
, indir_index
, LLVMConstInt(ctx
->i32
, 4, false), "");
3040 for (unsigned chan
= 0; chan
< 8; chan
++) {
3041 if (!(writemask
& (1 << chan
)))
3043 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
3044 LLVMValueRef derived_ptr
;
3047 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
3049 value
= llvm_extract_elem(ctx
, src
, chan
);
3050 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
3051 LLVMBuildStore(ctx
->builder
,
3052 to_integer(ctx
, value
), derived_ptr
);
3061 static int image_type_to_components_count(enum glsl_sampler_dim dim
, bool array
)
3064 case GLSL_SAMPLER_DIM_BUF
:
3066 case GLSL_SAMPLER_DIM_1D
:
3067 return array
? 2 : 1;
3068 case GLSL_SAMPLER_DIM_2D
:
3069 return array
? 3 : 2;
3070 case GLSL_SAMPLER_DIM_MS
:
3071 return array
? 4 : 3;
3072 case GLSL_SAMPLER_DIM_3D
:
3073 case GLSL_SAMPLER_DIM_CUBE
:
3075 case GLSL_SAMPLER_DIM_RECT
:
3076 case GLSL_SAMPLER_DIM_SUBPASS
:
3078 case GLSL_SAMPLER_DIM_SUBPASS_MS
:
3088 /* Adjust the sample index according to FMASK.
3090 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3091 * which is the identity mapping. Each nibble says which physical sample
3092 * should be fetched to get that sample.
3094 * For example, 0x11111100 means there are only 2 samples stored and
3095 * the second sample covers 3/4 of the pixel. When reading samples 0
3096 * and 1, return physical sample 0 (determined by the first two 0s
3097 * in FMASK), otherwise return physical sample 1.
3099 * The sample index should be adjusted as follows:
3100 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
3102 static LLVMValueRef
adjust_sample_index_using_fmask(struct nir_to_llvm_context
*ctx
,
3103 LLVMValueRef coord_x
, LLVMValueRef coord_y
,
3104 LLVMValueRef coord_z
,
3105 LLVMValueRef sample_index
,
3106 LLVMValueRef fmask_desc_ptr
)
3108 LLVMValueRef fmask_load_address
[4];
3111 fmask_load_address
[0] = coord_x
;
3112 fmask_load_address
[1] = coord_y
;
3114 fmask_load_address
[2] = coord_z
;
3115 fmask_load_address
[3] = LLVMGetUndef(ctx
->i32
);
3118 struct ac_image_args args
= {0};
3120 args
.opcode
= ac_image_load
;
3121 args
.da
= coord_z
? true : false;
3122 args
.resource
= fmask_desc_ptr
;
3124 args
.addr
= ac_build_gather_values(&ctx
->ac
, fmask_load_address
, coord_z
? 4 : 2);
3126 res
= ac_build_image_opcode(&ctx
->ac
, &args
);
3128 res
= to_integer(ctx
, res
);
3129 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, false);
3130 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xf, false);
3132 LLVMValueRef fmask
= LLVMBuildExtractElement(ctx
->builder
,
3136 LLVMValueRef sample_index4
=
3137 LLVMBuildMul(ctx
->builder
, sample_index
, four
, "");
3138 LLVMValueRef shifted_fmask
=
3139 LLVMBuildLShr(ctx
->builder
, fmask
, sample_index4
, "");
3140 LLVMValueRef final_sample
=
3141 LLVMBuildAnd(ctx
->builder
, shifted_fmask
, F
, "");
3143 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3144 * resource descriptor is 0 (invalid),
3146 LLVMValueRef fmask_desc
=
3147 LLVMBuildBitCast(ctx
->builder
, fmask_desc_ptr
,
3150 LLVMValueRef fmask_word1
=
3151 LLVMBuildExtractElement(ctx
->builder
, fmask_desc
,
3154 LLVMValueRef word1_is_nonzero
=
3155 LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
3156 fmask_word1
, ctx
->i32zero
, "");
3158 /* Replace the MSAA sample index. */
3160 LLVMBuildSelect(ctx
->builder
, word1_is_nonzero
,
3161 final_sample
, sample_index
, "");
3162 return sample_index
;
3165 static LLVMValueRef
get_image_coords(struct nir_to_llvm_context
*ctx
,
3166 const nir_intrinsic_instr
*instr
)
3168 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
3169 if(instr
->variables
[0]->deref
.child
)
3170 type
= instr
->variables
[0]->deref
.child
->type
;
3172 LLVMValueRef src0
= get_src(ctx
, instr
->src
[0]);
3173 LLVMValueRef coords
[4];
3174 LLVMValueRef masks
[] = {
3175 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
3176 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false),
3179 LLVMValueRef sample_index
= llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[1]), 0);
3182 enum glsl_sampler_dim dim
= glsl_get_sampler_dim(type
);
3183 bool add_frag_pos
= (dim
== GLSL_SAMPLER_DIM_SUBPASS
||
3184 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
3185 bool is_ms
= (dim
== GLSL_SAMPLER_DIM_MS
||
3186 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
3188 count
= image_type_to_components_count(dim
,
3189 glsl_sampler_type_is_array(type
));
3192 LLVMValueRef fmask_load_address
[3];
3195 fmask_load_address
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[0], "");
3196 fmask_load_address
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[1], "");
3197 if (glsl_sampler_type_is_array(type
))
3198 fmask_load_address
[2] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[2], "");
3200 fmask_load_address
[2] = NULL
;
3202 for (chan
= 0; chan
< 2; ++chan
)
3203 fmask_load_address
[chan
] = LLVMBuildAdd(ctx
->builder
, fmask_load_address
[chan
], LLVMBuildFPToUI(ctx
->builder
, ctx
->frag_pos
[chan
], ctx
->i32
, ""), "");
3205 sample_index
= adjust_sample_index_using_fmask(ctx
,
3206 fmask_load_address
[0],
3207 fmask_load_address
[1],
3208 fmask_load_address
[2],
3210 get_sampler_desc(ctx
, instr
->variables
[0], DESC_FMASK
));
3213 if (instr
->src
[0].ssa
->num_components
)
3214 res
= LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[0], "");
3221 for (chan
= 0; chan
< count
; ++chan
) {
3222 coords
[chan
] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[chan
], "");
3226 for (chan
= 0; chan
< count
; ++chan
)
3227 coords
[chan
] = LLVMBuildAdd(ctx
->builder
, coords
[chan
], LLVMBuildFPToUI(ctx
->builder
, ctx
->frag_pos
[chan
], ctx
->i32
, ""), "");
3230 coords
[count
] = sample_index
;
3235 coords
[3] = LLVMGetUndef(ctx
->i32
);
3238 res
= ac_build_gather_values(&ctx
->ac
, coords
, count
);
3243 static LLVMValueRef
visit_image_load(struct nir_to_llvm_context
*ctx
,
3244 const nir_intrinsic_instr
*instr
)
3246 LLVMValueRef params
[7];
3248 char intrinsic_name
[64];
3249 const nir_variable
*var
= instr
->variables
[0]->var
;
3250 const struct glsl_type
*type
= var
->type
;
3251 if(instr
->variables
[0]->deref
.child
)
3252 type
= instr
->variables
[0]->deref
.child
->type
;
3254 type
= glsl_without_array(type
);
3255 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3256 params
[0] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
3257 params
[1] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
3258 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
3259 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
3260 params
[3] = ctx
->i1false
; /* glc */
3261 params
[4] = ctx
->i1false
; /* slc */
3262 res
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.load.format.v4f32", ctx
->v4f32
,
3265 res
= trim_vector(ctx
, res
, instr
->dest
.ssa
.num_components
);
3266 res
= to_integer(ctx
, res
);
3268 bool is_da
= glsl_sampler_type_is_array(type
) ||
3269 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3270 LLVMValueRef da
= is_da
? ctx
->i1true
: ctx
->i1false
;
3271 LLVMValueRef glc
= ctx
->i1false
;
3272 LLVMValueRef slc
= ctx
->i1false
;
3274 params
[0] = get_image_coords(ctx
, instr
);
3275 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3276 params
[2] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
3277 if (HAVE_LLVM
<= 0x0309) {
3278 params
[3] = ctx
->i1false
; /* r128 */
3283 LLVMValueRef lwe
= ctx
->i1false
;
3290 ac_get_image_intr_name("llvm.amdgcn.image.load",
3291 ctx
->v4f32
, /* vdata */
3292 LLVMTypeOf(params
[0]), /* coords */
3293 LLVMTypeOf(params
[1]), /* rsrc */
3294 intrinsic_name
, sizeof(intrinsic_name
));
3296 res
= ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->v4f32
,
3297 params
, 7, AC_FUNC_ATTR_READONLY
);
3299 return to_integer(ctx
, res
);
3302 static void visit_image_store(struct nir_to_llvm_context
*ctx
,
3303 nir_intrinsic_instr
*instr
)
3305 LLVMValueRef params
[8];
3306 char intrinsic_name
[64];
3307 const nir_variable
*var
= instr
->variables
[0]->var
;
3308 const struct glsl_type
*type
= glsl_without_array(var
->type
);
3310 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
3311 ctx
->shader_info
->fs
.writes_memory
= true;
3313 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3314 params
[0] = to_float(ctx
, get_src(ctx
, instr
->src
[2])); /* data */
3315 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
3316 params
[2] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
3317 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
3318 params
[3] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
3319 params
[4] = ctx
->i1false
; /* glc */
3320 params
[5] = ctx
->i1false
; /* slc */
3321 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.store.format.v4f32", ctx
->voidt
,
3324 bool is_da
= glsl_sampler_type_is_array(type
) ||
3325 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3326 LLVMValueRef da
= is_da
? ctx
->i1true
: ctx
->i1false
;
3327 LLVMValueRef glc
= ctx
->i1false
;
3328 LLVMValueRef slc
= ctx
->i1false
;
3330 params
[0] = to_float(ctx
, get_src(ctx
, instr
->src
[2]));
3331 params
[1] = get_image_coords(ctx
, instr
); /* coords */
3332 params
[2] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3333 params
[3] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
3334 if (HAVE_LLVM
<= 0x0309) {
3335 params
[4] = ctx
->i1false
; /* r128 */
3340 LLVMValueRef lwe
= ctx
->i1false
;
3347 ac_get_image_intr_name("llvm.amdgcn.image.store",
3348 LLVMTypeOf(params
[0]), /* vdata */
3349 LLVMTypeOf(params
[1]), /* coords */
3350 LLVMTypeOf(params
[2]), /* rsrc */
3351 intrinsic_name
, sizeof(intrinsic_name
));
3353 ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->voidt
,
3359 static LLVMValueRef
visit_image_atomic(struct nir_to_llvm_context
*ctx
,
3360 const nir_intrinsic_instr
*instr
)
3362 LLVMValueRef params
[6];
3363 int param_count
= 0;
3364 const nir_variable
*var
= instr
->variables
[0]->var
;
3366 const char *base_name
= "llvm.amdgcn.image.atomic";
3367 const char *atomic_name
;
3368 LLVMValueRef coords
;
3369 char intrinsic_name
[32], coords_type
[8];
3370 const struct glsl_type
*type
= glsl_without_array(var
->type
);
3372 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
3373 ctx
->shader_info
->fs
.writes_memory
= true;
3375 params
[param_count
++] = get_src(ctx
, instr
->src
[2]);
3376 if (instr
->intrinsic
== nir_intrinsic_image_atomic_comp_swap
)
3377 params
[param_count
++] = get_src(ctx
, instr
->src
[3]);
3379 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3380 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
3381 coords
= params
[param_count
++] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
3382 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
3383 params
[param_count
++] = ctx
->i32zero
; /* voffset */
3384 params
[param_count
++] = ctx
->i1false
; /* glc */
3385 params
[param_count
++] = ctx
->i1false
; /* slc */
3387 bool da
= glsl_sampler_type_is_array(type
) ||
3388 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3390 coords
= params
[param_count
++] = get_image_coords(ctx
, instr
);
3391 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3392 params
[param_count
++] = ctx
->i1false
; /* r128 */
3393 params
[param_count
++] = da
? ctx
->i1true
: ctx
->i1false
; /* da */
3394 params
[param_count
++] = ctx
->i1false
; /* slc */
3397 switch (instr
->intrinsic
) {
3398 case nir_intrinsic_image_atomic_add
:
3399 atomic_name
= "add";
3401 case nir_intrinsic_image_atomic_min
:
3402 atomic_name
= "smin";
3404 case nir_intrinsic_image_atomic_max
:
3405 atomic_name
= "smax";
3407 case nir_intrinsic_image_atomic_and
:
3408 atomic_name
= "and";
3410 case nir_intrinsic_image_atomic_or
:
3413 case nir_intrinsic_image_atomic_xor
:
3414 atomic_name
= "xor";
3416 case nir_intrinsic_image_atomic_exchange
:
3417 atomic_name
= "swap";
3419 case nir_intrinsic_image_atomic_comp_swap
:
3420 atomic_name
= "cmpswap";
3425 build_int_type_name(LLVMTypeOf(coords
),
3426 coords_type
, sizeof(coords_type
));
3428 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
3429 "%s.%s.%s", base_name
, atomic_name
, coords_type
);
3430 return ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->i32
, params
, param_count
, 0);
3433 static LLVMValueRef
visit_image_size(struct nir_to_llvm_context
*ctx
,
3434 const nir_intrinsic_instr
*instr
)
3437 const nir_variable
*var
= instr
->variables
[0]->var
;
3438 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
3439 bool da
= glsl_sampler_type_is_array(var
->type
) ||
3440 glsl_get_sampler_dim(var
->type
) == GLSL_SAMPLER_DIM_CUBE
;
3441 if(instr
->variables
[0]->deref
.child
)
3442 type
= instr
->variables
[0]->deref
.child
->type
;
3444 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
)
3445 return get_buffer_size(ctx
, get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
), true);
3447 struct ac_image_args args
= { 0 };
3451 args
.resource
= get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3452 args
.opcode
= ac_image_get_resinfo
;
3453 args
.addr
= ctx
->i32zero
;
3455 res
= ac_build_image_opcode(&ctx
->ac
, &args
);
3457 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
&&
3458 glsl_sampler_type_is_array(type
)) {
3459 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
3460 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
3461 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, res
, two
, "");
3462 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
3463 res
= LLVMBuildInsertElement(ctx
->builder
, res
, z
, two
, "");
3468 #define NOOP_WAITCNT 0xf7f
3469 #define LGKM_CNT 0x07f
3470 #define VM_CNT 0xf70
3472 static void emit_waitcnt(struct nir_to_llvm_context
*ctx
,
3475 LLVMValueRef args
[1] = {
3476 LLVMConstInt(ctx
->i32
, simm16
, false),
3478 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.waitcnt",
3479 ctx
->voidt
, args
, 1, 0);
3482 static void emit_barrier(struct nir_to_llvm_context
*ctx
)
3484 /* SI only (thanks to a hw bug workaround):
3485 * The real barrier instruction isn’t needed, because an entire patch
3486 * always fits into a single wave.
3488 if (ctx
->options
->chip_class
== SI
&&
3489 ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
3490 emit_waitcnt(ctx
, LGKM_CNT
& VM_CNT
);
3493 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.barrier",
3494 ctx
->voidt
, NULL
, 0, AC_FUNC_ATTR_CONVERGENT
);
3497 static void emit_discard_if(struct nir_to_llvm_context
*ctx
,
3498 const nir_intrinsic_instr
*instr
)
3501 ctx
->shader_info
->fs
.can_discard
= true;
3503 cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
3504 get_src(ctx
, instr
->src
[0]),
3507 cond
= LLVMBuildSelect(ctx
->builder
, cond
,
3508 LLVMConstReal(ctx
->f32
, -1.0f
),
3510 ac_build_kill(&ctx
->ac
, cond
);
3514 visit_load_local_invocation_index(struct nir_to_llvm_context
*ctx
)
3516 LLVMValueRef result
;
3517 LLVMValueRef thread_id
= ac_get_thread_id(&ctx
->ac
);
3518 result
= LLVMBuildAnd(ctx
->builder
, ctx
->tg_size
,
3519 LLVMConstInt(ctx
->i32
, 0xfc0, false), "");
3521 return LLVMBuildAdd(ctx
->builder
, result
, thread_id
, "");
3524 static LLVMValueRef
visit_var_atomic(struct nir_to_llvm_context
*ctx
,
3525 const nir_intrinsic_instr
*instr
)
3527 LLVMValueRef ptr
, result
;
3528 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
3529 LLVMValueRef src
= get_src(ctx
, instr
->src
[0]);
3530 ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
3532 if (instr
->intrinsic
== nir_intrinsic_var_atomic_comp_swap
) {
3533 LLVMValueRef src1
= get_src(ctx
, instr
->src
[1]);
3534 result
= LLVMBuildAtomicCmpXchg(ctx
->builder
,
3536 LLVMAtomicOrderingSequentiallyConsistent
,
3537 LLVMAtomicOrderingSequentiallyConsistent
,
3540 LLVMAtomicRMWBinOp op
;
3541 switch (instr
->intrinsic
) {
3542 case nir_intrinsic_var_atomic_add
:
3543 op
= LLVMAtomicRMWBinOpAdd
;
3545 case nir_intrinsic_var_atomic_umin
:
3546 op
= LLVMAtomicRMWBinOpUMin
;
3548 case nir_intrinsic_var_atomic_umax
:
3549 op
= LLVMAtomicRMWBinOpUMax
;
3551 case nir_intrinsic_var_atomic_imin
:
3552 op
= LLVMAtomicRMWBinOpMin
;
3554 case nir_intrinsic_var_atomic_imax
:
3555 op
= LLVMAtomicRMWBinOpMax
;
3557 case nir_intrinsic_var_atomic_and
:
3558 op
= LLVMAtomicRMWBinOpAnd
;
3560 case nir_intrinsic_var_atomic_or
:
3561 op
= LLVMAtomicRMWBinOpOr
;
3563 case nir_intrinsic_var_atomic_xor
:
3564 op
= LLVMAtomicRMWBinOpXor
;
3566 case nir_intrinsic_var_atomic_exchange
:
3567 op
= LLVMAtomicRMWBinOpXchg
;
3573 result
= LLVMBuildAtomicRMW(ctx
->builder
, op
, ptr
, to_integer(ctx
, src
),
3574 LLVMAtomicOrderingSequentiallyConsistent
,
3580 #define INTERP_CENTER 0
3581 #define INTERP_CENTROID 1
3582 #define INTERP_SAMPLE 2
3584 static LLVMValueRef
lookup_interp_param(struct nir_to_llvm_context
*ctx
,
3585 enum glsl_interp_mode interp
, unsigned location
)
3588 case INTERP_MODE_FLAT
:
3591 case INTERP_MODE_SMOOTH
:
3592 case INTERP_MODE_NONE
:
3593 if (location
== INTERP_CENTER
)
3594 return ctx
->persp_center
;
3595 else if (location
== INTERP_CENTROID
)
3596 return ctx
->persp_centroid
;
3597 else if (location
== INTERP_SAMPLE
)
3598 return ctx
->persp_sample
;
3600 case INTERP_MODE_NOPERSPECTIVE
:
3601 if (location
== INTERP_CENTER
)
3602 return ctx
->linear_center
;
3603 else if (location
== INTERP_CENTROID
)
3604 return ctx
->linear_centroid
;
3605 else if (location
== INTERP_SAMPLE
)
3606 return ctx
->linear_sample
;
3612 static LLVMValueRef
load_sample_position(struct nir_to_llvm_context
*ctx
,
3613 LLVMValueRef sample_id
)
3615 LLVMValueRef result
;
3616 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_PS_SAMPLE_POSITIONS
, false));
3618 ptr
= LLVMBuildBitCast(ctx
->builder
, ptr
,
3619 const_array(ctx
->v2f32
, 64), "");
3621 sample_id
= LLVMBuildAdd(ctx
->builder
, sample_id
, ctx
->sample_pos_offset
, "");
3622 result
= ac_build_indexed_load(&ctx
->ac
, ptr
, sample_id
, false);
3627 static LLVMValueRef
load_sample_pos(struct nir_to_llvm_context
*ctx
)
3629 LLVMValueRef values
[2];
3631 values
[0] = emit_ffract(ctx
, ctx
->frag_pos
[0]);
3632 values
[1] = emit_ffract(ctx
, ctx
->frag_pos
[1]);
3633 return ac_build_gather_values(&ctx
->ac
, values
, 2);
3636 static LLVMValueRef
visit_interp(struct nir_to_llvm_context
*ctx
,
3637 const nir_intrinsic_instr
*instr
)
3639 LLVMValueRef result
[2];
3640 LLVMValueRef interp_param
, attr_number
;
3643 LLVMValueRef src_c0
, src_c1
;
3645 int input_index
= instr
->variables
[0]->var
->data
.location
- VARYING_SLOT_VAR0
;
3646 switch (instr
->intrinsic
) {
3647 case nir_intrinsic_interp_var_at_centroid
:
3648 location
= INTERP_CENTROID
;
3650 case nir_intrinsic_interp_var_at_sample
:
3651 case nir_intrinsic_interp_var_at_offset
:
3652 location
= INTERP_CENTER
;
3653 src0
= get_src(ctx
, instr
->src
[0]);
3659 if (instr
->intrinsic
== nir_intrinsic_interp_var_at_offset
) {
3660 src_c0
= to_float(ctx
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, ""));
3661 src_c1
= to_float(ctx
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, ""));
3662 } else if (instr
->intrinsic
== nir_intrinsic_interp_var_at_sample
) {
3663 LLVMValueRef sample_position
;
3664 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3666 /* fetch sample ID */
3667 sample_position
= load_sample_position(ctx
, src0
);
3669 src_c0
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32zero
, "");
3670 src_c0
= LLVMBuildFSub(ctx
->builder
, src_c0
, halfval
, "");
3671 src_c1
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32one
, "");
3672 src_c1
= LLVMBuildFSub(ctx
->builder
, src_c1
, halfval
, "");
3674 interp_param
= lookup_interp_param(ctx
, instr
->variables
[0]->var
->data
.interpolation
, location
);
3675 attr_number
= LLVMConstInt(ctx
->i32
, input_index
, false);
3677 if (location
== INTERP_SAMPLE
|| location
== INTERP_CENTER
) {
3678 LLVMValueRef ij_out
[2];
3679 LLVMValueRef ddxy_out
= emit_ddxy_interp(ctx
, interp_param
);
3682 * take the I then J parameters, and the DDX/Y for it, and
3683 * calculate the IJ inputs for the interpolator.
3684 * temp1 = ddx * offset/sample.x + I;
3685 * interp_param.I = ddy * offset/sample.y + temp1;
3686 * temp1 = ddx * offset/sample.x + J;
3687 * interp_param.J = ddy * offset/sample.y + temp1;
3689 for (unsigned i
= 0; i
< 2; i
++) {
3690 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, false);
3691 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, false);
3692 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->builder
,
3693 ddxy_out
, ix_ll
, "");
3694 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->builder
,
3695 ddxy_out
, iy_ll
, "");
3696 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->builder
,
3697 interp_param
, ix_ll
, "");
3698 LLVMValueRef temp1
, temp2
;
3700 interp_el
= LLVMBuildBitCast(ctx
->builder
, interp_el
,
3703 temp1
= LLVMBuildFMul(ctx
->builder
, ddx_el
, src_c0
, "");
3704 temp1
= LLVMBuildFAdd(ctx
->builder
, temp1
, interp_el
, "");
3706 temp2
= LLVMBuildFMul(ctx
->builder
, ddy_el
, src_c1
, "");
3707 temp2
= LLVMBuildFAdd(ctx
->builder
, temp2
, temp1
, "");
3709 ij_out
[i
] = LLVMBuildBitCast(ctx
->builder
,
3710 temp2
, ctx
->i32
, "");
3712 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
3716 for (chan
= 0; chan
< 2; chan
++) {
3717 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
3720 interp_param
= LLVMBuildBitCast(ctx
->builder
,
3721 interp_param
, LLVMVectorType(ctx
->f32
, 2), "");
3722 LLVMValueRef i
= LLVMBuildExtractElement(
3723 ctx
->builder
, interp_param
, ctx
->i32zero
, "");
3724 LLVMValueRef j
= LLVMBuildExtractElement(
3725 ctx
->builder
, interp_param
, ctx
->i32one
, "");
3727 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
3728 llvm_chan
, attr_number
,
3729 ctx
->prim_mask
, i
, j
);
3731 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
3732 LLVMConstInt(ctx
->i32
, 2, false),
3733 llvm_chan
, attr_number
,
3737 return ac_build_gather_values(&ctx
->ac
, result
, 2);
3741 visit_emit_vertex(struct nir_to_llvm_context
*ctx
,
3742 const nir_intrinsic_instr
*instr
)
3744 LLVMValueRef gs_next_vertex
;
3745 LLVMValueRef can_emit
, kill
;
3748 assert(instr
->const_index
[0] == 0);
3749 /* Write vertex attribute values to GSVS ring */
3750 gs_next_vertex
= LLVMBuildLoad(ctx
->builder
,
3751 ctx
->gs_next_vertex
,
3754 /* If this thread has already emitted the declared maximum number of
3755 * vertices, kill it: excessive vertex emissions are not supposed to
3756 * have any effect, and GS threads have no externally observable
3757 * effects other than emitting vertices.
3759 can_emit
= LLVMBuildICmp(ctx
->builder
, LLVMIntULT
, gs_next_vertex
,
3760 LLVMConstInt(ctx
->i32
, ctx
->gs_max_out_vertices
, false), "");
3762 kill
= LLVMBuildSelect(ctx
->builder
, can_emit
,
3763 LLVMConstReal(ctx
->f32
, 1.0f
),
3764 LLVMConstReal(ctx
->f32
, -1.0f
), "");
3765 ac_build_kill(&ctx
->ac
, kill
);
3767 /* loop num outputs */
3769 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
3770 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
3775 if (!(ctx
->output_mask
& (1ull << i
)))
3778 if (i
== VARYING_SLOT_CLIP_DIST0
) {
3779 /* pack clip and cull into a single set of slots */
3780 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
3784 for (unsigned j
= 0; j
< length
; j
++) {
3785 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
,
3787 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, (slot
* 4 + j
) * ctx
->gs_max_out_vertices
, false);
3788 voffset
= LLVMBuildAdd(ctx
->builder
, voffset
, gs_next_vertex
, "");
3789 voffset
= LLVMBuildMul(ctx
->builder
, voffset
, LLVMConstInt(ctx
->i32
, 4, false), "");
3791 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
3793 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->gsvs_ring
,
3795 voffset
, ctx
->gs2vs_offset
, 0,
3801 gs_next_vertex
= LLVMBuildAdd(ctx
->builder
, gs_next_vertex
,
3803 LLVMBuildStore(ctx
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
);
3805 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
3809 visit_end_primitive(struct nir_to_llvm_context
*ctx
,
3810 const nir_intrinsic_instr
*instr
)
3812 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
3816 visit_load_tess_coord(struct nir_to_llvm_context
*ctx
,
3817 const nir_intrinsic_instr
*instr
)
3819 LLVMValueRef coord
[4] = {
3826 if (ctx
->tes_primitive_mode
== GL_TRIANGLES
)
3827 coord
[2] = LLVMBuildFSub(ctx
->builder
, ctx
->f32one
,
3828 LLVMBuildFAdd(ctx
->builder
, coord
[0], coord
[1], ""), "");
3830 LLVMValueRef result
= ac_build_gather_values(&ctx
->ac
, coord
, instr
->num_components
);
3831 return LLVMBuildBitCast(ctx
->builder
, result
,
3832 get_def_type(ctx
, &instr
->dest
.ssa
), "");
3835 static void visit_intrinsic(struct nir_to_llvm_context
*ctx
,
3836 nir_intrinsic_instr
*instr
)
3838 LLVMValueRef result
= NULL
;
3840 switch (instr
->intrinsic
) {
3841 case nir_intrinsic_load_work_group_id
: {
3842 result
= ctx
->workgroup_ids
;
3845 case nir_intrinsic_load_base_vertex
: {
3846 result
= ctx
->base_vertex
;
3849 case nir_intrinsic_load_vertex_id_zero_base
: {
3850 result
= ctx
->vertex_id
;
3853 case nir_intrinsic_load_local_invocation_id
: {
3854 result
= ctx
->local_invocation_ids
;
3857 case nir_intrinsic_load_base_instance
:
3858 result
= ctx
->start_instance
;
3860 case nir_intrinsic_load_draw_id
:
3861 result
= ctx
->draw_index
;
3863 case nir_intrinsic_load_invocation_id
:
3864 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
3865 result
= unpack_param(ctx
, ctx
->tcs_rel_ids
, 8, 5);
3867 result
= ctx
->gs_invocation_id
;
3869 case nir_intrinsic_load_primitive_id
:
3870 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
3871 ctx
->shader_info
->gs
.uses_prim_id
= true;
3872 result
= ctx
->gs_prim_id
;
3873 } else if (ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
3874 ctx
->shader_info
->tcs
.uses_prim_id
= true;
3875 result
= ctx
->tcs_patch_id
;
3876 } else if (ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
3877 ctx
->shader_info
->tcs
.uses_prim_id
= true;
3878 result
= ctx
->tes_patch_id
;
3880 fprintf(stderr
, "Unknown primitive id intrinsic: %d", ctx
->stage
);
3882 case nir_intrinsic_load_sample_id
:
3883 ctx
->shader_info
->fs
.force_persample
= true;
3884 result
= unpack_param(ctx
, ctx
->ancillary
, 8, 4);
3886 case nir_intrinsic_load_sample_pos
:
3887 ctx
->shader_info
->fs
.force_persample
= true;
3888 result
= load_sample_pos(ctx
);
3890 case nir_intrinsic_load_sample_mask_in
:
3891 result
= ctx
->sample_coverage
;
3893 case nir_intrinsic_load_front_face
:
3894 result
= ctx
->front_face
;
3896 case nir_intrinsic_load_instance_id
:
3897 result
= ctx
->instance_id
;
3898 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
3899 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
3901 case nir_intrinsic_load_num_work_groups
:
3902 result
= ctx
->num_work_groups
;
3904 case nir_intrinsic_load_local_invocation_index
:
3905 result
= visit_load_local_invocation_index(ctx
);
3907 case nir_intrinsic_load_push_constant
:
3908 result
= visit_load_push_constant(ctx
, instr
);
3910 case nir_intrinsic_vulkan_resource_index
:
3911 result
= visit_vulkan_resource_index(ctx
, instr
);
3913 case nir_intrinsic_store_ssbo
:
3914 visit_store_ssbo(ctx
, instr
);
3916 case nir_intrinsic_load_ssbo
:
3917 result
= visit_load_buffer(ctx
, instr
);
3919 case nir_intrinsic_ssbo_atomic_add
:
3920 case nir_intrinsic_ssbo_atomic_imin
:
3921 case nir_intrinsic_ssbo_atomic_umin
:
3922 case nir_intrinsic_ssbo_atomic_imax
:
3923 case nir_intrinsic_ssbo_atomic_umax
:
3924 case nir_intrinsic_ssbo_atomic_and
:
3925 case nir_intrinsic_ssbo_atomic_or
:
3926 case nir_intrinsic_ssbo_atomic_xor
:
3927 case nir_intrinsic_ssbo_atomic_exchange
:
3928 case nir_intrinsic_ssbo_atomic_comp_swap
:
3929 result
= visit_atomic_ssbo(ctx
, instr
);
3931 case nir_intrinsic_load_ubo
:
3932 result
= visit_load_ubo_buffer(ctx
, instr
);
3934 case nir_intrinsic_get_buffer_size
:
3935 result
= visit_get_buffer_size(ctx
, instr
);
3937 case nir_intrinsic_load_var
:
3938 result
= visit_load_var(ctx
, instr
);
3940 case nir_intrinsic_store_var
:
3941 visit_store_var(ctx
, instr
);
3943 case nir_intrinsic_image_load
:
3944 result
= visit_image_load(ctx
, instr
);
3946 case nir_intrinsic_image_store
:
3947 visit_image_store(ctx
, instr
);
3949 case nir_intrinsic_image_atomic_add
:
3950 case nir_intrinsic_image_atomic_min
:
3951 case nir_intrinsic_image_atomic_max
:
3952 case nir_intrinsic_image_atomic_and
:
3953 case nir_intrinsic_image_atomic_or
:
3954 case nir_intrinsic_image_atomic_xor
:
3955 case nir_intrinsic_image_atomic_exchange
:
3956 case nir_intrinsic_image_atomic_comp_swap
:
3957 result
= visit_image_atomic(ctx
, instr
);
3959 case nir_intrinsic_image_size
:
3960 result
= visit_image_size(ctx
, instr
);
3962 case nir_intrinsic_discard
:
3963 ctx
->shader_info
->fs
.can_discard
= true;
3964 ac_build_intrinsic(&ctx
->ac
, "llvm.AMDGPU.kilp",
3966 NULL
, 0, AC_FUNC_ATTR_LEGACY
);
3968 case nir_intrinsic_discard_if
:
3969 emit_discard_if(ctx
, instr
);
3971 case nir_intrinsic_memory_barrier
:
3972 emit_waitcnt(ctx
, VM_CNT
);
3974 case nir_intrinsic_barrier
:
3977 case nir_intrinsic_var_atomic_add
:
3978 case nir_intrinsic_var_atomic_imin
:
3979 case nir_intrinsic_var_atomic_umin
:
3980 case nir_intrinsic_var_atomic_imax
:
3981 case nir_intrinsic_var_atomic_umax
:
3982 case nir_intrinsic_var_atomic_and
:
3983 case nir_intrinsic_var_atomic_or
:
3984 case nir_intrinsic_var_atomic_xor
:
3985 case nir_intrinsic_var_atomic_exchange
:
3986 case nir_intrinsic_var_atomic_comp_swap
:
3987 result
= visit_var_atomic(ctx
, instr
);
3989 case nir_intrinsic_interp_var_at_centroid
:
3990 case nir_intrinsic_interp_var_at_sample
:
3991 case nir_intrinsic_interp_var_at_offset
:
3992 result
= visit_interp(ctx
, instr
);
3994 case nir_intrinsic_emit_vertex
:
3995 visit_emit_vertex(ctx
, instr
);
3997 case nir_intrinsic_end_primitive
:
3998 visit_end_primitive(ctx
, instr
);
4000 case nir_intrinsic_load_tess_coord
:
4001 result
= visit_load_tess_coord(ctx
, instr
);
4003 case nir_intrinsic_load_patch_vertices_in
:
4004 result
= LLVMConstInt(ctx
->i32
, ctx
->options
->key
.tcs
.input_vertices
, false);
4007 fprintf(stderr
, "Unknown intrinsic: ");
4008 nir_print_instr(&instr
->instr
, stderr
);
4009 fprintf(stderr
, "\n");
4013 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4017 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
4018 const nir_deref_var
*deref
,
4019 enum desc_type desc_type
)
4021 unsigned desc_set
= deref
->var
->data
.descriptor_set
;
4022 LLVMValueRef list
= ctx
->descriptor_sets
[desc_set
];
4023 struct radv_descriptor_set_layout
*layout
= ctx
->options
->layout
->set
[desc_set
].layout
;
4024 struct radv_descriptor_set_binding_layout
*binding
= layout
->binding
+ deref
->var
->data
.binding
;
4025 unsigned offset
= binding
->offset
;
4026 unsigned stride
= binding
->size
;
4028 LLVMBuilderRef builder
= ctx
->builder
;
4030 LLVMValueRef index
= NULL
;
4031 unsigned constant_index
= 0;
4033 assert(deref
->var
->data
.binding
< layout
->binding_count
);
4035 switch (desc_type
) {
4047 if (binding
->type
== VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
)
4057 unreachable("invalid desc_type\n");
4060 if (deref
->deref
.child
) {
4061 const nir_deref_array
*child
=
4062 (const nir_deref_array
*)deref
->deref
.child
;
4064 assert(child
->deref_array_type
!= nir_deref_array_type_wildcard
);
4065 offset
+= child
->base_offset
* stride
;
4066 if (child
->deref_array_type
== nir_deref_array_type_indirect
) {
4067 index
= get_src(ctx
, child
->indirect
);
4070 constant_index
= child
->base_offset
;
4072 if (desc_type
== DESC_SAMPLER
&& binding
->immutable_samplers_offset
&&
4073 (!index
|| binding
->immutable_samplers_equal
)) {
4074 if (binding
->immutable_samplers_equal
)
4077 const uint32_t *samplers
= radv_immutable_samplers(layout
, binding
);
4079 LLVMValueRef constants
[] = {
4080 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 0], 0),
4081 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 1], 0),
4082 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 2], 0),
4083 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 3], 0),
4085 return ac_build_gather_values(&ctx
->ac
, constants
, 4);
4088 assert(stride
% type_size
== 0);
4091 index
= ctx
->i32zero
;
4093 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, stride
/ type_size
, 0), "");
4095 list
= ac_build_gep0(&ctx
->ac
, list
, LLVMConstInt(ctx
->i32
, offset
, 0));
4096 list
= LLVMBuildPointerCast(builder
, list
, const_array(type
, 0), "");
4098 return ac_build_indexed_load_const(&ctx
->ac
, list
, index
);
4101 static void set_tex_fetch_args(struct nir_to_llvm_context
*ctx
,
4102 struct ac_image_args
*args
,
4103 const nir_tex_instr
*instr
,
4105 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
4106 LLVMValueRef
*param
, unsigned count
,
4109 unsigned is_rect
= 0;
4110 bool da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
4112 if (op
== nir_texop_lod
)
4114 /* Pad to power of two vector */
4115 while (count
< util_next_power_of_two(count
))
4116 param
[count
++] = LLVMGetUndef(ctx
->i32
);
4119 args
->addr
= ac_build_gather_values(&ctx
->ac
, param
, count
);
4121 args
->addr
= param
[0];
4123 args
->resource
= res_ptr
;
4124 args
->sampler
= samp_ptr
;
4126 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
&& op
== nir_texop_txf
) {
4127 args
->addr
= param
[0];
4131 args
->dmask
= dmask
;
4132 args
->unorm
= is_rect
;
4136 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4139 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4140 * filtering manually. The driver sets img7 to a mask clearing
4141 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4142 * s_and_b32 samp0, samp0, img7
4145 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4147 static LLVMValueRef
sici_fix_sampler_aniso(struct nir_to_llvm_context
*ctx
,
4148 LLVMValueRef res
, LLVMValueRef samp
)
4150 LLVMBuilderRef builder
= ctx
->builder
;
4151 LLVMValueRef img7
, samp0
;
4153 if (ctx
->options
->chip_class
>= VI
)
4156 img7
= LLVMBuildExtractElement(builder
, res
,
4157 LLVMConstInt(ctx
->i32
, 7, 0), "");
4158 samp0
= LLVMBuildExtractElement(builder
, samp
,
4159 LLVMConstInt(ctx
->i32
, 0, 0), "");
4160 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
4161 return LLVMBuildInsertElement(builder
, samp
, samp0
,
4162 LLVMConstInt(ctx
->i32
, 0, 0), "");
4165 static void tex_fetch_ptrs(struct nir_to_llvm_context
*ctx
,
4166 nir_tex_instr
*instr
,
4167 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
,
4168 LLVMValueRef
*fmask_ptr
)
4170 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
)
4171 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_BUFFER
);
4173 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_IMAGE
);
4176 *samp_ptr
= get_sampler_desc(ctx
, instr
->sampler
, DESC_SAMPLER
);
4178 *samp_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_SAMPLER
);
4179 if (instr
->sampler_dim
< GLSL_SAMPLER_DIM_RECT
)
4180 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
4182 if (fmask_ptr
&& !instr
->sampler
&& (instr
->op
== nir_texop_txf_ms
||
4183 instr
->op
== nir_texop_samples_identical
))
4184 *fmask_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_FMASK
);
4187 static LLVMValueRef
apply_round_slice(struct nir_to_llvm_context
*ctx
,
4190 coord
= to_float(ctx
, coord
);
4191 coord
= ac_build_intrinsic(&ctx
->ac
, "llvm.rint.f32", ctx
->f32
, &coord
, 1, 0);
4192 coord
= to_integer(ctx
, coord
);
4196 static void visit_tex(struct nir_to_llvm_context
*ctx
, nir_tex_instr
*instr
)
4198 LLVMValueRef result
= NULL
;
4199 struct ac_image_args args
= { 0 };
4200 unsigned dmask
= 0xf;
4201 LLVMValueRef address
[16];
4202 LLVMValueRef coords
[5];
4203 LLVMValueRef coord
= NULL
, lod
= NULL
, comparator
= NULL
;
4204 LLVMValueRef bias
= NULL
, offsets
= NULL
;
4205 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
, sample_index
= NULL
;
4206 LLVMValueRef ddx
= NULL
, ddy
= NULL
;
4207 LLVMValueRef derivs
[6];
4208 unsigned chan
, count
= 0;
4209 unsigned const_src
= 0, num_deriv_comp
= 0;
4210 bool lod_is_zero
= false;
4211 tex_fetch_ptrs(ctx
, instr
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4213 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
4214 switch (instr
->src
[i
].src_type
) {
4215 case nir_tex_src_coord
:
4216 coord
= get_src(ctx
, instr
->src
[i
].src
);
4218 case nir_tex_src_projector
:
4220 case nir_tex_src_comparator
:
4221 comparator
= get_src(ctx
, instr
->src
[i
].src
);
4223 case nir_tex_src_offset
:
4224 offsets
= get_src(ctx
, instr
->src
[i
].src
);
4227 case nir_tex_src_bias
:
4228 bias
= get_src(ctx
, instr
->src
[i
].src
);
4230 case nir_tex_src_lod
: {
4231 nir_const_value
*val
= nir_src_as_const_value(instr
->src
[i
].src
);
4233 if (val
&& val
->i32
[0] == 0)
4235 lod
= get_src(ctx
, instr
->src
[i
].src
);
4238 case nir_tex_src_ms_index
:
4239 sample_index
= get_src(ctx
, instr
->src
[i
].src
);
4241 case nir_tex_src_ms_mcs
:
4243 case nir_tex_src_ddx
:
4244 ddx
= get_src(ctx
, instr
->src
[i
].src
);
4245 num_deriv_comp
= instr
->src
[i
].src
.ssa
->num_components
;
4247 case nir_tex_src_ddy
:
4248 ddy
= get_src(ctx
, instr
->src
[i
].src
);
4250 case nir_tex_src_texture_offset
:
4251 case nir_tex_src_sampler_offset
:
4252 case nir_tex_src_plane
:
4258 if (instr
->op
== nir_texop_txs
&& instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
4259 result
= get_buffer_size(ctx
, res_ptr
, true);
4263 if (instr
->op
== nir_texop_texture_samples
) {
4264 LLVMValueRef res
, samples
, is_msaa
;
4265 res
= LLVMBuildBitCast(ctx
->builder
, res_ptr
, ctx
->v8i32
, "");
4266 samples
= LLVMBuildExtractElement(ctx
->builder
, res
,
4267 LLVMConstInt(ctx
->i32
, 3, false), "");
4268 is_msaa
= LLVMBuildLShr(ctx
->builder
, samples
,
4269 LLVMConstInt(ctx
->i32
, 28, false), "");
4270 is_msaa
= LLVMBuildAnd(ctx
->builder
, is_msaa
,
4271 LLVMConstInt(ctx
->i32
, 0xe, false), "");
4272 is_msaa
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, is_msaa
,
4273 LLVMConstInt(ctx
->i32
, 0xe, false), "");
4275 samples
= LLVMBuildLShr(ctx
->builder
, samples
,
4276 LLVMConstInt(ctx
->i32
, 16, false), "");
4277 samples
= LLVMBuildAnd(ctx
->builder
, samples
,
4278 LLVMConstInt(ctx
->i32
, 0xf, false), "");
4279 samples
= LLVMBuildShl(ctx
->builder
, ctx
->i32one
,
4281 samples
= LLVMBuildSelect(ctx
->builder
, is_msaa
, samples
,
4288 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
4289 coords
[chan
] = llvm_extract_elem(ctx
, coord
, chan
);
4291 if (offsets
&& instr
->op
!= nir_texop_txf
) {
4292 LLVMValueRef offset
[3], pack
;
4293 for (chan
= 0; chan
< 3; ++chan
)
4294 offset
[chan
] = ctx
->i32zero
;
4297 for (chan
= 0; chan
< get_llvm_num_components(offsets
); chan
++) {
4298 offset
[chan
] = llvm_extract_elem(ctx
, offsets
, chan
);
4299 offset
[chan
] = LLVMBuildAnd(ctx
->builder
, offset
[chan
],
4300 LLVMConstInt(ctx
->i32
, 0x3f, false), "");
4302 offset
[chan
] = LLVMBuildShl(ctx
->builder
, offset
[chan
],
4303 LLVMConstInt(ctx
->i32
, chan
* 8, false), "");
4305 pack
= LLVMBuildOr(ctx
->builder
, offset
[0], offset
[1], "");
4306 pack
= LLVMBuildOr(ctx
->builder
, pack
, offset
[2], "");
4307 address
[count
++] = pack
;
4310 /* pack LOD bias value */
4311 if (instr
->op
== nir_texop_txb
&& bias
) {
4312 address
[count
++] = bias
;
4315 /* Pack depth comparison value */
4316 if (instr
->is_shadow
&& comparator
) {
4317 address
[count
++] = llvm_extract_elem(ctx
, comparator
, 0);
4320 /* pack derivatives */
4322 switch (instr
->sampler_dim
) {
4323 case GLSL_SAMPLER_DIM_3D
:
4324 case GLSL_SAMPLER_DIM_CUBE
:
4327 case GLSL_SAMPLER_DIM_2D
:
4331 case GLSL_SAMPLER_DIM_1D
:
4336 for (unsigned i
= 0; i
< num_deriv_comp
; i
++) {
4337 derivs
[i
] = to_float(ctx
, llvm_extract_elem(ctx
, ddx
, i
));
4338 derivs
[num_deriv_comp
+ i
] = to_float(ctx
, llvm_extract_elem(ctx
, ddy
, i
));
4342 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&& coord
) {
4343 if (instr
->is_array
&& instr
->op
!= nir_texop_lod
)
4344 coords
[3] = apply_round_slice(ctx
, coords
[3]);
4345 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
4346 coords
[chan
] = to_float(ctx
, coords
[chan
]);
4347 if (instr
->coord_components
== 3)
4348 coords
[3] = LLVMGetUndef(ctx
->f32
);
4349 ac_prepare_cube_coords(&ctx
->ac
,
4350 instr
->op
== nir_texop_txd
, instr
->is_array
,
4357 for (unsigned i
= 0; i
< num_deriv_comp
* 2; i
++)
4358 address
[count
++] = derivs
[i
];
4361 /* Pack texture coordinates */
4363 address
[count
++] = coords
[0];
4364 if (instr
->coord_components
> 1) {
4365 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_1D
&& instr
->is_array
&& instr
->op
!= nir_texop_txf
) {
4366 coords
[1] = apply_round_slice(ctx
, coords
[1]);
4368 address
[count
++] = coords
[1];
4370 if (instr
->coord_components
> 2) {
4371 /* This seems like a bit of a hack - but it passes Vulkan CTS with it */
4372 if (instr
->sampler_dim
!= GLSL_SAMPLER_DIM_3D
&&
4373 instr
->sampler_dim
!= GLSL_SAMPLER_DIM_CUBE
&&
4374 instr
->op
!= nir_texop_txf
) {
4375 coords
[2] = apply_round_slice(ctx
, coords
[2]);
4377 address
[count
++] = coords
[2];
4382 if (lod
&& ((instr
->op
== nir_texop_txl
&& !lod_is_zero
) ||
4383 instr
->op
== nir_texop_txf
)) {
4384 address
[count
++] = lod
;
4385 } else if (instr
->op
== nir_texop_txf_ms
&& sample_index
) {
4386 address
[count
++] = sample_index
;
4387 } else if(instr
->op
== nir_texop_txs
) {
4390 address
[count
++] = lod
;
4392 address
[count
++] = ctx
->i32zero
;
4395 for (chan
= 0; chan
< count
; chan
++) {
4396 address
[chan
] = LLVMBuildBitCast(ctx
->builder
,
4397 address
[chan
], ctx
->i32
, "");
4400 if (instr
->op
== nir_texop_samples_identical
) {
4401 LLVMValueRef txf_address
[4];
4402 struct ac_image_args txf_args
= { 0 };
4403 unsigned txf_count
= count
;
4404 memcpy(txf_address
, address
, sizeof(txf_address
));
4406 if (!instr
->is_array
)
4407 txf_address
[2] = ctx
->i32zero
;
4408 txf_address
[3] = ctx
->i32zero
;
4410 set_tex_fetch_args(ctx
, &txf_args
, instr
, nir_texop_txf
,
4412 txf_address
, txf_count
, 0xf);
4414 result
= build_tex_intrinsic(ctx
, instr
, false, &txf_args
);
4416 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
4417 result
= emit_int_cmp(ctx
, LLVMIntEQ
, result
, ctx
->i32zero
);
4421 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
&&
4422 instr
->op
!= nir_texop_txs
) {
4423 unsigned sample_chan
= instr
->is_array
? 3 : 2;
4424 address
[sample_chan
] = adjust_sample_index_using_fmask(ctx
,
4427 instr
->is_array
? address
[2] : NULL
,
4428 address
[sample_chan
],
4432 if (offsets
&& instr
->op
== nir_texop_txf
) {
4433 nir_const_value
*const_offset
=
4434 nir_src_as_const_value(instr
->src
[const_src
].src
);
4435 int num_offsets
= instr
->src
[const_src
].src
.ssa
->num_components
;
4436 assert(const_offset
);
4437 num_offsets
= MIN2(num_offsets
, instr
->coord_components
);
4438 if (num_offsets
> 2)
4439 address
[2] = LLVMBuildAdd(ctx
->builder
,
4440 address
[2], LLVMConstInt(ctx
->i32
, const_offset
->i32
[2], false), "");
4441 if (num_offsets
> 1)
4442 address
[1] = LLVMBuildAdd(ctx
->builder
,
4443 address
[1], LLVMConstInt(ctx
->i32
, const_offset
->i32
[1], false), "");
4444 address
[0] = LLVMBuildAdd(ctx
->builder
,
4445 address
[0], LLVMConstInt(ctx
->i32
, const_offset
->i32
[0], false), "");
4449 /* TODO TG4 support */
4450 if (instr
->op
== nir_texop_tg4
) {
4451 if (instr
->is_shadow
)
4454 dmask
= 1 << instr
->component
;
4456 set_tex_fetch_args(ctx
, &args
, instr
, instr
->op
,
4457 res_ptr
, samp_ptr
, address
, count
, dmask
);
4459 result
= build_tex_intrinsic(ctx
, instr
, lod_is_zero
, &args
);
4461 if (instr
->op
== nir_texop_query_levels
)
4462 result
= LLVMBuildExtractElement(ctx
->builder
, result
, LLVMConstInt(ctx
->i32
, 3, false), "");
4463 else if (instr
->is_shadow
&& instr
->op
!= nir_texop_txs
&& instr
->op
!= nir_texop_lod
&& instr
->op
!= nir_texop_tg4
)
4464 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
4465 else if (instr
->op
== nir_texop_txs
&&
4466 instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&&
4468 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
4469 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
4470 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, result
, two
, "");
4471 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
4472 result
= LLVMBuildInsertElement(ctx
->builder
, result
, z
, two
, "");
4473 } else if (instr
->dest
.ssa
.num_components
!= 4)
4474 result
= trim_vector(ctx
, result
, instr
->dest
.ssa
.num_components
);
4478 assert(instr
->dest
.is_ssa
);
4479 result
= to_integer(ctx
, result
);
4480 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4485 static void visit_phi(struct nir_to_llvm_context
*ctx
, nir_phi_instr
*instr
)
4487 LLVMTypeRef type
= get_def_type(ctx
, &instr
->dest
.ssa
);
4488 LLVMValueRef result
= LLVMBuildPhi(ctx
->builder
, type
, "");
4490 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4491 _mesa_hash_table_insert(ctx
->phis
, instr
, result
);
4494 static void visit_post_phi(struct nir_to_llvm_context
*ctx
,
4495 nir_phi_instr
*instr
,
4496 LLVMValueRef llvm_phi
)
4498 nir_foreach_phi_src(src
, instr
) {
4499 LLVMBasicBlockRef block
= get_block(ctx
, src
->pred
);
4500 LLVMValueRef llvm_src
= get_src(ctx
, src
->src
);
4502 LLVMAddIncoming(llvm_phi
, &llvm_src
, &block
, 1);
4506 static void phi_post_pass(struct nir_to_llvm_context
*ctx
)
4508 struct hash_entry
*entry
;
4509 hash_table_foreach(ctx
->phis
, entry
) {
4510 visit_post_phi(ctx
, (nir_phi_instr
*)entry
->key
,
4511 (LLVMValueRef
)entry
->data
);
4516 static void visit_ssa_undef(struct nir_to_llvm_context
*ctx
,
4517 const nir_ssa_undef_instr
*instr
)
4519 unsigned num_components
= instr
->def
.num_components
;
4522 if (num_components
== 1)
4523 undef
= LLVMGetUndef(ctx
->i32
);
4525 undef
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, num_components
));
4527 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, undef
);
4530 static void visit_jump(struct nir_to_llvm_context
*ctx
,
4531 const nir_jump_instr
*instr
)
4533 switch (instr
->type
) {
4534 case nir_jump_break
:
4535 LLVMBuildBr(ctx
->builder
, ctx
->break_block
);
4536 LLVMClearInsertionPosition(ctx
->builder
);
4538 case nir_jump_continue
:
4539 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4540 LLVMClearInsertionPosition(ctx
->builder
);
4543 fprintf(stderr
, "Unknown NIR jump instr: ");
4544 nir_print_instr(&instr
->instr
, stderr
);
4545 fprintf(stderr
, "\n");
4550 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
4551 struct exec_list
*list
);
4553 static void visit_block(struct nir_to_llvm_context
*ctx
, nir_block
*block
)
4555 LLVMBasicBlockRef llvm_block
= LLVMGetInsertBlock(ctx
->builder
);
4556 nir_foreach_instr(instr
, block
)
4558 switch (instr
->type
) {
4559 case nir_instr_type_alu
:
4560 visit_alu(ctx
, nir_instr_as_alu(instr
));
4562 case nir_instr_type_load_const
:
4563 visit_load_const(ctx
, nir_instr_as_load_const(instr
));
4565 case nir_instr_type_intrinsic
:
4566 visit_intrinsic(ctx
, nir_instr_as_intrinsic(instr
));
4568 case nir_instr_type_tex
:
4569 visit_tex(ctx
, nir_instr_as_tex(instr
));
4571 case nir_instr_type_phi
:
4572 visit_phi(ctx
, nir_instr_as_phi(instr
));
4574 case nir_instr_type_ssa_undef
:
4575 visit_ssa_undef(ctx
, nir_instr_as_ssa_undef(instr
));
4577 case nir_instr_type_jump
:
4578 visit_jump(ctx
, nir_instr_as_jump(instr
));
4581 fprintf(stderr
, "Unknown NIR instr type: ");
4582 nir_print_instr(instr
, stderr
);
4583 fprintf(stderr
, "\n");
4588 _mesa_hash_table_insert(ctx
->defs
, block
, llvm_block
);
4591 static void visit_if(struct nir_to_llvm_context
*ctx
, nir_if
*if_stmt
)
4593 LLVMValueRef value
= get_src(ctx
, if_stmt
->condition
);
4595 LLVMBasicBlockRef merge_block
=
4596 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4597 LLVMBasicBlockRef if_block
=
4598 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4599 LLVMBasicBlockRef else_block
= merge_block
;
4600 if (!exec_list_is_empty(&if_stmt
->else_list
))
4601 else_block
= LLVMAppendBasicBlockInContext(
4602 ctx
->context
, ctx
->main_function
, "");
4604 LLVMValueRef cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, value
,
4605 LLVMConstInt(ctx
->i32
, 0, false), "");
4606 LLVMBuildCondBr(ctx
->builder
, cond
, if_block
, else_block
);
4608 LLVMPositionBuilderAtEnd(ctx
->builder
, if_block
);
4609 visit_cf_list(ctx
, &if_stmt
->then_list
);
4610 if (LLVMGetInsertBlock(ctx
->builder
))
4611 LLVMBuildBr(ctx
->builder
, merge_block
);
4613 if (!exec_list_is_empty(&if_stmt
->else_list
)) {
4614 LLVMPositionBuilderAtEnd(ctx
->builder
, else_block
);
4615 visit_cf_list(ctx
, &if_stmt
->else_list
);
4616 if (LLVMGetInsertBlock(ctx
->builder
))
4617 LLVMBuildBr(ctx
->builder
, merge_block
);
4620 LLVMPositionBuilderAtEnd(ctx
->builder
, merge_block
);
4623 static void visit_loop(struct nir_to_llvm_context
*ctx
, nir_loop
*loop
)
4625 LLVMBasicBlockRef continue_parent
= ctx
->continue_block
;
4626 LLVMBasicBlockRef break_parent
= ctx
->break_block
;
4628 ctx
->continue_block
=
4629 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4631 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4633 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4634 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->continue_block
);
4635 visit_cf_list(ctx
, &loop
->body
);
4637 if (LLVMGetInsertBlock(ctx
->builder
))
4638 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4639 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->break_block
);
4641 ctx
->continue_block
= continue_parent
;
4642 ctx
->break_block
= break_parent
;
4645 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
4646 struct exec_list
*list
)
4648 foreach_list_typed(nir_cf_node
, node
, node
, list
)
4650 switch (node
->type
) {
4651 case nir_cf_node_block
:
4652 visit_block(ctx
, nir_cf_node_as_block(node
));
4655 case nir_cf_node_if
:
4656 visit_if(ctx
, nir_cf_node_as_if(node
));
4659 case nir_cf_node_loop
:
4660 visit_loop(ctx
, nir_cf_node_as_loop(node
));
4670 handle_vs_input_decl(struct nir_to_llvm_context
*ctx
,
4671 struct nir_variable
*variable
)
4673 LLVMValueRef t_list_ptr
= ctx
->vertex_buffers
;
4674 LLVMValueRef t_offset
;
4675 LLVMValueRef t_list
;
4677 LLVMValueRef buffer_index
;
4678 int index
= variable
->data
.location
- VERT_ATTRIB_GENERIC0
;
4679 int idx
= variable
->data
.location
;
4680 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, true);
4682 variable
->data
.driver_location
= idx
* 4;
4684 if (ctx
->options
->key
.vs
.instance_rate_inputs
& (1u << index
)) {
4685 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->instance_id
,
4686 ctx
->start_instance
, "");
4687 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
4688 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
4690 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->vertex_id
,
4691 ctx
->base_vertex
, "");
4693 for (unsigned i
= 0; i
< attrib_count
; ++i
, ++idx
) {
4694 t_offset
= LLVMConstInt(ctx
->i32
, index
+ i
, false);
4696 t_list
= ac_build_indexed_load_const(&ctx
->ac
, t_list_ptr
, t_offset
);
4698 input
= ac_build_buffer_load_format(&ctx
->ac
, t_list
,
4700 LLVMConstInt(ctx
->i32
, 0, false),
4703 for (unsigned chan
= 0; chan
< 4; chan
++) {
4704 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4705 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
, chan
)] =
4706 to_integer(ctx
, LLVMBuildExtractElement(ctx
->builder
,
4707 input
, llvm_chan
, ""));
4712 static void interp_fs_input(struct nir_to_llvm_context
*ctx
,
4714 LLVMValueRef interp_param
,
4715 LLVMValueRef prim_mask
,
4716 LLVMValueRef result
[4])
4718 LLVMValueRef attr_number
;
4721 bool interp
= interp_param
!= NULL
;
4723 attr_number
= LLVMConstInt(ctx
->i32
, attr
, false);
4725 /* fs.constant returns the param from the middle vertex, so it's not
4726 * really useful for flat shading. It's meant to be used for custom
4727 * interpolation (but the intrinsic can't fetch from the other two
4730 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
4731 * to do the right thing. The only reason we use fs.constant is that
4732 * fs.interp cannot be used on integers, because they can be equal
4736 interp_param
= LLVMBuildBitCast(ctx
->builder
, interp_param
,
4737 LLVMVectorType(ctx
->f32
, 2), "");
4739 i
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
4741 j
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
4745 for (chan
= 0; chan
< 4; chan
++) {
4746 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4749 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
4754 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
4755 LLVMConstInt(ctx
->i32
, 2, false),
4764 handle_fs_input_decl(struct nir_to_llvm_context
*ctx
,
4765 struct nir_variable
*variable
)
4767 int idx
= variable
->data
.location
;
4768 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4769 LLVMValueRef interp
;
4771 variable
->data
.driver_location
= idx
* 4;
4772 ctx
->input_mask
|= ((1ull << attrib_count
) - 1) << variable
->data
.location
;
4774 if (glsl_get_base_type(glsl_without_array(variable
->type
)) == GLSL_TYPE_FLOAT
) {
4775 unsigned interp_type
;
4776 if (variable
->data
.sample
) {
4777 interp_type
= INTERP_SAMPLE
;
4778 ctx
->shader_info
->fs
.force_persample
= true;
4779 } else if (variable
->data
.centroid
)
4780 interp_type
= INTERP_CENTROID
;
4782 interp_type
= INTERP_CENTER
;
4784 interp
= lookup_interp_param(ctx
, variable
->data
.interpolation
, interp_type
);
4788 for (unsigned i
= 0; i
< attrib_count
; ++i
)
4789 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
+ i
, 0)] = interp
;
4794 handle_shader_input_decl(struct nir_to_llvm_context
*ctx
,
4795 struct nir_variable
*variable
)
4797 switch (ctx
->stage
) {
4798 case MESA_SHADER_VERTEX
:
4799 handle_vs_input_decl(ctx
, variable
);
4801 case MESA_SHADER_FRAGMENT
:
4802 handle_fs_input_decl(ctx
, variable
);
4811 handle_fs_inputs_pre(struct nir_to_llvm_context
*ctx
,
4812 struct nir_shader
*nir
)
4815 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_INPUTS
; ++i
) {
4816 LLVMValueRef interp_param
;
4817 LLVMValueRef
*inputs
= ctx
->inputs
+radeon_llvm_reg_index_soa(i
, 0);
4819 if (!(ctx
->input_mask
& (1ull << i
)))
4822 if (i
>= VARYING_SLOT_VAR0
|| i
== VARYING_SLOT_PNTC
||
4823 i
== VARYING_SLOT_PRIMITIVE_ID
|| i
== VARYING_SLOT_LAYER
) {
4824 interp_param
= *inputs
;
4825 interp_fs_input(ctx
, index
, interp_param
, ctx
->prim_mask
,
4829 ctx
->shader_info
->fs
.flat_shaded_mask
|= 1u << index
;
4831 } else if (i
== VARYING_SLOT_POS
) {
4832 for(int i
= 0; i
< 3; ++i
)
4833 inputs
[i
] = ctx
->frag_pos
[i
];
4835 inputs
[3] = ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, ctx
->frag_pos
[3]);
4838 ctx
->shader_info
->fs
.num_interp
= index
;
4839 if (ctx
->input_mask
& (1 << VARYING_SLOT_PNTC
))
4840 ctx
->shader_info
->fs
.has_pcoord
= true;
4841 if (ctx
->input_mask
& (1 << VARYING_SLOT_PRIMITIVE_ID
))
4842 ctx
->shader_info
->fs
.prim_id_input
= true;
4843 if (ctx
->input_mask
& (1 << VARYING_SLOT_LAYER
))
4844 ctx
->shader_info
->fs
.layer_input
= true;
4845 ctx
->shader_info
->fs
.input_mask
= ctx
->input_mask
>> VARYING_SLOT_VAR0
;
4849 ac_build_alloca(struct nir_to_llvm_context
*ctx
,
4853 LLVMBuilderRef builder
= ctx
->builder
;
4854 LLVMBasicBlockRef current_block
= LLVMGetInsertBlock(builder
);
4855 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
4856 LLVMBasicBlockRef first_block
= LLVMGetEntryBasicBlock(function
);
4857 LLVMValueRef first_instr
= LLVMGetFirstInstruction(first_block
);
4858 LLVMBuilderRef first_builder
= LLVMCreateBuilderInContext(ctx
->context
);
4862 LLVMPositionBuilderBefore(first_builder
, first_instr
);
4864 LLVMPositionBuilderAtEnd(first_builder
, first_block
);
4867 res
= LLVMBuildAlloca(first_builder
, type
, name
);
4868 LLVMBuildStore(builder
, LLVMConstNull(type
), res
);
4870 LLVMDisposeBuilder(first_builder
);
4875 static LLVMValueRef
si_build_alloca_undef(struct nir_to_llvm_context
*ctx
,
4879 LLVMValueRef ptr
= ac_build_alloca(ctx
, type
, name
);
4880 LLVMBuildStore(ctx
->builder
, LLVMGetUndef(type
), ptr
);
4885 handle_shader_output_decl(struct nir_to_llvm_context
*ctx
,
4886 struct nir_variable
*variable
)
4888 int idx
= variable
->data
.location
+ variable
->data
.index
;
4889 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4890 uint64_t mask_attribs
;
4891 variable
->data
.driver_location
= idx
* 4;
4893 /* tess ctrl has it's own load/store paths for outputs */
4894 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
4897 mask_attribs
= ((1ull << attrib_count
) - 1) << idx
;
4898 if (ctx
->stage
== MESA_SHADER_VERTEX
||
4899 ctx
->stage
== MESA_SHADER_TESS_EVAL
||
4900 ctx
->stage
== MESA_SHADER_GEOMETRY
) {
4901 if (idx
== VARYING_SLOT_CLIP_DIST0
) {
4902 int length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
4903 if (ctx
->stage
== MESA_SHADER_VERTEX
) {
4904 ctx
->shader_info
->vs
.outinfo
.clip_dist_mask
= (1 << ctx
->num_output_clips
) - 1;
4905 ctx
->shader_info
->vs
.outinfo
.cull_dist_mask
= (1 << ctx
->num_output_culls
) - 1;
4907 if (ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
4908 ctx
->shader_info
->tes
.outinfo
.clip_dist_mask
= (1 << ctx
->num_output_clips
) - 1;
4909 ctx
->shader_info
->tes
.outinfo
.cull_dist_mask
= (1 << ctx
->num_output_culls
) - 1;
4916 mask_attribs
= 1ull << idx
;
4920 for (unsigned i
= 0; i
< attrib_count
; ++i
) {
4921 for (unsigned chan
= 0; chan
< 4; chan
++) {
4922 ctx
->outputs
[radeon_llvm_reg_index_soa(idx
+ i
, chan
)] =
4923 si_build_alloca_undef(ctx
, ctx
->f32
, "");
4926 ctx
->output_mask
|= mask_attribs
;
4930 setup_locals(struct nir_to_llvm_context
*ctx
,
4931 struct nir_function
*func
)
4934 ctx
->num_locals
= 0;
4935 nir_foreach_variable(variable
, &func
->impl
->locals
) {
4936 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4937 variable
->data
.driver_location
= ctx
->num_locals
* 4;
4938 ctx
->num_locals
+= attrib_count
;
4940 ctx
->locals
= malloc(4 * ctx
->num_locals
* sizeof(LLVMValueRef
));
4944 for (i
= 0; i
< ctx
->num_locals
; i
++) {
4945 for (j
= 0; j
< 4; j
++) {
4946 ctx
->locals
[i
* 4 + j
] =
4947 si_build_alloca_undef(ctx
, ctx
->f32
, "temp");
4953 emit_float_saturate(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
, float lo
, float hi
)
4955 v
= to_float(ctx
, v
);
4956 v
= emit_intrin_2f_param(ctx
, "llvm.maxnum.f32", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, lo
));
4957 return emit_intrin_2f_param(ctx
, "llvm.minnum.f32", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, hi
));
4961 static LLVMValueRef
emit_pack_int16(struct nir_to_llvm_context
*ctx
,
4962 LLVMValueRef src0
, LLVMValueRef src1
)
4964 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
4965 LLVMValueRef comp
[2];
4967 comp
[0] = LLVMBuildAnd(ctx
->builder
, src0
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4968 comp
[1] = LLVMBuildAnd(ctx
->builder
, src1
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4969 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
4970 return LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
4973 /* Initialize arguments for the shader export intrinsic */
4975 si_llvm_init_export_args(struct nir_to_llvm_context
*ctx
,
4976 LLVMValueRef
*values
,
4978 struct ac_export_args
*args
)
4980 /* Default is 0xf. Adjusted below depending on the format. */
4981 args
->enabled_channels
= 0xf;
4983 /* Specify whether the EXEC mask represents the valid mask */
4984 args
->valid_mask
= 0;
4986 /* Specify whether this is the last export */
4989 /* Specify the target we are exporting */
4990 args
->target
= target
;
4992 args
->compr
= false;
4993 args
->out
[0] = LLVMGetUndef(ctx
->f32
);
4994 args
->out
[1] = LLVMGetUndef(ctx
->f32
);
4995 args
->out
[2] = LLVMGetUndef(ctx
->f32
);
4996 args
->out
[3] = LLVMGetUndef(ctx
->f32
);
5001 if (ctx
->stage
== MESA_SHADER_FRAGMENT
&& target
>= V_008DFC_SQ_EXP_MRT
) {
5002 LLVMValueRef val
[4];
5003 unsigned index
= target
- V_008DFC_SQ_EXP_MRT
;
5004 unsigned col_format
= (ctx
->options
->key
.fs
.col_format
>> (4 * index
)) & 0xf;
5005 bool is_int8
= (ctx
->options
->key
.fs
.is_int8
>> index
) & 1;
5007 switch(col_format
) {
5008 case V_028714_SPI_SHADER_ZERO
:
5009 args
->enabled_channels
= 0; /* writemask */
5010 args
->target
= V_008DFC_SQ_EXP_NULL
;
5013 case V_028714_SPI_SHADER_32_R
:
5014 args
->enabled_channels
= 1;
5015 args
->out
[0] = values
[0];
5018 case V_028714_SPI_SHADER_32_GR
:
5019 args
->enabled_channels
= 0x3;
5020 args
->out
[0] = values
[0];
5021 args
->out
[1] = values
[1];
5024 case V_028714_SPI_SHADER_32_AR
:
5025 args
->enabled_channels
= 0x9;
5026 args
->out
[0] = values
[0];
5027 args
->out
[3] = values
[3];
5030 case V_028714_SPI_SHADER_FP16_ABGR
:
5033 for (unsigned chan
= 0; chan
< 2; chan
++) {
5034 LLVMValueRef pack_args
[2] = {
5036 values
[2 * chan
+ 1]
5038 LLVMValueRef packed
;
5040 packed
= ac_build_cvt_pkrtz_f16(&ctx
->ac
, pack_args
);
5041 args
->out
[chan
] = packed
;
5045 case V_028714_SPI_SHADER_UNORM16_ABGR
:
5046 for (unsigned chan
= 0; chan
< 4; chan
++) {
5047 val
[chan
] = ac_build_clamp(&ctx
->ac
, values
[chan
]);
5048 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
5049 LLVMConstReal(ctx
->f32
, 65535), "");
5050 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
5051 LLVMConstReal(ctx
->f32
, 0.5), "");
5052 val
[chan
] = LLVMBuildFPToUI(ctx
->builder
, val
[chan
],
5057 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5058 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5061 case V_028714_SPI_SHADER_SNORM16_ABGR
:
5062 for (unsigned chan
= 0; chan
< 4; chan
++) {
5063 val
[chan
] = emit_float_saturate(ctx
, values
[chan
], -1, 1);
5064 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
5065 LLVMConstReal(ctx
->f32
, 32767), "");
5067 /* If positive, add 0.5, else add -0.5. */
5068 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
5069 LLVMBuildSelect(ctx
->builder
,
5070 LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
,
5071 val
[chan
], ctx
->f32zero
, ""),
5072 LLVMConstReal(ctx
->f32
, 0.5),
5073 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
5074 val
[chan
] = LLVMBuildFPToSI(ctx
->builder
, val
[chan
], ctx
->i32
, "");
5078 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5079 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5082 case V_028714_SPI_SHADER_UINT16_ABGR
: {
5083 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 255 : 65535, 0);
5085 for (unsigned chan
= 0; chan
< 4; chan
++) {
5086 val
[chan
] = to_integer(ctx
, values
[chan
]);
5087 val
[chan
] = emit_minmax_int(ctx
, LLVMIntULT
, val
[chan
], max
);
5091 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5092 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5096 case V_028714_SPI_SHADER_SINT16_ABGR
: {
5097 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 127 : 32767, 0);
5098 LLVMValueRef min
= LLVMConstInt(ctx
->i32
, is_int8
? -128 : -32768, 0);
5101 for (unsigned chan
= 0; chan
< 4; chan
++) {
5102 val
[chan
] = to_integer(ctx
, values
[chan
]);
5103 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSLT
, val
[chan
], max
);
5104 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSGT
, val
[chan
], min
);
5108 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5109 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5114 case V_028714_SPI_SHADER_32_ABGR
:
5115 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
5119 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
5121 for (unsigned i
= 0; i
< 4; ++i
)
5122 args
->out
[i
] = to_float(ctx
, args
->out
[i
]);
5126 handle_vs_outputs_post(struct nir_to_llvm_context
*ctx
,
5127 struct ac_vs_output_info
*outinfo
)
5129 uint32_t param_count
= 0;
5131 unsigned pos_idx
, num_pos_exports
= 0;
5132 struct ac_export_args args
, pos_args
[4] = {};
5133 LLVMValueRef psize_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
5136 memset(outinfo
->vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
5137 sizeof(outinfo
->vs_output_param_offset
));
5139 if (ctx
->output_mask
& (1ull << VARYING_SLOT_CLIP_DIST0
)) {
5140 LLVMValueRef slots
[8];
5143 if (outinfo
->cull_dist_mask
)
5144 outinfo
->cull_dist_mask
<<= ctx
->num_output_clips
;
5146 i
= VARYING_SLOT_CLIP_DIST0
;
5147 for (j
= 0; j
< ctx
->num_output_clips
+ ctx
->num_output_culls
; j
++)
5148 slots
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5149 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5151 for (i
= ctx
->num_output_clips
+ ctx
->num_output_culls
; i
< 8; i
++)
5152 slots
[i
] = LLVMGetUndef(ctx
->f32
);
5154 if (ctx
->num_output_clips
+ ctx
->num_output_culls
> 4) {
5155 target
= V_008DFC_SQ_EXP_POS
+ 3;
5156 si_llvm_init_export_args(ctx
, &slots
[4], target
, &args
);
5157 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5158 &args
, sizeof(args
));
5161 target
= V_008DFC_SQ_EXP_POS
+ 2;
5162 si_llvm_init_export_args(ctx
, &slots
[0], target
, &args
);
5163 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5164 &args
, sizeof(args
));
5168 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5169 LLVMValueRef values
[4];
5170 if (!(ctx
->output_mask
& (1ull << i
)))
5173 for (unsigned j
= 0; j
< 4; j
++)
5174 values
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5175 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5177 if (i
== VARYING_SLOT_POS
) {
5178 target
= V_008DFC_SQ_EXP_POS
;
5179 } else if (i
== VARYING_SLOT_CLIP_DIST0
) {
5181 } else if (i
== VARYING_SLOT_PSIZ
) {
5182 outinfo
->writes_pointsize
= true;
5183 psize_value
= values
[0];
5185 } else if (i
== VARYING_SLOT_LAYER
) {
5186 outinfo
->writes_layer
= true;
5187 layer_value
= values
[0];
5188 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5189 outinfo
->vs_output_param_offset
[VARYING_SLOT_LAYER
] = param_count
;
5191 } else if (i
== VARYING_SLOT_VIEWPORT
) {
5192 outinfo
->writes_viewport_index
= true;
5193 viewport_index_value
= values
[0];
5195 } else if (i
== VARYING_SLOT_PRIMITIVE_ID
) {
5196 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5197 outinfo
->vs_output_param_offset
[VARYING_SLOT_PRIMITIVE_ID
] = param_count
;
5199 } else if (i
>= VARYING_SLOT_VAR0
) {
5200 outinfo
->export_mask
|= 1u << (i
- VARYING_SLOT_VAR0
);
5201 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5202 outinfo
->vs_output_param_offset
[i
] = param_count
;
5206 si_llvm_init_export_args(ctx
, values
, target
, &args
);
5208 if (target
>= V_008DFC_SQ_EXP_POS
&&
5209 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
5210 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5211 &args
, sizeof(args
));
5213 ac_build_export(&ctx
->ac
, &args
);
5217 /* We need to add the position output manually if it's missing. */
5218 if (!pos_args
[0].out
[0]) {
5219 pos_args
[0].enabled_channels
= 0xf;
5220 pos_args
[0].valid_mask
= 0;
5221 pos_args
[0].done
= 0;
5222 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
5223 pos_args
[0].compr
= 0;
5224 pos_args
[0].out
[0] = ctx
->f32zero
; /* X */
5225 pos_args
[0].out
[1] = ctx
->f32zero
; /* Y */
5226 pos_args
[0].out
[2] = ctx
->f32zero
; /* Z */
5227 pos_args
[0].out
[3] = ctx
->f32one
; /* W */
5230 uint32_t mask
= ((outinfo
->writes_pointsize
== true ? 1 : 0) |
5231 (outinfo
->writes_layer
== true ? 4 : 0) |
5232 (outinfo
->writes_viewport_index
== true ? 8 : 0));
5234 pos_args
[1].enabled_channels
= mask
;
5235 pos_args
[1].valid_mask
= 0;
5236 pos_args
[1].done
= 0;
5237 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
5238 pos_args
[1].compr
= 0;
5239 pos_args
[1].out
[0] = ctx
->f32zero
; /* X */
5240 pos_args
[1].out
[1] = ctx
->f32zero
; /* Y */
5241 pos_args
[1].out
[2] = ctx
->f32zero
; /* Z */
5242 pos_args
[1].out
[3] = ctx
->f32zero
; /* W */
5244 if (outinfo
->writes_pointsize
== true)
5245 pos_args
[1].out
[0] = psize_value
;
5246 if (outinfo
->writes_layer
== true)
5247 pos_args
[1].out
[2] = layer_value
;
5248 if (outinfo
->writes_viewport_index
== true)
5249 pos_args
[1].out
[3] = viewport_index_value
;
5251 for (i
= 0; i
< 4; i
++) {
5252 if (pos_args
[i
].out
[0])
5257 for (i
= 0; i
< 4; i
++) {
5258 if (!pos_args
[i
].out
[0])
5261 /* Specify the target we are exporting */
5262 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
5263 if (pos_idx
== num_pos_exports
)
5264 pos_args
[i
].done
= 1;
5265 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
5268 outinfo
->pos_exports
= num_pos_exports
;
5269 outinfo
->param_exports
= param_count
;
5273 handle_es_outputs_post(struct nir_to_llvm_context
*ctx
,
5274 struct ac_es_output_info
*outinfo
)
5277 uint64_t max_output_written
= 0;
5278 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5279 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
5283 if (!(ctx
->output_mask
& (1ull << i
)))
5286 if (i
== VARYING_SLOT_CLIP_DIST0
)
5287 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
5289 param_index
= shader_io_get_unique_index(i
);
5291 max_output_written
= MAX2(param_index
+ (length
> 4), max_output_written
);
5293 for (j
= 0; j
< length
; j
++) {
5294 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], "");
5295 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
5297 ac_build_buffer_store_dword(&ctx
->ac
,
5300 NULL
, ctx
->es2gs_offset
,
5301 (4 * param_index
+ j
) * 4,
5305 outinfo
->esgs_itemsize
= (max_output_written
+ 1) * 16;
5309 handle_ls_outputs_post(struct nir_to_llvm_context
*ctx
)
5311 LLVMValueRef vertex_id
= ctx
->rel_auto_id
;
5312 LLVMValueRef vertex_dw_stride
= unpack_param(ctx
, ctx
->ls_out_layout
, 13, 8);
5313 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->builder
, vertex_id
,
5314 vertex_dw_stride
, "");
5316 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5317 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
5320 if (!(ctx
->output_mask
& (1ull << i
)))
5323 if (i
== VARYING_SLOT_CLIP_DIST0
)
5324 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
5325 int param
= shader_io_get_unique_index(i
);
5326 mark_tess_output(ctx
, false, param
);
5328 mark_tess_output(ctx
, false, param
+ 1);
5329 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->builder
, base_dw_addr
,
5330 LLVMConstInt(ctx
->i32
, param
* 4, false),
5332 for (unsigned j
= 0; j
< length
; j
++) {
5333 lds_store(ctx
, dw_addr
,
5334 LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], ""));
5335 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
, ctx
->i32one
, "");
5340 struct ac_build_if_state
5342 struct nir_to_llvm_context
*ctx
;
5343 LLVMValueRef condition
;
5344 LLVMBasicBlockRef entry_block
;
5345 LLVMBasicBlockRef true_block
;
5346 LLVMBasicBlockRef false_block
;
5347 LLVMBasicBlockRef merge_block
;
5350 static LLVMBasicBlockRef
5351 ac_build_insert_new_block(struct nir_to_llvm_context
*ctx
, const char *name
)
5353 LLVMBasicBlockRef current_block
;
5354 LLVMBasicBlockRef next_block
;
5355 LLVMBasicBlockRef new_block
;
5357 /* get current basic block */
5358 current_block
= LLVMGetInsertBlock(ctx
->builder
);
5360 /* chqeck if there's another block after this one */
5361 next_block
= LLVMGetNextBasicBlock(current_block
);
5363 /* insert the new block before the next block */
5364 new_block
= LLVMInsertBasicBlockInContext(ctx
->context
, next_block
, name
);
5367 /* append new block after current block */
5368 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
5369 new_block
= LLVMAppendBasicBlockInContext(ctx
->context
, function
, name
);
5375 ac_nir_build_if(struct ac_build_if_state
*ifthen
,
5376 struct nir_to_llvm_context
*ctx
,
5377 LLVMValueRef condition
)
5379 LLVMBasicBlockRef block
= LLVMGetInsertBlock(ctx
->builder
);
5381 memset(ifthen
, 0, sizeof *ifthen
);
5383 ifthen
->condition
= condition
;
5384 ifthen
->entry_block
= block
;
5386 /* create endif/merge basic block for the phi functions */
5387 ifthen
->merge_block
= ac_build_insert_new_block(ctx
, "endif-block");
5389 /* create/insert true_block before merge_block */
5390 ifthen
->true_block
=
5391 LLVMInsertBasicBlockInContext(ctx
->context
,
5392 ifthen
->merge_block
,
5395 /* successive code goes into the true block */
5396 LLVMPositionBuilderAtEnd(ctx
->builder
, ifthen
->true_block
);
5400 * End a conditional.
5403 ac_nir_build_endif(struct ac_build_if_state
*ifthen
)
5405 LLVMBuilderRef builder
= ifthen
->ctx
->builder
;
5407 /* Insert branch to the merge block from current block */
5408 LLVMBuildBr(builder
, ifthen
->merge_block
);
5411 * Now patch in the various branch instructions.
5414 /* Insert the conditional branch instruction at the end of entry_block */
5415 LLVMPositionBuilderAtEnd(builder
, ifthen
->entry_block
);
5416 if (ifthen
->false_block
) {
5417 /* we have an else clause */
5418 LLVMBuildCondBr(builder
, ifthen
->condition
,
5419 ifthen
->true_block
, ifthen
->false_block
);
5422 /* no else clause */
5423 LLVMBuildCondBr(builder
, ifthen
->condition
,
5424 ifthen
->true_block
, ifthen
->merge_block
);
5427 /* Resume building code at end of the ifthen->merge_block */
5428 LLVMPositionBuilderAtEnd(builder
, ifthen
->merge_block
);
5432 write_tess_factors(struct nir_to_llvm_context
*ctx
)
5434 unsigned stride
, outer_comps
, inner_comps
;
5435 struct ac_build_if_state if_ctx
, inner_if_ctx
;
5436 LLVMValueRef invocation_id
= unpack_param(ctx
, ctx
->tcs_rel_ids
, 8, 5);
5437 LLVMValueRef rel_patch_id
= unpack_param(ctx
, ctx
->tcs_rel_ids
, 0, 8);
5438 unsigned tess_inner_index
, tess_outer_index
;
5439 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
5440 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
5444 switch (ctx
->options
->key
.tcs
.primitive_mode
) {
5464 ac_nir_build_if(&if_ctx
, ctx
,
5465 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
5466 invocation_id
, ctx
->i32zero
, ""));
5468 tess_inner_index
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER
);
5469 tess_outer_index
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER
);
5471 mark_tess_output(ctx
, true, tess_inner_index
);
5472 mark_tess_output(ctx
, true, tess_outer_index
);
5473 lds_base
= get_tcs_out_current_patch_data_offset(ctx
);
5474 lds_inner
= LLVMBuildAdd(ctx
->builder
, lds_base
,
5475 LLVMConstInt(ctx
->i32
, tess_inner_index
* 4, false), "");
5476 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_base
,
5477 LLVMConstInt(ctx
->i32
, tess_outer_index
* 4, false), "");
5479 for (i
= 0; i
< 4; i
++) {
5480 inner
[i
] = LLVMGetUndef(ctx
->i32
);
5481 outer
[i
] = LLVMGetUndef(ctx
->i32
);
5485 if (ctx
->options
->key
.tcs
.primitive_mode
== GL_ISOLINES
) {
5486 outer
[0] = out
[1] = lds_load(ctx
, lds_outer
);
5487 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_outer
,
5488 LLVMConstInt(ctx
->i32
, 1, false), "");
5489 outer
[1] = out
[0] = lds_load(ctx
, lds_outer
);
5491 for (i
= 0; i
< outer_comps
; i
++) {
5493 lds_load(ctx
, lds_outer
);
5494 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_outer
,
5495 LLVMConstInt(ctx
->i32
, 1, false), "");
5497 for (i
= 0; i
< inner_comps
; i
++) {
5498 inner
[i
] = out
[outer_comps
+i
] =
5499 lds_load(ctx
, lds_inner
);
5500 lds_inner
= LLVMBuildAdd(ctx
->builder
, lds_inner
,
5501 LLVMConstInt(ctx
->i32
, 1, false), "");
5505 /* Convert the outputs to vectors for stores. */
5506 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
5510 vec1
= ac_build_gather_values(&ctx
->ac
, out
+ 4, stride
- 4);
5513 buffer
= ctx
->hs_ring_tess_factor
;
5514 tf_base
= ctx
->tess_factor_offset
;
5515 byteoffset
= LLVMBuildMul(ctx
->builder
, rel_patch_id
,
5516 LLVMConstInt(ctx
->i32
, 4 * stride
, false), "");
5518 ac_nir_build_if(&inner_if_ctx
, ctx
,
5519 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
5520 rel_patch_id
, ctx
->i32zero
, ""));
5522 /* Store the dynamic HS control word. */
5523 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
5524 LLVMConstInt(ctx
->i32
, 0x80000000, false),
5525 1, ctx
->i32zero
, tf_base
,
5526 0, 1, 0, true, false);
5527 ac_nir_build_endif(&inner_if_ctx
);
5529 /* Store the tessellation factors. */
5530 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
5531 MIN2(stride
, 4), byteoffset
, tf_base
,
5532 4, 1, 0, true, false);
5534 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
5535 stride
- 4, byteoffset
, tf_base
,
5536 20, 1, 0, true, false);
5538 //TODO store to offchip for TES to read - only if TES reads them
5540 LLVMValueRef inner_vec
, outer_vec
, tf_outer_offset
;
5541 LLVMValueRef tf_inner_offset
;
5542 unsigned param_outer
, param_inner
;
5544 param_outer
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER
);
5545 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, NULL
,
5546 LLVMConstInt(ctx
->i32
, param_outer
, 0));
5548 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
,
5549 util_next_power_of_two(outer_comps
));
5551 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, outer_vec
,
5552 outer_comps
, tf_outer_offset
,
5553 ctx
->oc_lds
, 0, 1, 0, true, false);
5555 param_inner
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER
);
5556 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, NULL
,
5557 LLVMConstInt(ctx
->i32
, param_inner
, 0));
5559 inner_vec
= inner_comps
== 1 ? inner
[0] :
5560 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
5561 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, inner_vec
,
5562 inner_comps
, tf_inner_offset
,
5563 ctx
->oc_lds
, 0, 1, 0, true, false);
5566 ac_nir_build_endif(&if_ctx
);
5570 handle_tcs_outputs_post(struct nir_to_llvm_context
*ctx
)
5572 write_tess_factors(ctx
);
5576 si_export_mrt_color(struct nir_to_llvm_context
*ctx
,
5577 LLVMValueRef
*color
, unsigned param
, bool is_last
,
5578 struct ac_export_args
*args
)
5581 si_llvm_init_export_args(ctx
, color
, param
,
5585 args
->valid_mask
= 1; /* whether the EXEC mask is valid */
5586 args
->done
= 1; /* DONE bit */
5587 } else if (!args
->enabled_channels
)
5588 return false; /* unnecessary NULL export */
5594 si_export_mrt_z(struct nir_to_llvm_context
*ctx
,
5595 LLVMValueRef depth
, LLVMValueRef stencil
,
5596 LLVMValueRef samplemask
)
5598 struct ac_export_args args
;
5600 args
.enabled_channels
= 0;
5601 args
.valid_mask
= 1;
5603 args
.target
= V_008DFC_SQ_EXP_MRTZ
;
5606 args
.out
[0] = LLVMGetUndef(ctx
->f32
); /* R, depth */
5607 args
.out
[1] = LLVMGetUndef(ctx
->f32
); /* G, stencil test val[0:7], stencil op val[8:15] */
5608 args
.out
[2] = LLVMGetUndef(ctx
->f32
); /* B, sample mask */
5609 args
.out
[3] = LLVMGetUndef(ctx
->f32
); /* A, alpha to mask */
5612 args
.out
[0] = depth
;
5613 args
.enabled_channels
|= 0x1;
5617 args
.out
[1] = stencil
;
5618 args
.enabled_channels
|= 0x2;
5622 args
.out
[2] = samplemask
;
5623 args
.enabled_channels
|= 0x4;
5626 /* SI (except OLAND) has a bug that it only looks
5627 * at the X writemask component. */
5628 if (ctx
->options
->chip_class
== SI
&&
5629 ctx
->options
->family
!= CHIP_OLAND
)
5630 args
.enabled_channels
|= 0x1;
5632 ac_build_export(&ctx
->ac
, &args
);
5636 handle_fs_outputs_post(struct nir_to_llvm_context
*ctx
)
5639 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
5640 struct ac_export_args color_args
[8];
5642 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5643 LLVMValueRef values
[4];
5645 if (!(ctx
->output_mask
& (1ull << i
)))
5648 if (i
== FRAG_RESULT_DEPTH
) {
5649 ctx
->shader_info
->fs
.writes_z
= true;
5650 depth
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5651 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
5652 } else if (i
== FRAG_RESULT_STENCIL
) {
5653 ctx
->shader_info
->fs
.writes_stencil
= true;
5654 stencil
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5655 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
5656 } else if (i
== FRAG_RESULT_SAMPLE_MASK
) {
5657 ctx
->shader_info
->fs
.writes_sample_mask
= true;
5658 samplemask
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5659 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
5662 for (unsigned j
= 0; j
< 4; j
++)
5663 values
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5664 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5666 if (!ctx
->shader_info
->fs
.writes_z
&& !ctx
->shader_info
->fs
.writes_stencil
&& !ctx
->shader_info
->fs
.writes_sample_mask
)
5667 last
= ctx
->output_mask
<= ((1ull << (i
+ 1)) - 1);
5669 bool ret
= si_export_mrt_color(ctx
, values
, V_008DFC_SQ_EXP_MRT
+ (i
- FRAG_RESULT_DATA0
), last
, &color_args
[index
]);
5675 for (unsigned i
= 0; i
< index
; i
++)
5676 ac_build_export(&ctx
->ac
, &color_args
[i
]);
5677 if (depth
|| stencil
|| samplemask
)
5678 si_export_mrt_z(ctx
, depth
, stencil
, samplemask
);
5680 si_export_mrt_color(ctx
, NULL
, V_008DFC_SQ_EXP_NULL
, true, &color_args
[0]);
5681 ac_build_export(&ctx
->ac
, &color_args
[0]);
5684 ctx
->shader_info
->fs
.output_mask
= index
? ((1ull << index
) - 1) : 0;
5688 emit_gs_epilogue(struct nir_to_llvm_context
*ctx
)
5690 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
, ctx
->gs_wave_id
);
5694 handle_shader_outputs_post(struct nir_to_llvm_context
*ctx
)
5696 switch (ctx
->stage
) {
5697 case MESA_SHADER_VERTEX
:
5698 if (ctx
->options
->key
.vs
.as_ls
)
5699 handle_ls_outputs_post(ctx
);
5700 else if (ctx
->options
->key
.vs
.as_es
)
5701 handle_es_outputs_post(ctx
, &ctx
->shader_info
->vs
.es_info
);
5703 handle_vs_outputs_post(ctx
, &ctx
->shader_info
->vs
.outinfo
);
5705 case MESA_SHADER_FRAGMENT
:
5706 handle_fs_outputs_post(ctx
);
5708 case MESA_SHADER_GEOMETRY
:
5709 emit_gs_epilogue(ctx
);
5711 case MESA_SHADER_TESS_CTRL
:
5712 handle_tcs_outputs_post(ctx
);
5714 case MESA_SHADER_TESS_EVAL
:
5715 if (ctx
->options
->key
.tes
.as_es
)
5716 handle_es_outputs_post(ctx
, &ctx
->shader_info
->tes
.es_info
);
5718 handle_vs_outputs_post(ctx
, &ctx
->shader_info
->tes
.outinfo
);
5726 handle_shared_compute_var(struct nir_to_llvm_context
*ctx
,
5727 struct nir_variable
*variable
, uint32_t *offset
, int idx
)
5729 unsigned size
= glsl_count_attribute_slots(variable
->type
, false);
5730 variable
->data
.driver_location
= *offset
;
5734 static void ac_llvm_finalize_module(struct nir_to_llvm_context
* ctx
)
5736 LLVMPassManagerRef passmgr
;
5737 /* Create the pass manager */
5738 passmgr
= LLVMCreateFunctionPassManagerForModule(
5741 /* This pass should eliminate all the load and store instructions */
5742 LLVMAddPromoteMemoryToRegisterPass(passmgr
);
5744 /* Add some optimization passes */
5745 LLVMAddScalarReplAggregatesPass(passmgr
);
5746 LLVMAddLICMPass(passmgr
);
5747 LLVMAddAggressiveDCEPass(passmgr
);
5748 LLVMAddCFGSimplificationPass(passmgr
);
5749 LLVMAddInstructionCombiningPass(passmgr
);
5752 LLVMInitializeFunctionPassManager(passmgr
);
5753 LLVMRunFunctionPassManager(passmgr
, ctx
->main_function
);
5754 LLVMFinalizeFunctionPassManager(passmgr
);
5756 LLVMDisposeBuilder(ctx
->builder
);
5757 LLVMDisposePassManager(passmgr
);
5761 ac_nir_eliminate_const_vs_outputs(struct nir_to_llvm_context
*ctx
)
5763 struct ac_vs_output_info
*outinfo
;
5765 switch (ctx
->stage
) {
5766 case MESA_SHADER_FRAGMENT
:
5767 case MESA_SHADER_COMPUTE
:
5768 case MESA_SHADER_TESS_CTRL
:
5769 case MESA_SHADER_GEOMETRY
:
5771 case MESA_SHADER_VERTEX
:
5772 if (ctx
->options
->key
.vs
.as_ls
||
5773 ctx
->options
->key
.vs
.as_es
)
5775 outinfo
= &ctx
->shader_info
->vs
.outinfo
;
5777 case MESA_SHADER_TESS_EVAL
:
5778 if (ctx
->options
->key
.vs
.as_es
)
5780 outinfo
= &ctx
->shader_info
->tes
.outinfo
;
5783 unreachable("Unhandled shader type");
5786 ac_optimize_vs_outputs(&ctx
->ac
,
5788 outinfo
->vs_output_param_offset
,
5790 &outinfo
->param_exports
);
5794 ac_setup_rings(struct nir_to_llvm_context
*ctx
)
5796 if ((ctx
->stage
== MESA_SHADER_VERTEX
&& ctx
->options
->key
.vs
.as_es
) ||
5797 (ctx
->stage
== MESA_SHADER_TESS_EVAL
&& ctx
->options
->key
.tes
.as_es
)) {
5798 ctx
->esgs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_ESGS_VS
, false));
5801 if (ctx
->is_gs_copy_shader
) {
5802 ctx
->gsvs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_GSVS_VS
, false));
5804 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
5806 ctx
->esgs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_ESGS_GS
, false));
5807 ctx
->gsvs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_GSVS_GS
, false));
5809 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v4i32
, "");
5811 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->gsvs_num_entries
, LLVMConstInt(ctx
->i32
, 2, false), "");
5812 tmp
= LLVMBuildExtractElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->i32one
, "");
5813 tmp
= LLVMBuildOr(ctx
->builder
, tmp
, ctx
->gsvs_ring_stride
, "");
5814 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, tmp
, ctx
->i32one
, "");
5816 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v16i8
, "");
5819 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
||
5820 ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
5821 ctx
->hs_ring_tess_offchip
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_HS_TESS_OFFCHIP
, false));
5822 ctx
->hs_ring_tess_factor
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_HS_TESS_FACTOR
, false));
5827 ac_nir_get_max_workgroup_size(enum chip_class chip_class
,
5828 const struct nir_shader
*nir
)
5830 switch (nir
->stage
) {
5831 case MESA_SHADER_TESS_CTRL
:
5832 return chip_class
>= CIK
? 128 : 64;
5833 case MESA_SHADER_GEOMETRY
:
5835 case MESA_SHADER_COMPUTE
:
5841 unsigned max_workgroup_size
= nir
->info
.cs
.local_size
[0] *
5842 nir
->info
.cs
.local_size
[1] *
5843 nir
->info
.cs
.local_size
[2];
5844 return max_workgroup_size
;
5848 LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm
,
5849 struct nir_shader
*nir
,
5850 struct ac_shader_variant_info
*shader_info
,
5851 const struct ac_nir_compiler_options
*options
)
5853 struct nir_to_llvm_context ctx
= {0};
5854 struct nir_function
*func
;
5856 ctx
.options
= options
;
5857 ctx
.shader_info
= shader_info
;
5858 ctx
.context
= LLVMContextCreate();
5859 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
5861 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
5862 ctx
.ac
.module
= ctx
.module
;
5864 ctx
.has_ds_bpermute
= ctx
.options
->chip_class
>= VI
;
5866 memset(shader_info
, 0, sizeof(*shader_info
));
5868 ac_nir_shader_info_pass(nir
, options
, &shader_info
->info
);
5870 LLVMSetTarget(ctx
.module
, options
->supports_spill
? "amdgcn-mesa-mesa3d" : "amdgcn--");
5872 LLVMTargetDataRef data_layout
= LLVMCreateTargetDataLayout(tm
);
5873 char *data_layout_str
= LLVMCopyStringRepOfTargetData(data_layout
);
5874 LLVMSetDataLayout(ctx
.module
, data_layout_str
);
5875 LLVMDisposeTargetData(data_layout
);
5876 LLVMDisposeMessage(data_layout_str
);
5880 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
5881 ctx
.ac
.builder
= ctx
.builder
;
5882 ctx
.stage
= nir
->stage
;
5883 ctx
.max_workgroup_size
= ac_nir_get_max_workgroup_size(ctx
.options
->chip_class
, nir
);
5885 for (i
= 0; i
< AC_UD_MAX_SETS
; i
++)
5886 shader_info
->user_sgprs_locs
.descriptor_sets
[i
].sgpr_idx
= -1;
5887 for (i
= 0; i
< AC_UD_MAX_UD
; i
++)
5888 shader_info
->user_sgprs_locs
.shader_data
[i
].sgpr_idx
= -1;
5890 create_function(&ctx
);
5892 if (nir
->stage
== MESA_SHADER_COMPUTE
) {
5894 nir_foreach_variable(variable
, &nir
->shared
)
5898 uint32_t shared_size
= 0;
5900 LLVMTypeRef i8p
= LLVMPointerType(ctx
.i8
, LOCAL_ADDR_SPACE
);
5901 nir_foreach_variable(variable
, &nir
->shared
) {
5902 handle_shared_compute_var(&ctx
, variable
, &shared_size
, idx
);
5907 var
= LLVMAddGlobalInAddressSpace(ctx
.module
,
5908 LLVMArrayType(ctx
.i8
, shared_size
),
5911 LLVMSetAlignment(var
, 4);
5912 ctx
.shared_memory
= LLVMBuildBitCast(ctx
.builder
, var
, i8p
, "");
5914 } else if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
5915 ctx
.gs_next_vertex
= ac_build_alloca(&ctx
, ctx
.i32
, "gs_next_vertex");
5917 ctx
.gs_max_out_vertices
= nir
->info
.gs
.vertices_out
;
5918 } else if (nir
->stage
== MESA_SHADER_TESS_EVAL
) {
5919 ctx
.tes_primitive_mode
= nir
->info
.tess
.primitive_mode
;
5922 ac_setup_rings(&ctx
);
5924 nir_foreach_variable(variable
, &nir
->inputs
)
5925 handle_shader_input_decl(&ctx
, variable
);
5927 if (nir
->stage
== MESA_SHADER_FRAGMENT
)
5928 handle_fs_inputs_pre(&ctx
, nir
);
5930 ctx
.num_output_clips
= nir
->info
.clip_distance_array_size
;
5931 ctx
.num_output_culls
= nir
->info
.cull_distance_array_size
;
5933 nir_foreach_variable(variable
, &nir
->outputs
)
5934 handle_shader_output_decl(&ctx
, variable
);
5936 ctx
.defs
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
5937 _mesa_key_pointer_equal
);
5938 ctx
.phis
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
5939 _mesa_key_pointer_equal
);
5941 func
= (struct nir_function
*)exec_list_get_head(&nir
->functions
);
5943 setup_locals(&ctx
, func
);
5945 visit_cf_list(&ctx
, &func
->impl
->body
);
5946 phi_post_pass(&ctx
);
5948 handle_shader_outputs_post(&ctx
);
5949 LLVMBuildRetVoid(ctx
.builder
);
5951 ac_llvm_finalize_module(&ctx
);
5953 ac_nir_eliminate_const_vs_outputs(&ctx
);
5955 ralloc_free(ctx
.defs
);
5956 ralloc_free(ctx
.phis
);
5958 if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
5959 unsigned addclip
= ctx
.num_output_clips
+ ctx
.num_output_culls
> 4;
5960 shader_info
->gs
.gsvs_vertex_size
= (util_bitcount64(ctx
.output_mask
) + addclip
) * 16;
5961 shader_info
->gs
.max_gsvs_emit_size
= shader_info
->gs
.gsvs_vertex_size
*
5962 nir
->info
.gs
.vertices_out
;
5963 } else if (nir
->stage
== MESA_SHADER_TESS_CTRL
) {
5964 shader_info
->tcs
.outputs_written
= ctx
.tess_outputs_written
;
5965 shader_info
->tcs
.patch_outputs_written
= ctx
.tess_patch_outputs_written
;
5966 } else if (nir
->stage
== MESA_SHADER_VERTEX
&& ctx
.options
->key
.vs
.as_ls
) {
5967 shader_info
->vs
.outputs_written
= ctx
.tess_outputs_written
;
5973 static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di
, void *context
)
5975 unsigned *retval
= (unsigned *)context
;
5976 LLVMDiagnosticSeverity severity
= LLVMGetDiagInfoSeverity(di
);
5977 char *description
= LLVMGetDiagInfoDescription(di
);
5979 if (severity
== LLVMDSError
) {
5981 fprintf(stderr
, "LLVM triggered Diagnostic Handler: %s\n",
5985 LLVMDisposeMessage(description
);
5988 static unsigned ac_llvm_compile(LLVMModuleRef M
,
5989 struct ac_shader_binary
*binary
,
5990 LLVMTargetMachineRef tm
)
5992 unsigned retval
= 0;
5994 LLVMContextRef llvm_ctx
;
5995 LLVMMemoryBufferRef out_buffer
;
5996 unsigned buffer_size
;
5997 const char *buffer_data
;
6000 /* Setup Diagnostic Handler*/
6001 llvm_ctx
= LLVMGetModuleContext(M
);
6003 LLVMContextSetDiagnosticHandler(llvm_ctx
, ac_diagnostic_handler
,
6007 mem_err
= LLVMTargetMachineEmitToMemoryBuffer(tm
, M
, LLVMObjectFile
,
6010 /* Process Errors/Warnings */
6012 fprintf(stderr
, "%s: %s", __FUNCTION__
, err
);
6018 /* Extract Shader Code*/
6019 buffer_size
= LLVMGetBufferSize(out_buffer
);
6020 buffer_data
= LLVMGetBufferStart(out_buffer
);
6022 ac_elf_read(buffer_data
, buffer_size
, binary
);
6025 LLVMDisposeMemoryBuffer(out_buffer
);
6031 static void ac_compile_llvm_module(LLVMTargetMachineRef tm
,
6032 LLVMModuleRef llvm_module
,
6033 struct ac_shader_binary
*binary
,
6034 struct ac_shader_config
*config
,
6035 struct ac_shader_variant_info
*shader_info
,
6036 gl_shader_stage stage
,
6037 bool dump_shader
, bool supports_spill
)
6040 ac_dump_module(llvm_module
);
6042 memset(binary
, 0, sizeof(*binary
));
6043 int v
= ac_llvm_compile(llvm_module
, binary
, tm
);
6045 fprintf(stderr
, "compile failed\n");
6049 fprintf(stderr
, "disasm:\n%s\n", binary
->disasm_string
);
6051 ac_shader_binary_read_config(binary
, config
, 0, supports_spill
);
6053 LLVMContextRef ctx
= LLVMGetModuleContext(llvm_module
);
6054 LLVMDisposeModule(llvm_module
);
6055 LLVMContextDispose(ctx
);
6057 if (stage
== MESA_SHADER_FRAGMENT
) {
6058 shader_info
->num_input_vgprs
= 0;
6059 if (G_0286CC_PERSP_SAMPLE_ENA(config
->spi_ps_input_addr
))
6060 shader_info
->num_input_vgprs
+= 2;
6061 if (G_0286CC_PERSP_CENTER_ENA(config
->spi_ps_input_addr
))
6062 shader_info
->num_input_vgprs
+= 2;
6063 if (G_0286CC_PERSP_CENTROID_ENA(config
->spi_ps_input_addr
))
6064 shader_info
->num_input_vgprs
+= 2;
6065 if (G_0286CC_PERSP_PULL_MODEL_ENA(config
->spi_ps_input_addr
))
6066 shader_info
->num_input_vgprs
+= 3;
6067 if (G_0286CC_LINEAR_SAMPLE_ENA(config
->spi_ps_input_addr
))
6068 shader_info
->num_input_vgprs
+= 2;
6069 if (G_0286CC_LINEAR_CENTER_ENA(config
->spi_ps_input_addr
))
6070 shader_info
->num_input_vgprs
+= 2;
6071 if (G_0286CC_LINEAR_CENTROID_ENA(config
->spi_ps_input_addr
))
6072 shader_info
->num_input_vgprs
+= 2;
6073 if (G_0286CC_LINE_STIPPLE_TEX_ENA(config
->spi_ps_input_addr
))
6074 shader_info
->num_input_vgprs
+= 1;
6075 if (G_0286CC_POS_X_FLOAT_ENA(config
->spi_ps_input_addr
))
6076 shader_info
->num_input_vgprs
+= 1;
6077 if (G_0286CC_POS_Y_FLOAT_ENA(config
->spi_ps_input_addr
))
6078 shader_info
->num_input_vgprs
+= 1;
6079 if (G_0286CC_POS_Z_FLOAT_ENA(config
->spi_ps_input_addr
))
6080 shader_info
->num_input_vgprs
+= 1;
6081 if (G_0286CC_POS_W_FLOAT_ENA(config
->spi_ps_input_addr
))
6082 shader_info
->num_input_vgprs
+= 1;
6083 if (G_0286CC_FRONT_FACE_ENA(config
->spi_ps_input_addr
))
6084 shader_info
->num_input_vgprs
+= 1;
6085 if (G_0286CC_ANCILLARY_ENA(config
->spi_ps_input_addr
))
6086 shader_info
->num_input_vgprs
+= 1;
6087 if (G_0286CC_SAMPLE_COVERAGE_ENA(config
->spi_ps_input_addr
))
6088 shader_info
->num_input_vgprs
+= 1;
6089 if (G_0286CC_POS_FIXED_PT_ENA(config
->spi_ps_input_addr
))
6090 shader_info
->num_input_vgprs
+= 1;
6092 config
->num_vgprs
= MAX2(config
->num_vgprs
, shader_info
->num_input_vgprs
);
6094 /* +3 for scratch wave offset and VCC */
6095 config
->num_sgprs
= MAX2(config
->num_sgprs
,
6096 shader_info
->num_input_sgprs
+ 3);
6099 void ac_compile_nir_shader(LLVMTargetMachineRef tm
,
6100 struct ac_shader_binary
*binary
,
6101 struct ac_shader_config
*config
,
6102 struct ac_shader_variant_info
*shader_info
,
6103 struct nir_shader
*nir
,
6104 const struct ac_nir_compiler_options
*options
,
6108 LLVMModuleRef llvm_module
= ac_translate_nir_to_llvm(tm
, nir
, shader_info
,
6111 ac_compile_llvm_module(tm
, llvm_module
, binary
, config
, shader_info
, nir
->stage
, dump_shader
, options
->supports_spill
);
6112 switch (nir
->stage
) {
6113 case MESA_SHADER_COMPUTE
:
6114 for (int i
= 0; i
< 3; ++i
)
6115 shader_info
->cs
.block_size
[i
] = nir
->info
.cs
.local_size
[i
];
6117 case MESA_SHADER_FRAGMENT
:
6118 shader_info
->fs
.early_fragment_test
= nir
->info
.fs
.early_fragment_tests
;
6120 case MESA_SHADER_GEOMETRY
:
6121 shader_info
->gs
.vertices_in
= nir
->info
.gs
.vertices_in
;
6122 shader_info
->gs
.vertices_out
= nir
->info
.gs
.vertices_out
;
6123 shader_info
->gs
.output_prim
= nir
->info
.gs
.output_primitive
;
6124 shader_info
->gs
.invocations
= nir
->info
.gs
.invocations
;
6126 case MESA_SHADER_TESS_EVAL
:
6127 shader_info
->tes
.primitive_mode
= nir
->info
.tess
.primitive_mode
;
6128 shader_info
->tes
.spacing
= nir
->info
.tess
.spacing
;
6129 shader_info
->tes
.ccw
= nir
->info
.tess
.ccw
;
6130 shader_info
->tes
.point_mode
= nir
->info
.tess
.point_mode
;
6131 shader_info
->tes
.as_es
= options
->key
.tes
.as_es
;
6133 case MESA_SHADER_TESS_CTRL
:
6134 shader_info
->tcs
.tcs_vertices_out
= nir
->info
.tess
.tcs_vertices_out
;
6136 case MESA_SHADER_VERTEX
:
6137 shader_info
->vs
.as_es
= options
->key
.vs
.as_es
;
6138 shader_info
->vs
.as_ls
= options
->key
.vs
.as_ls
;
6139 /* in LS mode we need at least 1, invocation id needs 3, handled elsewhere */
6140 if (options
->key
.vs
.as_ls
)
6141 shader_info
->vs
.vgpr_comp_cnt
= MAX2(1, shader_info
->vs
.vgpr_comp_cnt
);
6149 ac_gs_copy_shader_emit(struct nir_to_llvm_context
*ctx
)
6151 LLVMValueRef args
[9];
6152 args
[0] = ctx
->gsvs_ring
;
6153 args
[1] = LLVMBuildMul(ctx
->builder
, ctx
->vertex_id
, LLVMConstInt(ctx
->i32
, 4, false), "");
6154 args
[3] = ctx
->i32zero
;
6155 args
[4] = ctx
->i32one
; /* OFFEN */
6156 args
[5] = ctx
->i32zero
; /* IDXEN */
6157 args
[6] = ctx
->i32one
; /* GLC */
6158 args
[7] = ctx
->i32one
; /* SLC */
6159 args
[8] = ctx
->i32zero
; /* TFE */
6163 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
6167 if (!(ctx
->output_mask
& (1ull << i
)))
6170 if (i
== VARYING_SLOT_CLIP_DIST0
) {
6171 /* unpack clip and cull from a single set of slots */
6172 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
6177 for (unsigned j
= 0; j
< length
; j
++) {
6179 args
[2] = LLVMConstInt(ctx
->i32
,
6181 ctx
->gs_max_out_vertices
* 16 * 4, false);
6183 value
= ac_build_intrinsic(&ctx
->ac
,
6184 "llvm.SI.buffer.load.dword.i32.i32",
6186 AC_FUNC_ATTR_READONLY
|
6187 AC_FUNC_ATTR_LEGACY
);
6189 LLVMBuildStore(ctx
->builder
,
6190 to_float(ctx
, value
), ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)]);
6194 handle_vs_outputs_post(ctx
, &ctx
->shader_info
->vs
.outinfo
);
6197 void ac_create_gs_copy_shader(LLVMTargetMachineRef tm
,
6198 struct nir_shader
*geom_shader
,
6199 struct ac_shader_binary
*binary
,
6200 struct ac_shader_config
*config
,
6201 struct ac_shader_variant_info
*shader_info
,
6202 const struct ac_nir_compiler_options
*options
,
6205 struct nir_to_llvm_context ctx
= {0};
6206 ctx
.context
= LLVMContextCreate();
6207 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
6208 ctx
.options
= options
;
6209 ctx
.shader_info
= shader_info
;
6211 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
6212 ctx
.ac
.module
= ctx
.module
;
6214 ctx
.is_gs_copy_shader
= true;
6215 LLVMSetTarget(ctx
.module
, "amdgcn--");
6218 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
6219 ctx
.ac
.builder
= ctx
.builder
;
6220 ctx
.stage
= MESA_SHADER_VERTEX
;
6222 create_function(&ctx
);
6224 ctx
.gs_max_out_vertices
= geom_shader
->info
.gs
.vertices_out
;
6225 ac_setup_rings(&ctx
);
6227 ctx
.num_output_clips
= geom_shader
->info
.clip_distance_array_size
;
6228 ctx
.num_output_culls
= geom_shader
->info
.cull_distance_array_size
;
6230 nir_foreach_variable(variable
, &geom_shader
->outputs
)
6231 handle_shader_output_decl(&ctx
, variable
);
6233 ac_gs_copy_shader_emit(&ctx
);
6235 LLVMBuildRetVoid(ctx
.builder
);
6237 ac_llvm_finalize_module(&ctx
);
6239 ac_compile_llvm_module(tm
, ctx
.module
, binary
, config
, shader_info
,
6241 dump_shader
, options
->supports_spill
);