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ac/nir_to_llvm: fix regression in bindless support
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41
42 LLVMValueRef *ssa_defs;
43
44 struct hash_table *defs;
45 struct hash_table *phis;
46 struct hash_table *vars;
47
48 LLVMValueRef main_function;
49 LLVMBasicBlockRef continue_block;
50 LLVMBasicBlockRef break_block;
51
52 int num_locals;
53 LLVMValueRef *locals;
54 };
55
56 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
57 nir_deref_instr *deref_instr,
58 enum ac_descriptor_type desc_type,
59 const nir_tex_instr *instr,
60 bool image, bool write);
61
62 static void
63 build_store_values_extended(struct ac_llvm_context *ac,
64 LLVMValueRef *values,
65 unsigned value_count,
66 unsigned value_stride,
67 LLVMValueRef vec)
68 {
69 LLVMBuilderRef builder = ac->builder;
70 unsigned i;
71
72 for (i = 0; i < value_count; i++) {
73 LLVMValueRef ptr = values[i * value_stride];
74 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
75 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
76 LLVMBuildStore(builder, value, ptr);
77 }
78 }
79
80 static enum ac_image_dim
81 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
82 bool is_array)
83 {
84 switch (dim) {
85 case GLSL_SAMPLER_DIM_1D:
86 if (ctx->chip_class >= GFX9)
87 return is_array ? ac_image_2darray : ac_image_2d;
88 return is_array ? ac_image_1darray : ac_image_1d;
89 case GLSL_SAMPLER_DIM_2D:
90 case GLSL_SAMPLER_DIM_RECT:
91 case GLSL_SAMPLER_DIM_EXTERNAL:
92 return is_array ? ac_image_2darray : ac_image_2d;
93 case GLSL_SAMPLER_DIM_3D:
94 return ac_image_3d;
95 case GLSL_SAMPLER_DIM_CUBE:
96 return ac_image_cube;
97 case GLSL_SAMPLER_DIM_MS:
98 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
99 case GLSL_SAMPLER_DIM_SUBPASS:
100 return ac_image_2darray;
101 case GLSL_SAMPLER_DIM_SUBPASS_MS:
102 return ac_image_2darraymsaa;
103 default:
104 unreachable("bad sampler dim");
105 }
106 }
107
108 static enum ac_image_dim
109 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
110 bool is_array)
111 {
112 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
113
114 if (dim == ac_image_cube ||
115 (ctx->chip_class <= VI && dim == ac_image_3d))
116 dim = ac_image_2darray;
117
118 return dim;
119 }
120
121 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
122 const nir_ssa_def *def)
123 {
124 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
125 if (def->num_components > 1) {
126 type = LLVMVectorType(type, def->num_components);
127 }
128 return type;
129 }
130
131 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
132 {
133 assert(src.is_ssa);
134 return nir->ssa_defs[src.ssa->index];
135 }
136
137 static LLVMValueRef
138 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
139 {
140 LLVMValueRef ptr = get_src(ctx, src);
141 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
142 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
143
144 return LLVMBuildBitCast(ctx->ac.builder, ptr,
145 LLVMPointerType(ctx->ac.i32, addr_space), "");
146 }
147
148 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
149 const struct nir_block *b)
150 {
151 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
152 return (LLVMBasicBlockRef)entry->data;
153 }
154
155 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
156 nir_alu_src src,
157 unsigned num_components)
158 {
159 LLVMValueRef value = get_src(ctx, src.src);
160 bool need_swizzle = false;
161
162 assert(value);
163 unsigned src_components = ac_get_llvm_num_components(value);
164 for (unsigned i = 0; i < num_components; ++i) {
165 assert(src.swizzle[i] < src_components);
166 if (src.swizzle[i] != i)
167 need_swizzle = true;
168 }
169
170 if (need_swizzle || num_components != src_components) {
171 LLVMValueRef masks[] = {
172 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
173 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
174 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
175 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
176
177 if (src_components > 1 && num_components == 1) {
178 value = LLVMBuildExtractElement(ctx->ac.builder, value,
179 masks[0], "");
180 } else if (src_components == 1 && num_components > 1) {
181 LLVMValueRef values[] = {value, value, value, value};
182 value = ac_build_gather_values(&ctx->ac, values, num_components);
183 } else {
184 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
185 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
186 swizzle, "");
187 }
188 }
189 assert(!src.negate);
190 assert(!src.abs);
191 return value;
192 }
193
194 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
195 LLVMIntPredicate pred, LLVMValueRef src0,
196 LLVMValueRef src1)
197 {
198 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
199 return LLVMBuildSelect(ctx->builder, result,
200 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
201 ctx->i32_0, "");
202 }
203
204 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
205 LLVMRealPredicate pred, LLVMValueRef src0,
206 LLVMValueRef src1)
207 {
208 LLVMValueRef result;
209 src0 = ac_to_float(ctx, src0);
210 src1 = ac_to_float(ctx, src1);
211 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
212 return LLVMBuildSelect(ctx->builder, result,
213 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
214 ctx->i32_0, "");
215 }
216
217 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
218 const char *intrin,
219 LLVMTypeRef result_type,
220 LLVMValueRef src0)
221 {
222 char name[64];
223 LLVMValueRef params[] = {
224 ac_to_float(ctx, src0),
225 };
226
227 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
228 ac_get_elem_bits(ctx, result_type));
229 assert(length < sizeof(name));
230 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
231 }
232
233 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
234 const char *intrin,
235 LLVMTypeRef result_type,
236 LLVMValueRef src0, LLVMValueRef src1)
237 {
238 char name[64];
239 LLVMValueRef params[] = {
240 ac_to_float(ctx, src0),
241 ac_to_float(ctx, src1),
242 };
243
244 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
245 ac_get_elem_bits(ctx, result_type));
246 assert(length < sizeof(name));
247 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
248 }
249
250 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
251 const char *intrin,
252 LLVMTypeRef result_type,
253 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
254 {
255 char name[64];
256 LLVMValueRef params[] = {
257 ac_to_float(ctx, src0),
258 ac_to_float(ctx, src1),
259 ac_to_float(ctx, src2),
260 };
261
262 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
263 ac_get_elem_bits(ctx, result_type));
264 assert(length < sizeof(name));
265 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
266 }
267
268 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
269 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
270 {
271 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
272 ctx->i32_0, "");
273 return LLVMBuildSelect(ctx->builder, v,
274 ac_to_integer_or_pointer(ctx, src1),
275 ac_to_integer_or_pointer(ctx, src2), "");
276 }
277
278 static LLVMValueRef emit_minmax_int(struct ac_llvm_context *ctx,
279 LLVMIntPredicate pred,
280 LLVMValueRef src0, LLVMValueRef src1)
281 {
282 return LLVMBuildSelect(ctx->builder,
283 LLVMBuildICmp(ctx->builder, pred, src0, src1, ""),
284 src0,
285 src1, "");
286
287 }
288 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
289 LLVMValueRef src0)
290 {
291 return emit_minmax_int(ctx, LLVMIntSGT, src0,
292 LLVMBuildNeg(ctx->builder, src0, ""));
293 }
294
295 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
296 const char *intrin,
297 LLVMValueRef src0, LLVMValueRef src1)
298 {
299 LLVMTypeRef ret_type;
300 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
301 LLVMValueRef res;
302 LLVMValueRef params[] = { src0, src1 };
303 ret_type = LLVMStructTypeInContext(ctx->context, types,
304 2, true);
305
306 res = ac_build_intrinsic(ctx, intrin, ret_type,
307 params, 2, AC_FUNC_ATTR_READNONE);
308
309 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
310 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
311 return res;
312 }
313
314 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
315 LLVMValueRef src0,
316 unsigned bitsize)
317 {
318 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
319 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
320 "");
321 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
322
323 if (bitsize == 32)
324 return result;
325
326 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
327 }
328
329 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
330 LLVMValueRef src0)
331 {
332 src0 = ac_to_float(ctx, src0);
333 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
334 return LLVMBuildSExt(ctx->builder,
335 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
336 ctx->i32, "");
337 }
338
339 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
340 LLVMValueRef src0,
341 unsigned bitsize)
342 {
343 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
344
345 if (bitsize == 32)
346 return result;
347
348 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
349 }
350
351 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
352 LLVMValueRef src0)
353 {
354 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
355 return LLVMBuildSExt(ctx->builder,
356 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
357 ctx->i32, "");
358 }
359
360 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
361 LLVMValueRef src0)
362 {
363 LLVMValueRef result;
364 LLVMValueRef cond = NULL;
365
366 src0 = ac_to_float(ctx, src0);
367 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
368
369 if (ctx->chip_class >= VI) {
370 LLVMValueRef args[2];
371 /* Check if the result is a denormal - and flush to 0 if so. */
372 args[0] = result;
373 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
374 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
375 }
376
377 /* need to convert back up to f32 */
378 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
379
380 if (ctx->chip_class >= VI)
381 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
382 else {
383 /* for SI/CIK */
384 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
385 * so compare the result and flush to 0 if it's smaller.
386 */
387 LLVMValueRef temp, cond2;
388 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
389 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
390 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
391 temp, "");
392 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
393 temp, ctx->f32_0, "");
394 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
395 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
396 }
397 return result;
398 }
399
400 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
401 LLVMValueRef src0, LLVMValueRef src1)
402 {
403 LLVMValueRef dst64, result;
404 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
405 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
406
407 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
408 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
409 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
410 return result;
411 }
412
413 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
414 LLVMValueRef src0, LLVMValueRef src1)
415 {
416 LLVMValueRef dst64, result;
417 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
418 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
419
420 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
421 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
422 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
423 return result;
424 }
425
426 static LLVMValueRef emit_bitfield_extract(struct ac_llvm_context *ctx,
427 bool is_signed,
428 const LLVMValueRef srcs[3])
429 {
430 LLVMValueRef result;
431
432 if (HAVE_LLVM >= 0x0800) {
433 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
434 result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed);
435 result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, "");
436 } else {
437 /* FIXME: LLVM 7+ returns incorrect result when count is 0.
438 * https://bugs.freedesktop.org/show_bug.cgi?id=107276
439 */
440 LLVMValueRef zero = ctx->i32_0;
441 LLVMValueRef icond1 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
442 LLVMValueRef icond2 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], zero, "");
443
444 result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed);
445 result = LLVMBuildSelect(ctx->builder, icond1, srcs[0], result, "");
446 result = LLVMBuildSelect(ctx->builder, icond2, zero, result, "");
447 }
448
449 return result;
450 }
451
452 static LLVMValueRef emit_bitfield_insert(struct ac_llvm_context *ctx,
453 LLVMValueRef src0, LLVMValueRef src1,
454 LLVMValueRef src2, LLVMValueRef src3)
455 {
456 LLVMValueRef bfi_args[3], result;
457
458 bfi_args[0] = LLVMBuildShl(ctx->builder,
459 LLVMBuildSub(ctx->builder,
460 LLVMBuildShl(ctx->builder,
461 ctx->i32_1,
462 src3, ""),
463 ctx->i32_1, ""),
464 src2, "");
465 bfi_args[1] = LLVMBuildShl(ctx->builder, src1, src2, "");
466 bfi_args[2] = src0;
467
468 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, src3, LLVMConstInt(ctx->i32, 32, false), "");
469
470 /* Calculate:
471 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
472 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
473 */
474 result = LLVMBuildXor(ctx->builder, bfi_args[2],
475 LLVMBuildAnd(ctx->builder, bfi_args[0],
476 LLVMBuildXor(ctx->builder, bfi_args[1], bfi_args[2], ""), ""), "");
477
478 result = LLVMBuildSelect(ctx->builder, icond, src1, result, "");
479 return result;
480 }
481
482 static LLVMValueRef emit_pack_half_2x16(struct ac_llvm_context *ctx,
483 LLVMValueRef src0)
484 {
485 LLVMValueRef comp[2];
486
487 src0 = ac_to_float(ctx, src0);
488 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
489 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
490
491 return LLVMBuildBitCast(ctx->builder, ac_build_cvt_pkrtz_f16(ctx, comp),
492 ctx->i32, "");
493 }
494
495 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
496 LLVMValueRef src0)
497 {
498 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
499 LLVMValueRef temps[2], val;
500 int i;
501
502 for (i = 0; i < 2; i++) {
503 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
504 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
505 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
506 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
507 }
508 return ac_build_gather_values(ctx, temps, 2);
509 }
510
511 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
512 nir_op op,
513 LLVMValueRef src0)
514 {
515 unsigned mask;
516 int idx;
517 LLVMValueRef result;
518
519 if (op == nir_op_fddx_fine)
520 mask = AC_TID_MASK_LEFT;
521 else if (op == nir_op_fddy_fine)
522 mask = AC_TID_MASK_TOP;
523 else
524 mask = AC_TID_MASK_TOP_LEFT;
525
526 /* for DDX we want to next X pixel, DDY next Y pixel. */
527 if (op == nir_op_fddx_fine ||
528 op == nir_op_fddx_coarse ||
529 op == nir_op_fddx)
530 idx = 1;
531 else
532 idx = 2;
533
534 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
535 return result;
536 }
537
538 /*
539 * this takes an I,J coordinate pair,
540 * and works out the X and Y derivatives.
541 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
542 */
543 static LLVMValueRef emit_ddxy_interp(
544 struct ac_nir_context *ctx,
545 LLVMValueRef interp_ij)
546 {
547 LLVMValueRef result[4], a;
548 unsigned i;
549
550 for (i = 0; i < 2; i++) {
551 a = LLVMBuildExtractElement(ctx->ac.builder, interp_ij,
552 LLVMConstInt(ctx->ac.i32, i, false), "");
553 result[i] = emit_ddxy(ctx, nir_op_fddx, a);
554 result[2+i] = emit_ddxy(ctx, nir_op_fddy, a);
555 }
556 return ac_build_gather_values(&ctx->ac, result, 4);
557 }
558
559 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
560 {
561 LLVMValueRef src[4], result = NULL;
562 unsigned num_components = instr->dest.dest.ssa.num_components;
563 unsigned src_components;
564 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
565
566 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
567 switch (instr->op) {
568 case nir_op_vec2:
569 case nir_op_vec3:
570 case nir_op_vec4:
571 src_components = 1;
572 break;
573 case nir_op_pack_half_2x16:
574 src_components = 2;
575 break;
576 case nir_op_unpack_half_2x16:
577 src_components = 1;
578 break;
579 case nir_op_cube_face_coord:
580 case nir_op_cube_face_index:
581 src_components = 3;
582 break;
583 default:
584 src_components = num_components;
585 break;
586 }
587 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
588 src[i] = get_alu_src(ctx, instr->src[i], src_components);
589
590 switch (instr->op) {
591 case nir_op_fmov:
592 case nir_op_imov:
593 result = src[0];
594 break;
595 case nir_op_fneg:
596 src[0] = ac_to_float(&ctx->ac, src[0]);
597 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
598 break;
599 case nir_op_ineg:
600 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
601 break;
602 case nir_op_inot:
603 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
604 break;
605 case nir_op_iadd:
606 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
607 break;
608 case nir_op_fadd:
609 src[0] = ac_to_float(&ctx->ac, src[0]);
610 src[1] = ac_to_float(&ctx->ac, src[1]);
611 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
612 break;
613 case nir_op_fsub:
614 src[0] = ac_to_float(&ctx->ac, src[0]);
615 src[1] = ac_to_float(&ctx->ac, src[1]);
616 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
617 break;
618 case nir_op_isub:
619 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
620 break;
621 case nir_op_imul:
622 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
623 break;
624 case nir_op_imod:
625 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
626 break;
627 case nir_op_umod:
628 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
629 break;
630 case nir_op_fmod:
631 src[0] = ac_to_float(&ctx->ac, src[0]);
632 src[1] = ac_to_float(&ctx->ac, src[1]);
633 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
634 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
635 ac_to_float_type(&ctx->ac, def_type), result);
636 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
637 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
638 break;
639 case nir_op_frem:
640 src[0] = ac_to_float(&ctx->ac, src[0]);
641 src[1] = ac_to_float(&ctx->ac, src[1]);
642 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
643 break;
644 case nir_op_irem:
645 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
646 break;
647 case nir_op_idiv:
648 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
649 break;
650 case nir_op_udiv:
651 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
652 break;
653 case nir_op_fmul:
654 src[0] = ac_to_float(&ctx->ac, src[0]);
655 src[1] = ac_to_float(&ctx->ac, src[1]);
656 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
657 break;
658 case nir_op_frcp:
659 src[0] = ac_to_float(&ctx->ac, src[0]);
660 result = ac_build_fdiv(&ctx->ac, instr->dest.dest.ssa.bit_size == 32 ? ctx->ac.f32_1 : ctx->ac.f64_1,
661 src[0]);
662 break;
663 case nir_op_iand:
664 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
665 break;
666 case nir_op_ior:
667 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
668 break;
669 case nir_op_ixor:
670 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
671 break;
672 case nir_op_ishl:
673 result = LLVMBuildShl(ctx->ac.builder, src[0],
674 LLVMBuildZExt(ctx->ac.builder, src[1],
675 LLVMTypeOf(src[0]), ""),
676 "");
677 break;
678 case nir_op_ishr:
679 result = LLVMBuildAShr(ctx->ac.builder, src[0],
680 LLVMBuildZExt(ctx->ac.builder, src[1],
681 LLVMTypeOf(src[0]), ""),
682 "");
683 break;
684 case nir_op_ushr:
685 result = LLVMBuildLShr(ctx->ac.builder, src[0],
686 LLVMBuildZExt(ctx->ac.builder, src[1],
687 LLVMTypeOf(src[0]), ""),
688 "");
689 break;
690 case nir_op_ilt32:
691 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
692 break;
693 case nir_op_ine32:
694 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
695 break;
696 case nir_op_ieq32:
697 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
698 break;
699 case nir_op_ige32:
700 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
701 break;
702 case nir_op_ult32:
703 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
704 break;
705 case nir_op_uge32:
706 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
707 break;
708 case nir_op_feq32:
709 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
710 break;
711 case nir_op_fne32:
712 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
713 break;
714 case nir_op_flt32:
715 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
716 break;
717 case nir_op_fge32:
718 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
719 break;
720 case nir_op_fabs:
721 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
722 ac_to_float_type(&ctx->ac, def_type), src[0]);
723 break;
724 case nir_op_iabs:
725 result = emit_iabs(&ctx->ac, src[0]);
726 break;
727 case nir_op_imax:
728 result = emit_minmax_int(&ctx->ac, LLVMIntSGT, src[0], src[1]);
729 break;
730 case nir_op_imin:
731 result = emit_minmax_int(&ctx->ac, LLVMIntSLT, src[0], src[1]);
732 break;
733 case nir_op_umax:
734 result = emit_minmax_int(&ctx->ac, LLVMIntUGT, src[0], src[1]);
735 break;
736 case nir_op_umin:
737 result = emit_minmax_int(&ctx->ac, LLVMIntULT, src[0], src[1]);
738 break;
739 case nir_op_isign:
740 result = ac_build_isign(&ctx->ac, src[0],
741 instr->dest.dest.ssa.bit_size);
742 break;
743 case nir_op_fsign:
744 src[0] = ac_to_float(&ctx->ac, src[0]);
745 result = ac_build_fsign(&ctx->ac, src[0],
746 instr->dest.dest.ssa.bit_size);
747 break;
748 case nir_op_ffloor:
749 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
750 ac_to_float_type(&ctx->ac, def_type), src[0]);
751 break;
752 case nir_op_ftrunc:
753 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
754 ac_to_float_type(&ctx->ac, def_type), src[0]);
755 break;
756 case nir_op_fceil:
757 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
758 ac_to_float_type(&ctx->ac, def_type), src[0]);
759 break;
760 case nir_op_fround_even:
761 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
762 ac_to_float_type(&ctx->ac, def_type),src[0]);
763 break;
764 case nir_op_ffract:
765 src[0] = ac_to_float(&ctx->ac, src[0]);
766 result = ac_build_fract(&ctx->ac, src[0],
767 instr->dest.dest.ssa.bit_size);
768 break;
769 case nir_op_fsin:
770 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
771 ac_to_float_type(&ctx->ac, def_type), src[0]);
772 break;
773 case nir_op_fcos:
774 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
775 ac_to_float_type(&ctx->ac, def_type), src[0]);
776 break;
777 case nir_op_fsqrt:
778 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
779 ac_to_float_type(&ctx->ac, def_type), src[0]);
780 break;
781 case nir_op_fexp2:
782 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
783 ac_to_float_type(&ctx->ac, def_type), src[0]);
784 break;
785 case nir_op_flog2:
786 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
787 ac_to_float_type(&ctx->ac, def_type), src[0]);
788 break;
789 case nir_op_frsq:
790 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
791 ac_to_float_type(&ctx->ac, def_type), src[0]);
792 result = ac_build_fdiv(&ctx->ac, instr->dest.dest.ssa.bit_size == 32 ? ctx->ac.f32_1 : ctx->ac.f64_1,
793 result);
794 break;
795 case nir_op_frexp_exp:
796 src[0] = ac_to_float(&ctx->ac, src[0]);
797 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.exp.i32.f64",
798 ctx->ac.i32, src, 1, AC_FUNC_ATTR_READNONE);
799
800 break;
801 case nir_op_frexp_sig:
802 src[0] = ac_to_float(&ctx->ac, src[0]);
803 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.mant.f64",
804 ctx->ac.f64, src, 1, AC_FUNC_ATTR_READNONE);
805 break;
806 case nir_op_fmax:
807 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
808 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
809 if (ctx->ac.chip_class < GFX9 &&
810 instr->dest.dest.ssa.bit_size == 32) {
811 /* Only pre-GFX9 chips do not flush denorms. */
812 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
813 ac_to_float_type(&ctx->ac, def_type),
814 result);
815 }
816 break;
817 case nir_op_fmin:
818 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
819 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
820 if (ctx->ac.chip_class < GFX9 &&
821 instr->dest.dest.ssa.bit_size == 32) {
822 /* Only pre-GFX9 chips do not flush denorms. */
823 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
824 ac_to_float_type(&ctx->ac, def_type),
825 result);
826 }
827 break;
828 case nir_op_ffma:
829 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
830 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
831 break;
832 case nir_op_ldexp:
833 src[0] = ac_to_float(&ctx->ac, src[0]);
834 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 32)
835 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
836 else
837 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
838 break;
839 case nir_op_ibitfield_extract:
840 result = emit_bitfield_extract(&ctx->ac, true, src);
841 break;
842 case nir_op_ubitfield_extract:
843 result = emit_bitfield_extract(&ctx->ac, false, src);
844 break;
845 case nir_op_bitfield_insert:
846 result = emit_bitfield_insert(&ctx->ac, src[0], src[1], src[2], src[3]);
847 break;
848 case nir_op_bitfield_reverse:
849 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
850 break;
851 case nir_op_bit_count:
852 result = ac_build_bit_count(&ctx->ac, src[0]);
853 break;
854 case nir_op_vec2:
855 case nir_op_vec3:
856 case nir_op_vec4:
857 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
858 src[i] = ac_to_integer(&ctx->ac, src[i]);
859 result = ac_build_gather_values(&ctx->ac, src, num_components);
860 break;
861 case nir_op_f2i16:
862 case nir_op_f2i32:
863 case nir_op_f2i64:
864 src[0] = ac_to_float(&ctx->ac, src[0]);
865 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
866 break;
867 case nir_op_f2u16:
868 case nir_op_f2u32:
869 case nir_op_f2u64:
870 src[0] = ac_to_float(&ctx->ac, src[0]);
871 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
872 break;
873 case nir_op_i2f16:
874 case nir_op_i2f32:
875 case nir_op_i2f64:
876 src[0] = ac_to_integer(&ctx->ac, src[0]);
877 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
878 break;
879 case nir_op_u2f16:
880 case nir_op_u2f32:
881 case nir_op_u2f64:
882 src[0] = ac_to_integer(&ctx->ac, src[0]);
883 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
884 break;
885 case nir_op_f2f16_rtz:
886 src[0] = ac_to_float(&ctx->ac, src[0]);
887 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
888 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
889 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
890 break;
891 case nir_op_f2f16_rtne:
892 case nir_op_f2f16:
893 case nir_op_f2f32:
894 case nir_op_f2f64:
895 src[0] = ac_to_float(&ctx->ac, src[0]);
896 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
897 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
898 else
899 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
900 break;
901 case nir_op_u2u16:
902 case nir_op_u2u32:
903 case nir_op_u2u64:
904 src[0] = ac_to_integer(&ctx->ac, src[0]);
905 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
906 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
907 else
908 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
909 break;
910 case nir_op_i2i16:
911 case nir_op_i2i32:
912 case nir_op_i2i64:
913 src[0] = ac_to_integer(&ctx->ac, src[0]);
914 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
915 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
916 else
917 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
918 break;
919 case nir_op_b32csel:
920 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
921 break;
922 case nir_op_find_lsb:
923 src[0] = ac_to_integer(&ctx->ac, src[0]);
924 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
925 break;
926 case nir_op_ufind_msb:
927 src[0] = ac_to_integer(&ctx->ac, src[0]);
928 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
929 break;
930 case nir_op_ifind_msb:
931 src[0] = ac_to_integer(&ctx->ac, src[0]);
932 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
933 break;
934 case nir_op_uadd_carry:
935 src[0] = ac_to_integer(&ctx->ac, src[0]);
936 src[1] = ac_to_integer(&ctx->ac, src[1]);
937 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
938 break;
939 case nir_op_usub_borrow:
940 src[0] = ac_to_integer(&ctx->ac, src[0]);
941 src[1] = ac_to_integer(&ctx->ac, src[1]);
942 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
943 break;
944 case nir_op_b2f16:
945 case nir_op_b2f32:
946 case nir_op_b2f64:
947 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
948 break;
949 case nir_op_f2b32:
950 result = emit_f2b(&ctx->ac, src[0]);
951 break;
952 case nir_op_b2i16:
953 case nir_op_b2i32:
954 case nir_op_b2i64:
955 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
956 break;
957 case nir_op_i2b32:
958 src[0] = ac_to_integer(&ctx->ac, src[0]);
959 result = emit_i2b(&ctx->ac, src[0]);
960 break;
961 case nir_op_fquantize2f16:
962 result = emit_f2f16(&ctx->ac, src[0]);
963 break;
964 case nir_op_umul_high:
965 src[0] = ac_to_integer(&ctx->ac, src[0]);
966 src[1] = ac_to_integer(&ctx->ac, src[1]);
967 result = emit_umul_high(&ctx->ac, src[0], src[1]);
968 break;
969 case nir_op_imul_high:
970 src[0] = ac_to_integer(&ctx->ac, src[0]);
971 src[1] = ac_to_integer(&ctx->ac, src[1]);
972 result = emit_imul_high(&ctx->ac, src[0], src[1]);
973 break;
974 case nir_op_pack_half_2x16:
975 result = emit_pack_half_2x16(&ctx->ac, src[0]);
976 break;
977 case nir_op_unpack_half_2x16:
978 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
979 break;
980 case nir_op_fddx:
981 case nir_op_fddy:
982 case nir_op_fddx_fine:
983 case nir_op_fddy_fine:
984 case nir_op_fddx_coarse:
985 case nir_op_fddy_coarse:
986 result = emit_ddxy(ctx, instr->op, src[0]);
987 break;
988
989 case nir_op_unpack_64_2x32_split_x: {
990 assert(ac_get_llvm_num_components(src[0]) == 1);
991 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
992 ctx->ac.v2i32,
993 "");
994 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
995 ctx->ac.i32_0, "");
996 break;
997 }
998
999 case nir_op_unpack_64_2x32_split_y: {
1000 assert(ac_get_llvm_num_components(src[0]) == 1);
1001 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1002 ctx->ac.v2i32,
1003 "");
1004 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1005 ctx->ac.i32_1, "");
1006 break;
1007 }
1008
1009 case nir_op_pack_64_2x32_split: {
1010 LLVMValueRef tmp = LLVMGetUndef(ctx->ac.v2i32);
1011 tmp = ac_build_gather_values(&ctx->ac, src, 2);
1012 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1013 break;
1014 }
1015
1016 case nir_op_cube_face_coord: {
1017 src[0] = ac_to_float(&ctx->ac, src[0]);
1018 LLVMValueRef results[2];
1019 LLVMValueRef in[3];
1020 for (unsigned chan = 0; chan < 3; chan++)
1021 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1022 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1023 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1024 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1025 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1026 result = ac_build_gather_values(&ctx->ac, results, 2);
1027 break;
1028 }
1029
1030 case nir_op_cube_face_index: {
1031 src[0] = ac_to_float(&ctx->ac, src[0]);
1032 LLVMValueRef in[3];
1033 for (unsigned chan = 0; chan < 3; chan++)
1034 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1035 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1036 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1037 break;
1038 }
1039
1040 case nir_op_fmin3:
1041 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1042 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1043 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1044 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1045 break;
1046 case nir_op_umin3:
1047 result = emit_minmax_int(&ctx->ac, LLVMIntULT, src[0], src[1]);
1048 result = emit_minmax_int(&ctx->ac, LLVMIntULT, result, src[2]);
1049 break;
1050 case nir_op_imin3:
1051 result = emit_minmax_int(&ctx->ac, LLVMIntSLT, src[0], src[1]);
1052 result = emit_minmax_int(&ctx->ac, LLVMIntSLT, result, src[2]);
1053 break;
1054 case nir_op_fmax3:
1055 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1056 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1057 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1058 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1059 break;
1060 case nir_op_umax3:
1061 result = emit_minmax_int(&ctx->ac, LLVMIntUGT, src[0], src[1]);
1062 result = emit_minmax_int(&ctx->ac, LLVMIntUGT, result, src[2]);
1063 break;
1064 case nir_op_imax3:
1065 result = emit_minmax_int(&ctx->ac, LLVMIntSGT, src[0], src[1]);
1066 result = emit_minmax_int(&ctx->ac, LLVMIntSGT, result, src[2]);
1067 break;
1068 case nir_op_fmed3: {
1069 LLVMValueRef tmp1 = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1070 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1071 LLVMValueRef tmp2 = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1072 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1073 tmp2 = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1074 ac_to_float_type(&ctx->ac, def_type), tmp2, src[2]);
1075 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1076 ac_to_float_type(&ctx->ac, def_type), tmp1, tmp2);
1077 break;
1078 }
1079 case nir_op_imed3: {
1080 LLVMValueRef tmp1 = emit_minmax_int(&ctx->ac, LLVMIntSLT, src[0], src[1]);
1081 LLVMValueRef tmp2 = emit_minmax_int(&ctx->ac, LLVMIntSGT, src[0], src[1]);
1082 tmp2 = emit_minmax_int(&ctx->ac, LLVMIntSLT, tmp2, src[2]);
1083 result = emit_minmax_int(&ctx->ac, LLVMIntSGT, tmp1, tmp2);
1084 break;
1085 }
1086 case nir_op_umed3: {
1087 LLVMValueRef tmp1 = emit_minmax_int(&ctx->ac, LLVMIntULT, src[0], src[1]);
1088 LLVMValueRef tmp2 = emit_minmax_int(&ctx->ac, LLVMIntUGT, src[0], src[1]);
1089 tmp2 = emit_minmax_int(&ctx->ac, LLVMIntULT, tmp2, src[2]);
1090 result = emit_minmax_int(&ctx->ac, LLVMIntUGT, tmp1, tmp2);
1091 break;
1092 }
1093
1094 default:
1095 fprintf(stderr, "Unknown NIR alu instr: ");
1096 nir_print_instr(&instr->instr, stderr);
1097 fprintf(stderr, "\n");
1098 abort();
1099 }
1100
1101 if (result) {
1102 assert(instr->dest.dest.is_ssa);
1103 result = ac_to_integer_or_pointer(&ctx->ac, result);
1104 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1105 }
1106 }
1107
1108 static void visit_load_const(struct ac_nir_context *ctx,
1109 const nir_load_const_instr *instr)
1110 {
1111 LLVMValueRef values[4], value = NULL;
1112 LLVMTypeRef element_type =
1113 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1114
1115 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1116 switch (instr->def.bit_size) {
1117 case 16:
1118 values[i] = LLVMConstInt(element_type,
1119 instr->value.u16[i], false);
1120 break;
1121 case 32:
1122 values[i] = LLVMConstInt(element_type,
1123 instr->value.u32[i], false);
1124 break;
1125 case 64:
1126 values[i] = LLVMConstInt(element_type,
1127 instr->value.u64[i], false);
1128 break;
1129 default:
1130 fprintf(stderr,
1131 "unsupported nir load_const bit_size: %d\n",
1132 instr->def.bit_size);
1133 abort();
1134 }
1135 }
1136 if (instr->def.num_components > 1) {
1137 value = LLVMConstVector(values, instr->def.num_components);
1138 } else
1139 value = values[0];
1140
1141 ctx->ssa_defs[instr->def.index] = value;
1142 }
1143
1144 static LLVMValueRef
1145 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1146 {
1147 LLVMValueRef size =
1148 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1149 LLVMConstInt(ctx->ac.i32, 2, false), "");
1150
1151 /* VI only */
1152 if (ctx->ac.chip_class == VI && in_elements) {
1153 /* On VI, the descriptor contains the size in bytes,
1154 * but TXQ must return the size in elements.
1155 * The stride is always non-zero for resources using TXQ.
1156 */
1157 LLVMValueRef stride =
1158 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1159 ctx->ac.i32_1, "");
1160 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1161 LLVMConstInt(ctx->ac.i32, 16, false), "");
1162 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1163 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1164
1165 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1166 }
1167 return size;
1168 }
1169
1170 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1171 nir_variable *var,
1172 struct ac_image_args *args,
1173 const nir_tex_instr *instr)
1174 {
1175 const struct glsl_type *type = glsl_without_array(var->type);
1176 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1177 LLVMValueRef half_texel[2];
1178 LLVMValueRef compare_cube_wa = NULL;
1179 LLVMValueRef result;
1180
1181 //TODO Rect
1182 {
1183 struct ac_image_args txq_args = { 0 };
1184
1185 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1186 txq_args.opcode = ac_image_get_resinfo;
1187 txq_args.dmask = 0xf;
1188 txq_args.lod = ctx->i32_0;
1189 txq_args.resource = args->resource;
1190 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1191 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1192
1193 for (unsigned c = 0; c < 2; c++) {
1194 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1195 LLVMConstInt(ctx->i32, c, false), "");
1196 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1197 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1198 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1199 LLVMConstReal(ctx->f32, -0.5), "");
1200 }
1201 }
1202
1203 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1204
1205 for (unsigned c = 0; c < 2; c++) {
1206 LLVMValueRef tmp;
1207 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1208 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1209 }
1210
1211 /*
1212 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1213 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1214 * workaround by sampling using a scaled type and converting.
1215 * This is taken from amdgpu-pro shaders.
1216 */
1217 /* NOTE this produces some ugly code compared to amdgpu-pro,
1218 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1219 * and then reads them back. -pro generates two selects,
1220 * one s_cmp for the descriptor rewriting
1221 * one v_cmp for the coordinate and result changes.
1222 */
1223 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1224 LLVMValueRef tmp, tmp2;
1225
1226 /* workaround 8/8/8/8 uint/sint cube gather bug */
1227 /* first detect it then change to a scaled read and f2i */
1228 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1229 tmp2 = tmp;
1230
1231 /* extract the DATA_FORMAT */
1232 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1233 LLVMConstInt(ctx->i32, 6, false), false);
1234
1235 /* is the DATA_FORMAT == 8_8_8_8 */
1236 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1237
1238 if (stype == GLSL_TYPE_UINT)
1239 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1240 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1241 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1242 else
1243 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1244 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1245 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1246
1247 /* replace the NUM FORMAT in the descriptor */
1248 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT_GFX6, false), "");
1249 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1250
1251 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1252
1253 /* don't modify the coordinates for this case */
1254 for (unsigned c = 0; c < 2; ++c)
1255 args->coords[c] = LLVMBuildSelect(
1256 ctx->builder, compare_cube_wa,
1257 orig_coords[c], args->coords[c], "");
1258 }
1259
1260 args->attributes = AC_FUNC_ATTR_READNONE;
1261 result = ac_build_image_opcode(ctx, args);
1262
1263 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1264 LLVMValueRef tmp, tmp2;
1265
1266 /* if the cube workaround is in place, f2i the result. */
1267 for (unsigned c = 0; c < 4; c++) {
1268 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1269 if (stype == GLSL_TYPE_UINT)
1270 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1271 else
1272 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1273 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1274 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1275 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1276 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1277 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1278 }
1279 }
1280 return result;
1281 }
1282
1283 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1284 {
1285 nir_deref_instr *texture_deref_instr = NULL;
1286
1287 for (unsigned i = 0; i < instr->num_srcs; i++) {
1288 switch (instr->src[i].src_type) {
1289 case nir_tex_src_texture_deref:
1290 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1291 break;
1292 default:
1293 break;
1294 }
1295 }
1296 return texture_deref_instr;
1297 }
1298
1299 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1300 const nir_tex_instr *instr,
1301 struct ac_image_args *args)
1302 {
1303 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1304 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1305
1306 if (ctx->abi->gfx9_stride_size_workaround) {
1307 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1308 args->resource,
1309 args->coords[0],
1310 ctx->ac.i32_0,
1311 util_last_bit(mask),
1312 false, true);
1313 } else {
1314 return ac_build_buffer_load_format(&ctx->ac,
1315 args->resource,
1316 args->coords[0],
1317 ctx->ac.i32_0,
1318 util_last_bit(mask),
1319 false, true);
1320 }
1321 }
1322
1323 args->opcode = ac_image_sample;
1324
1325 switch (instr->op) {
1326 case nir_texop_txf:
1327 case nir_texop_txf_ms:
1328 case nir_texop_samples_identical:
1329 args->opcode = args->level_zero ||
1330 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1331 ac_image_load : ac_image_load_mip;
1332 args->level_zero = false;
1333 break;
1334 case nir_texop_txs:
1335 case nir_texop_query_levels:
1336 args->opcode = ac_image_get_resinfo;
1337 if (!args->lod)
1338 args->lod = ctx->ac.i32_0;
1339 args->level_zero = false;
1340 break;
1341 case nir_texop_tex:
1342 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1343 assert(!args->lod);
1344 args->level_zero = true;
1345 }
1346 break;
1347 case nir_texop_tg4:
1348 args->opcode = ac_image_gather4;
1349 args->level_zero = true;
1350 break;
1351 case nir_texop_lod:
1352 args->opcode = ac_image_get_lod;
1353 break;
1354 default:
1355 break;
1356 }
1357
1358 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= VI) {
1359 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1360 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1361 const struct glsl_type *type = glsl_without_array(var->type);
1362 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1363 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1364 return lower_gather4_integer(&ctx->ac, var, args, instr);
1365 }
1366 }
1367
1368 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1369 if (instr->op == nir_texop_lod && ctx->ac.chip_class >= GFX9) {
1370 if ((args->dim == ac_image_2darray ||
1371 args->dim == ac_image_2d) && !args->coords[1]) {
1372 args->coords[1] = ctx->ac.i32_0;
1373 }
1374 }
1375
1376 args->attributes = AC_FUNC_ATTR_READNONE;
1377 return ac_build_image_opcode(&ctx->ac, args);
1378 }
1379
1380 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1381 nir_intrinsic_instr *instr)
1382 {
1383 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1384 LLVMValueRef index = get_src(ctx, instr->src[1]);
1385
1386 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1387 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1388 return result;
1389 }
1390
1391 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1392 nir_intrinsic_instr *instr)
1393 {
1394 LLVMValueRef ptr, addr;
1395
1396 addr = LLVMConstInt(ctx->ac.i32, nir_intrinsic_base(instr), 0);
1397 addr = LLVMBuildAdd(ctx->ac.builder, addr,
1398 get_src(ctx, instr->src[0]), "");
1399
1400 ptr = ac_build_gep0(&ctx->ac, ctx->abi->push_constants, addr);
1401
1402 if (instr->dest.ssa.bit_size == 16) {
1403 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1404 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1405 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1406 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1407 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1408 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1409 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1410 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1411 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1412 LLVMConstInt(ctx->ac.i32, 4, false)};
1413 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1414 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1415 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1416 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1417 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1418 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1419 }
1420
1421 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1422
1423 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1424 }
1425
1426 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1427 const nir_intrinsic_instr *instr)
1428 {
1429 LLVMValueRef index = get_src(ctx, instr->src[0]);
1430
1431 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1432 }
1433
1434 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1435 {
1436 uint32_t new_mask = 0;
1437 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1438 if (mask & (1u << i))
1439 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1440 return new_mask;
1441 }
1442
1443 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1444 unsigned start, unsigned count)
1445 {
1446 LLVMValueRef mask[] = {
1447 ctx->i32_0, ctx->i32_1,
1448 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1449
1450 unsigned src_elements = ac_get_llvm_num_components(src);
1451
1452 if (count == src_elements) {
1453 assert(start == 0);
1454 return src;
1455 } else if (count == 1) {
1456 assert(start < src_elements);
1457 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1458 } else {
1459 assert(start + count <= src_elements);
1460 assert(count <= 4);
1461 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1462 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1463 }
1464 }
1465
1466 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1467 enum gl_access_qualifier access,
1468 bool may_store_unaligned,
1469 bool writeonly_memory)
1470 {
1471 unsigned cache_policy = 0;
1472
1473 /* SI has a TC L1 bug causing corruption of 8bit/16bit stores. All
1474 * store opcodes not aligned to a dword are affected. The only way to
1475 * get unaligned stores is through shader images.
1476 */
1477 if (((may_store_unaligned && ctx->ac.chip_class == SI) ||
1478 /* If this is write-only, don't keep data in L1 to prevent
1479 * evicting L1 cache lines that may be needed by other
1480 * instructions.
1481 */
1482 writeonly_memory ||
1483 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1484 cache_policy |= ac_glc;
1485 }
1486
1487 return cache_policy;
1488 }
1489
1490 static void visit_store_ssbo(struct ac_nir_context *ctx,
1491 nir_intrinsic_instr *instr)
1492 {
1493 const char *store_name;
1494 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1495 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1496 unsigned writemask = nir_intrinsic_write_mask(instr);
1497 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1498 bool writeonly_memory = access & ACCESS_NON_READABLE;
1499 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1500 LLVMValueRef glc = (cache_policy & ac_glc) ? ctx->ac.i1true : ctx->ac.i1false;
1501
1502 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1503 get_src(ctx, instr->src[1]), true);
1504 LLVMValueRef base_data = ac_to_float(&ctx->ac, src_data);
1505 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1506 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1507
1508 while (writemask) {
1509 int start, count;
1510 LLVMValueRef data, offset;
1511 LLVMTypeRef data_type;
1512
1513 u_bit_scan_consecutive_range(&writemask, &start, &count);
1514
1515 /* Due to an LLVM limitation, split 3-element writes
1516 * into a 2-element and a 1-element write. */
1517 if (count == 3) {
1518 writemask |= 1 << (start + 2);
1519 count = 2;
1520 }
1521 int num_bytes = count * elem_size_bytes; /* count in bytes */
1522
1523 /* we can only store 4 DWords at the same time.
1524 * can only happen for 64 Bit vectors. */
1525 if (num_bytes > 16) {
1526 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1527 count = 2;
1528 num_bytes = 16;
1529 }
1530
1531 /* check alignment of 16 Bit stores */
1532 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1533 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1534 count = 1;
1535 num_bytes = 2;
1536 }
1537 data = extract_vector_range(&ctx->ac, base_data, start, count);
1538
1539 if (start == 0) {
1540 offset = base_offset;
1541 } else {
1542 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1543 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1544 }
1545 if (num_bytes == 2) {
1546 store_name = "llvm.amdgcn.tbuffer.store.i32";
1547 data_type = ctx->ac.i32;
1548 LLVMValueRef tbuffer_params[] = {
1549 data,
1550 rsrc,
1551 ctx->ac.i32_0, /* vindex */
1552 offset, /* voffset */
1553 ctx->ac.i32_0,
1554 ctx->ac.i32_0,
1555 LLVMConstInt(ctx->ac.i32, 2, false), // dfmt (= 16bit)
1556 LLVMConstInt(ctx->ac.i32, 4, false), // nfmt (= uint)
1557 glc,
1558 ctx->ac.i1false,
1559 };
1560 ac_build_intrinsic(&ctx->ac, store_name,
1561 ctx->ac.voidt, tbuffer_params, 10, 0);
1562 } else {
1563 switch (num_bytes) {
1564 case 16: /* v4f32 */
1565 store_name = "llvm.amdgcn.buffer.store.v4f32";
1566 data_type = ctx->ac.v4f32;
1567 break;
1568 case 8: /* v2f32 */
1569 store_name = "llvm.amdgcn.buffer.store.v2f32";
1570 data_type = ctx->ac.v2f32;
1571 break;
1572 case 4: /* f32 */
1573 store_name = "llvm.amdgcn.buffer.store.f32";
1574 data_type = ctx->ac.f32;
1575 break;
1576 default:
1577 unreachable("Malformed vector store.");
1578 }
1579 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1580 LLVMValueRef params[] = {
1581 data,
1582 rsrc,
1583 ctx->ac.i32_0, /* vindex */
1584 offset,
1585 glc,
1586 ctx->ac.i1false, /* slc */
1587 };
1588 ac_build_intrinsic(&ctx->ac, store_name,
1589 ctx->ac.voidt, params, 6, 0);
1590 }
1591 }
1592 }
1593
1594 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1595 const nir_intrinsic_instr *instr)
1596 {
1597 const char *name;
1598 LLVMValueRef params[6];
1599 int arg_count = 0;
1600
1601 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1602 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1603 }
1604 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1605 params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
1606 get_src(ctx, instr->src[0]),
1607 true);
1608 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1609 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1610 params[arg_count++] = ctx->ac.i1false; /* slc */
1611
1612 switch (instr->intrinsic) {
1613 case nir_intrinsic_ssbo_atomic_add:
1614 name = "llvm.amdgcn.buffer.atomic.add";
1615 break;
1616 case nir_intrinsic_ssbo_atomic_imin:
1617 name = "llvm.amdgcn.buffer.atomic.smin";
1618 break;
1619 case nir_intrinsic_ssbo_atomic_umin:
1620 name = "llvm.amdgcn.buffer.atomic.umin";
1621 break;
1622 case nir_intrinsic_ssbo_atomic_imax:
1623 name = "llvm.amdgcn.buffer.atomic.smax";
1624 break;
1625 case nir_intrinsic_ssbo_atomic_umax:
1626 name = "llvm.amdgcn.buffer.atomic.umax";
1627 break;
1628 case nir_intrinsic_ssbo_atomic_and:
1629 name = "llvm.amdgcn.buffer.atomic.and";
1630 break;
1631 case nir_intrinsic_ssbo_atomic_or:
1632 name = "llvm.amdgcn.buffer.atomic.or";
1633 break;
1634 case nir_intrinsic_ssbo_atomic_xor:
1635 name = "llvm.amdgcn.buffer.atomic.xor";
1636 break;
1637 case nir_intrinsic_ssbo_atomic_exchange:
1638 name = "llvm.amdgcn.buffer.atomic.swap";
1639 break;
1640 case nir_intrinsic_ssbo_atomic_comp_swap:
1641 name = "llvm.amdgcn.buffer.atomic.cmpswap";
1642 break;
1643 default:
1644 abort();
1645 }
1646
1647 return ac_build_intrinsic(&ctx->ac, name, ctx->ac.i32, params, arg_count, 0);
1648 }
1649
1650 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1651 const nir_intrinsic_instr *instr)
1652 {
1653 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1654 int num_components = instr->num_components;
1655 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1656 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1657 LLVMValueRef glc = (cache_policy & ac_glc) ? ctx->ac.i1true : ctx->ac.i1false;
1658
1659 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1660 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1661 get_src(ctx, instr->src[0]), false);
1662 LLVMValueRef vindex = ctx->ac.i32_0;
1663
1664 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1665 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1666
1667 LLVMValueRef results[4];
1668 for (int i = 0; i < num_components;) {
1669 int num_elems = num_components - i;
1670 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1671 num_elems = 1;
1672 if (num_elems * elem_size_bytes > 16)
1673 num_elems = 16 / elem_size_bytes;
1674 int load_bytes = num_elems * elem_size_bytes;
1675
1676 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1677
1678 LLVMValueRef ret;
1679 if (load_bytes == 2) {
1680 ret = ac_build_tbuffer_load_short(&ctx->ac,
1681 rsrc,
1682 vindex,
1683 offset,
1684 ctx->ac.i32_0,
1685 immoffset,
1686 glc);
1687 } else {
1688 const char *load_name;
1689 LLVMTypeRef data_type;
1690 switch (load_bytes) {
1691 case 16:
1692 case 12:
1693 load_name = "llvm.amdgcn.buffer.load.v4f32";
1694 data_type = ctx->ac.v4f32;
1695 break;
1696 case 8:
1697 case 6:
1698 load_name = "llvm.amdgcn.buffer.load.v2f32";
1699 data_type = ctx->ac.v2f32;
1700 break;
1701 case 4:
1702 load_name = "llvm.amdgcn.buffer.load.f32";
1703 data_type = ctx->ac.f32;
1704 break;
1705 default:
1706 unreachable("Malformed load buffer.");
1707 }
1708 LLVMValueRef params[] = {
1709 rsrc,
1710 vindex,
1711 LLVMBuildAdd(ctx->ac.builder, offset, immoffset, ""),
1712 glc,
1713 ctx->ac.i1false,
1714 };
1715 ret = ac_build_intrinsic(&ctx->ac, load_name, data_type, params, 5, 0);
1716 }
1717
1718 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1719 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1720 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1721
1722 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1723 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1724
1725 for (unsigned j = 0; j < num_elems; j++) {
1726 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1727 }
1728 i += num_elems;
1729 }
1730
1731 return ac_build_gather_values(&ctx->ac, results, num_components);
1732 }
1733
1734 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1735 const nir_intrinsic_instr *instr)
1736 {
1737 LLVMValueRef ret;
1738 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1739 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1740 int num_components = instr->num_components;
1741
1742 if (ctx->abi->load_ubo)
1743 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1744
1745 if (instr->dest.ssa.bit_size == 64)
1746 num_components *= 2;
1747
1748 if (instr->dest.ssa.bit_size == 16) {
1749 LLVMValueRef results[num_components];
1750 for (unsigned i = 0; i < num_components; ++i) {
1751 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1752 rsrc,
1753 ctx->ac.i32_0,
1754 offset,
1755 ctx->ac.i32_0,
1756 LLVMConstInt(ctx->ac.i32, 2 * i, 0),
1757 ctx->ac.i1false);
1758 }
1759 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1760 } else {
1761 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1762 NULL, 0, false, false, true, true);
1763
1764 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1765 }
1766
1767 return LLVMBuildBitCast(ctx->ac.builder, ret,
1768 get_def_type(ctx, &instr->dest.ssa), "");
1769 }
1770
1771 static void
1772 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1773 bool vs_in, unsigned *vertex_index_out,
1774 LLVMValueRef *vertex_index_ref,
1775 unsigned *const_out, LLVMValueRef *indir_out)
1776 {
1777 nir_variable *var = nir_deref_instr_get_variable(instr);
1778 nir_deref_path path;
1779 unsigned idx_lvl = 1;
1780
1781 nir_deref_path_init(&path, instr, NULL);
1782
1783 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1784 if (vertex_index_ref) {
1785 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1786 if (vertex_index_out)
1787 *vertex_index_out = 0;
1788 } else {
1789 nir_const_value *v = nir_src_as_const_value(path.path[idx_lvl]->arr.index);
1790 assert(v);
1791 *vertex_index_out = v->u32[0];
1792 }
1793 ++idx_lvl;
1794 }
1795
1796 uint32_t const_offset = 0;
1797 LLVMValueRef offset = NULL;
1798
1799 if (var->data.compact) {
1800 assert(instr->deref_type == nir_deref_type_array);
1801 nir_const_value *v = nir_src_as_const_value(instr->arr.index);
1802 assert(v);
1803 const_offset = v->u32[0];
1804 goto out;
1805 }
1806
1807 for (; path.path[idx_lvl]; ++idx_lvl) {
1808 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1809 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1810 unsigned index = path.path[idx_lvl]->strct.index;
1811
1812 for (unsigned i = 0; i < index; i++) {
1813 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1814 const_offset += glsl_count_attribute_slots(ft, vs_in);
1815 }
1816 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1817 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1818 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1819 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1820 if (offset)
1821 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1822 else
1823 offset = array_off;
1824 } else
1825 unreachable("Uhandled deref type in get_deref_instr_offset");
1826 }
1827
1828 out:
1829 nir_deref_path_finish(&path);
1830
1831 if (const_offset && offset)
1832 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1833 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1834 "");
1835
1836 *const_out = const_offset;
1837 *indir_out = offset;
1838 }
1839
1840 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1841 nir_intrinsic_instr *instr,
1842 bool load_inputs)
1843 {
1844 LLVMValueRef result;
1845 LLVMValueRef vertex_index = NULL;
1846 LLVMValueRef indir_index = NULL;
1847 unsigned const_index = 0;
1848
1849 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1850
1851 unsigned location = var->data.location;
1852 unsigned driver_location = var->data.driver_location;
1853 const bool is_patch = var->data.patch;
1854 const bool is_compact = var->data.compact;
1855
1856 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1857 false, NULL, is_patch ? NULL : &vertex_index,
1858 &const_index, &indir_index);
1859
1860 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1861
1862 LLVMTypeRef src_component_type;
1863 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1864 src_component_type = LLVMGetElementType(dest_type);
1865 else
1866 src_component_type = dest_type;
1867
1868 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1869 vertex_index, indir_index,
1870 const_index, location, driver_location,
1871 var->data.location_frac,
1872 instr->num_components,
1873 is_patch, is_compact, load_inputs);
1874 if (instr->dest.ssa.bit_size == 16) {
1875 result = ac_to_integer(&ctx->ac, result);
1876 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
1877 }
1878 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
1879 }
1880
1881 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
1882 nir_intrinsic_instr *instr)
1883 {
1884 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1885
1886 LLVMValueRef values[8];
1887 int idx = 0;
1888 int ve = instr->dest.ssa.num_components;
1889 unsigned comp = 0;
1890 LLVMValueRef indir_index;
1891 LLVMValueRef ret;
1892 unsigned const_index;
1893 unsigned stride = 4;
1894 int mode = nir_var_shared;
1895
1896 if (var) {
1897 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
1898 var->data.mode == nir_var_shader_in;
1899 if (var->data.compact)
1900 stride = 1;
1901 idx = var->data.driver_location;
1902 comp = var->data.location_frac;
1903 mode = var->data.mode;
1904
1905 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr), vs_in, NULL, NULL,
1906 &const_index, &indir_index);
1907 }
1908
1909 if (instr->dest.ssa.bit_size == 64)
1910 ve *= 2;
1911
1912 switch (mode) {
1913 case nir_var_shader_in:
1914 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
1915 ctx->stage == MESA_SHADER_TESS_EVAL) {
1916 return load_tess_varyings(ctx, instr, true);
1917 }
1918
1919 if (ctx->stage == MESA_SHADER_GEOMETRY) {
1920 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
1921 LLVMValueRef indir_index;
1922 unsigned const_index, vertex_index;
1923 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1924 false, &vertex_index, NULL, &const_index, &indir_index);
1925
1926 return ctx->abi->load_inputs(ctx->abi, var->data.location,
1927 var->data.driver_location,
1928 var->data.location_frac,
1929 instr->num_components, vertex_index, const_index, type);
1930 }
1931
1932 for (unsigned chan = comp; chan < ve + comp; chan++) {
1933 if (indir_index) {
1934 unsigned count = glsl_count_attribute_slots(
1935 var->type,
1936 ctx->stage == MESA_SHADER_VERTEX);
1937 count -= chan / 4;
1938 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
1939 &ctx->ac, ctx->abi->inputs + idx + chan, count,
1940 stride, false, true);
1941
1942 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
1943 tmp_vec,
1944 indir_index, "");
1945 } else
1946 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
1947 }
1948 break;
1949 case nir_var_function:
1950 for (unsigned chan = 0; chan < ve; chan++) {
1951 if (indir_index) {
1952 unsigned count = glsl_count_attribute_slots(
1953 var->type, false);
1954 count -= chan / 4;
1955 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
1956 &ctx->ac, ctx->locals + idx + chan, count,
1957 stride, true, true);
1958
1959 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
1960 tmp_vec,
1961 indir_index, "");
1962 } else {
1963 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
1964 }
1965 }
1966 break;
1967 case nir_var_shared: {
1968 LLVMValueRef address = get_src(ctx, instr->src[0]);
1969 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
1970 return LLVMBuildBitCast(ctx->ac.builder, val,
1971 get_def_type(ctx, &instr->dest.ssa),
1972 "");
1973 }
1974 case nir_var_shader_out:
1975 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
1976 return load_tess_varyings(ctx, instr, false);
1977 }
1978
1979 for (unsigned chan = comp; chan < ve + comp; chan++) {
1980 if (indir_index) {
1981 unsigned count = glsl_count_attribute_slots(
1982 var->type, false);
1983 count -= chan / 4;
1984 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
1985 &ctx->ac, ctx->abi->outputs + idx + chan, count,
1986 stride, true, true);
1987
1988 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
1989 tmp_vec,
1990 indir_index, "");
1991 } else {
1992 values[chan] = LLVMBuildLoad(ctx->ac.builder,
1993 ctx->abi->outputs[idx + chan + const_index * stride],
1994 "");
1995 }
1996 }
1997 break;
1998 default:
1999 unreachable("unhandle variable mode");
2000 }
2001 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2002 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2003 }
2004
2005 static void
2006 visit_store_var(struct ac_nir_context *ctx,
2007 nir_intrinsic_instr *instr)
2008 {
2009 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2010
2011 LLVMValueRef temp_ptr, value;
2012 int idx = var->data.driver_location;
2013 unsigned comp = var->data.location_frac;
2014 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2015 int writemask = instr->const_index[0];
2016 LLVMValueRef indir_index;
2017 unsigned const_index;
2018
2019 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr), false,
2020 NULL, NULL, &const_index, &indir_index);
2021
2022 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64) {
2023
2024 src = LLVMBuildBitCast(ctx->ac.builder, src,
2025 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2026 "");
2027
2028 writemask = widen_mask(writemask, 2);
2029 }
2030
2031 writemask = writemask << comp;
2032
2033 switch (var->data.mode) {
2034 case nir_var_shader_out:
2035
2036 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2037 LLVMValueRef vertex_index = NULL;
2038 LLVMValueRef indir_index = NULL;
2039 unsigned const_index = 0;
2040 const bool is_patch = var->data.patch;
2041
2042 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2043 false, NULL, is_patch ? NULL : &vertex_index,
2044 &const_index, &indir_index);
2045
2046 ctx->abi->store_tcs_outputs(ctx->abi, var,
2047 vertex_index, indir_index,
2048 const_index, src, writemask);
2049 return;
2050 }
2051
2052 for (unsigned chan = 0; chan < 8; chan++) {
2053 int stride = 4;
2054 if (!(writemask & (1 << chan)))
2055 continue;
2056
2057 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2058
2059 if (var->data.compact)
2060 stride = 1;
2061 if (indir_index) {
2062 unsigned count = glsl_count_attribute_slots(
2063 var->type, false);
2064 count -= chan / 4;
2065 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2066 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2067 stride, true, true);
2068
2069 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2070 value, indir_index, "");
2071 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2072 count, stride, tmp_vec);
2073
2074 } else {
2075 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2076
2077 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2078 }
2079 }
2080 break;
2081 case nir_var_function:
2082 for (unsigned chan = 0; chan < 8; chan++) {
2083 if (!(writemask & (1 << chan)))
2084 continue;
2085
2086 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2087 if (indir_index) {
2088 unsigned count = glsl_count_attribute_slots(
2089 var->type, false);
2090 count -= chan / 4;
2091 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2092 &ctx->ac, ctx->locals + idx + chan, count,
2093 4, true, true);
2094
2095 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2096 value, indir_index, "");
2097 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2098 count, 4, tmp_vec);
2099 } else {
2100 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2101
2102 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2103 }
2104 }
2105 break;
2106 case nir_var_shared: {
2107 int writemask = instr->const_index[0];
2108 LLVMValueRef address = get_src(ctx, instr->src[0]);
2109 LLVMValueRef val = get_src(ctx, instr->src[1]);
2110 if (util_is_power_of_two_nonzero(writemask)) {
2111 val = LLVMBuildBitCast(
2112 ctx->ac.builder, val,
2113 LLVMGetElementType(LLVMTypeOf(address)), "");
2114 LLVMBuildStore(ctx->ac.builder, val, address);
2115 } else {
2116 for (unsigned chan = 0; chan < 4; chan++) {
2117 if (!(writemask & (1 << chan)))
2118 continue;
2119 LLVMValueRef ptr =
2120 LLVMBuildStructGEP(ctx->ac.builder,
2121 address, chan, "");
2122 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2123 chan);
2124 src = LLVMBuildBitCast(
2125 ctx->ac.builder, src,
2126 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2127 LLVMBuildStore(ctx->ac.builder, src, ptr);
2128 }
2129 }
2130 break;
2131 }
2132 default:
2133 break;
2134 }
2135 }
2136
2137 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2138 {
2139 switch (dim) {
2140 case GLSL_SAMPLER_DIM_BUF:
2141 return 1;
2142 case GLSL_SAMPLER_DIM_1D:
2143 return array ? 2 : 1;
2144 case GLSL_SAMPLER_DIM_2D:
2145 return array ? 3 : 2;
2146 case GLSL_SAMPLER_DIM_MS:
2147 return array ? 4 : 3;
2148 case GLSL_SAMPLER_DIM_3D:
2149 case GLSL_SAMPLER_DIM_CUBE:
2150 return 3;
2151 case GLSL_SAMPLER_DIM_RECT:
2152 case GLSL_SAMPLER_DIM_SUBPASS:
2153 return 2;
2154 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2155 return 3;
2156 default:
2157 break;
2158 }
2159 return 0;
2160 }
2161
2162
2163 /* Adjust the sample index according to FMASK.
2164 *
2165 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
2166 * which is the identity mapping. Each nibble says which physical sample
2167 * should be fetched to get that sample.
2168 *
2169 * For example, 0x11111100 means there are only 2 samples stored and
2170 * the second sample covers 3/4 of the pixel. When reading samples 0
2171 * and 1, return physical sample 0 (determined by the first two 0s
2172 * in FMASK), otherwise return physical sample 1.
2173 *
2174 * The sample index should be adjusted as follows:
2175 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
2176 */
2177 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2178 LLVMValueRef coord_x, LLVMValueRef coord_y,
2179 LLVMValueRef coord_z,
2180 LLVMValueRef sample_index,
2181 LLVMValueRef fmask_desc_ptr)
2182 {
2183 struct ac_image_args args = {0};
2184 LLVMValueRef res;
2185
2186 args.coords[0] = coord_x;
2187 args.coords[1] = coord_y;
2188 if (coord_z)
2189 args.coords[2] = coord_z;
2190
2191 args.opcode = ac_image_load;
2192 args.dim = coord_z ? ac_image_2darray : ac_image_2d;
2193 args.resource = fmask_desc_ptr;
2194 args.dmask = 0xf;
2195 args.attributes = AC_FUNC_ATTR_READNONE;
2196
2197 res = ac_build_image_opcode(ctx, &args);
2198
2199 res = ac_to_integer(ctx, res);
2200 LLVMValueRef four = LLVMConstInt(ctx->i32, 4, false);
2201 LLVMValueRef F = LLVMConstInt(ctx->i32, 0xf, false);
2202
2203 LLVMValueRef fmask = LLVMBuildExtractElement(ctx->builder,
2204 res,
2205 ctx->i32_0, "");
2206
2207 LLVMValueRef sample_index4 =
2208 LLVMBuildMul(ctx->builder, sample_index, four, "");
2209 LLVMValueRef shifted_fmask =
2210 LLVMBuildLShr(ctx->builder, fmask, sample_index4, "");
2211 LLVMValueRef final_sample =
2212 LLVMBuildAnd(ctx->builder, shifted_fmask, F, "");
2213
2214 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
2215 * resource descriptor is 0 (invalid),
2216 */
2217 LLVMValueRef fmask_desc =
2218 LLVMBuildBitCast(ctx->builder, fmask_desc_ptr,
2219 ctx->v8i32, "");
2220
2221 LLVMValueRef fmask_word1 =
2222 LLVMBuildExtractElement(ctx->builder, fmask_desc,
2223 ctx->i32_1, "");
2224
2225 LLVMValueRef word1_is_nonzero =
2226 LLVMBuildICmp(ctx->builder, LLVMIntNE,
2227 fmask_word1, ctx->i32_0, "");
2228
2229 /* Replace the MSAA sample index. */
2230 sample_index =
2231 LLVMBuildSelect(ctx->builder, word1_is_nonzero,
2232 final_sample, sample_index, "");
2233 return sample_index;
2234 }
2235
2236 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2237 {
2238 assert(instr->src[0].is_ssa);
2239 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2240 }
2241
2242 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2243 const nir_intrinsic_instr *instr,
2244 enum ac_descriptor_type desc_type,
2245 bool write)
2246 {
2247 return get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr), desc_type, NULL, true, write);
2248 }
2249
2250 static void get_image_coords(struct ac_nir_context *ctx,
2251 const nir_intrinsic_instr *instr,
2252 struct ac_image_args *args)
2253 {
2254 const struct glsl_type *type = get_image_deref(instr)->type;
2255
2256 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2257 LLVMValueRef masks[] = {
2258 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2259 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2260 };
2261 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2262
2263 int count;
2264 enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
2265 bool is_array = glsl_sampler_type_is_array(type);
2266 bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2267 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2268 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2269 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2270 bool gfx9_1d = ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2271 count = image_type_to_components_count(dim, is_array);
2272
2273 if (is_ms && instr->intrinsic == nir_intrinsic_image_deref_load) {
2274 LLVMValueRef fmask_load_address[3];
2275 int chan;
2276
2277 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2278 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2279 if (is_array)
2280 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2281 else
2282 fmask_load_address[2] = NULL;
2283 if (add_frag_pos) {
2284 for (chan = 0; chan < 2; ++chan)
2285 fmask_load_address[chan] =
2286 LLVMBuildAdd(ctx->ac.builder, fmask_load_address[chan],
2287 LLVMBuildFPToUI(ctx->ac.builder, ctx->abi->frag_pos[chan],
2288 ctx->ac.i32, ""), "");
2289 fmask_load_address[2] = ac_to_integer(&ctx->ac, ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2290 }
2291 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2292 fmask_load_address[0],
2293 fmask_load_address[1],
2294 fmask_load_address[2],
2295 sample_index,
2296 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2297 AC_DESC_FMASK, NULL, false, false));
2298 }
2299 if (count == 1 && !gfx9_1d) {
2300 if (instr->src[1].ssa->num_components)
2301 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2302 else
2303 args->coords[0] = src0;
2304 } else {
2305 int chan;
2306 if (is_ms)
2307 count--;
2308 for (chan = 0; chan < count; ++chan) {
2309 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2310 }
2311 if (add_frag_pos) {
2312 for (chan = 0; chan < 2; ++chan) {
2313 args->coords[chan] = LLVMBuildAdd(
2314 ctx->ac.builder, args->coords[chan],
2315 LLVMBuildFPToUI(
2316 ctx->ac.builder, ctx->abi->frag_pos[chan],
2317 ctx->ac.i32, ""), "");
2318 }
2319 args->coords[2] = ac_to_integer(&ctx->ac,
2320 ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2321 count++;
2322 }
2323
2324 if (gfx9_1d) {
2325 if (is_array) {
2326 args->coords[2] = args->coords[1];
2327 args->coords[1] = ctx->ac.i32_0;
2328 } else
2329 args->coords[1] = ctx->ac.i32_0;
2330 count++;
2331 }
2332
2333 if (is_ms) {
2334 args->coords[count] = sample_index;
2335 count++;
2336 }
2337 }
2338 }
2339
2340 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2341 const nir_intrinsic_instr *instr, bool write)
2342 {
2343 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2344 if (ctx->abi->gfx9_stride_size_workaround) {
2345 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2346 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2347 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2348
2349 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2350 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2351 elem_count, stride, "");
2352
2353 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2354 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2355 }
2356 return rsrc;
2357 }
2358
2359 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2360 const nir_intrinsic_instr *instr)
2361 {
2362 LLVMValueRef res;
2363 const nir_deref_instr *image_deref = get_image_deref(instr);
2364 const struct glsl_type *type = image_deref->type;
2365 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2366 struct ac_image_args args = {};
2367
2368 args.cache_policy =
2369 get_cache_policy(ctx, var->data.image.access, false, false);
2370
2371 const enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
2372 if (dim == GLSL_SAMPLER_DIM_BUF) {
2373 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2374 unsigned num_channels = util_last_bit(mask);
2375 LLVMValueRef rsrc, vindex;
2376
2377 rsrc = get_image_buffer_descriptor(ctx, instr, false);
2378 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2379 ctx->ac.i32_0, "");
2380
2381 /* TODO: set "can_speculate" when OpenGL needs it. */
2382 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2383 ctx->ac.i32_0, num_channels,
2384 !!(args.cache_policy & ac_glc),
2385 false);
2386 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2387
2388 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2389 res = ac_to_integer(&ctx->ac, res);
2390 } else {
2391 args.opcode = ac_image_load;
2392 get_image_coords(ctx, instr, &args);
2393 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2394 args.dim = get_ac_image_dim(&ctx->ac, glsl_get_sampler_dim(type),
2395 glsl_sampler_type_is_array(type));
2396 args.dmask = 15;
2397 args.attributes = AC_FUNC_ATTR_READONLY;
2398
2399 res = ac_build_image_opcode(&ctx->ac, &args);
2400 }
2401 return ac_to_integer(&ctx->ac, res);
2402 }
2403
2404 static void visit_image_store(struct ac_nir_context *ctx,
2405 nir_intrinsic_instr *instr)
2406 {
2407 LLVMValueRef params[8];
2408 const nir_deref_instr *image_deref = get_image_deref(instr);
2409 const struct glsl_type *type = image_deref->type;
2410 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2411 const enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
2412 bool writeonly_memory = var->data.image.access & ACCESS_NON_READABLE;
2413 struct ac_image_args args = {};
2414
2415 args.cache_policy = get_cache_policy(ctx, var->data.image.access, true,
2416 writeonly_memory);
2417
2418 if (dim == GLSL_SAMPLER_DIM_BUF) {
2419 char name[48];
2420 const char *types[] = { "f32", "v2f32", "v4f32" };
2421 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true);
2422 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2423 unsigned src_channels = ac_get_llvm_num_components(src);
2424
2425 if (src_channels == 3)
2426 src = ac_build_expand(&ctx->ac, src, 3, 4);
2427
2428 params[0] = src; /* data */
2429 params[1] = rsrc;
2430 params[2] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2431 ctx->ac.i32_0, ""); /* vindex */
2432 params[3] = ctx->ac.i32_0; /* voffset */
2433 snprintf(name, sizeof(name), "%s.%s",
2434 HAVE_LLVM >= 0x800 ? "llvm.amdgcn.struct.buffer.store.format"
2435 : "llvm.amdgcn.buffer.store.format",
2436 types[CLAMP(src_channels, 1, 3) - 1]);
2437
2438 if (HAVE_LLVM >= 0x800) {
2439 params[4] = ctx->ac.i32_0; /* soffset */
2440 params[5] = (args.cache_policy & ac_glc) ? ctx->ac.i32_1 : ctx->ac.i32_0;
2441 } else {
2442 params[4] = LLVMConstInt(ctx->ac.i1, !!(args.cache_policy & ac_glc), 0);
2443 params[5] = ctx->ac.i1false; /* slc */
2444 }
2445 ac_build_intrinsic(&ctx->ac, name, ctx->ac.voidt, params, 6, 0);
2446 } else {
2447 args.opcode = ac_image_store;
2448 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2449 get_image_coords(ctx, instr, &args);
2450 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2451 args.dim = get_ac_image_dim(&ctx->ac, glsl_get_sampler_dim(type),
2452 glsl_sampler_type_is_array(type));
2453 args.dmask = 15;
2454
2455 ac_build_image_opcode(&ctx->ac, &args);
2456 }
2457
2458 }
2459
2460 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2461 const nir_intrinsic_instr *instr)
2462 {
2463 LLVMValueRef params[7];
2464 int param_count = 0;
2465 const struct glsl_type *type = get_image_deref(instr)->type;
2466
2467 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap;
2468 const char *atomic_name;
2469 char intrinsic_name[64];
2470 enum ac_atomic_op atomic_subop;
2471 MAYBE_UNUSED int length;
2472
2473 bool is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2474
2475 switch (instr->intrinsic) {
2476 case nir_intrinsic_image_deref_atomic_add:
2477 atomic_name = "add";
2478 atomic_subop = ac_atomic_add;
2479 break;
2480 case nir_intrinsic_image_deref_atomic_min:
2481 atomic_name = is_unsigned ? "umin" : "smin";
2482 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2483 break;
2484 case nir_intrinsic_image_deref_atomic_max:
2485 atomic_name = is_unsigned ? "umax" : "smax";
2486 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2487 break;
2488 case nir_intrinsic_image_deref_atomic_and:
2489 atomic_name = "and";
2490 atomic_subop = ac_atomic_and;
2491 break;
2492 case nir_intrinsic_image_deref_atomic_or:
2493 atomic_name = "or";
2494 atomic_subop = ac_atomic_or;
2495 break;
2496 case nir_intrinsic_image_deref_atomic_xor:
2497 atomic_name = "xor";
2498 atomic_subop = ac_atomic_xor;
2499 break;
2500 case nir_intrinsic_image_deref_atomic_exchange:
2501 atomic_name = "swap";
2502 atomic_subop = ac_atomic_swap;
2503 break;
2504 case nir_intrinsic_image_deref_atomic_comp_swap:
2505 atomic_name = "cmpswap";
2506 atomic_subop = 0; /* not used */
2507 break;
2508 default:
2509 abort();
2510 }
2511
2512 if (cmpswap)
2513 params[param_count++] = get_src(ctx, instr->src[4]);
2514 params[param_count++] = get_src(ctx, instr->src[3]);
2515
2516 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2517 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true);
2518 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2519 ctx->ac.i32_0, ""); /* vindex */
2520 params[param_count++] = ctx->ac.i32_0; /* voffset */
2521 if (HAVE_LLVM >= 0x800) {
2522 params[param_count++] = ctx->ac.i32_0; /* soffset */
2523 params[param_count++] = ctx->ac.i32_0; /* slc */
2524
2525 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2526 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2527 } else {
2528 params[param_count++] = ctx->ac.i1false; /* slc */
2529
2530 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2531 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2532 }
2533
2534 assert(length < sizeof(intrinsic_name));
2535 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2536 params, param_count, 0);
2537 } else {
2538 struct ac_image_args args = {};
2539 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2540 args.atomic = atomic_subop;
2541 args.data[0] = params[0];
2542 if (cmpswap)
2543 args.data[1] = params[1];
2544 get_image_coords(ctx, instr, &args);
2545 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2546 args.dim = get_ac_image_dim(&ctx->ac, glsl_get_sampler_dim(type),
2547 glsl_sampler_type_is_array(type));
2548
2549 return ac_build_image_opcode(&ctx->ac, &args);
2550 }
2551 }
2552
2553 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2554 const nir_intrinsic_instr *instr)
2555 {
2556 const struct glsl_type *type = get_image_deref(instr)->type;
2557
2558 struct ac_image_args args = { 0 };
2559 args.dim = get_ac_sampler_dim(&ctx->ac, glsl_get_sampler_dim(type),
2560 glsl_sampler_type_is_array(type));
2561 args.dmask = 0xf;
2562 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2563 args.opcode = ac_image_get_resinfo;
2564 args.lod = ctx->ac.i32_0;
2565 args.attributes = AC_FUNC_ATTR_READNONE;
2566
2567 return ac_build_image_opcode(&ctx->ac, &args);
2568 }
2569
2570 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2571 const nir_intrinsic_instr *instr)
2572 {
2573 LLVMValueRef res;
2574 const struct glsl_type *type = get_image_deref(instr)->type;
2575
2576 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF)
2577 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2578
2579 struct ac_image_args args = { 0 };
2580
2581 args.dim = get_ac_image_dim(&ctx->ac, glsl_get_sampler_dim(type),
2582 glsl_sampler_type_is_array(type));
2583 args.dmask = 0xf;
2584 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2585 args.opcode = ac_image_get_resinfo;
2586 args.lod = ctx->ac.i32_0;
2587 args.attributes = AC_FUNC_ATTR_READNONE;
2588
2589 res = ac_build_image_opcode(&ctx->ac, &args);
2590
2591 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2592
2593 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE &&
2594 glsl_sampler_type_is_array(type)) {
2595 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2596 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2597 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2598 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2599 }
2600 if (ctx->ac.chip_class >= GFX9 &&
2601 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_1D &&
2602 glsl_sampler_type_is_array(type)) {
2603 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2604 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2605 ctx->ac.i32_1, "");
2606
2607 }
2608 return res;
2609 }
2610
2611 static void emit_membar(struct ac_llvm_context *ac,
2612 const nir_intrinsic_instr *instr)
2613 {
2614 unsigned waitcnt = NOOP_WAITCNT;
2615
2616 switch (instr->intrinsic) {
2617 case nir_intrinsic_memory_barrier:
2618 case nir_intrinsic_group_memory_barrier:
2619 waitcnt &= VM_CNT & LGKM_CNT;
2620 break;
2621 case nir_intrinsic_memory_barrier_atomic_counter:
2622 case nir_intrinsic_memory_barrier_buffer:
2623 case nir_intrinsic_memory_barrier_image:
2624 waitcnt &= VM_CNT;
2625 break;
2626 case nir_intrinsic_memory_barrier_shared:
2627 waitcnt &= LGKM_CNT;
2628 break;
2629 default:
2630 break;
2631 }
2632 if (waitcnt != NOOP_WAITCNT)
2633 ac_build_waitcnt(ac, waitcnt);
2634 }
2635
2636 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2637 {
2638 /* SI only (thanks to a hw bug workaround):
2639 * The real barrier instruction isn’t needed, because an entire patch
2640 * always fits into a single wave.
2641 */
2642 if (ac->chip_class == SI && stage == MESA_SHADER_TESS_CTRL) {
2643 ac_build_waitcnt(ac, LGKM_CNT & VM_CNT);
2644 return;
2645 }
2646 ac_build_s_barrier(ac);
2647 }
2648
2649 static void emit_discard(struct ac_nir_context *ctx,
2650 const nir_intrinsic_instr *instr)
2651 {
2652 LLVMValueRef cond;
2653
2654 if (instr->intrinsic == nir_intrinsic_discard_if) {
2655 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2656 get_src(ctx, instr->src[0]),
2657 ctx->ac.i32_0, "");
2658 } else {
2659 assert(instr->intrinsic == nir_intrinsic_discard);
2660 cond = ctx->ac.i1false;
2661 }
2662
2663 ctx->abi->emit_kill(ctx->abi, cond);
2664 }
2665
2666 static LLVMValueRef
2667 visit_load_helper_invocation(struct ac_nir_context *ctx)
2668 {
2669 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2670 "llvm.amdgcn.ps.live",
2671 ctx->ac.i1, NULL, 0,
2672 AC_FUNC_ATTR_READNONE);
2673 result = LLVMBuildNot(ctx->ac.builder, result, "");
2674 return LLVMBuildSExt(ctx->ac.builder, result, ctx->ac.i32, "");
2675 }
2676
2677 static LLVMValueRef
2678 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2679 {
2680 LLVMValueRef result;
2681 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2682 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2683 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2684
2685 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2686 }
2687
2688 static LLVMValueRef
2689 visit_load_subgroup_id(struct ac_nir_context *ctx)
2690 {
2691 if (ctx->stage == MESA_SHADER_COMPUTE) {
2692 LLVMValueRef result;
2693 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2694 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2695 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2696 } else {
2697 return LLVMConstInt(ctx->ac.i32, 0, false);
2698 }
2699 }
2700
2701 static LLVMValueRef
2702 visit_load_num_subgroups(struct ac_nir_context *ctx)
2703 {
2704 if (ctx->stage == MESA_SHADER_COMPUTE) {
2705 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2706 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2707 } else {
2708 return LLVMConstInt(ctx->ac.i32, 1, false);
2709 }
2710 }
2711
2712 static LLVMValueRef
2713 visit_first_invocation(struct ac_nir_context *ctx)
2714 {
2715 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2716
2717 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2718 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2719 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2720 "llvm.cttz.i64",
2721 ctx->ac.i64, args, 2,
2722 AC_FUNC_ATTR_NOUNWIND |
2723 AC_FUNC_ATTR_READNONE);
2724
2725 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2726 }
2727
2728 static LLVMValueRef
2729 visit_load_shared(struct ac_nir_context *ctx,
2730 const nir_intrinsic_instr *instr)
2731 {
2732 LLVMValueRef values[4], derived_ptr, index, ret;
2733
2734 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2735
2736 for (int chan = 0; chan < instr->num_components; chan++) {
2737 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2738 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2739 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2740 }
2741
2742 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2743 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2744 }
2745
2746 static void
2747 visit_store_shared(struct ac_nir_context *ctx,
2748 const nir_intrinsic_instr *instr)
2749 {
2750 LLVMValueRef derived_ptr, data,index;
2751 LLVMBuilderRef builder = ctx->ac.builder;
2752
2753 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2754 LLVMValueRef src = get_src(ctx, instr->src[0]);
2755
2756 int writemask = nir_intrinsic_write_mask(instr);
2757 for (int chan = 0; chan < 4; chan++) {
2758 if (!(writemask & (1 << chan))) {
2759 continue;
2760 }
2761 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2762 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2763 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2764 LLVMBuildStore(builder, data, derived_ptr);
2765 }
2766 }
2767
2768 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2769 const nir_intrinsic_instr *instr,
2770 LLVMValueRef ptr, int src_idx)
2771 {
2772 LLVMValueRef result;
2773 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2774
2775 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2776 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2777 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2778 result = LLVMBuildAtomicCmpXchg(ctx->ac.builder,
2779 ptr, src, src1,
2780 LLVMAtomicOrderingSequentiallyConsistent,
2781 LLVMAtomicOrderingSequentiallyConsistent,
2782 false);
2783 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2784 } else {
2785 LLVMAtomicRMWBinOp op;
2786 switch (instr->intrinsic) {
2787 case nir_intrinsic_shared_atomic_add:
2788 case nir_intrinsic_deref_atomic_add:
2789 op = LLVMAtomicRMWBinOpAdd;
2790 break;
2791 case nir_intrinsic_shared_atomic_umin:
2792 case nir_intrinsic_deref_atomic_umin:
2793 op = LLVMAtomicRMWBinOpUMin;
2794 break;
2795 case nir_intrinsic_shared_atomic_umax:
2796 case nir_intrinsic_deref_atomic_umax:
2797 op = LLVMAtomicRMWBinOpUMax;
2798 break;
2799 case nir_intrinsic_shared_atomic_imin:
2800 case nir_intrinsic_deref_atomic_imin:
2801 op = LLVMAtomicRMWBinOpMin;
2802 break;
2803 case nir_intrinsic_shared_atomic_imax:
2804 case nir_intrinsic_deref_atomic_imax:
2805 op = LLVMAtomicRMWBinOpMax;
2806 break;
2807 case nir_intrinsic_shared_atomic_and:
2808 case nir_intrinsic_deref_atomic_and:
2809 op = LLVMAtomicRMWBinOpAnd;
2810 break;
2811 case nir_intrinsic_shared_atomic_or:
2812 case nir_intrinsic_deref_atomic_or:
2813 op = LLVMAtomicRMWBinOpOr;
2814 break;
2815 case nir_intrinsic_shared_atomic_xor:
2816 case nir_intrinsic_deref_atomic_xor:
2817 op = LLVMAtomicRMWBinOpXor;
2818 break;
2819 case nir_intrinsic_shared_atomic_exchange:
2820 case nir_intrinsic_deref_atomic_exchange:
2821 op = LLVMAtomicRMWBinOpXchg;
2822 break;
2823 default:
2824 return NULL;
2825 }
2826
2827 result = LLVMBuildAtomicRMW(ctx->ac.builder, op, ptr, ac_to_integer(&ctx->ac, src),
2828 LLVMAtomicOrderingSequentiallyConsistent,
2829 false);
2830 }
2831 return result;
2832 }
2833
2834 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
2835 {
2836 LLVMValueRef values[2];
2837 LLVMValueRef pos[2];
2838
2839 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
2840 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
2841
2842 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
2843 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
2844 return ac_build_gather_values(&ctx->ac, values, 2);
2845 }
2846
2847 static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
2848 const nir_intrinsic_instr *instr)
2849 {
2850 LLVMValueRef result[4];
2851 LLVMValueRef interp_param, attr_number;
2852 unsigned location;
2853 unsigned chan;
2854 LLVMValueRef src_c0 = NULL;
2855 LLVMValueRef src_c1 = NULL;
2856 LLVMValueRef src0 = NULL;
2857
2858 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2859 int input_index = ctx->abi->fs_input_attr_indices[var->data.location - VARYING_SLOT_VAR0];
2860 switch (instr->intrinsic) {
2861 case nir_intrinsic_interp_deref_at_centroid:
2862 location = INTERP_CENTROID;
2863 break;
2864 case nir_intrinsic_interp_deref_at_sample:
2865 case nir_intrinsic_interp_deref_at_offset:
2866 location = INTERP_CENTER;
2867 src0 = get_src(ctx, instr->src[1]);
2868 break;
2869 default:
2870 break;
2871 }
2872
2873 if (instr->intrinsic == nir_intrinsic_interp_deref_at_offset) {
2874 src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_0, ""));
2875 src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_1, ""));
2876 } else if (instr->intrinsic == nir_intrinsic_interp_deref_at_sample) {
2877 LLVMValueRef sample_position;
2878 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
2879
2880 /* fetch sample ID */
2881 sample_position = ctx->abi->load_sample_position(ctx->abi, src0);
2882
2883 src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_0, "");
2884 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
2885 src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_1, "");
2886 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
2887 }
2888 interp_param = ctx->abi->lookup_interp_param(ctx->abi, var->data.interpolation, location);
2889 attr_number = LLVMConstInt(ctx->ac.i32, input_index, false);
2890
2891 if (location == INTERP_CENTER) {
2892 LLVMValueRef ij_out[2];
2893 LLVMValueRef ddxy_out = emit_ddxy_interp(ctx, interp_param);
2894
2895 /*
2896 * take the I then J parameters, and the DDX/Y for it, and
2897 * calculate the IJ inputs for the interpolator.
2898 * temp1 = ddx * offset/sample.x + I;
2899 * interp_param.I = ddy * offset/sample.y + temp1;
2900 * temp1 = ddx * offset/sample.x + J;
2901 * interp_param.J = ddy * offset/sample.y + temp1;
2902 */
2903 for (unsigned i = 0; i < 2; i++) {
2904 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
2905 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
2906 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
2907 ddxy_out, ix_ll, "");
2908 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
2909 ddxy_out, iy_ll, "");
2910 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
2911 interp_param, ix_ll, "");
2912 LLVMValueRef temp1, temp2;
2913
2914 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
2915 ctx->ac.f32, "");
2916
2917 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
2918 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
2919
2920 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
2921 temp2, ctx->ac.i32, "");
2922 }
2923 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
2924
2925 }
2926
2927 for (chan = 0; chan < 4; chan++) {
2928 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false);
2929
2930 if (interp_param) {
2931 interp_param = LLVMBuildBitCast(ctx->ac.builder,
2932 interp_param, ctx->ac.v2f32, "");
2933 LLVMValueRef i = LLVMBuildExtractElement(
2934 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
2935 LLVMValueRef j = LLVMBuildExtractElement(
2936 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
2937
2938 result[chan] = ac_build_fs_interp(&ctx->ac,
2939 llvm_chan, attr_number,
2940 ctx->abi->prim_mask, i, j);
2941 } else {
2942 result[chan] = ac_build_fs_interp_mov(&ctx->ac,
2943 LLVMConstInt(ctx->ac.i32, 2, false),
2944 llvm_chan, attr_number,
2945 ctx->abi->prim_mask);
2946 }
2947 }
2948 return ac_build_varying_gather_values(&ctx->ac, result, instr->num_components,
2949 var->data.location_frac);
2950 }
2951
2952 static void visit_intrinsic(struct ac_nir_context *ctx,
2953 nir_intrinsic_instr *instr)
2954 {
2955 LLVMValueRef result = NULL;
2956
2957 switch (instr->intrinsic) {
2958 case nir_intrinsic_ballot:
2959 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
2960 break;
2961 case nir_intrinsic_read_invocation:
2962 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
2963 get_src(ctx, instr->src[1]));
2964 break;
2965 case nir_intrinsic_read_first_invocation:
2966 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
2967 break;
2968 case nir_intrinsic_load_subgroup_invocation:
2969 result = ac_get_thread_id(&ctx->ac);
2970 break;
2971 case nir_intrinsic_load_work_group_id: {
2972 LLVMValueRef values[3];
2973
2974 for (int i = 0; i < 3; i++) {
2975 values[i] = ctx->abi->workgroup_ids[i] ?
2976 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
2977 }
2978
2979 result = ac_build_gather_values(&ctx->ac, values, 3);
2980 break;
2981 }
2982 case nir_intrinsic_load_base_vertex:
2983 case nir_intrinsic_load_first_vertex:
2984 result = ctx->abi->load_base_vertex(ctx->abi);
2985 break;
2986 case nir_intrinsic_load_local_group_size:
2987 result = ctx->abi->load_local_group_size(ctx->abi);
2988 break;
2989 case nir_intrinsic_load_vertex_id:
2990 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
2991 ctx->abi->base_vertex, "");
2992 break;
2993 case nir_intrinsic_load_vertex_id_zero_base: {
2994 result = ctx->abi->vertex_id;
2995 break;
2996 }
2997 case nir_intrinsic_load_local_invocation_id: {
2998 result = ctx->abi->local_invocation_ids;
2999 break;
3000 }
3001 case nir_intrinsic_load_base_instance:
3002 result = ctx->abi->start_instance;
3003 break;
3004 case nir_intrinsic_load_draw_id:
3005 result = ctx->abi->draw_id;
3006 break;
3007 case nir_intrinsic_load_view_index:
3008 result = ctx->abi->view_index;
3009 break;
3010 case nir_intrinsic_load_invocation_id:
3011 if (ctx->stage == MESA_SHADER_TESS_CTRL)
3012 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3013 else
3014 result = ctx->abi->gs_invocation_id;
3015 break;
3016 case nir_intrinsic_load_primitive_id:
3017 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3018 result = ctx->abi->gs_prim_id;
3019 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3020 result = ctx->abi->tcs_patch_id;
3021 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3022 result = ctx->abi->tes_patch_id;
3023 } else
3024 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3025 break;
3026 case nir_intrinsic_load_sample_id:
3027 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3028 break;
3029 case nir_intrinsic_load_sample_pos:
3030 result = load_sample_pos(ctx);
3031 break;
3032 case nir_intrinsic_load_sample_mask_in:
3033 result = ctx->abi->load_sample_mask_in(ctx->abi);
3034 break;
3035 case nir_intrinsic_load_frag_coord: {
3036 LLVMValueRef values[4] = {
3037 ctx->abi->frag_pos[0],
3038 ctx->abi->frag_pos[1],
3039 ctx->abi->frag_pos[2],
3040 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3041 };
3042 result = ac_build_gather_values(&ctx->ac, values, 4);
3043 break;
3044 }
3045 case nir_intrinsic_load_front_face:
3046 result = ctx->abi->front_face;
3047 break;
3048 case nir_intrinsic_load_helper_invocation:
3049 result = visit_load_helper_invocation(ctx);
3050 break;
3051 case nir_intrinsic_load_instance_id:
3052 result = ctx->abi->instance_id;
3053 break;
3054 case nir_intrinsic_load_num_work_groups:
3055 result = ctx->abi->num_work_groups;
3056 break;
3057 case nir_intrinsic_load_local_invocation_index:
3058 result = visit_load_local_invocation_index(ctx);
3059 break;
3060 case nir_intrinsic_load_subgroup_id:
3061 result = visit_load_subgroup_id(ctx);
3062 break;
3063 case nir_intrinsic_load_num_subgroups:
3064 result = visit_load_num_subgroups(ctx);
3065 break;
3066 case nir_intrinsic_first_invocation:
3067 result = visit_first_invocation(ctx);
3068 break;
3069 case nir_intrinsic_load_push_constant:
3070 result = visit_load_push_constant(ctx, instr);
3071 break;
3072 case nir_intrinsic_vulkan_resource_index: {
3073 LLVMValueRef index = get_src(ctx, instr->src[0]);
3074 unsigned desc_set = nir_intrinsic_desc_set(instr);
3075 unsigned binding = nir_intrinsic_binding(instr);
3076
3077 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3078 binding);
3079 break;
3080 }
3081 case nir_intrinsic_vulkan_resource_reindex:
3082 result = visit_vulkan_resource_reindex(ctx, instr);
3083 break;
3084 case nir_intrinsic_store_ssbo:
3085 visit_store_ssbo(ctx, instr);
3086 break;
3087 case nir_intrinsic_load_ssbo:
3088 result = visit_load_buffer(ctx, instr);
3089 break;
3090 case nir_intrinsic_ssbo_atomic_add:
3091 case nir_intrinsic_ssbo_atomic_imin:
3092 case nir_intrinsic_ssbo_atomic_umin:
3093 case nir_intrinsic_ssbo_atomic_imax:
3094 case nir_intrinsic_ssbo_atomic_umax:
3095 case nir_intrinsic_ssbo_atomic_and:
3096 case nir_intrinsic_ssbo_atomic_or:
3097 case nir_intrinsic_ssbo_atomic_xor:
3098 case nir_intrinsic_ssbo_atomic_exchange:
3099 case nir_intrinsic_ssbo_atomic_comp_swap:
3100 result = visit_atomic_ssbo(ctx, instr);
3101 break;
3102 case nir_intrinsic_load_ubo:
3103 result = visit_load_ubo_buffer(ctx, instr);
3104 break;
3105 case nir_intrinsic_get_buffer_size:
3106 result = visit_get_buffer_size(ctx, instr);
3107 break;
3108 case nir_intrinsic_load_deref:
3109 result = visit_load_var(ctx, instr);
3110 break;
3111 case nir_intrinsic_store_deref:
3112 visit_store_var(ctx, instr);
3113 break;
3114 case nir_intrinsic_load_shared:
3115 result = visit_load_shared(ctx, instr);
3116 break;
3117 case nir_intrinsic_store_shared:
3118 visit_store_shared(ctx, instr);
3119 break;
3120 case nir_intrinsic_image_deref_samples:
3121 result = visit_image_samples(ctx, instr);
3122 break;
3123 case nir_intrinsic_image_deref_load:
3124 result = visit_image_load(ctx, instr);
3125 break;
3126 case nir_intrinsic_image_deref_store:
3127 visit_image_store(ctx, instr);
3128 break;
3129 case nir_intrinsic_image_deref_atomic_add:
3130 case nir_intrinsic_image_deref_atomic_min:
3131 case nir_intrinsic_image_deref_atomic_max:
3132 case nir_intrinsic_image_deref_atomic_and:
3133 case nir_intrinsic_image_deref_atomic_or:
3134 case nir_intrinsic_image_deref_atomic_xor:
3135 case nir_intrinsic_image_deref_atomic_exchange:
3136 case nir_intrinsic_image_deref_atomic_comp_swap:
3137 result = visit_image_atomic(ctx, instr);
3138 break;
3139 case nir_intrinsic_image_deref_size:
3140 result = visit_image_size(ctx, instr);
3141 break;
3142 case nir_intrinsic_shader_clock:
3143 result = ac_build_shader_clock(&ctx->ac);
3144 break;
3145 case nir_intrinsic_discard:
3146 case nir_intrinsic_discard_if:
3147 emit_discard(ctx, instr);
3148 break;
3149 case nir_intrinsic_memory_barrier:
3150 case nir_intrinsic_group_memory_barrier:
3151 case nir_intrinsic_memory_barrier_atomic_counter:
3152 case nir_intrinsic_memory_barrier_buffer:
3153 case nir_intrinsic_memory_barrier_image:
3154 case nir_intrinsic_memory_barrier_shared:
3155 emit_membar(&ctx->ac, instr);
3156 break;
3157 case nir_intrinsic_barrier:
3158 ac_emit_barrier(&ctx->ac, ctx->stage);
3159 break;
3160 case nir_intrinsic_shared_atomic_add:
3161 case nir_intrinsic_shared_atomic_imin:
3162 case nir_intrinsic_shared_atomic_umin:
3163 case nir_intrinsic_shared_atomic_imax:
3164 case nir_intrinsic_shared_atomic_umax:
3165 case nir_intrinsic_shared_atomic_and:
3166 case nir_intrinsic_shared_atomic_or:
3167 case nir_intrinsic_shared_atomic_xor:
3168 case nir_intrinsic_shared_atomic_exchange:
3169 case nir_intrinsic_shared_atomic_comp_swap: {
3170 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3171 result = visit_var_atomic(ctx, instr, ptr, 1);
3172 break;
3173 }
3174 case nir_intrinsic_deref_atomic_add:
3175 case nir_intrinsic_deref_atomic_imin:
3176 case nir_intrinsic_deref_atomic_umin:
3177 case nir_intrinsic_deref_atomic_imax:
3178 case nir_intrinsic_deref_atomic_umax:
3179 case nir_intrinsic_deref_atomic_and:
3180 case nir_intrinsic_deref_atomic_or:
3181 case nir_intrinsic_deref_atomic_xor:
3182 case nir_intrinsic_deref_atomic_exchange:
3183 case nir_intrinsic_deref_atomic_comp_swap: {
3184 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3185 result = visit_var_atomic(ctx, instr, ptr, 1);
3186 break;
3187 }
3188 case nir_intrinsic_interp_deref_at_centroid:
3189 case nir_intrinsic_interp_deref_at_sample:
3190 case nir_intrinsic_interp_deref_at_offset:
3191 result = visit_interp(ctx, instr);
3192 break;
3193 case nir_intrinsic_emit_vertex:
3194 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3195 break;
3196 case nir_intrinsic_end_primitive:
3197 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3198 break;
3199 case nir_intrinsic_load_tess_coord:
3200 result = ctx->abi->load_tess_coord(ctx->abi);
3201 break;
3202 case nir_intrinsic_load_tess_level_outer:
3203 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
3204 break;
3205 case nir_intrinsic_load_tess_level_inner:
3206 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
3207 break;
3208 case nir_intrinsic_load_patch_vertices_in:
3209 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3210 break;
3211 case nir_intrinsic_vote_all: {
3212 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3213 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3214 break;
3215 }
3216 case nir_intrinsic_vote_any: {
3217 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3218 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3219 break;
3220 }
3221 case nir_intrinsic_shuffle:
3222 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3223 get_src(ctx, instr->src[1]));
3224 break;
3225 case nir_intrinsic_reduce:
3226 result = ac_build_reduce(&ctx->ac,
3227 get_src(ctx, instr->src[0]),
3228 instr->const_index[0],
3229 instr->const_index[1]);
3230 break;
3231 case nir_intrinsic_inclusive_scan:
3232 result = ac_build_inclusive_scan(&ctx->ac,
3233 get_src(ctx, instr->src[0]),
3234 instr->const_index[0]);
3235 break;
3236 case nir_intrinsic_exclusive_scan:
3237 result = ac_build_exclusive_scan(&ctx->ac,
3238 get_src(ctx, instr->src[0]),
3239 instr->const_index[0]);
3240 break;
3241 case nir_intrinsic_quad_broadcast: {
3242 unsigned lane = nir_src_as_const_value(instr->src[1])->u32[0];
3243 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3244 lane, lane, lane, lane);
3245 break;
3246 }
3247 case nir_intrinsic_quad_swap_horizontal:
3248 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3249 break;
3250 case nir_intrinsic_quad_swap_vertical:
3251 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3252 break;
3253 case nir_intrinsic_quad_swap_diagonal:
3254 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3255 break;
3256 default:
3257 fprintf(stderr, "Unknown intrinsic: ");
3258 nir_print_instr(&instr->instr, stderr);
3259 fprintf(stderr, "\n");
3260 break;
3261 }
3262 if (result) {
3263 ctx->ssa_defs[instr->dest.ssa.index] = result;
3264 }
3265 }
3266
3267 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3268 nir_deref_instr *deref_instr,
3269 enum ac_descriptor_type desc_type,
3270 const nir_tex_instr *tex_instr,
3271 bool image, bool write)
3272 {
3273 LLVMValueRef index = NULL;
3274 unsigned constant_index = 0;
3275 unsigned descriptor_set;
3276 unsigned base_index;
3277 bool bindless = false;
3278
3279 if (!deref_instr) {
3280 assert(tex_instr && !image);
3281 descriptor_set = 0;
3282 base_index = tex_instr->sampler_index;
3283 } else {
3284 while(deref_instr->deref_type != nir_deref_type_var) {
3285 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3286 if (!array_size)
3287 array_size = 1;
3288
3289 assert(deref_instr->deref_type == nir_deref_type_array);
3290 nir_const_value *const_value = nir_src_as_const_value(deref_instr->arr.index);
3291 if (const_value) {
3292 constant_index += array_size * const_value->u32[0];
3293 } else {
3294 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3295
3296 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3297 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3298
3299 if (!index)
3300 index = indirect;
3301 else
3302 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3303 }
3304
3305 deref_instr = nir_src_as_deref(deref_instr->parent);
3306 }
3307 descriptor_set = deref_instr->var->data.descriptor_set;
3308
3309 if (deref_instr->var->data.bindless) {
3310 base_index = deref_instr->var->data.driver_location;
3311 bindless = true;
3312 } else
3313 base_index = deref_instr->var->data.binding;
3314 }
3315
3316 return ctx->abi->load_sampler_desc(ctx->abi,
3317 descriptor_set,
3318 base_index,
3319 constant_index, index,
3320 desc_type, image, write, bindless);
3321 }
3322
3323 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3324 *
3325 * SI-CI:
3326 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3327 * filtering manually. The driver sets img7 to a mask clearing
3328 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3329 * s_and_b32 samp0, samp0, img7
3330 *
3331 * VI:
3332 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3333 */
3334 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3335 LLVMValueRef res, LLVMValueRef samp)
3336 {
3337 LLVMBuilderRef builder = ctx->ac.builder;
3338 LLVMValueRef img7, samp0;
3339
3340 if (ctx->ac.chip_class >= VI)
3341 return samp;
3342
3343 img7 = LLVMBuildExtractElement(builder, res,
3344 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3345 samp0 = LLVMBuildExtractElement(builder, samp,
3346 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3347 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3348 return LLVMBuildInsertElement(builder, samp, samp0,
3349 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3350 }
3351
3352 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3353 nir_tex_instr *instr,
3354 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3355 LLVMValueRef *fmask_ptr)
3356 {
3357 nir_deref_instr *texture_deref_instr = NULL;
3358 nir_deref_instr *sampler_deref_instr = NULL;
3359
3360 for (unsigned i = 0; i < instr->num_srcs; i++) {
3361 switch (instr->src[i].src_type) {
3362 case nir_tex_src_texture_deref:
3363 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3364 break;
3365 case nir_tex_src_sampler_deref:
3366 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3367 break;
3368 default:
3369 break;
3370 }
3371 }
3372
3373 if (!sampler_deref_instr)
3374 sampler_deref_instr = texture_deref_instr;
3375
3376 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF)
3377 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_BUFFER, instr, false, false);
3378 else
3379 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_IMAGE, instr, false, false);
3380 if (samp_ptr) {
3381 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, instr, false, false);
3382 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3383 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3384 }
3385 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3386 instr->op == nir_texop_samples_identical))
3387 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, instr, false, false);
3388 }
3389
3390 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3391 LLVMValueRef coord)
3392 {
3393 coord = ac_to_float(ctx, coord);
3394 coord = ac_build_round(ctx, coord);
3395 coord = ac_to_integer(ctx, coord);
3396 return coord;
3397 }
3398
3399 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3400 {
3401 LLVMValueRef result = NULL;
3402 struct ac_image_args args = { 0 };
3403 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3404 LLVMValueRef ddx = NULL, ddy = NULL;
3405 unsigned offset_src = 0;
3406
3407 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3408
3409 for (unsigned i = 0; i < instr->num_srcs; i++) {
3410 switch (instr->src[i].src_type) {
3411 case nir_tex_src_coord: {
3412 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3413 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3414 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3415 break;
3416 }
3417 case nir_tex_src_projector:
3418 break;
3419 case nir_tex_src_comparator:
3420 if (instr->is_shadow)
3421 args.compare = get_src(ctx, instr->src[i].src);
3422 break;
3423 case nir_tex_src_offset:
3424 args.offset = get_src(ctx, instr->src[i].src);
3425 offset_src = i;
3426 break;
3427 case nir_tex_src_bias:
3428 if (instr->op == nir_texop_txb)
3429 args.bias = get_src(ctx, instr->src[i].src);
3430 break;
3431 case nir_tex_src_lod: {
3432 nir_const_value *val = nir_src_as_const_value(instr->src[i].src);
3433
3434 if (val && val->i32[0] == 0)
3435 args.level_zero = true;
3436 else
3437 args.lod = get_src(ctx, instr->src[i].src);
3438 break;
3439 }
3440 case nir_tex_src_ms_index:
3441 sample_index = get_src(ctx, instr->src[i].src);
3442 break;
3443 case nir_tex_src_ms_mcs:
3444 break;
3445 case nir_tex_src_ddx:
3446 ddx = get_src(ctx, instr->src[i].src);
3447 break;
3448 case nir_tex_src_ddy:
3449 ddy = get_src(ctx, instr->src[i].src);
3450 break;
3451 case nir_tex_src_texture_offset:
3452 case nir_tex_src_sampler_offset:
3453 case nir_tex_src_plane:
3454 default:
3455 break;
3456 }
3457 }
3458
3459 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3460 result = get_buffer_size(ctx, args.resource, true);
3461 goto write_result;
3462 }
3463
3464 if (instr->op == nir_texop_texture_samples) {
3465 LLVMValueRef res, samples, is_msaa;
3466 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3467 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3468 LLVMConstInt(ctx->ac.i32, 3, false), "");
3469 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3470 LLVMConstInt(ctx->ac.i32, 28, false), "");
3471 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3472 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3473 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3474 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3475
3476 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3477 LLVMConstInt(ctx->ac.i32, 16, false), "");
3478 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3479 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3480 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3481 samples, "");
3482 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3483 ctx->ac.i32_1, "");
3484 result = samples;
3485 goto write_result;
3486 }
3487
3488 if (args.offset && instr->op != nir_texop_txf) {
3489 LLVMValueRef offset[3], pack;
3490 for (unsigned chan = 0; chan < 3; ++chan)
3491 offset[chan] = ctx->ac.i32_0;
3492
3493 unsigned num_components = ac_get_llvm_num_components(args.offset);
3494 for (unsigned chan = 0; chan < num_components; chan++) {
3495 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3496 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3497 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3498 if (chan)
3499 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3500 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3501 }
3502 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3503 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3504 args.offset = pack;
3505 }
3506
3507 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3508 * so the depth comparison value isn't clamped for Z16 and
3509 * Z24 anymore. Do it manually here.
3510 *
3511 * It's unnecessary if the original texture format was
3512 * Z32_FLOAT, but we don't know that here.
3513 */
3514 if (args.compare && ctx->ac.chip_class == VI && ctx->abi->clamp_shadow_reference)
3515 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3516
3517 /* pack derivatives */
3518 if (ddx || ddy) {
3519 int num_src_deriv_channels, num_dest_deriv_channels;
3520 switch (instr->sampler_dim) {
3521 case GLSL_SAMPLER_DIM_3D:
3522 case GLSL_SAMPLER_DIM_CUBE:
3523 num_src_deriv_channels = 3;
3524 num_dest_deriv_channels = 3;
3525 break;
3526 case GLSL_SAMPLER_DIM_2D:
3527 default:
3528 num_src_deriv_channels = 2;
3529 num_dest_deriv_channels = 2;
3530 break;
3531 case GLSL_SAMPLER_DIM_1D:
3532 num_src_deriv_channels = 1;
3533 if (ctx->ac.chip_class >= GFX9) {
3534 num_dest_deriv_channels = 2;
3535 } else {
3536 num_dest_deriv_channels = 1;
3537 }
3538 break;
3539 }
3540
3541 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3542 args.derivs[i] = ac_to_float(&ctx->ac,
3543 ac_llvm_extract_elem(&ctx->ac, ddx, i));
3544 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
3545 ac_llvm_extract_elem(&ctx->ac, ddy, i));
3546 }
3547 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3548 args.derivs[i] = ctx->ac.f32_0;
3549 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3550 }
3551 }
3552
3553 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
3554 for (unsigned chan = 0; chan < instr->coord_components; chan++)
3555 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
3556 if (instr->coord_components == 3)
3557 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
3558 ac_prepare_cube_coords(&ctx->ac,
3559 instr->op == nir_texop_txd, instr->is_array,
3560 instr->op == nir_texop_lod, args.coords, args.derivs);
3561 }
3562
3563 /* Texture coordinates fixups */
3564 if (instr->coord_components > 1 &&
3565 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3566 instr->is_array &&
3567 instr->op != nir_texop_txf) {
3568 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
3569 }
3570
3571 if (instr->coord_components > 2 &&
3572 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3573 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3574 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3575 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3576 instr->is_array &&
3577 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3578 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
3579 }
3580
3581 if (ctx->ac.chip_class >= GFX9 &&
3582 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3583 instr->op != nir_texop_lod) {
3584 LLVMValueRef filler;
3585 if (instr->op == nir_texop_txf)
3586 filler = ctx->ac.i32_0;
3587 else
3588 filler = LLVMConstReal(ctx->ac.f32, 0.5);
3589
3590 if (instr->is_array)
3591 args.coords[2] = args.coords[1];
3592 args.coords[1] = filler;
3593 }
3594
3595 /* Pack sample index */
3596 if (instr->op == nir_texop_txf_ms && sample_index)
3597 args.coords[instr->coord_components] = sample_index;
3598
3599 if (instr->op == nir_texop_samples_identical) {
3600 struct ac_image_args txf_args = { 0 };
3601 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
3602
3603 txf_args.dmask = 0xf;
3604 txf_args.resource = fmask_ptr;
3605 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
3606 result = build_tex_intrinsic(ctx, instr, &txf_args);
3607
3608 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3609 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
3610 goto write_result;
3611 }
3612
3613 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS &&
3614 instr->op != nir_texop_txs) {
3615 unsigned sample_chan = instr->is_array ? 3 : 2;
3616 args.coords[sample_chan] = adjust_sample_index_using_fmask(
3617 &ctx->ac, args.coords[0], args.coords[1],
3618 instr->is_array ? args.coords[2] : NULL,
3619 args.coords[sample_chan], fmask_ptr);
3620 }
3621
3622 if (args.offset && instr->op == nir_texop_txf) {
3623 nir_const_value *const_offset =
3624 nir_src_as_const_value(instr->src[offset_src].src);
3625 int num_offsets = instr->src[offset_src].src.ssa->num_components;
3626 assert(const_offset);
3627 num_offsets = MIN2(num_offsets, instr->coord_components);
3628 for (unsigned i = 0; i < num_offsets; ++i) {
3629 args.coords[i] = LLVMBuildAdd(
3630 ctx->ac.builder, args.coords[i],
3631 LLVMConstInt(ctx->ac.i32, const_offset->i32[i], false), "");
3632 }
3633 args.offset = NULL;
3634 }
3635
3636 /* TODO TG4 support */
3637 args.dmask = 0xf;
3638 if (instr->op == nir_texop_tg4) {
3639 if (instr->is_shadow)
3640 args.dmask = 1;
3641 else
3642 args.dmask = 1 << instr->component;
3643 }
3644
3645 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
3646 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
3647 result = build_tex_intrinsic(ctx, instr, &args);
3648
3649 if (instr->op == nir_texop_query_levels)
3650 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
3651 else if (instr->is_shadow && instr->is_new_style_shadow &&
3652 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
3653 instr->op != nir_texop_tg4)
3654 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3655 else if (instr->op == nir_texop_txs &&
3656 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3657 instr->is_array) {
3658 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3659 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3660 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3661 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3662 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
3663 } else if (ctx->ac.chip_class >= GFX9 &&
3664 instr->op == nir_texop_txs &&
3665 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3666 instr->is_array) {
3667 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3668 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3669 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
3670 ctx->ac.i32_1, "");
3671 } else if (instr->dest.ssa.num_components != 4)
3672 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
3673
3674 write_result:
3675 if (result) {
3676 assert(instr->dest.is_ssa);
3677 result = ac_to_integer(&ctx->ac, result);
3678 ctx->ssa_defs[instr->dest.ssa.index] = result;
3679 }
3680 }
3681
3682
3683 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
3684 {
3685 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3686 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
3687
3688 ctx->ssa_defs[instr->dest.ssa.index] = result;
3689 _mesa_hash_table_insert(ctx->phis, instr, result);
3690 }
3691
3692 static void visit_post_phi(struct ac_nir_context *ctx,
3693 nir_phi_instr *instr,
3694 LLVMValueRef llvm_phi)
3695 {
3696 nir_foreach_phi_src(src, instr) {
3697 LLVMBasicBlockRef block = get_block(ctx, src->pred);
3698 LLVMValueRef llvm_src = get_src(ctx, src->src);
3699
3700 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
3701 }
3702 }
3703
3704 static void phi_post_pass(struct ac_nir_context *ctx)
3705 {
3706 hash_table_foreach(ctx->phis, entry) {
3707 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
3708 (LLVMValueRef)entry->data);
3709 }
3710 }
3711
3712
3713 static void visit_ssa_undef(struct ac_nir_context *ctx,
3714 const nir_ssa_undef_instr *instr)
3715 {
3716 unsigned num_components = instr->def.num_components;
3717 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
3718 LLVMValueRef undef;
3719
3720 if (num_components == 1)
3721 undef = LLVMGetUndef(type);
3722 else {
3723 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
3724 }
3725 ctx->ssa_defs[instr->def.index] = undef;
3726 }
3727
3728 static void visit_jump(struct ac_llvm_context *ctx,
3729 const nir_jump_instr *instr)
3730 {
3731 switch (instr->type) {
3732 case nir_jump_break:
3733 ac_build_break(ctx);
3734 break;
3735 case nir_jump_continue:
3736 ac_build_continue(ctx);
3737 break;
3738 default:
3739 fprintf(stderr, "Unknown NIR jump instr: ");
3740 nir_print_instr(&instr->instr, stderr);
3741 fprintf(stderr, "\n");
3742 abort();
3743 }
3744 }
3745
3746 static void visit_deref(struct ac_nir_context *ctx,
3747 nir_deref_instr *instr)
3748 {
3749 if (instr->mode != nir_var_shared)
3750 return;
3751
3752 LLVMValueRef result = NULL;
3753 switch(instr->deref_type) {
3754 case nir_deref_type_var: {
3755 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
3756 result = entry->data;
3757 break;
3758 }
3759 case nir_deref_type_struct:
3760 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
3761 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
3762 break;
3763 case nir_deref_type_array:
3764 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
3765 get_src(ctx, instr->arr.index));
3766 break;
3767 case nir_deref_type_cast:
3768 result = get_src(ctx, instr->parent);
3769 break;
3770 default:
3771 unreachable("Unhandled deref_instr deref type");
3772 }
3773
3774 ctx->ssa_defs[instr->dest.ssa.index] = result;
3775 }
3776
3777 static void visit_cf_list(struct ac_nir_context *ctx,
3778 struct exec_list *list);
3779
3780 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
3781 {
3782 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->ac.builder);
3783 nir_foreach_instr(instr, block)
3784 {
3785 switch (instr->type) {
3786 case nir_instr_type_alu:
3787 visit_alu(ctx, nir_instr_as_alu(instr));
3788 break;
3789 case nir_instr_type_load_const:
3790 visit_load_const(ctx, nir_instr_as_load_const(instr));
3791 break;
3792 case nir_instr_type_intrinsic:
3793 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
3794 break;
3795 case nir_instr_type_tex:
3796 visit_tex(ctx, nir_instr_as_tex(instr));
3797 break;
3798 case nir_instr_type_phi:
3799 visit_phi(ctx, nir_instr_as_phi(instr));
3800 break;
3801 case nir_instr_type_ssa_undef:
3802 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
3803 break;
3804 case nir_instr_type_jump:
3805 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
3806 break;
3807 case nir_instr_type_deref:
3808 visit_deref(ctx, nir_instr_as_deref(instr));
3809 break;
3810 default:
3811 fprintf(stderr, "Unknown NIR instr type: ");
3812 nir_print_instr(instr, stderr);
3813 fprintf(stderr, "\n");
3814 abort();
3815 }
3816 }
3817
3818 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
3819 }
3820
3821 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
3822 {
3823 LLVMValueRef value = get_src(ctx, if_stmt->condition);
3824
3825 nir_block *then_block =
3826 (nir_block *) exec_list_get_head(&if_stmt->then_list);
3827
3828 ac_build_uif(&ctx->ac, value, then_block->index);
3829
3830 visit_cf_list(ctx, &if_stmt->then_list);
3831
3832 if (!exec_list_is_empty(&if_stmt->else_list)) {
3833 nir_block *else_block =
3834 (nir_block *) exec_list_get_head(&if_stmt->else_list);
3835
3836 ac_build_else(&ctx->ac, else_block->index);
3837 visit_cf_list(ctx, &if_stmt->else_list);
3838 }
3839
3840 ac_build_endif(&ctx->ac, then_block->index);
3841 }
3842
3843 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
3844 {
3845 nir_block *first_loop_block =
3846 (nir_block *) exec_list_get_head(&loop->body);
3847
3848 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
3849
3850 visit_cf_list(ctx, &loop->body);
3851
3852 ac_build_endloop(&ctx->ac, first_loop_block->index);
3853 }
3854
3855 static void visit_cf_list(struct ac_nir_context *ctx,
3856 struct exec_list *list)
3857 {
3858 foreach_list_typed(nir_cf_node, node, node, list)
3859 {
3860 switch (node->type) {
3861 case nir_cf_node_block:
3862 visit_block(ctx, nir_cf_node_as_block(node));
3863 break;
3864
3865 case nir_cf_node_if:
3866 visit_if(ctx, nir_cf_node_as_if(node));
3867 break;
3868
3869 case nir_cf_node_loop:
3870 visit_loop(ctx, nir_cf_node_as_loop(node));
3871 break;
3872
3873 default:
3874 assert(0);
3875 }
3876 }
3877 }
3878
3879 void
3880 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
3881 struct ac_shader_abi *abi,
3882 struct nir_shader *nir,
3883 struct nir_variable *variable,
3884 gl_shader_stage stage)
3885 {
3886 unsigned output_loc = variable->data.driver_location / 4;
3887 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3888
3889 /* tess ctrl has it's own load/store paths for outputs */
3890 if (stage == MESA_SHADER_TESS_CTRL)
3891 return;
3892
3893 if (stage == MESA_SHADER_VERTEX ||
3894 stage == MESA_SHADER_TESS_EVAL ||
3895 stage == MESA_SHADER_GEOMETRY) {
3896 int idx = variable->data.location + variable->data.index;
3897 if (idx == VARYING_SLOT_CLIP_DIST0) {
3898 int length = nir->info.clip_distance_array_size +
3899 nir->info.cull_distance_array_size;
3900
3901 if (length > 4)
3902 attrib_count = 2;
3903 else
3904 attrib_count = 1;
3905 }
3906 }
3907
3908 bool is_16bit = glsl_type_is_16bit(variable->type);
3909 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
3910 for (unsigned i = 0; i < attrib_count; ++i) {
3911 for (unsigned chan = 0; chan < 4; chan++) {
3912 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
3913 ac_build_alloca_undef(ctx, type, "");
3914 }
3915 }
3916 }
3917
3918 static LLVMTypeRef
3919 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
3920 enum glsl_base_type type)
3921 {
3922 switch (type) {
3923 case GLSL_TYPE_INT:
3924 case GLSL_TYPE_UINT:
3925 case GLSL_TYPE_BOOL:
3926 case GLSL_TYPE_SUBROUTINE:
3927 return ac->i32;
3928 case GLSL_TYPE_INT16:
3929 case GLSL_TYPE_UINT16:
3930 return ac->i16;
3931 case GLSL_TYPE_FLOAT:
3932 return ac->f32;
3933 case GLSL_TYPE_FLOAT16:
3934 return ac->f16;
3935 case GLSL_TYPE_INT64:
3936 case GLSL_TYPE_UINT64:
3937 return ac->i64;
3938 case GLSL_TYPE_DOUBLE:
3939 return ac->f64;
3940 default:
3941 unreachable("unknown GLSL type");
3942 }
3943 }
3944
3945 static LLVMTypeRef
3946 glsl_to_llvm_type(struct ac_llvm_context *ac,
3947 const struct glsl_type *type)
3948 {
3949 if (glsl_type_is_scalar(type)) {
3950 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
3951 }
3952
3953 if (glsl_type_is_vector(type)) {
3954 return LLVMVectorType(
3955 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
3956 glsl_get_vector_elements(type));
3957 }
3958
3959 if (glsl_type_is_matrix(type)) {
3960 return LLVMArrayType(
3961 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
3962 glsl_get_matrix_columns(type));
3963 }
3964
3965 if (glsl_type_is_array(type)) {
3966 return LLVMArrayType(
3967 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
3968 glsl_get_length(type));
3969 }
3970
3971 assert(glsl_type_is_struct(type));
3972
3973 LLVMTypeRef member_types[glsl_get_length(type)];
3974
3975 for (unsigned i = 0; i < glsl_get_length(type); i++) {
3976 member_types[i] =
3977 glsl_to_llvm_type(ac,
3978 glsl_get_struct_field(type, i));
3979 }
3980
3981 return LLVMStructTypeInContext(ac->context, member_types,
3982 glsl_get_length(type), false);
3983 }
3984
3985 static void
3986 setup_locals(struct ac_nir_context *ctx,
3987 struct nir_function *func)
3988 {
3989 int i, j;
3990 ctx->num_locals = 0;
3991 nir_foreach_variable(variable, &func->impl->locals) {
3992 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3993 variable->data.driver_location = ctx->num_locals * 4;
3994 variable->data.location_frac = 0;
3995 ctx->num_locals += attrib_count;
3996 }
3997 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
3998 if (!ctx->locals)
3999 return;
4000
4001 for (i = 0; i < ctx->num_locals; i++) {
4002 for (j = 0; j < 4; j++) {
4003 ctx->locals[i * 4 + j] =
4004 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4005 }
4006 }
4007 }
4008
4009 static void
4010 setup_shared(struct ac_nir_context *ctx,
4011 struct nir_shader *nir)
4012 {
4013 nir_foreach_variable(variable, &nir->shared) {
4014 LLVMValueRef shared =
4015 LLVMAddGlobalInAddressSpace(
4016 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4017 variable->name ? variable->name : "",
4018 AC_ADDR_SPACE_LDS);
4019 _mesa_hash_table_insert(ctx->vars, variable, shared);
4020 }
4021 }
4022
4023 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4024 struct nir_shader *nir)
4025 {
4026 struct ac_nir_context ctx = {};
4027 struct nir_function *func;
4028
4029 ctx.ac = *ac;
4030 ctx.abi = abi;
4031
4032 ctx.stage = nir->info.stage;
4033
4034 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4035
4036 nir_foreach_variable(variable, &nir->outputs)
4037 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4038 ctx.stage);
4039
4040 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4041 _mesa_key_pointer_equal);
4042 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4043 _mesa_key_pointer_equal);
4044 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4045 _mesa_key_pointer_equal);
4046
4047 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4048
4049 nir_index_ssa_defs(func->impl);
4050 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4051
4052 setup_locals(&ctx, func);
4053
4054 if (nir->info.stage == MESA_SHADER_COMPUTE)
4055 setup_shared(&ctx, nir);
4056
4057 visit_cf_list(&ctx, &func->impl->body);
4058 phi_post_pass(&ctx);
4059
4060 if (nir->info.stage != MESA_SHADER_COMPUTE)
4061 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4062 ctx.abi->outputs);
4063
4064 free(ctx.locals);
4065 free(ctx.ssa_defs);
4066 ralloc_free(ctx.defs);
4067 ralloc_free(ctx.phis);
4068 ralloc_free(ctx.vars);
4069 }
4070
4071 void
4072 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4073 {
4074 /* While it would be nice not to have this flag, we are constrained
4075 * by the reality that LLVM 5.0 doesn't have working VGPR indexing
4076 * on GFX9.
4077 */
4078 bool llvm_has_working_vgpr_indexing = chip_class <= VI;
4079
4080 /* TODO: Indirect indexing of GS inputs is unimplemented.
4081 *
4082 * TCS and TES load inputs directly from LDS or offchip memory, so
4083 * indirect indexing is trivial.
4084 */
4085 nir_variable_mode indirect_mask = 0;
4086 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4087 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4088 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4089 !llvm_has_working_vgpr_indexing)) {
4090 indirect_mask |= nir_var_shader_in;
4091 }
4092 if (!llvm_has_working_vgpr_indexing &&
4093 nir->info.stage != MESA_SHADER_TESS_CTRL)
4094 indirect_mask |= nir_var_shader_out;
4095
4096 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4097 * smart enough to handle indirects without causing excess spilling
4098 * causing the gpu to hang.
4099 *
4100 * See the following thread for more details of the problem:
4101 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4102 */
4103 indirect_mask |= nir_var_function;
4104
4105 nir_lower_indirect_derefs(nir, indirect_mask);
4106 }
4107
4108 static unsigned
4109 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4110 {
4111 if (intrin->intrinsic != nir_intrinsic_store_deref)
4112 return 0;
4113
4114 nir_variable *var =
4115 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4116
4117 if (var->data.mode != nir_var_shader_out)
4118 return 0;
4119
4120 unsigned writemask = 0;
4121 const int location = var->data.location;
4122 unsigned first_component = var->data.location_frac;
4123 unsigned num_comps = intrin->dest.ssa.num_components;
4124
4125 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4126 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4127 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4128 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4129
4130 return writemask;
4131 }
4132
4133 static void
4134 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4135 unsigned *cond_block_tf_writemask,
4136 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4137 {
4138 switch (cf_node->type) {
4139 case nir_cf_node_block: {
4140 nir_block *block = nir_cf_node_as_block(cf_node);
4141 nir_foreach_instr(instr, block) {
4142 if (instr->type != nir_instr_type_intrinsic)
4143 continue;
4144
4145 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4146 if (intrin->intrinsic == nir_intrinsic_barrier) {
4147
4148 /* If we find a barrier in nested control flow put this in the
4149 * too hard basket. In GLSL this is not possible but it is in
4150 * SPIR-V.
4151 */
4152 if (is_nested_cf) {
4153 *tessfactors_are_def_in_all_invocs = false;
4154 return;
4155 }
4156
4157 /* The following case must be prevented:
4158 * gl_TessLevelInner = ...;
4159 * barrier();
4160 * if (gl_InvocationID == 1)
4161 * gl_TessLevelInner = ...;
4162 *
4163 * If you consider disjoint code segments separated by barriers, each
4164 * such segment that writes tess factor channels should write the same
4165 * channels in all codepaths within that segment.
4166 */
4167 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4168 /* Accumulate the result: */
4169 *tessfactors_are_def_in_all_invocs &=
4170 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4171
4172 /* Analyze the next code segment from scratch. */
4173 *upper_block_tf_writemask = 0;
4174 *cond_block_tf_writemask = 0;
4175 }
4176 } else
4177 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4178 }
4179
4180 break;
4181 }
4182 case nir_cf_node_if: {
4183 unsigned then_tessfactor_writemask = 0;
4184 unsigned else_tessfactor_writemask = 0;
4185
4186 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4187 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4188 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4189 cond_block_tf_writemask,
4190 tessfactors_are_def_in_all_invocs, true);
4191 }
4192
4193 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4194 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4195 cond_block_tf_writemask,
4196 tessfactors_are_def_in_all_invocs, true);
4197 }
4198
4199 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4200 /* If both statements write the same tess factor channels,
4201 * we can say that the upper block writes them too.
4202 */
4203 *upper_block_tf_writemask |= then_tessfactor_writemask &
4204 else_tessfactor_writemask;
4205 *cond_block_tf_writemask |= then_tessfactor_writemask |
4206 else_tessfactor_writemask;
4207 }
4208
4209 break;
4210 }
4211 case nir_cf_node_loop: {
4212 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4213 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4214 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4215 cond_block_tf_writemask,
4216 tessfactors_are_def_in_all_invocs, true);
4217 }
4218
4219 break;
4220 }
4221 default:
4222 unreachable("unknown cf node type");
4223 }
4224 }
4225
4226 bool
4227 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4228 {
4229 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4230
4231 /* The pass works as follows:
4232 * If all codepaths write tess factors, we can say that all
4233 * invocations define tess factors.
4234 *
4235 * Each tess factor channel is tracked separately.
4236 */
4237 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4238 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4239
4240 /* Initial value = true. Here the pass will accumulate results from
4241 * multiple segments surrounded by barriers. If tess factors aren't
4242 * written at all, it's a shader bug and we don't care if this will be
4243 * true.
4244 */
4245 bool tessfactors_are_def_in_all_invocs = true;
4246
4247 nir_foreach_function(function, nir) {
4248 if (function->impl) {
4249 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4250 scan_tess_ctrl(node, &main_block_tf_writemask,
4251 &cond_block_tf_writemask,
4252 &tessfactors_are_def_in_all_invocs,
4253 false);
4254 }
4255 }
4256 }
4257
4258 /* Accumulate the result for the last code segment separated by a
4259 * barrier.
4260 */
4261 if (main_block_tf_writemask || cond_block_tf_writemask) {
4262 tessfactors_are_def_in_all_invocs &=
4263 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4264 }
4265
4266 return tessfactors_are_def_in_all_invocs;
4267 }