2 * Copyright © 2016 Bas Nieuwenhuizen
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
30 #include "../vulkan/radv_descriptor_set.h"
31 #include "util/bitscan.h"
32 #include <llvm-c/Transforms/Scalar.h>
34 enum radeon_llvm_calling_convention
{
35 RADEON_LLVM_AMDGPU_VS
= 87,
36 RADEON_LLVM_AMDGPU_GS
= 88,
37 RADEON_LLVM_AMDGPU_PS
= 89,
38 RADEON_LLVM_AMDGPU_CS
= 90,
41 #define CONST_ADDR_SPACE 2
42 #define LOCAL_ADDR_SPACE 3
44 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
45 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
54 struct nir_to_llvm_context
{
55 struct ac_llvm_context ac
;
56 const struct ac_nir_compiler_options
*options
;
57 struct ac_shader_variant_info
*shader_info
;
59 LLVMContextRef context
;
61 LLVMBuilderRef builder
;
62 LLVMValueRef main_function
;
64 struct hash_table
*defs
;
65 struct hash_table
*phis
;
67 LLVMValueRef descriptor_sets
[AC_UD_MAX_SETS
];
68 LLVMValueRef ring_offsets
;
69 LLVMValueRef push_constants
;
70 LLVMValueRef num_work_groups
;
71 LLVMValueRef workgroup_ids
;
72 LLVMValueRef local_invocation_ids
;
75 LLVMValueRef vertex_buffers
;
76 LLVMValueRef base_vertex
;
77 LLVMValueRef start_instance
;
78 LLVMValueRef draw_index
;
79 LLVMValueRef vertex_id
;
80 LLVMValueRef rel_auto_id
;
81 LLVMValueRef vs_prim_id
;
82 LLVMValueRef instance_id
;
84 LLVMValueRef es2gs_offset
;
86 LLVMValueRef gsvs_ring_stride
;
87 LLVMValueRef gsvs_num_entries
;
88 LLVMValueRef gs2vs_offset
;
89 LLVMValueRef gs_wave_id
;
90 LLVMValueRef gs_vtx_offset
[6];
91 LLVMValueRef gs_prim_id
, gs_invocation_id
;
93 LLVMValueRef esgs_ring
;
94 LLVMValueRef gsvs_ring
;
96 LLVMValueRef prim_mask
;
97 LLVMValueRef sample_positions
;
98 LLVMValueRef persp_sample
, persp_center
, persp_centroid
;
99 LLVMValueRef linear_sample
, linear_center
, linear_centroid
;
100 LLVMValueRef front_face
;
101 LLVMValueRef ancillary
;
102 LLVMValueRef sample_coverage
;
103 LLVMValueRef frag_pos
[4];
105 LLVMBasicBlockRef continue_block
;
106 LLVMBasicBlockRef break_block
;
126 LLVMValueRef i1false
;
127 LLVMValueRef i32zero
;
129 LLVMValueRef f32zero
;
131 LLVMValueRef v4f32empty
;
133 unsigned uniform_md_kind
;
134 LLVMValueRef empty_md
;
135 gl_shader_stage stage
;
138 LLVMValueRef inputs
[RADEON_LLVM_MAX_INPUTS
* 4];
139 LLVMValueRef outputs
[RADEON_LLVM_MAX_OUTPUTS
* 4];
141 LLVMValueRef shared_memory
;
143 uint64_t output_mask
;
145 LLVMValueRef
*locals
;
147 uint8_t num_input_clips
;
148 uint8_t num_input_culls
;
149 uint8_t num_output_clips
;
150 uint8_t num_output_culls
;
152 bool has_ds_bpermute
;
154 bool is_gs_copy_shader
;
155 LLVMValueRef gs_next_vertex
;
156 unsigned gs_max_out_vertices
;
159 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
160 nir_deref_var
*deref
,
161 enum desc_type desc_type
);
162 static unsigned radeon_llvm_reg_index_soa(unsigned index
, unsigned chan
)
164 return (index
* 4) + chan
;
167 static unsigned shader_io_get_unique_index(gl_varying_slot slot
)
169 if (slot
== VARYING_SLOT_POS
)
171 if (slot
== VARYING_SLOT_PSIZ
)
173 if (slot
== VARYING_SLOT_CLIP_DIST0
||
174 slot
== VARYING_SLOT_CULL_DIST0
)
176 if (slot
== VARYING_SLOT_CLIP_DIST1
||
177 slot
== VARYING_SLOT_CULL_DIST1
)
179 if (slot
>= VARYING_SLOT_VAR0
&& slot
<= VARYING_SLOT_VAR31
)
180 return 4 + (slot
- VARYING_SLOT_VAR0
);
181 unreachable("illegal slot in get unique index\n");
184 static unsigned llvm_get_type_size(LLVMTypeRef type
)
186 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
189 case LLVMIntegerTypeKind
:
190 return LLVMGetIntTypeWidth(type
) / 8;
191 case LLVMFloatTypeKind
:
193 case LLVMPointerTypeKind
:
195 case LLVMVectorTypeKind
:
196 return LLVMGetVectorSize(type
) *
197 llvm_get_type_size(LLVMGetElementType(type
));
204 static void set_llvm_calling_convention(LLVMValueRef func
,
205 gl_shader_stage stage
)
207 enum radeon_llvm_calling_convention calling_conv
;
210 case MESA_SHADER_VERTEX
:
211 case MESA_SHADER_TESS_CTRL
:
212 case MESA_SHADER_TESS_EVAL
:
213 calling_conv
= RADEON_LLVM_AMDGPU_VS
;
215 case MESA_SHADER_GEOMETRY
:
216 calling_conv
= RADEON_LLVM_AMDGPU_GS
;
218 case MESA_SHADER_FRAGMENT
:
219 calling_conv
= RADEON_LLVM_AMDGPU_PS
;
221 case MESA_SHADER_COMPUTE
:
222 calling_conv
= RADEON_LLVM_AMDGPU_CS
;
225 unreachable("Unhandle shader type");
228 LLVMSetFunctionCallConv(func
, calling_conv
);
232 create_llvm_function(LLVMContextRef ctx
, LLVMModuleRef module
,
233 LLVMBuilderRef builder
, LLVMTypeRef
*return_types
,
234 unsigned num_return_elems
, LLVMTypeRef
*param_types
,
235 unsigned param_count
, unsigned array_params_mask
,
236 unsigned sgpr_params
, bool unsafe_math
)
238 LLVMTypeRef main_function_type
, ret_type
;
239 LLVMBasicBlockRef main_function_body
;
241 if (num_return_elems
)
242 ret_type
= LLVMStructTypeInContext(ctx
, return_types
,
243 num_return_elems
, true);
245 ret_type
= LLVMVoidTypeInContext(ctx
);
247 /* Setup the function */
249 LLVMFunctionType(ret_type
, param_types
, param_count
, 0);
250 LLVMValueRef main_function
=
251 LLVMAddFunction(module
, "main", main_function_type
);
253 LLVMAppendBasicBlockInContext(ctx
, main_function
, "main_body");
254 LLVMPositionBuilderAtEnd(builder
, main_function_body
);
256 LLVMSetFunctionCallConv(main_function
, RADEON_LLVM_AMDGPU_CS
);
257 for (unsigned i
= 0; i
< sgpr_params
; ++i
) {
258 if (array_params_mask
& (1 << i
)) {
259 LLVMValueRef P
= LLVMGetParam(main_function
, i
);
260 ac_add_function_attr(ctx
, main_function
, i
+ 1, AC_FUNC_ATTR_BYVAL
);
261 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
264 ac_add_function_attr(ctx
, main_function
, i
+ 1, AC_FUNC_ATTR_INREG
);
269 /* These were copied from some LLVM test. */
270 LLVMAddTargetDependentFunctionAttr(main_function
,
271 "less-precise-fpmad",
273 LLVMAddTargetDependentFunctionAttr(main_function
,
276 LLVMAddTargetDependentFunctionAttr(main_function
,
279 LLVMAddTargetDependentFunctionAttr(main_function
,
283 return main_function
;
286 static LLVMTypeRef
const_array(LLVMTypeRef elem_type
, int num_elements
)
288 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
292 static LLVMValueRef
get_shared_memory_ptr(struct nir_to_llvm_context
*ctx
,
300 offset
= LLVMConstInt(ctx
->i32
, idx
, false);
302 ptr
= ctx
->shared_memory
;
303 ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &offset
, 1, "");
304 addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
305 ptr
= LLVMBuildBitCast(ctx
->builder
, ptr
, LLVMPointerType(type
, addr_space
), "");
309 static LLVMTypeRef
to_integer_type_scalar(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
311 if (t
== ctx
->f16
|| t
== ctx
->i16
)
313 else if (t
== ctx
->f32
|| t
== ctx
->i32
)
315 else if (t
== ctx
->f64
|| t
== ctx
->i64
)
318 unreachable("Unhandled integer size");
321 static LLVMTypeRef
to_integer_type(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
323 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
324 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
325 return LLVMVectorType(to_integer_type_scalar(ctx
, elem_type
),
326 LLVMGetVectorSize(t
));
328 return to_integer_type_scalar(ctx
, t
);
331 static LLVMValueRef
to_integer(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
)
333 LLVMTypeRef type
= LLVMTypeOf(v
);
334 return LLVMBuildBitCast(ctx
->builder
, v
, to_integer_type(ctx
, type
), "");
337 static LLVMTypeRef
to_float_type_scalar(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
339 if (t
== ctx
->i16
|| t
== ctx
->f16
)
341 else if (t
== ctx
->i32
|| t
== ctx
->f32
)
343 else if (t
== ctx
->i64
|| t
== ctx
->f64
)
346 unreachable("Unhandled float size");
349 static LLVMTypeRef
to_float_type(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
351 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
352 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
353 return LLVMVectorType(to_float_type_scalar(ctx
, elem_type
),
354 LLVMGetVectorSize(t
));
356 return to_float_type_scalar(ctx
, t
);
359 static LLVMValueRef
to_float(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
)
361 LLVMTypeRef type
= LLVMTypeOf(v
);
362 return LLVMBuildBitCast(ctx
->builder
, v
, to_float_type(ctx
, type
), "");
365 static int get_elem_bits(struct nir_to_llvm_context
*ctx
, LLVMTypeRef type
)
367 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
368 type
= LLVMGetElementType(type
);
370 if (LLVMGetTypeKind(type
) == LLVMIntegerTypeKind
)
371 return LLVMGetIntTypeWidth(type
);
373 if (type
== ctx
->f16
)
375 if (type
== ctx
->f32
)
377 if (type
== ctx
->f64
)
380 unreachable("Unhandled type kind in get_elem_bits");
383 static LLVMValueRef
unpack_param(struct nir_to_llvm_context
*ctx
,
384 LLVMValueRef param
, unsigned rshift
,
387 LLVMValueRef value
= param
;
389 value
= LLVMBuildLShr(ctx
->builder
, value
,
390 LLVMConstInt(ctx
->i32
, rshift
, false), "");
392 if (rshift
+ bitwidth
< 32) {
393 unsigned mask
= (1 << bitwidth
) - 1;
394 value
= LLVMBuildAnd(ctx
->builder
, value
,
395 LLVMConstInt(ctx
->i32
, mask
, false), "");
400 static void set_userdata_location(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
)
402 ud_info
->sgpr_idx
= sgpr_idx
;
403 ud_info
->num_sgprs
= num_sgprs
;
404 ud_info
->indirect
= false;
405 ud_info
->indirect_offset
= 0;
408 static void set_userdata_location_shader(struct nir_to_llvm_context
*ctx
,
409 int idx
, uint8_t sgpr_idx
, uint8_t num_sgprs
)
411 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.shader_data
[idx
], sgpr_idx
, num_sgprs
);
415 static void set_userdata_location_indirect(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
,
416 uint32_t indirect_offset
)
418 ud_info
->sgpr_idx
= sgpr_idx
;
419 ud_info
->num_sgprs
= num_sgprs
;
420 ud_info
->indirect
= true;
421 ud_info
->indirect_offset
= indirect_offset
;
425 static void create_function(struct nir_to_llvm_context
*ctx
)
427 LLVMTypeRef arg_types
[23];
428 unsigned arg_idx
= 0;
429 unsigned array_params_mask
= 0;
430 unsigned sgpr_count
= 0, user_sgpr_count
;
432 unsigned num_sets
= ctx
->options
->layout
? ctx
->options
->layout
->num_sets
: 0;
433 unsigned user_sgpr_idx
;
434 bool need_push_constants
;
435 bool need_ring_offsets
= false;
437 /* until we sort out scratch/global buffers always assign ring offsets for gs/vs/es */
438 if (ctx
->stage
== MESA_SHADER_GEOMETRY
||
439 ctx
->stage
== MESA_SHADER_VERTEX
||
440 ctx
->is_gs_copy_shader
)
441 need_ring_offsets
= true;
443 need_push_constants
= true;
444 if (!ctx
->options
->layout
)
445 need_push_constants
= false;
446 else if (!ctx
->options
->layout
->push_constant_size
&&
447 !ctx
->options
->layout
->dynamic_offset_count
)
448 need_push_constants
= false;
450 if (need_ring_offsets
&& !ctx
->options
->supports_spill
) {
451 arg_types
[arg_idx
++] = const_array(ctx
->v16i8
, 8); /* address of rings */
454 /* 1 for each descriptor set */
455 for (unsigned i
= 0; i
< num_sets
; ++i
) {
456 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
457 array_params_mask
|= (1 << arg_idx
);
458 arg_types
[arg_idx
++] = const_array(ctx
->i8
, 1024 * 1024);
462 if (need_push_constants
) {
463 /* 1 for push constants and dynamic descriptors */
464 array_params_mask
|= (1 << arg_idx
);
465 arg_types
[arg_idx
++] = const_array(ctx
->i8
, 1024 * 1024);
468 switch (ctx
->stage
) {
469 case MESA_SHADER_COMPUTE
:
470 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3); /* grid size */
471 user_sgpr_count
= arg_idx
;
472 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3);
473 arg_types
[arg_idx
++] = ctx
->i32
;
474 sgpr_count
= arg_idx
;
476 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3);
478 case MESA_SHADER_VERTEX
:
479 if (!ctx
->is_gs_copy_shader
) {
480 arg_types
[arg_idx
++] = const_array(ctx
->v16i8
, 16); /* vertex buffers */
481 arg_types
[arg_idx
++] = ctx
->i32
; // base vertex
482 arg_types
[arg_idx
++] = ctx
->i32
; // start instance
483 arg_types
[arg_idx
++] = ctx
->i32
; // draw index
485 user_sgpr_count
= arg_idx
;
486 if (ctx
->options
->key
.vs
.as_es
)
487 arg_types
[arg_idx
++] = ctx
->i32
; //es2gs offset
488 sgpr_count
= arg_idx
;
489 arg_types
[arg_idx
++] = ctx
->i32
; // vertex id
490 if (!ctx
->is_gs_copy_shader
) {
491 arg_types
[arg_idx
++] = ctx
->i32
; // rel auto id
492 arg_types
[arg_idx
++] = ctx
->i32
; // vs prim id
493 arg_types
[arg_idx
++] = ctx
->i32
; // instance id
496 case MESA_SHADER_GEOMETRY
:
497 arg_types
[arg_idx
++] = ctx
->i32
; // gsvs stride
498 arg_types
[arg_idx
++] = ctx
->i32
; // gsvs num entires
499 user_sgpr_count
= arg_idx
;
500 arg_types
[arg_idx
++] = ctx
->i32
; // gs2vs offset
501 arg_types
[arg_idx
++] = ctx
->i32
; // wave id
502 sgpr_count
= arg_idx
;
503 arg_types
[arg_idx
++] = ctx
->i32
; // vtx0
504 arg_types
[arg_idx
++] = ctx
->i32
; // vtx1
505 arg_types
[arg_idx
++] = ctx
->i32
; // prim id
506 arg_types
[arg_idx
++] = ctx
->i32
; // vtx2
507 arg_types
[arg_idx
++] = ctx
->i32
; // vtx3
508 arg_types
[arg_idx
++] = ctx
->i32
; // vtx4
509 arg_types
[arg_idx
++] = ctx
->i32
; // vtx5
510 arg_types
[arg_idx
++] = ctx
->i32
; // GS instance id
512 case MESA_SHADER_FRAGMENT
:
513 arg_types
[arg_idx
++] = const_array(ctx
->f32
, 32); /* sample positions */
514 user_sgpr_count
= arg_idx
;
515 arg_types
[arg_idx
++] = ctx
->i32
; /* prim mask */
516 sgpr_count
= arg_idx
;
517 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp sample */
518 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp center */
519 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp centroid */
520 arg_types
[arg_idx
++] = ctx
->v3i32
; /* persp pull model */
521 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear sample */
522 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear center */
523 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear centroid */
524 arg_types
[arg_idx
++] = ctx
->f32
; /* line stipple tex */
525 arg_types
[arg_idx
++] = ctx
->f32
; /* pos x float */
526 arg_types
[arg_idx
++] = ctx
->f32
; /* pos y float */
527 arg_types
[arg_idx
++] = ctx
->f32
; /* pos z float */
528 arg_types
[arg_idx
++] = ctx
->f32
; /* pos w float */
529 arg_types
[arg_idx
++] = ctx
->i32
; /* front face */
530 arg_types
[arg_idx
++] = ctx
->i32
; /* ancillary */
531 arg_types
[arg_idx
++] = ctx
->i32
; /* sample coverage */
532 arg_types
[arg_idx
++] = ctx
->i32
; /* fixed pt */
535 unreachable("Shader stage not implemented");
538 ctx
->main_function
= create_llvm_function(
539 ctx
->context
, ctx
->module
, ctx
->builder
, NULL
, 0, arg_types
,
540 arg_idx
, array_params_mask
, sgpr_count
, ctx
->options
->unsafe_math
);
541 set_llvm_calling_convention(ctx
->main_function
, ctx
->stage
);
543 ctx
->shader_info
->num_input_sgprs
= 0;
544 ctx
->shader_info
->num_input_vgprs
= 0;
546 ctx
->shader_info
->num_user_sgprs
= ctx
->options
->supports_spill
? 2 : 0;
547 for (i
= 0; i
< user_sgpr_count
; i
++)
548 ctx
->shader_info
->num_user_sgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
550 ctx
->shader_info
->num_input_sgprs
= ctx
->shader_info
->num_user_sgprs
;
551 for (; i
< sgpr_count
; i
++)
552 ctx
->shader_info
->num_input_sgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
554 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
555 for (; i
< arg_idx
; ++i
)
556 ctx
->shader_info
->num_input_vgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
561 if (ctx
->options
->supports_spill
|| need_ring_offsets
) {
562 set_userdata_location_shader(ctx
, AC_UD_SCRATCH_RING_OFFSETS
, user_sgpr_idx
, 2);
564 if (ctx
->options
->supports_spill
) {
565 ctx
->ring_offsets
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.implicit.buffer.ptr",
566 LLVMPointerType(ctx
->i8
, CONST_ADDR_SPACE
),
567 NULL
, 0, AC_FUNC_ATTR_READNONE
);
568 ctx
->ring_offsets
= LLVMBuildBitCast(ctx
->builder
, ctx
->ring_offsets
,
569 const_array(ctx
->v16i8
, 8), "");
571 ctx
->ring_offsets
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
574 for (unsigned i
= 0; i
< num_sets
; ++i
) {
575 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
576 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.descriptor_sets
[i
], user_sgpr_idx
, 2);
578 ctx
->descriptor_sets
[i
] =
579 LLVMGetParam(ctx
->main_function
, arg_idx
++);
581 ctx
->descriptor_sets
[i
] = NULL
;
584 if (need_push_constants
) {
585 ctx
->push_constants
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
586 set_userdata_location_shader(ctx
, AC_UD_PUSH_CONSTANTS
, user_sgpr_idx
, 2);
590 switch (ctx
->stage
) {
591 case MESA_SHADER_COMPUTE
:
592 set_userdata_location_shader(ctx
, AC_UD_CS_GRID_SIZE
, user_sgpr_idx
, 3);
594 ctx
->num_work_groups
=
595 LLVMGetParam(ctx
->main_function
, arg_idx
++);
597 LLVMGetParam(ctx
->main_function
, arg_idx
++);
599 LLVMGetParam(ctx
->main_function
, arg_idx
++);
600 ctx
->local_invocation_ids
=
601 LLVMGetParam(ctx
->main_function
, arg_idx
++);
603 case MESA_SHADER_VERTEX
:
604 if (!ctx
->is_gs_copy_shader
) {
605 set_userdata_location_shader(ctx
, AC_UD_VS_VERTEX_BUFFERS
, user_sgpr_idx
, 2);
607 ctx
->vertex_buffers
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
608 set_userdata_location_shader(ctx
, AC_UD_VS_BASE_VERTEX_START_INSTANCE
, user_sgpr_idx
, 3);
610 ctx
->base_vertex
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
611 ctx
->start_instance
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
612 ctx
->draw_index
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
614 if (ctx
->options
->key
.vs
.as_es
)
615 ctx
->es2gs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
616 ctx
->vertex_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
617 if (!ctx
->is_gs_copy_shader
) {
618 ctx
->rel_auto_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
619 ctx
->vs_prim_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
620 ctx
->instance_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
623 case MESA_SHADER_GEOMETRY
:
624 set_userdata_location_shader(ctx
, AC_UD_GS_VS_RING_STRIDE_ENTRIES
, user_sgpr_idx
, 2);
626 ctx
->gsvs_ring_stride
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
627 ctx
->gsvs_num_entries
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
628 ctx
->gs2vs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
629 ctx
->gs_wave_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
630 ctx
->gs_vtx_offset
[0] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
631 ctx
->gs_vtx_offset
[1] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
632 ctx
->gs_prim_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
633 ctx
->gs_vtx_offset
[2] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
634 ctx
->gs_vtx_offset
[3] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
635 ctx
->gs_vtx_offset
[4] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
636 ctx
->gs_vtx_offset
[5] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
637 ctx
->gs_invocation_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
639 case MESA_SHADER_FRAGMENT
:
640 set_userdata_location_shader(ctx
, AC_UD_PS_SAMPLE_POS
, user_sgpr_idx
, 2);
642 ctx
->sample_positions
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
643 ctx
->prim_mask
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
644 ctx
->persp_sample
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
645 ctx
->persp_center
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
646 ctx
->persp_centroid
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
648 ctx
->linear_sample
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
649 ctx
->linear_center
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
650 ctx
->linear_centroid
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
651 arg_idx
++; /* line stipple */
652 ctx
->frag_pos
[0] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
653 ctx
->frag_pos
[1] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
654 ctx
->frag_pos
[2] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
655 ctx
->frag_pos
[3] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
656 ctx
->front_face
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
657 ctx
->ancillary
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
658 ctx
->sample_coverage
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
661 unreachable("Shader stage not implemented");
665 static void setup_types(struct nir_to_llvm_context
*ctx
)
667 LLVMValueRef args
[4];
669 ctx
->voidt
= LLVMVoidTypeInContext(ctx
->context
);
670 ctx
->i1
= LLVMIntTypeInContext(ctx
->context
, 1);
671 ctx
->i8
= LLVMIntTypeInContext(ctx
->context
, 8);
672 ctx
->i16
= LLVMIntTypeInContext(ctx
->context
, 16);
673 ctx
->i32
= LLVMIntTypeInContext(ctx
->context
, 32);
674 ctx
->i64
= LLVMIntTypeInContext(ctx
->context
, 64);
675 ctx
->v2i32
= LLVMVectorType(ctx
->i32
, 2);
676 ctx
->v3i32
= LLVMVectorType(ctx
->i32
, 3);
677 ctx
->v4i32
= LLVMVectorType(ctx
->i32
, 4);
678 ctx
->v8i32
= LLVMVectorType(ctx
->i32
, 8);
679 ctx
->f32
= LLVMFloatTypeInContext(ctx
->context
);
680 ctx
->f16
= LLVMHalfTypeInContext(ctx
->context
);
681 ctx
->f64
= LLVMDoubleTypeInContext(ctx
->context
);
682 ctx
->v2f32
= LLVMVectorType(ctx
->f32
, 2);
683 ctx
->v4f32
= LLVMVectorType(ctx
->f32
, 4);
684 ctx
->v16i8
= LLVMVectorType(ctx
->i8
, 16);
686 ctx
->i1false
= LLVMConstInt(ctx
->i1
, 0, false);
687 ctx
->i1true
= LLVMConstInt(ctx
->i1
, 1, false);
688 ctx
->i32zero
= LLVMConstInt(ctx
->i32
, 0, false);
689 ctx
->i32one
= LLVMConstInt(ctx
->i32
, 1, false);
690 ctx
->f32zero
= LLVMConstReal(ctx
->f32
, 0.0);
691 ctx
->f32one
= LLVMConstReal(ctx
->f32
, 1.0);
693 args
[0] = ctx
->f32zero
;
694 args
[1] = ctx
->f32zero
;
695 args
[2] = ctx
->f32zero
;
696 args
[3] = ctx
->f32one
;
697 ctx
->v4f32empty
= LLVMConstVector(args
, 4);
699 ctx
->uniform_md_kind
=
700 LLVMGetMDKindIDInContext(ctx
->context
, "amdgpu.uniform", 14);
701 ctx
->empty_md
= LLVMMDNodeInContext(ctx
->context
, NULL
, 0);
703 args
[0] = LLVMConstReal(ctx
->f32
, 2.5);
706 static int get_llvm_num_components(LLVMValueRef value
)
708 LLVMTypeRef type
= LLVMTypeOf(value
);
709 unsigned num_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
710 ? LLVMGetVectorSize(type
)
712 return num_components
;
715 static LLVMValueRef
llvm_extract_elem(struct nir_to_llvm_context
*ctx
,
719 int count
= get_llvm_num_components(value
);
721 assert(index
< count
);
725 return LLVMBuildExtractElement(ctx
->builder
, value
,
726 LLVMConstInt(ctx
->i32
, index
, false), "");
729 static LLVMValueRef
trim_vector(struct nir_to_llvm_context
*ctx
,
730 LLVMValueRef value
, unsigned count
)
732 unsigned num_components
= get_llvm_num_components(value
);
733 if (count
== num_components
)
736 LLVMValueRef masks
[] = {
737 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
738 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false)};
741 return LLVMBuildExtractElement(ctx
->builder
, value
, masks
[0],
744 LLVMValueRef swizzle
= LLVMConstVector(masks
, count
);
745 return LLVMBuildShuffleVector(ctx
->builder
, value
, value
, swizzle
, "");
749 build_store_values_extended(struct nir_to_llvm_context
*ctx
,
750 LLVMValueRef
*values
,
751 unsigned value_count
,
752 unsigned value_stride
,
755 LLVMBuilderRef builder
= ctx
->builder
;
758 if (value_count
== 1) {
759 LLVMBuildStore(builder
, vec
, values
[0]);
763 for (i
= 0; i
< value_count
; i
++) {
764 LLVMValueRef ptr
= values
[i
* value_stride
];
765 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, i
, false);
766 LLVMValueRef value
= LLVMBuildExtractElement(builder
, vec
, index
, "");
767 LLVMBuildStore(builder
, value
, ptr
);
771 static LLVMTypeRef
get_def_type(struct nir_to_llvm_context
*ctx
,
774 LLVMTypeRef type
= LLVMIntTypeInContext(ctx
->context
, def
->bit_size
);
775 if (def
->num_components
> 1) {
776 type
= LLVMVectorType(type
, def
->num_components
);
781 static LLVMValueRef
get_src(struct nir_to_llvm_context
*ctx
, nir_src src
)
784 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, src
.ssa
);
785 return (LLVMValueRef
)entry
->data
;
789 static LLVMBasicBlockRef
get_block(struct nir_to_llvm_context
*ctx
,
792 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, b
);
793 return (LLVMBasicBlockRef
)entry
->data
;
796 static LLVMValueRef
get_alu_src(struct nir_to_llvm_context
*ctx
,
798 unsigned num_components
)
800 LLVMValueRef value
= get_src(ctx
, src
.src
);
801 bool need_swizzle
= false;
804 LLVMTypeRef type
= LLVMTypeOf(value
);
805 unsigned src_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
806 ? LLVMGetVectorSize(type
)
809 for (unsigned i
= 0; i
< num_components
; ++i
) {
810 assert(src
.swizzle
[i
] < src_components
);
811 if (src
.swizzle
[i
] != i
)
815 if (need_swizzle
|| num_components
!= src_components
) {
816 LLVMValueRef masks
[] = {
817 LLVMConstInt(ctx
->i32
, src
.swizzle
[0], false),
818 LLVMConstInt(ctx
->i32
, src
.swizzle
[1], false),
819 LLVMConstInt(ctx
->i32
, src
.swizzle
[2], false),
820 LLVMConstInt(ctx
->i32
, src
.swizzle
[3], false)};
822 if (src_components
> 1 && num_components
== 1) {
823 value
= LLVMBuildExtractElement(ctx
->builder
, value
,
825 } else if (src_components
== 1 && num_components
> 1) {
826 LLVMValueRef values
[] = {value
, value
, value
, value
};
827 value
= ac_build_gather_values(&ctx
->ac
, values
, num_components
);
829 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
830 value
= LLVMBuildShuffleVector(ctx
->builder
, value
, value
,
839 static LLVMValueRef
emit_int_cmp(struct nir_to_llvm_context
*ctx
,
840 LLVMIntPredicate pred
, LLVMValueRef src0
,
843 LLVMValueRef result
= LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, "");
844 return LLVMBuildSelect(ctx
->builder
, result
,
845 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
846 LLVMConstInt(ctx
->i32
, 0, false), "");
849 static LLVMValueRef
emit_float_cmp(struct nir_to_llvm_context
*ctx
,
850 LLVMRealPredicate pred
, LLVMValueRef src0
,
854 src0
= to_float(ctx
, src0
);
855 src1
= to_float(ctx
, src1
);
856 result
= LLVMBuildFCmp(ctx
->builder
, pred
, src0
, src1
, "");
857 return LLVMBuildSelect(ctx
->builder
, result
,
858 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
859 LLVMConstInt(ctx
->i32
, 0, false), "");
862 static LLVMValueRef
emit_intrin_1f_param(struct nir_to_llvm_context
*ctx
,
864 LLVMTypeRef result_type
,
868 LLVMValueRef params
[] = {
872 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
873 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 1, AC_FUNC_ATTR_READNONE
);
876 static LLVMValueRef
emit_intrin_2f_param(struct nir_to_llvm_context
*ctx
,
878 LLVMTypeRef result_type
,
879 LLVMValueRef src0
, LLVMValueRef src1
)
882 LLVMValueRef params
[] = {
887 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
888 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 2, AC_FUNC_ATTR_READNONE
);
891 static LLVMValueRef
emit_intrin_3f_param(struct nir_to_llvm_context
*ctx
,
893 LLVMTypeRef result_type
,
894 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
897 LLVMValueRef params
[] = {
903 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
904 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 3, AC_FUNC_ATTR_READNONE
);
907 static LLVMValueRef
emit_bcsel(struct nir_to_llvm_context
*ctx
,
908 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
910 LLVMValueRef v
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, src0
,
912 return LLVMBuildSelect(ctx
->builder
, v
, src1
, src2
, "");
915 static LLVMValueRef
emit_find_lsb(struct nir_to_llvm_context
*ctx
,
918 LLVMValueRef params
[2] = {
921 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
922 * add special code to check for x=0. The reason is that
923 * the LLVM behavior for x=0 is different from what we
926 * The hardware already implements the correct behavior.
928 LLVMConstInt(ctx
->i32
, 1, false),
930 return ac_build_intrinsic(&ctx
->ac
, "llvm.cttz.i32", ctx
->i32
, params
, 2, AC_FUNC_ATTR_READNONE
);
933 static LLVMValueRef
emit_ifind_msb(struct nir_to_llvm_context
*ctx
,
936 return ac_build_imsb(&ctx
->ac
, src0
, ctx
->i32
);
939 static LLVMValueRef
emit_ufind_msb(struct nir_to_llvm_context
*ctx
,
942 return ac_build_umsb(&ctx
->ac
, src0
, ctx
->i32
);
945 static LLVMValueRef
emit_minmax_int(struct nir_to_llvm_context
*ctx
,
946 LLVMIntPredicate pred
,
947 LLVMValueRef src0
, LLVMValueRef src1
)
949 return LLVMBuildSelect(ctx
->builder
,
950 LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, ""),
955 static LLVMValueRef
emit_iabs(struct nir_to_llvm_context
*ctx
,
958 return emit_minmax_int(ctx
, LLVMIntSGT
, src0
,
959 LLVMBuildNeg(ctx
->builder
, src0
, ""));
962 static LLVMValueRef
emit_fsign(struct nir_to_llvm_context
*ctx
,
965 LLVMValueRef cmp
, val
;
967 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGT
, src0
, ctx
->f32zero
, "");
968 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->f32one
, src0
, "");
969 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
, val
, ctx
->f32zero
, "");
970 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstReal(ctx
->f32
, -1.0), "");
974 static LLVMValueRef
emit_isign(struct nir_to_llvm_context
*ctx
,
977 LLVMValueRef cmp
, val
;
979 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGT
, src0
, ctx
->i32zero
, "");
980 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->i32one
, src0
, "");
981 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGE
, val
, ctx
->i32zero
, "");
982 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstInt(ctx
->i32
, -1, true), "");
986 static LLVMValueRef
emit_ffract(struct nir_to_llvm_context
*ctx
,
989 const char *intr
= "llvm.floor.f32";
990 LLVMValueRef fsrc0
= to_float(ctx
, src0
);
991 LLVMValueRef params
[] = {
994 LLVMValueRef floor
= ac_build_intrinsic(&ctx
->ac
, intr
,
996 AC_FUNC_ATTR_READNONE
);
997 return LLVMBuildFSub(ctx
->builder
, fsrc0
, floor
, "");
1000 static LLVMValueRef
emit_uint_carry(struct nir_to_llvm_context
*ctx
,
1002 LLVMValueRef src0
, LLVMValueRef src1
)
1004 LLVMTypeRef ret_type
;
1005 LLVMTypeRef types
[] = { ctx
->i32
, ctx
->i1
};
1007 LLVMValueRef params
[] = { src0
, src1
};
1008 ret_type
= LLVMStructTypeInContext(ctx
->context
, types
,
1011 res
= ac_build_intrinsic(&ctx
->ac
, intrin
, ret_type
,
1012 params
, 2, AC_FUNC_ATTR_READNONE
);
1014 res
= LLVMBuildExtractValue(ctx
->builder
, res
, 1, "");
1015 res
= LLVMBuildZExt(ctx
->builder
, res
, ctx
->i32
, "");
1019 static LLVMValueRef
emit_b2f(struct nir_to_llvm_context
*ctx
,
1022 return LLVMBuildAnd(ctx
->builder
, src0
, LLVMBuildBitCast(ctx
->builder
, LLVMConstReal(ctx
->f32
, 1.0), ctx
->i32
, ""), "");
1025 static LLVMValueRef
emit_umul_high(struct nir_to_llvm_context
*ctx
,
1026 LLVMValueRef src0
, LLVMValueRef src1
)
1028 LLVMValueRef dst64
, result
;
1029 src0
= LLVMBuildZExt(ctx
->builder
, src0
, ctx
->i64
, "");
1030 src1
= LLVMBuildZExt(ctx
->builder
, src1
, ctx
->i64
, "");
1032 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1033 dst64
= LLVMBuildLShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1034 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1038 static LLVMValueRef
emit_imul_high(struct nir_to_llvm_context
*ctx
,
1039 LLVMValueRef src0
, LLVMValueRef src1
)
1041 LLVMValueRef dst64
, result
;
1042 src0
= LLVMBuildSExt(ctx
->builder
, src0
, ctx
->i64
, "");
1043 src1
= LLVMBuildSExt(ctx
->builder
, src1
, ctx
->i64
, "");
1045 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1046 dst64
= LLVMBuildAShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1047 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1051 static LLVMValueRef
emit_bitfield_extract(struct nir_to_llvm_context
*ctx
,
1053 LLVMValueRef srcs
[3])
1055 LLVMValueRef result
;
1056 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, srcs
[2], LLVMConstInt(ctx
->i32
, 32, false), "");
1058 result
= ac_build_bfe(&ctx
->ac
, srcs
[0], srcs
[1], srcs
[2], is_signed
);
1059 result
= LLVMBuildSelect(ctx
->builder
, icond
, srcs
[0], result
, "");
1063 static LLVMValueRef
emit_bitfield_insert(struct nir_to_llvm_context
*ctx
,
1064 LLVMValueRef src0
, LLVMValueRef src1
,
1065 LLVMValueRef src2
, LLVMValueRef src3
)
1067 LLVMValueRef bfi_args
[3], result
;
1069 bfi_args
[0] = LLVMBuildShl(ctx
->builder
,
1070 LLVMBuildSub(ctx
->builder
,
1071 LLVMBuildShl(ctx
->builder
,
1076 bfi_args
[1] = LLVMBuildShl(ctx
->builder
, src1
, src2
, "");
1079 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, src3
, LLVMConstInt(ctx
->i32
, 32, false), "");
1082 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
1083 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
1085 result
= LLVMBuildXor(ctx
->builder
, bfi_args
[2],
1086 LLVMBuildAnd(ctx
->builder
, bfi_args
[0],
1087 LLVMBuildXor(ctx
->builder
, bfi_args
[1], bfi_args
[2], ""), ""), "");
1089 result
= LLVMBuildSelect(ctx
->builder
, icond
, src1
, result
, "");
1093 static LLVMValueRef
emit_pack_half_2x16(struct nir_to_llvm_context
*ctx
,
1096 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1098 LLVMValueRef comp
[2];
1100 src0
= to_float(ctx
, src0
);
1101 comp
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, "");
1102 comp
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, "");
1103 for (i
= 0; i
< 2; i
++) {
1104 comp
[i
] = LLVMBuildFPTrunc(ctx
->builder
, comp
[i
], ctx
->f16
, "");
1105 comp
[i
] = LLVMBuildBitCast(ctx
->builder
, comp
[i
], ctx
->i16
, "");
1106 comp
[i
] = LLVMBuildZExt(ctx
->builder
, comp
[i
], ctx
->i32
, "");
1109 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
1110 comp
[0] = LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
1115 static LLVMValueRef
emit_unpack_half_2x16(struct nir_to_llvm_context
*ctx
,
1118 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1119 LLVMValueRef temps
[2], result
, val
;
1122 for (i
= 0; i
< 2; i
++) {
1123 val
= i
== 1 ? LLVMBuildLShr(ctx
->builder
, src0
, const16
, "") : src0
;
1124 val
= LLVMBuildTrunc(ctx
->builder
, val
, ctx
->i16
, "");
1125 val
= LLVMBuildBitCast(ctx
->builder
, val
, ctx
->f16
, "");
1126 temps
[i
] = LLVMBuildFPExt(ctx
->builder
, val
, ctx
->f32
, "");
1129 result
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), temps
[0],
1131 result
= LLVMBuildInsertElement(ctx
->builder
, result
, temps
[1],
1136 static LLVMValueRef
emit_ddxy(struct nir_to_llvm_context
*ctx
,
1142 LLVMValueRef result
;
1143 ctx
->has_ddxy
= true;
1145 if (!ctx
->lds
&& !ctx
->has_ds_bpermute
)
1146 ctx
->lds
= LLVMAddGlobalInAddressSpace(ctx
->module
,
1147 LLVMArrayType(ctx
->i32
, 64),
1148 "ddxy_lds", LOCAL_ADDR_SPACE
);
1150 if (op
== nir_op_fddx_fine
|| op
== nir_op_fddx
)
1151 mask
= AC_TID_MASK_LEFT
;
1152 else if (op
== nir_op_fddy_fine
|| op
== nir_op_fddy
)
1153 mask
= AC_TID_MASK_TOP
;
1155 mask
= AC_TID_MASK_TOP_LEFT
;
1157 /* for DDX we want to next X pixel, DDY next Y pixel. */
1158 if (op
== nir_op_fddx_fine
||
1159 op
== nir_op_fddx_coarse
||
1165 result
= ac_build_ddxy(&ctx
->ac
, ctx
->has_ds_bpermute
,
1166 mask
, idx
, ctx
->lds
,
1172 * this takes an I,J coordinate pair,
1173 * and works out the X and Y derivatives.
1174 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
1176 static LLVMValueRef
emit_ddxy_interp(
1177 struct nir_to_llvm_context
*ctx
,
1178 LLVMValueRef interp_ij
)
1180 LLVMValueRef result
[4], a
;
1183 for (i
= 0; i
< 2; i
++) {
1184 a
= LLVMBuildExtractElement(ctx
->builder
, interp_ij
,
1185 LLVMConstInt(ctx
->i32
, i
, false), "");
1186 result
[i
] = emit_ddxy(ctx
, nir_op_fddx
, a
);
1187 result
[2+i
] = emit_ddxy(ctx
, nir_op_fddy
, a
);
1189 return ac_build_gather_values(&ctx
->ac
, result
, 4);
1192 static void visit_alu(struct nir_to_llvm_context
*ctx
, nir_alu_instr
*instr
)
1194 LLVMValueRef src
[4], result
= NULL
;
1195 unsigned num_components
= instr
->dest
.dest
.ssa
.num_components
;
1196 unsigned src_components
;
1197 LLVMTypeRef def_type
= get_def_type(ctx
, &instr
->dest
.dest
.ssa
);
1199 assert(nir_op_infos
[instr
->op
].num_inputs
<= ARRAY_SIZE(src
));
1200 switch (instr
->op
) {
1206 case nir_op_pack_half_2x16
:
1209 case nir_op_unpack_half_2x16
:
1213 src_components
= num_components
;
1216 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1217 src
[i
] = get_alu_src(ctx
, instr
->src
[i
], src_components
);
1219 switch (instr
->op
) {
1225 src
[0] = to_float(ctx
, src
[0]);
1226 result
= LLVMBuildFNeg(ctx
->builder
, src
[0], "");
1229 result
= LLVMBuildNeg(ctx
->builder
, src
[0], "");
1232 result
= LLVMBuildNot(ctx
->builder
, src
[0], "");
1235 result
= LLVMBuildAdd(ctx
->builder
, src
[0], src
[1], "");
1238 src
[0] = to_float(ctx
, src
[0]);
1239 src
[1] = to_float(ctx
, src
[1]);
1240 result
= LLVMBuildFAdd(ctx
->builder
, src
[0], src
[1], "");
1243 src
[0] = to_float(ctx
, src
[0]);
1244 src
[1] = to_float(ctx
, src
[1]);
1245 result
= LLVMBuildFSub(ctx
->builder
, src
[0], src
[1], "");
1248 result
= LLVMBuildSub(ctx
->builder
, src
[0], src
[1], "");
1251 result
= LLVMBuildMul(ctx
->builder
, src
[0], src
[1], "");
1254 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1257 result
= LLVMBuildURem(ctx
->builder
, src
[0], src
[1], "");
1260 src
[0] = to_float(ctx
, src
[0]);
1261 src
[1] = to_float(ctx
, src
[1]);
1262 result
= ac_build_fdiv(&ctx
->ac
, src
[0], src
[1]);
1263 result
= emit_intrin_1f_param(ctx
, "llvm.floor",
1264 to_float_type(ctx
, def_type
), result
);
1265 result
= LLVMBuildFMul(ctx
->builder
, src
[1] , result
, "");
1266 result
= LLVMBuildFSub(ctx
->builder
, src
[0], result
, "");
1269 src
[0] = to_float(ctx
, src
[0]);
1270 src
[1] = to_float(ctx
, src
[1]);
1271 result
= LLVMBuildFRem(ctx
->builder
, src
[0], src
[1], "");
1274 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1277 result
= LLVMBuildSDiv(ctx
->builder
, src
[0], src
[1], "");
1280 result
= LLVMBuildUDiv(ctx
->builder
, src
[0], src
[1], "");
1283 src
[0] = to_float(ctx
, src
[0]);
1284 src
[1] = to_float(ctx
, src
[1]);
1285 result
= LLVMBuildFMul(ctx
->builder
, src
[0], src
[1], "");
1288 src
[0] = to_float(ctx
, src
[0]);
1289 src
[1] = to_float(ctx
, src
[1]);
1290 result
= ac_build_fdiv(&ctx
->ac
, src
[0], src
[1]);
1293 src
[0] = to_float(ctx
, src
[0]);
1294 result
= ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, src
[0]);
1297 result
= LLVMBuildAnd(ctx
->builder
, src
[0], src
[1], "");
1300 result
= LLVMBuildOr(ctx
->builder
, src
[0], src
[1], "");
1303 result
= LLVMBuildXor(ctx
->builder
, src
[0], src
[1], "");
1306 result
= LLVMBuildShl(ctx
->builder
, src
[0], src
[1], "");
1309 result
= LLVMBuildAShr(ctx
->builder
, src
[0], src
[1], "");
1312 result
= LLVMBuildLShr(ctx
->builder
, src
[0], src
[1], "");
1315 result
= emit_int_cmp(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1318 result
= emit_int_cmp(ctx
, LLVMIntNE
, src
[0], src
[1]);
1321 result
= emit_int_cmp(ctx
, LLVMIntEQ
, src
[0], src
[1]);
1324 result
= emit_int_cmp(ctx
, LLVMIntSGE
, src
[0], src
[1]);
1327 result
= emit_int_cmp(ctx
, LLVMIntULT
, src
[0], src
[1]);
1330 result
= emit_int_cmp(ctx
, LLVMIntUGE
, src
[0], src
[1]);
1333 result
= emit_float_cmp(ctx
, LLVMRealUEQ
, src
[0], src
[1]);
1336 result
= emit_float_cmp(ctx
, LLVMRealUNE
, src
[0], src
[1]);
1339 result
= emit_float_cmp(ctx
, LLVMRealULT
, src
[0], src
[1]);
1342 result
= emit_float_cmp(ctx
, LLVMRealUGE
, src
[0], src
[1]);
1345 result
= emit_intrin_1f_param(ctx
, "llvm.fabs",
1346 to_float_type(ctx
, def_type
), src
[0]);
1349 result
= emit_iabs(ctx
, src
[0]);
1352 result
= emit_minmax_int(ctx
, LLVMIntSGT
, src
[0], src
[1]);
1355 result
= emit_minmax_int(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1358 result
= emit_minmax_int(ctx
, LLVMIntUGT
, src
[0], src
[1]);
1361 result
= emit_minmax_int(ctx
, LLVMIntULT
, src
[0], src
[1]);
1364 result
= emit_isign(ctx
, src
[0]);
1367 src
[0] = to_float(ctx
, src
[0]);
1368 result
= emit_fsign(ctx
, src
[0]);
1371 result
= emit_intrin_1f_param(ctx
, "llvm.floor",
1372 to_float_type(ctx
, def_type
), src
[0]);
1375 result
= emit_intrin_1f_param(ctx
, "llvm.trunc",
1376 to_float_type(ctx
, def_type
), src
[0]);
1379 result
= emit_intrin_1f_param(ctx
, "llvm.ceil",
1380 to_float_type(ctx
, def_type
), src
[0]);
1382 case nir_op_fround_even
:
1383 result
= emit_intrin_1f_param(ctx
, "llvm.rint",
1384 to_float_type(ctx
, def_type
),src
[0]);
1387 result
= emit_ffract(ctx
, src
[0]);
1390 result
= emit_intrin_1f_param(ctx
, "llvm.sin",
1391 to_float_type(ctx
, def_type
), src
[0]);
1394 result
= emit_intrin_1f_param(ctx
, "llvm.cos",
1395 to_float_type(ctx
, def_type
), src
[0]);
1398 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt",
1399 to_float_type(ctx
, def_type
), src
[0]);
1402 result
= emit_intrin_1f_param(ctx
, "llvm.exp2",
1403 to_float_type(ctx
, def_type
), src
[0]);
1406 result
= emit_intrin_1f_param(ctx
, "llvm.log2",
1407 to_float_type(ctx
, def_type
), src
[0]);
1410 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt",
1411 to_float_type(ctx
, def_type
), src
[0]);
1412 result
= ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, result
);
1415 result
= emit_intrin_2f_param(ctx
, "llvm.pow",
1416 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1419 result
= emit_intrin_2f_param(ctx
, "llvm.maxnum",
1420 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1423 result
= emit_intrin_2f_param(ctx
, "llvm.minnum",
1424 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1427 result
= emit_intrin_3f_param(ctx
, "llvm.fma",
1428 to_float_type(ctx
, def_type
), src
[0], src
[1], src
[2]);
1430 case nir_op_ibitfield_extract
:
1431 result
= emit_bitfield_extract(ctx
, true, src
);
1433 case nir_op_ubitfield_extract
:
1434 result
= emit_bitfield_extract(ctx
, false, src
);
1436 case nir_op_bitfield_insert
:
1437 result
= emit_bitfield_insert(ctx
, src
[0], src
[1], src
[2], src
[3]);
1439 case nir_op_bitfield_reverse
:
1440 result
= ac_build_intrinsic(&ctx
->ac
, "llvm.bitreverse.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1442 case nir_op_bit_count
:
1443 result
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1448 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1449 src
[i
] = to_integer(ctx
, src
[i
]);
1450 result
= ac_build_gather_values(&ctx
->ac
, src
, num_components
);
1454 src
[0] = to_float(ctx
, src
[0]);
1455 result
= LLVMBuildFPToSI(ctx
->builder
, src
[0], def_type
, "");
1459 src
[0] = to_float(ctx
, src
[0]);
1460 result
= LLVMBuildFPToUI(ctx
->builder
, src
[0], def_type
, "");
1464 result
= LLVMBuildSIToFP(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1468 result
= LLVMBuildUIToFP(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1471 result
= LLVMBuildFPExt(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1474 result
= LLVMBuildFPTrunc(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1480 if (get_elem_bits(ctx
, LLVMTypeOf(src
[0])) < get_elem_bits(ctx
, def_type
))
1481 result
= LLVMBuildZExt(ctx
->builder
, src
[0], def_type
, "");
1483 result
= LLVMBuildTrunc(ctx
->builder
, src
[0], def_type
, "");
1489 if (get_elem_bits(ctx
, LLVMTypeOf(src
[0])) < get_elem_bits(ctx
, def_type
))
1490 result
= LLVMBuildSExt(ctx
->builder
, src
[0], def_type
, "");
1492 result
= LLVMBuildTrunc(ctx
->builder
, src
[0], def_type
, "");
1495 result
= emit_bcsel(ctx
, src
[0], src
[1], src
[2]);
1497 case nir_op_find_lsb
:
1498 result
= emit_find_lsb(ctx
, src
[0]);
1500 case nir_op_ufind_msb
:
1501 result
= emit_ufind_msb(ctx
, src
[0]);
1503 case nir_op_ifind_msb
:
1504 result
= emit_ifind_msb(ctx
, src
[0]);
1506 case nir_op_uadd_carry
:
1507 result
= emit_uint_carry(ctx
, "llvm.uadd.with.overflow.i32", src
[0], src
[1]);
1509 case nir_op_usub_borrow
:
1510 result
= emit_uint_carry(ctx
, "llvm.usub.with.overflow.i32", src
[0], src
[1]);
1513 result
= emit_b2f(ctx
, src
[0]);
1515 case nir_op_fquantize2f16
:
1516 src
[0] = to_float(ctx
, src
[0]);
1517 result
= LLVMBuildFPTrunc(ctx
->builder
, src
[0], ctx
->f16
, "");
1518 /* need to convert back up to f32 */
1519 result
= LLVMBuildFPExt(ctx
->builder
, result
, ctx
->f32
, "");
1521 case nir_op_umul_high
:
1522 result
= emit_umul_high(ctx
, src
[0], src
[1]);
1524 case nir_op_imul_high
:
1525 result
= emit_imul_high(ctx
, src
[0], src
[1]);
1527 case nir_op_pack_half_2x16
:
1528 result
= emit_pack_half_2x16(ctx
, src
[0]);
1530 case nir_op_unpack_half_2x16
:
1531 result
= emit_unpack_half_2x16(ctx
, src
[0]);
1535 case nir_op_fddx_fine
:
1536 case nir_op_fddy_fine
:
1537 case nir_op_fddx_coarse
:
1538 case nir_op_fddy_coarse
:
1539 result
= emit_ddxy(ctx
, instr
->op
, src
[0]);
1542 fprintf(stderr
, "Unknown NIR alu instr: ");
1543 nir_print_instr(&instr
->instr
, stderr
);
1544 fprintf(stderr
, "\n");
1549 assert(instr
->dest
.dest
.is_ssa
);
1550 result
= to_integer(ctx
, result
);
1551 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.dest
.ssa
,
1556 static void visit_load_const(struct nir_to_llvm_context
*ctx
,
1557 nir_load_const_instr
*instr
)
1559 LLVMValueRef values
[4], value
= NULL
;
1560 LLVMTypeRef element_type
=
1561 LLVMIntTypeInContext(ctx
->context
, instr
->def
.bit_size
);
1563 for (unsigned i
= 0; i
< instr
->def
.num_components
; ++i
) {
1564 switch (instr
->def
.bit_size
) {
1566 values
[i
] = LLVMConstInt(element_type
,
1567 instr
->value
.u32
[i
], false);
1570 values
[i
] = LLVMConstInt(element_type
,
1571 instr
->value
.u64
[i
], false);
1575 "unsupported nir load_const bit_size: %d\n",
1576 instr
->def
.bit_size
);
1580 if (instr
->def
.num_components
> 1) {
1581 value
= LLVMConstVector(values
, instr
->def
.num_components
);
1585 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, value
);
1588 static LLVMValueRef
cast_ptr(struct nir_to_llvm_context
*ctx
, LLVMValueRef ptr
,
1591 int addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
1592 return LLVMBuildBitCast(ctx
->builder
, ptr
,
1593 LLVMPointerType(type
, addr_space
), "");
1597 get_buffer_size(struct nir_to_llvm_context
*ctx
, LLVMValueRef descriptor
, bool in_elements
)
1600 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1601 LLVMConstInt(ctx
->i32
, 2, false), "");
1604 if (ctx
->options
->chip_class
>= VI
&& in_elements
) {
1605 /* On VI, the descriptor contains the size in bytes,
1606 * but TXQ must return the size in elements.
1607 * The stride is always non-zero for resources using TXQ.
1609 LLVMValueRef stride
=
1610 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1611 LLVMConstInt(ctx
->i32
, 1, false), "");
1612 stride
= LLVMBuildLShr(ctx
->builder
, stride
,
1613 LLVMConstInt(ctx
->i32
, 16, false), "");
1614 stride
= LLVMBuildAnd(ctx
->builder
, stride
,
1615 LLVMConstInt(ctx
->i32
, 0x3fff, false), "");
1617 size
= LLVMBuildUDiv(ctx
->builder
, size
, stride
, "");
1623 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
1626 static void build_int_type_name(
1628 char *buf
, unsigned bufsize
)
1630 assert(bufsize
>= 6);
1632 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
1633 snprintf(buf
, bufsize
, "v%ui32",
1634 LLVMGetVectorSize(type
));
1639 static LLVMValueRef
radv_lower_gather4_integer(struct nir_to_llvm_context
*ctx
,
1640 struct ac_image_args
*args
,
1641 nir_tex_instr
*instr
)
1643 LLVMValueRef coord
= args
->addr
;
1644 LLVMValueRef half_texel
[2];
1646 unsigned coord_vgpr_index
= (unsigned)args
->offset
+ (unsigned)args
->compare
;
1650 struct ac_image_args txq_args
= { 0 };
1652 txq_args
.da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
1653 txq_args
.opcode
= ac_image_get_resinfo
;
1654 txq_args
.dmask
= 0xf;
1655 txq_args
.addr
= ctx
->i32zero
;
1656 txq_args
.resource
= args
->resource
;
1657 LLVMValueRef size
= ac_build_image_opcode(&ctx
->ac
, &txq_args
);
1659 for (c
= 0; c
< 2; c
++) {
1660 half_texel
[c
] = LLVMBuildExtractElement(ctx
->builder
, size
,
1661 LLVMConstInt(ctx
->i32
, c
, false), "");
1662 half_texel
[c
] = LLVMBuildUIToFP(ctx
->builder
, half_texel
[c
], ctx
->f32
, "");
1663 half_texel
[c
] = ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, half_texel
[c
]);
1664 half_texel
[c
] = LLVMBuildFMul(ctx
->builder
, half_texel
[c
],
1665 LLVMConstReal(ctx
->f32
, -0.5), "");
1669 for (c
= 0; c
< 2; c
++) {
1671 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
1672 tmp
= LLVMBuildExtractElement(ctx
->builder
, coord
, index
, "");
1673 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
1674 tmp
= LLVMBuildFAdd(ctx
->builder
, tmp
, half_texel
[c
], "");
1675 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
1676 coord
= LLVMBuildInsertElement(ctx
->builder
, coord
, tmp
, index
, "");
1680 return ac_build_image_opcode(&ctx
->ac
, args
);
1683 static LLVMValueRef
build_tex_intrinsic(struct nir_to_llvm_context
*ctx
,
1684 nir_tex_instr
*instr
,
1685 struct ac_image_args
*args
)
1687 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
1688 return ac_build_buffer_load_format(&ctx
->ac
,
1691 LLVMConstInt(ctx
->i32
, 0, false),
1695 args
->opcode
= ac_image_sample
;
1696 args
->compare
= instr
->is_shadow
;
1698 switch (instr
->op
) {
1700 case nir_texop_txf_ms
:
1701 case nir_texop_samples_identical
:
1702 args
->opcode
= instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
? ac_image_load
: ac_image_load_mip
;
1703 args
->compare
= false;
1704 args
->offset
= false;
1713 case nir_texop_query_levels
:
1714 args
->opcode
= ac_image_get_resinfo
;
1717 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
1718 args
->level_zero
= true;
1724 args
->opcode
= ac_image_gather4
;
1725 args
->level_zero
= true;
1728 args
->opcode
= ac_image_get_lod
;
1729 args
->compare
= false;
1730 args
->offset
= false;
1736 if (instr
->op
== nir_texop_tg4
) {
1737 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
1738 if (stype
== GLSL_TYPE_UINT
|| stype
== GLSL_TYPE_INT
) {
1739 return radv_lower_gather4_integer(ctx
, args
, instr
);
1742 return ac_build_image_opcode(&ctx
->ac
, args
);
1745 static LLVMValueRef
visit_vulkan_resource_index(struct nir_to_llvm_context
*ctx
,
1746 nir_intrinsic_instr
*instr
)
1748 LLVMValueRef index
= get_src(ctx
, instr
->src
[0]);
1749 unsigned desc_set
= nir_intrinsic_desc_set(instr
);
1750 unsigned binding
= nir_intrinsic_binding(instr
);
1751 LLVMValueRef desc_ptr
= ctx
->descriptor_sets
[desc_set
];
1752 struct radv_pipeline_layout
*pipeline_layout
= ctx
->options
->layout
;
1753 struct radv_descriptor_set_layout
*layout
= pipeline_layout
->set
[desc_set
].layout
;
1754 unsigned base_offset
= layout
->binding
[binding
].offset
;
1755 LLVMValueRef offset
, stride
;
1757 if (layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
||
1758 layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
) {
1759 unsigned idx
= pipeline_layout
->set
[desc_set
].dynamic_offset_start
+
1760 layout
->binding
[binding
].dynamic_offset_offset
;
1761 desc_ptr
= ctx
->push_constants
;
1762 base_offset
= pipeline_layout
->push_constant_size
+ 16 * idx
;
1763 stride
= LLVMConstInt(ctx
->i32
, 16, false);
1765 stride
= LLVMConstInt(ctx
->i32
, layout
->binding
[binding
].size
, false);
1767 offset
= LLVMConstInt(ctx
->i32
, base_offset
, false);
1768 index
= LLVMBuildMul(ctx
->builder
, index
, stride
, "");
1769 offset
= LLVMBuildAdd(ctx
->builder
, offset
, index
, "");
1771 desc_ptr
= ac_build_gep0(&ctx
->ac
, desc_ptr
, offset
);
1772 desc_ptr
= cast_ptr(ctx
, desc_ptr
, ctx
->v4i32
);
1773 LLVMSetMetadata(desc_ptr
, ctx
->uniform_md_kind
, ctx
->empty_md
);
1775 return LLVMBuildLoad(ctx
->builder
, desc_ptr
, "");
1778 static LLVMValueRef
visit_load_push_constant(struct nir_to_llvm_context
*ctx
,
1779 nir_intrinsic_instr
*instr
)
1781 LLVMValueRef ptr
, addr
;
1783 addr
= LLVMConstInt(ctx
->i32
, nir_intrinsic_base(instr
), 0);
1784 addr
= LLVMBuildAdd(ctx
->builder
, addr
, get_src(ctx
, instr
->src
[0]), "");
1786 ptr
= ac_build_gep0(&ctx
->ac
, ctx
->push_constants
, addr
);
1787 ptr
= cast_ptr(ctx
, ptr
, get_def_type(ctx
, &instr
->dest
.ssa
));
1789 return LLVMBuildLoad(ctx
->builder
, ptr
, "");
1792 static LLVMValueRef
visit_get_buffer_size(struct nir_to_llvm_context
*ctx
,
1793 nir_intrinsic_instr
*instr
)
1795 LLVMValueRef desc
= get_src(ctx
, instr
->src
[0]);
1797 return get_buffer_size(ctx
, desc
, false);
1799 static void visit_store_ssbo(struct nir_to_llvm_context
*ctx
,
1800 nir_intrinsic_instr
*instr
)
1802 const char *store_name
;
1803 LLVMValueRef src_data
= get_src(ctx
, instr
->src
[0]);
1804 LLVMTypeRef data_type
= ctx
->f32
;
1805 int elem_size_mult
= get_elem_bits(ctx
, LLVMTypeOf(src_data
)) / 32;
1806 int components_32bit
= elem_size_mult
* instr
->num_components
;
1807 unsigned writemask
= nir_intrinsic_write_mask(instr
);
1808 LLVMValueRef base_data
, base_offset
;
1809 LLVMValueRef params
[6];
1811 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
1812 ctx
->shader_info
->fs
.writes_memory
= true;
1814 params
[1] = get_src(ctx
, instr
->src
[1]);
1815 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
1816 params
[4] = ctx
->i1false
; /* glc */
1817 params
[5] = ctx
->i1false
; /* slc */
1819 if (components_32bit
> 1)
1820 data_type
= LLVMVectorType(ctx
->f32
, components_32bit
);
1822 base_data
= to_float(ctx
, src_data
);
1823 base_data
= trim_vector(ctx
, base_data
, instr
->num_components
);
1824 base_data
= LLVMBuildBitCast(ctx
->builder
, base_data
,
1826 base_offset
= get_src(ctx
, instr
->src
[2]); /* voffset */
1830 LLVMValueRef offset
;
1832 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
1834 /* Due to an LLVM limitation, split 3-element writes
1835 * into a 2-element and a 1-element write. */
1837 writemask
|= 1 << (start
+ 2);
1841 start
*= elem_size_mult
;
1842 count
*= elem_size_mult
;
1845 writemask
|= ((1u << (count
- 4)) - 1u) << (start
+ 4);
1850 store_name
= "llvm.amdgcn.buffer.store.v4f32";
1852 } else if (count
== 2) {
1853 tmp
= LLVMBuildExtractElement(ctx
->builder
,
1854 base_data
, LLVMConstInt(ctx
->i32
, start
, false), "");
1855 data
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), tmp
,
1858 tmp
= LLVMBuildExtractElement(ctx
->builder
,
1859 base_data
, LLVMConstInt(ctx
->i32
, start
+ 1, false), "");
1860 data
= LLVMBuildInsertElement(ctx
->builder
, data
, tmp
,
1862 store_name
= "llvm.amdgcn.buffer.store.v2f32";
1866 if (get_llvm_num_components(base_data
) > 1)
1867 data
= LLVMBuildExtractElement(ctx
->builder
, base_data
,
1868 LLVMConstInt(ctx
->i32
, start
, false), "");
1871 store_name
= "llvm.amdgcn.buffer.store.f32";
1874 offset
= base_offset
;
1876 offset
= LLVMBuildAdd(ctx
->builder
, offset
, LLVMConstInt(ctx
->i32
, start
* 4, false), "");
1880 ac_build_intrinsic(&ctx
->ac
, store_name
,
1881 ctx
->voidt
, params
, 6, 0);
1885 static LLVMValueRef
visit_atomic_ssbo(struct nir_to_llvm_context
*ctx
,
1886 nir_intrinsic_instr
*instr
)
1889 LLVMValueRef params
[6];
1891 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
1892 ctx
->shader_info
->fs
.writes_memory
= true;
1894 if (instr
->intrinsic
== nir_intrinsic_ssbo_atomic_comp_swap
) {
1895 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[3]), 0);
1897 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[2]), 0);
1898 params
[arg_count
++] = get_src(ctx
, instr
->src
[0]);
1899 params
[arg_count
++] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
1900 params
[arg_count
++] = get_src(ctx
, instr
->src
[1]); /* voffset */
1901 params
[arg_count
++] = ctx
->i1false
; /* slc */
1903 switch (instr
->intrinsic
) {
1904 case nir_intrinsic_ssbo_atomic_add
:
1905 name
= "llvm.amdgcn.buffer.atomic.add";
1907 case nir_intrinsic_ssbo_atomic_imin
:
1908 name
= "llvm.amdgcn.buffer.atomic.smin";
1910 case nir_intrinsic_ssbo_atomic_umin
:
1911 name
= "llvm.amdgcn.buffer.atomic.umin";
1913 case nir_intrinsic_ssbo_atomic_imax
:
1914 name
= "llvm.amdgcn.buffer.atomic.smax";
1916 case nir_intrinsic_ssbo_atomic_umax
:
1917 name
= "llvm.amdgcn.buffer.atomic.umax";
1919 case nir_intrinsic_ssbo_atomic_and
:
1920 name
= "llvm.amdgcn.buffer.atomic.and";
1922 case nir_intrinsic_ssbo_atomic_or
:
1923 name
= "llvm.amdgcn.buffer.atomic.or";
1925 case nir_intrinsic_ssbo_atomic_xor
:
1926 name
= "llvm.amdgcn.buffer.atomic.xor";
1928 case nir_intrinsic_ssbo_atomic_exchange
:
1929 name
= "llvm.amdgcn.buffer.atomic.swap";
1931 case nir_intrinsic_ssbo_atomic_comp_swap
:
1932 name
= "llvm.amdgcn.buffer.atomic.cmpswap";
1938 return ac_build_intrinsic(&ctx
->ac
, name
, ctx
->i32
, params
, arg_count
, 0);
1941 static LLVMValueRef
visit_load_buffer(struct nir_to_llvm_context
*ctx
,
1942 nir_intrinsic_instr
*instr
)
1944 LLVMValueRef results
[2];
1945 int load_components
;
1946 int num_components
= instr
->num_components
;
1947 if (instr
->dest
.ssa
.bit_size
== 64)
1948 num_components
*= 2;
1950 for (int i
= 0; i
< num_components
; i
+= load_components
) {
1951 load_components
= MIN2(num_components
- i
, 4);
1952 const char *load_name
;
1953 LLVMTypeRef data_type
= ctx
->f32
;
1954 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, i
* 4, false);
1955 offset
= LLVMBuildAdd(ctx
->builder
, get_src(ctx
, instr
->src
[1]), offset
, "");
1957 if (load_components
== 3)
1958 data_type
= LLVMVectorType(ctx
->f32
, 4);
1959 else if (load_components
> 1)
1960 data_type
= LLVMVectorType(ctx
->f32
, load_components
);
1962 if (load_components
>= 3)
1963 load_name
= "llvm.amdgcn.buffer.load.v4f32";
1964 else if (load_components
== 2)
1965 load_name
= "llvm.amdgcn.buffer.load.v2f32";
1966 else if (load_components
== 1)
1967 load_name
= "llvm.amdgcn.buffer.load.f32";
1969 unreachable("unhandled number of components");
1971 LLVMValueRef params
[] = {
1972 get_src(ctx
, instr
->src
[0]),
1973 LLVMConstInt(ctx
->i32
, 0, false),
1979 results
[i
] = ac_build_intrinsic(&ctx
->ac
, load_name
, data_type
, params
, 5, 0);
1983 LLVMValueRef ret
= results
[0];
1984 if (num_components
> 4 || num_components
== 3) {
1985 LLVMValueRef masks
[] = {
1986 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
1987 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false),
1988 LLVMConstInt(ctx
->i32
, 4, false), LLVMConstInt(ctx
->i32
, 5, false),
1989 LLVMConstInt(ctx
->i32
, 6, false), LLVMConstInt(ctx
->i32
, 7, false)
1992 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
1993 ret
= LLVMBuildShuffleVector(ctx
->builder
, results
[0],
1994 results
[num_components
> 4 ? 1 : 0], swizzle
, "");
1997 return LLVMBuildBitCast(ctx
->builder
, ret
,
1998 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2001 static LLVMValueRef
visit_load_ubo_buffer(struct nir_to_llvm_context
*ctx
,
2002 nir_intrinsic_instr
*instr
)
2004 LLVMValueRef results
[8], ret
;
2005 LLVMValueRef rsrc
= get_src(ctx
, instr
->src
[0]);
2006 LLVMValueRef offset
= get_src(ctx
, instr
->src
[1]);
2007 int num_components
= instr
->num_components
;
2009 rsrc
= LLVMBuildBitCast(ctx
->builder
, rsrc
, LLVMVectorType(ctx
->i8
, 16), "");
2011 if (instr
->dest
.ssa
.bit_size
== 64)
2012 num_components
*= 2;
2014 for (unsigned i
= 0; i
< num_components
; ++i
) {
2015 LLVMValueRef params
[] = {
2017 LLVMBuildAdd(ctx
->builder
, LLVMConstInt(ctx
->i32
, 4 * i
, 0),
2020 results
[i
] = ac_build_intrinsic(&ctx
->ac
, "llvm.SI.load.const", ctx
->f32
,
2022 AC_FUNC_ATTR_READNONE
|
2023 AC_FUNC_ATTR_LEGACY
);
2027 ret
= ac_build_gather_values(&ctx
->ac
, results
, instr
->num_components
);
2028 return LLVMBuildBitCast(ctx
->builder
, ret
,
2029 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2033 radv_get_deref_offset(struct nir_to_llvm_context
*ctx
, nir_deref
*tail
,
2034 bool vs_in
, unsigned *vertex_index_out
,
2035 unsigned *const_out
, LLVMValueRef
*indir_out
)
2037 unsigned const_offset
= 0;
2038 LLVMValueRef offset
= NULL
;
2040 if (vertex_index_out
!= NULL
) {
2042 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2043 *vertex_index_out
= deref_array
->base_offset
;
2046 while (tail
->child
!= NULL
) {
2047 const struct glsl_type
*parent_type
= tail
->type
;
2050 if (tail
->deref_type
== nir_deref_type_array
) {
2051 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2052 LLVMValueRef index
, stride
, local_offset
;
2053 unsigned size
= glsl_count_attribute_slots(tail
->type
, vs_in
);
2055 const_offset
+= size
* deref_array
->base_offset
;
2056 if (deref_array
->deref_array_type
== nir_deref_array_type_direct
)
2059 assert(deref_array
->deref_array_type
== nir_deref_array_type_indirect
);
2060 index
= get_src(ctx
, deref_array
->indirect
);
2061 stride
= LLVMConstInt(ctx
->i32
, size
, 0);
2062 local_offset
= LLVMBuildMul(ctx
->builder
, stride
, index
, "");
2065 offset
= LLVMBuildAdd(ctx
->builder
, offset
, local_offset
, "");
2067 offset
= local_offset
;
2068 } else if (tail
->deref_type
== nir_deref_type_struct
) {
2069 nir_deref_struct
*deref_struct
= nir_deref_as_struct(tail
);
2071 for (unsigned i
= 0; i
< deref_struct
->index
; i
++) {
2072 const struct glsl_type
*ft
= glsl_get_struct_field(parent_type
, i
);
2073 const_offset
+= glsl_count_attribute_slots(ft
, vs_in
);
2076 unreachable("unsupported deref type");
2080 if (const_offset
&& offset
)
2081 offset
= LLVMBuildAdd(ctx
->builder
, offset
,
2082 LLVMConstInt(ctx
->i32
, const_offset
, 0),
2085 *const_out
= const_offset
;
2086 *indir_out
= offset
;
2090 load_gs_input(struct nir_to_llvm_context
*ctx
,
2091 nir_intrinsic_instr
*instr
)
2093 LLVMValueRef indir_index
, vtx_offset
;
2094 unsigned const_index
;
2095 LLVMValueRef args
[9];
2096 unsigned param
, vtx_offset_param
;
2097 LLVMValueRef value
[4], result
;
2098 unsigned vertex_index
;
2099 unsigned cull_offset
= 0;
2100 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
,
2101 false, &vertex_index
,
2102 &const_index
, &indir_index
);
2103 vtx_offset_param
= vertex_index
;
2104 assert(vtx_offset_param
< 6);
2105 vtx_offset
= LLVMBuildMul(ctx
->builder
, ctx
->gs_vtx_offset
[vtx_offset_param
],
2106 LLVMConstInt(ctx
->i32
, 4, false), "");
2108 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2109 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CULL_DIST0
)
2110 cull_offset
+= ctx
->num_input_clips
;
2111 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2113 args
[0] = ctx
->esgs_ring
;
2114 args
[1] = vtx_offset
;
2115 args
[2] = LLVMConstInt(ctx
->i32
, (param
* 4 + i
+ const_index
+ cull_offset
) * 256, false);
2116 args
[3] = ctx
->i32zero
;
2117 args
[4] = ctx
->i32one
; /* OFFEN */
2118 args
[5] = ctx
->i32zero
; /* IDXEN */
2119 args
[6] = ctx
->i32one
; /* GLC */
2120 args
[7] = ctx
->i32zero
; /* SLC */
2121 args
[8] = ctx
->i32zero
; /* TFE */
2123 value
[i
] = ac_build_intrinsic(&ctx
->ac
, "llvm.SI.buffer.load.dword.i32.i32",
2125 AC_FUNC_ATTR_READONLY
|
2126 AC_FUNC_ATTR_LEGACY
);
2128 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2133 static LLVMValueRef
visit_load_var(struct nir_to_llvm_context
*ctx
,
2134 nir_intrinsic_instr
*instr
)
2136 LLVMValueRef values
[8];
2137 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2138 int ve
= instr
->dest
.ssa
.num_components
;
2139 LLVMValueRef indir_index
;
2141 unsigned const_index
;
2142 bool vs_in
= ctx
->stage
== MESA_SHADER_VERTEX
&&
2143 instr
->variables
[0]->var
->data
.mode
== nir_var_shader_in
;
2144 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
, vs_in
, NULL
,
2145 &const_index
, &indir_index
);
2147 if (instr
->dest
.ssa
.bit_size
== 64)
2150 switch (instr
->variables
[0]->var
->data
.mode
) {
2151 case nir_var_shader_in
:
2152 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
2153 return load_gs_input(ctx
, instr
);
2155 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2157 unsigned count
= glsl_count_attribute_slots(
2158 instr
->variables
[0]->var
->type
,
2159 ctx
->stage
== MESA_SHADER_VERTEX
);
2161 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2162 &ctx
->ac
, ctx
->inputs
+ idx
+ chan
, count
,
2165 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2169 values
[chan
] = ctx
->inputs
[idx
+ chan
+ const_index
* 4];
2173 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2175 unsigned count
= glsl_count_attribute_slots(
2176 instr
->variables
[0]->var
->type
, false);
2178 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2179 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
2182 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2186 values
[chan
] = LLVMBuildLoad(ctx
->builder
, ctx
->locals
[idx
+ chan
+ const_index
* 4], "");
2190 case nir_var_shader_out
:
2191 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2193 unsigned count
= glsl_count_attribute_slots(
2194 instr
->variables
[0]->var
->type
, false);
2196 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2197 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2200 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2204 values
[chan
] = LLVMBuildLoad(ctx
->builder
,
2205 ctx
->outputs
[idx
+ chan
+ const_index
* 4],
2210 case nir_var_shared
: {
2211 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2212 LLVMValueRef derived_ptr
;
2215 indir_index
= LLVMBuildMul(ctx
->builder
, indir_index
, LLVMConstInt(ctx
->i32
, 4, false), "");
2217 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2218 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
2220 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
2221 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
2223 values
[chan
] = LLVMBuildLoad(ctx
->builder
, derived_ptr
, "");
2228 unreachable("unhandle variable mode");
2230 ret
= ac_build_gather_values(&ctx
->ac
, values
, ve
);
2231 return LLVMBuildBitCast(ctx
->builder
, ret
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2235 visit_store_var(struct nir_to_llvm_context
*ctx
,
2236 nir_intrinsic_instr
*instr
)
2238 LLVMValueRef temp_ptr
, value
;
2239 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2240 LLVMValueRef src
= to_float(ctx
, get_src(ctx
, instr
->src
[0]));
2241 int writemask
= instr
->const_index
[0];
2242 LLVMValueRef indir_index
;
2243 unsigned const_index
;
2244 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
, false,
2245 NULL
, &const_index
, &indir_index
);
2247 if (get_elem_bits(ctx
, LLVMTypeOf(src
)) == 64) {
2248 int old_writemask
= writemask
;
2250 src
= LLVMBuildBitCast(ctx
->builder
, src
,
2251 LLVMVectorType(ctx
->f32
, get_llvm_num_components(src
) * 2),
2255 for (unsigned chan
= 0; chan
< 4; chan
++) {
2256 if (old_writemask
& (1 << chan
))
2257 writemask
|= 3u << (2 * chan
);
2261 switch (instr
->variables
[0]->var
->data
.mode
) {
2262 case nir_var_shader_out
:
2263 for (unsigned chan
= 0; chan
< 8; chan
++) {
2265 if (!(writemask
& (1 << chan
)))
2268 value
= llvm_extract_elem(ctx
, src
, chan
);
2270 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CLIP_DIST0
||
2271 instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CULL_DIST0
)
2274 unsigned count
= glsl_count_attribute_slots(
2275 instr
->variables
[0]->var
->type
, false);
2277 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2278 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2281 if (get_llvm_num_components(tmp_vec
) > 1) {
2282 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
2283 value
, indir_index
, "");
2286 build_store_values_extended(ctx
, ctx
->outputs
+ idx
+ chan
,
2287 count
, stride
, tmp_vec
);
2290 temp_ptr
= ctx
->outputs
[idx
+ chan
+ const_index
* stride
];
2292 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
2297 for (unsigned chan
= 0; chan
< 8; chan
++) {
2298 if (!(writemask
& (1 << chan
)))
2301 value
= llvm_extract_elem(ctx
, src
, chan
);
2303 unsigned count
= glsl_count_attribute_slots(
2304 instr
->variables
[0]->var
->type
, false);
2306 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2307 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
2310 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
2311 value
, indir_index
, "");
2312 build_store_values_extended(ctx
, ctx
->locals
+ idx
+ chan
,
2315 temp_ptr
= ctx
->locals
[idx
+ chan
+ const_index
* 4];
2317 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
2321 case nir_var_shared
: {
2322 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2325 indir_index
= LLVMBuildMul(ctx
->builder
, indir_index
, LLVMConstInt(ctx
->i32
, 4, false), "");
2327 for (unsigned chan
= 0; chan
< 8; chan
++) {
2328 if (!(writemask
& (1 << chan
)))
2330 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
2331 LLVMValueRef derived_ptr
;
2334 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
2336 value
= llvm_extract_elem(ctx
, src
, chan
);
2337 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
2338 LLVMBuildStore(ctx
->builder
,
2339 to_integer(ctx
, value
), derived_ptr
);
2348 static int image_type_to_components_count(enum glsl_sampler_dim dim
, bool array
)
2351 case GLSL_SAMPLER_DIM_BUF
:
2353 case GLSL_SAMPLER_DIM_1D
:
2354 return array
? 2 : 1;
2355 case GLSL_SAMPLER_DIM_2D
:
2356 return array
? 3 : 2;
2357 case GLSL_SAMPLER_DIM_MS
:
2358 return array
? 4 : 3;
2359 case GLSL_SAMPLER_DIM_3D
:
2360 case GLSL_SAMPLER_DIM_CUBE
:
2362 case GLSL_SAMPLER_DIM_RECT
:
2363 case GLSL_SAMPLER_DIM_SUBPASS
:
2365 case GLSL_SAMPLER_DIM_SUBPASS_MS
:
2375 /* Adjust the sample index according to FMASK.
2377 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
2378 * which is the identity mapping. Each nibble says which physical sample
2379 * should be fetched to get that sample.
2381 * For example, 0x11111100 means there are only 2 samples stored and
2382 * the second sample covers 3/4 of the pixel. When reading samples 0
2383 * and 1, return physical sample 0 (determined by the first two 0s
2384 * in FMASK), otherwise return physical sample 1.
2386 * The sample index should be adjusted as follows:
2387 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
2389 static LLVMValueRef
adjust_sample_index_using_fmask(struct nir_to_llvm_context
*ctx
,
2390 LLVMValueRef coord_x
, LLVMValueRef coord_y
,
2391 LLVMValueRef coord_z
,
2392 LLVMValueRef sample_index
,
2393 LLVMValueRef fmask_desc_ptr
)
2395 LLVMValueRef fmask_load_address
[4];
2398 fmask_load_address
[0] = coord_x
;
2399 fmask_load_address
[1] = coord_y
;
2401 fmask_load_address
[2] = coord_z
;
2402 fmask_load_address
[3] = LLVMGetUndef(ctx
->i32
);
2405 struct ac_image_args args
= {0};
2407 args
.opcode
= ac_image_load
;
2408 args
.da
= coord_z
? true : false;
2409 args
.resource
= fmask_desc_ptr
;
2411 args
.addr
= ac_build_gather_values(&ctx
->ac
, fmask_load_address
, coord_z
? 4 : 2);
2413 res
= ac_build_image_opcode(&ctx
->ac
, &args
);
2415 res
= to_integer(ctx
, res
);
2416 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, false);
2417 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xf, false);
2419 LLVMValueRef fmask
= LLVMBuildExtractElement(ctx
->builder
,
2423 LLVMValueRef sample_index4
=
2424 LLVMBuildMul(ctx
->builder
, sample_index
, four
, "");
2425 LLVMValueRef shifted_fmask
=
2426 LLVMBuildLShr(ctx
->builder
, fmask
, sample_index4
, "");
2427 LLVMValueRef final_sample
=
2428 LLVMBuildAnd(ctx
->builder
, shifted_fmask
, F
, "");
2430 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
2431 * resource descriptor is 0 (invalid),
2433 LLVMValueRef fmask_desc
=
2434 LLVMBuildBitCast(ctx
->builder
, fmask_desc_ptr
,
2437 LLVMValueRef fmask_word1
=
2438 LLVMBuildExtractElement(ctx
->builder
, fmask_desc
,
2441 LLVMValueRef word1_is_nonzero
=
2442 LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
2443 fmask_word1
, ctx
->i32zero
, "");
2445 /* Replace the MSAA sample index. */
2447 LLVMBuildSelect(ctx
->builder
, word1_is_nonzero
,
2448 final_sample
, sample_index
, "");
2449 return sample_index
;
2452 static LLVMValueRef
get_image_coords(struct nir_to_llvm_context
*ctx
,
2453 nir_intrinsic_instr
*instr
)
2455 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
2456 if(instr
->variables
[0]->deref
.child
)
2457 type
= instr
->variables
[0]->deref
.child
->type
;
2459 LLVMValueRef src0
= get_src(ctx
, instr
->src
[0]);
2460 LLVMValueRef coords
[4];
2461 LLVMValueRef masks
[] = {
2462 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
2463 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false),
2466 LLVMValueRef sample_index
= llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[1]), 0);
2469 enum glsl_sampler_dim dim
= glsl_get_sampler_dim(type
);
2470 bool add_frag_pos
= (dim
== GLSL_SAMPLER_DIM_SUBPASS
||
2471 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
2472 bool is_ms
= (dim
== GLSL_SAMPLER_DIM_MS
||
2473 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
2475 count
= image_type_to_components_count(dim
,
2476 glsl_sampler_type_is_array(type
));
2479 LLVMValueRef fmask_load_address
[3];
2482 fmask_load_address
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[0], "");
2483 fmask_load_address
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[1], "");
2484 if (glsl_sampler_type_is_array(type
))
2485 fmask_load_address
[2] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[2], "");
2487 fmask_load_address
[2] = NULL
;
2489 for (chan
= 0; chan
< 2; ++chan
)
2490 fmask_load_address
[chan
] = LLVMBuildAdd(ctx
->builder
, fmask_load_address
[chan
], LLVMBuildFPToUI(ctx
->builder
, ctx
->frag_pos
[chan
], ctx
->i32
, ""), "");
2492 sample_index
= adjust_sample_index_using_fmask(ctx
,
2493 fmask_load_address
[0],
2494 fmask_load_address
[1],
2495 fmask_load_address
[2],
2497 get_sampler_desc(ctx
, instr
->variables
[0], DESC_FMASK
));
2500 if (instr
->src
[0].ssa
->num_components
)
2501 res
= LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[0], "");
2508 for (chan
= 0; chan
< count
; ++chan
) {
2509 coords
[chan
] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[chan
], "");
2513 for (chan
= 0; chan
< count
; ++chan
)
2514 coords
[chan
] = LLVMBuildAdd(ctx
->builder
, coords
[chan
], LLVMBuildFPToUI(ctx
->builder
, ctx
->frag_pos
[chan
], ctx
->i32
, ""), "");
2517 coords
[count
] = sample_index
;
2522 coords
[3] = LLVMGetUndef(ctx
->i32
);
2525 res
= ac_build_gather_values(&ctx
->ac
, coords
, count
);
2530 static LLVMValueRef
visit_image_load(struct nir_to_llvm_context
*ctx
,
2531 nir_intrinsic_instr
*instr
)
2533 LLVMValueRef params
[7];
2535 char intrinsic_name
[64];
2536 const nir_variable
*var
= instr
->variables
[0]->var
;
2537 const struct glsl_type
*type
= var
->type
;
2538 if(instr
->variables
[0]->deref
.child
)
2539 type
= instr
->variables
[0]->deref
.child
->type
;
2541 type
= glsl_without_array(type
);
2542 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
2543 params
[0] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
2544 params
[1] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
2545 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
2546 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
2547 params
[3] = ctx
->i1false
; /* glc */
2548 params
[4] = ctx
->i1false
; /* slc */
2549 res
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.load.format.v4f32", ctx
->v4f32
,
2552 res
= trim_vector(ctx
, res
, instr
->dest
.ssa
.num_components
);
2553 res
= to_integer(ctx
, res
);
2555 bool is_da
= glsl_sampler_type_is_array(type
) ||
2556 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
2557 LLVMValueRef da
= is_da
? ctx
->i1true
: ctx
->i1false
;
2558 LLVMValueRef glc
= ctx
->i1false
;
2559 LLVMValueRef slc
= ctx
->i1false
;
2561 params
[0] = get_image_coords(ctx
, instr
);
2562 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
2563 params
[2] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
2564 if (HAVE_LLVM
<= 0x0309) {
2565 params
[3] = ctx
->i1false
; /* r128 */
2570 LLVMValueRef lwe
= ctx
->i1false
;
2577 ac_get_image_intr_name("llvm.amdgcn.image.load",
2578 ctx
->v4f32
, /* vdata */
2579 LLVMTypeOf(params
[0]), /* coords */
2580 LLVMTypeOf(params
[1]), /* rsrc */
2581 intrinsic_name
, sizeof(intrinsic_name
));
2583 res
= ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->v4f32
,
2584 params
, 7, AC_FUNC_ATTR_READONLY
);
2586 return to_integer(ctx
, res
);
2589 static void visit_image_store(struct nir_to_llvm_context
*ctx
,
2590 nir_intrinsic_instr
*instr
)
2592 LLVMValueRef params
[8];
2593 char intrinsic_name
[64];
2594 const nir_variable
*var
= instr
->variables
[0]->var
;
2595 const struct glsl_type
*type
= glsl_without_array(var
->type
);
2597 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2598 ctx
->shader_info
->fs
.writes_memory
= true;
2600 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
2601 params
[0] = to_float(ctx
, get_src(ctx
, instr
->src
[2])); /* data */
2602 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
2603 params
[2] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
2604 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
2605 params
[3] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
2606 params
[4] = ctx
->i1false
; /* glc */
2607 params
[5] = ctx
->i1false
; /* slc */
2608 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.store.format.v4f32", ctx
->voidt
,
2611 bool is_da
= glsl_sampler_type_is_array(type
) ||
2612 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
2613 LLVMValueRef da
= is_da
? ctx
->i1true
: ctx
->i1false
;
2614 LLVMValueRef glc
= ctx
->i1false
;
2615 LLVMValueRef slc
= ctx
->i1false
;
2617 params
[0] = to_float(ctx
, get_src(ctx
, instr
->src
[2]));
2618 params
[1] = get_image_coords(ctx
, instr
); /* coords */
2619 params
[2] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
2620 params
[3] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
2621 if (HAVE_LLVM
<= 0x0309) {
2622 params
[4] = ctx
->i1false
; /* r128 */
2627 LLVMValueRef lwe
= ctx
->i1false
;
2634 ac_get_image_intr_name("llvm.amdgcn.image.store",
2635 LLVMTypeOf(params
[0]), /* vdata */
2636 LLVMTypeOf(params
[1]), /* coords */
2637 LLVMTypeOf(params
[2]), /* rsrc */
2638 intrinsic_name
, sizeof(intrinsic_name
));
2640 ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->voidt
,
2646 static LLVMValueRef
visit_image_atomic(struct nir_to_llvm_context
*ctx
,
2647 nir_intrinsic_instr
*instr
)
2649 LLVMValueRef params
[6];
2650 int param_count
= 0;
2651 const nir_variable
*var
= instr
->variables
[0]->var
;
2653 const char *base_name
= "llvm.amdgcn.image.atomic";
2654 const char *atomic_name
;
2655 LLVMValueRef coords
;
2656 char intrinsic_name
[32], coords_type
[8];
2657 const struct glsl_type
*type
= glsl_without_array(var
->type
);
2659 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2660 ctx
->shader_info
->fs
.writes_memory
= true;
2662 params
[param_count
++] = get_src(ctx
, instr
->src
[2]);
2663 if (instr
->intrinsic
== nir_intrinsic_image_atomic_comp_swap
)
2664 params
[param_count
++] = get_src(ctx
, instr
->src
[3]);
2666 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
2667 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
2668 coords
= params
[param_count
++] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
2669 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
2670 params
[param_count
++] = ctx
->i32zero
; /* voffset */
2671 params
[param_count
++] = ctx
->i1false
; /* glc */
2672 params
[param_count
++] = ctx
->i1false
; /* slc */
2674 bool da
= glsl_sampler_type_is_array(type
) ||
2675 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
2677 coords
= params
[param_count
++] = get_image_coords(ctx
, instr
);
2678 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
2679 params
[param_count
++] = ctx
->i1false
; /* r128 */
2680 params
[param_count
++] = da
? ctx
->i1true
: ctx
->i1false
; /* da */
2681 params
[param_count
++] = ctx
->i1false
; /* slc */
2684 switch (instr
->intrinsic
) {
2685 case nir_intrinsic_image_atomic_add
:
2686 atomic_name
= "add";
2688 case nir_intrinsic_image_atomic_min
:
2689 atomic_name
= "smin";
2691 case nir_intrinsic_image_atomic_max
:
2692 atomic_name
= "smax";
2694 case nir_intrinsic_image_atomic_and
:
2695 atomic_name
= "and";
2697 case nir_intrinsic_image_atomic_or
:
2700 case nir_intrinsic_image_atomic_xor
:
2701 atomic_name
= "xor";
2703 case nir_intrinsic_image_atomic_exchange
:
2704 atomic_name
= "swap";
2706 case nir_intrinsic_image_atomic_comp_swap
:
2707 atomic_name
= "cmpswap";
2712 build_int_type_name(LLVMTypeOf(coords
),
2713 coords_type
, sizeof(coords_type
));
2715 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
2716 "%s.%s.%s", base_name
, atomic_name
, coords_type
);
2717 return ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->i32
, params
, param_count
, 0);
2720 static LLVMValueRef
visit_image_size(struct nir_to_llvm_context
*ctx
,
2721 nir_intrinsic_instr
*instr
)
2724 const nir_variable
*var
= instr
->variables
[0]->var
;
2725 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
2726 bool da
= glsl_sampler_type_is_array(var
->type
) ||
2727 glsl_get_sampler_dim(var
->type
) == GLSL_SAMPLER_DIM_CUBE
;
2728 if(instr
->variables
[0]->deref
.child
)
2729 type
= instr
->variables
[0]->deref
.child
->type
;
2731 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
)
2732 return get_buffer_size(ctx
, get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
), true);
2734 struct ac_image_args args
= { 0 };
2738 args
.resource
= get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
2739 args
.opcode
= ac_image_get_resinfo
;
2740 args
.addr
= ctx
->i32zero
;
2742 res
= ac_build_image_opcode(&ctx
->ac
, &args
);
2744 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
&&
2745 glsl_sampler_type_is_array(type
)) {
2746 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
2747 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
2748 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, res
, two
, "");
2749 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
2750 res
= LLVMBuildInsertElement(ctx
->builder
, res
, z
, two
, "");
2755 static void emit_waitcnt(struct nir_to_llvm_context
*ctx
)
2757 LLVMValueRef args
[1] = {
2758 LLVMConstInt(ctx
->i32
, 0xf70, false),
2760 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.waitcnt",
2761 ctx
->voidt
, args
, 1, 0);
2764 static void emit_barrier(struct nir_to_llvm_context
*ctx
)
2767 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.barrier",
2768 ctx
->voidt
, NULL
, 0, 0);
2771 static void emit_discard_if(struct nir_to_llvm_context
*ctx
,
2772 nir_intrinsic_instr
*instr
)
2775 ctx
->shader_info
->fs
.can_discard
= true;
2777 cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
2778 get_src(ctx
, instr
->src
[0]),
2781 cond
= LLVMBuildSelect(ctx
->builder
, cond
,
2782 LLVMConstReal(ctx
->f32
, -1.0f
),
2784 ac_build_kill(&ctx
->ac
, cond
);
2788 visit_load_local_invocation_index(struct nir_to_llvm_context
*ctx
)
2790 LLVMValueRef result
;
2791 LLVMValueRef thread_id
= ac_get_thread_id(&ctx
->ac
);
2792 result
= LLVMBuildAnd(ctx
->builder
, ctx
->tg_size
,
2793 LLVMConstInt(ctx
->i32
, 0xfc0, false), "");
2795 return LLVMBuildAdd(ctx
->builder
, result
, thread_id
, "");
2798 static LLVMValueRef
visit_var_atomic(struct nir_to_llvm_context
*ctx
,
2799 nir_intrinsic_instr
*instr
)
2801 LLVMValueRef ptr
, result
;
2802 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2803 LLVMValueRef src
= get_src(ctx
, instr
->src
[0]);
2804 ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2806 if (instr
->intrinsic
== nir_intrinsic_var_atomic_comp_swap
) {
2807 LLVMValueRef src1
= get_src(ctx
, instr
->src
[1]);
2808 result
= LLVMBuildAtomicCmpXchg(ctx
->builder
,
2810 LLVMAtomicOrderingSequentiallyConsistent
,
2811 LLVMAtomicOrderingSequentiallyConsistent
,
2814 LLVMAtomicRMWBinOp op
;
2815 switch (instr
->intrinsic
) {
2816 case nir_intrinsic_var_atomic_add
:
2817 op
= LLVMAtomicRMWBinOpAdd
;
2819 case nir_intrinsic_var_atomic_umin
:
2820 op
= LLVMAtomicRMWBinOpUMin
;
2822 case nir_intrinsic_var_atomic_umax
:
2823 op
= LLVMAtomicRMWBinOpUMax
;
2825 case nir_intrinsic_var_atomic_imin
:
2826 op
= LLVMAtomicRMWBinOpMin
;
2828 case nir_intrinsic_var_atomic_imax
:
2829 op
= LLVMAtomicRMWBinOpMax
;
2831 case nir_intrinsic_var_atomic_and
:
2832 op
= LLVMAtomicRMWBinOpAnd
;
2834 case nir_intrinsic_var_atomic_or
:
2835 op
= LLVMAtomicRMWBinOpOr
;
2837 case nir_intrinsic_var_atomic_xor
:
2838 op
= LLVMAtomicRMWBinOpXor
;
2840 case nir_intrinsic_var_atomic_exchange
:
2841 op
= LLVMAtomicRMWBinOpXchg
;
2847 result
= LLVMBuildAtomicRMW(ctx
->builder
, op
, ptr
, to_integer(ctx
, src
),
2848 LLVMAtomicOrderingSequentiallyConsistent
,
2854 #define INTERP_CENTER 0
2855 #define INTERP_CENTROID 1
2856 #define INTERP_SAMPLE 2
2858 static LLVMValueRef
lookup_interp_param(struct nir_to_llvm_context
*ctx
,
2859 enum glsl_interp_mode interp
, unsigned location
)
2862 case INTERP_MODE_FLAT
:
2865 case INTERP_MODE_SMOOTH
:
2866 case INTERP_MODE_NONE
:
2867 if (location
== INTERP_CENTER
)
2868 return ctx
->persp_center
;
2869 else if (location
== INTERP_CENTROID
)
2870 return ctx
->persp_centroid
;
2871 else if (location
== INTERP_SAMPLE
)
2872 return ctx
->persp_sample
;
2874 case INTERP_MODE_NOPERSPECTIVE
:
2875 if (location
== INTERP_CENTER
)
2876 return ctx
->linear_center
;
2877 else if (location
== INTERP_CENTROID
)
2878 return ctx
->linear_centroid
;
2879 else if (location
== INTERP_SAMPLE
)
2880 return ctx
->linear_sample
;
2886 static LLVMValueRef
load_sample_position(struct nir_to_llvm_context
*ctx
,
2887 LLVMValueRef sample_id
)
2889 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
2890 LLVMValueRef offset0
= LLVMBuildMul(ctx
->builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, false), "");
2891 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, false), "");
2892 LLVMValueRef result
[2];
2894 result
[0] = ac_build_indexed_load_const(&ctx
->ac
, ctx
->sample_positions
, offset0
);
2895 result
[1] = ac_build_indexed_load_const(&ctx
->ac
, ctx
->sample_positions
, offset1
);
2897 return ac_build_gather_values(&ctx
->ac
, result
, 2);
2900 static LLVMValueRef
load_sample_pos(struct nir_to_llvm_context
*ctx
)
2902 LLVMValueRef values
[2];
2904 values
[0] = emit_ffract(ctx
, ctx
->frag_pos
[0]);
2905 values
[1] = emit_ffract(ctx
, ctx
->frag_pos
[1]);
2906 return ac_build_gather_values(&ctx
->ac
, values
, 2);
2909 static LLVMValueRef
visit_interp(struct nir_to_llvm_context
*ctx
,
2910 nir_intrinsic_instr
*instr
)
2912 LLVMValueRef result
[2];
2913 LLVMValueRef interp_param
, attr_number
;
2916 LLVMValueRef src_c0
, src_c1
;
2918 int input_index
= instr
->variables
[0]->var
->data
.location
- VARYING_SLOT_VAR0
;
2919 switch (instr
->intrinsic
) {
2920 case nir_intrinsic_interp_var_at_centroid
:
2921 location
= INTERP_CENTROID
;
2923 case nir_intrinsic_interp_var_at_sample
:
2924 location
= INTERP_SAMPLE
;
2925 src0
= get_src(ctx
, instr
->src
[0]);
2927 case nir_intrinsic_interp_var_at_offset
:
2928 location
= INTERP_CENTER
;
2929 src0
= get_src(ctx
, instr
->src
[0]);
2934 if (instr
->intrinsic
== nir_intrinsic_interp_var_at_offset
) {
2935 src_c0
= to_float(ctx
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, ""));
2936 src_c1
= to_float(ctx
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, ""));
2937 } else if (instr
->intrinsic
== nir_intrinsic_interp_var_at_sample
) {
2938 LLVMValueRef sample_position
;
2939 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
2941 /* fetch sample ID */
2942 sample_position
= load_sample_position(ctx
, src0
);
2944 src_c0
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32zero
, "");
2945 src_c0
= LLVMBuildFSub(ctx
->builder
, src_c0
, halfval
, "");
2946 src_c1
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32one
, "");
2947 src_c1
= LLVMBuildFSub(ctx
->builder
, src_c1
, halfval
, "");
2949 interp_param
= lookup_interp_param(ctx
, instr
->variables
[0]->var
->data
.interpolation
, location
);
2950 attr_number
= LLVMConstInt(ctx
->i32
, input_index
, false);
2952 if (location
== INTERP_SAMPLE
|| location
== INTERP_CENTER
) {
2953 LLVMValueRef ij_out
[2];
2954 LLVMValueRef ddxy_out
= emit_ddxy_interp(ctx
, interp_param
);
2957 * take the I then J parameters, and the DDX/Y for it, and
2958 * calculate the IJ inputs for the interpolator.
2959 * temp1 = ddx * offset/sample.x + I;
2960 * interp_param.I = ddy * offset/sample.y + temp1;
2961 * temp1 = ddx * offset/sample.x + J;
2962 * interp_param.J = ddy * offset/sample.y + temp1;
2964 for (unsigned i
= 0; i
< 2; i
++) {
2965 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, false);
2966 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, false);
2967 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->builder
,
2968 ddxy_out
, ix_ll
, "");
2969 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->builder
,
2970 ddxy_out
, iy_ll
, "");
2971 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->builder
,
2972 interp_param
, ix_ll
, "");
2973 LLVMValueRef temp1
, temp2
;
2975 interp_el
= LLVMBuildBitCast(ctx
->builder
, interp_el
,
2978 temp1
= LLVMBuildFMul(ctx
->builder
, ddx_el
, src_c0
, "");
2979 temp1
= LLVMBuildFAdd(ctx
->builder
, temp1
, interp_el
, "");
2981 temp2
= LLVMBuildFMul(ctx
->builder
, ddy_el
, src_c1
, "");
2982 temp2
= LLVMBuildFAdd(ctx
->builder
, temp2
, temp1
, "");
2984 ij_out
[i
] = LLVMBuildBitCast(ctx
->builder
,
2985 temp2
, ctx
->i32
, "");
2987 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
2991 for (chan
= 0; chan
< 2; chan
++) {
2992 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
2995 interp_param
= LLVMBuildBitCast(ctx
->builder
,
2996 interp_param
, LLVMVectorType(ctx
->f32
, 2), "");
2997 LLVMValueRef i
= LLVMBuildExtractElement(
2998 ctx
->builder
, interp_param
, ctx
->i32zero
, "");
2999 LLVMValueRef j
= LLVMBuildExtractElement(
3000 ctx
->builder
, interp_param
, ctx
->i32one
, "");
3002 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
3003 llvm_chan
, attr_number
,
3004 ctx
->prim_mask
, i
, j
);
3006 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
3007 LLVMConstInt(ctx
->i32
, 2, false),
3008 llvm_chan
, attr_number
,
3012 return ac_build_gather_values(&ctx
->ac
, result
, 2);
3016 visit_emit_vertex(struct nir_to_llvm_context
*ctx
,
3017 nir_intrinsic_instr
*instr
)
3019 LLVMValueRef gs_next_vertex
;
3020 LLVMValueRef can_emit
, kill
;
3022 int clip_cull_slot
= -1;
3023 assert(instr
->const_index
[0] == 0);
3024 /* Write vertex attribute values to GSVS ring */
3025 gs_next_vertex
= LLVMBuildLoad(ctx
->builder
,
3026 ctx
->gs_next_vertex
,
3029 /* If this thread has already emitted the declared maximum number of
3030 * vertices, kill it: excessive vertex emissions are not supposed to
3031 * have any effect, and GS threads have no externally observable
3032 * effects other than emitting vertices.
3034 can_emit
= LLVMBuildICmp(ctx
->builder
, LLVMIntULT
, gs_next_vertex
,
3035 LLVMConstInt(ctx
->i32
, ctx
->gs_max_out_vertices
, false), "");
3037 kill
= LLVMBuildSelect(ctx
->builder
, can_emit
,
3038 LLVMConstReal(ctx
->f32
, 1.0f
),
3039 LLVMConstReal(ctx
->f32
, -1.0f
), "");
3040 ac_build_kill(&ctx
->ac
, kill
);
3042 /* loop num outputs */
3044 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
3045 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
3051 if (!(ctx
->output_mask
& (1ull << i
)))
3054 if (i
== VARYING_SLOT_CLIP_DIST1
||
3055 i
== VARYING_SLOT_CULL_DIST1
)
3058 if (i
== VARYING_SLOT_CLIP_DIST0
||
3059 i
== VARYING_SLOT_CULL_DIST0
) {
3060 /* pack clip and cull into a single set of slots */
3061 if (clip_cull_slot
== -1) {
3062 clip_cull_slot
= idx
;
3063 if (ctx
->num_output_clips
+ ctx
->num_output_culls
> 4)
3066 slot
= clip_cull_slot
;
3069 if (i
== VARYING_SLOT_CLIP_DIST0
)
3070 length
= ctx
->num_output_clips
;
3071 if (i
== VARYING_SLOT_CULL_DIST0
) {
3072 start
= ctx
->num_output_clips
;
3073 length
= ctx
->num_output_culls
;
3076 for (unsigned j
= 0; j
< length
; j
++) {
3077 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
,
3079 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, (slot
* 4 + j
+ start
) * ctx
->gs_max_out_vertices
, false);
3080 voffset
= LLVMBuildAdd(ctx
->builder
, voffset
, gs_next_vertex
, "");
3081 voffset
= LLVMBuildMul(ctx
->builder
, voffset
, LLVMConstInt(ctx
->i32
, 4, false), "");
3083 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
3085 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->gsvs_ring
,
3087 voffset
, ctx
->gs2vs_offset
, 0,
3093 gs_next_vertex
= LLVMBuildAdd(ctx
->builder
, gs_next_vertex
,
3095 LLVMBuildStore(ctx
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
);
3097 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
3101 visit_end_primitive(struct nir_to_llvm_context
*ctx
,
3102 nir_intrinsic_instr
*instr
)
3104 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
3107 static void visit_intrinsic(struct nir_to_llvm_context
*ctx
,
3108 nir_intrinsic_instr
*instr
)
3110 LLVMValueRef result
= NULL
;
3112 switch (instr
->intrinsic
) {
3113 case nir_intrinsic_load_work_group_id
: {
3114 result
= ctx
->workgroup_ids
;
3117 case nir_intrinsic_load_base_vertex
: {
3118 result
= ctx
->base_vertex
;
3121 case nir_intrinsic_load_vertex_id_zero_base
: {
3122 result
= ctx
->vertex_id
;
3125 case nir_intrinsic_load_local_invocation_id
: {
3126 result
= ctx
->local_invocation_ids
;
3129 case nir_intrinsic_load_base_instance
:
3130 result
= ctx
->start_instance
;
3132 case nir_intrinsic_load_draw_id
:
3133 result
= ctx
->draw_index
;
3135 case nir_intrinsic_load_invocation_id
:
3136 result
= ctx
->gs_invocation_id
;
3138 case nir_intrinsic_load_primitive_id
:
3139 if (ctx
->stage
== MESA_SHADER_GEOMETRY
)
3140 result
= ctx
->gs_prim_id
;
3142 fprintf(stderr
, "Unknown primitive id intrinsic: %d", ctx
->stage
);
3144 case nir_intrinsic_load_sample_id
:
3145 ctx
->shader_info
->fs
.force_persample
= true;
3146 result
= unpack_param(ctx
, ctx
->ancillary
, 8, 4);
3148 case nir_intrinsic_load_sample_pos
:
3149 ctx
->shader_info
->fs
.force_persample
= true;
3150 result
= load_sample_pos(ctx
);
3152 case nir_intrinsic_load_sample_mask_in
:
3153 result
= ctx
->sample_coverage
;
3155 case nir_intrinsic_load_front_face
:
3156 result
= ctx
->front_face
;
3158 case nir_intrinsic_load_instance_id
:
3159 result
= ctx
->instance_id
;
3160 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
3161 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
3163 case nir_intrinsic_load_num_work_groups
:
3164 result
= ctx
->num_work_groups
;
3166 case nir_intrinsic_load_local_invocation_index
:
3167 result
= visit_load_local_invocation_index(ctx
);
3169 case nir_intrinsic_load_push_constant
:
3170 result
= visit_load_push_constant(ctx
, instr
);
3172 case nir_intrinsic_vulkan_resource_index
:
3173 result
= visit_vulkan_resource_index(ctx
, instr
);
3175 case nir_intrinsic_store_ssbo
:
3176 visit_store_ssbo(ctx
, instr
);
3178 case nir_intrinsic_load_ssbo
:
3179 result
= visit_load_buffer(ctx
, instr
);
3181 case nir_intrinsic_ssbo_atomic_add
:
3182 case nir_intrinsic_ssbo_atomic_imin
:
3183 case nir_intrinsic_ssbo_atomic_umin
:
3184 case nir_intrinsic_ssbo_atomic_imax
:
3185 case nir_intrinsic_ssbo_atomic_umax
:
3186 case nir_intrinsic_ssbo_atomic_and
:
3187 case nir_intrinsic_ssbo_atomic_or
:
3188 case nir_intrinsic_ssbo_atomic_xor
:
3189 case nir_intrinsic_ssbo_atomic_exchange
:
3190 case nir_intrinsic_ssbo_atomic_comp_swap
:
3191 result
= visit_atomic_ssbo(ctx
, instr
);
3193 case nir_intrinsic_load_ubo
:
3194 result
= visit_load_ubo_buffer(ctx
, instr
);
3196 case nir_intrinsic_get_buffer_size
:
3197 result
= visit_get_buffer_size(ctx
, instr
);
3199 case nir_intrinsic_load_var
:
3200 result
= visit_load_var(ctx
, instr
);
3202 case nir_intrinsic_store_var
:
3203 visit_store_var(ctx
, instr
);
3205 case nir_intrinsic_image_load
:
3206 result
= visit_image_load(ctx
, instr
);
3208 case nir_intrinsic_image_store
:
3209 visit_image_store(ctx
, instr
);
3211 case nir_intrinsic_image_atomic_add
:
3212 case nir_intrinsic_image_atomic_min
:
3213 case nir_intrinsic_image_atomic_max
:
3214 case nir_intrinsic_image_atomic_and
:
3215 case nir_intrinsic_image_atomic_or
:
3216 case nir_intrinsic_image_atomic_xor
:
3217 case nir_intrinsic_image_atomic_exchange
:
3218 case nir_intrinsic_image_atomic_comp_swap
:
3219 result
= visit_image_atomic(ctx
, instr
);
3221 case nir_intrinsic_image_size
:
3222 result
= visit_image_size(ctx
, instr
);
3224 case nir_intrinsic_discard
:
3225 ctx
->shader_info
->fs
.can_discard
= true;
3226 ac_build_intrinsic(&ctx
->ac
, "llvm.AMDGPU.kilp",
3228 NULL
, 0, AC_FUNC_ATTR_LEGACY
);
3230 case nir_intrinsic_discard_if
:
3231 emit_discard_if(ctx
, instr
);
3233 case nir_intrinsic_memory_barrier
:
3236 case nir_intrinsic_barrier
:
3239 case nir_intrinsic_var_atomic_add
:
3240 case nir_intrinsic_var_atomic_imin
:
3241 case nir_intrinsic_var_atomic_umin
:
3242 case nir_intrinsic_var_atomic_imax
:
3243 case nir_intrinsic_var_atomic_umax
:
3244 case nir_intrinsic_var_atomic_and
:
3245 case nir_intrinsic_var_atomic_or
:
3246 case nir_intrinsic_var_atomic_xor
:
3247 case nir_intrinsic_var_atomic_exchange
:
3248 case nir_intrinsic_var_atomic_comp_swap
:
3249 result
= visit_var_atomic(ctx
, instr
);
3251 case nir_intrinsic_interp_var_at_centroid
:
3252 case nir_intrinsic_interp_var_at_sample
:
3253 case nir_intrinsic_interp_var_at_offset
:
3254 result
= visit_interp(ctx
, instr
);
3256 case nir_intrinsic_emit_vertex
:
3257 visit_emit_vertex(ctx
, instr
);
3259 case nir_intrinsic_end_primitive
:
3260 visit_end_primitive(ctx
, instr
);
3263 fprintf(stderr
, "Unknown intrinsic: ");
3264 nir_print_instr(&instr
->instr
, stderr
);
3265 fprintf(stderr
, "\n");
3269 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
3273 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
3274 nir_deref_var
*deref
,
3275 enum desc_type desc_type
)
3277 unsigned desc_set
= deref
->var
->data
.descriptor_set
;
3278 LLVMValueRef list
= ctx
->descriptor_sets
[desc_set
];
3279 struct radv_descriptor_set_layout
*layout
= ctx
->options
->layout
->set
[desc_set
].layout
;
3280 struct radv_descriptor_set_binding_layout
*binding
= layout
->binding
+ deref
->var
->data
.binding
;
3281 unsigned offset
= binding
->offset
;
3282 unsigned stride
= binding
->size
;
3284 LLVMBuilderRef builder
= ctx
->builder
;
3286 LLVMValueRef index
= NULL
;
3287 unsigned constant_index
= 0;
3289 assert(deref
->var
->data
.binding
< layout
->binding_count
);
3291 switch (desc_type
) {
3303 if (binding
->type
== VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
)
3313 unreachable("invalid desc_type\n");
3316 if (deref
->deref
.child
) {
3317 nir_deref_array
*child
= (nir_deref_array
*)deref
->deref
.child
;
3319 assert(child
->deref_array_type
!= nir_deref_array_type_wildcard
);
3320 offset
+= child
->base_offset
* stride
;
3321 if (child
->deref_array_type
== nir_deref_array_type_indirect
) {
3322 index
= get_src(ctx
, child
->indirect
);
3325 constant_index
= child
->base_offset
;
3327 if (desc_type
== DESC_SAMPLER
&& binding
->immutable_samplers
&&
3328 (!index
|| binding
->immutable_samplers_equal
)) {
3329 if (binding
->immutable_samplers_equal
)
3332 LLVMValueRef constants
[] = {
3333 LLVMConstInt(ctx
->i32
, binding
->immutable_samplers
[constant_index
* 4 + 0], 0),
3334 LLVMConstInt(ctx
->i32
, binding
->immutable_samplers
[constant_index
* 4 + 1], 0),
3335 LLVMConstInt(ctx
->i32
, binding
->immutable_samplers
[constant_index
* 4 + 2], 0),
3336 LLVMConstInt(ctx
->i32
, binding
->immutable_samplers
[constant_index
* 4 + 3], 0),
3338 return ac_build_gather_values(&ctx
->ac
, constants
, 4);
3341 assert(stride
% type_size
== 0);
3344 index
= ctx
->i32zero
;
3346 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, stride
/ type_size
, 0), "");
3348 list
= ac_build_gep0(&ctx
->ac
, list
, LLVMConstInt(ctx
->i32
, offset
, 0));
3349 list
= LLVMBuildPointerCast(builder
, list
, const_array(type
, 0), "");
3351 return ac_build_indexed_load_const(&ctx
->ac
, list
, index
);
3354 static void set_tex_fetch_args(struct nir_to_llvm_context
*ctx
,
3355 struct ac_image_args
*args
,
3356 nir_tex_instr
*instr
,
3358 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
3359 LLVMValueRef
*param
, unsigned count
,
3362 unsigned is_rect
= 0;
3363 bool da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
3365 if (op
== nir_texop_lod
)
3367 /* Pad to power of two vector */
3368 while (count
< util_next_power_of_two(count
))
3369 param
[count
++] = LLVMGetUndef(ctx
->i32
);
3372 args
->addr
= ac_build_gather_values(&ctx
->ac
, param
, count
);
3374 args
->addr
= param
[0];
3376 args
->resource
= res_ptr
;
3377 args
->sampler
= samp_ptr
;
3379 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
&& op
== nir_texop_txf
) {
3380 args
->addr
= param
[0];
3384 args
->dmask
= dmask
;
3385 args
->unorm
= is_rect
;
3389 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3392 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3393 * filtering manually. The driver sets img7 to a mask clearing
3394 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3395 * s_and_b32 samp0, samp0, img7
3398 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3400 static LLVMValueRef
sici_fix_sampler_aniso(struct nir_to_llvm_context
*ctx
,
3401 LLVMValueRef res
, LLVMValueRef samp
)
3403 LLVMBuilderRef builder
= ctx
->builder
;
3404 LLVMValueRef img7
, samp0
;
3406 if (ctx
->options
->chip_class
>= VI
)
3409 img7
= LLVMBuildExtractElement(builder
, res
,
3410 LLVMConstInt(ctx
->i32
, 7, 0), "");
3411 samp0
= LLVMBuildExtractElement(builder
, samp
,
3412 LLVMConstInt(ctx
->i32
, 0, 0), "");
3413 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
3414 return LLVMBuildInsertElement(builder
, samp
, samp0
,
3415 LLVMConstInt(ctx
->i32
, 0, 0), "");
3418 static void tex_fetch_ptrs(struct nir_to_llvm_context
*ctx
,
3419 nir_tex_instr
*instr
,
3420 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
,
3421 LLVMValueRef
*fmask_ptr
)
3423 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
)
3424 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_BUFFER
);
3426 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_IMAGE
);
3429 *samp_ptr
= get_sampler_desc(ctx
, instr
->sampler
, DESC_SAMPLER
);
3431 *samp_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_SAMPLER
);
3432 if (instr
->sampler_dim
< GLSL_SAMPLER_DIM_RECT
)
3433 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
3435 if (fmask_ptr
&& !instr
->sampler
&& (instr
->op
== nir_texop_txf_ms
||
3436 instr
->op
== nir_texop_samples_identical
))
3437 *fmask_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_FMASK
);
3440 static LLVMValueRef
apply_round_slice(struct nir_to_llvm_context
*ctx
,
3443 coord
= to_float(ctx
, coord
);
3444 coord
= ac_build_intrinsic(&ctx
->ac
, "llvm.rint.f32", ctx
->f32
, &coord
, 1, 0);
3445 coord
= to_integer(ctx
, coord
);
3449 static void visit_tex(struct nir_to_llvm_context
*ctx
, nir_tex_instr
*instr
)
3451 LLVMValueRef result
= NULL
;
3452 struct ac_image_args args
= { 0 };
3453 unsigned dmask
= 0xf;
3454 LLVMValueRef address
[16];
3455 LLVMValueRef coords
[5];
3456 LLVMValueRef coord
= NULL
, lod
= NULL
, comparator
= NULL
;
3457 LLVMValueRef bias
= NULL
, offsets
= NULL
;
3458 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
, sample_index
= NULL
;
3459 LLVMValueRef ddx
= NULL
, ddy
= NULL
;
3460 LLVMValueRef derivs
[6];
3461 unsigned chan
, count
= 0;
3462 unsigned const_src
= 0, num_deriv_comp
= 0;
3464 tex_fetch_ptrs(ctx
, instr
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
3466 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
3467 switch (instr
->src
[i
].src_type
) {
3468 case nir_tex_src_coord
:
3469 coord
= get_src(ctx
, instr
->src
[i
].src
);
3471 case nir_tex_src_projector
:
3473 case nir_tex_src_comparator
:
3474 comparator
= get_src(ctx
, instr
->src
[i
].src
);
3476 case nir_tex_src_offset
:
3477 offsets
= get_src(ctx
, instr
->src
[i
].src
);
3480 case nir_tex_src_bias
:
3481 bias
= get_src(ctx
, instr
->src
[i
].src
);
3483 case nir_tex_src_lod
:
3484 lod
= get_src(ctx
, instr
->src
[i
].src
);
3486 case nir_tex_src_ms_index
:
3487 sample_index
= get_src(ctx
, instr
->src
[i
].src
);
3489 case nir_tex_src_ms_mcs
:
3491 case nir_tex_src_ddx
:
3492 ddx
= get_src(ctx
, instr
->src
[i
].src
);
3493 num_deriv_comp
= instr
->src
[i
].src
.ssa
->num_components
;
3495 case nir_tex_src_ddy
:
3496 ddy
= get_src(ctx
, instr
->src
[i
].src
);
3498 case nir_tex_src_texture_offset
:
3499 case nir_tex_src_sampler_offset
:
3500 case nir_tex_src_plane
:
3506 if (instr
->op
== nir_texop_txs
&& instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
3507 result
= get_buffer_size(ctx
, res_ptr
, true);
3511 if (instr
->op
== nir_texop_texture_samples
) {
3512 LLVMValueRef res
, samples
, is_msaa
;
3513 res
= LLVMBuildBitCast(ctx
->builder
, res_ptr
, ctx
->v8i32
, "");
3514 samples
= LLVMBuildExtractElement(ctx
->builder
, res
,
3515 LLVMConstInt(ctx
->i32
, 3, false), "");
3516 is_msaa
= LLVMBuildLShr(ctx
->builder
, samples
,
3517 LLVMConstInt(ctx
->i32
, 28, false), "");
3518 is_msaa
= LLVMBuildAnd(ctx
->builder
, is_msaa
,
3519 LLVMConstInt(ctx
->i32
, 0xe, false), "");
3520 is_msaa
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, is_msaa
,
3521 LLVMConstInt(ctx
->i32
, 0xe, false), "");
3523 samples
= LLVMBuildLShr(ctx
->builder
, samples
,
3524 LLVMConstInt(ctx
->i32
, 16, false), "");
3525 samples
= LLVMBuildAnd(ctx
->builder
, samples
,
3526 LLVMConstInt(ctx
->i32
, 0xf, false), "");
3527 samples
= LLVMBuildShl(ctx
->builder
, ctx
->i32one
,
3529 samples
= LLVMBuildSelect(ctx
->builder
, is_msaa
, samples
,
3536 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
3537 coords
[chan
] = llvm_extract_elem(ctx
, coord
, chan
);
3539 if (offsets
&& instr
->op
!= nir_texop_txf
) {
3540 LLVMValueRef offset
[3], pack
;
3541 for (chan
= 0; chan
< 3; ++chan
)
3542 offset
[chan
] = ctx
->i32zero
;
3545 for (chan
= 0; chan
< get_llvm_num_components(offsets
); chan
++) {
3546 offset
[chan
] = llvm_extract_elem(ctx
, offsets
, chan
);
3547 offset
[chan
] = LLVMBuildAnd(ctx
->builder
, offset
[chan
],
3548 LLVMConstInt(ctx
->i32
, 0x3f, false), "");
3550 offset
[chan
] = LLVMBuildShl(ctx
->builder
, offset
[chan
],
3551 LLVMConstInt(ctx
->i32
, chan
* 8, false), "");
3553 pack
= LLVMBuildOr(ctx
->builder
, offset
[0], offset
[1], "");
3554 pack
= LLVMBuildOr(ctx
->builder
, pack
, offset
[2], "");
3555 address
[count
++] = pack
;
3558 /* pack LOD bias value */
3559 if (instr
->op
== nir_texop_txb
&& bias
) {
3560 address
[count
++] = bias
;
3563 /* Pack depth comparison value */
3564 if (instr
->is_shadow
&& comparator
) {
3565 address
[count
++] = llvm_extract_elem(ctx
, comparator
, 0);
3568 /* pack derivatives */
3570 switch (instr
->sampler_dim
) {
3571 case GLSL_SAMPLER_DIM_3D
:
3572 case GLSL_SAMPLER_DIM_CUBE
:
3575 case GLSL_SAMPLER_DIM_2D
:
3579 case GLSL_SAMPLER_DIM_1D
:
3584 for (unsigned i
= 0; i
< num_deriv_comp
; i
++) {
3585 derivs
[i
* 2] = to_float(ctx
, llvm_extract_elem(ctx
, ddx
, i
));
3586 derivs
[i
* 2 + 1] = to_float(ctx
, llvm_extract_elem(ctx
, ddy
, i
));
3590 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&& coord
) {
3591 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
3592 coords
[chan
] = to_float(ctx
, coords
[chan
]);
3593 if (instr
->coord_components
== 3)
3594 coords
[3] = LLVMGetUndef(ctx
->f32
);
3595 ac_prepare_cube_coords(&ctx
->ac
,
3596 instr
->op
== nir_texop_txd
, instr
->is_array
,
3603 for (unsigned i
= 0; i
< num_deriv_comp
* 2; i
++)
3604 address
[count
++] = derivs
[i
];
3607 /* Pack texture coordinates */
3609 address
[count
++] = coords
[0];
3610 if (instr
->coord_components
> 1) {
3611 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_1D
&& instr
->is_array
&& instr
->op
!= nir_texop_txf
) {
3612 coords
[1] = apply_round_slice(ctx
, coords
[1]);
3614 address
[count
++] = coords
[1];
3616 if (instr
->coord_components
> 2) {
3617 /* This seems like a bit of a hack - but it passes Vulkan CTS with it */
3618 if (instr
->sampler_dim
!= GLSL_SAMPLER_DIM_3D
&& instr
->op
!= nir_texop_txf
) {
3619 coords
[2] = apply_round_slice(ctx
, coords
[2]);
3621 address
[count
++] = coords
[2];
3626 if ((instr
->op
== nir_texop_txl
|| instr
->op
== nir_texop_txf
) && lod
) {
3627 address
[count
++] = lod
;
3628 } else if (instr
->op
== nir_texop_txf_ms
&& sample_index
) {
3629 address
[count
++] = sample_index
;
3630 } else if(instr
->op
== nir_texop_txs
) {
3633 address
[count
++] = lod
;
3635 address
[count
++] = ctx
->i32zero
;
3638 for (chan
= 0; chan
< count
; chan
++) {
3639 address
[chan
] = LLVMBuildBitCast(ctx
->builder
,
3640 address
[chan
], ctx
->i32
, "");
3643 if (instr
->op
== nir_texop_samples_identical
) {
3644 LLVMValueRef txf_address
[4];
3645 struct ac_image_args txf_args
= { 0 };
3646 unsigned txf_count
= count
;
3647 memcpy(txf_address
, address
, sizeof(txf_address
));
3649 if (!instr
->is_array
)
3650 txf_address
[2] = ctx
->i32zero
;
3651 txf_address
[3] = ctx
->i32zero
;
3653 set_tex_fetch_args(ctx
, &txf_args
, instr
, nir_texop_txf
,
3655 txf_address
, txf_count
, 0xf);
3657 result
= build_tex_intrinsic(ctx
, instr
, &txf_args
);
3659 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
3660 result
= emit_int_cmp(ctx
, LLVMIntEQ
, result
, ctx
->i32zero
);
3664 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
&&
3665 instr
->op
!= nir_texop_txs
) {
3666 unsigned sample_chan
= instr
->is_array
? 3 : 2;
3667 address
[sample_chan
] = adjust_sample_index_using_fmask(ctx
,
3670 instr
->is_array
? address
[2] : NULL
,
3671 address
[sample_chan
],
3675 if (offsets
&& instr
->op
== nir_texop_txf
) {
3676 nir_const_value
*const_offset
=
3677 nir_src_as_const_value(instr
->src
[const_src
].src
);
3678 int num_offsets
= instr
->src
[const_src
].src
.ssa
->num_components
;
3679 assert(const_offset
);
3680 num_offsets
= MIN2(num_offsets
, instr
->coord_components
);
3681 if (num_offsets
> 2)
3682 address
[2] = LLVMBuildAdd(ctx
->builder
,
3683 address
[2], LLVMConstInt(ctx
->i32
, const_offset
->i32
[2], false), "");
3684 if (num_offsets
> 1)
3685 address
[1] = LLVMBuildAdd(ctx
->builder
,
3686 address
[1], LLVMConstInt(ctx
->i32
, const_offset
->i32
[1], false), "");
3687 address
[0] = LLVMBuildAdd(ctx
->builder
,
3688 address
[0], LLVMConstInt(ctx
->i32
, const_offset
->i32
[0], false), "");
3692 /* TODO TG4 support */
3693 if (instr
->op
== nir_texop_tg4
) {
3694 if (instr
->is_shadow
)
3697 dmask
= 1 << instr
->component
;
3699 set_tex_fetch_args(ctx
, &args
, instr
, instr
->op
,
3700 res_ptr
, samp_ptr
, address
, count
, dmask
);
3702 result
= build_tex_intrinsic(ctx
, instr
, &args
);
3704 if (instr
->op
== nir_texop_query_levels
)
3705 result
= LLVMBuildExtractElement(ctx
->builder
, result
, LLVMConstInt(ctx
->i32
, 3, false), "");
3706 else if (instr
->is_shadow
&& instr
->op
!= nir_texop_txs
&& instr
->op
!= nir_texop_lod
&& instr
->op
!= nir_texop_tg4
)
3707 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
3708 else if (instr
->op
== nir_texop_txs
&&
3709 instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&&
3711 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
3712 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
3713 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, result
, two
, "");
3714 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
3715 result
= LLVMBuildInsertElement(ctx
->builder
, result
, z
, two
, "");
3716 } else if (instr
->dest
.ssa
.num_components
!= 4)
3717 result
= trim_vector(ctx
, result
, instr
->dest
.ssa
.num_components
);
3721 assert(instr
->dest
.is_ssa
);
3722 result
= to_integer(ctx
, result
);
3723 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
3728 static void visit_phi(struct nir_to_llvm_context
*ctx
, nir_phi_instr
*instr
)
3730 LLVMTypeRef type
= get_def_type(ctx
, &instr
->dest
.ssa
);
3731 LLVMValueRef result
= LLVMBuildPhi(ctx
->builder
, type
, "");
3733 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
3734 _mesa_hash_table_insert(ctx
->phis
, instr
, result
);
3737 static void visit_post_phi(struct nir_to_llvm_context
*ctx
,
3738 nir_phi_instr
*instr
,
3739 LLVMValueRef llvm_phi
)
3741 nir_foreach_phi_src(src
, instr
) {
3742 LLVMBasicBlockRef block
= get_block(ctx
, src
->pred
);
3743 LLVMValueRef llvm_src
= get_src(ctx
, src
->src
);
3745 LLVMAddIncoming(llvm_phi
, &llvm_src
, &block
, 1);
3749 static void phi_post_pass(struct nir_to_llvm_context
*ctx
)
3751 struct hash_entry
*entry
;
3752 hash_table_foreach(ctx
->phis
, entry
) {
3753 visit_post_phi(ctx
, (nir_phi_instr
*)entry
->key
,
3754 (LLVMValueRef
)entry
->data
);
3759 static void visit_ssa_undef(struct nir_to_llvm_context
*ctx
,
3760 nir_ssa_undef_instr
*instr
)
3762 unsigned num_components
= instr
->def
.num_components
;
3765 if (num_components
== 1)
3766 undef
= LLVMGetUndef(ctx
->i32
);
3768 undef
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, num_components
));
3770 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, undef
);
3773 static void visit_jump(struct nir_to_llvm_context
*ctx
,
3774 nir_jump_instr
*instr
)
3776 switch (instr
->type
) {
3777 case nir_jump_break
:
3778 LLVMBuildBr(ctx
->builder
, ctx
->break_block
);
3779 LLVMClearInsertionPosition(ctx
->builder
);
3781 case nir_jump_continue
:
3782 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
3783 LLVMClearInsertionPosition(ctx
->builder
);
3786 fprintf(stderr
, "Unknown NIR jump instr: ");
3787 nir_print_instr(&instr
->instr
, stderr
);
3788 fprintf(stderr
, "\n");
3793 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
3794 struct exec_list
*list
);
3796 static void visit_block(struct nir_to_llvm_context
*ctx
, nir_block
*block
)
3798 LLVMBasicBlockRef llvm_block
= LLVMGetInsertBlock(ctx
->builder
);
3799 nir_foreach_instr(instr
, block
)
3801 switch (instr
->type
) {
3802 case nir_instr_type_alu
:
3803 visit_alu(ctx
, nir_instr_as_alu(instr
));
3805 case nir_instr_type_load_const
:
3806 visit_load_const(ctx
, nir_instr_as_load_const(instr
));
3808 case nir_instr_type_intrinsic
:
3809 visit_intrinsic(ctx
, nir_instr_as_intrinsic(instr
));
3811 case nir_instr_type_tex
:
3812 visit_tex(ctx
, nir_instr_as_tex(instr
));
3814 case nir_instr_type_phi
:
3815 visit_phi(ctx
, nir_instr_as_phi(instr
));
3817 case nir_instr_type_ssa_undef
:
3818 visit_ssa_undef(ctx
, nir_instr_as_ssa_undef(instr
));
3820 case nir_instr_type_jump
:
3821 visit_jump(ctx
, nir_instr_as_jump(instr
));
3824 fprintf(stderr
, "Unknown NIR instr type: ");
3825 nir_print_instr(instr
, stderr
);
3826 fprintf(stderr
, "\n");
3831 _mesa_hash_table_insert(ctx
->defs
, block
, llvm_block
);
3834 static void visit_if(struct nir_to_llvm_context
*ctx
, nir_if
*if_stmt
)
3836 LLVMValueRef value
= get_src(ctx
, if_stmt
->condition
);
3838 LLVMBasicBlockRef merge_block
=
3839 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
3840 LLVMBasicBlockRef if_block
=
3841 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
3842 LLVMBasicBlockRef else_block
= merge_block
;
3843 if (!exec_list_is_empty(&if_stmt
->else_list
))
3844 else_block
= LLVMAppendBasicBlockInContext(
3845 ctx
->context
, ctx
->main_function
, "");
3847 LLVMValueRef cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, value
,
3848 LLVMConstInt(ctx
->i32
, 0, false), "");
3849 LLVMBuildCondBr(ctx
->builder
, cond
, if_block
, else_block
);
3851 LLVMPositionBuilderAtEnd(ctx
->builder
, if_block
);
3852 visit_cf_list(ctx
, &if_stmt
->then_list
);
3853 if (LLVMGetInsertBlock(ctx
->builder
))
3854 LLVMBuildBr(ctx
->builder
, merge_block
);
3856 if (!exec_list_is_empty(&if_stmt
->else_list
)) {
3857 LLVMPositionBuilderAtEnd(ctx
->builder
, else_block
);
3858 visit_cf_list(ctx
, &if_stmt
->else_list
);
3859 if (LLVMGetInsertBlock(ctx
->builder
))
3860 LLVMBuildBr(ctx
->builder
, merge_block
);
3863 LLVMPositionBuilderAtEnd(ctx
->builder
, merge_block
);
3866 static void visit_loop(struct nir_to_llvm_context
*ctx
, nir_loop
*loop
)
3868 LLVMBasicBlockRef continue_parent
= ctx
->continue_block
;
3869 LLVMBasicBlockRef break_parent
= ctx
->break_block
;
3871 ctx
->continue_block
=
3872 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
3874 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
3876 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
3877 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->continue_block
);
3878 visit_cf_list(ctx
, &loop
->body
);
3880 if (LLVMGetInsertBlock(ctx
->builder
))
3881 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
3882 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->break_block
);
3884 ctx
->continue_block
= continue_parent
;
3885 ctx
->break_block
= break_parent
;
3888 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
3889 struct exec_list
*list
)
3891 foreach_list_typed(nir_cf_node
, node
, node
, list
)
3893 switch (node
->type
) {
3894 case nir_cf_node_block
:
3895 visit_block(ctx
, nir_cf_node_as_block(node
));
3898 case nir_cf_node_if
:
3899 visit_if(ctx
, nir_cf_node_as_if(node
));
3902 case nir_cf_node_loop
:
3903 visit_loop(ctx
, nir_cf_node_as_loop(node
));
3913 handle_vs_input_decl(struct nir_to_llvm_context
*ctx
,
3914 struct nir_variable
*variable
)
3916 LLVMValueRef t_list_ptr
= ctx
->vertex_buffers
;
3917 LLVMValueRef t_offset
;
3918 LLVMValueRef t_list
;
3919 LLVMValueRef args
[3];
3921 LLVMValueRef buffer_index
;
3922 int index
= variable
->data
.location
- VERT_ATTRIB_GENERIC0
;
3923 int idx
= variable
->data
.location
;
3924 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, true);
3926 variable
->data
.driver_location
= idx
* 4;
3928 if (ctx
->options
->key
.vs
.instance_rate_inputs
& (1u << index
)) {
3929 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->instance_id
,
3930 ctx
->start_instance
, "");
3931 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
3932 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
3934 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->vertex_id
,
3935 ctx
->base_vertex
, "");
3937 for (unsigned i
= 0; i
< attrib_count
; ++i
, ++idx
) {
3938 t_offset
= LLVMConstInt(ctx
->i32
, index
+ i
, false);
3940 t_list
= ac_build_indexed_load_const(&ctx
->ac
, t_list_ptr
, t_offset
);
3942 args
[1] = LLVMConstInt(ctx
->i32
, 0, false);
3943 args
[2] = buffer_index
;
3944 input
= ac_build_intrinsic(&ctx
->ac
,
3945 "llvm.SI.vs.load.input", ctx
->v4f32
, args
, 3,
3946 AC_FUNC_ATTR_READNONE
| AC_FUNC_ATTR_NOUNWIND
|
3947 AC_FUNC_ATTR_LEGACY
);
3949 for (unsigned chan
= 0; chan
< 4; chan
++) {
3950 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
3951 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
, chan
)] =
3952 to_integer(ctx
, LLVMBuildExtractElement(ctx
->builder
,
3953 input
, llvm_chan
, ""));
3959 handle_gs_input_decl(struct nir_to_llvm_context
*ctx
,
3960 struct nir_variable
*variable
)
3962 int idx
= variable
->data
.location
;
3964 if (idx
== VARYING_SLOT_CLIP_DIST0
||
3965 idx
== VARYING_SLOT_CULL_DIST0
) {
3966 int length
= glsl_get_length(glsl_get_array_element(variable
->type
));
3967 if (idx
== VARYING_SLOT_CLIP_DIST0
)
3968 ctx
->num_input_clips
= length
;
3970 ctx
->num_input_culls
= length
;
3974 static void interp_fs_input(struct nir_to_llvm_context
*ctx
,
3976 LLVMValueRef interp_param
,
3977 LLVMValueRef prim_mask
,
3978 LLVMValueRef result
[4])
3980 LLVMValueRef attr_number
;
3983 bool interp
= interp_param
!= NULL
;
3985 attr_number
= LLVMConstInt(ctx
->i32
, attr
, false);
3987 /* fs.constant returns the param from the middle vertex, so it's not
3988 * really useful for flat shading. It's meant to be used for custom
3989 * interpolation (but the intrinsic can't fetch from the other two
3992 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
3993 * to do the right thing. The only reason we use fs.constant is that
3994 * fs.interp cannot be used on integers, because they can be equal
3998 interp_param
= LLVMBuildBitCast(ctx
->builder
, interp_param
,
3999 LLVMVectorType(ctx
->f32
, 2), "");
4001 i
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
4003 j
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
4007 for (chan
= 0; chan
< 4; chan
++) {
4008 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4011 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
4016 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
4017 LLVMConstInt(ctx
->i32
, 2, false),
4026 handle_fs_input_decl(struct nir_to_llvm_context
*ctx
,
4027 struct nir_variable
*variable
)
4029 int idx
= variable
->data
.location
;
4030 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4031 LLVMValueRef interp
;
4033 variable
->data
.driver_location
= idx
* 4;
4034 ctx
->input_mask
|= ((1ull << attrib_count
) - 1) << variable
->data
.location
;
4036 if (glsl_get_base_type(glsl_without_array(variable
->type
)) == GLSL_TYPE_FLOAT
) {
4037 unsigned interp_type
;
4038 if (variable
->data
.sample
) {
4039 interp_type
= INTERP_SAMPLE
;
4040 ctx
->shader_info
->fs
.force_persample
= true;
4041 } else if (variable
->data
.centroid
)
4042 interp_type
= INTERP_CENTROID
;
4044 interp_type
= INTERP_CENTER
;
4046 interp
= lookup_interp_param(ctx
, variable
->data
.interpolation
, interp_type
);
4050 for (unsigned i
= 0; i
< attrib_count
; ++i
)
4051 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
+ i
, 0)] = interp
;
4056 handle_shader_input_decl(struct nir_to_llvm_context
*ctx
,
4057 struct nir_variable
*variable
)
4059 switch (ctx
->stage
) {
4060 case MESA_SHADER_VERTEX
:
4061 handle_vs_input_decl(ctx
, variable
);
4063 case MESA_SHADER_FRAGMENT
:
4064 handle_fs_input_decl(ctx
, variable
);
4066 case MESA_SHADER_GEOMETRY
:
4067 handle_gs_input_decl(ctx
, variable
);
4076 handle_fs_inputs_pre(struct nir_to_llvm_context
*ctx
,
4077 struct nir_shader
*nir
)
4080 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_INPUTS
; ++i
) {
4081 LLVMValueRef interp_param
;
4082 LLVMValueRef
*inputs
= ctx
->inputs
+radeon_llvm_reg_index_soa(i
, 0);
4084 if (!(ctx
->input_mask
& (1ull << i
)))
4087 if (i
>= VARYING_SLOT_VAR0
|| i
== VARYING_SLOT_PNTC
||
4088 i
== VARYING_SLOT_PRIMITIVE_ID
|| i
== VARYING_SLOT_LAYER
) {
4089 interp_param
= *inputs
;
4090 interp_fs_input(ctx
, index
, interp_param
, ctx
->prim_mask
,
4094 ctx
->shader_info
->fs
.flat_shaded_mask
|= 1u << index
;
4096 } else if (i
== VARYING_SLOT_POS
) {
4097 for(int i
= 0; i
< 3; ++i
)
4098 inputs
[i
] = ctx
->frag_pos
[i
];
4100 inputs
[3] = ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, ctx
->frag_pos
[3]);
4103 ctx
->shader_info
->fs
.num_interp
= index
;
4104 if (ctx
->input_mask
& (1 << VARYING_SLOT_PNTC
))
4105 ctx
->shader_info
->fs
.has_pcoord
= true;
4106 if (ctx
->input_mask
& (1 << VARYING_SLOT_PRIMITIVE_ID
))
4107 ctx
->shader_info
->fs
.prim_id_input
= true;
4108 if (ctx
->input_mask
& (1 << VARYING_SLOT_LAYER
))
4109 ctx
->shader_info
->fs
.layer_input
= true;
4110 ctx
->shader_info
->fs
.input_mask
= ctx
->input_mask
>> VARYING_SLOT_VAR0
;
4114 ac_build_alloca(struct nir_to_llvm_context
*ctx
,
4118 LLVMBuilderRef builder
= ctx
->builder
;
4119 LLVMBasicBlockRef current_block
= LLVMGetInsertBlock(builder
);
4120 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
4121 LLVMBasicBlockRef first_block
= LLVMGetEntryBasicBlock(function
);
4122 LLVMValueRef first_instr
= LLVMGetFirstInstruction(first_block
);
4123 LLVMBuilderRef first_builder
= LLVMCreateBuilderInContext(ctx
->context
);
4127 LLVMPositionBuilderBefore(first_builder
, first_instr
);
4129 LLVMPositionBuilderAtEnd(first_builder
, first_block
);
4132 res
= LLVMBuildAlloca(first_builder
, type
, name
);
4133 LLVMBuildStore(builder
, LLVMConstNull(type
), res
);
4135 LLVMDisposeBuilder(first_builder
);
4140 static LLVMValueRef
si_build_alloca_undef(struct nir_to_llvm_context
*ctx
,
4144 LLVMValueRef ptr
= ac_build_alloca(ctx
, type
, name
);
4145 LLVMBuildStore(ctx
->builder
, LLVMGetUndef(type
), ptr
);
4150 handle_shader_output_decl(struct nir_to_llvm_context
*ctx
,
4151 struct nir_variable
*variable
)
4153 int idx
= variable
->data
.location
+ variable
->data
.index
;
4154 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4156 variable
->data
.driver_location
= idx
* 4;
4158 if (ctx
->stage
== MESA_SHADER_VERTEX
||
4159 ctx
->stage
== MESA_SHADER_GEOMETRY
) {
4160 if (idx
== VARYING_SLOT_CLIP_DIST0
||
4161 idx
== VARYING_SLOT_CULL_DIST0
) {
4162 int length
= glsl_get_length(variable
->type
);
4163 if (idx
== VARYING_SLOT_CLIP_DIST0
) {
4164 if (ctx
->stage
== MESA_SHADER_VERTEX
)
4165 ctx
->shader_info
->vs
.clip_dist_mask
= (1 << length
) - 1;
4166 ctx
->num_output_clips
= length
;
4167 } else if (idx
== VARYING_SLOT_CULL_DIST0
) {
4168 if (ctx
->stage
== MESA_SHADER_VERTEX
)
4169 ctx
->shader_info
->vs
.cull_dist_mask
= (1 << length
) - 1;
4170 ctx
->num_output_culls
= length
;
4179 for (unsigned i
= 0; i
< attrib_count
; ++i
) {
4180 for (unsigned chan
= 0; chan
< 4; chan
++) {
4181 ctx
->outputs
[radeon_llvm_reg_index_soa(idx
+ i
, chan
)] =
4182 si_build_alloca_undef(ctx
, ctx
->f32
, "");
4185 ctx
->output_mask
|= ((1ull << attrib_count
) - 1) << idx
;
4189 setup_locals(struct nir_to_llvm_context
*ctx
,
4190 struct nir_function
*func
)
4193 ctx
->num_locals
= 0;
4194 nir_foreach_variable(variable
, &func
->impl
->locals
) {
4195 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4196 variable
->data
.driver_location
= ctx
->num_locals
* 4;
4197 ctx
->num_locals
+= attrib_count
;
4199 ctx
->locals
= malloc(4 * ctx
->num_locals
* sizeof(LLVMValueRef
));
4203 for (i
= 0; i
< ctx
->num_locals
; i
++) {
4204 for (j
= 0; j
< 4; j
++) {
4205 ctx
->locals
[i
* 4 + j
] =
4206 si_build_alloca_undef(ctx
, ctx
->f32
, "temp");
4212 emit_float_saturate(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
, float lo
, float hi
)
4214 v
= to_float(ctx
, v
);
4215 v
= emit_intrin_2f_param(ctx
, "llvm.maxnum.f32", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, lo
));
4216 return emit_intrin_2f_param(ctx
, "llvm.minnum.f32", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, hi
));
4220 static LLVMValueRef
emit_pack_int16(struct nir_to_llvm_context
*ctx
,
4221 LLVMValueRef src0
, LLVMValueRef src1
)
4223 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
4224 LLVMValueRef comp
[2];
4226 comp
[0] = LLVMBuildAnd(ctx
->builder
, src0
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4227 comp
[1] = LLVMBuildAnd(ctx
->builder
, src1
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4228 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
4229 return LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
4232 /* Initialize arguments for the shader export intrinsic */
4234 si_llvm_init_export_args(struct nir_to_llvm_context
*ctx
,
4235 LLVMValueRef
*values
,
4237 struct ac_export_args
*args
)
4239 /* Default is 0xf. Adjusted below depending on the format. */
4240 args
->enabled_channels
= 0xf;
4242 /* Specify whether the EXEC mask represents the valid mask */
4243 args
->valid_mask
= 0;
4245 /* Specify whether this is the last export */
4248 /* Specify the target we are exporting */
4249 args
->target
= target
;
4251 args
->compr
= false;
4252 args
->out
[0] = LLVMGetUndef(ctx
->f32
);
4253 args
->out
[1] = LLVMGetUndef(ctx
->f32
);
4254 args
->out
[2] = LLVMGetUndef(ctx
->f32
);
4255 args
->out
[3] = LLVMGetUndef(ctx
->f32
);
4260 if (ctx
->stage
== MESA_SHADER_FRAGMENT
&& target
>= V_008DFC_SQ_EXP_MRT
) {
4261 LLVMValueRef val
[4];
4262 unsigned index
= target
- V_008DFC_SQ_EXP_MRT
;
4263 unsigned col_format
= (ctx
->options
->key
.fs
.col_format
>> (4 * index
)) & 0xf;
4264 bool is_int8
= (ctx
->options
->key
.fs
.is_int8
>> index
) & 1;
4266 switch(col_format
) {
4267 case V_028714_SPI_SHADER_ZERO
:
4268 args
->enabled_channels
= 0; /* writemask */
4269 args
->target
= V_008DFC_SQ_EXP_NULL
;
4272 case V_028714_SPI_SHADER_32_R
:
4273 args
->enabled_channels
= 1;
4274 args
->out
[0] = values
[0];
4277 case V_028714_SPI_SHADER_32_GR
:
4278 args
->enabled_channels
= 0x3;
4279 args
->out
[0] = values
[0];
4280 args
->out
[1] = values
[1];
4283 case V_028714_SPI_SHADER_32_AR
:
4284 args
->enabled_channels
= 0x9;
4285 args
->out
[0] = values
[0];
4286 args
->out
[3] = values
[3];
4289 case V_028714_SPI_SHADER_FP16_ABGR
:
4292 for (unsigned chan
= 0; chan
< 2; chan
++) {
4293 LLVMValueRef pack_args
[2] = {
4295 values
[2 * chan
+ 1]
4297 LLVMValueRef packed
;
4299 packed
= ac_build_cvt_pkrtz_f16(&ctx
->ac
, pack_args
);
4300 args
->out
[chan
] = packed
;
4304 case V_028714_SPI_SHADER_UNORM16_ABGR
:
4305 for (unsigned chan
= 0; chan
< 4; chan
++) {
4306 val
[chan
] = ac_build_clamp(&ctx
->ac
, values
[chan
]);
4307 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
4308 LLVMConstReal(ctx
->f32
, 65535), "");
4309 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
4310 LLVMConstReal(ctx
->f32
, 0.5), "");
4311 val
[chan
] = LLVMBuildFPToUI(ctx
->builder
, val
[chan
],
4316 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
4317 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
4320 case V_028714_SPI_SHADER_SNORM16_ABGR
:
4321 for (unsigned chan
= 0; chan
< 4; chan
++) {
4322 val
[chan
] = emit_float_saturate(ctx
, values
[chan
], -1, 1);
4323 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
4324 LLVMConstReal(ctx
->f32
, 32767), "");
4326 /* If positive, add 0.5, else add -0.5. */
4327 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
4328 LLVMBuildSelect(ctx
->builder
,
4329 LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
,
4330 val
[chan
], ctx
->f32zero
, ""),
4331 LLVMConstReal(ctx
->f32
, 0.5),
4332 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
4333 val
[chan
] = LLVMBuildFPToSI(ctx
->builder
, val
[chan
], ctx
->i32
, "");
4337 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
4338 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
4341 case V_028714_SPI_SHADER_UINT16_ABGR
: {
4342 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 255 : 65535, 0);
4344 for (unsigned chan
= 0; chan
< 4; chan
++) {
4345 val
[chan
] = to_integer(ctx
, values
[chan
]);
4346 val
[chan
] = emit_minmax_int(ctx
, LLVMIntULT
, val
[chan
], max
);
4350 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
4351 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
4355 case V_028714_SPI_SHADER_SINT16_ABGR
: {
4356 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 127 : 32767, 0);
4357 LLVMValueRef min
= LLVMConstInt(ctx
->i32
, is_int8
? -128 : -32768, 0);
4360 for (unsigned chan
= 0; chan
< 4; chan
++) {
4361 val
[chan
] = to_integer(ctx
, values
[chan
]);
4362 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSLT
, val
[chan
], max
);
4363 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSGT
, val
[chan
], min
);
4367 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
4368 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
4373 case V_028714_SPI_SHADER_32_ABGR
:
4374 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
4378 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
4380 for (unsigned i
= 0; i
< 4; ++i
)
4381 args
->out
[i
] = to_float(ctx
, args
->out
[i
]);
4385 handle_vs_outputs_post(struct nir_to_llvm_context
*ctx
)
4387 uint32_t param_count
= 0;
4389 unsigned pos_idx
, num_pos_exports
= 0;
4390 struct ac_export_args args
, pos_args
[4] = {};
4391 LLVMValueRef psize_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
4393 const uint64_t clip_mask
= ctx
->output_mask
& ((1ull << VARYING_SLOT_CLIP_DIST0
) |
4394 (1ull << VARYING_SLOT_CLIP_DIST1
) |
4395 (1ull << VARYING_SLOT_CULL_DIST0
) |
4396 (1ull << VARYING_SLOT_CULL_DIST1
));
4398 ctx
->shader_info
->vs
.prim_id_output
= 0xffffffff;
4399 ctx
->shader_info
->vs
.layer_output
= 0xffffffff;
4401 LLVMValueRef slots
[8];
4404 if (ctx
->shader_info
->vs
.cull_dist_mask
)
4405 ctx
->shader_info
->vs
.cull_dist_mask
<<= ctx
->num_output_clips
;
4407 i
= VARYING_SLOT_CLIP_DIST0
;
4408 for (j
= 0; j
< ctx
->num_output_clips
; j
++)
4409 slots
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4410 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
4411 i
= VARYING_SLOT_CULL_DIST0
;
4412 for (j
= 0; j
< ctx
->num_output_culls
; j
++)
4413 slots
[ctx
->num_output_clips
+ j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4414 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
4416 for (i
= ctx
->num_output_clips
+ ctx
->num_output_culls
; i
< 8; i
++)
4417 slots
[i
] = LLVMGetUndef(ctx
->f32
);
4419 if (ctx
->num_output_clips
+ ctx
->num_output_culls
> 4) {
4420 target
= V_008DFC_SQ_EXP_POS
+ 3;
4421 si_llvm_init_export_args(ctx
, &slots
[4], target
, &args
);
4422 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
4423 &args
, sizeof(args
));
4426 target
= V_008DFC_SQ_EXP_POS
+ 2;
4427 si_llvm_init_export_args(ctx
, &slots
[0], target
, &args
);
4428 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
4429 &args
, sizeof(args
));
4433 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
4434 LLVMValueRef values
[4];
4435 if (!(ctx
->output_mask
& (1ull << i
)))
4438 for (unsigned j
= 0; j
< 4; j
++)
4439 values
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4440 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
4442 if (i
== VARYING_SLOT_POS
) {
4443 target
= V_008DFC_SQ_EXP_POS
;
4444 } else if (i
== VARYING_SLOT_CLIP_DIST0
||
4445 i
== VARYING_SLOT_CLIP_DIST1
||
4446 i
== VARYING_SLOT_CULL_DIST0
||
4447 i
== VARYING_SLOT_CULL_DIST1
) {
4449 } else if (i
== VARYING_SLOT_PSIZ
) {
4450 ctx
->shader_info
->vs
.writes_pointsize
= true;
4451 psize_value
= values
[0];
4453 } else if (i
== VARYING_SLOT_LAYER
) {
4454 ctx
->shader_info
->vs
.writes_layer
= true;
4455 layer_value
= values
[0];
4456 ctx
->shader_info
->vs
.layer_output
= param_count
;
4457 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
4459 } else if (i
== VARYING_SLOT_VIEWPORT
) {
4460 ctx
->shader_info
->vs
.writes_viewport_index
= true;
4461 viewport_index_value
= values
[0];
4463 } else if (i
== VARYING_SLOT_PRIMITIVE_ID
) {
4464 ctx
->shader_info
->vs
.prim_id_output
= param_count
;
4465 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
4467 } else if (i
>= VARYING_SLOT_VAR0
) {
4468 ctx
->shader_info
->vs
.export_mask
|= 1u << (i
- VARYING_SLOT_VAR0
);
4469 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
4473 si_llvm_init_export_args(ctx
, values
, target
, &args
);
4475 if (target
>= V_008DFC_SQ_EXP_POS
&&
4476 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
4477 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
4478 &args
, sizeof(args
));
4480 ac_build_export(&ctx
->ac
, &args
);
4484 /* We need to add the position output manually if it's missing. */
4485 if (!pos_args
[0].out
[0]) {
4486 pos_args
[0].enabled_channels
= 0xf;
4487 pos_args
[0].valid_mask
= 0;
4488 pos_args
[0].done
= 0;
4489 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
4490 pos_args
[0].compr
= 0;
4491 pos_args
[0].out
[0] = ctx
->f32zero
; /* X */
4492 pos_args
[0].out
[1] = ctx
->f32zero
; /* Y */
4493 pos_args
[0].out
[2] = ctx
->f32zero
; /* Z */
4494 pos_args
[0].out
[3] = ctx
->f32one
; /* W */
4497 uint32_t mask
= ((ctx
->shader_info
->vs
.writes_pointsize
== true ? 1 : 0) |
4498 (ctx
->shader_info
->vs
.writes_layer
== true ? 4 : 0) |
4499 (ctx
->shader_info
->vs
.writes_viewport_index
== true ? 8 : 0));
4501 pos_args
[1].enabled_channels
= mask
;
4502 pos_args
[1].valid_mask
= 0;
4503 pos_args
[1].done
= 0;
4504 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
4505 pos_args
[1].compr
= 0;
4506 pos_args
[1].out
[0] = ctx
->f32zero
; /* X */
4507 pos_args
[1].out
[1] = ctx
->f32zero
; /* Y */
4508 pos_args
[1].out
[2] = ctx
->f32zero
; /* Z */
4509 pos_args
[1].out
[3] = ctx
->f32zero
; /* W */
4511 if (ctx
->shader_info
->vs
.writes_pointsize
== true)
4512 pos_args
[1].out
[0] = psize_value
;
4513 if (ctx
->shader_info
->vs
.writes_layer
== true)
4514 pos_args
[1].out
[2] = layer_value
;
4515 if (ctx
->shader_info
->vs
.writes_viewport_index
== true)
4516 pos_args
[1].out
[3] = viewport_index_value
;
4518 for (i
= 0; i
< 4; i
++) {
4519 if (pos_args
[i
].out
[0])
4524 for (i
= 0; i
< 4; i
++) {
4525 if (!pos_args
[i
].out
[0])
4528 /* Specify the target we are exporting */
4529 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
4530 if (pos_idx
== num_pos_exports
)
4531 pos_args
[i
].done
= 1;
4532 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
4535 ctx
->shader_info
->vs
.pos_exports
= num_pos_exports
;
4536 ctx
->shader_info
->vs
.param_exports
= param_count
;
4540 handle_es_outputs_post(struct nir_to_llvm_context
*ctx
)
4543 uint64_t max_output_written
= 0;
4544 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
4545 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
4549 if (!(ctx
->output_mask
& (1ull << i
)))
4552 if (i
== VARYING_SLOT_CLIP_DIST0
) {
4553 length
= ctx
->num_output_clips
;
4554 } else if (i
== VARYING_SLOT_CULL_DIST0
) {
4555 start
= ctx
->num_output_clips
;
4556 length
= ctx
->num_output_culls
;
4558 param_index
= shader_io_get_unique_index(i
);
4560 if (param_index
> max_output_written
)
4561 max_output_written
= param_index
;
4563 for (j
= 0; j
< length
; j
++) {
4564 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], "");
4565 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
4567 ac_build_buffer_store_dword(&ctx
->ac
,
4570 NULL
, ctx
->es2gs_offset
,
4571 (4 * param_index
+ j
+ start
) * 4,
4575 ctx
->shader_info
->vs
.esgs_itemsize
= (max_output_written
+ 1) * 16;
4579 si_export_mrt_color(struct nir_to_llvm_context
*ctx
,
4580 LLVMValueRef
*color
, unsigned param
, bool is_last
)
4583 struct ac_export_args args
;
4586 si_llvm_init_export_args(ctx
, color
, param
,
4590 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
4591 args
.done
= 1; /* DONE bit */
4592 } else if (!args
.enabled_channels
)
4593 return; /* unnecessary NULL export */
4595 ac_build_export(&ctx
->ac
, &args
);
4599 si_export_mrt_z(struct nir_to_llvm_context
*ctx
,
4600 LLVMValueRef depth
, LLVMValueRef stencil
,
4601 LLVMValueRef samplemask
)
4603 struct ac_export_args args
;
4605 args
.enabled_channels
= 0;
4606 args
.valid_mask
= 1;
4608 args
.target
= V_008DFC_SQ_EXP_MRTZ
;
4611 args
.out
[0] = LLVMGetUndef(ctx
->f32
); /* R, depth */
4612 args
.out
[1] = LLVMGetUndef(ctx
->f32
); /* G, stencil test val[0:7], stencil op val[8:15] */
4613 args
.out
[2] = LLVMGetUndef(ctx
->f32
); /* B, sample mask */
4614 args
.out
[3] = LLVMGetUndef(ctx
->f32
); /* A, alpha to mask */
4617 args
.out
[0] = depth
;
4618 args
.enabled_channels
|= 0x1;
4622 args
.out
[1] = stencil
;
4623 args
.enabled_channels
|= 0x2;
4627 args
.out
[2] = samplemask
;
4628 args
.enabled_channels
|= 0x4;
4631 /* SI (except OLAND) has a bug that it only looks
4632 * at the X writemask component. */
4633 if (ctx
->options
->chip_class
== SI
&&
4634 ctx
->options
->family
!= CHIP_OLAND
)
4635 args
.enabled_channels
|= 0x1;
4637 ac_build_export(&ctx
->ac
, &args
);
4641 handle_fs_outputs_post(struct nir_to_llvm_context
*ctx
)
4644 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
4646 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
4647 LLVMValueRef values
[4];
4649 if (!(ctx
->output_mask
& (1ull << i
)))
4652 if (i
== FRAG_RESULT_DEPTH
) {
4653 ctx
->shader_info
->fs
.writes_z
= true;
4654 depth
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4655 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
4656 } else if (i
== FRAG_RESULT_STENCIL
) {
4657 ctx
->shader_info
->fs
.writes_stencil
= true;
4658 stencil
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4659 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
4660 } else if (i
== FRAG_RESULT_SAMPLE_MASK
) {
4661 ctx
->shader_info
->fs
.writes_sample_mask
= true;
4662 samplemask
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4663 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
4666 for (unsigned j
= 0; j
< 4; j
++)
4667 values
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4668 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
4670 if (!ctx
->shader_info
->fs
.writes_z
&& !ctx
->shader_info
->fs
.writes_stencil
&& !ctx
->shader_info
->fs
.writes_sample_mask
)
4671 last
= ctx
->output_mask
<= ((1ull << (i
+ 1)) - 1);
4673 si_export_mrt_color(ctx
, values
, V_008DFC_SQ_EXP_MRT
+ index
, last
);
4678 if (depth
|| stencil
|| samplemask
)
4679 si_export_mrt_z(ctx
, depth
, stencil
, samplemask
);
4681 si_export_mrt_color(ctx
, NULL
, V_008DFC_SQ_EXP_NULL
, true);
4683 ctx
->shader_info
->fs
.output_mask
= index
? ((1ull << index
) - 1) : 0;
4687 emit_gs_epilogue(struct nir_to_llvm_context
*ctx
)
4689 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
, ctx
->gs_wave_id
);
4693 handle_shader_outputs_post(struct nir_to_llvm_context
*ctx
)
4695 switch (ctx
->stage
) {
4696 case MESA_SHADER_VERTEX
:
4697 if (ctx
->options
->key
.vs
.as_es
)
4698 handle_es_outputs_post(ctx
);
4700 handle_vs_outputs_post(ctx
);
4702 case MESA_SHADER_FRAGMENT
:
4703 handle_fs_outputs_post(ctx
);
4705 case MESA_SHADER_GEOMETRY
:
4706 emit_gs_epilogue(ctx
);
4714 handle_shared_compute_var(struct nir_to_llvm_context
*ctx
,
4715 struct nir_variable
*variable
, uint32_t *offset
, int idx
)
4717 unsigned size
= glsl_count_attribute_slots(variable
->type
, false);
4718 variable
->data
.driver_location
= *offset
;
4722 static void ac_llvm_finalize_module(struct nir_to_llvm_context
* ctx
)
4724 LLVMPassManagerRef passmgr
;
4725 /* Create the pass manager */
4726 passmgr
= LLVMCreateFunctionPassManagerForModule(
4729 /* This pass should eliminate all the load and store instructions */
4730 LLVMAddPromoteMemoryToRegisterPass(passmgr
);
4732 /* Add some optimization passes */
4733 LLVMAddScalarReplAggregatesPass(passmgr
);
4734 LLVMAddLICMPass(passmgr
);
4735 LLVMAddAggressiveDCEPass(passmgr
);
4736 LLVMAddCFGSimplificationPass(passmgr
);
4737 LLVMAddInstructionCombiningPass(passmgr
);
4740 LLVMInitializeFunctionPassManager(passmgr
);
4741 LLVMRunFunctionPassManager(passmgr
, ctx
->main_function
);
4742 LLVMFinalizeFunctionPassManager(passmgr
);
4744 LLVMDisposeBuilder(ctx
->builder
);
4745 LLVMDisposePassManager(passmgr
);
4749 ac_setup_rings(struct nir_to_llvm_context
*ctx
)
4751 if (ctx
->stage
== MESA_SHADER_VERTEX
&& ctx
->options
->key
.vs
.as_es
) {
4752 ctx
->esgs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, ctx
->i32one
);
4755 if (ctx
->is_gs_copy_shader
) {
4756 ctx
->gsvs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, 3, false));
4758 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
4760 ctx
->esgs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, 2, false));
4761 ctx
->gsvs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, 4, false));
4763 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v4i32
, "");
4765 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->gsvs_num_entries
, LLVMConstInt(ctx
->i32
, 2, false), "");
4766 tmp
= LLVMBuildExtractElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->i32one
, "");
4767 tmp
= LLVMBuildOr(ctx
->builder
, tmp
, ctx
->gsvs_ring_stride
, "");
4768 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, tmp
, ctx
->i32one
, "");
4770 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v16i8
, "");
4775 LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm
,
4776 struct nir_shader
*nir
,
4777 struct ac_shader_variant_info
*shader_info
,
4778 const struct ac_nir_compiler_options
*options
)
4780 struct nir_to_llvm_context ctx
= {0};
4781 struct nir_function
*func
;
4783 ctx
.options
= options
;
4784 ctx
.shader_info
= shader_info
;
4785 ctx
.context
= LLVMContextCreate();
4786 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
4788 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
4789 ctx
.ac
.module
= ctx
.module
;
4791 ctx
.has_ds_bpermute
= ctx
.options
->chip_class
>= VI
;
4793 memset(shader_info
, 0, sizeof(*shader_info
));
4795 LLVMSetTarget(ctx
.module
, options
->supports_spill
? "amdgcn-mesa-mesa3d" : "amdgcn--");
4797 LLVMTargetDataRef data_layout
= LLVMCreateTargetDataLayout(tm
);
4798 char *data_layout_str
= LLVMCopyStringRepOfTargetData(data_layout
);
4799 LLVMSetDataLayout(ctx
.module
, data_layout_str
);
4800 LLVMDisposeTargetData(data_layout
);
4801 LLVMDisposeMessage(data_layout_str
);
4805 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
4806 ctx
.ac
.builder
= ctx
.builder
;
4807 ctx
.stage
= nir
->stage
;
4809 for (i
= 0; i
< AC_UD_MAX_SETS
; i
++)
4810 shader_info
->user_sgprs_locs
.descriptor_sets
[i
].sgpr_idx
= -1;
4811 for (i
= 0; i
< AC_UD_MAX_UD
; i
++)
4812 shader_info
->user_sgprs_locs
.shader_data
[i
].sgpr_idx
= -1;
4814 create_function(&ctx
);
4816 if (nir
->stage
== MESA_SHADER_COMPUTE
) {
4818 nir_foreach_variable(variable
, &nir
->shared
)
4822 uint32_t shared_size
= 0;
4824 LLVMTypeRef i8p
= LLVMPointerType(ctx
.i8
, LOCAL_ADDR_SPACE
);
4825 nir_foreach_variable(variable
, &nir
->shared
) {
4826 handle_shared_compute_var(&ctx
, variable
, &shared_size
, idx
);
4831 var
= LLVMAddGlobalInAddressSpace(ctx
.module
,
4832 LLVMArrayType(ctx
.i8
, shared_size
),
4835 LLVMSetAlignment(var
, 4);
4836 ctx
.shared_memory
= LLVMBuildBitCast(ctx
.builder
, var
, i8p
, "");
4838 } else if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
4839 ctx
.gs_next_vertex
= ac_build_alloca(&ctx
, ctx
.i32
, "gs_next_vertex");
4841 ctx
.gs_max_out_vertices
= nir
->info
->gs
.vertices_out
;
4844 ac_setup_rings(&ctx
);
4846 nir_foreach_variable(variable
, &nir
->inputs
)
4847 handle_shader_input_decl(&ctx
, variable
);
4849 if (nir
->stage
== MESA_SHADER_FRAGMENT
)
4850 handle_fs_inputs_pre(&ctx
, nir
);
4852 nir_foreach_variable(variable
, &nir
->outputs
)
4853 handle_shader_output_decl(&ctx
, variable
);
4855 ctx
.defs
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
4856 _mesa_key_pointer_equal
);
4857 ctx
.phis
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
4858 _mesa_key_pointer_equal
);
4860 func
= (struct nir_function
*)exec_list_get_head(&nir
->functions
);
4862 setup_locals(&ctx
, func
);
4864 visit_cf_list(&ctx
, &func
->impl
->body
);
4865 phi_post_pass(&ctx
);
4867 handle_shader_outputs_post(&ctx
);
4868 LLVMBuildRetVoid(ctx
.builder
);
4870 ac_llvm_finalize_module(&ctx
);
4872 ralloc_free(ctx
.defs
);
4873 ralloc_free(ctx
.phis
);
4875 if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
4876 shader_info
->gs
.gsvs_vertex_size
= util_bitcount64(ctx
.output_mask
) * 16;
4877 shader_info
->gs
.max_gsvs_emit_size
= shader_info
->gs
.gsvs_vertex_size
*
4878 nir
->info
->gs
.vertices_out
;
4883 static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di
, void *context
)
4885 unsigned *retval
= (unsigned *)context
;
4886 LLVMDiagnosticSeverity severity
= LLVMGetDiagInfoSeverity(di
);
4887 char *description
= LLVMGetDiagInfoDescription(di
);
4889 if (severity
== LLVMDSError
) {
4891 fprintf(stderr
, "LLVM triggered Diagnostic Handler: %s\n",
4895 LLVMDisposeMessage(description
);
4898 static unsigned ac_llvm_compile(LLVMModuleRef M
,
4899 struct ac_shader_binary
*binary
,
4900 LLVMTargetMachineRef tm
)
4902 unsigned retval
= 0;
4904 LLVMContextRef llvm_ctx
;
4905 LLVMMemoryBufferRef out_buffer
;
4906 unsigned buffer_size
;
4907 const char *buffer_data
;
4910 /* Setup Diagnostic Handler*/
4911 llvm_ctx
= LLVMGetModuleContext(M
);
4913 LLVMContextSetDiagnosticHandler(llvm_ctx
, ac_diagnostic_handler
,
4917 mem_err
= LLVMTargetMachineEmitToMemoryBuffer(tm
, M
, LLVMObjectFile
,
4920 /* Process Errors/Warnings */
4922 fprintf(stderr
, "%s: %s", __FUNCTION__
, err
);
4928 /* Extract Shader Code*/
4929 buffer_size
= LLVMGetBufferSize(out_buffer
);
4930 buffer_data
= LLVMGetBufferStart(out_buffer
);
4932 ac_elf_read(buffer_data
, buffer_size
, binary
);
4935 LLVMDisposeMemoryBuffer(out_buffer
);
4941 static void ac_compile_llvm_module(LLVMTargetMachineRef tm
,
4942 LLVMModuleRef llvm_module
,
4943 struct ac_shader_binary
*binary
,
4944 struct ac_shader_config
*config
,
4945 struct ac_shader_variant_info
*shader_info
,
4946 gl_shader_stage stage
,
4947 bool dump_shader
, bool supports_spill
)
4950 ac_dump_module(llvm_module
);
4952 memset(binary
, 0, sizeof(*binary
));
4953 int v
= ac_llvm_compile(llvm_module
, binary
, tm
);
4955 fprintf(stderr
, "compile failed\n");
4959 fprintf(stderr
, "disasm:\n%s\n", binary
->disasm_string
);
4961 ac_shader_binary_read_config(binary
, config
, 0, supports_spill
);
4963 LLVMContextRef ctx
= LLVMGetModuleContext(llvm_module
);
4964 LLVMDisposeModule(llvm_module
);
4965 LLVMContextDispose(ctx
);
4967 if (stage
== MESA_SHADER_FRAGMENT
) {
4968 shader_info
->num_input_vgprs
= 0;
4969 if (G_0286CC_PERSP_SAMPLE_ENA(config
->spi_ps_input_addr
))
4970 shader_info
->num_input_vgprs
+= 2;
4971 if (G_0286CC_PERSP_CENTER_ENA(config
->spi_ps_input_addr
))
4972 shader_info
->num_input_vgprs
+= 2;
4973 if (G_0286CC_PERSP_CENTROID_ENA(config
->spi_ps_input_addr
))
4974 shader_info
->num_input_vgprs
+= 2;
4975 if (G_0286CC_PERSP_PULL_MODEL_ENA(config
->spi_ps_input_addr
))
4976 shader_info
->num_input_vgprs
+= 3;
4977 if (G_0286CC_LINEAR_SAMPLE_ENA(config
->spi_ps_input_addr
))
4978 shader_info
->num_input_vgprs
+= 2;
4979 if (G_0286CC_LINEAR_CENTER_ENA(config
->spi_ps_input_addr
))
4980 shader_info
->num_input_vgprs
+= 2;
4981 if (G_0286CC_LINEAR_CENTROID_ENA(config
->spi_ps_input_addr
))
4982 shader_info
->num_input_vgprs
+= 2;
4983 if (G_0286CC_LINE_STIPPLE_TEX_ENA(config
->spi_ps_input_addr
))
4984 shader_info
->num_input_vgprs
+= 1;
4985 if (G_0286CC_POS_X_FLOAT_ENA(config
->spi_ps_input_addr
))
4986 shader_info
->num_input_vgprs
+= 1;
4987 if (G_0286CC_POS_Y_FLOAT_ENA(config
->spi_ps_input_addr
))
4988 shader_info
->num_input_vgprs
+= 1;
4989 if (G_0286CC_POS_Z_FLOAT_ENA(config
->spi_ps_input_addr
))
4990 shader_info
->num_input_vgprs
+= 1;
4991 if (G_0286CC_POS_W_FLOAT_ENA(config
->spi_ps_input_addr
))
4992 shader_info
->num_input_vgprs
+= 1;
4993 if (G_0286CC_FRONT_FACE_ENA(config
->spi_ps_input_addr
))
4994 shader_info
->num_input_vgprs
+= 1;
4995 if (G_0286CC_ANCILLARY_ENA(config
->spi_ps_input_addr
))
4996 shader_info
->num_input_vgprs
+= 1;
4997 if (G_0286CC_SAMPLE_COVERAGE_ENA(config
->spi_ps_input_addr
))
4998 shader_info
->num_input_vgprs
+= 1;
4999 if (G_0286CC_POS_FIXED_PT_ENA(config
->spi_ps_input_addr
))
5000 shader_info
->num_input_vgprs
+= 1;
5002 config
->num_vgprs
= MAX2(config
->num_vgprs
, shader_info
->num_input_vgprs
);
5004 /* +3 for scratch wave offset and VCC */
5005 config
->num_sgprs
= MAX2(config
->num_sgprs
,
5006 shader_info
->num_input_sgprs
+ 3);
5009 void ac_compile_nir_shader(LLVMTargetMachineRef tm
,
5010 struct ac_shader_binary
*binary
,
5011 struct ac_shader_config
*config
,
5012 struct ac_shader_variant_info
*shader_info
,
5013 struct nir_shader
*nir
,
5014 const struct ac_nir_compiler_options
*options
,
5018 LLVMModuleRef llvm_module
= ac_translate_nir_to_llvm(tm
, nir
, shader_info
,
5021 ac_compile_llvm_module(tm
, llvm_module
, binary
, config
, shader_info
, nir
->stage
, dump_shader
, options
->supports_spill
);
5022 switch (nir
->stage
) {
5023 case MESA_SHADER_COMPUTE
:
5024 for (int i
= 0; i
< 3; ++i
)
5025 shader_info
->cs
.block_size
[i
] = nir
->info
->cs
.local_size
[i
];
5027 case MESA_SHADER_FRAGMENT
:
5028 shader_info
->fs
.early_fragment_test
= nir
->info
->fs
.early_fragment_tests
;
5030 case MESA_SHADER_GEOMETRY
:
5031 shader_info
->gs
.vertices_in
= nir
->info
->gs
.vertices_in
;
5032 shader_info
->gs
.vertices_out
= nir
->info
->gs
.vertices_out
;
5033 shader_info
->gs
.output_prim
= nir
->info
->gs
.output_primitive
;
5034 shader_info
->gs
.invocations
= nir
->info
->gs
.invocations
;
5036 case MESA_SHADER_VERTEX
:
5037 shader_info
->vs
.as_es
= options
->key
.vs
.as_es
;
5045 ac_gs_copy_shader_emit(struct nir_to_llvm_context
*ctx
)
5047 LLVMValueRef args
[9];
5048 args
[0] = ctx
->gsvs_ring
;
5049 args
[1] = LLVMBuildMul(ctx
->builder
, ctx
->vertex_id
, LLVMConstInt(ctx
->i32
, 4, false), "");
5050 args
[3] = ctx
->i32zero
;
5051 args
[4] = ctx
->i32one
; /* OFFEN */
5052 args
[5] = ctx
->i32zero
; /* IDXEN */
5053 args
[6] = ctx
->i32one
; /* GLC */
5054 args
[7] = ctx
->i32one
; /* SLC */
5055 args
[8] = ctx
->i32zero
; /* TFE */
5058 int clip_cull_slot
= -1;
5059 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5064 if (!(ctx
->output_mask
& (1ull << i
)))
5067 if (i
== VARYING_SLOT_CLIP_DIST1
||
5068 i
== VARYING_SLOT_CULL_DIST1
)
5071 if (i
== VARYING_SLOT_CLIP_DIST0
||
5072 i
== VARYING_SLOT_CULL_DIST0
) {
5073 /* unpack clip and cull from a single set of slots */
5074 if (clip_cull_slot
== -1) {
5075 clip_cull_slot
= idx
;
5076 if (ctx
->num_output_clips
+ ctx
->num_output_culls
> 4)
5079 slot
= clip_cull_slot
;
5082 if (i
== VARYING_SLOT_CLIP_DIST0
)
5083 length
= ctx
->num_output_clips
;
5084 if (i
== VARYING_SLOT_CULL_DIST0
) {
5085 start
= ctx
->num_output_clips
;
5086 length
= ctx
->num_output_culls
;
5090 for (unsigned j
= 0; j
< length
; j
++) {
5092 args
[2] = LLVMConstInt(ctx
->i32
,
5093 (slot
* 4 + j
+ start
) *
5094 ctx
->gs_max_out_vertices
* 16 * 4, false);
5096 value
= ac_build_intrinsic(&ctx
->ac
,
5097 "llvm.SI.buffer.load.dword.i32.i32",
5099 AC_FUNC_ATTR_READONLY
|
5100 AC_FUNC_ATTR_LEGACY
);
5102 LLVMBuildStore(ctx
->builder
,
5103 to_float(ctx
, value
), ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)]);
5107 handle_vs_outputs_post(ctx
);
5110 void ac_create_gs_copy_shader(LLVMTargetMachineRef tm
,
5111 struct nir_shader
*geom_shader
,
5112 struct ac_shader_binary
*binary
,
5113 struct ac_shader_config
*config
,
5114 struct ac_shader_variant_info
*shader_info
,
5115 const struct ac_nir_compiler_options
*options
,
5118 struct nir_to_llvm_context ctx
= {0};
5119 ctx
.context
= LLVMContextCreate();
5120 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
5121 ctx
.options
= options
;
5122 ctx
.shader_info
= shader_info
;
5124 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
5125 ctx
.ac
.module
= ctx
.module
;
5127 ctx
.is_gs_copy_shader
= true;
5128 LLVMSetTarget(ctx
.module
, "amdgcn--");
5131 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
5132 ctx
.ac
.builder
= ctx
.builder
;
5133 ctx
.stage
= MESA_SHADER_VERTEX
;
5135 create_function(&ctx
);
5137 ctx
.gs_max_out_vertices
= geom_shader
->info
->gs
.vertices_out
;
5138 ac_setup_rings(&ctx
);
5140 nir_foreach_variable(variable
, &geom_shader
->outputs
)
5141 handle_shader_output_decl(&ctx
, variable
);
5143 ac_gs_copy_shader_emit(&ctx
);
5145 LLVMBuildRetVoid(ctx
.builder
);
5147 ac_llvm_finalize_module(&ctx
);
5149 ac_compile_llvm_module(tm
, ctx
.module
, binary
, config
, shader_info
,
5151 dump_shader
, options
->supports_spill
);