2 * Copyright © 2016 Bas Nieuwenhuizen
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_util.h"
26 #include "ac_binary.h"
29 #include "../vulkan/radv_descriptor_set.h"
30 #include "util/bitscan.h"
31 #include <llvm-c/Transforms/Scalar.h>
33 enum radeon_llvm_calling_convention
{
34 RADEON_LLVM_AMDGPU_VS
= 87,
35 RADEON_LLVM_AMDGPU_GS
= 88,
36 RADEON_LLVM_AMDGPU_PS
= 89,
37 RADEON_LLVM_AMDGPU_CS
= 90,
40 #define CONST_ADDR_SPACE 2
41 #define LOCAL_ADDR_SPACE 3
43 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
44 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
47 #define SENDMSG_GS_DONE 3
49 #define SENDMSG_GS_OP_NOP (0 << 4)
50 #define SENDMSG_GS_OP_CUT (1 << 4)
51 #define SENDMSG_GS_OP_EMIT (2 << 4)
52 #define SENDMSG_GS_OP_EMIT_CUT (3 << 4)
61 struct nir_to_llvm_context
{
62 struct ac_llvm_context ac
;
63 const struct ac_nir_compiler_options
*options
;
64 struct ac_shader_variant_info
*shader_info
;
66 LLVMContextRef context
;
68 LLVMBuilderRef builder
;
69 LLVMValueRef main_function
;
71 struct hash_table
*defs
;
72 struct hash_table
*phis
;
74 LLVMValueRef descriptor_sets
[AC_UD_MAX_SETS
];
75 LLVMValueRef ring_offsets
;
76 LLVMValueRef push_constants
;
77 LLVMValueRef num_work_groups
;
78 LLVMValueRef workgroup_ids
;
79 LLVMValueRef local_invocation_ids
;
82 LLVMValueRef vertex_buffers
;
83 LLVMValueRef base_vertex
;
84 LLVMValueRef start_instance
;
85 LLVMValueRef vertex_id
;
86 LLVMValueRef rel_auto_id
;
87 LLVMValueRef vs_prim_id
;
88 LLVMValueRef instance_id
;
90 LLVMValueRef es2gs_offset
;
92 LLVMValueRef gsvs_ring_stride
;
93 LLVMValueRef gsvs_num_entries
;
94 LLVMValueRef gs2vs_offset
;
95 LLVMValueRef gs_wave_id
;
96 LLVMValueRef gs_vtx_offset
[6];
97 LLVMValueRef gs_prim_id
, gs_invocation_id
;
99 LLVMValueRef esgs_ring
;
100 LLVMValueRef gsvs_ring
;
102 LLVMValueRef prim_mask
;
103 LLVMValueRef sample_positions
;
104 LLVMValueRef persp_sample
, persp_center
, persp_centroid
;
105 LLVMValueRef linear_sample
, linear_center
, linear_centroid
;
106 LLVMValueRef front_face
;
107 LLVMValueRef ancillary
;
108 LLVMValueRef frag_pos
[4];
110 LLVMBasicBlockRef continue_block
;
111 LLVMBasicBlockRef break_block
;
130 LLVMValueRef i32zero
;
132 LLVMValueRef f32zero
;
134 LLVMValueRef v4f32empty
;
136 unsigned range_md_kind
;
137 unsigned uniform_md_kind
;
138 unsigned invariant_load_md_kind
;
139 LLVMValueRef empty_md
;
140 gl_shader_stage stage
;
143 LLVMValueRef inputs
[RADEON_LLVM_MAX_INPUTS
* 4];
144 LLVMValueRef outputs
[RADEON_LLVM_MAX_OUTPUTS
* 4];
146 LLVMValueRef shared_memory
;
148 uint64_t output_mask
;
150 LLVMValueRef
*locals
;
155 bool has_ds_bpermute
;
157 bool is_gs_copy_shader
;
158 LLVMValueRef gs_next_vertex
;
159 unsigned gs_max_out_vertices
;
163 LLVMValueRef args
[12];
165 LLVMTypeRef dst_type
;
169 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
170 nir_deref_var
*deref
,
171 enum desc_type desc_type
);
172 static unsigned radeon_llvm_reg_index_soa(unsigned index
, unsigned chan
)
174 return (index
* 4) + chan
;
177 static unsigned shader_io_get_unique_index(gl_varying_slot slot
)
179 if (slot
== VARYING_SLOT_POS
)
181 if (slot
== VARYING_SLOT_PSIZ
)
183 if (slot
== VARYING_SLOT_CLIP_DIST0
)
185 if (slot
== VARYING_SLOT_CLIP_DIST1
)
187 if (slot
>= VARYING_SLOT_VAR0
&& slot
<= VARYING_SLOT_VAR31
)
188 return 4 + (slot
- VARYING_SLOT_VAR0
);
189 unreachable("illegal slot in get unique index\n");
192 static unsigned llvm_get_type_size(LLVMTypeRef type
)
194 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
197 case LLVMIntegerTypeKind
:
198 return LLVMGetIntTypeWidth(type
) / 8;
199 case LLVMFloatTypeKind
:
201 case LLVMPointerTypeKind
:
203 case LLVMVectorTypeKind
:
204 return LLVMGetVectorSize(type
) *
205 llvm_get_type_size(LLVMGetElementType(type
));
212 static void set_llvm_calling_convention(LLVMValueRef func
,
213 gl_shader_stage stage
)
215 enum radeon_llvm_calling_convention calling_conv
;
218 case MESA_SHADER_VERTEX
:
219 case MESA_SHADER_TESS_CTRL
:
220 case MESA_SHADER_TESS_EVAL
:
221 calling_conv
= RADEON_LLVM_AMDGPU_VS
;
223 case MESA_SHADER_GEOMETRY
:
224 calling_conv
= RADEON_LLVM_AMDGPU_GS
;
226 case MESA_SHADER_FRAGMENT
:
227 calling_conv
= RADEON_LLVM_AMDGPU_PS
;
229 case MESA_SHADER_COMPUTE
:
230 calling_conv
= RADEON_LLVM_AMDGPU_CS
;
233 unreachable("Unhandle shader type");
236 LLVMSetFunctionCallConv(func
, calling_conv
);
240 create_llvm_function(LLVMContextRef ctx
, LLVMModuleRef module
,
241 LLVMBuilderRef builder
, LLVMTypeRef
*return_types
,
242 unsigned num_return_elems
, LLVMTypeRef
*param_types
,
243 unsigned param_count
, unsigned array_params_mask
,
244 unsigned sgpr_params
, bool unsafe_math
)
246 LLVMTypeRef main_function_type
, ret_type
;
247 LLVMBasicBlockRef main_function_body
;
249 if (num_return_elems
)
250 ret_type
= LLVMStructTypeInContext(ctx
, return_types
,
251 num_return_elems
, true);
253 ret_type
= LLVMVoidTypeInContext(ctx
);
255 /* Setup the function */
257 LLVMFunctionType(ret_type
, param_types
, param_count
, 0);
258 LLVMValueRef main_function
=
259 LLVMAddFunction(module
, "main", main_function_type
);
261 LLVMAppendBasicBlockInContext(ctx
, main_function
, "main_body");
262 LLVMPositionBuilderAtEnd(builder
, main_function_body
);
264 LLVMSetFunctionCallConv(main_function
, RADEON_LLVM_AMDGPU_CS
);
265 for (unsigned i
= 0; i
< sgpr_params
; ++i
) {
266 if (array_params_mask
& (1 << i
)) {
267 LLVMValueRef P
= LLVMGetParam(main_function
, i
);
268 ac_add_function_attr(main_function
, i
+ 1, AC_FUNC_ATTR_BYVAL
);
269 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
272 ac_add_function_attr(main_function
, i
+ 1, AC_FUNC_ATTR_INREG
);
277 /* These were copied from some LLVM test. */
278 LLVMAddTargetDependentFunctionAttr(main_function
,
279 "less-precise-fpmad",
281 LLVMAddTargetDependentFunctionAttr(main_function
,
284 LLVMAddTargetDependentFunctionAttr(main_function
,
287 LLVMAddTargetDependentFunctionAttr(main_function
,
291 return main_function
;
294 static LLVMTypeRef
const_array(LLVMTypeRef elem_type
, int num_elements
)
296 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
300 static LLVMValueRef
get_shared_memory_ptr(struct nir_to_llvm_context
*ctx
,
308 offset
= LLVMConstInt(ctx
->i32
, idx
, false);
310 ptr
= ctx
->shared_memory
;
311 ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &offset
, 1, "");
312 addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
313 ptr
= LLVMBuildBitCast(ctx
->builder
, ptr
, LLVMPointerType(type
, addr_space
), "");
317 static LLVMTypeRef
to_integer_type_scalar(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
319 if (t
== ctx
->f16
|| t
== ctx
->i16
)
321 else if (t
== ctx
->f32
|| t
== ctx
->i32
)
323 else if (t
== ctx
->f64
|| t
== ctx
->i64
)
326 unreachable("Unhandled integer size");
329 static LLVMTypeRef
to_integer_type(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
331 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
332 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
333 return LLVMVectorType(to_integer_type_scalar(ctx
, elem_type
),
334 LLVMGetVectorSize(t
));
336 return to_integer_type_scalar(ctx
, t
);
339 static LLVMValueRef
to_integer(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
)
341 LLVMTypeRef type
= LLVMTypeOf(v
);
342 return LLVMBuildBitCast(ctx
->builder
, v
, to_integer_type(ctx
, type
), "");
345 static LLVMTypeRef
to_float_type_scalar(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
347 if (t
== ctx
->i16
|| t
== ctx
->f16
)
349 else if (t
== ctx
->i32
|| t
== ctx
->f32
)
351 else if (t
== ctx
->i64
|| t
== ctx
->f64
)
354 unreachable("Unhandled float size");
357 static LLVMTypeRef
to_float_type(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
359 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
360 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
361 return LLVMVectorType(to_float_type_scalar(ctx
, elem_type
),
362 LLVMGetVectorSize(t
));
364 return to_float_type_scalar(ctx
, t
);
367 static LLVMValueRef
to_float(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
)
369 LLVMTypeRef type
= LLVMTypeOf(v
);
370 return LLVMBuildBitCast(ctx
->builder
, v
, to_float_type(ctx
, type
), "");
373 static int get_elem_bits(struct nir_to_llvm_context
*ctx
, LLVMTypeRef type
)
375 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
376 type
= LLVMGetElementType(type
);
378 if (LLVMGetTypeKind(type
) == LLVMIntegerTypeKind
)
379 return LLVMGetIntTypeWidth(type
);
381 if (type
== ctx
->f16
)
383 if (type
== ctx
->f32
)
385 if (type
== ctx
->f64
)
388 unreachable("Unhandled type kind in get_elem_bits");
391 static LLVMValueRef
unpack_param(struct nir_to_llvm_context
*ctx
,
392 LLVMValueRef param
, unsigned rshift
,
395 LLVMValueRef value
= param
;
397 value
= LLVMBuildLShr(ctx
->builder
, value
,
398 LLVMConstInt(ctx
->i32
, rshift
, false), "");
400 if (rshift
+ bitwidth
< 32) {
401 unsigned mask
= (1 << bitwidth
) - 1;
402 value
= LLVMBuildAnd(ctx
->builder
, value
,
403 LLVMConstInt(ctx
->i32
, mask
, false), "");
408 static LLVMValueRef
build_gep0(struct nir_to_llvm_context
*ctx
,
409 LLVMValueRef base_ptr
, LLVMValueRef index
)
411 LLVMValueRef indices
[2] = {
415 return LLVMBuildGEP(ctx
->builder
, base_ptr
,
419 static LLVMValueRef
build_indexed_load(struct nir_to_llvm_context
*ctx
,
420 LLVMValueRef base_ptr
, LLVMValueRef index
,
423 LLVMValueRef pointer
;
424 pointer
= build_gep0(ctx
, base_ptr
, index
);
426 LLVMSetMetadata(pointer
, ctx
->uniform_md_kind
, ctx
->empty_md
);
427 return LLVMBuildLoad(ctx
->builder
, pointer
, "");
430 static LLVMValueRef
build_indexed_load_const(struct nir_to_llvm_context
*ctx
,
431 LLVMValueRef base_ptr
, LLVMValueRef index
)
433 LLVMValueRef result
= build_indexed_load(ctx
, base_ptr
, index
, true);
434 LLVMSetMetadata(result
, ctx
->invariant_load_md_kind
, ctx
->empty_md
);
438 static void build_tbuffer_store(struct nir_to_llvm_context
*ctx
,
441 unsigned num_channels
,
443 LLVMValueRef soffset
,
444 unsigned inst_offset
,
453 LLVMValueRef args
[] = {
456 LLVMConstInt(ctx
->i32
, num_channels
, 0),
459 LLVMConstInt(ctx
->i32
, inst_offset
, 0),
460 LLVMConstInt(ctx
->i32
, dfmt
, 0),
461 LLVMConstInt(ctx
->i32
, nfmt
, 0),
462 LLVMConstInt(ctx
->i32
, offen
, 0),
463 LLVMConstInt(ctx
->i32
, idxen
, 0),
464 LLVMConstInt(ctx
->i32
, glc
, 0),
465 LLVMConstInt(ctx
->i32
, slc
, 0),
466 LLVMConstInt(ctx
->i32
, tfe
, 0)
469 /* The intrinsic is overloaded, we need to add a type suffix for overloading to work. */
470 unsigned func
= CLAMP(num_channels
, 1, 3) - 1;
471 const char *types
[] = {"i32", "v2i32", "v4i32"};
473 snprintf(name
, sizeof(name
), "llvm.SI.tbuffer.store.%s", types
[func
]);
475 ac_emit_llvm_intrinsic(&ctx
->ac
, name
, ctx
->voidt
,
476 args
, ARRAY_SIZE(args
), 0);
480 static void set_userdata_location(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
)
482 ud_info
->sgpr_idx
= sgpr_idx
;
483 ud_info
->num_sgprs
= num_sgprs
;
484 ud_info
->indirect
= false;
485 ud_info
->indirect_offset
= 0;
488 static void set_userdata_location_shader(struct nir_to_llvm_context
*ctx
,
489 int idx
, uint8_t sgpr_idx
, uint8_t num_sgprs
)
491 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.shader_data
[idx
], sgpr_idx
, num_sgprs
);
495 static void set_userdata_location_indirect(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
,
496 uint32_t indirect_offset
)
498 ud_info
->sgpr_idx
= sgpr_idx
;
499 ud_info
->num_sgprs
= num_sgprs
;
500 ud_info
->indirect
= true;
501 ud_info
->indirect_offset
= indirect_offset
;
505 static void create_function(struct nir_to_llvm_context
*ctx
)
507 LLVMTypeRef arg_types
[23];
508 unsigned arg_idx
= 0;
509 unsigned array_params_mask
= 0;
510 unsigned sgpr_count
= 0, user_sgpr_count
;
512 unsigned num_sets
= ctx
->options
->layout
? ctx
->options
->layout
->num_sets
: 0;
513 unsigned user_sgpr_idx
;
514 bool need_push_constants
;
515 bool need_ring_offsets
= false;
517 /* until we sort out scratch/global buffers always assign ring offsets for gs/vs/es */
518 if (ctx
->stage
== MESA_SHADER_GEOMETRY
||
519 ctx
->stage
== MESA_SHADER_VERTEX
||
520 ctx
->is_gs_copy_shader
)
521 need_ring_offsets
= true;
523 need_push_constants
= true;
524 if (!ctx
->options
->layout
)
525 need_push_constants
= false;
526 else if (!ctx
->options
->layout
->push_constant_size
&&
527 !ctx
->options
->layout
->dynamic_offset_count
)
528 need_push_constants
= false;
530 if (need_ring_offsets
&& !ctx
->options
->supports_spill
) {
531 arg_types
[arg_idx
++] = const_array(ctx
->v16i8
, 8); /* address of rings */
534 /* 1 for each descriptor set */
535 for (unsigned i
= 0; i
< num_sets
; ++i
) {
536 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
537 array_params_mask
|= (1 << arg_idx
);
538 arg_types
[arg_idx
++] = const_array(ctx
->i8
, 1024 * 1024);
542 if (need_push_constants
) {
543 /* 1 for push constants and dynamic descriptors */
544 array_params_mask
|= (1 << arg_idx
);
545 arg_types
[arg_idx
++] = const_array(ctx
->i8
, 1024 * 1024);
548 switch (ctx
->stage
) {
549 case MESA_SHADER_COMPUTE
:
550 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3); /* grid size */
551 user_sgpr_count
= arg_idx
;
552 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3);
553 arg_types
[arg_idx
++] = ctx
->i32
;
554 sgpr_count
= arg_idx
;
556 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3);
558 case MESA_SHADER_VERTEX
:
559 if (!ctx
->is_gs_copy_shader
) {
560 arg_types
[arg_idx
++] = const_array(ctx
->v16i8
, 16); /* vertex buffers */
561 arg_types
[arg_idx
++] = ctx
->i32
; // base vertex
562 arg_types
[arg_idx
++] = ctx
->i32
; // start instance
564 user_sgpr_count
= arg_idx
;
565 if (ctx
->options
->key
.vs
.as_es
)
566 arg_types
[arg_idx
++] = ctx
->i32
; //es2gs offset
567 sgpr_count
= arg_idx
;
568 arg_types
[arg_idx
++] = ctx
->i32
; // vertex id
569 if (!ctx
->is_gs_copy_shader
) {
570 arg_types
[arg_idx
++] = ctx
->i32
; // rel auto id
571 arg_types
[arg_idx
++] = ctx
->i32
; // vs prim id
572 arg_types
[arg_idx
++] = ctx
->i32
; // instance id
575 case MESA_SHADER_GEOMETRY
:
576 arg_types
[arg_idx
++] = ctx
->i32
; // gsvs stride
577 arg_types
[arg_idx
++] = ctx
->i32
; // gsvs num entires
578 user_sgpr_count
= arg_idx
;
579 arg_types
[arg_idx
++] = ctx
->i32
; // gs2vs offset
580 arg_types
[arg_idx
++] = ctx
->i32
; // wave id
581 sgpr_count
= arg_idx
;
582 arg_types
[arg_idx
++] = ctx
->i32
; // vtx0
583 arg_types
[arg_idx
++] = ctx
->i32
; // vtx1
584 arg_types
[arg_idx
++] = ctx
->i32
; // prim id
585 arg_types
[arg_idx
++] = ctx
->i32
; // vtx2
586 arg_types
[arg_idx
++] = ctx
->i32
; // vtx3
587 arg_types
[arg_idx
++] = ctx
->i32
; // vtx4
588 arg_types
[arg_idx
++] = ctx
->i32
; // vtx5
589 arg_types
[arg_idx
++] = ctx
->i32
; // GS instance id
591 case MESA_SHADER_FRAGMENT
:
592 arg_types
[arg_idx
++] = const_array(ctx
->f32
, 32); /* sample positions */
593 user_sgpr_count
= arg_idx
;
594 arg_types
[arg_idx
++] = ctx
->i32
; /* prim mask */
595 sgpr_count
= arg_idx
;
596 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp sample */
597 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp center */
598 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp centroid */
599 arg_types
[arg_idx
++] = ctx
->v3i32
; /* persp pull model */
600 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear sample */
601 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear center */
602 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear centroid */
603 arg_types
[arg_idx
++] = ctx
->f32
; /* line stipple tex */
604 arg_types
[arg_idx
++] = ctx
->f32
; /* pos x float */
605 arg_types
[arg_idx
++] = ctx
->f32
; /* pos y float */
606 arg_types
[arg_idx
++] = ctx
->f32
; /* pos z float */
607 arg_types
[arg_idx
++] = ctx
->f32
; /* pos w float */
608 arg_types
[arg_idx
++] = ctx
->i32
; /* front face */
609 arg_types
[arg_idx
++] = ctx
->i32
; /* ancillary */
610 arg_types
[arg_idx
++] = ctx
->f32
; /* sample coverage */
611 arg_types
[arg_idx
++] = ctx
->i32
; /* fixed pt */
614 unreachable("Shader stage not implemented");
617 ctx
->main_function
= create_llvm_function(
618 ctx
->context
, ctx
->module
, ctx
->builder
, NULL
, 0, arg_types
,
619 arg_idx
, array_params_mask
, sgpr_count
, ctx
->options
->unsafe_math
);
620 set_llvm_calling_convention(ctx
->main_function
, ctx
->stage
);
622 ctx
->shader_info
->num_input_sgprs
= 0;
623 ctx
->shader_info
->num_input_vgprs
= 0;
625 ctx
->shader_info
->num_user_sgprs
= ctx
->options
->supports_spill
? 2 : 0;
626 for (i
= 0; i
< user_sgpr_count
; i
++)
627 ctx
->shader_info
->num_user_sgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
629 ctx
->shader_info
->num_input_sgprs
= ctx
->shader_info
->num_user_sgprs
;
630 for (; i
< sgpr_count
; i
++)
631 ctx
->shader_info
->num_input_sgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
633 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
634 for (; i
< arg_idx
; ++i
)
635 ctx
->shader_info
->num_input_vgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
640 if (ctx
->options
->supports_spill
|| need_ring_offsets
) {
641 set_userdata_location_shader(ctx
, AC_UD_SCRATCH_RING_OFFSETS
, user_sgpr_idx
, 2);
643 if (ctx
->options
->supports_spill
) {
644 ctx
->ring_offsets
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.implicit.buffer.ptr",
645 LLVMPointerType(ctx
->i8
, CONST_ADDR_SPACE
),
646 NULL
, 0, AC_FUNC_ATTR_READNONE
);
647 ctx
->ring_offsets
= LLVMBuildBitCast(ctx
->builder
, ctx
->ring_offsets
,
648 const_array(ctx
->v16i8
, 8), "");
650 ctx
->ring_offsets
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
653 for (unsigned i
= 0; i
< num_sets
; ++i
) {
654 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
655 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.descriptor_sets
[i
], user_sgpr_idx
, 2);
657 ctx
->descriptor_sets
[i
] =
658 LLVMGetParam(ctx
->main_function
, arg_idx
++);
660 ctx
->descriptor_sets
[i
] = NULL
;
663 if (need_push_constants
) {
664 ctx
->push_constants
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
665 set_userdata_location_shader(ctx
, AC_UD_PUSH_CONSTANTS
, user_sgpr_idx
, 2);
669 switch (ctx
->stage
) {
670 case MESA_SHADER_COMPUTE
:
671 set_userdata_location_shader(ctx
, AC_UD_CS_GRID_SIZE
, user_sgpr_idx
, 3);
673 ctx
->num_work_groups
=
674 LLVMGetParam(ctx
->main_function
, arg_idx
++);
676 LLVMGetParam(ctx
->main_function
, arg_idx
++);
678 LLVMGetParam(ctx
->main_function
, arg_idx
++);
679 ctx
->local_invocation_ids
=
680 LLVMGetParam(ctx
->main_function
, arg_idx
++);
682 case MESA_SHADER_VERTEX
:
683 if (!ctx
->is_gs_copy_shader
) {
684 set_userdata_location_shader(ctx
, AC_UD_VS_VERTEX_BUFFERS
, user_sgpr_idx
, 2);
686 ctx
->vertex_buffers
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
687 set_userdata_location_shader(ctx
, AC_UD_VS_BASE_VERTEX_START_INSTANCE
, user_sgpr_idx
, 2);
689 ctx
->base_vertex
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
690 ctx
->start_instance
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
692 if (ctx
->options
->key
.vs
.as_es
)
693 ctx
->es2gs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
694 ctx
->vertex_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
695 if (!ctx
->is_gs_copy_shader
) {
696 ctx
->rel_auto_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
697 ctx
->vs_prim_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
698 ctx
->instance_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
701 case MESA_SHADER_GEOMETRY
:
702 set_userdata_location_shader(ctx
, AC_UD_GS_VS_RING_STRIDE_ENTRIES
, user_sgpr_idx
, 2);
704 ctx
->gsvs_ring_stride
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
705 ctx
->gsvs_num_entries
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
706 ctx
->gs2vs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
707 ctx
->gs_wave_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
708 ctx
->gs_vtx_offset
[0] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
709 ctx
->gs_vtx_offset
[1] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
710 ctx
->gs_prim_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
711 ctx
->gs_vtx_offset
[2] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
712 ctx
->gs_vtx_offset
[3] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
713 ctx
->gs_vtx_offset
[4] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
714 ctx
->gs_vtx_offset
[5] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
715 ctx
->gs_invocation_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
717 case MESA_SHADER_FRAGMENT
:
718 set_userdata_location_shader(ctx
, AC_UD_PS_SAMPLE_POS
, user_sgpr_idx
, 2);
720 ctx
->sample_positions
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
721 ctx
->prim_mask
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
722 ctx
->persp_sample
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
723 ctx
->persp_center
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
724 ctx
->persp_centroid
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
726 ctx
->linear_sample
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
727 ctx
->linear_center
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
728 ctx
->linear_centroid
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
729 arg_idx
++; /* line stipple */
730 ctx
->frag_pos
[0] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
731 ctx
->frag_pos
[1] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
732 ctx
->frag_pos
[2] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
733 ctx
->frag_pos
[3] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
734 ctx
->front_face
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
735 ctx
->ancillary
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
738 unreachable("Shader stage not implemented");
742 static void setup_types(struct nir_to_llvm_context
*ctx
)
744 LLVMValueRef args
[4];
746 ctx
->voidt
= LLVMVoidTypeInContext(ctx
->context
);
747 ctx
->i1
= LLVMIntTypeInContext(ctx
->context
, 1);
748 ctx
->i8
= LLVMIntTypeInContext(ctx
->context
, 8);
749 ctx
->i16
= LLVMIntTypeInContext(ctx
->context
, 16);
750 ctx
->i32
= LLVMIntTypeInContext(ctx
->context
, 32);
751 ctx
->i64
= LLVMIntTypeInContext(ctx
->context
, 64);
752 ctx
->v2i32
= LLVMVectorType(ctx
->i32
, 2);
753 ctx
->v3i32
= LLVMVectorType(ctx
->i32
, 3);
754 ctx
->v4i32
= LLVMVectorType(ctx
->i32
, 4);
755 ctx
->v8i32
= LLVMVectorType(ctx
->i32
, 8);
756 ctx
->f32
= LLVMFloatTypeInContext(ctx
->context
);
757 ctx
->f16
= LLVMHalfTypeInContext(ctx
->context
);
758 ctx
->f64
= LLVMDoubleTypeInContext(ctx
->context
);
759 ctx
->v2f32
= LLVMVectorType(ctx
->f32
, 2);
760 ctx
->v4f32
= LLVMVectorType(ctx
->f32
, 4);
761 ctx
->v16i8
= LLVMVectorType(ctx
->i8
, 16);
763 ctx
->i32zero
= LLVMConstInt(ctx
->i32
, 0, false);
764 ctx
->i32one
= LLVMConstInt(ctx
->i32
, 1, false);
765 ctx
->f32zero
= LLVMConstReal(ctx
->f32
, 0.0);
766 ctx
->f32one
= LLVMConstReal(ctx
->f32
, 1.0);
768 args
[0] = ctx
->f32zero
;
769 args
[1] = ctx
->f32zero
;
770 args
[2] = ctx
->f32zero
;
771 args
[3] = ctx
->f32one
;
772 ctx
->v4f32empty
= LLVMConstVector(args
, 4);
774 ctx
->range_md_kind
= LLVMGetMDKindIDInContext(ctx
->context
,
776 ctx
->invariant_load_md_kind
= LLVMGetMDKindIDInContext(ctx
->context
,
777 "invariant.load", 14);
778 ctx
->uniform_md_kind
=
779 LLVMGetMDKindIDInContext(ctx
->context
, "amdgpu.uniform", 14);
780 ctx
->empty_md
= LLVMMDNodeInContext(ctx
->context
, NULL
, 0);
782 args
[0] = LLVMConstReal(ctx
->f32
, 2.5);
785 static int get_llvm_num_components(LLVMValueRef value
)
787 LLVMTypeRef type
= LLVMTypeOf(value
);
788 unsigned num_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
789 ? LLVMGetVectorSize(type
)
791 return num_components
;
794 static LLVMValueRef
llvm_extract_elem(struct nir_to_llvm_context
*ctx
,
798 int count
= get_llvm_num_components(value
);
800 assert(index
< count
);
804 return LLVMBuildExtractElement(ctx
->builder
, value
,
805 LLVMConstInt(ctx
->i32
, index
, false), "");
808 static LLVMValueRef
trim_vector(struct nir_to_llvm_context
*ctx
,
809 LLVMValueRef value
, unsigned count
)
811 unsigned num_components
= get_llvm_num_components(value
);
812 if (count
== num_components
)
815 LLVMValueRef masks
[] = {
816 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
817 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false)};
820 return LLVMBuildExtractElement(ctx
->builder
, value
, masks
[0],
823 LLVMValueRef swizzle
= LLVMConstVector(masks
, count
);
824 return LLVMBuildShuffleVector(ctx
->builder
, value
, value
, swizzle
, "");
828 build_store_values_extended(struct nir_to_llvm_context
*ctx
,
829 LLVMValueRef
*values
,
830 unsigned value_count
,
831 unsigned value_stride
,
834 LLVMBuilderRef builder
= ctx
->builder
;
837 if (value_count
== 1) {
838 LLVMBuildStore(builder
, vec
, values
[0]);
842 for (i
= 0; i
< value_count
; i
++) {
843 LLVMValueRef ptr
= values
[i
* value_stride
];
844 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, i
, false);
845 LLVMValueRef value
= LLVMBuildExtractElement(builder
, vec
, index
, "");
846 LLVMBuildStore(builder
, value
, ptr
);
850 static LLVMTypeRef
get_def_type(struct nir_to_llvm_context
*ctx
,
853 LLVMTypeRef type
= LLVMIntTypeInContext(ctx
->context
, def
->bit_size
);
854 if (def
->num_components
> 1) {
855 type
= LLVMVectorType(type
, def
->num_components
);
860 static LLVMValueRef
get_src(struct nir_to_llvm_context
*ctx
, nir_src src
)
863 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, src
.ssa
);
864 return (LLVMValueRef
)entry
->data
;
868 static LLVMBasicBlockRef
get_block(struct nir_to_llvm_context
*ctx
,
871 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, b
);
872 return (LLVMBasicBlockRef
)entry
->data
;
875 static LLVMValueRef
get_alu_src(struct nir_to_llvm_context
*ctx
,
877 unsigned num_components
)
879 LLVMValueRef value
= get_src(ctx
, src
.src
);
880 bool need_swizzle
= false;
883 LLVMTypeRef type
= LLVMTypeOf(value
);
884 unsigned src_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
885 ? LLVMGetVectorSize(type
)
888 for (unsigned i
= 0; i
< num_components
; ++i
) {
889 assert(src
.swizzle
[i
] < src_components
);
890 if (src
.swizzle
[i
] != i
)
894 if (need_swizzle
|| num_components
!= src_components
) {
895 LLVMValueRef masks
[] = {
896 LLVMConstInt(ctx
->i32
, src
.swizzle
[0], false),
897 LLVMConstInt(ctx
->i32
, src
.swizzle
[1], false),
898 LLVMConstInt(ctx
->i32
, src
.swizzle
[2], false),
899 LLVMConstInt(ctx
->i32
, src
.swizzle
[3], false)};
901 if (src_components
> 1 && num_components
== 1) {
902 value
= LLVMBuildExtractElement(ctx
->builder
, value
,
904 } else if (src_components
== 1 && num_components
> 1) {
905 LLVMValueRef values
[] = {value
, value
, value
, value
};
906 value
= ac_build_gather_values(&ctx
->ac
, values
, num_components
);
908 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
909 value
= LLVMBuildShuffleVector(ctx
->builder
, value
, value
,
918 static LLVMValueRef
emit_int_cmp(struct nir_to_llvm_context
*ctx
,
919 LLVMIntPredicate pred
, LLVMValueRef src0
,
922 LLVMValueRef result
= LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, "");
923 return LLVMBuildSelect(ctx
->builder
, result
,
924 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
925 LLVMConstInt(ctx
->i32
, 0, false), "");
928 static LLVMValueRef
emit_float_cmp(struct nir_to_llvm_context
*ctx
,
929 LLVMRealPredicate pred
, LLVMValueRef src0
,
933 src0
= to_float(ctx
, src0
);
934 src1
= to_float(ctx
, src1
);
935 result
= LLVMBuildFCmp(ctx
->builder
, pred
, src0
, src1
, "");
936 return LLVMBuildSelect(ctx
->builder
, result
,
937 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
938 LLVMConstInt(ctx
->i32
, 0, false), "");
941 static LLVMValueRef
emit_intrin_1f_param(struct nir_to_llvm_context
*ctx
,
943 LLVMTypeRef result_type
,
947 LLVMValueRef params
[] = {
951 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
952 return ac_emit_llvm_intrinsic(&ctx
->ac
, name
, result_type
, params
, 1, AC_FUNC_ATTR_READNONE
);
955 static LLVMValueRef
emit_intrin_2f_param(struct nir_to_llvm_context
*ctx
,
957 LLVMTypeRef result_type
,
958 LLVMValueRef src0
, LLVMValueRef src1
)
961 LLVMValueRef params
[] = {
966 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
967 return ac_emit_llvm_intrinsic(&ctx
->ac
, name
, result_type
, params
, 2, AC_FUNC_ATTR_READNONE
);
970 static LLVMValueRef
emit_intrin_3f_param(struct nir_to_llvm_context
*ctx
,
972 LLVMTypeRef result_type
,
973 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
976 LLVMValueRef params
[] = {
982 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
983 return ac_emit_llvm_intrinsic(&ctx
->ac
, name
, result_type
, params
, 3, AC_FUNC_ATTR_READNONE
);
986 static LLVMValueRef
emit_bcsel(struct nir_to_llvm_context
*ctx
,
987 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
989 LLVMValueRef v
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, src0
,
991 return LLVMBuildSelect(ctx
->builder
, v
, src1
, src2
, "");
994 static LLVMValueRef
emit_find_lsb(struct nir_to_llvm_context
*ctx
,
997 LLVMValueRef params
[2] = {
1000 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
1001 * add special code to check for x=0. The reason is that
1002 * the LLVM behavior for x=0 is different from what we
1005 * The hardware already implements the correct behavior.
1007 LLVMConstInt(ctx
->i32
, 1, false),
1009 return ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.cttz.i32", ctx
->i32
, params
, 2, AC_FUNC_ATTR_READNONE
);
1012 static LLVMValueRef
emit_ifind_msb(struct nir_to_llvm_context
*ctx
,
1015 LLVMValueRef msb
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.AMDGPU.flbit.i32",
1017 AC_FUNC_ATTR_READNONE
);
1019 /* The HW returns the last bit index from MSB, but NIR wants
1020 * the index from LSB. Invert it by doing "31 - msb". */
1021 msb
= LLVMBuildSub(ctx
->builder
, LLVMConstInt(ctx
->i32
, 31, false),
1024 LLVMValueRef all_ones
= LLVMConstInt(ctx
->i32
, -1, true);
1025 LLVMValueRef cond
= LLVMBuildOr(ctx
->builder
,
1026 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
1027 src0
, ctx
->i32zero
, ""),
1028 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
1029 src0
, all_ones
, ""), "");
1031 return LLVMBuildSelect(ctx
->builder
, cond
, all_ones
, msb
, "");
1034 static LLVMValueRef
emit_ufind_msb(struct nir_to_llvm_context
*ctx
,
1037 LLVMValueRef args
[2] = {
1041 LLVMValueRef msb
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.ctlz.i32",
1042 ctx
->i32
, args
, ARRAY_SIZE(args
),
1043 AC_FUNC_ATTR_READNONE
);
1045 /* The HW returns the last bit index from MSB, but NIR wants
1046 * the index from LSB. Invert it by doing "31 - msb". */
1047 msb
= LLVMBuildSub(ctx
->builder
, LLVMConstInt(ctx
->i32
, 31, false),
1050 return LLVMBuildSelect(ctx
->builder
,
1051 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, src0
,
1053 LLVMConstInt(ctx
->i32
, -1, true), msb
, "");
1056 static LLVMValueRef
emit_minmax_int(struct nir_to_llvm_context
*ctx
,
1057 LLVMIntPredicate pred
,
1058 LLVMValueRef src0
, LLVMValueRef src1
)
1060 return LLVMBuildSelect(ctx
->builder
,
1061 LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, ""),
1066 static LLVMValueRef
emit_iabs(struct nir_to_llvm_context
*ctx
,
1069 return emit_minmax_int(ctx
, LLVMIntSGT
, src0
,
1070 LLVMBuildNeg(ctx
->builder
, src0
, ""));
1073 static LLVMValueRef
emit_fsign(struct nir_to_llvm_context
*ctx
,
1076 LLVMValueRef cmp
, val
;
1078 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGT
, src0
, ctx
->f32zero
, "");
1079 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->f32one
, src0
, "");
1080 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
, val
, ctx
->f32zero
, "");
1081 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstReal(ctx
->f32
, -1.0), "");
1085 static LLVMValueRef
emit_isign(struct nir_to_llvm_context
*ctx
,
1088 LLVMValueRef cmp
, val
;
1090 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGT
, src0
, ctx
->i32zero
, "");
1091 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->i32one
, src0
, "");
1092 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGE
, val
, ctx
->i32zero
, "");
1093 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstInt(ctx
->i32
, -1, true), "");
1097 static LLVMValueRef
emit_ffract(struct nir_to_llvm_context
*ctx
,
1100 const char *intr
= "llvm.floor.f32";
1101 LLVMValueRef fsrc0
= to_float(ctx
, src0
);
1102 LLVMValueRef params
[] = {
1105 LLVMValueRef floor
= ac_emit_llvm_intrinsic(&ctx
->ac
, intr
,
1106 ctx
->f32
, params
, 1,
1107 AC_FUNC_ATTR_READNONE
);
1108 return LLVMBuildFSub(ctx
->builder
, fsrc0
, floor
, "");
1111 static LLVMValueRef
emit_uint_carry(struct nir_to_llvm_context
*ctx
,
1113 LLVMValueRef src0
, LLVMValueRef src1
)
1115 LLVMTypeRef ret_type
;
1116 LLVMTypeRef types
[] = { ctx
->i32
, ctx
->i1
};
1118 LLVMValueRef params
[] = { src0
, src1
};
1119 ret_type
= LLVMStructTypeInContext(ctx
->context
, types
,
1122 res
= ac_emit_llvm_intrinsic(&ctx
->ac
, intrin
, ret_type
,
1123 params
, 2, AC_FUNC_ATTR_READNONE
);
1125 res
= LLVMBuildExtractValue(ctx
->builder
, res
, 1, "");
1126 res
= LLVMBuildZExt(ctx
->builder
, res
, ctx
->i32
, "");
1130 static LLVMValueRef
emit_b2f(struct nir_to_llvm_context
*ctx
,
1133 return LLVMBuildAnd(ctx
->builder
, src0
, LLVMBuildBitCast(ctx
->builder
, LLVMConstReal(ctx
->f32
, 1.0), ctx
->i32
, ""), "");
1136 static LLVMValueRef
emit_umul_high(struct nir_to_llvm_context
*ctx
,
1137 LLVMValueRef src0
, LLVMValueRef src1
)
1139 LLVMValueRef dst64
, result
;
1140 src0
= LLVMBuildZExt(ctx
->builder
, src0
, ctx
->i64
, "");
1141 src1
= LLVMBuildZExt(ctx
->builder
, src1
, ctx
->i64
, "");
1143 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1144 dst64
= LLVMBuildLShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1145 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1149 static LLVMValueRef
emit_imul_high(struct nir_to_llvm_context
*ctx
,
1150 LLVMValueRef src0
, LLVMValueRef src1
)
1152 LLVMValueRef dst64
, result
;
1153 src0
= LLVMBuildSExt(ctx
->builder
, src0
, ctx
->i64
, "");
1154 src1
= LLVMBuildSExt(ctx
->builder
, src1
, ctx
->i64
, "");
1156 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1157 dst64
= LLVMBuildAShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1158 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1162 static LLVMValueRef
emit_bitfield_extract(struct nir_to_llvm_context
*ctx
,
1164 LLVMValueRef srcs
[3])
1166 LLVMValueRef result
;
1167 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, srcs
[2], LLVMConstInt(ctx
->i32
, 32, false), "");
1168 result
= ac_emit_llvm_intrinsic(&ctx
->ac
, intrin
, ctx
->i32
, srcs
, 3, AC_FUNC_ATTR_READNONE
);
1170 result
= LLVMBuildSelect(ctx
->builder
, icond
, srcs
[0], result
, "");
1174 static LLVMValueRef
emit_bitfield_insert(struct nir_to_llvm_context
*ctx
,
1175 LLVMValueRef src0
, LLVMValueRef src1
,
1176 LLVMValueRef src2
, LLVMValueRef src3
)
1178 LLVMValueRef bfi_args
[3], result
;
1180 bfi_args
[0] = LLVMBuildShl(ctx
->builder
,
1181 LLVMBuildSub(ctx
->builder
,
1182 LLVMBuildShl(ctx
->builder
,
1187 bfi_args
[1] = LLVMBuildShl(ctx
->builder
, src1
, src2
, "");
1190 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, src3
, LLVMConstInt(ctx
->i32
, 32, false), "");
1193 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
1194 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
1196 result
= LLVMBuildXor(ctx
->builder
, bfi_args
[2],
1197 LLVMBuildAnd(ctx
->builder
, bfi_args
[0],
1198 LLVMBuildXor(ctx
->builder
, bfi_args
[1], bfi_args
[2], ""), ""), "");
1200 result
= LLVMBuildSelect(ctx
->builder
, icond
, src1
, result
, "");
1204 static LLVMValueRef
emit_pack_half_2x16(struct nir_to_llvm_context
*ctx
,
1207 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1209 LLVMValueRef comp
[2];
1211 src0
= to_float(ctx
, src0
);
1212 comp
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, "");
1213 comp
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, "");
1214 for (i
= 0; i
< 2; i
++) {
1215 comp
[i
] = LLVMBuildFPTrunc(ctx
->builder
, comp
[i
], ctx
->f16
, "");
1216 comp
[i
] = LLVMBuildBitCast(ctx
->builder
, comp
[i
], ctx
->i16
, "");
1217 comp
[i
] = LLVMBuildZExt(ctx
->builder
, comp
[i
], ctx
->i32
, "");
1220 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
1221 comp
[0] = LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
1226 static LLVMValueRef
emit_unpack_half_2x16(struct nir_to_llvm_context
*ctx
,
1229 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1230 LLVMValueRef temps
[2], result
, val
;
1233 for (i
= 0; i
< 2; i
++) {
1234 val
= i
== 1 ? LLVMBuildLShr(ctx
->builder
, src0
, const16
, "") : src0
;
1235 val
= LLVMBuildTrunc(ctx
->builder
, val
, ctx
->i16
, "");
1236 val
= LLVMBuildBitCast(ctx
->builder
, val
, ctx
->f16
, "");
1237 temps
[i
] = LLVMBuildFPExt(ctx
->builder
, val
, ctx
->f32
, "");
1240 result
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), temps
[0],
1242 result
= LLVMBuildInsertElement(ctx
->builder
, result
, temps
[1],
1248 * Set range metadata on an instruction. This can only be used on load and
1249 * call instructions. If you know an instruction can only produce the values
1250 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
1251 * \p lo is the minimum value inclusive.
1252 * \p hi is the maximum value exclusive.
1254 static void set_range_metadata(struct nir_to_llvm_context
*ctx
,
1255 LLVMValueRef value
, unsigned lo
, unsigned hi
)
1257 LLVMValueRef range_md
, md_args
[2];
1258 LLVMTypeRef type
= LLVMTypeOf(value
);
1259 LLVMContextRef context
= LLVMGetTypeContext(type
);
1261 md_args
[0] = LLVMConstInt(type
, lo
, false);
1262 md_args
[1] = LLVMConstInt(type
, hi
, false);
1263 range_md
= LLVMMDNodeInContext(context
, md_args
, 2);
1264 LLVMSetMetadata(value
, ctx
->range_md_kind
, range_md
);
1267 static LLVMValueRef
get_thread_id(struct nir_to_llvm_context
*ctx
)
1270 LLVMValueRef tid_args
[2];
1271 tid_args
[0] = LLVMConstInt(ctx
->i32
, 0xffffffff, false);
1272 tid_args
[1] = ctx
->i32zero
;
1273 tid_args
[1] = ac_emit_llvm_intrinsic(&ctx
->ac
,
1274 "llvm.amdgcn.mbcnt.lo", ctx
->i32
,
1275 tid_args
, 2, AC_FUNC_ATTR_READNONE
);
1277 tid
= ac_emit_llvm_intrinsic(&ctx
->ac
,
1278 "llvm.amdgcn.mbcnt.hi", ctx
->i32
,
1279 tid_args
, 2, AC_FUNC_ATTR_READNONE
);
1280 set_range_metadata(ctx
, tid
, 0, 64);
1285 * SI implements derivatives using the local data store (LDS)
1286 * All writes to the LDS happen in all executing threads at
1287 * the same time. TID is the Thread ID for the current
1288 * thread and is a value between 0 and 63, representing
1289 * the thread's position in the wavefront.
1291 * For the pixel shader threads are grouped into quads of four pixels.
1292 * The TIDs of the pixels of a quad are:
1300 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
1301 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
1302 * the current pixel's column, and masking with 0xfffffffe yields the TID
1303 * of the left pixel of the current pixel's row.
1305 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
1306 * adding 2 yields the TID of the pixel below the top pixel.
1308 /* masks for thread ID. */
1309 #define TID_MASK_TOP_LEFT 0xfffffffc
1310 #define TID_MASK_TOP 0xfffffffd
1311 #define TID_MASK_LEFT 0xfffffffe
1312 static LLVMValueRef
emit_ddxy(struct nir_to_llvm_context
*ctx
,
1316 LLVMValueRef tl
, trbl
, result
;
1317 LLVMValueRef tl_tid
, trbl_tid
;
1318 LLVMValueRef args
[2];
1319 LLVMValueRef thread_id
;
1322 ctx
->has_ddxy
= true;
1324 if (!ctx
->lds
&& !ctx
->has_ds_bpermute
)
1325 ctx
->lds
= LLVMAddGlobalInAddressSpace(ctx
->module
,
1326 LLVMArrayType(ctx
->i32
, 64),
1327 "ddxy_lds", LOCAL_ADDR_SPACE
);
1329 thread_id
= get_thread_id(ctx
);
1330 if (op
== nir_op_fddx_fine
|| op
== nir_op_fddx
)
1331 mask
= TID_MASK_LEFT
;
1332 else if (op
== nir_op_fddy_fine
|| op
== nir_op_fddy
)
1333 mask
= TID_MASK_TOP
;
1335 mask
= TID_MASK_TOP_LEFT
;
1337 tl_tid
= LLVMBuildAnd(ctx
->builder
, thread_id
,
1338 LLVMConstInt(ctx
->i32
, mask
, false), "");
1339 /* for DDX we want to next X pixel, DDY next Y pixel. */
1340 if (op
== nir_op_fddx_fine
||
1341 op
== nir_op_fddx_coarse
||
1347 trbl_tid
= LLVMBuildAdd(ctx
->builder
, tl_tid
,
1348 LLVMConstInt(ctx
->i32
, idx
, false), "");
1350 if (ctx
->has_ds_bpermute
) {
1351 args
[0] = LLVMBuildMul(ctx
->builder
, tl_tid
,
1352 LLVMConstInt(ctx
->i32
, 4, false), "");
1354 tl
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.ds.bpermute",
1356 AC_FUNC_ATTR_READNONE
);
1358 args
[0] = LLVMBuildMul(ctx
->builder
, trbl_tid
,
1359 LLVMConstInt(ctx
->i32
, 4, false), "");
1360 trbl
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.ds.bpermute",
1362 AC_FUNC_ATTR_READNONE
);
1364 LLVMValueRef store_ptr
, load_ptr0
, load_ptr1
;
1366 store_ptr
= build_gep0(ctx
, ctx
->lds
, thread_id
);
1367 load_ptr0
= build_gep0(ctx
, ctx
->lds
, tl_tid
);
1368 load_ptr1
= build_gep0(ctx
, ctx
->lds
, trbl_tid
);
1370 LLVMBuildStore(ctx
->builder
, src0
, store_ptr
);
1371 tl
= LLVMBuildLoad(ctx
->builder
, load_ptr0
, "");
1372 trbl
= LLVMBuildLoad(ctx
->builder
, load_ptr1
, "");
1374 tl
= LLVMBuildBitCast(ctx
->builder
, tl
, ctx
->f32
, "");
1375 trbl
= LLVMBuildBitCast(ctx
->builder
, trbl
, ctx
->f32
, "");
1376 result
= LLVMBuildFSub(ctx
->builder
, trbl
, tl
, "");
1381 * this takes an I,J coordinate pair,
1382 * and works out the X and Y derivatives.
1383 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
1385 static LLVMValueRef
emit_ddxy_interp(
1386 struct nir_to_llvm_context
*ctx
,
1387 LLVMValueRef interp_ij
)
1389 LLVMValueRef result
[4], a
;
1392 for (i
= 0; i
< 2; i
++) {
1393 a
= LLVMBuildExtractElement(ctx
->builder
, interp_ij
,
1394 LLVMConstInt(ctx
->i32
, i
, false), "");
1395 result
[i
] = emit_ddxy(ctx
, nir_op_fddx
, a
);
1396 result
[2+i
] = emit_ddxy(ctx
, nir_op_fddy
, a
);
1398 return ac_build_gather_values(&ctx
->ac
, result
, 4);
1401 static void visit_alu(struct nir_to_llvm_context
*ctx
, nir_alu_instr
*instr
)
1403 LLVMValueRef src
[4], result
= NULL
;
1404 unsigned num_components
= instr
->dest
.dest
.ssa
.num_components
;
1405 unsigned src_components
;
1406 LLVMTypeRef def_type
= get_def_type(ctx
, &instr
->dest
.dest
.ssa
);
1408 assert(nir_op_infos
[instr
->op
].num_inputs
<= ARRAY_SIZE(src
));
1409 switch (instr
->op
) {
1415 case nir_op_pack_half_2x16
:
1418 case nir_op_unpack_half_2x16
:
1422 src_components
= num_components
;
1425 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1426 src
[i
] = get_alu_src(ctx
, instr
->src
[i
], src_components
);
1428 switch (instr
->op
) {
1434 src
[0] = to_float(ctx
, src
[0]);
1435 result
= LLVMBuildFNeg(ctx
->builder
, src
[0], "");
1438 result
= LLVMBuildNeg(ctx
->builder
, src
[0], "");
1441 result
= LLVMBuildNot(ctx
->builder
, src
[0], "");
1444 result
= LLVMBuildAdd(ctx
->builder
, src
[0], src
[1], "");
1447 src
[0] = to_float(ctx
, src
[0]);
1448 src
[1] = to_float(ctx
, src
[1]);
1449 result
= LLVMBuildFAdd(ctx
->builder
, src
[0], src
[1], "");
1452 src
[0] = to_float(ctx
, src
[0]);
1453 src
[1] = to_float(ctx
, src
[1]);
1454 result
= LLVMBuildFSub(ctx
->builder
, src
[0], src
[1], "");
1457 result
= LLVMBuildSub(ctx
->builder
, src
[0], src
[1], "");
1460 result
= LLVMBuildMul(ctx
->builder
, src
[0], src
[1], "");
1463 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1466 result
= LLVMBuildURem(ctx
->builder
, src
[0], src
[1], "");
1469 src
[0] = to_float(ctx
, src
[0]);
1470 src
[1] = to_float(ctx
, src
[1]);
1471 result
= ac_emit_fdiv(&ctx
->ac
, src
[0], src
[1]);
1472 result
= emit_intrin_1f_param(ctx
, "llvm.floor",
1473 to_float_type(ctx
, def_type
), result
);
1474 result
= LLVMBuildFMul(ctx
->builder
, src
[1] , result
, "");
1475 result
= LLVMBuildFSub(ctx
->builder
, src
[0], result
, "");
1478 src
[0] = to_float(ctx
, src
[0]);
1479 src
[1] = to_float(ctx
, src
[1]);
1480 result
= LLVMBuildFRem(ctx
->builder
, src
[0], src
[1], "");
1483 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1486 result
= LLVMBuildSDiv(ctx
->builder
, src
[0], src
[1], "");
1489 result
= LLVMBuildUDiv(ctx
->builder
, src
[0], src
[1], "");
1492 src
[0] = to_float(ctx
, src
[0]);
1493 src
[1] = to_float(ctx
, src
[1]);
1494 result
= LLVMBuildFMul(ctx
->builder
, src
[0], src
[1], "");
1497 src
[0] = to_float(ctx
, src
[0]);
1498 src
[1] = to_float(ctx
, src
[1]);
1499 result
= ac_emit_fdiv(&ctx
->ac
, src
[0], src
[1]);
1502 src
[0] = to_float(ctx
, src
[0]);
1503 result
= ac_emit_fdiv(&ctx
->ac
, ctx
->f32one
, src
[0]);
1506 result
= LLVMBuildAnd(ctx
->builder
, src
[0], src
[1], "");
1509 result
= LLVMBuildOr(ctx
->builder
, src
[0], src
[1], "");
1512 result
= LLVMBuildXor(ctx
->builder
, src
[0], src
[1], "");
1515 result
= LLVMBuildShl(ctx
->builder
, src
[0], src
[1], "");
1518 result
= LLVMBuildAShr(ctx
->builder
, src
[0], src
[1], "");
1521 result
= LLVMBuildLShr(ctx
->builder
, src
[0], src
[1], "");
1524 result
= emit_int_cmp(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1527 result
= emit_int_cmp(ctx
, LLVMIntNE
, src
[0], src
[1]);
1530 result
= emit_int_cmp(ctx
, LLVMIntEQ
, src
[0], src
[1]);
1533 result
= emit_int_cmp(ctx
, LLVMIntSGE
, src
[0], src
[1]);
1536 result
= emit_int_cmp(ctx
, LLVMIntULT
, src
[0], src
[1]);
1539 result
= emit_int_cmp(ctx
, LLVMIntUGE
, src
[0], src
[1]);
1542 result
= emit_float_cmp(ctx
, LLVMRealUEQ
, src
[0], src
[1]);
1545 result
= emit_float_cmp(ctx
, LLVMRealUNE
, src
[0], src
[1]);
1548 result
= emit_float_cmp(ctx
, LLVMRealULT
, src
[0], src
[1]);
1551 result
= emit_float_cmp(ctx
, LLVMRealUGE
, src
[0], src
[1]);
1554 result
= emit_intrin_1f_param(ctx
, "llvm.fabs",
1555 to_float_type(ctx
, def_type
), src
[0]);
1558 result
= emit_iabs(ctx
, src
[0]);
1561 result
= emit_minmax_int(ctx
, LLVMIntSGT
, src
[0], src
[1]);
1564 result
= emit_minmax_int(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1567 result
= emit_minmax_int(ctx
, LLVMIntUGT
, src
[0], src
[1]);
1570 result
= emit_minmax_int(ctx
, LLVMIntULT
, src
[0], src
[1]);
1573 result
= emit_isign(ctx
, src
[0]);
1576 src
[0] = to_float(ctx
, src
[0]);
1577 result
= emit_fsign(ctx
, src
[0]);
1580 result
= emit_intrin_1f_param(ctx
, "llvm.floor",
1581 to_float_type(ctx
, def_type
), src
[0]);
1584 result
= emit_intrin_1f_param(ctx
, "llvm.trunc",
1585 to_float_type(ctx
, def_type
), src
[0]);
1588 result
= emit_intrin_1f_param(ctx
, "llvm.ceil",
1589 to_float_type(ctx
, def_type
), src
[0]);
1591 case nir_op_fround_even
:
1592 result
= emit_intrin_1f_param(ctx
, "llvm.rint",
1593 to_float_type(ctx
, def_type
),src
[0]);
1596 result
= emit_ffract(ctx
, src
[0]);
1599 result
= emit_intrin_1f_param(ctx
, "llvm.sin",
1600 to_float_type(ctx
, def_type
), src
[0]);
1603 result
= emit_intrin_1f_param(ctx
, "llvm.cos",
1604 to_float_type(ctx
, def_type
), src
[0]);
1607 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt",
1608 to_float_type(ctx
, def_type
), src
[0]);
1611 result
= emit_intrin_1f_param(ctx
, "llvm.exp2",
1612 to_float_type(ctx
, def_type
), src
[0]);
1615 result
= emit_intrin_1f_param(ctx
, "llvm.log2",
1616 to_float_type(ctx
, def_type
), src
[0]);
1619 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt",
1620 to_float_type(ctx
, def_type
), src
[0]);
1621 result
= ac_emit_fdiv(&ctx
->ac
, ctx
->f32one
, result
);
1624 result
= emit_intrin_2f_param(ctx
, "llvm.pow",
1625 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1628 result
= emit_intrin_2f_param(ctx
, "llvm.maxnum",
1629 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1632 result
= emit_intrin_2f_param(ctx
, "llvm.minnum",
1633 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1636 result
= emit_intrin_3f_param(ctx
, "llvm.fma",
1637 to_float_type(ctx
, def_type
), src
[0], src
[1], src
[2]);
1639 case nir_op_ibitfield_extract
:
1640 result
= emit_bitfield_extract(ctx
, "llvm.AMDGPU.bfe.i32", src
);
1642 case nir_op_ubitfield_extract
:
1643 result
= emit_bitfield_extract(ctx
, "llvm.AMDGPU.bfe.u32", src
);
1645 case nir_op_bitfield_insert
:
1646 result
= emit_bitfield_insert(ctx
, src
[0], src
[1], src
[2], src
[3]);
1648 case nir_op_bitfield_reverse
:
1649 result
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.bitreverse.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1651 case nir_op_bit_count
:
1652 result
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.ctpop.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1657 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1658 src
[i
] = to_integer(ctx
, src
[i
]);
1659 result
= ac_build_gather_values(&ctx
->ac
, src
, num_components
);
1663 src
[0] = to_float(ctx
, src
[0]);
1664 result
= LLVMBuildFPToSI(ctx
->builder
, src
[0], def_type
, "");
1668 src
[0] = to_float(ctx
, src
[0]);
1669 result
= LLVMBuildFPToUI(ctx
->builder
, src
[0], def_type
, "");
1673 result
= LLVMBuildSIToFP(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1677 result
= LLVMBuildUIToFP(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1680 result
= LLVMBuildFPExt(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1683 result
= LLVMBuildFPTrunc(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1686 result
= emit_bcsel(ctx
, src
[0], src
[1], src
[2]);
1688 case nir_op_find_lsb
:
1689 result
= emit_find_lsb(ctx
, src
[0]);
1691 case nir_op_ufind_msb
:
1692 result
= emit_ufind_msb(ctx
, src
[0]);
1694 case nir_op_ifind_msb
:
1695 result
= emit_ifind_msb(ctx
, src
[0]);
1697 case nir_op_uadd_carry
:
1698 result
= emit_uint_carry(ctx
, "llvm.uadd.with.overflow.i32", src
[0], src
[1]);
1700 case nir_op_usub_borrow
:
1701 result
= emit_uint_carry(ctx
, "llvm.usub.with.overflow.i32", src
[0], src
[1]);
1704 result
= emit_b2f(ctx
, src
[0]);
1706 case nir_op_fquantize2f16
:
1707 src
[0] = to_float(ctx
, src
[0]);
1708 result
= LLVMBuildFPTrunc(ctx
->builder
, src
[0], ctx
->f16
, "");
1709 /* need to convert back up to f32 */
1710 result
= LLVMBuildFPExt(ctx
->builder
, result
, ctx
->f32
, "");
1712 case nir_op_umul_high
:
1713 result
= emit_umul_high(ctx
, src
[0], src
[1]);
1715 case nir_op_imul_high
:
1716 result
= emit_imul_high(ctx
, src
[0], src
[1]);
1718 case nir_op_pack_half_2x16
:
1719 result
= emit_pack_half_2x16(ctx
, src
[0]);
1721 case nir_op_unpack_half_2x16
:
1722 result
= emit_unpack_half_2x16(ctx
, src
[0]);
1726 case nir_op_fddx_fine
:
1727 case nir_op_fddy_fine
:
1728 case nir_op_fddx_coarse
:
1729 case nir_op_fddy_coarse
:
1730 result
= emit_ddxy(ctx
, instr
->op
, src
[0]);
1733 fprintf(stderr
, "Unknown NIR alu instr: ");
1734 nir_print_instr(&instr
->instr
, stderr
);
1735 fprintf(stderr
, "\n");
1740 assert(instr
->dest
.dest
.is_ssa
);
1741 result
= to_integer(ctx
, result
);
1742 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.dest
.ssa
,
1747 static void visit_load_const(struct nir_to_llvm_context
*ctx
,
1748 nir_load_const_instr
*instr
)
1750 LLVMValueRef values
[4], value
= NULL
;
1751 LLVMTypeRef element_type
=
1752 LLVMIntTypeInContext(ctx
->context
, instr
->def
.bit_size
);
1754 for (unsigned i
= 0; i
< instr
->def
.num_components
; ++i
) {
1755 switch (instr
->def
.bit_size
) {
1757 values
[i
] = LLVMConstInt(element_type
,
1758 instr
->value
.u32
[i
], false);
1761 values
[i
] = LLVMConstInt(element_type
,
1762 instr
->value
.u64
[i
], false);
1766 "unsupported nir load_const bit_size: %d\n",
1767 instr
->def
.bit_size
);
1771 if (instr
->def
.num_components
> 1) {
1772 value
= LLVMConstVector(values
, instr
->def
.num_components
);
1776 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, value
);
1779 static LLVMValueRef
cast_ptr(struct nir_to_llvm_context
*ctx
, LLVMValueRef ptr
,
1782 int addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
1783 return LLVMBuildBitCast(ctx
->builder
, ptr
,
1784 LLVMPointerType(type
, addr_space
), "");
1788 get_buffer_size(struct nir_to_llvm_context
*ctx
, LLVMValueRef descriptor
, bool in_elements
)
1791 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1792 LLVMConstInt(ctx
->i32
, 2, false), "");
1795 if (ctx
->options
->chip_class
>= VI
&& in_elements
) {
1796 /* On VI, the descriptor contains the size in bytes,
1797 * but TXQ must return the size in elements.
1798 * The stride is always non-zero for resources using TXQ.
1800 LLVMValueRef stride
=
1801 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1802 LLVMConstInt(ctx
->i32
, 1, false), "");
1803 stride
= LLVMBuildLShr(ctx
->builder
, stride
,
1804 LLVMConstInt(ctx
->i32
, 16, false), "");
1805 stride
= LLVMBuildAnd(ctx
->builder
, stride
,
1806 LLVMConstInt(ctx
->i32
, 0x3fff, false), "");
1808 size
= LLVMBuildUDiv(ctx
->builder
, size
, stride
, "");
1814 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
1817 static void build_int_type_name(
1819 char *buf
, unsigned bufsize
)
1821 assert(bufsize
>= 6);
1823 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
1824 snprintf(buf
, bufsize
, "v%ui32",
1825 LLVMGetVectorSize(type
));
1830 static LLVMValueRef
radv_lower_gather4_integer(struct nir_to_llvm_context
*ctx
,
1831 struct ac_tex_info
*tinfo
,
1832 nir_tex_instr
*instr
,
1833 const char *intr_name
,
1834 unsigned coord_vgpr_index
)
1836 LLVMValueRef coord
= tinfo
->args
[0];
1837 LLVMValueRef half_texel
[2];
1842 LLVMValueRef txq_args
[10];
1843 int txq_arg_count
= 0;
1845 bool da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
1846 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, false);
1847 txq_args
[txq_arg_count
++] = tinfo
->args
[1];
1848 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0xf, 0); /* dmask */
1849 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* unorm */
1850 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* r128 */
1851 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, da
? 1 : 0, 0);
1852 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* glc */
1853 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* slc */
1854 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* tfe */
1855 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* lwe */
1856 size
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.getresinfo.i32", ctx
->v4i32
,
1857 txq_args
, txq_arg_count
,
1858 AC_FUNC_ATTR_READNONE
);
1860 for (c
= 0; c
< 2; c
++) {
1861 half_texel
[c
] = LLVMBuildExtractElement(ctx
->builder
, size
,
1862 LLVMConstInt(ctx
->i32
, c
, false), "");
1863 half_texel
[c
] = LLVMBuildUIToFP(ctx
->builder
, half_texel
[c
], ctx
->f32
, "");
1864 half_texel
[c
] = ac_emit_fdiv(&ctx
->ac
, ctx
->f32one
, half_texel
[c
]);
1865 half_texel
[c
] = LLVMBuildFMul(ctx
->builder
, half_texel
[c
],
1866 LLVMConstReal(ctx
->f32
, -0.5), "");
1870 for (c
= 0; c
< 2; c
++) {
1872 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
1873 tmp
= LLVMBuildExtractElement(ctx
->builder
, coord
, index
, "");
1874 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
1875 tmp
= LLVMBuildFAdd(ctx
->builder
, tmp
, half_texel
[c
], "");
1876 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
1877 coord
= LLVMBuildInsertElement(ctx
->builder
, coord
, tmp
, index
, "");
1880 tinfo
->args
[0] = coord
;
1881 return ac_emit_llvm_intrinsic(&ctx
->ac
, intr_name
, tinfo
->dst_type
, tinfo
->args
, tinfo
->arg_count
,
1882 AC_FUNC_ATTR_READNONE
| AC_FUNC_ATTR_NOUNWIND
);
1886 static LLVMValueRef
build_tex_intrinsic(struct nir_to_llvm_context
*ctx
,
1887 nir_tex_instr
*instr
,
1888 struct ac_tex_info
*tinfo
)
1890 const char *name
= "llvm.SI.image.sample";
1891 const char *infix
= "";
1892 char intr_name
[127];
1894 bool is_shadow
= instr
->is_shadow
;
1895 bool has_offset
= tinfo
->has_offset
;
1896 switch (instr
->op
) {
1898 case nir_texop_txf_ms
:
1899 case nir_texop_samples_identical
:
1900 name
= instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
? "llvm.SI.image.load" :
1901 instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
? "llvm.SI.vs.load.input" :
1902 "llvm.SI.image.load.mip";
1913 name
= "llvm.SI.getresinfo";
1915 case nir_texop_query_levels
:
1916 name
= "llvm.SI.getresinfo";
1919 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
1926 name
= "llvm.SI.gather4";
1930 name
= "llvm.SI.getlod";
1938 build_int_type_name(LLVMTypeOf(tinfo
->args
[0]), type
, sizeof(type
));
1939 sprintf(intr_name
, "%s%s%s%s.%s", name
, is_shadow
? ".c" : "", infix
,
1940 has_offset
? ".o" : "", type
);
1942 if (instr
->op
== nir_texop_tg4
) {
1943 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
1944 if (stype
== GLSL_TYPE_UINT
|| stype
== GLSL_TYPE_INT
) {
1945 return radv_lower_gather4_integer(ctx
, tinfo
, instr
, intr_name
,
1946 (int)has_offset
+ (int)is_shadow
);
1949 return ac_emit_llvm_intrinsic(&ctx
->ac
, intr_name
, tinfo
->dst_type
, tinfo
->args
, tinfo
->arg_count
,
1950 AC_FUNC_ATTR_READNONE
| AC_FUNC_ATTR_NOUNWIND
);
1954 static LLVMValueRef
visit_vulkan_resource_index(struct nir_to_llvm_context
*ctx
,
1955 nir_intrinsic_instr
*instr
)
1957 LLVMValueRef index
= get_src(ctx
, instr
->src
[0]);
1958 unsigned desc_set
= nir_intrinsic_desc_set(instr
);
1959 unsigned binding
= nir_intrinsic_binding(instr
);
1960 LLVMValueRef desc_ptr
= ctx
->descriptor_sets
[desc_set
];
1961 struct radv_descriptor_set_layout
*layout
= ctx
->options
->layout
->set
[desc_set
].layout
;
1962 unsigned base_offset
= layout
->binding
[binding
].offset
;
1963 LLVMValueRef offset
, stride
;
1965 if (layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
||
1966 layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
) {
1967 desc_ptr
= ctx
->push_constants
;
1968 base_offset
= ctx
->options
->layout
->push_constant_size
;
1969 base_offset
+= 16 * layout
->binding
[binding
].dynamic_offset_offset
;
1970 stride
= LLVMConstInt(ctx
->i32
, 16, false);
1972 stride
= LLVMConstInt(ctx
->i32
, layout
->binding
[binding
].size
, false);
1974 offset
= LLVMConstInt(ctx
->i32
, base_offset
, false);
1975 index
= LLVMBuildMul(ctx
->builder
, index
, stride
, "");
1976 offset
= LLVMBuildAdd(ctx
->builder
, offset
, index
, "");
1978 desc_ptr
= build_gep0(ctx
, desc_ptr
, offset
);
1979 desc_ptr
= cast_ptr(ctx
, desc_ptr
, ctx
->v4i32
);
1980 LLVMSetMetadata(desc_ptr
, ctx
->uniform_md_kind
, ctx
->empty_md
);
1982 return LLVMBuildLoad(ctx
->builder
, desc_ptr
, "");
1985 static LLVMValueRef
visit_load_push_constant(struct nir_to_llvm_context
*ctx
,
1986 nir_intrinsic_instr
*instr
)
1988 LLVMValueRef ptr
, addr
;
1990 addr
= LLVMConstInt(ctx
->i32
, nir_intrinsic_base(instr
), 0);
1991 addr
= LLVMBuildAdd(ctx
->builder
, addr
, get_src(ctx
, instr
->src
[0]), "");
1993 ptr
= build_gep0(ctx
, ctx
->push_constants
, addr
);
1994 ptr
= cast_ptr(ctx
, ptr
, get_def_type(ctx
, &instr
->dest
.ssa
));
1996 return LLVMBuildLoad(ctx
->builder
, ptr
, "");
1999 static LLVMValueRef
visit_get_buffer_size(struct nir_to_llvm_context
*ctx
,
2000 nir_intrinsic_instr
*instr
)
2002 LLVMValueRef desc
= get_src(ctx
, instr
->src
[0]);
2004 return get_buffer_size(ctx
, desc
, false);
2006 static void visit_store_ssbo(struct nir_to_llvm_context
*ctx
,
2007 nir_intrinsic_instr
*instr
)
2009 const char *store_name
;
2010 LLVMValueRef src_data
= get_src(ctx
, instr
->src
[0]);
2011 LLVMTypeRef data_type
= ctx
->f32
;
2012 int elem_size_mult
= get_elem_bits(ctx
, LLVMTypeOf(src_data
)) / 32;
2013 int components_32bit
= elem_size_mult
* instr
->num_components
;
2014 unsigned writemask
= nir_intrinsic_write_mask(instr
);
2015 LLVMValueRef base_data
, base_offset
;
2016 LLVMValueRef params
[6];
2018 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2019 ctx
->shader_info
->fs
.writes_memory
= true;
2021 params
[1] = get_src(ctx
, instr
->src
[1]);
2022 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
2023 params
[4] = LLVMConstInt(ctx
->i1
, 0, false); /* glc */
2024 params
[5] = LLVMConstInt(ctx
->i1
, 0, false); /* slc */
2026 if (components_32bit
> 1)
2027 data_type
= LLVMVectorType(ctx
->f32
, components_32bit
);
2029 base_data
= to_float(ctx
, src_data
);
2030 base_data
= trim_vector(ctx
, base_data
, instr
->num_components
);
2031 base_data
= LLVMBuildBitCast(ctx
->builder
, base_data
,
2033 base_offset
= get_src(ctx
, instr
->src
[2]); /* voffset */
2037 LLVMValueRef offset
;
2039 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
2041 /* Due to an LLVM limitation, split 3-element writes
2042 * into a 2-element and a 1-element write. */
2044 writemask
|= 1 << (start
+ 2);
2048 start
*= elem_size_mult
;
2049 count
*= elem_size_mult
;
2052 writemask
|= ((1u << (count
- 4)) - 1u) << (start
+ 4);
2057 store_name
= "llvm.amdgcn.buffer.store.v4f32";
2059 } else if (count
== 2) {
2060 tmp
= LLVMBuildExtractElement(ctx
->builder
,
2061 base_data
, LLVMConstInt(ctx
->i32
, start
, false), "");
2062 data
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), tmp
,
2065 tmp
= LLVMBuildExtractElement(ctx
->builder
,
2066 base_data
, LLVMConstInt(ctx
->i32
, start
+ 1, false), "");
2067 data
= LLVMBuildInsertElement(ctx
->builder
, data
, tmp
,
2069 store_name
= "llvm.amdgcn.buffer.store.v2f32";
2073 if (get_llvm_num_components(base_data
) > 1)
2074 data
= LLVMBuildExtractElement(ctx
->builder
, base_data
,
2075 LLVMConstInt(ctx
->i32
, start
, false), "");
2078 store_name
= "llvm.amdgcn.buffer.store.f32";
2081 offset
= base_offset
;
2083 offset
= LLVMBuildAdd(ctx
->builder
, offset
, LLVMConstInt(ctx
->i32
, start
* 4, false), "");
2087 ac_emit_llvm_intrinsic(&ctx
->ac
, store_name
,
2088 ctx
->voidt
, params
, 6, 0);
2092 static LLVMValueRef
visit_atomic_ssbo(struct nir_to_llvm_context
*ctx
,
2093 nir_intrinsic_instr
*instr
)
2096 LLVMValueRef params
[6];
2098 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2099 ctx
->shader_info
->fs
.writes_memory
= true;
2101 if (instr
->intrinsic
== nir_intrinsic_ssbo_atomic_comp_swap
) {
2102 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[3]), 0);
2104 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[2]), 0);
2105 params
[arg_count
++] = get_src(ctx
, instr
->src
[0]);
2106 params
[arg_count
++] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
2107 params
[arg_count
++] = get_src(ctx
, instr
->src
[1]); /* voffset */
2108 params
[arg_count
++] = LLVMConstInt(ctx
->i1
, 0, false); /* slc */
2110 switch (instr
->intrinsic
) {
2111 case nir_intrinsic_ssbo_atomic_add
:
2112 name
= "llvm.amdgcn.buffer.atomic.add";
2114 case nir_intrinsic_ssbo_atomic_imin
:
2115 name
= "llvm.amdgcn.buffer.atomic.smin";
2117 case nir_intrinsic_ssbo_atomic_umin
:
2118 name
= "llvm.amdgcn.buffer.atomic.umin";
2120 case nir_intrinsic_ssbo_atomic_imax
:
2121 name
= "llvm.amdgcn.buffer.atomic.smax";
2123 case nir_intrinsic_ssbo_atomic_umax
:
2124 name
= "llvm.amdgcn.buffer.atomic.umax";
2126 case nir_intrinsic_ssbo_atomic_and
:
2127 name
= "llvm.amdgcn.buffer.atomic.and";
2129 case nir_intrinsic_ssbo_atomic_or
:
2130 name
= "llvm.amdgcn.buffer.atomic.or";
2132 case nir_intrinsic_ssbo_atomic_xor
:
2133 name
= "llvm.amdgcn.buffer.atomic.xor";
2135 case nir_intrinsic_ssbo_atomic_exchange
:
2136 name
= "llvm.amdgcn.buffer.atomic.swap";
2138 case nir_intrinsic_ssbo_atomic_comp_swap
:
2139 name
= "llvm.amdgcn.buffer.atomic.cmpswap";
2145 return ac_emit_llvm_intrinsic(&ctx
->ac
, name
, ctx
->i32
, params
, arg_count
, 0);
2148 static LLVMValueRef
visit_load_buffer(struct nir_to_llvm_context
*ctx
,
2149 nir_intrinsic_instr
*instr
)
2151 const char *load_name
;
2152 LLVMTypeRef data_type
= ctx
->f32
;
2153 if (instr
->num_components
== 3)
2154 data_type
= LLVMVectorType(ctx
->f32
, 4);
2155 else if (instr
->num_components
> 1)
2156 data_type
= LLVMVectorType(ctx
->f32
, instr
->num_components
);
2158 if (instr
->num_components
== 4 || instr
->num_components
== 3)
2159 load_name
= "llvm.amdgcn.buffer.load.v4f32";
2160 else if (instr
->num_components
== 2)
2161 load_name
= "llvm.amdgcn.buffer.load.v2f32";
2162 else if (instr
->num_components
== 1)
2163 load_name
= "llvm.amdgcn.buffer.load.f32";
2167 LLVMValueRef params
[] = {
2168 get_src(ctx
, instr
->src
[0]),
2169 LLVMConstInt(ctx
->i32
, 0, false),
2170 get_src(ctx
, instr
->src
[1]),
2171 LLVMConstInt(ctx
->i1
, 0, false),
2172 LLVMConstInt(ctx
->i1
, 0, false),
2176 ac_emit_llvm_intrinsic(&ctx
->ac
, load_name
, data_type
, params
, 5, 0);
2178 if (instr
->num_components
== 3)
2179 ret
= trim_vector(ctx
, ret
, 3);
2181 return LLVMBuildBitCast(ctx
->builder
, ret
,
2182 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2185 static LLVMValueRef
visit_load_ubo_buffer(struct nir_to_llvm_context
*ctx
,
2186 nir_intrinsic_instr
*instr
)
2188 LLVMValueRef results
[8], ret
;
2189 LLVMValueRef rsrc
= get_src(ctx
, instr
->src
[0]);
2190 LLVMValueRef offset
= get_src(ctx
, instr
->src
[1]);
2191 int num_components
= instr
->num_components
;
2193 rsrc
= LLVMBuildBitCast(ctx
->builder
, rsrc
, LLVMVectorType(ctx
->i8
, 16), "");
2195 if (instr
->dest
.ssa
.bit_size
== 64)
2196 num_components
*= 2;
2198 for (unsigned i
= 0; i
< num_components
; ++i
) {
2199 LLVMValueRef params
[] = {
2201 LLVMBuildAdd(ctx
->builder
, LLVMConstInt(ctx
->i32
, 4 * i
, 0),
2204 results
[i
] = ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.load.const", ctx
->f32
,
2205 params
, 2, AC_FUNC_ATTR_READNONE
);
2209 ret
= ac_build_gather_values(&ctx
->ac
, results
, instr
->num_components
);
2210 return LLVMBuildBitCast(ctx
->builder
, ret
,
2211 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2215 radv_get_deref_offset(struct nir_to_llvm_context
*ctx
, nir_deref
*tail
,
2216 bool vs_in
, unsigned *vertex_index_out
,
2217 unsigned *const_out
, LLVMValueRef
*indir_out
)
2219 unsigned const_offset
= 0;
2220 LLVMValueRef offset
= NULL
;
2222 if (vertex_index_out
!= NULL
) {
2224 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2225 *vertex_index_out
= deref_array
->base_offset
;
2228 while (tail
->child
!= NULL
) {
2229 const struct glsl_type
*parent_type
= tail
->type
;
2232 if (tail
->deref_type
== nir_deref_type_array
) {
2233 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2234 LLVMValueRef index
, stride
, local_offset
;
2235 unsigned size
= glsl_count_attribute_slots(tail
->type
, vs_in
);
2237 const_offset
+= size
* deref_array
->base_offset
;
2238 if (deref_array
->deref_array_type
== nir_deref_array_type_direct
)
2241 assert(deref_array
->deref_array_type
== nir_deref_array_type_indirect
);
2242 index
= get_src(ctx
, deref_array
->indirect
);
2243 stride
= LLVMConstInt(ctx
->i32
, size
, 0);
2244 local_offset
= LLVMBuildMul(ctx
->builder
, stride
, index
, "");
2247 offset
= LLVMBuildAdd(ctx
->builder
, offset
, local_offset
, "");
2249 offset
= local_offset
;
2250 } else if (tail
->deref_type
== nir_deref_type_struct
) {
2251 nir_deref_struct
*deref_struct
= nir_deref_as_struct(tail
);
2253 for (unsigned i
= 0; i
< deref_struct
->index
; i
++) {
2254 const struct glsl_type
*ft
= glsl_get_struct_field(parent_type
, i
);
2255 const_offset
+= glsl_count_attribute_slots(ft
, vs_in
);
2258 unreachable("unsupported deref type");
2262 if (const_offset
&& offset
)
2263 offset
= LLVMBuildAdd(ctx
->builder
, offset
,
2264 LLVMConstInt(ctx
->i32
, const_offset
, 0),
2267 *const_out
= const_offset
;
2268 *indir_out
= offset
;
2272 load_gs_input(struct nir_to_llvm_context
*ctx
,
2273 nir_intrinsic_instr
*instr
)
2275 LLVMValueRef indir_index
, vtx_offset
;
2276 unsigned const_index
;
2277 LLVMValueRef args
[9];
2278 unsigned param
, vtx_offset_param
;
2279 LLVMValueRef value
[4], result
;
2280 unsigned vertex_index
;
2281 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
,
2282 false, &vertex_index
,
2283 &const_index
, &indir_index
);
2284 vtx_offset_param
= vertex_index
;
2285 assert(vtx_offset_param
< 6);
2286 vtx_offset
= LLVMBuildMul(ctx
->builder
, ctx
->gs_vtx_offset
[vtx_offset_param
],
2287 LLVMConstInt(ctx
->i32
, 4, false), "");
2289 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2290 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2291 args
[0] = ctx
->esgs_ring
;
2292 args
[1] = vtx_offset
;
2293 args
[2] = LLVMConstInt(ctx
->i32
, (param
* 4 + i
) * 256, false);
2294 args
[3] = ctx
->i32zero
;
2295 args
[4] = ctx
->i32one
; /* OFFEN */
2296 args
[5] = ctx
->i32zero
; /* IDXEN */
2297 args
[6] = ctx
->i32one
; /* GLC */
2298 args
[7] = ctx
->i32zero
; /* SLC */
2299 args
[8] = ctx
->i32zero
; /* TFE */
2301 value
[i
] = ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.buffer.load.dword.i32.i32",
2302 ctx
->i32
, args
, 9, AC_FUNC_ATTR_READONLY
);
2304 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2309 static LLVMValueRef
visit_load_var(struct nir_to_llvm_context
*ctx
,
2310 nir_intrinsic_instr
*instr
)
2312 LLVMValueRef values
[8];
2313 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2314 int ve
= instr
->dest
.ssa
.num_components
;
2315 LLVMValueRef indir_index
;
2317 unsigned const_index
;
2318 bool vs_in
= ctx
->stage
== MESA_SHADER_VERTEX
&&
2319 instr
->variables
[0]->var
->data
.mode
== nir_var_shader_in
;
2320 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
, vs_in
, NULL
,
2321 &const_index
, &indir_index
);
2323 if (instr
->dest
.ssa
.bit_size
== 64)
2326 switch (instr
->variables
[0]->var
->data
.mode
) {
2327 case nir_var_shader_in
:
2328 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
2329 return load_gs_input(ctx
, instr
);
2331 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2333 unsigned count
= glsl_count_attribute_slots(
2334 instr
->variables
[0]->var
->type
,
2335 ctx
->stage
== MESA_SHADER_VERTEX
);
2337 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2338 &ctx
->ac
, ctx
->inputs
+ idx
+ chan
, count
,
2341 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2345 values
[chan
] = ctx
->inputs
[idx
+ chan
+ const_index
* 4];
2349 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2351 unsigned count
= glsl_count_attribute_slots(
2352 instr
->variables
[0]->var
->type
, false);
2354 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2355 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
2358 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2362 values
[chan
] = LLVMBuildLoad(ctx
->builder
, ctx
->locals
[idx
+ chan
+ const_index
* 4], "");
2366 case nir_var_shader_out
:
2367 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2369 unsigned count
= glsl_count_attribute_slots(
2370 instr
->variables
[0]->var
->type
, false);
2372 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2373 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2376 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2380 values
[chan
] = LLVMBuildLoad(ctx
->builder
,
2381 ctx
->outputs
[idx
+ chan
+ const_index
* 4],
2386 case nir_var_shared
: {
2387 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2388 LLVMValueRef derived_ptr
;
2390 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2391 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
2393 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
2394 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
2396 values
[chan
] = LLVMBuildLoad(ctx
->builder
, derived_ptr
, "");
2401 unreachable("unhandle variable mode");
2403 ret
= ac_build_gather_values(&ctx
->ac
, values
, ve
);
2404 return LLVMBuildBitCast(ctx
->builder
, ret
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2408 visit_store_var(struct nir_to_llvm_context
*ctx
,
2409 nir_intrinsic_instr
*instr
)
2411 LLVMValueRef temp_ptr
, value
;
2412 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2413 LLVMValueRef src
= to_float(ctx
, get_src(ctx
, instr
->src
[0]));
2414 int writemask
= instr
->const_index
[0];
2415 LLVMValueRef indir_index
;
2416 unsigned const_index
;
2417 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
, false,
2418 NULL
, &const_index
, &indir_index
);
2420 if (get_elem_bits(ctx
, LLVMTypeOf(src
)) == 64) {
2421 int old_writemask
= writemask
;
2423 src
= LLVMBuildBitCast(ctx
->builder
, src
,
2424 LLVMVectorType(ctx
->f32
, get_llvm_num_components(src
) * 2),
2428 for (unsigned chan
= 0; chan
< 4; chan
++) {
2429 if (old_writemask
& (1 << chan
))
2430 writemask
|= 3u << (2 * chan
);
2434 switch (instr
->variables
[0]->var
->data
.mode
) {
2435 case nir_var_shader_out
:
2436 for (unsigned chan
= 0; chan
< 8; chan
++) {
2438 if (!(writemask
& (1 << chan
)))
2441 value
= llvm_extract_elem(ctx
, src
, chan
);
2443 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CLIP_DIST0
||
2444 instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CULL_DIST0
)
2447 unsigned count
= glsl_count_attribute_slots(
2448 instr
->variables
[0]->var
->type
, false);
2450 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2451 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2454 if (get_llvm_num_components(tmp_vec
) > 1) {
2455 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
2456 value
, indir_index
, "");
2459 build_store_values_extended(ctx
, ctx
->outputs
+ idx
+ chan
,
2460 count
, stride
, tmp_vec
);
2463 temp_ptr
= ctx
->outputs
[idx
+ chan
+ const_index
* stride
];
2465 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
2470 for (unsigned chan
= 0; chan
< 8; chan
++) {
2471 if (!(writemask
& (1 << chan
)))
2474 value
= llvm_extract_elem(ctx
, src
, chan
);
2476 unsigned count
= glsl_count_attribute_slots(
2477 instr
->variables
[0]->var
->type
, false);
2479 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2480 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
2483 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
2484 value
, indir_index
, "");
2485 build_store_values_extended(ctx
, ctx
->locals
+ idx
+ chan
,
2488 temp_ptr
= ctx
->locals
[idx
+ chan
+ const_index
* 4];
2490 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
2494 case nir_var_shared
: {
2495 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2496 for (unsigned chan
= 0; chan
< 8; chan
++) {
2497 if (!(writemask
& (1 << chan
)))
2499 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
2500 LLVMValueRef derived_ptr
;
2503 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
2504 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
2505 LLVMBuildStore(ctx
->builder
,
2506 to_integer(ctx
, src
), derived_ptr
);
2515 static int image_type_to_components_count(enum glsl_sampler_dim dim
, bool array
)
2518 case GLSL_SAMPLER_DIM_BUF
:
2520 case GLSL_SAMPLER_DIM_1D
:
2521 return array
? 2 : 1;
2522 case GLSL_SAMPLER_DIM_2D
:
2523 return array
? 3 : 2;
2524 case GLSL_SAMPLER_DIM_MS
:
2525 return array
? 4 : 3;
2526 case GLSL_SAMPLER_DIM_3D
:
2527 case GLSL_SAMPLER_DIM_CUBE
:
2529 case GLSL_SAMPLER_DIM_RECT
:
2530 case GLSL_SAMPLER_DIM_SUBPASS
:
2532 case GLSL_SAMPLER_DIM_SUBPASS_MS
:
2540 static LLVMValueRef
get_image_coords(struct nir_to_llvm_context
*ctx
,
2541 nir_intrinsic_instr
*instr
)
2543 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
2544 if(instr
->variables
[0]->deref
.child
)
2545 type
= instr
->variables
[0]->deref
.child
->type
;
2547 LLVMValueRef src0
= get_src(ctx
, instr
->src
[0]);
2548 LLVMValueRef coords
[4];
2549 LLVMValueRef masks
[] = {
2550 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
2551 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false),
2555 enum glsl_sampler_dim dim
= glsl_get_sampler_dim(type
);
2556 bool add_frag_pos
= (dim
== GLSL_SAMPLER_DIM_SUBPASS
||
2557 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
2558 bool is_ms
= (dim
== GLSL_SAMPLER_DIM_MS
||
2559 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
2561 count
= image_type_to_components_count(dim
,
2562 glsl_sampler_type_is_array(type
));
2565 if (instr
->src
[0].ssa
->num_components
)
2566 res
= LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[0], "");
2573 for (chan
= 0; chan
< count
; ++chan
) {
2574 coords
[chan
] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[chan
], "");
2578 for (chan
= 0; chan
< count
; ++chan
)
2579 coords
[chan
] = LLVMBuildAdd(ctx
->builder
, coords
[chan
], LLVMBuildFPToUI(ctx
->builder
, ctx
->frag_pos
[chan
], ctx
->i32
, ""), "");
2582 coords
[count
] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[1]), 0);
2587 coords
[3] = LLVMGetUndef(ctx
->i32
);
2590 res
= ac_build_gather_values(&ctx
->ac
, coords
, count
);
2595 static void build_type_name_for_intr(
2597 char *buf
, unsigned bufsize
)
2599 LLVMTypeRef elem_type
= type
;
2601 assert(bufsize
>= 8);
2603 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
) {
2604 int ret
= snprintf(buf
, bufsize
, "v%u",
2605 LLVMGetVectorSize(type
));
2607 char *type_name
= LLVMPrintTypeToString(type
);
2608 fprintf(stderr
, "Error building type name for: %s\n",
2612 elem_type
= LLVMGetElementType(type
);
2616 switch (LLVMGetTypeKind(elem_type
)) {
2618 case LLVMIntegerTypeKind
:
2619 snprintf(buf
, bufsize
, "i%d", LLVMGetIntTypeWidth(elem_type
));
2621 case LLVMFloatTypeKind
:
2622 snprintf(buf
, bufsize
, "f32");
2624 case LLVMDoubleTypeKind
:
2625 snprintf(buf
, bufsize
, "f64");
2630 static void get_image_intr_name(const char *base_name
,
2631 LLVMTypeRef data_type
,
2632 LLVMTypeRef coords_type
,
2633 LLVMTypeRef rsrc_type
,
2634 char *out_name
, unsigned out_len
)
2636 char coords_type_name
[8];
2638 build_type_name_for_intr(coords_type
, coords_type_name
,
2639 sizeof(coords_type_name
));
2641 if (HAVE_LLVM
<= 0x0309) {
2642 snprintf(out_name
, out_len
, "%s.%s", base_name
, coords_type_name
);
2644 char data_type_name
[8];
2645 char rsrc_type_name
[8];
2647 build_type_name_for_intr(data_type
, data_type_name
,
2648 sizeof(data_type_name
));
2649 build_type_name_for_intr(rsrc_type
, rsrc_type_name
,
2650 sizeof(rsrc_type_name
));
2651 snprintf(out_name
, out_len
, "%s.%s.%s.%s", base_name
,
2652 data_type_name
, coords_type_name
, rsrc_type_name
);
2656 static LLVMValueRef
visit_image_load(struct nir_to_llvm_context
*ctx
,
2657 nir_intrinsic_instr
*instr
)
2659 LLVMValueRef params
[7];
2661 char intrinsic_name
[64];
2662 const nir_variable
*var
= instr
->variables
[0]->var
;
2663 const struct glsl_type
*type
= var
->type
;
2664 if(instr
->variables
[0]->deref
.child
)
2665 type
= instr
->variables
[0]->deref
.child
->type
;
2667 type
= glsl_without_array(type
);
2668 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
2669 params
[0] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
2670 params
[1] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
2671 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
2672 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
2673 params
[3] = LLVMConstInt(ctx
->i1
, 0, false); /* glc */
2674 params
[4] = LLVMConstInt(ctx
->i1
, 0, false); /* slc */
2675 res
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.load.format.v4f32", ctx
->v4f32
,
2678 res
= trim_vector(ctx
, res
, instr
->dest
.ssa
.num_components
);
2679 res
= to_integer(ctx
, res
);
2681 bool is_da
= glsl_sampler_type_is_array(type
) ||
2682 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
2683 LLVMValueRef da
= is_da
? ctx
->i32one
: ctx
->i32zero
;
2684 LLVMValueRef glc
= LLVMConstInt(ctx
->i1
, 0, false);
2685 LLVMValueRef slc
= LLVMConstInt(ctx
->i1
, 0, false);
2687 params
[0] = get_image_coords(ctx
, instr
);
2688 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
2689 params
[2] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
2690 if (HAVE_LLVM
<= 0x0309) {
2691 params
[3] = LLVMConstInt(ctx
->i1
, 0, false); /* r128 */
2696 LLVMValueRef lwe
= LLVMConstInt(ctx
->i1
, 0, false);
2703 get_image_intr_name("llvm.amdgcn.image.load",
2704 ctx
->v4f32
, /* vdata */
2705 LLVMTypeOf(params
[0]), /* coords */
2706 LLVMTypeOf(params
[1]), /* rsrc */
2707 intrinsic_name
, sizeof(intrinsic_name
));
2709 res
= ac_emit_llvm_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->v4f32
,
2710 params
, 7, AC_FUNC_ATTR_READONLY
);
2712 return to_integer(ctx
, res
);
2715 static void visit_image_store(struct nir_to_llvm_context
*ctx
,
2716 nir_intrinsic_instr
*instr
)
2718 LLVMValueRef params
[8];
2719 char intrinsic_name
[64];
2720 const nir_variable
*var
= instr
->variables
[0]->var
;
2721 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
2722 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
2723 const struct glsl_type
*type
= glsl_without_array(var
->type
);
2725 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2726 ctx
->shader_info
->fs
.writes_memory
= true;
2728 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
2729 params
[0] = to_float(ctx
, get_src(ctx
, instr
->src
[2])); /* data */
2730 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
2731 params
[2] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
2732 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
2733 params
[3] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
2734 params
[4] = i1false
; /* glc */
2735 params
[5] = i1false
; /* slc */
2736 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.store.format.v4f32", ctx
->voidt
,
2739 bool is_da
= glsl_sampler_type_is_array(type
) ||
2740 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
2741 LLVMValueRef da
= is_da
? i1true
: i1false
;
2742 LLVMValueRef glc
= i1false
;
2743 LLVMValueRef slc
= i1false
;
2745 params
[0] = to_float(ctx
, get_src(ctx
, instr
->src
[2]));
2746 params
[1] = get_image_coords(ctx
, instr
); /* coords */
2747 params
[2] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
2748 params
[3] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
2749 if (HAVE_LLVM
<= 0x0309) {
2750 params
[4] = i1false
; /* r128 */
2755 LLVMValueRef lwe
= i1false
;
2762 get_image_intr_name("llvm.amdgcn.image.store",
2763 LLVMTypeOf(params
[0]), /* vdata */
2764 LLVMTypeOf(params
[1]), /* coords */
2765 LLVMTypeOf(params
[2]), /* rsrc */
2766 intrinsic_name
, sizeof(intrinsic_name
));
2768 ac_emit_llvm_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->voidt
,
2774 static LLVMValueRef
visit_image_atomic(struct nir_to_llvm_context
*ctx
,
2775 nir_intrinsic_instr
*instr
)
2777 LLVMValueRef params
[6];
2778 int param_count
= 0;
2779 const nir_variable
*var
= instr
->variables
[0]->var
;
2780 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
2781 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
2782 const char *base_name
= "llvm.amdgcn.image.atomic";
2783 const char *atomic_name
;
2784 LLVMValueRef coords
;
2785 char intrinsic_name
[32], coords_type
[8];
2786 const struct glsl_type
*type
= glsl_without_array(var
->type
);
2788 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2789 ctx
->shader_info
->fs
.writes_memory
= true;
2791 params
[param_count
++] = get_src(ctx
, instr
->src
[2]);
2792 if (instr
->intrinsic
== nir_intrinsic_image_atomic_comp_swap
)
2793 params
[param_count
++] = get_src(ctx
, instr
->src
[3]);
2795 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
2796 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
2797 coords
= params
[param_count
++] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
2798 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
2799 params
[param_count
++] = ctx
->i32zero
; /* voffset */
2800 params
[param_count
++] = i1false
; /* glc */
2801 params
[param_count
++] = i1false
; /* slc */
2803 bool da
= glsl_sampler_type_is_array(type
) ||
2804 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
2806 coords
= params
[param_count
++] = get_image_coords(ctx
, instr
);
2807 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
2808 params
[param_count
++] = i1false
; /* r128 */
2809 params
[param_count
++] = da
? i1true
: i1false
; /* da */
2810 params
[param_count
++] = i1false
; /* slc */
2813 switch (instr
->intrinsic
) {
2814 case nir_intrinsic_image_atomic_add
:
2815 atomic_name
= "add";
2817 case nir_intrinsic_image_atomic_min
:
2818 atomic_name
= "smin";
2820 case nir_intrinsic_image_atomic_max
:
2821 atomic_name
= "smax";
2823 case nir_intrinsic_image_atomic_and
:
2824 atomic_name
= "and";
2826 case nir_intrinsic_image_atomic_or
:
2829 case nir_intrinsic_image_atomic_xor
:
2830 atomic_name
= "xor";
2832 case nir_intrinsic_image_atomic_exchange
:
2833 atomic_name
= "swap";
2835 case nir_intrinsic_image_atomic_comp_swap
:
2836 atomic_name
= "cmpswap";
2841 build_int_type_name(LLVMTypeOf(coords
),
2842 coords_type
, sizeof(coords_type
));
2844 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
2845 "%s.%s.%s", base_name
, atomic_name
, coords_type
);
2846 return ac_emit_llvm_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->i32
, params
, param_count
, 0);
2849 static LLVMValueRef
visit_image_size(struct nir_to_llvm_context
*ctx
,
2850 nir_intrinsic_instr
*instr
)
2853 LLVMValueRef params
[10];
2854 const nir_variable
*var
= instr
->variables
[0]->var
;
2855 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
2856 bool da
= glsl_sampler_type_is_array(var
->type
) ||
2857 glsl_get_sampler_dim(var
->type
) == GLSL_SAMPLER_DIM_CUBE
;
2858 if(instr
->variables
[0]->deref
.child
)
2859 type
= instr
->variables
[0]->deref
.child
->type
;
2861 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
)
2862 return get_buffer_size(ctx
, get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
), true);
2863 params
[0] = ctx
->i32zero
;
2864 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
2865 params
[2] = LLVMConstInt(ctx
->i32
, 15, false);
2866 params
[3] = ctx
->i32zero
;
2867 params
[4] = ctx
->i32zero
;
2868 params
[5] = da
? ctx
->i32one
: ctx
->i32zero
;
2869 params
[6] = ctx
->i32zero
;
2870 params
[7] = ctx
->i32zero
;
2871 params
[8] = ctx
->i32zero
;
2872 params
[9] = ctx
->i32zero
;
2874 res
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.getresinfo.i32", ctx
->v4i32
,
2875 params
, 10, AC_FUNC_ATTR_READNONE
);
2877 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
&&
2878 glsl_sampler_type_is_array(type
)) {
2879 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
2880 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
2881 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, res
, two
, "");
2882 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
2883 res
= LLVMBuildInsertElement(ctx
->builder
, res
, z
, two
, "");
2888 static void emit_waitcnt(struct nir_to_llvm_context
*ctx
)
2890 LLVMValueRef args
[1] = {
2891 LLVMConstInt(ctx
->i32
, 0xf70, false),
2893 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.waitcnt",
2894 ctx
->voidt
, args
, 1, 0);
2897 static void emit_barrier(struct nir_to_llvm_context
*ctx
)
2900 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.barrier",
2901 ctx
->voidt
, NULL
, 0, 0);
2904 static void emit_discard_if(struct nir_to_llvm_context
*ctx
,
2905 nir_intrinsic_instr
*instr
)
2908 ctx
->shader_info
->fs
.can_discard
= true;
2910 cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
2911 get_src(ctx
, instr
->src
[0]),
2914 cond
= LLVMBuildSelect(ctx
->builder
, cond
,
2915 LLVMConstReal(ctx
->f32
, -1.0f
),
2917 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.AMDGPU.kill",
2923 visit_load_local_invocation_index(struct nir_to_llvm_context
*ctx
)
2925 LLVMValueRef result
;
2926 LLVMValueRef thread_id
= get_thread_id(ctx
);
2927 result
= LLVMBuildAnd(ctx
->builder
, ctx
->tg_size
,
2928 LLVMConstInt(ctx
->i32
, 0xfc0, false), "");
2930 return LLVMBuildAdd(ctx
->builder
, result
, thread_id
, "");
2933 static LLVMValueRef
visit_var_atomic(struct nir_to_llvm_context
*ctx
,
2934 nir_intrinsic_instr
*instr
)
2936 LLVMValueRef ptr
, result
;
2937 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2938 LLVMValueRef src
= get_src(ctx
, instr
->src
[0]);
2939 ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2941 if (instr
->intrinsic
== nir_intrinsic_var_atomic_comp_swap
) {
2942 LLVMValueRef src1
= get_src(ctx
, instr
->src
[1]);
2943 result
= LLVMBuildAtomicCmpXchg(ctx
->builder
,
2945 LLVMAtomicOrderingSequentiallyConsistent
,
2946 LLVMAtomicOrderingSequentiallyConsistent
,
2949 LLVMAtomicRMWBinOp op
;
2950 switch (instr
->intrinsic
) {
2951 case nir_intrinsic_var_atomic_add
:
2952 op
= LLVMAtomicRMWBinOpAdd
;
2954 case nir_intrinsic_var_atomic_umin
:
2955 op
= LLVMAtomicRMWBinOpUMin
;
2957 case nir_intrinsic_var_atomic_umax
:
2958 op
= LLVMAtomicRMWBinOpUMax
;
2960 case nir_intrinsic_var_atomic_imin
:
2961 op
= LLVMAtomicRMWBinOpMin
;
2963 case nir_intrinsic_var_atomic_imax
:
2964 op
= LLVMAtomicRMWBinOpMax
;
2966 case nir_intrinsic_var_atomic_and
:
2967 op
= LLVMAtomicRMWBinOpAnd
;
2969 case nir_intrinsic_var_atomic_or
:
2970 op
= LLVMAtomicRMWBinOpOr
;
2972 case nir_intrinsic_var_atomic_xor
:
2973 op
= LLVMAtomicRMWBinOpXor
;
2975 case nir_intrinsic_var_atomic_exchange
:
2976 op
= LLVMAtomicRMWBinOpXchg
;
2982 result
= LLVMBuildAtomicRMW(ctx
->builder
, op
, ptr
, to_integer(ctx
, src
),
2983 LLVMAtomicOrderingSequentiallyConsistent
,
2989 #define INTERP_CENTER 0
2990 #define INTERP_CENTROID 1
2991 #define INTERP_SAMPLE 2
2993 static LLVMValueRef
lookup_interp_param(struct nir_to_llvm_context
*ctx
,
2994 enum glsl_interp_mode interp
, unsigned location
)
2997 case INTERP_MODE_FLAT
:
3000 case INTERP_MODE_SMOOTH
:
3001 case INTERP_MODE_NONE
:
3002 if (location
== INTERP_CENTER
)
3003 return ctx
->persp_center
;
3004 else if (location
== INTERP_CENTROID
)
3005 return ctx
->persp_centroid
;
3006 else if (location
== INTERP_SAMPLE
)
3007 return ctx
->persp_sample
;
3009 case INTERP_MODE_NOPERSPECTIVE
:
3010 if (location
== INTERP_CENTER
)
3011 return ctx
->linear_center
;
3012 else if (location
== INTERP_CENTROID
)
3013 return ctx
->linear_centroid
;
3014 else if (location
== INTERP_SAMPLE
)
3015 return ctx
->linear_sample
;
3021 static LLVMValueRef
load_sample_position(struct nir_to_llvm_context
*ctx
,
3022 LLVMValueRef sample_id
)
3024 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
3025 LLVMValueRef offset0
= LLVMBuildMul(ctx
->builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, false), "");
3026 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, false), "");
3027 LLVMValueRef result
[2];
3029 result
[0] = build_indexed_load_const(ctx
, ctx
->sample_positions
, offset0
);
3030 result
[1] = build_indexed_load_const(ctx
, ctx
->sample_positions
, offset1
);
3032 return ac_build_gather_values(&ctx
->ac
, result
, 2);
3035 static LLVMValueRef
load_sample_pos(struct nir_to_llvm_context
*ctx
)
3037 LLVMValueRef values
[2];
3039 values
[0] = emit_ffract(ctx
, ctx
->frag_pos
[0]);
3040 values
[1] = emit_ffract(ctx
, ctx
->frag_pos
[1]);
3041 return ac_build_gather_values(&ctx
->ac
, values
, 2);
3044 static LLVMValueRef
visit_interp(struct nir_to_llvm_context
*ctx
,
3045 nir_intrinsic_instr
*instr
)
3047 LLVMValueRef result
[2];
3048 LLVMValueRef interp_param
, attr_number
;
3051 LLVMValueRef src_c0
, src_c1
;
3052 const char *intr_name
;
3054 int input_index
= instr
->variables
[0]->var
->data
.location
- VARYING_SLOT_VAR0
;
3055 switch (instr
->intrinsic
) {
3056 case nir_intrinsic_interp_var_at_centroid
:
3057 location
= INTERP_CENTROID
;
3059 case nir_intrinsic_interp_var_at_sample
:
3060 case nir_intrinsic_interp_var_at_offset
:
3061 location
= INTERP_SAMPLE
;
3062 src0
= get_src(ctx
, instr
->src
[0]);
3068 if (instr
->intrinsic
== nir_intrinsic_interp_var_at_offset
) {
3069 src_c0
= to_float(ctx
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, ""));
3070 src_c1
= to_float(ctx
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, ""));
3071 } else if (instr
->intrinsic
== nir_intrinsic_interp_var_at_sample
) {
3072 LLVMValueRef sample_position
;
3073 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3075 /* fetch sample ID */
3076 sample_position
= load_sample_position(ctx
, src0
);
3078 src_c0
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32zero
, "");
3079 src_c0
= LLVMBuildFSub(ctx
->builder
, src_c0
, halfval
, "");
3080 src_c1
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32one
, "");
3081 src_c1
= LLVMBuildFSub(ctx
->builder
, src_c1
, halfval
, "");
3083 interp_param
= lookup_interp_param(ctx
, instr
->variables
[0]->var
->data
.interpolation
, location
);
3084 attr_number
= LLVMConstInt(ctx
->i32
, input_index
, false);
3086 if (location
== INTERP_SAMPLE
) {
3087 LLVMValueRef ij_out
[2];
3088 LLVMValueRef ddxy_out
= emit_ddxy_interp(ctx
, interp_param
);
3091 * take the I then J parameters, and the DDX/Y for it, and
3092 * calculate the IJ inputs for the interpolator.
3093 * temp1 = ddx * offset/sample.x + I;
3094 * interp_param.I = ddy * offset/sample.y + temp1;
3095 * temp1 = ddx * offset/sample.x + J;
3096 * interp_param.J = ddy * offset/sample.y + temp1;
3098 for (unsigned i
= 0; i
< 2; i
++) {
3099 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, false);
3100 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, false);
3101 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->builder
,
3102 ddxy_out
, ix_ll
, "");
3103 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->builder
,
3104 ddxy_out
, iy_ll
, "");
3105 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->builder
,
3106 interp_param
, ix_ll
, "");
3107 LLVMValueRef temp1
, temp2
;
3109 interp_el
= LLVMBuildBitCast(ctx
->builder
, interp_el
,
3112 temp1
= LLVMBuildFMul(ctx
->builder
, ddx_el
, src_c0
, "");
3113 temp1
= LLVMBuildFAdd(ctx
->builder
, temp1
, interp_el
, "");
3115 temp2
= LLVMBuildFMul(ctx
->builder
, ddy_el
, src_c1
, "");
3116 temp2
= LLVMBuildFAdd(ctx
->builder
, temp2
, temp1
, "");
3118 ij_out
[i
] = LLVMBuildBitCast(ctx
->builder
,
3119 temp2
, ctx
->i32
, "");
3121 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
3124 intr_name
= interp_param
? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
3125 for (chan
= 0; chan
< 2; chan
++) {
3126 LLVMValueRef args
[4];
3127 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
3129 args
[0] = llvm_chan
;
3130 args
[1] = attr_number
;
3131 args
[2] = ctx
->prim_mask
;
3132 args
[3] = interp_param
;
3133 result
[chan
] = ac_emit_llvm_intrinsic(&ctx
->ac
, intr_name
,
3134 ctx
->f32
, args
, args
[3] ? 4 : 3,
3135 AC_FUNC_ATTR_READNONE
);
3137 return ac_build_gather_values(&ctx
->ac
, result
, 2);
3141 visit_emit_vertex(struct nir_to_llvm_context
*ctx
,
3142 nir_intrinsic_instr
*instr
)
3144 LLVMValueRef gs_next_vertex
;
3145 LLVMValueRef can_emit
, kill
;
3146 LLVMValueRef args
[2];
3149 assert(instr
->const_index
[0] == 0);
3150 /* Write vertex attribute values to GSVS ring */
3151 gs_next_vertex
= LLVMBuildLoad(ctx
->builder
,
3152 ctx
->gs_next_vertex
,
3155 /* If this thread has already emitted the declared maximum number of
3156 * vertices, kill it: excessive vertex emissions are not supposed to
3157 * have any effect, and GS threads have no externally observable
3158 * effects other than emitting vertices.
3160 can_emit
= LLVMBuildICmp(ctx
->builder
, LLVMIntULT
, gs_next_vertex
,
3161 LLVMConstInt(ctx
->i32
, ctx
->gs_max_out_vertices
, false), "");
3163 kill
= LLVMBuildSelect(ctx
->builder
, can_emit
,
3164 LLVMConstReal(ctx
->f32
, 1.0f
),
3165 LLVMConstReal(ctx
->f32
, -1.0f
), "");
3166 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.AMDGPU.kill",
3167 ctx
->voidt
, &kill
, 1, 0);
3169 /* loop num outputs */
3171 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
3172 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
3173 if (!(ctx
->output_mask
& (1ull << i
)))
3176 for (unsigned j
= 0; j
< 4; j
++) {
3177 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
,
3179 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, (idx
* 4 + j
) * ctx
->gs_max_out_vertices
, false);
3180 voffset
= LLVMBuildAdd(ctx
->builder
, voffset
, gs_next_vertex
, "");
3181 voffset
= LLVMBuildMul(ctx
->builder
, voffset
, LLVMConstInt(ctx
->i32
, 4, false), "");
3183 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
3185 build_tbuffer_store(ctx
, ctx
->gsvs_ring
,
3187 voffset
, ctx
->gs2vs_offset
, 0,
3188 V_008F0C_BUF_DATA_FORMAT_32
,
3189 V_008F0C_BUF_NUM_FORMAT_UINT
,
3195 gs_next_vertex
= LLVMBuildAdd(ctx
->builder
, gs_next_vertex
,
3197 LLVMBuildStore(ctx
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
);
3198 args
[0] = LLVMConstInt(ctx
->i32
, SENDMSG_GS_OP_EMIT
| SENDMSG_GS
| (0 << 8), false);
3199 args
[1] = ctx
->gs_wave_id
;
3200 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.sendmsg",
3201 ctx
->voidt
, args
, 2, 0);
3205 visit_end_primitive(struct nir_to_llvm_context
*ctx
,
3206 nir_intrinsic_instr
*instr
)
3208 LLVMValueRef args
[2];
3210 assert(instr
->const_index
[0] == 0);
3211 args
[0] = LLVMConstInt(ctx
->i32
, SENDMSG_GS_OP_CUT
| SENDMSG_GS
| (0 << 8), false);
3212 args
[1] = ctx
->gs_wave_id
;
3214 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.sendmsg", ctx
->voidt
,
3218 static void visit_intrinsic(struct nir_to_llvm_context
*ctx
,
3219 nir_intrinsic_instr
*instr
)
3221 LLVMValueRef result
= NULL
;
3223 switch (instr
->intrinsic
) {
3224 case nir_intrinsic_load_work_group_id
: {
3225 result
= ctx
->workgroup_ids
;
3228 case nir_intrinsic_load_base_vertex
: {
3229 result
= ctx
->base_vertex
;
3232 case nir_intrinsic_load_vertex_id_zero_base
: {
3233 result
= ctx
->vertex_id
;
3236 case nir_intrinsic_load_local_invocation_id
: {
3237 result
= ctx
->local_invocation_ids
;
3240 case nir_intrinsic_load_base_instance
:
3241 result
= ctx
->start_instance
;
3243 case nir_intrinsic_load_invocation_id
:
3244 result
= ctx
->gs_invocation_id
;
3246 case nir_intrinsic_load_primitive_id
:
3247 if (ctx
->stage
== MESA_SHADER_GEOMETRY
)
3248 result
= ctx
->gs_prim_id
;
3250 fprintf(stderr
, "Unknown primitive id intrinsic: %d", ctx
->stage
);
3252 case nir_intrinsic_load_sample_id
:
3253 ctx
->shader_info
->fs
.force_persample
= true;
3254 result
= unpack_param(ctx
, ctx
->ancillary
, 8, 4);
3256 case nir_intrinsic_load_sample_pos
:
3257 ctx
->shader_info
->fs
.force_persample
= true;
3258 result
= load_sample_pos(ctx
);
3260 case nir_intrinsic_load_front_face
:
3261 result
= ctx
->front_face
;
3263 case nir_intrinsic_load_instance_id
:
3264 result
= ctx
->instance_id
;
3265 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
3266 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
3268 case nir_intrinsic_load_num_work_groups
:
3269 result
= ctx
->num_work_groups
;
3271 case nir_intrinsic_load_local_invocation_index
:
3272 result
= visit_load_local_invocation_index(ctx
);
3274 case nir_intrinsic_load_push_constant
:
3275 result
= visit_load_push_constant(ctx
, instr
);
3277 case nir_intrinsic_vulkan_resource_index
:
3278 result
= visit_vulkan_resource_index(ctx
, instr
);
3280 case nir_intrinsic_store_ssbo
:
3281 visit_store_ssbo(ctx
, instr
);
3283 case nir_intrinsic_load_ssbo
:
3284 result
= visit_load_buffer(ctx
, instr
);
3286 case nir_intrinsic_ssbo_atomic_add
:
3287 case nir_intrinsic_ssbo_atomic_imin
:
3288 case nir_intrinsic_ssbo_atomic_umin
:
3289 case nir_intrinsic_ssbo_atomic_imax
:
3290 case nir_intrinsic_ssbo_atomic_umax
:
3291 case nir_intrinsic_ssbo_atomic_and
:
3292 case nir_intrinsic_ssbo_atomic_or
:
3293 case nir_intrinsic_ssbo_atomic_xor
:
3294 case nir_intrinsic_ssbo_atomic_exchange
:
3295 case nir_intrinsic_ssbo_atomic_comp_swap
:
3296 result
= visit_atomic_ssbo(ctx
, instr
);
3298 case nir_intrinsic_load_ubo
:
3299 result
= visit_load_ubo_buffer(ctx
, instr
);
3301 case nir_intrinsic_get_buffer_size
:
3302 result
= visit_get_buffer_size(ctx
, instr
);
3304 case nir_intrinsic_load_var
:
3305 result
= visit_load_var(ctx
, instr
);
3307 case nir_intrinsic_store_var
:
3308 visit_store_var(ctx
, instr
);
3310 case nir_intrinsic_image_load
:
3311 result
= visit_image_load(ctx
, instr
);
3313 case nir_intrinsic_image_store
:
3314 visit_image_store(ctx
, instr
);
3316 case nir_intrinsic_image_atomic_add
:
3317 case nir_intrinsic_image_atomic_min
:
3318 case nir_intrinsic_image_atomic_max
:
3319 case nir_intrinsic_image_atomic_and
:
3320 case nir_intrinsic_image_atomic_or
:
3321 case nir_intrinsic_image_atomic_xor
:
3322 case nir_intrinsic_image_atomic_exchange
:
3323 case nir_intrinsic_image_atomic_comp_swap
:
3324 result
= visit_image_atomic(ctx
, instr
);
3326 case nir_intrinsic_image_size
:
3327 result
= visit_image_size(ctx
, instr
);
3329 case nir_intrinsic_discard
:
3330 ctx
->shader_info
->fs
.can_discard
= true;
3331 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.AMDGPU.kilp",
3335 case nir_intrinsic_discard_if
:
3336 emit_discard_if(ctx
, instr
);
3338 case nir_intrinsic_memory_barrier
:
3341 case nir_intrinsic_barrier
:
3344 case nir_intrinsic_var_atomic_add
:
3345 case nir_intrinsic_var_atomic_imin
:
3346 case nir_intrinsic_var_atomic_umin
:
3347 case nir_intrinsic_var_atomic_imax
:
3348 case nir_intrinsic_var_atomic_umax
:
3349 case nir_intrinsic_var_atomic_and
:
3350 case nir_intrinsic_var_atomic_or
:
3351 case nir_intrinsic_var_atomic_xor
:
3352 case nir_intrinsic_var_atomic_exchange
:
3353 case nir_intrinsic_var_atomic_comp_swap
:
3354 result
= visit_var_atomic(ctx
, instr
);
3356 case nir_intrinsic_interp_var_at_centroid
:
3357 case nir_intrinsic_interp_var_at_sample
:
3358 case nir_intrinsic_interp_var_at_offset
:
3359 result
= visit_interp(ctx
, instr
);
3361 case nir_intrinsic_emit_vertex
:
3362 visit_emit_vertex(ctx
, instr
);
3364 case nir_intrinsic_end_primitive
:
3365 visit_end_primitive(ctx
, instr
);
3368 fprintf(stderr
, "Unknown intrinsic: ");
3369 nir_print_instr(&instr
->instr
, stderr
);
3370 fprintf(stderr
, "\n");
3374 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
3378 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
3379 nir_deref_var
*deref
,
3380 enum desc_type desc_type
)
3382 unsigned desc_set
= deref
->var
->data
.descriptor_set
;
3383 LLVMValueRef list
= ctx
->descriptor_sets
[desc_set
];
3384 struct radv_descriptor_set_layout
*layout
= ctx
->options
->layout
->set
[desc_set
].layout
;
3385 struct radv_descriptor_set_binding_layout
*binding
= layout
->binding
+ deref
->var
->data
.binding
;
3386 unsigned offset
= binding
->offset
;
3387 unsigned stride
= binding
->size
;
3389 LLVMBuilderRef builder
= ctx
->builder
;
3391 LLVMValueRef index
= NULL
;
3393 assert(deref
->var
->data
.binding
< layout
->binding_count
);
3395 switch (desc_type
) {
3407 if (binding
->type
== VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
)
3417 unreachable("invalid desc_type\n");
3420 if (deref
->deref
.child
) {
3421 nir_deref_array
*child
= (nir_deref_array
*)deref
->deref
.child
;
3423 assert(child
->deref_array_type
!= nir_deref_array_type_wildcard
);
3424 offset
+= child
->base_offset
* stride
;
3425 if (child
->deref_array_type
== nir_deref_array_type_indirect
) {
3426 index
= get_src(ctx
, child
->indirect
);
3430 assert(stride
% type_size
== 0);
3433 index
= ctx
->i32zero
;
3435 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, stride
/ type_size
, 0), "");
3437 list
= build_gep0(ctx
, list
, LLVMConstInt(ctx
->i32
, offset
, 0));
3438 list
= LLVMBuildPointerCast(builder
, list
, const_array(type
, 0), "");
3440 return build_indexed_load_const(ctx
, list
, index
);
3443 static void set_tex_fetch_args(struct nir_to_llvm_context
*ctx
,
3444 struct ac_tex_info
*tinfo
,
3445 nir_tex_instr
*instr
,
3447 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
3448 LLVMValueRef
*param
, unsigned count
,
3452 unsigned is_rect
= 0;
3453 bool da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
3455 if (op
== nir_texop_lod
)
3457 /* Pad to power of two vector */
3458 while (count
< util_next_power_of_two(count
))
3459 param
[count
++] = LLVMGetUndef(ctx
->i32
);
3462 tinfo
->args
[0] = ac_build_gather_values(&ctx
->ac
, param
, count
);
3464 tinfo
->args
[0] = param
[0];
3466 tinfo
->args
[1] = res_ptr
;
3469 if (op
== nir_texop_txf
||
3470 op
== nir_texop_txf_ms
||
3471 op
== nir_texop_query_levels
||
3472 op
== nir_texop_texture_samples
||
3473 op
== nir_texop_txs
)
3474 tinfo
->dst_type
= ctx
->v4i32
;
3476 tinfo
->dst_type
= ctx
->v4f32
;
3477 tinfo
->args
[num_args
++] = samp_ptr
;
3480 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
&& op
== nir_texop_txf
) {
3481 tinfo
->args
[0] = res_ptr
;
3482 tinfo
->args
[1] = LLVMConstInt(ctx
->i32
, 0, false);
3483 tinfo
->args
[2] = param
[0];
3484 tinfo
->arg_count
= 3;
3488 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, dmask
, 0);
3489 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, is_rect
, 0); /* unorm */
3490 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* r128 */
3491 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, da
? 1 : 0, 0);
3492 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* glc */
3493 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* slc */
3494 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* tfe */
3495 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* lwe */
3497 tinfo
->arg_count
= num_args
;
3500 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3503 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3504 * filtering manually. The driver sets img7 to a mask clearing
3505 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3506 * s_and_b32 samp0, samp0, img7
3509 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3511 static LLVMValueRef
sici_fix_sampler_aniso(struct nir_to_llvm_context
*ctx
,
3512 LLVMValueRef res
, LLVMValueRef samp
)
3514 LLVMBuilderRef builder
= ctx
->builder
;
3515 LLVMValueRef img7
, samp0
;
3517 if (ctx
->options
->chip_class
>= VI
)
3520 img7
= LLVMBuildExtractElement(builder
, res
,
3521 LLVMConstInt(ctx
->i32
, 7, 0), "");
3522 samp0
= LLVMBuildExtractElement(builder
, samp
,
3523 LLVMConstInt(ctx
->i32
, 0, 0), "");
3524 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
3525 return LLVMBuildInsertElement(builder
, samp
, samp0
,
3526 LLVMConstInt(ctx
->i32
, 0, 0), "");
3529 static void tex_fetch_ptrs(struct nir_to_llvm_context
*ctx
,
3530 nir_tex_instr
*instr
,
3531 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
,
3532 LLVMValueRef
*fmask_ptr
)
3534 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
)
3535 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_BUFFER
);
3537 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_IMAGE
);
3540 *samp_ptr
= get_sampler_desc(ctx
, instr
->sampler
, DESC_SAMPLER
);
3542 *samp_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_SAMPLER
);
3543 if (instr
->sampler_dim
< GLSL_SAMPLER_DIM_RECT
)
3544 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
3546 if (fmask_ptr
&& !instr
->sampler
&& (instr
->op
== nir_texop_txf_ms
||
3547 instr
->op
== nir_texop_samples_identical
))
3548 *fmask_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_FMASK
);
3551 static LLVMValueRef
apply_round_slice(struct nir_to_llvm_context
*ctx
,
3554 coord
= to_float(ctx
, coord
);
3555 coord
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.rint.f32", ctx
->f32
, &coord
, 1, 0);
3556 coord
= to_integer(ctx
, coord
);
3560 static void visit_tex(struct nir_to_llvm_context
*ctx
, nir_tex_instr
*instr
)
3562 LLVMValueRef result
= NULL
;
3563 struct ac_tex_info tinfo
= { 0 };
3564 unsigned dmask
= 0xf;
3565 LLVMValueRef address
[16];
3566 LLVMValueRef coords
[5];
3567 LLVMValueRef coord
= NULL
, lod
= NULL
, comparator
= NULL
;
3568 LLVMValueRef bias
= NULL
, offsets
= NULL
;
3569 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
, sample_index
= NULL
;
3570 LLVMValueRef ddx
= NULL
, ddy
= NULL
;
3571 LLVMValueRef derivs
[6];
3572 unsigned chan
, count
= 0;
3573 unsigned const_src
= 0, num_deriv_comp
= 0;
3575 tex_fetch_ptrs(ctx
, instr
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
3577 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
3578 switch (instr
->src
[i
].src_type
) {
3579 case nir_tex_src_coord
:
3580 coord
= get_src(ctx
, instr
->src
[i
].src
);
3582 case nir_tex_src_projector
:
3584 case nir_tex_src_comparator
:
3585 comparator
= get_src(ctx
, instr
->src
[i
].src
);
3587 case nir_tex_src_offset
:
3588 offsets
= get_src(ctx
, instr
->src
[i
].src
);
3591 case nir_tex_src_bias
:
3592 bias
= get_src(ctx
, instr
->src
[i
].src
);
3594 case nir_tex_src_lod
:
3595 lod
= get_src(ctx
, instr
->src
[i
].src
);
3597 case nir_tex_src_ms_index
:
3598 sample_index
= get_src(ctx
, instr
->src
[i
].src
);
3600 case nir_tex_src_ms_mcs
:
3602 case nir_tex_src_ddx
:
3603 ddx
= get_src(ctx
, instr
->src
[i
].src
);
3604 num_deriv_comp
= instr
->src
[i
].src
.ssa
->num_components
;
3606 case nir_tex_src_ddy
:
3607 ddy
= get_src(ctx
, instr
->src
[i
].src
);
3609 case nir_tex_src_texture_offset
:
3610 case nir_tex_src_sampler_offset
:
3611 case nir_tex_src_plane
:
3617 if (instr
->op
== nir_texop_txs
&& instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
3618 result
= get_buffer_size(ctx
, res_ptr
, false);
3622 if (instr
->op
== nir_texop_texture_samples
) {
3623 LLVMValueRef res
, samples
, is_msaa
;
3624 res
= LLVMBuildBitCast(ctx
->builder
, res_ptr
, ctx
->v8i32
, "");
3625 samples
= LLVMBuildExtractElement(ctx
->builder
, res
,
3626 LLVMConstInt(ctx
->i32
, 3, false), "");
3627 is_msaa
= LLVMBuildLShr(ctx
->builder
, samples
,
3628 LLVMConstInt(ctx
->i32
, 28, false), "");
3629 is_msaa
= LLVMBuildAnd(ctx
->builder
, is_msaa
,
3630 LLVMConstInt(ctx
->i32
, 0xe, false), "");
3631 is_msaa
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, is_msaa
,
3632 LLVMConstInt(ctx
->i32
, 0xe, false), "");
3634 samples
= LLVMBuildLShr(ctx
->builder
, samples
,
3635 LLVMConstInt(ctx
->i32
, 16, false), "");
3636 samples
= LLVMBuildAnd(ctx
->builder
, samples
,
3637 LLVMConstInt(ctx
->i32
, 0xf, false), "");
3638 samples
= LLVMBuildShl(ctx
->builder
, ctx
->i32one
,
3640 samples
= LLVMBuildSelect(ctx
->builder
, is_msaa
, samples
,
3647 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
3648 coords
[chan
] = llvm_extract_elem(ctx
, coord
, chan
);
3650 if (offsets
&& instr
->op
!= nir_texop_txf
) {
3651 LLVMValueRef offset
[3], pack
;
3652 for (chan
= 0; chan
< 3; ++chan
)
3653 offset
[chan
] = ctx
->i32zero
;
3655 tinfo
.has_offset
= true;
3656 for (chan
= 0; chan
< get_llvm_num_components(offsets
); chan
++) {
3657 offset
[chan
] = llvm_extract_elem(ctx
, offsets
, chan
);
3658 offset
[chan
] = LLVMBuildAnd(ctx
->builder
, offset
[chan
],
3659 LLVMConstInt(ctx
->i32
, 0x3f, false), "");
3661 offset
[chan
] = LLVMBuildShl(ctx
->builder
, offset
[chan
],
3662 LLVMConstInt(ctx
->i32
, chan
* 8, false), "");
3664 pack
= LLVMBuildOr(ctx
->builder
, offset
[0], offset
[1], "");
3665 pack
= LLVMBuildOr(ctx
->builder
, pack
, offset
[2], "");
3666 address
[count
++] = pack
;
3669 /* pack LOD bias value */
3670 if (instr
->op
== nir_texop_txb
&& bias
) {
3671 address
[count
++] = bias
;
3674 /* Pack depth comparison value */
3675 if (instr
->is_shadow
&& comparator
) {
3676 address
[count
++] = llvm_extract_elem(ctx
, comparator
, 0);
3679 /* pack derivatives */
3681 switch (instr
->sampler_dim
) {
3682 case GLSL_SAMPLER_DIM_3D
:
3683 case GLSL_SAMPLER_DIM_CUBE
:
3686 case GLSL_SAMPLER_DIM_2D
:
3690 case GLSL_SAMPLER_DIM_1D
:
3695 for (unsigned i
= 0; i
< num_deriv_comp
; i
++) {
3696 derivs
[i
* 2] = to_float(ctx
, llvm_extract_elem(ctx
, ddx
, i
));
3697 derivs
[i
* 2 + 1] = to_float(ctx
, llvm_extract_elem(ctx
, ddy
, i
));
3701 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&& coord
) {
3702 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
3703 coords
[chan
] = to_float(ctx
, coords
[chan
]);
3704 if (instr
->coord_components
== 3)
3705 coords
[3] = LLVMGetUndef(ctx
->f32
);
3706 ac_prepare_cube_coords(&ctx
->ac
,
3707 instr
->op
== nir_texop_txd
, instr
->is_array
,
3714 for (unsigned i
= 0; i
< num_deriv_comp
* 2; i
++)
3715 address
[count
++] = derivs
[i
];
3718 /* Pack texture coordinates */
3720 address
[count
++] = coords
[0];
3721 if (instr
->coord_components
> 1) {
3722 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_1D
&& instr
->is_array
&& instr
->op
!= nir_texop_txf
) {
3723 coords
[1] = apply_round_slice(ctx
, coords
[1]);
3725 address
[count
++] = coords
[1];
3727 if (instr
->coord_components
> 2) {
3728 /* This seems like a bit of a hack - but it passes Vulkan CTS with it */
3729 if (instr
->sampler_dim
!= GLSL_SAMPLER_DIM_3D
&& instr
->op
!= nir_texop_txf
) {
3730 coords
[2] = apply_round_slice(ctx
, coords
[2]);
3732 address
[count
++] = coords
[2];
3737 if ((instr
->op
== nir_texop_txl
|| instr
->op
== nir_texop_txf
) && lod
) {
3738 address
[count
++] = lod
;
3739 } else if (instr
->op
== nir_texop_txf_ms
&& sample_index
) {
3740 address
[count
++] = sample_index
;
3741 } else if(instr
->op
== nir_texop_txs
) {
3744 address
[count
++] = lod
;
3746 address
[count
++] = ctx
->i32zero
;
3749 for (chan
= 0; chan
< count
; chan
++) {
3750 address
[chan
] = LLVMBuildBitCast(ctx
->builder
,
3751 address
[chan
], ctx
->i32
, "");
3754 if (instr
->op
== nir_texop_samples_identical
) {
3755 LLVMValueRef txf_address
[4];
3756 struct ac_tex_info txf_info
= { 0 };
3757 unsigned txf_count
= count
;
3758 memcpy(txf_address
, address
, sizeof(txf_address
));
3760 if (!instr
->is_array
)
3761 txf_address
[2] = ctx
->i32zero
;
3762 txf_address
[3] = ctx
->i32zero
;
3764 set_tex_fetch_args(ctx
, &txf_info
, instr
, nir_texop_txf
,
3766 txf_address
, txf_count
, 0xf);
3768 result
= build_tex_intrinsic(ctx
, instr
, &txf_info
);
3770 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
3771 result
= emit_int_cmp(ctx
, LLVMIntEQ
, result
, ctx
->i32zero
);
3775 /* Adjust the sample index according to FMASK.
3777 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3778 * which is the identity mapping. Each nibble says which physical sample
3779 * should be fetched to get that sample.
3781 * For example, 0x11111100 means there are only 2 samples stored and
3782 * the second sample covers 3/4 of the pixel. When reading samples 0
3783 * and 1, return physical sample 0 (determined by the first two 0s
3784 * in FMASK), otherwise return physical sample 1.
3786 * The sample index should be adjusted as follows:
3787 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
3789 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
) {
3790 LLVMValueRef txf_address
[4];
3791 struct ac_tex_info txf_info
= { 0 };
3792 unsigned txf_count
= count
;
3793 memcpy(txf_address
, address
, sizeof(txf_address
));
3795 if (!instr
->is_array
)
3796 txf_address
[2] = ctx
->i32zero
;
3797 txf_address
[3] = ctx
->i32zero
;
3799 set_tex_fetch_args(ctx
, &txf_info
, instr
, nir_texop_txf
,
3801 txf_address
, txf_count
, 0xf);
3803 result
= build_tex_intrinsic(ctx
, instr
, &txf_info
);
3804 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, false);
3805 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xf, false);
3807 LLVMValueRef fmask
= LLVMBuildExtractElement(ctx
->builder
,
3811 unsigned sample_chan
= instr
->is_array
? 3 : 2;
3813 LLVMValueRef sample_index4
=
3814 LLVMBuildMul(ctx
->builder
, address
[sample_chan
], four
, "");
3815 LLVMValueRef shifted_fmask
=
3816 LLVMBuildLShr(ctx
->builder
, fmask
, sample_index4
, "");
3817 LLVMValueRef final_sample
=
3818 LLVMBuildAnd(ctx
->builder
, shifted_fmask
, F
, "");
3820 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3821 * resource descriptor is 0 (invalid),
3823 LLVMValueRef fmask_desc
=
3824 LLVMBuildBitCast(ctx
->builder
, fmask_ptr
,
3827 LLVMValueRef fmask_word1
=
3828 LLVMBuildExtractElement(ctx
->builder
, fmask_desc
,
3831 LLVMValueRef word1_is_nonzero
=
3832 LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
3833 fmask_word1
, ctx
->i32zero
, "");
3835 /* Replace the MSAA sample index. */
3836 address
[sample_chan
] =
3837 LLVMBuildSelect(ctx
->builder
, word1_is_nonzero
,
3838 final_sample
, address
[sample_chan
], "");
3841 if (offsets
&& instr
->op
== nir_texop_txf
) {
3842 nir_const_value
*const_offset
=
3843 nir_src_as_const_value(instr
->src
[const_src
].src
);
3844 int num_offsets
= instr
->src
[const_src
].src
.ssa
->num_components
;
3845 assert(const_offset
);
3846 num_offsets
= MIN2(num_offsets
, instr
->coord_components
);
3847 if (num_offsets
> 2)
3848 address
[2] = LLVMBuildAdd(ctx
->builder
,
3849 address
[2], LLVMConstInt(ctx
->i32
, const_offset
->i32
[2], false), "");
3850 if (num_offsets
> 1)
3851 address
[1] = LLVMBuildAdd(ctx
->builder
,
3852 address
[1], LLVMConstInt(ctx
->i32
, const_offset
->i32
[1], false), "");
3853 address
[0] = LLVMBuildAdd(ctx
->builder
,
3854 address
[0], LLVMConstInt(ctx
->i32
, const_offset
->i32
[0], false), "");
3858 /* TODO TG4 support */
3859 if (instr
->op
== nir_texop_tg4
) {
3860 if (instr
->is_shadow
)
3863 dmask
= 1 << instr
->component
;
3865 set_tex_fetch_args(ctx
, &tinfo
, instr
, instr
->op
,
3866 res_ptr
, samp_ptr
, address
, count
, dmask
);
3868 result
= build_tex_intrinsic(ctx
, instr
, &tinfo
);
3870 if (instr
->op
== nir_texop_query_levels
)
3871 result
= LLVMBuildExtractElement(ctx
->builder
, result
, LLVMConstInt(ctx
->i32
, 3, false), "");
3872 else if (instr
->is_shadow
&& instr
->op
!= nir_texop_txs
&& instr
->op
!= nir_texop_lod
&& instr
->op
!= nir_texop_tg4
)
3873 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
3874 else if (instr
->op
== nir_texop_txs
&&
3875 instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&&
3877 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
3878 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
3879 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, result
, two
, "");
3880 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
3881 result
= LLVMBuildInsertElement(ctx
->builder
, result
, z
, two
, "");
3882 } else if (instr
->dest
.ssa
.num_components
!= 4)
3883 result
= trim_vector(ctx
, result
, instr
->dest
.ssa
.num_components
);
3887 assert(instr
->dest
.is_ssa
);
3888 result
= to_integer(ctx
, result
);
3889 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
3894 static void visit_phi(struct nir_to_llvm_context
*ctx
, nir_phi_instr
*instr
)
3896 LLVMTypeRef type
= get_def_type(ctx
, &instr
->dest
.ssa
);
3897 LLVMValueRef result
= LLVMBuildPhi(ctx
->builder
, type
, "");
3899 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
3900 _mesa_hash_table_insert(ctx
->phis
, instr
, result
);
3903 static void visit_post_phi(struct nir_to_llvm_context
*ctx
,
3904 nir_phi_instr
*instr
,
3905 LLVMValueRef llvm_phi
)
3907 nir_foreach_phi_src(src
, instr
) {
3908 LLVMBasicBlockRef block
= get_block(ctx
, src
->pred
);
3909 LLVMValueRef llvm_src
= get_src(ctx
, src
->src
);
3911 LLVMAddIncoming(llvm_phi
, &llvm_src
, &block
, 1);
3915 static void phi_post_pass(struct nir_to_llvm_context
*ctx
)
3917 struct hash_entry
*entry
;
3918 hash_table_foreach(ctx
->phis
, entry
) {
3919 visit_post_phi(ctx
, (nir_phi_instr
*)entry
->key
,
3920 (LLVMValueRef
)entry
->data
);
3925 static void visit_ssa_undef(struct nir_to_llvm_context
*ctx
,
3926 nir_ssa_undef_instr
*instr
)
3928 unsigned num_components
= instr
->def
.num_components
;
3931 if (num_components
== 1)
3932 undef
= LLVMGetUndef(ctx
->i32
);
3934 undef
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, num_components
));
3936 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, undef
);
3939 static void visit_jump(struct nir_to_llvm_context
*ctx
,
3940 nir_jump_instr
*instr
)
3942 switch (instr
->type
) {
3943 case nir_jump_break
:
3944 LLVMBuildBr(ctx
->builder
, ctx
->break_block
);
3945 LLVMClearInsertionPosition(ctx
->builder
);
3947 case nir_jump_continue
:
3948 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
3949 LLVMClearInsertionPosition(ctx
->builder
);
3952 fprintf(stderr
, "Unknown NIR jump instr: ");
3953 nir_print_instr(&instr
->instr
, stderr
);
3954 fprintf(stderr
, "\n");
3959 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
3960 struct exec_list
*list
);
3962 static void visit_block(struct nir_to_llvm_context
*ctx
, nir_block
*block
)
3964 LLVMBasicBlockRef llvm_block
= LLVMGetInsertBlock(ctx
->builder
);
3965 nir_foreach_instr(instr
, block
)
3967 switch (instr
->type
) {
3968 case nir_instr_type_alu
:
3969 visit_alu(ctx
, nir_instr_as_alu(instr
));
3971 case nir_instr_type_load_const
:
3972 visit_load_const(ctx
, nir_instr_as_load_const(instr
));
3974 case nir_instr_type_intrinsic
:
3975 visit_intrinsic(ctx
, nir_instr_as_intrinsic(instr
));
3977 case nir_instr_type_tex
:
3978 visit_tex(ctx
, nir_instr_as_tex(instr
));
3980 case nir_instr_type_phi
:
3981 visit_phi(ctx
, nir_instr_as_phi(instr
));
3983 case nir_instr_type_ssa_undef
:
3984 visit_ssa_undef(ctx
, nir_instr_as_ssa_undef(instr
));
3986 case nir_instr_type_jump
:
3987 visit_jump(ctx
, nir_instr_as_jump(instr
));
3990 fprintf(stderr
, "Unknown NIR instr type: ");
3991 nir_print_instr(instr
, stderr
);
3992 fprintf(stderr
, "\n");
3997 _mesa_hash_table_insert(ctx
->defs
, block
, llvm_block
);
4000 static void visit_if(struct nir_to_llvm_context
*ctx
, nir_if
*if_stmt
)
4002 LLVMValueRef value
= get_src(ctx
, if_stmt
->condition
);
4004 LLVMBasicBlockRef merge_block
=
4005 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4006 LLVMBasicBlockRef if_block
=
4007 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4008 LLVMBasicBlockRef else_block
= merge_block
;
4009 if (!exec_list_is_empty(&if_stmt
->else_list
))
4010 else_block
= LLVMAppendBasicBlockInContext(
4011 ctx
->context
, ctx
->main_function
, "");
4013 LLVMValueRef cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, value
,
4014 LLVMConstInt(ctx
->i32
, 0, false), "");
4015 LLVMBuildCondBr(ctx
->builder
, cond
, if_block
, else_block
);
4017 LLVMPositionBuilderAtEnd(ctx
->builder
, if_block
);
4018 visit_cf_list(ctx
, &if_stmt
->then_list
);
4019 if (LLVMGetInsertBlock(ctx
->builder
))
4020 LLVMBuildBr(ctx
->builder
, merge_block
);
4022 if (!exec_list_is_empty(&if_stmt
->else_list
)) {
4023 LLVMPositionBuilderAtEnd(ctx
->builder
, else_block
);
4024 visit_cf_list(ctx
, &if_stmt
->else_list
);
4025 if (LLVMGetInsertBlock(ctx
->builder
))
4026 LLVMBuildBr(ctx
->builder
, merge_block
);
4029 LLVMPositionBuilderAtEnd(ctx
->builder
, merge_block
);
4032 static void visit_loop(struct nir_to_llvm_context
*ctx
, nir_loop
*loop
)
4034 LLVMBasicBlockRef continue_parent
= ctx
->continue_block
;
4035 LLVMBasicBlockRef break_parent
= ctx
->break_block
;
4037 ctx
->continue_block
=
4038 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4040 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4042 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4043 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->continue_block
);
4044 visit_cf_list(ctx
, &loop
->body
);
4046 if (LLVMGetInsertBlock(ctx
->builder
))
4047 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4048 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->break_block
);
4050 ctx
->continue_block
= continue_parent
;
4051 ctx
->break_block
= break_parent
;
4054 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
4055 struct exec_list
*list
)
4057 foreach_list_typed(nir_cf_node
, node
, node
, list
)
4059 switch (node
->type
) {
4060 case nir_cf_node_block
:
4061 visit_block(ctx
, nir_cf_node_as_block(node
));
4064 case nir_cf_node_if
:
4065 visit_if(ctx
, nir_cf_node_as_if(node
));
4068 case nir_cf_node_loop
:
4069 visit_loop(ctx
, nir_cf_node_as_loop(node
));
4079 handle_vs_input_decl(struct nir_to_llvm_context
*ctx
,
4080 struct nir_variable
*variable
)
4082 LLVMValueRef t_list_ptr
= ctx
->vertex_buffers
;
4083 LLVMValueRef t_offset
;
4084 LLVMValueRef t_list
;
4085 LLVMValueRef args
[3];
4087 LLVMValueRef buffer_index
;
4088 int index
= variable
->data
.location
- VERT_ATTRIB_GENERIC0
;
4089 int idx
= variable
->data
.location
;
4090 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, true);
4092 variable
->data
.driver_location
= idx
* 4;
4094 if (ctx
->options
->key
.vs
.instance_rate_inputs
& (1u << index
)) {
4095 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->instance_id
,
4096 ctx
->start_instance
, "");
4097 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
4098 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
4100 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->vertex_id
,
4101 ctx
->base_vertex
, "");
4103 for (unsigned i
= 0; i
< attrib_count
; ++i
, ++idx
) {
4104 t_offset
= LLVMConstInt(ctx
->i32
, index
+ i
, false);
4106 t_list
= build_indexed_load_const(ctx
, t_list_ptr
, t_offset
);
4108 args
[1] = LLVMConstInt(ctx
->i32
, 0, false);
4109 args
[2] = buffer_index
;
4110 input
= ac_emit_llvm_intrinsic(&ctx
->ac
,
4111 "llvm.SI.vs.load.input", ctx
->v4f32
, args
, 3,
4112 AC_FUNC_ATTR_READNONE
| AC_FUNC_ATTR_NOUNWIND
);
4114 for (unsigned chan
= 0; chan
< 4; chan
++) {
4115 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4116 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
, chan
)] =
4117 to_integer(ctx
, LLVMBuildExtractElement(ctx
->builder
,
4118 input
, llvm_chan
, ""));
4124 static void interp_fs_input(struct nir_to_llvm_context
*ctx
,
4126 LLVMValueRef interp_param
,
4127 LLVMValueRef prim_mask
,
4128 LLVMValueRef result
[4])
4130 const char *intr_name
;
4131 LLVMValueRef attr_number
;
4134 attr_number
= LLVMConstInt(ctx
->i32
, attr
, false);
4136 /* fs.constant returns the param from the middle vertex, so it's not
4137 * really useful for flat shading. It's meant to be used for custom
4138 * interpolation (but the intrinsic can't fetch from the other two
4141 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
4142 * to do the right thing. The only reason we use fs.constant is that
4143 * fs.interp cannot be used on integers, because they can be equal
4146 intr_name
= interp_param
? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
4148 for (chan
= 0; chan
< 4; chan
++) {
4149 LLVMValueRef args
[4];
4150 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4152 args
[0] = llvm_chan
;
4153 args
[1] = attr_number
;
4154 args
[2] = prim_mask
;
4155 args
[3] = interp_param
;
4156 result
[chan
] = ac_emit_llvm_intrinsic(&ctx
->ac
, intr_name
,
4157 ctx
->f32
, args
, args
[3] ? 4 : 3,
4158 AC_FUNC_ATTR_READNONE
| AC_FUNC_ATTR_NOUNWIND
);
4163 handle_fs_input_decl(struct nir_to_llvm_context
*ctx
,
4164 struct nir_variable
*variable
)
4166 int idx
= variable
->data
.location
;
4167 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4168 LLVMValueRef interp
;
4170 variable
->data
.driver_location
= idx
* 4;
4171 ctx
->input_mask
|= ((1ull << attrib_count
) - 1) << variable
->data
.location
;
4173 if (glsl_get_base_type(glsl_without_array(variable
->type
)) == GLSL_TYPE_FLOAT
) {
4174 unsigned interp_type
;
4175 if (variable
->data
.sample
) {
4176 interp_type
= INTERP_SAMPLE
;
4177 ctx
->shader_info
->fs
.force_persample
= true;
4178 } else if (variable
->data
.centroid
)
4179 interp_type
= INTERP_CENTROID
;
4181 interp_type
= INTERP_CENTER
;
4183 interp
= lookup_interp_param(ctx
, variable
->data
.interpolation
, interp_type
);
4187 for (unsigned i
= 0; i
< attrib_count
; ++i
)
4188 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
+ i
, 0)] = interp
;
4193 handle_shader_input_decl(struct nir_to_llvm_context
*ctx
,
4194 struct nir_variable
*variable
)
4196 switch (ctx
->stage
) {
4197 case MESA_SHADER_VERTEX
:
4198 handle_vs_input_decl(ctx
, variable
);
4200 case MESA_SHADER_FRAGMENT
:
4201 handle_fs_input_decl(ctx
, variable
);
4210 handle_fs_inputs_pre(struct nir_to_llvm_context
*ctx
,
4211 struct nir_shader
*nir
)
4214 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_INPUTS
; ++i
) {
4215 LLVMValueRef interp_param
;
4216 LLVMValueRef
*inputs
= ctx
->inputs
+radeon_llvm_reg_index_soa(i
, 0);
4218 if (!(ctx
->input_mask
& (1ull << i
)))
4221 if (i
>= VARYING_SLOT_VAR0
|| i
== VARYING_SLOT_PNTC
||
4222 i
== VARYING_SLOT_PRIMITIVE_ID
|| i
== VARYING_SLOT_LAYER
) {
4223 interp_param
= *inputs
;
4224 interp_fs_input(ctx
, index
, interp_param
, ctx
->prim_mask
,
4228 ctx
->shader_info
->fs
.flat_shaded_mask
|= 1u << index
;
4230 } else if (i
== VARYING_SLOT_POS
) {
4231 for(int i
= 0; i
< 3; ++i
)
4232 inputs
[i
] = ctx
->frag_pos
[i
];
4234 inputs
[3] = ac_emit_fdiv(&ctx
->ac
, ctx
->f32one
, ctx
->frag_pos
[3]);
4237 ctx
->shader_info
->fs
.num_interp
= index
;
4238 if (ctx
->input_mask
& (1 << VARYING_SLOT_PNTC
))
4239 ctx
->shader_info
->fs
.has_pcoord
= true;
4240 if (ctx
->input_mask
& (1 << VARYING_SLOT_PRIMITIVE_ID
))
4241 ctx
->shader_info
->fs
.prim_id_input
= true;
4242 if (ctx
->input_mask
& (1 << VARYING_SLOT_LAYER
))
4243 ctx
->shader_info
->fs
.layer_input
= true;
4244 ctx
->shader_info
->fs
.input_mask
= ctx
->input_mask
>> VARYING_SLOT_VAR0
;
4248 ac_build_alloca(struct nir_to_llvm_context
*ctx
,
4252 LLVMBuilderRef builder
= ctx
->builder
;
4253 LLVMBasicBlockRef current_block
= LLVMGetInsertBlock(builder
);
4254 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
4255 LLVMBasicBlockRef first_block
= LLVMGetEntryBasicBlock(function
);
4256 LLVMValueRef first_instr
= LLVMGetFirstInstruction(first_block
);
4257 LLVMBuilderRef first_builder
= LLVMCreateBuilderInContext(ctx
->context
);
4261 LLVMPositionBuilderBefore(first_builder
, first_instr
);
4263 LLVMPositionBuilderAtEnd(first_builder
, first_block
);
4266 res
= LLVMBuildAlloca(first_builder
, type
, name
);
4267 LLVMBuildStore(builder
, LLVMConstNull(type
), res
);
4269 LLVMDisposeBuilder(first_builder
);
4274 static LLVMValueRef
si_build_alloca_undef(struct nir_to_llvm_context
*ctx
,
4278 LLVMValueRef ptr
= ac_build_alloca(ctx
, type
, name
);
4279 LLVMBuildStore(ctx
->builder
, LLVMGetUndef(type
), ptr
);
4284 handle_shader_output_decl(struct nir_to_llvm_context
*ctx
,
4285 struct nir_variable
*variable
)
4287 int idx
= variable
->data
.location
+ variable
->data
.index
;
4288 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4290 variable
->data
.driver_location
= idx
* 4;
4292 if (ctx
->stage
== MESA_SHADER_VERTEX
) {
4294 if (idx
== VARYING_SLOT_CLIP_DIST0
||
4295 idx
== VARYING_SLOT_CULL_DIST0
) {
4296 int length
= glsl_get_length(variable
->type
);
4297 if (idx
== VARYING_SLOT_CLIP_DIST0
) {
4298 ctx
->shader_info
->vs
.clip_dist_mask
= (1 << length
) - 1;
4299 ctx
->num_clips
= length
;
4300 } else if (idx
== VARYING_SLOT_CULL_DIST0
) {
4301 ctx
->shader_info
->vs
.cull_dist_mask
= (1 << length
) - 1;
4302 ctx
->num_culls
= length
;
4311 for (unsigned i
= 0; i
< attrib_count
; ++i
) {
4312 for (unsigned chan
= 0; chan
< 4; chan
++) {
4313 ctx
->outputs
[radeon_llvm_reg_index_soa(idx
+ i
, chan
)] =
4314 si_build_alloca_undef(ctx
, ctx
->f32
, "");
4317 ctx
->output_mask
|= ((1ull << attrib_count
) - 1) << idx
;
4321 setup_locals(struct nir_to_llvm_context
*ctx
,
4322 struct nir_function
*func
)
4325 ctx
->num_locals
= 0;
4326 nir_foreach_variable(variable
, &func
->impl
->locals
) {
4327 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4328 variable
->data
.driver_location
= ctx
->num_locals
* 4;
4329 ctx
->num_locals
+= attrib_count
;
4331 ctx
->locals
= malloc(4 * ctx
->num_locals
* sizeof(LLVMValueRef
));
4335 for (i
= 0; i
< ctx
->num_locals
; i
++) {
4336 for (j
= 0; j
< 4; j
++) {
4337 ctx
->locals
[i
* 4 + j
] =
4338 si_build_alloca_undef(ctx
, ctx
->f32
, "temp");
4344 emit_float_saturate(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
, float lo
, float hi
)
4346 v
= to_float(ctx
, v
);
4347 v
= emit_intrin_2f_param(ctx
, "llvm.maxnum.f32", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, lo
));
4348 return emit_intrin_2f_param(ctx
, "llvm.minnum.f32", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, hi
));
4352 static LLVMValueRef
emit_pack_int16(struct nir_to_llvm_context
*ctx
,
4353 LLVMValueRef src0
, LLVMValueRef src1
)
4355 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
4356 LLVMValueRef comp
[2];
4358 comp
[0] = LLVMBuildAnd(ctx
->builder
, src0
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4359 comp
[1] = LLVMBuildAnd(ctx
->builder
, src1
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4360 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
4361 return LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
4364 /* Initialize arguments for the shader export intrinsic */
4366 si_llvm_init_export_args(struct nir_to_llvm_context
*ctx
,
4367 LLVMValueRef
*values
,
4371 /* Default is 0xf. Adjusted below depending on the format. */
4372 args
[0] = LLVMConstInt(ctx
->i32
, target
!= V_008DFC_SQ_EXP_NULL
? 0xf : 0, false);
4373 /* Specify whether the EXEC mask represents the valid mask */
4374 args
[1] = LLVMConstInt(ctx
->i32
, 0, false);
4376 /* Specify whether this is the last export */
4377 args
[2] = LLVMConstInt(ctx
->i32
, 0, false);
4378 /* Specify the target we are exporting */
4379 args
[3] = LLVMConstInt(ctx
->i32
, target
, false);
4381 args
[4] = LLVMConstInt(ctx
->i32
, 0, false); /* COMPR flag */
4382 args
[5] = LLVMGetUndef(ctx
->f32
);
4383 args
[6] = LLVMGetUndef(ctx
->f32
);
4384 args
[7] = LLVMGetUndef(ctx
->f32
);
4385 args
[8] = LLVMGetUndef(ctx
->f32
);
4390 if (ctx
->stage
== MESA_SHADER_FRAGMENT
&& target
>= V_008DFC_SQ_EXP_MRT
) {
4391 LLVMValueRef val
[4];
4392 unsigned index
= target
- V_008DFC_SQ_EXP_MRT
;
4393 unsigned col_format
= (ctx
->options
->key
.fs
.col_format
>> (4 * index
)) & 0xf;
4394 bool is_int8
= (ctx
->options
->key
.fs
.is_int8
>> index
) & 1;
4396 switch(col_format
) {
4397 case V_028714_SPI_SHADER_ZERO
:
4398 args
[0] = LLVMConstInt(ctx
->i32
, 0x0, 0);
4399 args
[3] = LLVMConstInt(ctx
->i32
, V_008DFC_SQ_EXP_NULL
, 0);
4402 case V_028714_SPI_SHADER_32_R
:
4403 args
[0] = LLVMConstInt(ctx
->i32
, 0x1, 0);
4404 args
[5] = values
[0];
4407 case V_028714_SPI_SHADER_32_GR
:
4408 args
[0] = LLVMConstInt(ctx
->i32
, 0x3, 0);
4409 args
[5] = values
[0];
4410 args
[6] = values
[1];
4413 case V_028714_SPI_SHADER_32_AR
:
4414 args
[0] = LLVMConstInt(ctx
->i32
, 0x9, 0);
4415 args
[5] = values
[0];
4416 args
[8] = values
[3];
4419 case V_028714_SPI_SHADER_FP16_ABGR
:
4420 args
[4] = ctx
->i32one
;
4422 for (unsigned chan
= 0; chan
< 2; chan
++) {
4423 LLVMValueRef pack_args
[2] = {
4425 values
[2 * chan
+ 1]
4427 LLVMValueRef packed
;
4429 packed
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.packf16",
4430 ctx
->i32
, pack_args
, 2,
4431 AC_FUNC_ATTR_READNONE
);
4432 args
[chan
+ 5] = packed
;
4436 case V_028714_SPI_SHADER_UNORM16_ABGR
:
4437 for (unsigned chan
= 0; chan
< 4; chan
++) {
4438 val
[chan
] = emit_float_saturate(ctx
, values
[chan
], 0, 1);
4439 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
4440 LLVMConstReal(ctx
->f32
, 65535), "");
4441 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
4442 LLVMConstReal(ctx
->f32
, 0.5), "");
4443 val
[chan
] = LLVMBuildFPToUI(ctx
->builder
, val
[chan
],
4447 args
[4] = ctx
->i32one
;
4448 args
[5] = emit_pack_int16(ctx
, val
[0], val
[1]);
4449 args
[6] = emit_pack_int16(ctx
, val
[2], val
[3]);
4452 case V_028714_SPI_SHADER_SNORM16_ABGR
:
4453 for (unsigned chan
= 0; chan
< 4; chan
++) {
4454 val
[chan
] = emit_float_saturate(ctx
, values
[chan
], -1, 1);
4455 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
4456 LLVMConstReal(ctx
->f32
, 32767), "");
4458 /* If positive, add 0.5, else add -0.5. */
4459 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
4460 LLVMBuildSelect(ctx
->builder
,
4461 LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
,
4462 val
[chan
], ctx
->f32zero
, ""),
4463 LLVMConstReal(ctx
->f32
, 0.5),
4464 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
4465 val
[chan
] = LLVMBuildFPToSI(ctx
->builder
, val
[chan
], ctx
->i32
, "");
4468 args
[4] = ctx
->i32one
;
4469 args
[5] = emit_pack_int16(ctx
, val
[0], val
[1]);
4470 args
[6] = emit_pack_int16(ctx
, val
[2], val
[3]);
4473 case V_028714_SPI_SHADER_UINT16_ABGR
: {
4474 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 255 : 65535, 0);
4476 for (unsigned chan
= 0; chan
< 4; chan
++) {
4477 val
[chan
] = to_integer(ctx
, values
[chan
]);
4478 val
[chan
] = emit_minmax_int(ctx
, LLVMIntULT
, val
[chan
], max
);
4481 args
[4] = ctx
->i32one
;
4482 args
[5] = emit_pack_int16(ctx
, val
[0], val
[1]);
4483 args
[6] = emit_pack_int16(ctx
, val
[2], val
[3]);
4487 case V_028714_SPI_SHADER_SINT16_ABGR
: {
4488 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 127 : 32767, 0);
4489 LLVMValueRef min
= LLVMConstInt(ctx
->i32
, is_int8
? -128 : -32768, 0);
4492 for (unsigned chan
= 0; chan
< 4; chan
++) {
4493 val
[chan
] = to_integer(ctx
, values
[chan
]);
4494 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSLT
, val
[chan
], max
);
4495 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSGT
, val
[chan
], min
);
4498 args
[4] = ctx
->i32one
;
4499 args
[5] = emit_pack_int16(ctx
, val
[0], val
[1]);
4500 args
[6] = emit_pack_int16(ctx
, val
[2], val
[3]);
4505 case V_028714_SPI_SHADER_32_ABGR
:
4506 memcpy(&args
[5], values
, sizeof(values
[0]) * 4);
4510 memcpy(&args
[5], values
, sizeof(values
[0]) * 4);
4512 for (unsigned i
= 5; i
< 9; ++i
)
4513 args
[i
] = to_float(ctx
, args
[i
]);
4517 handle_vs_outputs_post(struct nir_to_llvm_context
*ctx
)
4519 uint32_t param_count
= 0;
4521 unsigned pos_idx
, num_pos_exports
= 0;
4522 LLVMValueRef args
[9];
4523 LLVMValueRef pos_args
[4][9] = { { 0 } };
4524 LLVMValueRef psize_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
4526 const uint64_t clip_mask
= ctx
->output_mask
& ((1ull << VARYING_SLOT_CLIP_DIST0
) |
4527 (1ull << VARYING_SLOT_CLIP_DIST1
) |
4528 (1ull << VARYING_SLOT_CULL_DIST0
) |
4529 (1ull << VARYING_SLOT_CULL_DIST1
));
4531 ctx
->shader_info
->vs
.prim_id_output
= 0xffffffff;
4532 ctx
->shader_info
->vs
.layer_output
= 0xffffffff;
4534 LLVMValueRef slots
[8];
4537 if (ctx
->shader_info
->vs
.cull_dist_mask
)
4538 ctx
->shader_info
->vs
.cull_dist_mask
<<= ctx
->num_clips
;
4540 i
= VARYING_SLOT_CLIP_DIST0
;
4541 for (j
= 0; j
< ctx
->num_clips
; j
++)
4542 slots
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4543 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
4544 i
= VARYING_SLOT_CULL_DIST0
;
4545 for (j
= 0; j
< ctx
->num_culls
; j
++)
4546 slots
[ctx
->num_clips
+ j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4547 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
4549 for (i
= ctx
->num_clips
+ ctx
->num_culls
; i
< 8; i
++)
4550 slots
[i
] = LLVMGetUndef(ctx
->f32
);
4552 if (ctx
->num_clips
+ ctx
->num_culls
> 4) {
4553 target
= V_008DFC_SQ_EXP_POS
+ 3;
4554 si_llvm_init_export_args(ctx
, &slots
[4], target
, args
);
4555 memcpy(pos_args
[target
- V_008DFC_SQ_EXP_POS
],
4556 args
, sizeof(args
));
4559 target
= V_008DFC_SQ_EXP_POS
+ 2;
4560 si_llvm_init_export_args(ctx
, &slots
[0], target
, args
);
4561 memcpy(pos_args
[target
- V_008DFC_SQ_EXP_POS
],
4562 args
, sizeof(args
));
4566 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
4567 LLVMValueRef values
[4];
4568 if (!(ctx
->output_mask
& (1ull << i
)))
4571 for (unsigned j
= 0; j
< 4; j
++)
4572 values
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4573 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
4575 if (i
== VARYING_SLOT_POS
) {
4576 target
= V_008DFC_SQ_EXP_POS
;
4577 } else if (i
== VARYING_SLOT_CLIP_DIST0
||
4578 i
== VARYING_SLOT_CLIP_DIST1
||
4579 i
== VARYING_SLOT_CULL_DIST0
||
4580 i
== VARYING_SLOT_CULL_DIST1
) {
4582 } else if (i
== VARYING_SLOT_PSIZ
) {
4583 ctx
->shader_info
->vs
.writes_pointsize
= true;
4584 psize_value
= values
[0];
4586 } else if (i
== VARYING_SLOT_LAYER
) {
4587 ctx
->shader_info
->vs
.writes_layer
= true;
4588 layer_value
= values
[0];
4589 ctx
->shader_info
->vs
.layer_output
= param_count
;
4590 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
4592 } else if (i
== VARYING_SLOT_VIEWPORT
) {
4593 ctx
->shader_info
->vs
.writes_viewport_index
= true;
4594 viewport_index_value
= values
[0];
4596 } else if (i
== VARYING_SLOT_PRIMITIVE_ID
) {
4597 ctx
->shader_info
->vs
.prim_id_output
= param_count
;
4598 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
4600 } else if (i
>= VARYING_SLOT_VAR0
) {
4601 ctx
->shader_info
->vs
.export_mask
|= 1u << (i
- VARYING_SLOT_VAR0
);
4602 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
4606 si_llvm_init_export_args(ctx
, values
, target
, args
);
4608 if (target
>= V_008DFC_SQ_EXP_POS
&&
4609 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
4610 memcpy(pos_args
[target
- V_008DFC_SQ_EXP_POS
],
4611 args
, sizeof(args
));
4613 ac_emit_llvm_intrinsic(&ctx
->ac
,
4620 /* We need to add the position output manually if it's missing. */
4621 if (!pos_args
[0][0]) {
4622 pos_args
[0][0] = LLVMConstInt(ctx
->i32
, 0xf, false);
4623 pos_args
[0][1] = ctx
->i32zero
; /* EXEC mask */
4624 pos_args
[0][2] = ctx
->i32zero
; /* last export? */
4625 pos_args
[0][3] = LLVMConstInt(ctx
->i32
, V_008DFC_SQ_EXP_POS
, false);
4626 pos_args
[0][4] = ctx
->i32zero
; /* COMPR flag */
4627 pos_args
[0][5] = ctx
->f32zero
; /* X */
4628 pos_args
[0][6] = ctx
->f32zero
; /* Y */
4629 pos_args
[0][7] = ctx
->f32zero
; /* Z */
4630 pos_args
[0][8] = ctx
->f32one
; /* W */
4633 uint32_t mask
= ((ctx
->shader_info
->vs
.writes_pointsize
== true ? 1 : 0) |
4634 (ctx
->shader_info
->vs
.writes_layer
== true ? 4 : 0) |
4635 (ctx
->shader_info
->vs
.writes_viewport_index
== true ? 8 : 0));
4637 pos_args
[1][0] = LLVMConstInt(ctx
->i32
, mask
, false); /* writemask */
4638 pos_args
[1][1] = ctx
->i32zero
; /* EXEC mask */
4639 pos_args
[1][2] = ctx
->i32zero
; /* last export? */
4640 pos_args
[1][3] = LLVMConstInt(ctx
->i32
, V_008DFC_SQ_EXP_POS
+ 1, false);
4641 pos_args
[1][4] = ctx
->i32zero
; /* COMPR flag */
4642 pos_args
[1][5] = ctx
->f32zero
; /* X */
4643 pos_args
[1][6] = ctx
->f32zero
; /* Y */
4644 pos_args
[1][7] = ctx
->f32zero
; /* Z */
4645 pos_args
[1][8] = ctx
->f32zero
; /* W */
4647 if (ctx
->shader_info
->vs
.writes_pointsize
== true)
4648 pos_args
[1][5] = psize_value
;
4649 if (ctx
->shader_info
->vs
.writes_layer
== true)
4650 pos_args
[1][7] = layer_value
;
4651 if (ctx
->shader_info
->vs
.writes_viewport_index
== true)
4652 pos_args
[1][8] = viewport_index_value
;
4654 for (i
= 0; i
< 4; i
++) {
4660 for (i
= 0; i
< 4; i
++) {
4661 if (!pos_args
[i
][0])
4664 /* Specify the target we are exporting */
4665 pos_args
[i
][3] = LLVMConstInt(ctx
->i32
, V_008DFC_SQ_EXP_POS
+ pos_idx
++, false);
4666 if (pos_idx
== num_pos_exports
)
4667 pos_args
[i
][2] = ctx
->i32one
;
4668 ac_emit_llvm_intrinsic(&ctx
->ac
,
4674 ctx
->shader_info
->vs
.pos_exports
= num_pos_exports
;
4675 ctx
->shader_info
->vs
.param_exports
= param_count
;
4679 handle_es_outputs_post(struct nir_to_llvm_context
*ctx
)
4682 uint64_t max_output_written
= 0;
4683 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
4684 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
4686 if (!(ctx
->output_mask
& (1ull << i
)))
4689 param_index
= shader_io_get_unique_index(i
);
4691 if (param_index
> max_output_written
)
4692 max_output_written
= param_index
;
4694 for (j
= 0; j
< 4; j
++) {
4695 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], "");
4696 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
4698 build_tbuffer_store(ctx
,
4701 LLVMGetUndef(ctx
->i32
), ctx
->es2gs_offset
,
4702 (4 * param_index
+ j
) * 4,
4703 V_008F0C_BUF_DATA_FORMAT_32
,
4704 V_008F0C_BUF_NUM_FORMAT_UINT
,
4708 ctx
->shader_info
->vs
.esgs_itemsize
= (max_output_written
+ 1) * 16;
4712 si_export_mrt_color(struct nir_to_llvm_context
*ctx
,
4713 LLVMValueRef
*color
, unsigned param
, bool is_last
)
4715 LLVMValueRef args
[9];
4717 si_llvm_init_export_args(ctx
, color
, param
,
4721 args
[1] = ctx
->i32one
; /* whether the EXEC mask is valid */
4722 args
[2] = ctx
->i32one
; /* DONE bit */
4723 } else if (args
[0] == ctx
->i32zero
)
4724 return; /* unnecessary NULL export */
4726 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.export",
4727 ctx
->voidt
, args
, 9, 0);
4731 si_export_mrt_z(struct nir_to_llvm_context
*ctx
,
4732 LLVMValueRef depth
, LLVMValueRef stencil
,
4733 LLVMValueRef samplemask
)
4735 LLVMValueRef args
[9];
4737 args
[1] = ctx
->i32one
; /* whether the EXEC mask is valid */
4738 args
[2] = ctx
->i32one
; /* DONE bit */
4739 /* Specify the target we are exporting */
4740 args
[3] = LLVMConstInt(ctx
->i32
, V_008DFC_SQ_EXP_MRTZ
, false);
4742 args
[4] = ctx
->i32zero
; /* COMP flag */
4743 args
[5] = LLVMGetUndef(ctx
->f32
); /* R, depth */
4744 args
[6] = LLVMGetUndef(ctx
->f32
); /* G, stencil test val[0:7], stencil op val[8:15] */
4745 args
[7] = LLVMGetUndef(ctx
->f32
); /* B, sample mask */
4746 args
[8] = LLVMGetUndef(ctx
->f32
); /* A, alpha to mask */
4759 args
[7] = samplemask
;
4763 /* SI (except OLAND) has a bug that it only looks
4764 * at the X writemask component. */
4765 if (ctx
->options
->chip_class
== SI
&&
4766 ctx
->options
->family
!= CHIP_OLAND
)
4769 args
[0] = LLVMConstInt(ctx
->i32
, mask
, false);
4770 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.export",
4771 ctx
->voidt
, args
, 9, 0);
4775 handle_fs_outputs_post(struct nir_to_llvm_context
*ctx
)
4778 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
4780 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
4781 LLVMValueRef values
[4];
4783 if (!(ctx
->output_mask
& (1ull << i
)))
4786 if (i
== FRAG_RESULT_DEPTH
) {
4787 ctx
->shader_info
->fs
.writes_z
= true;
4788 depth
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4789 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
4790 } else if (i
== FRAG_RESULT_STENCIL
) {
4791 ctx
->shader_info
->fs
.writes_stencil
= true;
4792 stencil
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4793 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
4796 for (unsigned j
= 0; j
< 4; j
++)
4797 values
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4798 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
4800 if (!ctx
->shader_info
->fs
.writes_z
&& !ctx
->shader_info
->fs
.writes_stencil
)
4801 last
= ctx
->output_mask
<= ((1ull << (i
+ 1)) - 1);
4803 si_export_mrt_color(ctx
, values
, V_008DFC_SQ_EXP_MRT
+ index
, last
);
4808 if (depth
|| stencil
)
4809 si_export_mrt_z(ctx
, depth
, stencil
, samplemask
);
4811 si_export_mrt_color(ctx
, NULL
, V_008DFC_SQ_EXP_NULL
, true);
4813 ctx
->shader_info
->fs
.output_mask
= index
? ((1ull << index
) - 1) : 0;
4817 emit_gs_epilogue(struct nir_to_llvm_context
*ctx
)
4819 LLVMValueRef args
[2];
4821 args
[0] = LLVMConstInt(ctx
->i32
, SENDMSG_GS_OP_NOP
| SENDMSG_GS_DONE
, false);
4822 args
[1] = ctx
->gs_wave_id
;
4823 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.sendmsg",
4824 ctx
->voidt
, args
, 2, 0);
4828 handle_shader_outputs_post(struct nir_to_llvm_context
*ctx
)
4830 switch (ctx
->stage
) {
4831 case MESA_SHADER_VERTEX
:
4832 if (ctx
->options
->key
.vs
.as_es
)
4833 handle_es_outputs_post(ctx
);
4835 handle_vs_outputs_post(ctx
);
4837 case MESA_SHADER_FRAGMENT
:
4838 handle_fs_outputs_post(ctx
);
4840 case MESA_SHADER_GEOMETRY
:
4841 emit_gs_epilogue(ctx
);
4849 handle_shared_compute_var(struct nir_to_llvm_context
*ctx
,
4850 struct nir_variable
*variable
, uint32_t *offset
, int idx
)
4852 unsigned size
= glsl_count_attribute_slots(variable
->type
, false);
4853 variable
->data
.driver_location
= *offset
;
4857 static void ac_llvm_finalize_module(struct nir_to_llvm_context
* ctx
)
4859 LLVMPassManagerRef passmgr
;
4860 /* Create the pass manager */
4861 passmgr
= LLVMCreateFunctionPassManagerForModule(
4864 /* This pass should eliminate all the load and store instructions */
4865 LLVMAddPromoteMemoryToRegisterPass(passmgr
);
4867 /* Add some optimization passes */
4868 LLVMAddScalarReplAggregatesPass(passmgr
);
4869 LLVMAddLICMPass(passmgr
);
4870 LLVMAddAggressiveDCEPass(passmgr
);
4871 LLVMAddCFGSimplificationPass(passmgr
);
4872 LLVMAddInstructionCombiningPass(passmgr
);
4875 LLVMInitializeFunctionPassManager(passmgr
);
4876 LLVMRunFunctionPassManager(passmgr
, ctx
->main_function
);
4877 LLVMFinalizeFunctionPassManager(passmgr
);
4879 LLVMDisposeBuilder(ctx
->builder
);
4880 LLVMDisposePassManager(passmgr
);
4884 ac_setup_rings(struct nir_to_llvm_context
*ctx
)
4886 if (ctx
->stage
== MESA_SHADER_VERTEX
&& ctx
->options
->key
.vs
.as_es
) {
4887 ctx
->esgs_ring
= build_indexed_load_const(ctx
, ctx
->ring_offsets
, ctx
->i32one
);
4890 if (ctx
->is_gs_copy_shader
) {
4891 ctx
->gsvs_ring
= build_indexed_load_const(ctx
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, 3, false));
4893 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
4895 ctx
->esgs_ring
= build_indexed_load_const(ctx
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, 2, false));
4896 ctx
->gsvs_ring
= build_indexed_load_const(ctx
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, 4, false));
4898 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v4i32
, "");
4900 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->gsvs_num_entries
, LLVMConstInt(ctx
->i32
, 2, false), "");
4901 tmp
= LLVMBuildExtractElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->i32one
, "");
4902 tmp
= LLVMBuildOr(ctx
->builder
, tmp
, ctx
->gsvs_ring_stride
, "");
4903 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, tmp
, ctx
->i32one
, "");
4905 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v16i8
, "");
4910 LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm
,
4911 struct nir_shader
*nir
,
4912 struct ac_shader_variant_info
*shader_info
,
4913 const struct ac_nir_compiler_options
*options
)
4915 struct nir_to_llvm_context ctx
= {0};
4916 struct nir_function
*func
;
4918 ctx
.options
= options
;
4919 ctx
.shader_info
= shader_info
;
4920 ctx
.context
= LLVMContextCreate();
4921 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
4923 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
4924 ctx
.ac
.module
= ctx
.module
;
4926 ctx
.has_ds_bpermute
= ctx
.options
->chip_class
>= VI
;
4928 memset(shader_info
, 0, sizeof(*shader_info
));
4930 LLVMSetTarget(ctx
.module
, options
->supports_spill
? "amdgcn-mesa-mesa3d" : "amdgcn--");
4933 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
4934 ctx
.ac
.builder
= ctx
.builder
;
4935 ctx
.stage
= nir
->stage
;
4937 for (i
= 0; i
< AC_UD_MAX_SETS
; i
++)
4938 shader_info
->user_sgprs_locs
.descriptor_sets
[i
].sgpr_idx
= -1;
4939 for (i
= 0; i
< AC_UD_MAX_UD
; i
++)
4940 shader_info
->user_sgprs_locs
.shader_data
[i
].sgpr_idx
= -1;
4942 create_function(&ctx
);
4944 if (nir
->stage
== MESA_SHADER_COMPUTE
) {
4946 nir_foreach_variable(variable
, &nir
->shared
)
4950 uint32_t shared_size
= 0;
4952 LLVMTypeRef i8p
= LLVMPointerType(ctx
.i8
, LOCAL_ADDR_SPACE
);
4953 nir_foreach_variable(variable
, &nir
->shared
) {
4954 handle_shared_compute_var(&ctx
, variable
, &shared_size
, idx
);
4959 var
= LLVMAddGlobalInAddressSpace(ctx
.module
,
4960 LLVMArrayType(ctx
.i8
, shared_size
),
4963 LLVMSetAlignment(var
, 4);
4964 ctx
.shared_memory
= LLVMBuildBitCast(ctx
.builder
, var
, i8p
, "");
4966 } else if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
4967 ctx
.gs_next_vertex
= ac_build_alloca(&ctx
, ctx
.i32
, "gs_next_vertex");
4969 ctx
.gs_max_out_vertices
= nir
->info
->gs
.vertices_out
;
4972 ac_setup_rings(&ctx
);
4974 nir_foreach_variable(variable
, &nir
->inputs
)
4975 handle_shader_input_decl(&ctx
, variable
);
4977 if (nir
->stage
== MESA_SHADER_FRAGMENT
)
4978 handle_fs_inputs_pre(&ctx
, nir
);
4980 nir_foreach_variable(variable
, &nir
->outputs
)
4981 handle_shader_output_decl(&ctx
, variable
);
4983 ctx
.defs
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
4984 _mesa_key_pointer_equal
);
4985 ctx
.phis
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
4986 _mesa_key_pointer_equal
);
4988 func
= (struct nir_function
*)exec_list_get_head(&nir
->functions
);
4990 setup_locals(&ctx
, func
);
4992 visit_cf_list(&ctx
, &func
->impl
->body
);
4993 phi_post_pass(&ctx
);
4995 handle_shader_outputs_post(&ctx
);
4996 LLVMBuildRetVoid(ctx
.builder
);
4998 ac_llvm_finalize_module(&ctx
);
5000 ralloc_free(ctx
.defs
);
5001 ralloc_free(ctx
.phis
);
5003 if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
5004 shader_info
->gs
.gsvs_vertex_size
= util_bitcount64(ctx
.output_mask
) * 16;
5005 shader_info
->gs
.max_gsvs_emit_size
= shader_info
->gs
.gsvs_vertex_size
*
5006 nir
->info
->gs
.vertices_out
;
5011 static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di
, void *context
)
5013 unsigned *retval
= (unsigned *)context
;
5014 LLVMDiagnosticSeverity severity
= LLVMGetDiagInfoSeverity(di
);
5015 char *description
= LLVMGetDiagInfoDescription(di
);
5017 if (severity
== LLVMDSError
) {
5019 fprintf(stderr
, "LLVM triggered Diagnostic Handler: %s\n",
5023 LLVMDisposeMessage(description
);
5026 static unsigned ac_llvm_compile(LLVMModuleRef M
,
5027 struct ac_shader_binary
*binary
,
5028 LLVMTargetMachineRef tm
)
5030 unsigned retval
= 0;
5032 LLVMContextRef llvm_ctx
;
5033 LLVMMemoryBufferRef out_buffer
;
5034 unsigned buffer_size
;
5035 const char *buffer_data
;
5038 /* Setup Diagnostic Handler*/
5039 llvm_ctx
= LLVMGetModuleContext(M
);
5041 LLVMContextSetDiagnosticHandler(llvm_ctx
, ac_diagnostic_handler
,
5045 mem_err
= LLVMTargetMachineEmitToMemoryBuffer(tm
, M
, LLVMObjectFile
,
5048 /* Process Errors/Warnings */
5050 fprintf(stderr
, "%s: %s", __FUNCTION__
, err
);
5056 /* Extract Shader Code*/
5057 buffer_size
= LLVMGetBufferSize(out_buffer
);
5058 buffer_data
= LLVMGetBufferStart(out_buffer
);
5060 ac_elf_read(buffer_data
, buffer_size
, binary
);
5063 LLVMDisposeMemoryBuffer(out_buffer
);
5069 static void ac_compile_llvm_module(LLVMTargetMachineRef tm
,
5070 LLVMModuleRef llvm_module
,
5071 struct ac_shader_binary
*binary
,
5072 struct ac_shader_config
*config
,
5073 struct ac_shader_variant_info
*shader_info
,
5074 gl_shader_stage stage
,
5075 bool dump_shader
, bool supports_spill
)
5078 ac_dump_module(llvm_module
);
5080 memset(binary
, 0, sizeof(*binary
));
5081 int v
= ac_llvm_compile(llvm_module
, binary
, tm
);
5083 fprintf(stderr
, "compile failed\n");
5087 fprintf(stderr
, "disasm:\n%s\n", binary
->disasm_string
);
5089 ac_shader_binary_read_config(binary
, config
, 0, supports_spill
);
5091 LLVMContextRef ctx
= LLVMGetModuleContext(llvm_module
);
5092 LLVMDisposeModule(llvm_module
);
5093 LLVMContextDispose(ctx
);
5095 if (stage
== MESA_SHADER_FRAGMENT
) {
5096 shader_info
->num_input_vgprs
= 0;
5097 if (G_0286CC_PERSP_SAMPLE_ENA(config
->spi_ps_input_addr
))
5098 shader_info
->num_input_vgprs
+= 2;
5099 if (G_0286CC_PERSP_CENTER_ENA(config
->spi_ps_input_addr
))
5100 shader_info
->num_input_vgprs
+= 2;
5101 if (G_0286CC_PERSP_CENTROID_ENA(config
->spi_ps_input_addr
))
5102 shader_info
->num_input_vgprs
+= 2;
5103 if (G_0286CC_PERSP_PULL_MODEL_ENA(config
->spi_ps_input_addr
))
5104 shader_info
->num_input_vgprs
+= 3;
5105 if (G_0286CC_LINEAR_SAMPLE_ENA(config
->spi_ps_input_addr
))
5106 shader_info
->num_input_vgprs
+= 2;
5107 if (G_0286CC_LINEAR_CENTER_ENA(config
->spi_ps_input_addr
))
5108 shader_info
->num_input_vgprs
+= 2;
5109 if (G_0286CC_LINEAR_CENTROID_ENA(config
->spi_ps_input_addr
))
5110 shader_info
->num_input_vgprs
+= 2;
5111 if (G_0286CC_LINE_STIPPLE_TEX_ENA(config
->spi_ps_input_addr
))
5112 shader_info
->num_input_vgprs
+= 1;
5113 if (G_0286CC_POS_X_FLOAT_ENA(config
->spi_ps_input_addr
))
5114 shader_info
->num_input_vgprs
+= 1;
5115 if (G_0286CC_POS_Y_FLOAT_ENA(config
->spi_ps_input_addr
))
5116 shader_info
->num_input_vgprs
+= 1;
5117 if (G_0286CC_POS_Z_FLOAT_ENA(config
->spi_ps_input_addr
))
5118 shader_info
->num_input_vgprs
+= 1;
5119 if (G_0286CC_POS_W_FLOAT_ENA(config
->spi_ps_input_addr
))
5120 shader_info
->num_input_vgprs
+= 1;
5121 if (G_0286CC_FRONT_FACE_ENA(config
->spi_ps_input_addr
))
5122 shader_info
->num_input_vgprs
+= 1;
5123 if (G_0286CC_ANCILLARY_ENA(config
->spi_ps_input_addr
))
5124 shader_info
->num_input_vgprs
+= 1;
5125 if (G_0286CC_SAMPLE_COVERAGE_ENA(config
->spi_ps_input_addr
))
5126 shader_info
->num_input_vgprs
+= 1;
5127 if (G_0286CC_POS_FIXED_PT_ENA(config
->spi_ps_input_addr
))
5128 shader_info
->num_input_vgprs
+= 1;
5130 config
->num_vgprs
= MAX2(config
->num_vgprs
, shader_info
->num_input_vgprs
);
5132 /* +3 for scratch wave offset and VCC */
5133 config
->num_sgprs
= MAX2(config
->num_sgprs
,
5134 shader_info
->num_input_sgprs
+ 3);
5137 void ac_compile_nir_shader(LLVMTargetMachineRef tm
,
5138 struct ac_shader_binary
*binary
,
5139 struct ac_shader_config
*config
,
5140 struct ac_shader_variant_info
*shader_info
,
5141 struct nir_shader
*nir
,
5142 const struct ac_nir_compiler_options
*options
,
5146 LLVMModuleRef llvm_module
= ac_translate_nir_to_llvm(tm
, nir
, shader_info
,
5149 ac_compile_llvm_module(tm
, llvm_module
, binary
, config
, shader_info
, nir
->stage
, dump_shader
, options
->supports_spill
);
5150 switch (nir
->stage
) {
5151 case MESA_SHADER_COMPUTE
:
5152 for (int i
= 0; i
< 3; ++i
)
5153 shader_info
->cs
.block_size
[i
] = nir
->info
->cs
.local_size
[i
];
5155 case MESA_SHADER_FRAGMENT
:
5156 shader_info
->fs
.early_fragment_test
= nir
->info
->fs
.early_fragment_tests
;
5158 case MESA_SHADER_GEOMETRY
:
5159 shader_info
->gs
.vertices_in
= nir
->info
->gs
.vertices_in
;
5160 shader_info
->gs
.vertices_out
= nir
->info
->gs
.vertices_out
;
5161 shader_info
->gs
.output_prim
= nir
->info
->gs
.output_primitive
;
5162 shader_info
->gs
.invocations
= nir
->info
->gs
.invocations
;
5164 case MESA_SHADER_VERTEX
:
5165 shader_info
->vs
.as_es
= options
->key
.vs
.as_es
;
5173 ac_gs_copy_shader_emit(struct nir_to_llvm_context
*ctx
)
5175 LLVMValueRef args
[9];
5176 args
[0] = ctx
->gsvs_ring
;
5177 args
[1] = LLVMBuildMul(ctx
->builder
, ctx
->vertex_id
, LLVMConstInt(ctx
->i32
, 4, false), "");
5178 args
[3] = ctx
->i32zero
;
5179 args
[4] = ctx
->i32one
; /* OFFEN */
5180 args
[5] = ctx
->i32zero
; /* IDXEN */
5181 args
[6] = ctx
->i32one
; /* GLC */
5182 args
[7] = ctx
->i32one
; /* SLC */
5183 args
[8] = ctx
->i32zero
; /* TFE */
5186 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5187 if (!(ctx
->output_mask
& (1ull << i
)))
5190 for (unsigned j
= 0; j
< 4; j
++) {
5192 args
[2] = LLVMConstInt(ctx
->i32
,
5194 ctx
->gs_max_out_vertices
* 16 * 4, false);
5196 value
= ac_emit_llvm_intrinsic(&ctx
->ac
,
5197 "llvm.SI.buffer.load.dword.i32.i32",
5199 AC_FUNC_ATTR_READONLY
);
5201 LLVMBuildStore(ctx
->builder
,
5202 to_float(ctx
, value
), ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)]);
5206 handle_vs_outputs_post(ctx
);
5209 void ac_create_gs_copy_shader(LLVMTargetMachineRef tm
,
5210 struct nir_shader
*geom_shader
,
5211 struct ac_shader_binary
*binary
,
5212 struct ac_shader_config
*config
,
5213 struct ac_shader_variant_info
*shader_info
,
5214 const struct ac_nir_compiler_options
*options
,
5217 struct nir_to_llvm_context ctx
= {0};
5218 ctx
.context
= LLVMContextCreate();
5219 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
5220 ctx
.options
= options
;
5221 ctx
.shader_info
= shader_info
;
5223 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
5224 ctx
.ac
.module
= ctx
.module
;
5226 ctx
.is_gs_copy_shader
= true;
5227 LLVMSetTarget(ctx
.module
, "amdgcn--");
5230 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
5231 ctx
.ac
.builder
= ctx
.builder
;
5232 ctx
.stage
= MESA_SHADER_VERTEX
;
5234 create_function(&ctx
);
5236 ctx
.gs_max_out_vertices
= geom_shader
->info
->gs
.vertices_out
;
5237 ac_setup_rings(&ctx
);
5239 nir_foreach_variable(variable
, &geom_shader
->outputs
)
5240 handle_shader_output_decl(&ctx
, variable
);
5242 ac_gs_copy_shader_emit(&ctx
);
5244 LLVMBuildRetVoid(ctx
.builder
);
5246 ac_llvm_finalize_module(&ctx
);
5248 ac_compile_llvm_module(tm
, ctx
.module
, binary
, config
, shader_info
,
5250 dump_shader
, options
->supports_spill
);