2 * Copyright © 2016 Bas Nieuwenhuizen
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
30 #include "../vulkan/radv_descriptor_set.h"
31 #include "util/bitscan.h"
32 #include <llvm-c/Transforms/Scalar.h>
34 enum radeon_llvm_calling_convention
{
35 RADEON_LLVM_AMDGPU_VS
= 87,
36 RADEON_LLVM_AMDGPU_GS
= 88,
37 RADEON_LLVM_AMDGPU_PS
= 89,
38 RADEON_LLVM_AMDGPU_CS
= 90,
41 #define CONST_ADDR_SPACE 2
42 #define LOCAL_ADDR_SPACE 3
44 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
45 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
54 struct nir_to_llvm_context
{
55 struct ac_llvm_context ac
;
56 const struct ac_nir_compiler_options
*options
;
57 struct ac_shader_variant_info
*shader_info
;
59 LLVMContextRef context
;
61 LLVMBuilderRef builder
;
62 LLVMValueRef main_function
;
64 struct hash_table
*defs
;
65 struct hash_table
*phis
;
67 LLVMValueRef descriptor_sets
[AC_UD_MAX_SETS
];
68 LLVMValueRef ring_offsets
;
69 LLVMValueRef push_constants
;
70 LLVMValueRef num_work_groups
;
71 LLVMValueRef workgroup_ids
;
72 LLVMValueRef local_invocation_ids
;
75 LLVMValueRef vertex_buffers
;
76 LLVMValueRef base_vertex
;
77 LLVMValueRef start_instance
;
78 LLVMValueRef draw_index
;
79 LLVMValueRef vertex_id
;
80 LLVMValueRef rel_auto_id
;
81 LLVMValueRef vs_prim_id
;
82 LLVMValueRef instance_id
;
84 LLVMValueRef es2gs_offset
;
86 LLVMValueRef gsvs_ring_stride
;
87 LLVMValueRef gsvs_num_entries
;
88 LLVMValueRef gs2vs_offset
;
89 LLVMValueRef gs_wave_id
;
90 LLVMValueRef gs_vtx_offset
[6];
91 LLVMValueRef gs_prim_id
, gs_invocation_id
;
93 LLVMValueRef esgs_ring
;
94 LLVMValueRef gsvs_ring
;
96 LLVMValueRef prim_mask
;
97 LLVMValueRef sample_positions
;
98 LLVMValueRef persp_sample
, persp_center
, persp_centroid
;
99 LLVMValueRef linear_sample
, linear_center
, linear_centroid
;
100 LLVMValueRef front_face
;
101 LLVMValueRef ancillary
;
102 LLVMValueRef frag_pos
[4];
104 LLVMBasicBlockRef continue_block
;
105 LLVMBasicBlockRef break_block
;
124 LLVMValueRef i32zero
;
126 LLVMValueRef f32zero
;
128 LLVMValueRef v4f32empty
;
130 unsigned uniform_md_kind
;
131 LLVMValueRef empty_md
;
132 gl_shader_stage stage
;
135 LLVMValueRef inputs
[RADEON_LLVM_MAX_INPUTS
* 4];
136 LLVMValueRef outputs
[RADEON_LLVM_MAX_OUTPUTS
* 4];
138 LLVMValueRef shared_memory
;
140 uint64_t output_mask
;
142 LLVMValueRef
*locals
;
144 uint8_t num_output_clips
;
145 uint8_t num_output_culls
;
147 bool has_ds_bpermute
;
149 bool is_gs_copy_shader
;
150 LLVMValueRef gs_next_vertex
;
151 unsigned gs_max_out_vertices
;
155 LLVMValueRef args
[12];
157 LLVMTypeRef dst_type
;
161 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
162 nir_deref_var
*deref
,
163 enum desc_type desc_type
);
164 static unsigned radeon_llvm_reg_index_soa(unsigned index
, unsigned chan
)
166 return (index
* 4) + chan
;
169 static unsigned shader_io_get_unique_index(gl_varying_slot slot
)
171 if (slot
== VARYING_SLOT_POS
)
173 if (slot
== VARYING_SLOT_PSIZ
)
175 if (slot
== VARYING_SLOT_CLIP_DIST0
)
177 if (slot
== VARYING_SLOT_CLIP_DIST1
)
179 if (slot
>= VARYING_SLOT_VAR0
&& slot
<= VARYING_SLOT_VAR31
)
180 return 4 + (slot
- VARYING_SLOT_VAR0
);
181 unreachable("illegal slot in get unique index\n");
184 static unsigned llvm_get_type_size(LLVMTypeRef type
)
186 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
189 case LLVMIntegerTypeKind
:
190 return LLVMGetIntTypeWidth(type
) / 8;
191 case LLVMFloatTypeKind
:
193 case LLVMPointerTypeKind
:
195 case LLVMVectorTypeKind
:
196 return LLVMGetVectorSize(type
) *
197 llvm_get_type_size(LLVMGetElementType(type
));
204 static void set_llvm_calling_convention(LLVMValueRef func
,
205 gl_shader_stage stage
)
207 enum radeon_llvm_calling_convention calling_conv
;
210 case MESA_SHADER_VERTEX
:
211 case MESA_SHADER_TESS_CTRL
:
212 case MESA_SHADER_TESS_EVAL
:
213 calling_conv
= RADEON_LLVM_AMDGPU_VS
;
215 case MESA_SHADER_GEOMETRY
:
216 calling_conv
= RADEON_LLVM_AMDGPU_GS
;
218 case MESA_SHADER_FRAGMENT
:
219 calling_conv
= RADEON_LLVM_AMDGPU_PS
;
221 case MESA_SHADER_COMPUTE
:
222 calling_conv
= RADEON_LLVM_AMDGPU_CS
;
225 unreachable("Unhandle shader type");
228 LLVMSetFunctionCallConv(func
, calling_conv
);
232 create_llvm_function(LLVMContextRef ctx
, LLVMModuleRef module
,
233 LLVMBuilderRef builder
, LLVMTypeRef
*return_types
,
234 unsigned num_return_elems
, LLVMTypeRef
*param_types
,
235 unsigned param_count
, unsigned array_params_mask
,
236 unsigned sgpr_params
, bool unsafe_math
)
238 LLVMTypeRef main_function_type
, ret_type
;
239 LLVMBasicBlockRef main_function_body
;
241 if (num_return_elems
)
242 ret_type
= LLVMStructTypeInContext(ctx
, return_types
,
243 num_return_elems
, true);
245 ret_type
= LLVMVoidTypeInContext(ctx
);
247 /* Setup the function */
249 LLVMFunctionType(ret_type
, param_types
, param_count
, 0);
250 LLVMValueRef main_function
=
251 LLVMAddFunction(module
, "main", main_function_type
);
253 LLVMAppendBasicBlockInContext(ctx
, main_function
, "main_body");
254 LLVMPositionBuilderAtEnd(builder
, main_function_body
);
256 LLVMSetFunctionCallConv(main_function
, RADEON_LLVM_AMDGPU_CS
);
257 for (unsigned i
= 0; i
< sgpr_params
; ++i
) {
258 if (array_params_mask
& (1 << i
)) {
259 LLVMValueRef P
= LLVMGetParam(main_function
, i
);
260 ac_add_function_attr(main_function
, i
+ 1, AC_FUNC_ATTR_BYVAL
);
261 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
264 ac_add_function_attr(main_function
, i
+ 1, AC_FUNC_ATTR_INREG
);
269 /* These were copied from some LLVM test. */
270 LLVMAddTargetDependentFunctionAttr(main_function
,
271 "less-precise-fpmad",
273 LLVMAddTargetDependentFunctionAttr(main_function
,
276 LLVMAddTargetDependentFunctionAttr(main_function
,
279 LLVMAddTargetDependentFunctionAttr(main_function
,
283 return main_function
;
286 static LLVMTypeRef
const_array(LLVMTypeRef elem_type
, int num_elements
)
288 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
292 static LLVMValueRef
get_shared_memory_ptr(struct nir_to_llvm_context
*ctx
,
300 offset
= LLVMConstInt(ctx
->i32
, idx
, false);
302 ptr
= ctx
->shared_memory
;
303 ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &offset
, 1, "");
304 addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
305 ptr
= LLVMBuildBitCast(ctx
->builder
, ptr
, LLVMPointerType(type
, addr_space
), "");
309 static LLVMTypeRef
to_integer_type_scalar(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
311 if (t
== ctx
->f16
|| t
== ctx
->i16
)
313 else if (t
== ctx
->f32
|| t
== ctx
->i32
)
315 else if (t
== ctx
->f64
|| t
== ctx
->i64
)
318 unreachable("Unhandled integer size");
321 static LLVMTypeRef
to_integer_type(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
323 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
324 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
325 return LLVMVectorType(to_integer_type_scalar(ctx
, elem_type
),
326 LLVMGetVectorSize(t
));
328 return to_integer_type_scalar(ctx
, t
);
331 static LLVMValueRef
to_integer(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
)
333 LLVMTypeRef type
= LLVMTypeOf(v
);
334 return LLVMBuildBitCast(ctx
->builder
, v
, to_integer_type(ctx
, type
), "");
337 static LLVMTypeRef
to_float_type_scalar(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
339 if (t
== ctx
->i16
|| t
== ctx
->f16
)
341 else if (t
== ctx
->i32
|| t
== ctx
->f32
)
343 else if (t
== ctx
->i64
|| t
== ctx
->f64
)
346 unreachable("Unhandled float size");
349 static LLVMTypeRef
to_float_type(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
351 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
352 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
353 return LLVMVectorType(to_float_type_scalar(ctx
, elem_type
),
354 LLVMGetVectorSize(t
));
356 return to_float_type_scalar(ctx
, t
);
359 static LLVMValueRef
to_float(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
)
361 LLVMTypeRef type
= LLVMTypeOf(v
);
362 return LLVMBuildBitCast(ctx
->builder
, v
, to_float_type(ctx
, type
), "");
365 static int get_elem_bits(struct nir_to_llvm_context
*ctx
, LLVMTypeRef type
)
367 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
368 type
= LLVMGetElementType(type
);
370 if (LLVMGetTypeKind(type
) == LLVMIntegerTypeKind
)
371 return LLVMGetIntTypeWidth(type
);
373 if (type
== ctx
->f16
)
375 if (type
== ctx
->f32
)
377 if (type
== ctx
->f64
)
380 unreachable("Unhandled type kind in get_elem_bits");
383 static LLVMValueRef
unpack_param(struct nir_to_llvm_context
*ctx
,
384 LLVMValueRef param
, unsigned rshift
,
387 LLVMValueRef value
= param
;
389 value
= LLVMBuildLShr(ctx
->builder
, value
,
390 LLVMConstInt(ctx
->i32
, rshift
, false), "");
392 if (rshift
+ bitwidth
< 32) {
393 unsigned mask
= (1 << bitwidth
) - 1;
394 value
= LLVMBuildAnd(ctx
->builder
, value
,
395 LLVMConstInt(ctx
->i32
, mask
, false), "");
400 static void set_userdata_location(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
)
402 ud_info
->sgpr_idx
= sgpr_idx
;
403 ud_info
->num_sgprs
= num_sgprs
;
404 ud_info
->indirect
= false;
405 ud_info
->indirect_offset
= 0;
408 static void set_userdata_location_shader(struct nir_to_llvm_context
*ctx
,
409 int idx
, uint8_t sgpr_idx
, uint8_t num_sgprs
)
411 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.shader_data
[idx
], sgpr_idx
, num_sgprs
);
415 static void set_userdata_location_indirect(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
,
416 uint32_t indirect_offset
)
418 ud_info
->sgpr_idx
= sgpr_idx
;
419 ud_info
->num_sgprs
= num_sgprs
;
420 ud_info
->indirect
= true;
421 ud_info
->indirect_offset
= indirect_offset
;
425 static void create_function(struct nir_to_llvm_context
*ctx
)
427 LLVMTypeRef arg_types
[23];
428 unsigned arg_idx
= 0;
429 unsigned array_params_mask
= 0;
430 unsigned sgpr_count
= 0, user_sgpr_count
;
432 unsigned num_sets
= ctx
->options
->layout
? ctx
->options
->layout
->num_sets
: 0;
433 unsigned user_sgpr_idx
;
434 bool need_push_constants
;
435 bool need_ring_offsets
= false;
437 /* until we sort out scratch/global buffers always assign ring offsets for gs/vs/es */
438 if (ctx
->stage
== MESA_SHADER_GEOMETRY
||
439 ctx
->stage
== MESA_SHADER_VERTEX
||
440 ctx
->is_gs_copy_shader
)
441 need_ring_offsets
= true;
443 need_push_constants
= true;
444 if (!ctx
->options
->layout
)
445 need_push_constants
= false;
446 else if (!ctx
->options
->layout
->push_constant_size
&&
447 !ctx
->options
->layout
->dynamic_offset_count
)
448 need_push_constants
= false;
450 if (need_ring_offsets
&& !ctx
->options
->supports_spill
) {
451 arg_types
[arg_idx
++] = const_array(ctx
->v16i8
, 8); /* address of rings */
454 /* 1 for each descriptor set */
455 for (unsigned i
= 0; i
< num_sets
; ++i
) {
456 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
457 array_params_mask
|= (1 << arg_idx
);
458 arg_types
[arg_idx
++] = const_array(ctx
->i8
, 1024 * 1024);
462 if (need_push_constants
) {
463 /* 1 for push constants and dynamic descriptors */
464 array_params_mask
|= (1 << arg_idx
);
465 arg_types
[arg_idx
++] = const_array(ctx
->i8
, 1024 * 1024);
468 switch (ctx
->stage
) {
469 case MESA_SHADER_COMPUTE
:
470 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3); /* grid size */
471 user_sgpr_count
= arg_idx
;
472 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3);
473 arg_types
[arg_idx
++] = ctx
->i32
;
474 sgpr_count
= arg_idx
;
476 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3);
478 case MESA_SHADER_VERTEX
:
479 if (!ctx
->is_gs_copy_shader
) {
480 arg_types
[arg_idx
++] = const_array(ctx
->v16i8
, 16); /* vertex buffers */
481 arg_types
[arg_idx
++] = ctx
->i32
; // base vertex
482 arg_types
[arg_idx
++] = ctx
->i32
; // start instance
483 arg_types
[arg_idx
++] = ctx
->i32
; // draw index
485 user_sgpr_count
= arg_idx
;
486 if (ctx
->options
->key
.vs
.as_es
)
487 arg_types
[arg_idx
++] = ctx
->i32
; //es2gs offset
488 sgpr_count
= arg_idx
;
489 arg_types
[arg_idx
++] = ctx
->i32
; // vertex id
490 if (!ctx
->is_gs_copy_shader
) {
491 arg_types
[arg_idx
++] = ctx
->i32
; // rel auto id
492 arg_types
[arg_idx
++] = ctx
->i32
; // vs prim id
493 arg_types
[arg_idx
++] = ctx
->i32
; // instance id
496 case MESA_SHADER_GEOMETRY
:
497 arg_types
[arg_idx
++] = ctx
->i32
; // gsvs stride
498 arg_types
[arg_idx
++] = ctx
->i32
; // gsvs num entires
499 user_sgpr_count
= arg_idx
;
500 arg_types
[arg_idx
++] = ctx
->i32
; // gs2vs offset
501 arg_types
[arg_idx
++] = ctx
->i32
; // wave id
502 sgpr_count
= arg_idx
;
503 arg_types
[arg_idx
++] = ctx
->i32
; // vtx0
504 arg_types
[arg_idx
++] = ctx
->i32
; // vtx1
505 arg_types
[arg_idx
++] = ctx
->i32
; // prim id
506 arg_types
[arg_idx
++] = ctx
->i32
; // vtx2
507 arg_types
[arg_idx
++] = ctx
->i32
; // vtx3
508 arg_types
[arg_idx
++] = ctx
->i32
; // vtx4
509 arg_types
[arg_idx
++] = ctx
->i32
; // vtx5
510 arg_types
[arg_idx
++] = ctx
->i32
; // GS instance id
512 case MESA_SHADER_FRAGMENT
:
513 arg_types
[arg_idx
++] = const_array(ctx
->f32
, 32); /* sample positions */
514 user_sgpr_count
= arg_idx
;
515 arg_types
[arg_idx
++] = ctx
->i32
; /* prim mask */
516 sgpr_count
= arg_idx
;
517 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp sample */
518 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp center */
519 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp centroid */
520 arg_types
[arg_idx
++] = ctx
->v3i32
; /* persp pull model */
521 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear sample */
522 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear center */
523 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear centroid */
524 arg_types
[arg_idx
++] = ctx
->f32
; /* line stipple tex */
525 arg_types
[arg_idx
++] = ctx
->f32
; /* pos x float */
526 arg_types
[arg_idx
++] = ctx
->f32
; /* pos y float */
527 arg_types
[arg_idx
++] = ctx
->f32
; /* pos z float */
528 arg_types
[arg_idx
++] = ctx
->f32
; /* pos w float */
529 arg_types
[arg_idx
++] = ctx
->i32
; /* front face */
530 arg_types
[arg_idx
++] = ctx
->i32
; /* ancillary */
531 arg_types
[arg_idx
++] = ctx
->f32
; /* sample coverage */
532 arg_types
[arg_idx
++] = ctx
->i32
; /* fixed pt */
535 unreachable("Shader stage not implemented");
538 ctx
->main_function
= create_llvm_function(
539 ctx
->context
, ctx
->module
, ctx
->builder
, NULL
, 0, arg_types
,
540 arg_idx
, array_params_mask
, sgpr_count
, ctx
->options
->unsafe_math
);
541 set_llvm_calling_convention(ctx
->main_function
, ctx
->stage
);
543 ctx
->shader_info
->num_input_sgprs
= 0;
544 ctx
->shader_info
->num_input_vgprs
= 0;
546 ctx
->shader_info
->num_user_sgprs
= ctx
->options
->supports_spill
? 2 : 0;
547 for (i
= 0; i
< user_sgpr_count
; i
++)
548 ctx
->shader_info
->num_user_sgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
550 ctx
->shader_info
->num_input_sgprs
= ctx
->shader_info
->num_user_sgprs
;
551 for (; i
< sgpr_count
; i
++)
552 ctx
->shader_info
->num_input_sgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
554 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
555 for (; i
< arg_idx
; ++i
)
556 ctx
->shader_info
->num_input_vgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
561 if (ctx
->options
->supports_spill
|| need_ring_offsets
) {
562 set_userdata_location_shader(ctx
, AC_UD_SCRATCH_RING_OFFSETS
, user_sgpr_idx
, 2);
564 if (ctx
->options
->supports_spill
) {
565 ctx
->ring_offsets
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.implicit.buffer.ptr",
566 LLVMPointerType(ctx
->i8
, CONST_ADDR_SPACE
),
567 NULL
, 0, AC_FUNC_ATTR_READNONE
);
568 ctx
->ring_offsets
= LLVMBuildBitCast(ctx
->builder
, ctx
->ring_offsets
,
569 const_array(ctx
->v16i8
, 8), "");
571 ctx
->ring_offsets
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
574 for (unsigned i
= 0; i
< num_sets
; ++i
) {
575 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
576 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.descriptor_sets
[i
], user_sgpr_idx
, 2);
578 ctx
->descriptor_sets
[i
] =
579 LLVMGetParam(ctx
->main_function
, arg_idx
++);
581 ctx
->descriptor_sets
[i
] = NULL
;
584 if (need_push_constants
) {
585 ctx
->push_constants
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
586 set_userdata_location_shader(ctx
, AC_UD_PUSH_CONSTANTS
, user_sgpr_idx
, 2);
590 switch (ctx
->stage
) {
591 case MESA_SHADER_COMPUTE
:
592 set_userdata_location_shader(ctx
, AC_UD_CS_GRID_SIZE
, user_sgpr_idx
, 3);
594 ctx
->num_work_groups
=
595 LLVMGetParam(ctx
->main_function
, arg_idx
++);
597 LLVMGetParam(ctx
->main_function
, arg_idx
++);
599 LLVMGetParam(ctx
->main_function
, arg_idx
++);
600 ctx
->local_invocation_ids
=
601 LLVMGetParam(ctx
->main_function
, arg_idx
++);
603 case MESA_SHADER_VERTEX
:
604 if (!ctx
->is_gs_copy_shader
) {
605 set_userdata_location_shader(ctx
, AC_UD_VS_VERTEX_BUFFERS
, user_sgpr_idx
, 2);
607 ctx
->vertex_buffers
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
608 set_userdata_location_shader(ctx
, AC_UD_VS_BASE_VERTEX_START_INSTANCE
, user_sgpr_idx
, 3);
610 ctx
->base_vertex
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
611 ctx
->start_instance
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
612 ctx
->draw_index
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
614 if (ctx
->options
->key
.vs
.as_es
)
615 ctx
->es2gs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
616 ctx
->vertex_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
617 if (!ctx
->is_gs_copy_shader
) {
618 ctx
->rel_auto_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
619 ctx
->vs_prim_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
620 ctx
->instance_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
623 case MESA_SHADER_GEOMETRY
:
624 set_userdata_location_shader(ctx
, AC_UD_GS_VS_RING_STRIDE_ENTRIES
, user_sgpr_idx
, 2);
626 ctx
->gsvs_ring_stride
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
627 ctx
->gsvs_num_entries
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
628 ctx
->gs2vs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
629 ctx
->gs_wave_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
630 ctx
->gs_vtx_offset
[0] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
631 ctx
->gs_vtx_offset
[1] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
632 ctx
->gs_prim_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
633 ctx
->gs_vtx_offset
[2] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
634 ctx
->gs_vtx_offset
[3] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
635 ctx
->gs_vtx_offset
[4] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
636 ctx
->gs_vtx_offset
[5] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
637 ctx
->gs_invocation_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
639 case MESA_SHADER_FRAGMENT
:
640 set_userdata_location_shader(ctx
, AC_UD_PS_SAMPLE_POS
, user_sgpr_idx
, 2);
642 ctx
->sample_positions
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
643 ctx
->prim_mask
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
644 ctx
->persp_sample
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
645 ctx
->persp_center
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
646 ctx
->persp_centroid
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
648 ctx
->linear_sample
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
649 ctx
->linear_center
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
650 ctx
->linear_centroid
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
651 arg_idx
++; /* line stipple */
652 ctx
->frag_pos
[0] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
653 ctx
->frag_pos
[1] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
654 ctx
->frag_pos
[2] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
655 ctx
->frag_pos
[3] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
656 ctx
->front_face
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
657 ctx
->ancillary
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
660 unreachable("Shader stage not implemented");
664 static void setup_types(struct nir_to_llvm_context
*ctx
)
666 LLVMValueRef args
[4];
668 ctx
->voidt
= LLVMVoidTypeInContext(ctx
->context
);
669 ctx
->i1
= LLVMIntTypeInContext(ctx
->context
, 1);
670 ctx
->i8
= LLVMIntTypeInContext(ctx
->context
, 8);
671 ctx
->i16
= LLVMIntTypeInContext(ctx
->context
, 16);
672 ctx
->i32
= LLVMIntTypeInContext(ctx
->context
, 32);
673 ctx
->i64
= LLVMIntTypeInContext(ctx
->context
, 64);
674 ctx
->v2i32
= LLVMVectorType(ctx
->i32
, 2);
675 ctx
->v3i32
= LLVMVectorType(ctx
->i32
, 3);
676 ctx
->v4i32
= LLVMVectorType(ctx
->i32
, 4);
677 ctx
->v8i32
= LLVMVectorType(ctx
->i32
, 8);
678 ctx
->f32
= LLVMFloatTypeInContext(ctx
->context
);
679 ctx
->f16
= LLVMHalfTypeInContext(ctx
->context
);
680 ctx
->f64
= LLVMDoubleTypeInContext(ctx
->context
);
681 ctx
->v2f32
= LLVMVectorType(ctx
->f32
, 2);
682 ctx
->v4f32
= LLVMVectorType(ctx
->f32
, 4);
683 ctx
->v16i8
= LLVMVectorType(ctx
->i8
, 16);
685 ctx
->i32zero
= LLVMConstInt(ctx
->i32
, 0, false);
686 ctx
->i32one
= LLVMConstInt(ctx
->i32
, 1, false);
687 ctx
->f32zero
= LLVMConstReal(ctx
->f32
, 0.0);
688 ctx
->f32one
= LLVMConstReal(ctx
->f32
, 1.0);
690 args
[0] = ctx
->f32zero
;
691 args
[1] = ctx
->f32zero
;
692 args
[2] = ctx
->f32zero
;
693 args
[3] = ctx
->f32one
;
694 ctx
->v4f32empty
= LLVMConstVector(args
, 4);
696 ctx
->uniform_md_kind
=
697 LLVMGetMDKindIDInContext(ctx
->context
, "amdgpu.uniform", 14);
698 ctx
->empty_md
= LLVMMDNodeInContext(ctx
->context
, NULL
, 0);
700 args
[0] = LLVMConstReal(ctx
->f32
, 2.5);
703 static int get_llvm_num_components(LLVMValueRef value
)
705 LLVMTypeRef type
= LLVMTypeOf(value
);
706 unsigned num_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
707 ? LLVMGetVectorSize(type
)
709 return num_components
;
712 static LLVMValueRef
llvm_extract_elem(struct nir_to_llvm_context
*ctx
,
716 int count
= get_llvm_num_components(value
);
718 assert(index
< count
);
722 return LLVMBuildExtractElement(ctx
->builder
, value
,
723 LLVMConstInt(ctx
->i32
, index
, false), "");
726 static LLVMValueRef
trim_vector(struct nir_to_llvm_context
*ctx
,
727 LLVMValueRef value
, unsigned count
)
729 unsigned num_components
= get_llvm_num_components(value
);
730 if (count
== num_components
)
733 LLVMValueRef masks
[] = {
734 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
735 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false)};
738 return LLVMBuildExtractElement(ctx
->builder
, value
, masks
[0],
741 LLVMValueRef swizzle
= LLVMConstVector(masks
, count
);
742 return LLVMBuildShuffleVector(ctx
->builder
, value
, value
, swizzle
, "");
746 build_store_values_extended(struct nir_to_llvm_context
*ctx
,
747 LLVMValueRef
*values
,
748 unsigned value_count
,
749 unsigned value_stride
,
752 LLVMBuilderRef builder
= ctx
->builder
;
755 if (value_count
== 1) {
756 LLVMBuildStore(builder
, vec
, values
[0]);
760 for (i
= 0; i
< value_count
; i
++) {
761 LLVMValueRef ptr
= values
[i
* value_stride
];
762 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, i
, false);
763 LLVMValueRef value
= LLVMBuildExtractElement(builder
, vec
, index
, "");
764 LLVMBuildStore(builder
, value
, ptr
);
768 static LLVMTypeRef
get_def_type(struct nir_to_llvm_context
*ctx
,
771 LLVMTypeRef type
= LLVMIntTypeInContext(ctx
->context
, def
->bit_size
);
772 if (def
->num_components
> 1) {
773 type
= LLVMVectorType(type
, def
->num_components
);
778 static LLVMValueRef
get_src(struct nir_to_llvm_context
*ctx
, nir_src src
)
781 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, src
.ssa
);
782 return (LLVMValueRef
)entry
->data
;
786 static LLVMBasicBlockRef
get_block(struct nir_to_llvm_context
*ctx
,
789 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, b
);
790 return (LLVMBasicBlockRef
)entry
->data
;
793 static LLVMValueRef
get_alu_src(struct nir_to_llvm_context
*ctx
,
795 unsigned num_components
)
797 LLVMValueRef value
= get_src(ctx
, src
.src
);
798 bool need_swizzle
= false;
801 LLVMTypeRef type
= LLVMTypeOf(value
);
802 unsigned src_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
803 ? LLVMGetVectorSize(type
)
806 for (unsigned i
= 0; i
< num_components
; ++i
) {
807 assert(src
.swizzle
[i
] < src_components
);
808 if (src
.swizzle
[i
] != i
)
812 if (need_swizzle
|| num_components
!= src_components
) {
813 LLVMValueRef masks
[] = {
814 LLVMConstInt(ctx
->i32
, src
.swizzle
[0], false),
815 LLVMConstInt(ctx
->i32
, src
.swizzle
[1], false),
816 LLVMConstInt(ctx
->i32
, src
.swizzle
[2], false),
817 LLVMConstInt(ctx
->i32
, src
.swizzle
[3], false)};
819 if (src_components
> 1 && num_components
== 1) {
820 value
= LLVMBuildExtractElement(ctx
->builder
, value
,
822 } else if (src_components
== 1 && num_components
> 1) {
823 LLVMValueRef values
[] = {value
, value
, value
, value
};
824 value
= ac_build_gather_values(&ctx
->ac
, values
, num_components
);
826 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
827 value
= LLVMBuildShuffleVector(ctx
->builder
, value
, value
,
836 static LLVMValueRef
emit_int_cmp(struct nir_to_llvm_context
*ctx
,
837 LLVMIntPredicate pred
, LLVMValueRef src0
,
840 LLVMValueRef result
= LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, "");
841 return LLVMBuildSelect(ctx
->builder
, result
,
842 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
843 LLVMConstInt(ctx
->i32
, 0, false), "");
846 static LLVMValueRef
emit_float_cmp(struct nir_to_llvm_context
*ctx
,
847 LLVMRealPredicate pred
, LLVMValueRef src0
,
851 src0
= to_float(ctx
, src0
);
852 src1
= to_float(ctx
, src1
);
853 result
= LLVMBuildFCmp(ctx
->builder
, pred
, src0
, src1
, "");
854 return LLVMBuildSelect(ctx
->builder
, result
,
855 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
856 LLVMConstInt(ctx
->i32
, 0, false), "");
859 static LLVMValueRef
emit_intrin_1f_param(struct nir_to_llvm_context
*ctx
,
861 LLVMTypeRef result_type
,
865 LLVMValueRef params
[] = {
869 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
870 return ac_emit_llvm_intrinsic(&ctx
->ac
, name
, result_type
, params
, 1, AC_FUNC_ATTR_READNONE
);
873 static LLVMValueRef
emit_intrin_2f_param(struct nir_to_llvm_context
*ctx
,
875 LLVMTypeRef result_type
,
876 LLVMValueRef src0
, LLVMValueRef src1
)
879 LLVMValueRef params
[] = {
884 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
885 return ac_emit_llvm_intrinsic(&ctx
->ac
, name
, result_type
, params
, 2, AC_FUNC_ATTR_READNONE
);
888 static LLVMValueRef
emit_intrin_3f_param(struct nir_to_llvm_context
*ctx
,
890 LLVMTypeRef result_type
,
891 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
894 LLVMValueRef params
[] = {
900 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
901 return ac_emit_llvm_intrinsic(&ctx
->ac
, name
, result_type
, params
, 3, AC_FUNC_ATTR_READNONE
);
904 static LLVMValueRef
emit_bcsel(struct nir_to_llvm_context
*ctx
,
905 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
907 LLVMValueRef v
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, src0
,
909 return LLVMBuildSelect(ctx
->builder
, v
, src1
, src2
, "");
912 static LLVMValueRef
emit_find_lsb(struct nir_to_llvm_context
*ctx
,
915 LLVMValueRef params
[2] = {
918 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
919 * add special code to check for x=0. The reason is that
920 * the LLVM behavior for x=0 is different from what we
923 * The hardware already implements the correct behavior.
925 LLVMConstInt(ctx
->i32
, 1, false),
927 return ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.cttz.i32", ctx
->i32
, params
, 2, AC_FUNC_ATTR_READNONE
);
930 static LLVMValueRef
emit_ifind_msb(struct nir_to_llvm_context
*ctx
,
933 return ac_emit_imsb(&ctx
->ac
, src0
, ctx
->i32
);
936 static LLVMValueRef
emit_ufind_msb(struct nir_to_llvm_context
*ctx
,
939 return ac_emit_umsb(&ctx
->ac
, src0
, ctx
->i32
);
942 static LLVMValueRef
emit_minmax_int(struct nir_to_llvm_context
*ctx
,
943 LLVMIntPredicate pred
,
944 LLVMValueRef src0
, LLVMValueRef src1
)
946 return LLVMBuildSelect(ctx
->builder
,
947 LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, ""),
952 static LLVMValueRef
emit_iabs(struct nir_to_llvm_context
*ctx
,
955 return emit_minmax_int(ctx
, LLVMIntSGT
, src0
,
956 LLVMBuildNeg(ctx
->builder
, src0
, ""));
959 static LLVMValueRef
emit_fsign(struct nir_to_llvm_context
*ctx
,
962 LLVMValueRef cmp
, val
;
964 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGT
, src0
, ctx
->f32zero
, "");
965 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->f32one
, src0
, "");
966 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
, val
, ctx
->f32zero
, "");
967 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstReal(ctx
->f32
, -1.0), "");
971 static LLVMValueRef
emit_isign(struct nir_to_llvm_context
*ctx
,
974 LLVMValueRef cmp
, val
;
976 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGT
, src0
, ctx
->i32zero
, "");
977 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->i32one
, src0
, "");
978 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGE
, val
, ctx
->i32zero
, "");
979 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstInt(ctx
->i32
, -1, true), "");
983 static LLVMValueRef
emit_ffract(struct nir_to_llvm_context
*ctx
,
986 const char *intr
= "llvm.floor.f32";
987 LLVMValueRef fsrc0
= to_float(ctx
, src0
);
988 LLVMValueRef params
[] = {
991 LLVMValueRef floor
= ac_emit_llvm_intrinsic(&ctx
->ac
, intr
,
993 AC_FUNC_ATTR_READNONE
);
994 return LLVMBuildFSub(ctx
->builder
, fsrc0
, floor
, "");
997 static LLVMValueRef
emit_uint_carry(struct nir_to_llvm_context
*ctx
,
999 LLVMValueRef src0
, LLVMValueRef src1
)
1001 LLVMTypeRef ret_type
;
1002 LLVMTypeRef types
[] = { ctx
->i32
, ctx
->i1
};
1004 LLVMValueRef params
[] = { src0
, src1
};
1005 ret_type
= LLVMStructTypeInContext(ctx
->context
, types
,
1008 res
= ac_emit_llvm_intrinsic(&ctx
->ac
, intrin
, ret_type
,
1009 params
, 2, AC_FUNC_ATTR_READNONE
);
1011 res
= LLVMBuildExtractValue(ctx
->builder
, res
, 1, "");
1012 res
= LLVMBuildZExt(ctx
->builder
, res
, ctx
->i32
, "");
1016 static LLVMValueRef
emit_b2f(struct nir_to_llvm_context
*ctx
,
1019 return LLVMBuildAnd(ctx
->builder
, src0
, LLVMBuildBitCast(ctx
->builder
, LLVMConstReal(ctx
->f32
, 1.0), ctx
->i32
, ""), "");
1022 static LLVMValueRef
emit_umul_high(struct nir_to_llvm_context
*ctx
,
1023 LLVMValueRef src0
, LLVMValueRef src1
)
1025 LLVMValueRef dst64
, result
;
1026 src0
= LLVMBuildZExt(ctx
->builder
, src0
, ctx
->i64
, "");
1027 src1
= LLVMBuildZExt(ctx
->builder
, src1
, ctx
->i64
, "");
1029 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1030 dst64
= LLVMBuildLShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1031 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1035 static LLVMValueRef
emit_imul_high(struct nir_to_llvm_context
*ctx
,
1036 LLVMValueRef src0
, LLVMValueRef src1
)
1038 LLVMValueRef dst64
, result
;
1039 src0
= LLVMBuildSExt(ctx
->builder
, src0
, ctx
->i64
, "");
1040 src1
= LLVMBuildSExt(ctx
->builder
, src1
, ctx
->i64
, "");
1042 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1043 dst64
= LLVMBuildAShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1044 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1048 static LLVMValueRef
emit_bitfield_extract(struct nir_to_llvm_context
*ctx
,
1050 LLVMValueRef srcs
[3])
1052 LLVMValueRef result
;
1053 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, srcs
[2], LLVMConstInt(ctx
->i32
, 32, false), "");
1054 result
= ac_emit_llvm_intrinsic(&ctx
->ac
, intrin
, ctx
->i32
, srcs
, 3, AC_FUNC_ATTR_READNONE
);
1056 result
= LLVMBuildSelect(ctx
->builder
, icond
, srcs
[0], result
, "");
1060 static LLVMValueRef
emit_bitfield_insert(struct nir_to_llvm_context
*ctx
,
1061 LLVMValueRef src0
, LLVMValueRef src1
,
1062 LLVMValueRef src2
, LLVMValueRef src3
)
1064 LLVMValueRef bfi_args
[3], result
;
1066 bfi_args
[0] = LLVMBuildShl(ctx
->builder
,
1067 LLVMBuildSub(ctx
->builder
,
1068 LLVMBuildShl(ctx
->builder
,
1073 bfi_args
[1] = LLVMBuildShl(ctx
->builder
, src1
, src2
, "");
1076 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, src3
, LLVMConstInt(ctx
->i32
, 32, false), "");
1079 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
1080 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
1082 result
= LLVMBuildXor(ctx
->builder
, bfi_args
[2],
1083 LLVMBuildAnd(ctx
->builder
, bfi_args
[0],
1084 LLVMBuildXor(ctx
->builder
, bfi_args
[1], bfi_args
[2], ""), ""), "");
1086 result
= LLVMBuildSelect(ctx
->builder
, icond
, src1
, result
, "");
1090 static LLVMValueRef
emit_pack_half_2x16(struct nir_to_llvm_context
*ctx
,
1093 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1095 LLVMValueRef comp
[2];
1097 src0
= to_float(ctx
, src0
);
1098 comp
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, "");
1099 comp
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, "");
1100 for (i
= 0; i
< 2; i
++) {
1101 comp
[i
] = LLVMBuildFPTrunc(ctx
->builder
, comp
[i
], ctx
->f16
, "");
1102 comp
[i
] = LLVMBuildBitCast(ctx
->builder
, comp
[i
], ctx
->i16
, "");
1103 comp
[i
] = LLVMBuildZExt(ctx
->builder
, comp
[i
], ctx
->i32
, "");
1106 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
1107 comp
[0] = LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
1112 static LLVMValueRef
emit_unpack_half_2x16(struct nir_to_llvm_context
*ctx
,
1115 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1116 LLVMValueRef temps
[2], result
, val
;
1119 for (i
= 0; i
< 2; i
++) {
1120 val
= i
== 1 ? LLVMBuildLShr(ctx
->builder
, src0
, const16
, "") : src0
;
1121 val
= LLVMBuildTrunc(ctx
->builder
, val
, ctx
->i16
, "");
1122 val
= LLVMBuildBitCast(ctx
->builder
, val
, ctx
->f16
, "");
1123 temps
[i
] = LLVMBuildFPExt(ctx
->builder
, val
, ctx
->f32
, "");
1126 result
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), temps
[0],
1128 result
= LLVMBuildInsertElement(ctx
->builder
, result
, temps
[1],
1133 static LLVMValueRef
emit_ddxy(struct nir_to_llvm_context
*ctx
,
1139 LLVMValueRef result
;
1140 ctx
->has_ddxy
= true;
1142 if (!ctx
->lds
&& !ctx
->has_ds_bpermute
)
1143 ctx
->lds
= LLVMAddGlobalInAddressSpace(ctx
->module
,
1144 LLVMArrayType(ctx
->i32
, 64),
1145 "ddxy_lds", LOCAL_ADDR_SPACE
);
1147 if (op
== nir_op_fddx_fine
|| op
== nir_op_fddx
)
1148 mask
= AC_TID_MASK_LEFT
;
1149 else if (op
== nir_op_fddy_fine
|| op
== nir_op_fddy
)
1150 mask
= AC_TID_MASK_TOP
;
1152 mask
= AC_TID_MASK_TOP_LEFT
;
1154 /* for DDX we want to next X pixel, DDY next Y pixel. */
1155 if (op
== nir_op_fddx_fine
||
1156 op
== nir_op_fddx_coarse
||
1162 result
= ac_emit_ddxy(&ctx
->ac
, ctx
->has_ds_bpermute
,
1163 mask
, idx
, ctx
->lds
,
1169 * this takes an I,J coordinate pair,
1170 * and works out the X and Y derivatives.
1171 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
1173 static LLVMValueRef
emit_ddxy_interp(
1174 struct nir_to_llvm_context
*ctx
,
1175 LLVMValueRef interp_ij
)
1177 LLVMValueRef result
[4], a
;
1180 for (i
= 0; i
< 2; i
++) {
1181 a
= LLVMBuildExtractElement(ctx
->builder
, interp_ij
,
1182 LLVMConstInt(ctx
->i32
, i
, false), "");
1183 result
[i
] = emit_ddxy(ctx
, nir_op_fddx
, a
);
1184 result
[2+i
] = emit_ddxy(ctx
, nir_op_fddy
, a
);
1186 return ac_build_gather_values(&ctx
->ac
, result
, 4);
1189 static void visit_alu(struct nir_to_llvm_context
*ctx
, nir_alu_instr
*instr
)
1191 LLVMValueRef src
[4], result
= NULL
;
1192 unsigned num_components
= instr
->dest
.dest
.ssa
.num_components
;
1193 unsigned src_components
;
1194 LLVMTypeRef def_type
= get_def_type(ctx
, &instr
->dest
.dest
.ssa
);
1196 assert(nir_op_infos
[instr
->op
].num_inputs
<= ARRAY_SIZE(src
));
1197 switch (instr
->op
) {
1203 case nir_op_pack_half_2x16
:
1206 case nir_op_unpack_half_2x16
:
1210 src_components
= num_components
;
1213 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1214 src
[i
] = get_alu_src(ctx
, instr
->src
[i
], src_components
);
1216 switch (instr
->op
) {
1222 src
[0] = to_float(ctx
, src
[0]);
1223 result
= LLVMBuildFNeg(ctx
->builder
, src
[0], "");
1226 result
= LLVMBuildNeg(ctx
->builder
, src
[0], "");
1229 result
= LLVMBuildNot(ctx
->builder
, src
[0], "");
1232 result
= LLVMBuildAdd(ctx
->builder
, src
[0], src
[1], "");
1235 src
[0] = to_float(ctx
, src
[0]);
1236 src
[1] = to_float(ctx
, src
[1]);
1237 result
= LLVMBuildFAdd(ctx
->builder
, src
[0], src
[1], "");
1240 src
[0] = to_float(ctx
, src
[0]);
1241 src
[1] = to_float(ctx
, src
[1]);
1242 result
= LLVMBuildFSub(ctx
->builder
, src
[0], src
[1], "");
1245 result
= LLVMBuildSub(ctx
->builder
, src
[0], src
[1], "");
1248 result
= LLVMBuildMul(ctx
->builder
, src
[0], src
[1], "");
1251 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1254 result
= LLVMBuildURem(ctx
->builder
, src
[0], src
[1], "");
1257 src
[0] = to_float(ctx
, src
[0]);
1258 src
[1] = to_float(ctx
, src
[1]);
1259 result
= ac_emit_fdiv(&ctx
->ac
, src
[0], src
[1]);
1260 result
= emit_intrin_1f_param(ctx
, "llvm.floor",
1261 to_float_type(ctx
, def_type
), result
);
1262 result
= LLVMBuildFMul(ctx
->builder
, src
[1] , result
, "");
1263 result
= LLVMBuildFSub(ctx
->builder
, src
[0], result
, "");
1266 src
[0] = to_float(ctx
, src
[0]);
1267 src
[1] = to_float(ctx
, src
[1]);
1268 result
= LLVMBuildFRem(ctx
->builder
, src
[0], src
[1], "");
1271 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1274 result
= LLVMBuildSDiv(ctx
->builder
, src
[0], src
[1], "");
1277 result
= LLVMBuildUDiv(ctx
->builder
, src
[0], src
[1], "");
1280 src
[0] = to_float(ctx
, src
[0]);
1281 src
[1] = to_float(ctx
, src
[1]);
1282 result
= LLVMBuildFMul(ctx
->builder
, src
[0], src
[1], "");
1285 src
[0] = to_float(ctx
, src
[0]);
1286 src
[1] = to_float(ctx
, src
[1]);
1287 result
= ac_emit_fdiv(&ctx
->ac
, src
[0], src
[1]);
1290 src
[0] = to_float(ctx
, src
[0]);
1291 result
= ac_emit_fdiv(&ctx
->ac
, ctx
->f32one
, src
[0]);
1294 result
= LLVMBuildAnd(ctx
->builder
, src
[0], src
[1], "");
1297 result
= LLVMBuildOr(ctx
->builder
, src
[0], src
[1], "");
1300 result
= LLVMBuildXor(ctx
->builder
, src
[0], src
[1], "");
1303 result
= LLVMBuildShl(ctx
->builder
, src
[0], src
[1], "");
1306 result
= LLVMBuildAShr(ctx
->builder
, src
[0], src
[1], "");
1309 result
= LLVMBuildLShr(ctx
->builder
, src
[0], src
[1], "");
1312 result
= emit_int_cmp(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1315 result
= emit_int_cmp(ctx
, LLVMIntNE
, src
[0], src
[1]);
1318 result
= emit_int_cmp(ctx
, LLVMIntEQ
, src
[0], src
[1]);
1321 result
= emit_int_cmp(ctx
, LLVMIntSGE
, src
[0], src
[1]);
1324 result
= emit_int_cmp(ctx
, LLVMIntULT
, src
[0], src
[1]);
1327 result
= emit_int_cmp(ctx
, LLVMIntUGE
, src
[0], src
[1]);
1330 result
= emit_float_cmp(ctx
, LLVMRealUEQ
, src
[0], src
[1]);
1333 result
= emit_float_cmp(ctx
, LLVMRealUNE
, src
[0], src
[1]);
1336 result
= emit_float_cmp(ctx
, LLVMRealULT
, src
[0], src
[1]);
1339 result
= emit_float_cmp(ctx
, LLVMRealUGE
, src
[0], src
[1]);
1342 result
= emit_intrin_1f_param(ctx
, "llvm.fabs",
1343 to_float_type(ctx
, def_type
), src
[0]);
1346 result
= emit_iabs(ctx
, src
[0]);
1349 result
= emit_minmax_int(ctx
, LLVMIntSGT
, src
[0], src
[1]);
1352 result
= emit_minmax_int(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1355 result
= emit_minmax_int(ctx
, LLVMIntUGT
, src
[0], src
[1]);
1358 result
= emit_minmax_int(ctx
, LLVMIntULT
, src
[0], src
[1]);
1361 result
= emit_isign(ctx
, src
[0]);
1364 src
[0] = to_float(ctx
, src
[0]);
1365 result
= emit_fsign(ctx
, src
[0]);
1368 result
= emit_intrin_1f_param(ctx
, "llvm.floor",
1369 to_float_type(ctx
, def_type
), src
[0]);
1372 result
= emit_intrin_1f_param(ctx
, "llvm.trunc",
1373 to_float_type(ctx
, def_type
), src
[0]);
1376 result
= emit_intrin_1f_param(ctx
, "llvm.ceil",
1377 to_float_type(ctx
, def_type
), src
[0]);
1379 case nir_op_fround_even
:
1380 result
= emit_intrin_1f_param(ctx
, "llvm.rint",
1381 to_float_type(ctx
, def_type
),src
[0]);
1384 result
= emit_ffract(ctx
, src
[0]);
1387 result
= emit_intrin_1f_param(ctx
, "llvm.sin",
1388 to_float_type(ctx
, def_type
), src
[0]);
1391 result
= emit_intrin_1f_param(ctx
, "llvm.cos",
1392 to_float_type(ctx
, def_type
), src
[0]);
1395 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt",
1396 to_float_type(ctx
, def_type
), src
[0]);
1399 result
= emit_intrin_1f_param(ctx
, "llvm.exp2",
1400 to_float_type(ctx
, def_type
), src
[0]);
1403 result
= emit_intrin_1f_param(ctx
, "llvm.log2",
1404 to_float_type(ctx
, def_type
), src
[0]);
1407 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt",
1408 to_float_type(ctx
, def_type
), src
[0]);
1409 result
= ac_emit_fdiv(&ctx
->ac
, ctx
->f32one
, result
);
1412 result
= emit_intrin_2f_param(ctx
, "llvm.pow",
1413 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1416 result
= emit_intrin_2f_param(ctx
, "llvm.maxnum",
1417 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1420 result
= emit_intrin_2f_param(ctx
, "llvm.minnum",
1421 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1424 result
= emit_intrin_3f_param(ctx
, "llvm.fma",
1425 to_float_type(ctx
, def_type
), src
[0], src
[1], src
[2]);
1427 case nir_op_ibitfield_extract
:
1428 result
= emit_bitfield_extract(ctx
, "llvm.AMDGPU.bfe.i32", src
);
1430 case nir_op_ubitfield_extract
:
1431 result
= emit_bitfield_extract(ctx
, "llvm.AMDGPU.bfe.u32", src
);
1433 case nir_op_bitfield_insert
:
1434 result
= emit_bitfield_insert(ctx
, src
[0], src
[1], src
[2], src
[3]);
1436 case nir_op_bitfield_reverse
:
1437 result
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.bitreverse.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1439 case nir_op_bit_count
:
1440 result
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.ctpop.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1445 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1446 src
[i
] = to_integer(ctx
, src
[i
]);
1447 result
= ac_build_gather_values(&ctx
->ac
, src
, num_components
);
1451 src
[0] = to_float(ctx
, src
[0]);
1452 result
= LLVMBuildFPToSI(ctx
->builder
, src
[0], def_type
, "");
1456 src
[0] = to_float(ctx
, src
[0]);
1457 result
= LLVMBuildFPToUI(ctx
->builder
, src
[0], def_type
, "");
1461 result
= LLVMBuildSIToFP(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1465 result
= LLVMBuildUIToFP(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1468 result
= LLVMBuildFPExt(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1471 result
= LLVMBuildFPTrunc(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1474 result
= emit_bcsel(ctx
, src
[0], src
[1], src
[2]);
1476 case nir_op_find_lsb
:
1477 result
= emit_find_lsb(ctx
, src
[0]);
1479 case nir_op_ufind_msb
:
1480 result
= emit_ufind_msb(ctx
, src
[0]);
1482 case nir_op_ifind_msb
:
1483 result
= emit_ifind_msb(ctx
, src
[0]);
1485 case nir_op_uadd_carry
:
1486 result
= emit_uint_carry(ctx
, "llvm.uadd.with.overflow.i32", src
[0], src
[1]);
1488 case nir_op_usub_borrow
:
1489 result
= emit_uint_carry(ctx
, "llvm.usub.with.overflow.i32", src
[0], src
[1]);
1492 result
= emit_b2f(ctx
, src
[0]);
1494 case nir_op_fquantize2f16
:
1495 src
[0] = to_float(ctx
, src
[0]);
1496 result
= LLVMBuildFPTrunc(ctx
->builder
, src
[0], ctx
->f16
, "");
1497 /* need to convert back up to f32 */
1498 result
= LLVMBuildFPExt(ctx
->builder
, result
, ctx
->f32
, "");
1500 case nir_op_umul_high
:
1501 result
= emit_umul_high(ctx
, src
[0], src
[1]);
1503 case nir_op_imul_high
:
1504 result
= emit_imul_high(ctx
, src
[0], src
[1]);
1506 case nir_op_pack_half_2x16
:
1507 result
= emit_pack_half_2x16(ctx
, src
[0]);
1509 case nir_op_unpack_half_2x16
:
1510 result
= emit_unpack_half_2x16(ctx
, src
[0]);
1514 case nir_op_fddx_fine
:
1515 case nir_op_fddy_fine
:
1516 case nir_op_fddx_coarse
:
1517 case nir_op_fddy_coarse
:
1518 result
= emit_ddxy(ctx
, instr
->op
, src
[0]);
1521 fprintf(stderr
, "Unknown NIR alu instr: ");
1522 nir_print_instr(&instr
->instr
, stderr
);
1523 fprintf(stderr
, "\n");
1528 assert(instr
->dest
.dest
.is_ssa
);
1529 result
= to_integer(ctx
, result
);
1530 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.dest
.ssa
,
1535 static void visit_load_const(struct nir_to_llvm_context
*ctx
,
1536 nir_load_const_instr
*instr
)
1538 LLVMValueRef values
[4], value
= NULL
;
1539 LLVMTypeRef element_type
=
1540 LLVMIntTypeInContext(ctx
->context
, instr
->def
.bit_size
);
1542 for (unsigned i
= 0; i
< instr
->def
.num_components
; ++i
) {
1543 switch (instr
->def
.bit_size
) {
1545 values
[i
] = LLVMConstInt(element_type
,
1546 instr
->value
.u32
[i
], false);
1549 values
[i
] = LLVMConstInt(element_type
,
1550 instr
->value
.u64
[i
], false);
1554 "unsupported nir load_const bit_size: %d\n",
1555 instr
->def
.bit_size
);
1559 if (instr
->def
.num_components
> 1) {
1560 value
= LLVMConstVector(values
, instr
->def
.num_components
);
1564 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, value
);
1567 static LLVMValueRef
cast_ptr(struct nir_to_llvm_context
*ctx
, LLVMValueRef ptr
,
1570 int addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
1571 return LLVMBuildBitCast(ctx
->builder
, ptr
,
1572 LLVMPointerType(type
, addr_space
), "");
1576 get_buffer_size(struct nir_to_llvm_context
*ctx
, LLVMValueRef descriptor
, bool in_elements
)
1579 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1580 LLVMConstInt(ctx
->i32
, 2, false), "");
1583 if (ctx
->options
->chip_class
>= VI
&& in_elements
) {
1584 /* On VI, the descriptor contains the size in bytes,
1585 * but TXQ must return the size in elements.
1586 * The stride is always non-zero for resources using TXQ.
1588 LLVMValueRef stride
=
1589 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1590 LLVMConstInt(ctx
->i32
, 1, false), "");
1591 stride
= LLVMBuildLShr(ctx
->builder
, stride
,
1592 LLVMConstInt(ctx
->i32
, 16, false), "");
1593 stride
= LLVMBuildAnd(ctx
->builder
, stride
,
1594 LLVMConstInt(ctx
->i32
, 0x3fff, false), "");
1596 size
= LLVMBuildUDiv(ctx
->builder
, size
, stride
, "");
1602 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
1605 static void build_int_type_name(
1607 char *buf
, unsigned bufsize
)
1609 assert(bufsize
>= 6);
1611 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
1612 snprintf(buf
, bufsize
, "v%ui32",
1613 LLVMGetVectorSize(type
));
1618 static LLVMValueRef
radv_lower_gather4_integer(struct nir_to_llvm_context
*ctx
,
1619 struct ac_tex_info
*tinfo
,
1620 nir_tex_instr
*instr
,
1621 const char *intr_name
,
1622 unsigned coord_vgpr_index
)
1624 LLVMValueRef coord
= tinfo
->args
[0];
1625 LLVMValueRef half_texel
[2];
1630 LLVMValueRef txq_args
[10];
1631 int txq_arg_count
= 0;
1633 bool da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
1634 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, false);
1635 txq_args
[txq_arg_count
++] = tinfo
->args
[1];
1636 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0xf, 0); /* dmask */
1637 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* unorm */
1638 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* r128 */
1639 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, da
? 1 : 0, 0);
1640 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* glc */
1641 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* slc */
1642 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* tfe */
1643 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* lwe */
1644 size
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.getresinfo.i32", ctx
->v4i32
,
1645 txq_args
, txq_arg_count
,
1646 AC_FUNC_ATTR_READNONE
);
1648 for (c
= 0; c
< 2; c
++) {
1649 half_texel
[c
] = LLVMBuildExtractElement(ctx
->builder
, size
,
1650 LLVMConstInt(ctx
->i32
, c
, false), "");
1651 half_texel
[c
] = LLVMBuildUIToFP(ctx
->builder
, half_texel
[c
], ctx
->f32
, "");
1652 half_texel
[c
] = ac_emit_fdiv(&ctx
->ac
, ctx
->f32one
, half_texel
[c
]);
1653 half_texel
[c
] = LLVMBuildFMul(ctx
->builder
, half_texel
[c
],
1654 LLVMConstReal(ctx
->f32
, -0.5), "");
1658 for (c
= 0; c
< 2; c
++) {
1660 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
1661 tmp
= LLVMBuildExtractElement(ctx
->builder
, coord
, index
, "");
1662 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
1663 tmp
= LLVMBuildFAdd(ctx
->builder
, tmp
, half_texel
[c
], "");
1664 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
1665 coord
= LLVMBuildInsertElement(ctx
->builder
, coord
, tmp
, index
, "");
1668 tinfo
->args
[0] = coord
;
1669 return ac_emit_llvm_intrinsic(&ctx
->ac
, intr_name
, tinfo
->dst_type
, tinfo
->args
, tinfo
->arg_count
,
1670 AC_FUNC_ATTR_READNONE
| AC_FUNC_ATTR_NOUNWIND
);
1674 static LLVMValueRef
build_tex_intrinsic(struct nir_to_llvm_context
*ctx
,
1675 nir_tex_instr
*instr
,
1676 struct ac_tex_info
*tinfo
)
1678 const char *name
= "llvm.SI.image.sample";
1679 const char *infix
= "";
1680 char intr_name
[127];
1682 bool is_shadow
= instr
->is_shadow
;
1683 bool has_offset
= tinfo
->has_offset
;
1684 switch (instr
->op
) {
1686 case nir_texop_txf_ms
:
1687 case nir_texop_samples_identical
:
1688 name
= instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
? "llvm.SI.image.load" :
1689 instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
? "llvm.SI.vs.load.input" :
1690 "llvm.SI.image.load.mip";
1701 name
= "llvm.SI.getresinfo";
1703 case nir_texop_query_levels
:
1704 name
= "llvm.SI.getresinfo";
1707 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
1714 name
= "llvm.SI.gather4";
1718 name
= "llvm.SI.getlod";
1726 build_int_type_name(LLVMTypeOf(tinfo
->args
[0]), type
, sizeof(type
));
1727 sprintf(intr_name
, "%s%s%s%s.%s", name
, is_shadow
? ".c" : "", infix
,
1728 has_offset
? ".o" : "", type
);
1730 if (instr
->op
== nir_texop_tg4
) {
1731 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
1732 if (stype
== GLSL_TYPE_UINT
|| stype
== GLSL_TYPE_INT
) {
1733 return radv_lower_gather4_integer(ctx
, tinfo
, instr
, intr_name
,
1734 (int)has_offset
+ (int)is_shadow
);
1737 return ac_emit_llvm_intrinsic(&ctx
->ac
, intr_name
, tinfo
->dst_type
, tinfo
->args
, tinfo
->arg_count
,
1738 AC_FUNC_ATTR_READNONE
| AC_FUNC_ATTR_NOUNWIND
);
1742 static LLVMValueRef
visit_vulkan_resource_index(struct nir_to_llvm_context
*ctx
,
1743 nir_intrinsic_instr
*instr
)
1745 LLVMValueRef index
= get_src(ctx
, instr
->src
[0]);
1746 unsigned desc_set
= nir_intrinsic_desc_set(instr
);
1747 unsigned binding
= nir_intrinsic_binding(instr
);
1748 LLVMValueRef desc_ptr
= ctx
->descriptor_sets
[desc_set
];
1749 struct radv_descriptor_set_layout
*layout
= ctx
->options
->layout
->set
[desc_set
].layout
;
1750 unsigned base_offset
= layout
->binding
[binding
].offset
;
1751 LLVMValueRef offset
, stride
;
1753 if (layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
||
1754 layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
) {
1755 desc_ptr
= ctx
->push_constants
;
1756 base_offset
= ctx
->options
->layout
->push_constant_size
;
1757 base_offset
+= 16 * layout
->binding
[binding
].dynamic_offset_offset
;
1758 stride
= LLVMConstInt(ctx
->i32
, 16, false);
1760 stride
= LLVMConstInt(ctx
->i32
, layout
->binding
[binding
].size
, false);
1762 offset
= LLVMConstInt(ctx
->i32
, base_offset
, false);
1763 index
= LLVMBuildMul(ctx
->builder
, index
, stride
, "");
1764 offset
= LLVMBuildAdd(ctx
->builder
, offset
, index
, "");
1766 desc_ptr
= ac_build_gep0(&ctx
->ac
, desc_ptr
, offset
);
1767 desc_ptr
= cast_ptr(ctx
, desc_ptr
, ctx
->v4i32
);
1768 LLVMSetMetadata(desc_ptr
, ctx
->uniform_md_kind
, ctx
->empty_md
);
1770 return LLVMBuildLoad(ctx
->builder
, desc_ptr
, "");
1773 static LLVMValueRef
visit_load_push_constant(struct nir_to_llvm_context
*ctx
,
1774 nir_intrinsic_instr
*instr
)
1776 LLVMValueRef ptr
, addr
;
1778 addr
= LLVMConstInt(ctx
->i32
, nir_intrinsic_base(instr
), 0);
1779 addr
= LLVMBuildAdd(ctx
->builder
, addr
, get_src(ctx
, instr
->src
[0]), "");
1781 ptr
= ac_build_gep0(&ctx
->ac
, ctx
->push_constants
, addr
);
1782 ptr
= cast_ptr(ctx
, ptr
, get_def_type(ctx
, &instr
->dest
.ssa
));
1784 return LLVMBuildLoad(ctx
->builder
, ptr
, "");
1787 static LLVMValueRef
visit_get_buffer_size(struct nir_to_llvm_context
*ctx
,
1788 nir_intrinsic_instr
*instr
)
1790 LLVMValueRef desc
= get_src(ctx
, instr
->src
[0]);
1792 return get_buffer_size(ctx
, desc
, false);
1794 static void visit_store_ssbo(struct nir_to_llvm_context
*ctx
,
1795 nir_intrinsic_instr
*instr
)
1797 const char *store_name
;
1798 LLVMValueRef src_data
= get_src(ctx
, instr
->src
[0]);
1799 LLVMTypeRef data_type
= ctx
->f32
;
1800 int elem_size_mult
= get_elem_bits(ctx
, LLVMTypeOf(src_data
)) / 32;
1801 int components_32bit
= elem_size_mult
* instr
->num_components
;
1802 unsigned writemask
= nir_intrinsic_write_mask(instr
);
1803 LLVMValueRef base_data
, base_offset
;
1804 LLVMValueRef params
[6];
1806 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
1807 ctx
->shader_info
->fs
.writes_memory
= true;
1809 params
[1] = get_src(ctx
, instr
->src
[1]);
1810 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
1811 params
[4] = LLVMConstInt(ctx
->i1
, 0, false); /* glc */
1812 params
[5] = LLVMConstInt(ctx
->i1
, 0, false); /* slc */
1814 if (components_32bit
> 1)
1815 data_type
= LLVMVectorType(ctx
->f32
, components_32bit
);
1817 base_data
= to_float(ctx
, src_data
);
1818 base_data
= trim_vector(ctx
, base_data
, instr
->num_components
);
1819 base_data
= LLVMBuildBitCast(ctx
->builder
, base_data
,
1821 base_offset
= get_src(ctx
, instr
->src
[2]); /* voffset */
1825 LLVMValueRef offset
;
1827 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
1829 /* Due to an LLVM limitation, split 3-element writes
1830 * into a 2-element and a 1-element write. */
1832 writemask
|= 1 << (start
+ 2);
1836 start
*= elem_size_mult
;
1837 count
*= elem_size_mult
;
1840 writemask
|= ((1u << (count
- 4)) - 1u) << (start
+ 4);
1845 store_name
= "llvm.amdgcn.buffer.store.v4f32";
1847 } else if (count
== 2) {
1848 tmp
= LLVMBuildExtractElement(ctx
->builder
,
1849 base_data
, LLVMConstInt(ctx
->i32
, start
, false), "");
1850 data
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), tmp
,
1853 tmp
= LLVMBuildExtractElement(ctx
->builder
,
1854 base_data
, LLVMConstInt(ctx
->i32
, start
+ 1, false), "");
1855 data
= LLVMBuildInsertElement(ctx
->builder
, data
, tmp
,
1857 store_name
= "llvm.amdgcn.buffer.store.v2f32";
1861 if (get_llvm_num_components(base_data
) > 1)
1862 data
= LLVMBuildExtractElement(ctx
->builder
, base_data
,
1863 LLVMConstInt(ctx
->i32
, start
, false), "");
1866 store_name
= "llvm.amdgcn.buffer.store.f32";
1869 offset
= base_offset
;
1871 offset
= LLVMBuildAdd(ctx
->builder
, offset
, LLVMConstInt(ctx
->i32
, start
* 4, false), "");
1875 ac_emit_llvm_intrinsic(&ctx
->ac
, store_name
,
1876 ctx
->voidt
, params
, 6, 0);
1880 static LLVMValueRef
visit_atomic_ssbo(struct nir_to_llvm_context
*ctx
,
1881 nir_intrinsic_instr
*instr
)
1884 LLVMValueRef params
[6];
1886 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
1887 ctx
->shader_info
->fs
.writes_memory
= true;
1889 if (instr
->intrinsic
== nir_intrinsic_ssbo_atomic_comp_swap
) {
1890 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[3]), 0);
1892 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[2]), 0);
1893 params
[arg_count
++] = get_src(ctx
, instr
->src
[0]);
1894 params
[arg_count
++] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
1895 params
[arg_count
++] = get_src(ctx
, instr
->src
[1]); /* voffset */
1896 params
[arg_count
++] = LLVMConstInt(ctx
->i1
, 0, false); /* slc */
1898 switch (instr
->intrinsic
) {
1899 case nir_intrinsic_ssbo_atomic_add
:
1900 name
= "llvm.amdgcn.buffer.atomic.add";
1902 case nir_intrinsic_ssbo_atomic_imin
:
1903 name
= "llvm.amdgcn.buffer.atomic.smin";
1905 case nir_intrinsic_ssbo_atomic_umin
:
1906 name
= "llvm.amdgcn.buffer.atomic.umin";
1908 case nir_intrinsic_ssbo_atomic_imax
:
1909 name
= "llvm.amdgcn.buffer.atomic.smax";
1911 case nir_intrinsic_ssbo_atomic_umax
:
1912 name
= "llvm.amdgcn.buffer.atomic.umax";
1914 case nir_intrinsic_ssbo_atomic_and
:
1915 name
= "llvm.amdgcn.buffer.atomic.and";
1917 case nir_intrinsic_ssbo_atomic_or
:
1918 name
= "llvm.amdgcn.buffer.atomic.or";
1920 case nir_intrinsic_ssbo_atomic_xor
:
1921 name
= "llvm.amdgcn.buffer.atomic.xor";
1923 case nir_intrinsic_ssbo_atomic_exchange
:
1924 name
= "llvm.amdgcn.buffer.atomic.swap";
1926 case nir_intrinsic_ssbo_atomic_comp_swap
:
1927 name
= "llvm.amdgcn.buffer.atomic.cmpswap";
1933 return ac_emit_llvm_intrinsic(&ctx
->ac
, name
, ctx
->i32
, params
, arg_count
, 0);
1936 static LLVMValueRef
visit_load_buffer(struct nir_to_llvm_context
*ctx
,
1937 nir_intrinsic_instr
*instr
)
1939 LLVMValueRef results
[2];
1940 int load_components
;
1941 int num_components
= instr
->num_components
;
1942 if (instr
->dest
.ssa
.bit_size
== 64)
1943 num_components
*= 2;
1945 for (int i
= 0; i
< num_components
; i
+= load_components
) {
1946 load_components
= MIN2(num_components
- i
, 4);
1947 const char *load_name
;
1948 LLVMTypeRef data_type
= ctx
->f32
;
1949 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, i
* 4, false);
1950 offset
= LLVMBuildAdd(ctx
->builder
, get_src(ctx
, instr
->src
[1]), offset
, "");
1952 if (load_components
== 3)
1953 data_type
= LLVMVectorType(ctx
->f32
, 4);
1954 else if (load_components
> 1)
1955 data_type
= LLVMVectorType(ctx
->f32
, load_components
);
1957 if (load_components
>= 3)
1958 load_name
= "llvm.amdgcn.buffer.load.v4f32";
1959 else if (load_components
== 2)
1960 load_name
= "llvm.amdgcn.buffer.load.v2f32";
1961 else if (load_components
== 1)
1962 load_name
= "llvm.amdgcn.buffer.load.f32";
1964 unreachable("unhandled number of components");
1966 LLVMValueRef params
[] = {
1967 get_src(ctx
, instr
->src
[0]),
1968 LLVMConstInt(ctx
->i32
, 0, false),
1970 LLVMConstInt(ctx
->i1
, 0, false),
1971 LLVMConstInt(ctx
->i1
, 0, false),
1974 results
[i
] = ac_emit_llvm_intrinsic(&ctx
->ac
, load_name
, data_type
, params
, 5, 0);
1978 LLVMValueRef ret
= results
[0];
1979 if (num_components
> 4 || num_components
== 3) {
1980 LLVMValueRef masks
[] = {
1981 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
1982 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false),
1983 LLVMConstInt(ctx
->i32
, 4, false), LLVMConstInt(ctx
->i32
, 5, false),
1984 LLVMConstInt(ctx
->i32
, 6, false), LLVMConstInt(ctx
->i32
, 7, false)
1987 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
1988 ret
= LLVMBuildShuffleVector(ctx
->builder
, results
[0],
1989 results
[num_components
> 4 ? 1 : 0], swizzle
, "");
1992 return LLVMBuildBitCast(ctx
->builder
, ret
,
1993 get_def_type(ctx
, &instr
->dest
.ssa
), "");
1996 static LLVMValueRef
visit_load_ubo_buffer(struct nir_to_llvm_context
*ctx
,
1997 nir_intrinsic_instr
*instr
)
1999 LLVMValueRef results
[8], ret
;
2000 LLVMValueRef rsrc
= get_src(ctx
, instr
->src
[0]);
2001 LLVMValueRef offset
= get_src(ctx
, instr
->src
[1]);
2002 int num_components
= instr
->num_components
;
2004 rsrc
= LLVMBuildBitCast(ctx
->builder
, rsrc
, LLVMVectorType(ctx
->i8
, 16), "");
2006 if (instr
->dest
.ssa
.bit_size
== 64)
2007 num_components
*= 2;
2009 for (unsigned i
= 0; i
< num_components
; ++i
) {
2010 LLVMValueRef params
[] = {
2012 LLVMBuildAdd(ctx
->builder
, LLVMConstInt(ctx
->i32
, 4 * i
, 0),
2015 results
[i
] = ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.load.const", ctx
->f32
,
2016 params
, 2, AC_FUNC_ATTR_READNONE
);
2020 ret
= ac_build_gather_values(&ctx
->ac
, results
, instr
->num_components
);
2021 return LLVMBuildBitCast(ctx
->builder
, ret
,
2022 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2026 radv_get_deref_offset(struct nir_to_llvm_context
*ctx
, nir_deref
*tail
,
2027 bool vs_in
, unsigned *vertex_index_out
,
2028 unsigned *const_out
, LLVMValueRef
*indir_out
)
2030 unsigned const_offset
= 0;
2031 LLVMValueRef offset
= NULL
;
2033 if (vertex_index_out
!= NULL
) {
2035 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2036 *vertex_index_out
= deref_array
->base_offset
;
2039 while (tail
->child
!= NULL
) {
2040 const struct glsl_type
*parent_type
= tail
->type
;
2043 if (tail
->deref_type
== nir_deref_type_array
) {
2044 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2045 LLVMValueRef index
, stride
, local_offset
;
2046 unsigned size
= glsl_count_attribute_slots(tail
->type
, vs_in
);
2048 const_offset
+= size
* deref_array
->base_offset
;
2049 if (deref_array
->deref_array_type
== nir_deref_array_type_direct
)
2052 assert(deref_array
->deref_array_type
== nir_deref_array_type_indirect
);
2053 index
= get_src(ctx
, deref_array
->indirect
);
2054 stride
= LLVMConstInt(ctx
->i32
, size
, 0);
2055 local_offset
= LLVMBuildMul(ctx
->builder
, stride
, index
, "");
2058 offset
= LLVMBuildAdd(ctx
->builder
, offset
, local_offset
, "");
2060 offset
= local_offset
;
2061 } else if (tail
->deref_type
== nir_deref_type_struct
) {
2062 nir_deref_struct
*deref_struct
= nir_deref_as_struct(tail
);
2064 for (unsigned i
= 0; i
< deref_struct
->index
; i
++) {
2065 const struct glsl_type
*ft
= glsl_get_struct_field(parent_type
, i
);
2066 const_offset
+= glsl_count_attribute_slots(ft
, vs_in
);
2069 unreachable("unsupported deref type");
2073 if (const_offset
&& offset
)
2074 offset
= LLVMBuildAdd(ctx
->builder
, offset
,
2075 LLVMConstInt(ctx
->i32
, const_offset
, 0),
2078 *const_out
= const_offset
;
2079 *indir_out
= offset
;
2083 load_gs_input(struct nir_to_llvm_context
*ctx
,
2084 nir_intrinsic_instr
*instr
)
2086 LLVMValueRef indir_index
, vtx_offset
;
2087 unsigned const_index
;
2088 LLVMValueRef args
[9];
2089 unsigned param
, vtx_offset_param
;
2090 LLVMValueRef value
[4], result
;
2091 unsigned vertex_index
;
2092 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
,
2093 false, &vertex_index
,
2094 &const_index
, &indir_index
);
2095 vtx_offset_param
= vertex_index
;
2096 assert(vtx_offset_param
< 6);
2097 vtx_offset
= LLVMBuildMul(ctx
->builder
, ctx
->gs_vtx_offset
[vtx_offset_param
],
2098 LLVMConstInt(ctx
->i32
, 4, false), "");
2100 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2101 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2102 args
[0] = ctx
->esgs_ring
;
2103 args
[1] = vtx_offset
;
2104 args
[2] = LLVMConstInt(ctx
->i32
, (param
* 4 + i
+ const_index
) * 256, false);
2105 args
[3] = ctx
->i32zero
;
2106 args
[4] = ctx
->i32one
; /* OFFEN */
2107 args
[5] = ctx
->i32zero
; /* IDXEN */
2108 args
[6] = ctx
->i32one
; /* GLC */
2109 args
[7] = ctx
->i32zero
; /* SLC */
2110 args
[8] = ctx
->i32zero
; /* TFE */
2112 value
[i
] = ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.buffer.load.dword.i32.i32",
2113 ctx
->i32
, args
, 9, AC_FUNC_ATTR_READONLY
);
2115 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2120 static LLVMValueRef
visit_load_var(struct nir_to_llvm_context
*ctx
,
2121 nir_intrinsic_instr
*instr
)
2123 LLVMValueRef values
[8];
2124 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2125 int ve
= instr
->dest
.ssa
.num_components
;
2126 LLVMValueRef indir_index
;
2128 unsigned const_index
;
2129 bool vs_in
= ctx
->stage
== MESA_SHADER_VERTEX
&&
2130 instr
->variables
[0]->var
->data
.mode
== nir_var_shader_in
;
2131 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
, vs_in
, NULL
,
2132 &const_index
, &indir_index
);
2134 if (instr
->dest
.ssa
.bit_size
== 64)
2137 switch (instr
->variables
[0]->var
->data
.mode
) {
2138 case nir_var_shader_in
:
2139 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
2140 return load_gs_input(ctx
, instr
);
2142 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2144 unsigned count
= glsl_count_attribute_slots(
2145 instr
->variables
[0]->var
->type
,
2146 ctx
->stage
== MESA_SHADER_VERTEX
);
2148 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2149 &ctx
->ac
, ctx
->inputs
+ idx
+ chan
, count
,
2152 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2156 values
[chan
] = ctx
->inputs
[idx
+ chan
+ const_index
* 4];
2160 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2162 unsigned count
= glsl_count_attribute_slots(
2163 instr
->variables
[0]->var
->type
, false);
2165 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2166 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
2169 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2173 values
[chan
] = LLVMBuildLoad(ctx
->builder
, ctx
->locals
[idx
+ chan
+ const_index
* 4], "");
2177 case nir_var_shader_out
:
2178 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2180 unsigned count
= glsl_count_attribute_slots(
2181 instr
->variables
[0]->var
->type
, false);
2183 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2184 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2187 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2191 values
[chan
] = LLVMBuildLoad(ctx
->builder
,
2192 ctx
->outputs
[idx
+ chan
+ const_index
* 4],
2197 case nir_var_shared
: {
2198 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2199 LLVMValueRef derived_ptr
;
2202 indir_index
= LLVMBuildMul(ctx
->builder
, indir_index
, LLVMConstInt(ctx
->i32
, 4, false), "");
2204 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2205 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
2207 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
2208 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
2210 values
[chan
] = LLVMBuildLoad(ctx
->builder
, derived_ptr
, "");
2215 unreachable("unhandle variable mode");
2217 ret
= ac_build_gather_values(&ctx
->ac
, values
, ve
);
2218 return LLVMBuildBitCast(ctx
->builder
, ret
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2222 visit_store_var(struct nir_to_llvm_context
*ctx
,
2223 nir_intrinsic_instr
*instr
)
2225 LLVMValueRef temp_ptr
, value
;
2226 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2227 LLVMValueRef src
= to_float(ctx
, get_src(ctx
, instr
->src
[0]));
2228 int writemask
= instr
->const_index
[0];
2229 LLVMValueRef indir_index
;
2230 unsigned const_index
;
2231 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
, false,
2232 NULL
, &const_index
, &indir_index
);
2234 if (get_elem_bits(ctx
, LLVMTypeOf(src
)) == 64) {
2235 int old_writemask
= writemask
;
2237 src
= LLVMBuildBitCast(ctx
->builder
, src
,
2238 LLVMVectorType(ctx
->f32
, get_llvm_num_components(src
) * 2),
2242 for (unsigned chan
= 0; chan
< 4; chan
++) {
2243 if (old_writemask
& (1 << chan
))
2244 writemask
|= 3u << (2 * chan
);
2248 switch (instr
->variables
[0]->var
->data
.mode
) {
2249 case nir_var_shader_out
:
2250 for (unsigned chan
= 0; chan
< 8; chan
++) {
2252 if (!(writemask
& (1 << chan
)))
2255 value
= llvm_extract_elem(ctx
, src
, chan
);
2257 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CLIP_DIST0
||
2258 instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CULL_DIST0
)
2261 unsigned count
= glsl_count_attribute_slots(
2262 instr
->variables
[0]->var
->type
, false);
2264 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2265 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2268 if (get_llvm_num_components(tmp_vec
) > 1) {
2269 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
2270 value
, indir_index
, "");
2273 build_store_values_extended(ctx
, ctx
->outputs
+ idx
+ chan
,
2274 count
, stride
, tmp_vec
);
2277 temp_ptr
= ctx
->outputs
[idx
+ chan
+ const_index
* stride
];
2279 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
2284 for (unsigned chan
= 0; chan
< 8; chan
++) {
2285 if (!(writemask
& (1 << chan
)))
2288 value
= llvm_extract_elem(ctx
, src
, chan
);
2290 unsigned count
= glsl_count_attribute_slots(
2291 instr
->variables
[0]->var
->type
, false);
2293 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2294 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
2297 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
2298 value
, indir_index
, "");
2299 build_store_values_extended(ctx
, ctx
->locals
+ idx
+ chan
,
2302 temp_ptr
= ctx
->locals
[idx
+ chan
+ const_index
* 4];
2304 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
2308 case nir_var_shared
: {
2309 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2312 indir_index
= LLVMBuildMul(ctx
->builder
, indir_index
, LLVMConstInt(ctx
->i32
, 4, false), "");
2314 for (unsigned chan
= 0; chan
< 8; chan
++) {
2315 if (!(writemask
& (1 << chan
)))
2317 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
2318 LLVMValueRef derived_ptr
;
2321 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
2323 value
= llvm_extract_elem(ctx
, src
, chan
);
2324 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
2325 LLVMBuildStore(ctx
->builder
,
2326 to_integer(ctx
, value
), derived_ptr
);
2335 static int image_type_to_components_count(enum glsl_sampler_dim dim
, bool array
)
2338 case GLSL_SAMPLER_DIM_BUF
:
2340 case GLSL_SAMPLER_DIM_1D
:
2341 return array
? 2 : 1;
2342 case GLSL_SAMPLER_DIM_2D
:
2343 return array
? 3 : 2;
2344 case GLSL_SAMPLER_DIM_MS
:
2345 return array
? 4 : 3;
2346 case GLSL_SAMPLER_DIM_3D
:
2347 case GLSL_SAMPLER_DIM_CUBE
:
2349 case GLSL_SAMPLER_DIM_RECT
:
2350 case GLSL_SAMPLER_DIM_SUBPASS
:
2352 case GLSL_SAMPLER_DIM_SUBPASS_MS
:
2360 static LLVMValueRef
get_image_coords(struct nir_to_llvm_context
*ctx
,
2361 nir_intrinsic_instr
*instr
)
2363 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
2364 if(instr
->variables
[0]->deref
.child
)
2365 type
= instr
->variables
[0]->deref
.child
->type
;
2367 LLVMValueRef src0
= get_src(ctx
, instr
->src
[0]);
2368 LLVMValueRef coords
[4];
2369 LLVMValueRef masks
[] = {
2370 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
2371 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false),
2375 enum glsl_sampler_dim dim
= glsl_get_sampler_dim(type
);
2376 bool add_frag_pos
= (dim
== GLSL_SAMPLER_DIM_SUBPASS
||
2377 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
2378 bool is_ms
= (dim
== GLSL_SAMPLER_DIM_MS
||
2379 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
2381 count
= image_type_to_components_count(dim
,
2382 glsl_sampler_type_is_array(type
));
2385 if (instr
->src
[0].ssa
->num_components
)
2386 res
= LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[0], "");
2393 for (chan
= 0; chan
< count
; ++chan
) {
2394 coords
[chan
] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[chan
], "");
2398 for (chan
= 0; chan
< count
; ++chan
)
2399 coords
[chan
] = LLVMBuildAdd(ctx
->builder
, coords
[chan
], LLVMBuildFPToUI(ctx
->builder
, ctx
->frag_pos
[chan
], ctx
->i32
, ""), "");
2402 coords
[count
] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[1]), 0);
2407 coords
[3] = LLVMGetUndef(ctx
->i32
);
2410 res
= ac_build_gather_values(&ctx
->ac
, coords
, count
);
2415 static void build_type_name_for_intr(
2417 char *buf
, unsigned bufsize
)
2419 LLVMTypeRef elem_type
= type
;
2421 assert(bufsize
>= 8);
2423 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
) {
2424 int ret
= snprintf(buf
, bufsize
, "v%u",
2425 LLVMGetVectorSize(type
));
2427 char *type_name
= LLVMPrintTypeToString(type
);
2428 fprintf(stderr
, "Error building type name for: %s\n",
2432 elem_type
= LLVMGetElementType(type
);
2436 switch (LLVMGetTypeKind(elem_type
)) {
2438 case LLVMIntegerTypeKind
:
2439 snprintf(buf
, bufsize
, "i%d", LLVMGetIntTypeWidth(elem_type
));
2441 case LLVMFloatTypeKind
:
2442 snprintf(buf
, bufsize
, "f32");
2444 case LLVMDoubleTypeKind
:
2445 snprintf(buf
, bufsize
, "f64");
2450 static void get_image_intr_name(const char *base_name
,
2451 LLVMTypeRef data_type
,
2452 LLVMTypeRef coords_type
,
2453 LLVMTypeRef rsrc_type
,
2454 char *out_name
, unsigned out_len
)
2456 char coords_type_name
[8];
2458 build_type_name_for_intr(coords_type
, coords_type_name
,
2459 sizeof(coords_type_name
));
2461 if (HAVE_LLVM
<= 0x0309) {
2462 snprintf(out_name
, out_len
, "%s.%s", base_name
, coords_type_name
);
2464 char data_type_name
[8];
2465 char rsrc_type_name
[8];
2467 build_type_name_for_intr(data_type
, data_type_name
,
2468 sizeof(data_type_name
));
2469 build_type_name_for_intr(rsrc_type
, rsrc_type_name
,
2470 sizeof(rsrc_type_name
));
2471 snprintf(out_name
, out_len
, "%s.%s.%s.%s", base_name
,
2472 data_type_name
, coords_type_name
, rsrc_type_name
);
2476 static LLVMValueRef
visit_image_load(struct nir_to_llvm_context
*ctx
,
2477 nir_intrinsic_instr
*instr
)
2479 LLVMValueRef params
[7];
2481 char intrinsic_name
[64];
2482 const nir_variable
*var
= instr
->variables
[0]->var
;
2483 const struct glsl_type
*type
= var
->type
;
2484 if(instr
->variables
[0]->deref
.child
)
2485 type
= instr
->variables
[0]->deref
.child
->type
;
2487 type
= glsl_without_array(type
);
2488 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
2489 params
[0] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
2490 params
[1] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
2491 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
2492 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
2493 params
[3] = LLVMConstInt(ctx
->i1
, 0, false); /* glc */
2494 params
[4] = LLVMConstInt(ctx
->i1
, 0, false); /* slc */
2495 res
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.load.format.v4f32", ctx
->v4f32
,
2498 res
= trim_vector(ctx
, res
, instr
->dest
.ssa
.num_components
);
2499 res
= to_integer(ctx
, res
);
2501 bool is_da
= glsl_sampler_type_is_array(type
) ||
2502 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
2503 LLVMValueRef da
= is_da
? ctx
->i32one
: ctx
->i32zero
;
2504 LLVMValueRef glc
= LLVMConstInt(ctx
->i1
, 0, false);
2505 LLVMValueRef slc
= LLVMConstInt(ctx
->i1
, 0, false);
2507 params
[0] = get_image_coords(ctx
, instr
);
2508 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
2509 params
[2] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
2510 if (HAVE_LLVM
<= 0x0309) {
2511 params
[3] = LLVMConstInt(ctx
->i1
, 0, false); /* r128 */
2516 LLVMValueRef lwe
= LLVMConstInt(ctx
->i1
, 0, false);
2523 get_image_intr_name("llvm.amdgcn.image.load",
2524 ctx
->v4f32
, /* vdata */
2525 LLVMTypeOf(params
[0]), /* coords */
2526 LLVMTypeOf(params
[1]), /* rsrc */
2527 intrinsic_name
, sizeof(intrinsic_name
));
2529 res
= ac_emit_llvm_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->v4f32
,
2530 params
, 7, AC_FUNC_ATTR_READONLY
);
2532 return to_integer(ctx
, res
);
2535 static void visit_image_store(struct nir_to_llvm_context
*ctx
,
2536 nir_intrinsic_instr
*instr
)
2538 LLVMValueRef params
[8];
2539 char intrinsic_name
[64];
2540 const nir_variable
*var
= instr
->variables
[0]->var
;
2541 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
2542 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
2543 const struct glsl_type
*type
= glsl_without_array(var
->type
);
2545 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2546 ctx
->shader_info
->fs
.writes_memory
= true;
2548 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
2549 params
[0] = to_float(ctx
, get_src(ctx
, instr
->src
[2])); /* data */
2550 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
2551 params
[2] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
2552 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
2553 params
[3] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
2554 params
[4] = i1false
; /* glc */
2555 params
[5] = i1false
; /* slc */
2556 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.store.format.v4f32", ctx
->voidt
,
2559 bool is_da
= glsl_sampler_type_is_array(type
) ||
2560 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
2561 LLVMValueRef da
= is_da
? i1true
: i1false
;
2562 LLVMValueRef glc
= i1false
;
2563 LLVMValueRef slc
= i1false
;
2565 params
[0] = to_float(ctx
, get_src(ctx
, instr
->src
[2]));
2566 params
[1] = get_image_coords(ctx
, instr
); /* coords */
2567 params
[2] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
2568 params
[3] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
2569 if (HAVE_LLVM
<= 0x0309) {
2570 params
[4] = i1false
; /* r128 */
2575 LLVMValueRef lwe
= i1false
;
2582 get_image_intr_name("llvm.amdgcn.image.store",
2583 LLVMTypeOf(params
[0]), /* vdata */
2584 LLVMTypeOf(params
[1]), /* coords */
2585 LLVMTypeOf(params
[2]), /* rsrc */
2586 intrinsic_name
, sizeof(intrinsic_name
));
2588 ac_emit_llvm_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->voidt
,
2594 static LLVMValueRef
visit_image_atomic(struct nir_to_llvm_context
*ctx
,
2595 nir_intrinsic_instr
*instr
)
2597 LLVMValueRef params
[6];
2598 int param_count
= 0;
2599 const nir_variable
*var
= instr
->variables
[0]->var
;
2600 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
2601 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
2602 const char *base_name
= "llvm.amdgcn.image.atomic";
2603 const char *atomic_name
;
2604 LLVMValueRef coords
;
2605 char intrinsic_name
[32], coords_type
[8];
2606 const struct glsl_type
*type
= glsl_without_array(var
->type
);
2608 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2609 ctx
->shader_info
->fs
.writes_memory
= true;
2611 params
[param_count
++] = get_src(ctx
, instr
->src
[2]);
2612 if (instr
->intrinsic
== nir_intrinsic_image_atomic_comp_swap
)
2613 params
[param_count
++] = get_src(ctx
, instr
->src
[3]);
2615 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
2616 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
2617 coords
= params
[param_count
++] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
2618 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
2619 params
[param_count
++] = ctx
->i32zero
; /* voffset */
2620 params
[param_count
++] = i1false
; /* glc */
2621 params
[param_count
++] = i1false
; /* slc */
2623 bool da
= glsl_sampler_type_is_array(type
) ||
2624 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
2626 coords
= params
[param_count
++] = get_image_coords(ctx
, instr
);
2627 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
2628 params
[param_count
++] = i1false
; /* r128 */
2629 params
[param_count
++] = da
? i1true
: i1false
; /* da */
2630 params
[param_count
++] = i1false
; /* slc */
2633 switch (instr
->intrinsic
) {
2634 case nir_intrinsic_image_atomic_add
:
2635 atomic_name
= "add";
2637 case nir_intrinsic_image_atomic_min
:
2638 atomic_name
= "smin";
2640 case nir_intrinsic_image_atomic_max
:
2641 atomic_name
= "smax";
2643 case nir_intrinsic_image_atomic_and
:
2644 atomic_name
= "and";
2646 case nir_intrinsic_image_atomic_or
:
2649 case nir_intrinsic_image_atomic_xor
:
2650 atomic_name
= "xor";
2652 case nir_intrinsic_image_atomic_exchange
:
2653 atomic_name
= "swap";
2655 case nir_intrinsic_image_atomic_comp_swap
:
2656 atomic_name
= "cmpswap";
2661 build_int_type_name(LLVMTypeOf(coords
),
2662 coords_type
, sizeof(coords_type
));
2664 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
2665 "%s.%s.%s", base_name
, atomic_name
, coords_type
);
2666 return ac_emit_llvm_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->i32
, params
, param_count
, 0);
2669 static LLVMValueRef
visit_image_size(struct nir_to_llvm_context
*ctx
,
2670 nir_intrinsic_instr
*instr
)
2673 LLVMValueRef params
[10];
2674 const nir_variable
*var
= instr
->variables
[0]->var
;
2675 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
2676 bool da
= glsl_sampler_type_is_array(var
->type
) ||
2677 glsl_get_sampler_dim(var
->type
) == GLSL_SAMPLER_DIM_CUBE
;
2678 if(instr
->variables
[0]->deref
.child
)
2679 type
= instr
->variables
[0]->deref
.child
->type
;
2681 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
)
2682 return get_buffer_size(ctx
, get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
), true);
2683 params
[0] = ctx
->i32zero
;
2684 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
2685 params
[2] = LLVMConstInt(ctx
->i32
, 15, false);
2686 params
[3] = ctx
->i32zero
;
2687 params
[4] = ctx
->i32zero
;
2688 params
[5] = da
? ctx
->i32one
: ctx
->i32zero
;
2689 params
[6] = ctx
->i32zero
;
2690 params
[7] = ctx
->i32zero
;
2691 params
[8] = ctx
->i32zero
;
2692 params
[9] = ctx
->i32zero
;
2694 res
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.getresinfo.i32", ctx
->v4i32
,
2695 params
, 10, AC_FUNC_ATTR_READNONE
);
2697 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
&&
2698 glsl_sampler_type_is_array(type
)) {
2699 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
2700 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
2701 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, res
, two
, "");
2702 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
2703 res
= LLVMBuildInsertElement(ctx
->builder
, res
, z
, two
, "");
2708 static void emit_waitcnt(struct nir_to_llvm_context
*ctx
)
2710 LLVMValueRef args
[1] = {
2711 LLVMConstInt(ctx
->i32
, 0xf70, false),
2713 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.waitcnt",
2714 ctx
->voidt
, args
, 1, 0);
2717 static void emit_barrier(struct nir_to_llvm_context
*ctx
)
2720 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.barrier",
2721 ctx
->voidt
, NULL
, 0, 0);
2724 static void emit_discard_if(struct nir_to_llvm_context
*ctx
,
2725 nir_intrinsic_instr
*instr
)
2728 ctx
->shader_info
->fs
.can_discard
= true;
2730 cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
2731 get_src(ctx
, instr
->src
[0]),
2734 cond
= LLVMBuildSelect(ctx
->builder
, cond
,
2735 LLVMConstReal(ctx
->f32
, -1.0f
),
2737 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.AMDGPU.kill",
2743 visit_load_local_invocation_index(struct nir_to_llvm_context
*ctx
)
2745 LLVMValueRef result
;
2746 LLVMValueRef thread_id
= ac_get_thread_id(&ctx
->ac
);
2747 result
= LLVMBuildAnd(ctx
->builder
, ctx
->tg_size
,
2748 LLVMConstInt(ctx
->i32
, 0xfc0, false), "");
2750 return LLVMBuildAdd(ctx
->builder
, result
, thread_id
, "");
2753 static LLVMValueRef
visit_var_atomic(struct nir_to_llvm_context
*ctx
,
2754 nir_intrinsic_instr
*instr
)
2756 LLVMValueRef ptr
, result
;
2757 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2758 LLVMValueRef src
= get_src(ctx
, instr
->src
[0]);
2759 ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2761 if (instr
->intrinsic
== nir_intrinsic_var_atomic_comp_swap
) {
2762 LLVMValueRef src1
= get_src(ctx
, instr
->src
[1]);
2763 result
= LLVMBuildAtomicCmpXchg(ctx
->builder
,
2765 LLVMAtomicOrderingSequentiallyConsistent
,
2766 LLVMAtomicOrderingSequentiallyConsistent
,
2769 LLVMAtomicRMWBinOp op
;
2770 switch (instr
->intrinsic
) {
2771 case nir_intrinsic_var_atomic_add
:
2772 op
= LLVMAtomicRMWBinOpAdd
;
2774 case nir_intrinsic_var_atomic_umin
:
2775 op
= LLVMAtomicRMWBinOpUMin
;
2777 case nir_intrinsic_var_atomic_umax
:
2778 op
= LLVMAtomicRMWBinOpUMax
;
2780 case nir_intrinsic_var_atomic_imin
:
2781 op
= LLVMAtomicRMWBinOpMin
;
2783 case nir_intrinsic_var_atomic_imax
:
2784 op
= LLVMAtomicRMWBinOpMax
;
2786 case nir_intrinsic_var_atomic_and
:
2787 op
= LLVMAtomicRMWBinOpAnd
;
2789 case nir_intrinsic_var_atomic_or
:
2790 op
= LLVMAtomicRMWBinOpOr
;
2792 case nir_intrinsic_var_atomic_xor
:
2793 op
= LLVMAtomicRMWBinOpXor
;
2795 case nir_intrinsic_var_atomic_exchange
:
2796 op
= LLVMAtomicRMWBinOpXchg
;
2802 result
= LLVMBuildAtomicRMW(ctx
->builder
, op
, ptr
, to_integer(ctx
, src
),
2803 LLVMAtomicOrderingSequentiallyConsistent
,
2809 #define INTERP_CENTER 0
2810 #define INTERP_CENTROID 1
2811 #define INTERP_SAMPLE 2
2813 static LLVMValueRef
lookup_interp_param(struct nir_to_llvm_context
*ctx
,
2814 enum glsl_interp_mode interp
, unsigned location
)
2817 case INTERP_MODE_FLAT
:
2820 case INTERP_MODE_SMOOTH
:
2821 case INTERP_MODE_NONE
:
2822 if (location
== INTERP_CENTER
)
2823 return ctx
->persp_center
;
2824 else if (location
== INTERP_CENTROID
)
2825 return ctx
->persp_centroid
;
2826 else if (location
== INTERP_SAMPLE
)
2827 return ctx
->persp_sample
;
2829 case INTERP_MODE_NOPERSPECTIVE
:
2830 if (location
== INTERP_CENTER
)
2831 return ctx
->linear_center
;
2832 else if (location
== INTERP_CENTROID
)
2833 return ctx
->linear_centroid
;
2834 else if (location
== INTERP_SAMPLE
)
2835 return ctx
->linear_sample
;
2841 static LLVMValueRef
load_sample_position(struct nir_to_llvm_context
*ctx
,
2842 LLVMValueRef sample_id
)
2844 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
2845 LLVMValueRef offset0
= LLVMBuildMul(ctx
->builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, false), "");
2846 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, false), "");
2847 LLVMValueRef result
[2];
2849 result
[0] = ac_build_indexed_load_const(&ctx
->ac
, ctx
->sample_positions
, offset0
);
2850 result
[1] = ac_build_indexed_load_const(&ctx
->ac
, ctx
->sample_positions
, offset1
);
2852 return ac_build_gather_values(&ctx
->ac
, result
, 2);
2855 static LLVMValueRef
load_sample_pos(struct nir_to_llvm_context
*ctx
)
2857 LLVMValueRef values
[2];
2859 values
[0] = emit_ffract(ctx
, ctx
->frag_pos
[0]);
2860 values
[1] = emit_ffract(ctx
, ctx
->frag_pos
[1]);
2861 return ac_build_gather_values(&ctx
->ac
, values
, 2);
2864 static LLVMValueRef
visit_interp(struct nir_to_llvm_context
*ctx
,
2865 nir_intrinsic_instr
*instr
)
2867 LLVMValueRef result
[2];
2868 LLVMValueRef interp_param
, attr_number
;
2871 LLVMValueRef src_c0
, src_c1
;
2873 int input_index
= instr
->variables
[0]->var
->data
.location
- VARYING_SLOT_VAR0
;
2874 switch (instr
->intrinsic
) {
2875 case nir_intrinsic_interp_var_at_centroid
:
2876 location
= INTERP_CENTROID
;
2878 case nir_intrinsic_interp_var_at_sample
:
2879 case nir_intrinsic_interp_var_at_offset
:
2880 location
= INTERP_SAMPLE
;
2881 src0
= get_src(ctx
, instr
->src
[0]);
2887 if (instr
->intrinsic
== nir_intrinsic_interp_var_at_offset
) {
2888 src_c0
= to_float(ctx
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, ""));
2889 src_c1
= to_float(ctx
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, ""));
2890 } else if (instr
->intrinsic
== nir_intrinsic_interp_var_at_sample
) {
2891 LLVMValueRef sample_position
;
2892 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
2894 /* fetch sample ID */
2895 sample_position
= load_sample_position(ctx
, src0
);
2897 src_c0
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32zero
, "");
2898 src_c0
= LLVMBuildFSub(ctx
->builder
, src_c0
, halfval
, "");
2899 src_c1
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32one
, "");
2900 src_c1
= LLVMBuildFSub(ctx
->builder
, src_c1
, halfval
, "");
2902 interp_param
= lookup_interp_param(ctx
, instr
->variables
[0]->var
->data
.interpolation
, location
);
2903 attr_number
= LLVMConstInt(ctx
->i32
, input_index
, false);
2905 if (location
== INTERP_SAMPLE
) {
2906 LLVMValueRef ij_out
[2];
2907 LLVMValueRef ddxy_out
= emit_ddxy_interp(ctx
, interp_param
);
2910 * take the I then J parameters, and the DDX/Y for it, and
2911 * calculate the IJ inputs for the interpolator.
2912 * temp1 = ddx * offset/sample.x + I;
2913 * interp_param.I = ddy * offset/sample.y + temp1;
2914 * temp1 = ddx * offset/sample.x + J;
2915 * interp_param.J = ddy * offset/sample.y + temp1;
2917 for (unsigned i
= 0; i
< 2; i
++) {
2918 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, false);
2919 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, false);
2920 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->builder
,
2921 ddxy_out
, ix_ll
, "");
2922 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->builder
,
2923 ddxy_out
, iy_ll
, "");
2924 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->builder
,
2925 interp_param
, ix_ll
, "");
2926 LLVMValueRef temp1
, temp2
;
2928 interp_el
= LLVMBuildBitCast(ctx
->builder
, interp_el
,
2931 temp1
= LLVMBuildFMul(ctx
->builder
, ddx_el
, src_c0
, "");
2932 temp1
= LLVMBuildFAdd(ctx
->builder
, temp1
, interp_el
, "");
2934 temp2
= LLVMBuildFMul(ctx
->builder
, ddy_el
, src_c1
, "");
2935 temp2
= LLVMBuildFAdd(ctx
->builder
, temp2
, temp1
, "");
2937 ij_out
[i
] = LLVMBuildBitCast(ctx
->builder
,
2938 temp2
, ctx
->i32
, "");
2940 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
2944 for (chan
= 0; chan
< 2; chan
++) {
2945 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
2948 interp_param
= LLVMBuildBitCast(ctx
->builder
,
2949 interp_param
, LLVMVectorType(ctx
->f32
, 2), "");
2950 LLVMValueRef i
= LLVMBuildExtractElement(
2951 ctx
->builder
, interp_param
, ctx
->i32zero
, "");
2952 LLVMValueRef j
= LLVMBuildExtractElement(
2953 ctx
->builder
, interp_param
, ctx
->i32one
, "");
2955 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
2956 llvm_chan
, attr_number
,
2957 ctx
->prim_mask
, i
, j
);
2959 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
2960 LLVMConstInt(ctx
->i32
, 2, false),
2961 llvm_chan
, attr_number
,
2965 return ac_build_gather_values(&ctx
->ac
, result
, 2);
2969 visit_emit_vertex(struct nir_to_llvm_context
*ctx
,
2970 nir_intrinsic_instr
*instr
)
2972 LLVMValueRef gs_next_vertex
;
2973 LLVMValueRef can_emit
, kill
;
2976 assert(instr
->const_index
[0] == 0);
2977 /* Write vertex attribute values to GSVS ring */
2978 gs_next_vertex
= LLVMBuildLoad(ctx
->builder
,
2979 ctx
->gs_next_vertex
,
2982 /* If this thread has already emitted the declared maximum number of
2983 * vertices, kill it: excessive vertex emissions are not supposed to
2984 * have any effect, and GS threads have no externally observable
2985 * effects other than emitting vertices.
2987 can_emit
= LLVMBuildICmp(ctx
->builder
, LLVMIntULT
, gs_next_vertex
,
2988 LLVMConstInt(ctx
->i32
, ctx
->gs_max_out_vertices
, false), "");
2990 kill
= LLVMBuildSelect(ctx
->builder
, can_emit
,
2991 LLVMConstReal(ctx
->f32
, 1.0f
),
2992 LLVMConstReal(ctx
->f32
, -1.0f
), "");
2993 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.AMDGPU.kill",
2994 ctx
->voidt
, &kill
, 1, 0);
2996 /* loop num outputs */
2998 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
2999 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
3000 if (!(ctx
->output_mask
& (1ull << i
)))
3003 for (unsigned j
= 0; j
< 4; j
++) {
3004 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
,
3006 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, (idx
* 4 + j
) * ctx
->gs_max_out_vertices
, false);
3007 voffset
= LLVMBuildAdd(ctx
->builder
, voffset
, gs_next_vertex
, "");
3008 voffset
= LLVMBuildMul(ctx
->builder
, voffset
, LLVMConstInt(ctx
->i32
, 4, false), "");
3010 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
3012 ac_build_tbuffer_store(&ctx
->ac
, ctx
->gsvs_ring
,
3014 voffset
, ctx
->gs2vs_offset
, 0,
3015 V_008F0C_BUF_DATA_FORMAT_32
,
3016 V_008F0C_BUF_NUM_FORMAT_UINT
,
3022 gs_next_vertex
= LLVMBuildAdd(ctx
->builder
, gs_next_vertex
,
3024 LLVMBuildStore(ctx
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
);
3026 ac_emit_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
3030 visit_end_primitive(struct nir_to_llvm_context
*ctx
,
3031 nir_intrinsic_instr
*instr
)
3033 ac_emit_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
3036 static void visit_intrinsic(struct nir_to_llvm_context
*ctx
,
3037 nir_intrinsic_instr
*instr
)
3039 LLVMValueRef result
= NULL
;
3041 switch (instr
->intrinsic
) {
3042 case nir_intrinsic_load_work_group_id
: {
3043 result
= ctx
->workgroup_ids
;
3046 case nir_intrinsic_load_base_vertex
: {
3047 result
= ctx
->base_vertex
;
3050 case nir_intrinsic_load_vertex_id_zero_base
: {
3051 result
= ctx
->vertex_id
;
3054 case nir_intrinsic_load_local_invocation_id
: {
3055 result
= ctx
->local_invocation_ids
;
3058 case nir_intrinsic_load_base_instance
:
3059 result
= ctx
->start_instance
;
3061 case nir_intrinsic_load_draw_id
:
3062 result
= ctx
->draw_index
;
3064 case nir_intrinsic_load_invocation_id
:
3065 result
= ctx
->gs_invocation_id
;
3067 case nir_intrinsic_load_primitive_id
:
3068 if (ctx
->stage
== MESA_SHADER_GEOMETRY
)
3069 result
= ctx
->gs_prim_id
;
3071 fprintf(stderr
, "Unknown primitive id intrinsic: %d", ctx
->stage
);
3073 case nir_intrinsic_load_sample_id
:
3074 ctx
->shader_info
->fs
.force_persample
= true;
3075 result
= unpack_param(ctx
, ctx
->ancillary
, 8, 4);
3077 case nir_intrinsic_load_sample_pos
:
3078 ctx
->shader_info
->fs
.force_persample
= true;
3079 result
= load_sample_pos(ctx
);
3081 case nir_intrinsic_load_front_face
:
3082 result
= ctx
->front_face
;
3084 case nir_intrinsic_load_instance_id
:
3085 result
= ctx
->instance_id
;
3086 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
3087 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
3089 case nir_intrinsic_load_num_work_groups
:
3090 result
= ctx
->num_work_groups
;
3092 case nir_intrinsic_load_local_invocation_index
:
3093 result
= visit_load_local_invocation_index(ctx
);
3095 case nir_intrinsic_load_push_constant
:
3096 result
= visit_load_push_constant(ctx
, instr
);
3098 case nir_intrinsic_vulkan_resource_index
:
3099 result
= visit_vulkan_resource_index(ctx
, instr
);
3101 case nir_intrinsic_store_ssbo
:
3102 visit_store_ssbo(ctx
, instr
);
3104 case nir_intrinsic_load_ssbo
:
3105 result
= visit_load_buffer(ctx
, instr
);
3107 case nir_intrinsic_ssbo_atomic_add
:
3108 case nir_intrinsic_ssbo_atomic_imin
:
3109 case nir_intrinsic_ssbo_atomic_umin
:
3110 case nir_intrinsic_ssbo_atomic_imax
:
3111 case nir_intrinsic_ssbo_atomic_umax
:
3112 case nir_intrinsic_ssbo_atomic_and
:
3113 case nir_intrinsic_ssbo_atomic_or
:
3114 case nir_intrinsic_ssbo_atomic_xor
:
3115 case nir_intrinsic_ssbo_atomic_exchange
:
3116 case nir_intrinsic_ssbo_atomic_comp_swap
:
3117 result
= visit_atomic_ssbo(ctx
, instr
);
3119 case nir_intrinsic_load_ubo
:
3120 result
= visit_load_ubo_buffer(ctx
, instr
);
3122 case nir_intrinsic_get_buffer_size
:
3123 result
= visit_get_buffer_size(ctx
, instr
);
3125 case nir_intrinsic_load_var
:
3126 result
= visit_load_var(ctx
, instr
);
3128 case nir_intrinsic_store_var
:
3129 visit_store_var(ctx
, instr
);
3131 case nir_intrinsic_image_load
:
3132 result
= visit_image_load(ctx
, instr
);
3134 case nir_intrinsic_image_store
:
3135 visit_image_store(ctx
, instr
);
3137 case nir_intrinsic_image_atomic_add
:
3138 case nir_intrinsic_image_atomic_min
:
3139 case nir_intrinsic_image_atomic_max
:
3140 case nir_intrinsic_image_atomic_and
:
3141 case nir_intrinsic_image_atomic_or
:
3142 case nir_intrinsic_image_atomic_xor
:
3143 case nir_intrinsic_image_atomic_exchange
:
3144 case nir_intrinsic_image_atomic_comp_swap
:
3145 result
= visit_image_atomic(ctx
, instr
);
3147 case nir_intrinsic_image_size
:
3148 result
= visit_image_size(ctx
, instr
);
3150 case nir_intrinsic_discard
:
3151 ctx
->shader_info
->fs
.can_discard
= true;
3152 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.AMDGPU.kilp",
3156 case nir_intrinsic_discard_if
:
3157 emit_discard_if(ctx
, instr
);
3159 case nir_intrinsic_memory_barrier
:
3162 case nir_intrinsic_barrier
:
3165 case nir_intrinsic_var_atomic_add
:
3166 case nir_intrinsic_var_atomic_imin
:
3167 case nir_intrinsic_var_atomic_umin
:
3168 case nir_intrinsic_var_atomic_imax
:
3169 case nir_intrinsic_var_atomic_umax
:
3170 case nir_intrinsic_var_atomic_and
:
3171 case nir_intrinsic_var_atomic_or
:
3172 case nir_intrinsic_var_atomic_xor
:
3173 case nir_intrinsic_var_atomic_exchange
:
3174 case nir_intrinsic_var_atomic_comp_swap
:
3175 result
= visit_var_atomic(ctx
, instr
);
3177 case nir_intrinsic_interp_var_at_centroid
:
3178 case nir_intrinsic_interp_var_at_sample
:
3179 case nir_intrinsic_interp_var_at_offset
:
3180 result
= visit_interp(ctx
, instr
);
3182 case nir_intrinsic_emit_vertex
:
3183 visit_emit_vertex(ctx
, instr
);
3185 case nir_intrinsic_end_primitive
:
3186 visit_end_primitive(ctx
, instr
);
3189 fprintf(stderr
, "Unknown intrinsic: ");
3190 nir_print_instr(&instr
->instr
, stderr
);
3191 fprintf(stderr
, "\n");
3195 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
3199 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
3200 nir_deref_var
*deref
,
3201 enum desc_type desc_type
)
3203 unsigned desc_set
= deref
->var
->data
.descriptor_set
;
3204 LLVMValueRef list
= ctx
->descriptor_sets
[desc_set
];
3205 struct radv_descriptor_set_layout
*layout
= ctx
->options
->layout
->set
[desc_set
].layout
;
3206 struct radv_descriptor_set_binding_layout
*binding
= layout
->binding
+ deref
->var
->data
.binding
;
3207 unsigned offset
= binding
->offset
;
3208 unsigned stride
= binding
->size
;
3210 LLVMBuilderRef builder
= ctx
->builder
;
3212 LLVMValueRef index
= NULL
;
3214 assert(deref
->var
->data
.binding
< layout
->binding_count
);
3216 switch (desc_type
) {
3228 if (binding
->type
== VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
)
3238 unreachable("invalid desc_type\n");
3241 if (deref
->deref
.child
) {
3242 nir_deref_array
*child
= (nir_deref_array
*)deref
->deref
.child
;
3244 assert(child
->deref_array_type
!= nir_deref_array_type_wildcard
);
3245 offset
+= child
->base_offset
* stride
;
3246 if (child
->deref_array_type
== nir_deref_array_type_indirect
) {
3247 index
= get_src(ctx
, child
->indirect
);
3251 assert(stride
% type_size
== 0);
3254 index
= ctx
->i32zero
;
3256 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, stride
/ type_size
, 0), "");
3258 list
= ac_build_gep0(&ctx
->ac
, list
, LLVMConstInt(ctx
->i32
, offset
, 0));
3259 list
= LLVMBuildPointerCast(builder
, list
, const_array(type
, 0), "");
3261 return ac_build_indexed_load_const(&ctx
->ac
, list
, index
);
3264 static void set_tex_fetch_args(struct nir_to_llvm_context
*ctx
,
3265 struct ac_tex_info
*tinfo
,
3266 nir_tex_instr
*instr
,
3268 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
3269 LLVMValueRef
*param
, unsigned count
,
3273 unsigned is_rect
= 0;
3274 bool da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
3276 if (op
== nir_texop_lod
)
3278 /* Pad to power of two vector */
3279 while (count
< util_next_power_of_two(count
))
3280 param
[count
++] = LLVMGetUndef(ctx
->i32
);
3283 tinfo
->args
[0] = ac_build_gather_values(&ctx
->ac
, param
, count
);
3285 tinfo
->args
[0] = param
[0];
3287 tinfo
->args
[1] = res_ptr
;
3290 if (op
== nir_texop_txf
||
3291 op
== nir_texop_txf_ms
||
3292 op
== nir_texop_query_levels
||
3293 op
== nir_texop_texture_samples
||
3294 op
== nir_texop_txs
)
3295 tinfo
->dst_type
= ctx
->v4i32
;
3297 tinfo
->dst_type
= ctx
->v4f32
;
3298 tinfo
->args
[num_args
++] = samp_ptr
;
3301 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
&& op
== nir_texop_txf
) {
3302 tinfo
->args
[0] = res_ptr
;
3303 tinfo
->args
[1] = LLVMConstInt(ctx
->i32
, 0, false);
3304 tinfo
->args
[2] = param
[0];
3305 tinfo
->arg_count
= 3;
3309 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, dmask
, 0);
3310 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, is_rect
, 0); /* unorm */
3311 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* r128 */
3312 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, da
? 1 : 0, 0);
3313 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* glc */
3314 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* slc */
3315 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* tfe */
3316 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* lwe */
3318 tinfo
->arg_count
= num_args
;
3321 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3324 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3325 * filtering manually. The driver sets img7 to a mask clearing
3326 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3327 * s_and_b32 samp0, samp0, img7
3330 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3332 static LLVMValueRef
sici_fix_sampler_aniso(struct nir_to_llvm_context
*ctx
,
3333 LLVMValueRef res
, LLVMValueRef samp
)
3335 LLVMBuilderRef builder
= ctx
->builder
;
3336 LLVMValueRef img7
, samp0
;
3338 if (ctx
->options
->chip_class
>= VI
)
3341 img7
= LLVMBuildExtractElement(builder
, res
,
3342 LLVMConstInt(ctx
->i32
, 7, 0), "");
3343 samp0
= LLVMBuildExtractElement(builder
, samp
,
3344 LLVMConstInt(ctx
->i32
, 0, 0), "");
3345 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
3346 return LLVMBuildInsertElement(builder
, samp
, samp0
,
3347 LLVMConstInt(ctx
->i32
, 0, 0), "");
3350 static void tex_fetch_ptrs(struct nir_to_llvm_context
*ctx
,
3351 nir_tex_instr
*instr
,
3352 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
,
3353 LLVMValueRef
*fmask_ptr
)
3355 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
)
3356 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_BUFFER
);
3358 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_IMAGE
);
3361 *samp_ptr
= get_sampler_desc(ctx
, instr
->sampler
, DESC_SAMPLER
);
3363 *samp_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_SAMPLER
);
3364 if (instr
->sampler_dim
< GLSL_SAMPLER_DIM_RECT
)
3365 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
3367 if (fmask_ptr
&& !instr
->sampler
&& (instr
->op
== nir_texop_txf_ms
||
3368 instr
->op
== nir_texop_samples_identical
))
3369 *fmask_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_FMASK
);
3372 static LLVMValueRef
apply_round_slice(struct nir_to_llvm_context
*ctx
,
3375 coord
= to_float(ctx
, coord
);
3376 coord
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.rint.f32", ctx
->f32
, &coord
, 1, 0);
3377 coord
= to_integer(ctx
, coord
);
3381 static void visit_tex(struct nir_to_llvm_context
*ctx
, nir_tex_instr
*instr
)
3383 LLVMValueRef result
= NULL
;
3384 struct ac_tex_info tinfo
= { 0 };
3385 unsigned dmask
= 0xf;
3386 LLVMValueRef address
[16];
3387 LLVMValueRef coords
[5];
3388 LLVMValueRef coord
= NULL
, lod
= NULL
, comparator
= NULL
;
3389 LLVMValueRef bias
= NULL
, offsets
= NULL
;
3390 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
, sample_index
= NULL
;
3391 LLVMValueRef ddx
= NULL
, ddy
= NULL
;
3392 LLVMValueRef derivs
[6];
3393 unsigned chan
, count
= 0;
3394 unsigned const_src
= 0, num_deriv_comp
= 0;
3396 tex_fetch_ptrs(ctx
, instr
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
3398 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
3399 switch (instr
->src
[i
].src_type
) {
3400 case nir_tex_src_coord
:
3401 coord
= get_src(ctx
, instr
->src
[i
].src
);
3403 case nir_tex_src_projector
:
3405 case nir_tex_src_comparator
:
3406 comparator
= get_src(ctx
, instr
->src
[i
].src
);
3408 case nir_tex_src_offset
:
3409 offsets
= get_src(ctx
, instr
->src
[i
].src
);
3412 case nir_tex_src_bias
:
3413 bias
= get_src(ctx
, instr
->src
[i
].src
);
3415 case nir_tex_src_lod
:
3416 lod
= get_src(ctx
, instr
->src
[i
].src
);
3418 case nir_tex_src_ms_index
:
3419 sample_index
= get_src(ctx
, instr
->src
[i
].src
);
3421 case nir_tex_src_ms_mcs
:
3423 case nir_tex_src_ddx
:
3424 ddx
= get_src(ctx
, instr
->src
[i
].src
);
3425 num_deriv_comp
= instr
->src
[i
].src
.ssa
->num_components
;
3427 case nir_tex_src_ddy
:
3428 ddy
= get_src(ctx
, instr
->src
[i
].src
);
3430 case nir_tex_src_texture_offset
:
3431 case nir_tex_src_sampler_offset
:
3432 case nir_tex_src_plane
:
3438 if (instr
->op
== nir_texop_txs
&& instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
3439 result
= get_buffer_size(ctx
, res_ptr
, false);
3443 if (instr
->op
== nir_texop_texture_samples
) {
3444 LLVMValueRef res
, samples
, is_msaa
;
3445 res
= LLVMBuildBitCast(ctx
->builder
, res_ptr
, ctx
->v8i32
, "");
3446 samples
= LLVMBuildExtractElement(ctx
->builder
, res
,
3447 LLVMConstInt(ctx
->i32
, 3, false), "");
3448 is_msaa
= LLVMBuildLShr(ctx
->builder
, samples
,
3449 LLVMConstInt(ctx
->i32
, 28, false), "");
3450 is_msaa
= LLVMBuildAnd(ctx
->builder
, is_msaa
,
3451 LLVMConstInt(ctx
->i32
, 0xe, false), "");
3452 is_msaa
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, is_msaa
,
3453 LLVMConstInt(ctx
->i32
, 0xe, false), "");
3455 samples
= LLVMBuildLShr(ctx
->builder
, samples
,
3456 LLVMConstInt(ctx
->i32
, 16, false), "");
3457 samples
= LLVMBuildAnd(ctx
->builder
, samples
,
3458 LLVMConstInt(ctx
->i32
, 0xf, false), "");
3459 samples
= LLVMBuildShl(ctx
->builder
, ctx
->i32one
,
3461 samples
= LLVMBuildSelect(ctx
->builder
, is_msaa
, samples
,
3468 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
3469 coords
[chan
] = llvm_extract_elem(ctx
, coord
, chan
);
3471 if (offsets
&& instr
->op
!= nir_texop_txf
) {
3472 LLVMValueRef offset
[3], pack
;
3473 for (chan
= 0; chan
< 3; ++chan
)
3474 offset
[chan
] = ctx
->i32zero
;
3476 tinfo
.has_offset
= true;
3477 for (chan
= 0; chan
< get_llvm_num_components(offsets
); chan
++) {
3478 offset
[chan
] = llvm_extract_elem(ctx
, offsets
, chan
);
3479 offset
[chan
] = LLVMBuildAnd(ctx
->builder
, offset
[chan
],
3480 LLVMConstInt(ctx
->i32
, 0x3f, false), "");
3482 offset
[chan
] = LLVMBuildShl(ctx
->builder
, offset
[chan
],
3483 LLVMConstInt(ctx
->i32
, chan
* 8, false), "");
3485 pack
= LLVMBuildOr(ctx
->builder
, offset
[0], offset
[1], "");
3486 pack
= LLVMBuildOr(ctx
->builder
, pack
, offset
[2], "");
3487 address
[count
++] = pack
;
3490 /* pack LOD bias value */
3491 if (instr
->op
== nir_texop_txb
&& bias
) {
3492 address
[count
++] = bias
;
3495 /* Pack depth comparison value */
3496 if (instr
->is_shadow
&& comparator
) {
3497 address
[count
++] = llvm_extract_elem(ctx
, comparator
, 0);
3500 /* pack derivatives */
3502 switch (instr
->sampler_dim
) {
3503 case GLSL_SAMPLER_DIM_3D
:
3504 case GLSL_SAMPLER_DIM_CUBE
:
3507 case GLSL_SAMPLER_DIM_2D
:
3511 case GLSL_SAMPLER_DIM_1D
:
3516 for (unsigned i
= 0; i
< num_deriv_comp
; i
++) {
3517 derivs
[i
* 2] = to_float(ctx
, llvm_extract_elem(ctx
, ddx
, i
));
3518 derivs
[i
* 2 + 1] = to_float(ctx
, llvm_extract_elem(ctx
, ddy
, i
));
3522 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&& coord
) {
3523 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
3524 coords
[chan
] = to_float(ctx
, coords
[chan
]);
3525 if (instr
->coord_components
== 3)
3526 coords
[3] = LLVMGetUndef(ctx
->f32
);
3527 ac_prepare_cube_coords(&ctx
->ac
,
3528 instr
->op
== nir_texop_txd
, instr
->is_array
,
3535 for (unsigned i
= 0; i
< num_deriv_comp
* 2; i
++)
3536 address
[count
++] = derivs
[i
];
3539 /* Pack texture coordinates */
3541 address
[count
++] = coords
[0];
3542 if (instr
->coord_components
> 1) {
3543 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_1D
&& instr
->is_array
&& instr
->op
!= nir_texop_txf
) {
3544 coords
[1] = apply_round_slice(ctx
, coords
[1]);
3546 address
[count
++] = coords
[1];
3548 if (instr
->coord_components
> 2) {
3549 /* This seems like a bit of a hack - but it passes Vulkan CTS with it */
3550 if (instr
->sampler_dim
!= GLSL_SAMPLER_DIM_3D
&& instr
->op
!= nir_texop_txf
) {
3551 coords
[2] = apply_round_slice(ctx
, coords
[2]);
3553 address
[count
++] = coords
[2];
3558 if ((instr
->op
== nir_texop_txl
|| instr
->op
== nir_texop_txf
) && lod
) {
3559 address
[count
++] = lod
;
3560 } else if (instr
->op
== nir_texop_txf_ms
&& sample_index
) {
3561 address
[count
++] = sample_index
;
3562 } else if(instr
->op
== nir_texop_txs
) {
3565 address
[count
++] = lod
;
3567 address
[count
++] = ctx
->i32zero
;
3570 for (chan
= 0; chan
< count
; chan
++) {
3571 address
[chan
] = LLVMBuildBitCast(ctx
->builder
,
3572 address
[chan
], ctx
->i32
, "");
3575 if (instr
->op
== nir_texop_samples_identical
) {
3576 LLVMValueRef txf_address
[4];
3577 struct ac_tex_info txf_info
= { 0 };
3578 unsigned txf_count
= count
;
3579 memcpy(txf_address
, address
, sizeof(txf_address
));
3581 if (!instr
->is_array
)
3582 txf_address
[2] = ctx
->i32zero
;
3583 txf_address
[3] = ctx
->i32zero
;
3585 set_tex_fetch_args(ctx
, &txf_info
, instr
, nir_texop_txf
,
3587 txf_address
, txf_count
, 0xf);
3589 result
= build_tex_intrinsic(ctx
, instr
, &txf_info
);
3591 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
3592 result
= emit_int_cmp(ctx
, LLVMIntEQ
, result
, ctx
->i32zero
);
3596 /* Adjust the sample index according to FMASK.
3598 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3599 * which is the identity mapping. Each nibble says which physical sample
3600 * should be fetched to get that sample.
3602 * For example, 0x11111100 means there are only 2 samples stored and
3603 * the second sample covers 3/4 of the pixel. When reading samples 0
3604 * and 1, return physical sample 0 (determined by the first two 0s
3605 * in FMASK), otherwise return physical sample 1.
3607 * The sample index should be adjusted as follows:
3608 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
3610 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
&&
3611 instr
->op
!= nir_texop_txs
) {
3612 LLVMValueRef txf_address
[4];
3613 struct ac_tex_info txf_info
= { 0 };
3614 unsigned txf_count
= count
;
3615 memcpy(txf_address
, address
, sizeof(txf_address
));
3617 if (!instr
->is_array
)
3618 txf_address
[2] = ctx
->i32zero
;
3619 txf_address
[3] = ctx
->i32zero
;
3621 set_tex_fetch_args(ctx
, &txf_info
, instr
, nir_texop_txf
,
3623 txf_address
, txf_count
, 0xf);
3625 result
= build_tex_intrinsic(ctx
, instr
, &txf_info
);
3626 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, false);
3627 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xf, false);
3629 LLVMValueRef fmask
= LLVMBuildExtractElement(ctx
->builder
,
3633 unsigned sample_chan
= instr
->is_array
? 3 : 2;
3635 LLVMValueRef sample_index4
=
3636 LLVMBuildMul(ctx
->builder
, address
[sample_chan
], four
, "");
3637 LLVMValueRef shifted_fmask
=
3638 LLVMBuildLShr(ctx
->builder
, fmask
, sample_index4
, "");
3639 LLVMValueRef final_sample
=
3640 LLVMBuildAnd(ctx
->builder
, shifted_fmask
, F
, "");
3642 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3643 * resource descriptor is 0 (invalid),
3645 LLVMValueRef fmask_desc
=
3646 LLVMBuildBitCast(ctx
->builder
, fmask_ptr
,
3649 LLVMValueRef fmask_word1
=
3650 LLVMBuildExtractElement(ctx
->builder
, fmask_desc
,
3653 LLVMValueRef word1_is_nonzero
=
3654 LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
3655 fmask_word1
, ctx
->i32zero
, "");
3657 /* Replace the MSAA sample index. */
3658 address
[sample_chan
] =
3659 LLVMBuildSelect(ctx
->builder
, word1_is_nonzero
,
3660 final_sample
, address
[sample_chan
], "");
3663 if (offsets
&& instr
->op
== nir_texop_txf
) {
3664 nir_const_value
*const_offset
=
3665 nir_src_as_const_value(instr
->src
[const_src
].src
);
3666 int num_offsets
= instr
->src
[const_src
].src
.ssa
->num_components
;
3667 assert(const_offset
);
3668 num_offsets
= MIN2(num_offsets
, instr
->coord_components
);
3669 if (num_offsets
> 2)
3670 address
[2] = LLVMBuildAdd(ctx
->builder
,
3671 address
[2], LLVMConstInt(ctx
->i32
, const_offset
->i32
[2], false), "");
3672 if (num_offsets
> 1)
3673 address
[1] = LLVMBuildAdd(ctx
->builder
,
3674 address
[1], LLVMConstInt(ctx
->i32
, const_offset
->i32
[1], false), "");
3675 address
[0] = LLVMBuildAdd(ctx
->builder
,
3676 address
[0], LLVMConstInt(ctx
->i32
, const_offset
->i32
[0], false), "");
3680 /* TODO TG4 support */
3681 if (instr
->op
== nir_texop_tg4
) {
3682 if (instr
->is_shadow
)
3685 dmask
= 1 << instr
->component
;
3687 set_tex_fetch_args(ctx
, &tinfo
, instr
, instr
->op
,
3688 res_ptr
, samp_ptr
, address
, count
, dmask
);
3690 result
= build_tex_intrinsic(ctx
, instr
, &tinfo
);
3692 if (instr
->op
== nir_texop_query_levels
)
3693 result
= LLVMBuildExtractElement(ctx
->builder
, result
, LLVMConstInt(ctx
->i32
, 3, false), "");
3694 else if (instr
->is_shadow
&& instr
->op
!= nir_texop_txs
&& instr
->op
!= nir_texop_lod
&& instr
->op
!= nir_texop_tg4
)
3695 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
3696 else if (instr
->op
== nir_texop_txs
&&
3697 instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&&
3699 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
3700 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
3701 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, result
, two
, "");
3702 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
3703 result
= LLVMBuildInsertElement(ctx
->builder
, result
, z
, two
, "");
3704 } else if (instr
->dest
.ssa
.num_components
!= 4)
3705 result
= trim_vector(ctx
, result
, instr
->dest
.ssa
.num_components
);
3709 assert(instr
->dest
.is_ssa
);
3710 result
= to_integer(ctx
, result
);
3711 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
3716 static void visit_phi(struct nir_to_llvm_context
*ctx
, nir_phi_instr
*instr
)
3718 LLVMTypeRef type
= get_def_type(ctx
, &instr
->dest
.ssa
);
3719 LLVMValueRef result
= LLVMBuildPhi(ctx
->builder
, type
, "");
3721 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
3722 _mesa_hash_table_insert(ctx
->phis
, instr
, result
);
3725 static void visit_post_phi(struct nir_to_llvm_context
*ctx
,
3726 nir_phi_instr
*instr
,
3727 LLVMValueRef llvm_phi
)
3729 nir_foreach_phi_src(src
, instr
) {
3730 LLVMBasicBlockRef block
= get_block(ctx
, src
->pred
);
3731 LLVMValueRef llvm_src
= get_src(ctx
, src
->src
);
3733 LLVMAddIncoming(llvm_phi
, &llvm_src
, &block
, 1);
3737 static void phi_post_pass(struct nir_to_llvm_context
*ctx
)
3739 struct hash_entry
*entry
;
3740 hash_table_foreach(ctx
->phis
, entry
) {
3741 visit_post_phi(ctx
, (nir_phi_instr
*)entry
->key
,
3742 (LLVMValueRef
)entry
->data
);
3747 static void visit_ssa_undef(struct nir_to_llvm_context
*ctx
,
3748 nir_ssa_undef_instr
*instr
)
3750 unsigned num_components
= instr
->def
.num_components
;
3753 if (num_components
== 1)
3754 undef
= LLVMGetUndef(ctx
->i32
);
3756 undef
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, num_components
));
3758 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, undef
);
3761 static void visit_jump(struct nir_to_llvm_context
*ctx
,
3762 nir_jump_instr
*instr
)
3764 switch (instr
->type
) {
3765 case nir_jump_break
:
3766 LLVMBuildBr(ctx
->builder
, ctx
->break_block
);
3767 LLVMClearInsertionPosition(ctx
->builder
);
3769 case nir_jump_continue
:
3770 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
3771 LLVMClearInsertionPosition(ctx
->builder
);
3774 fprintf(stderr
, "Unknown NIR jump instr: ");
3775 nir_print_instr(&instr
->instr
, stderr
);
3776 fprintf(stderr
, "\n");
3781 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
3782 struct exec_list
*list
);
3784 static void visit_block(struct nir_to_llvm_context
*ctx
, nir_block
*block
)
3786 LLVMBasicBlockRef llvm_block
= LLVMGetInsertBlock(ctx
->builder
);
3787 nir_foreach_instr(instr
, block
)
3789 switch (instr
->type
) {
3790 case nir_instr_type_alu
:
3791 visit_alu(ctx
, nir_instr_as_alu(instr
));
3793 case nir_instr_type_load_const
:
3794 visit_load_const(ctx
, nir_instr_as_load_const(instr
));
3796 case nir_instr_type_intrinsic
:
3797 visit_intrinsic(ctx
, nir_instr_as_intrinsic(instr
));
3799 case nir_instr_type_tex
:
3800 visit_tex(ctx
, nir_instr_as_tex(instr
));
3802 case nir_instr_type_phi
:
3803 visit_phi(ctx
, nir_instr_as_phi(instr
));
3805 case nir_instr_type_ssa_undef
:
3806 visit_ssa_undef(ctx
, nir_instr_as_ssa_undef(instr
));
3808 case nir_instr_type_jump
:
3809 visit_jump(ctx
, nir_instr_as_jump(instr
));
3812 fprintf(stderr
, "Unknown NIR instr type: ");
3813 nir_print_instr(instr
, stderr
);
3814 fprintf(stderr
, "\n");
3819 _mesa_hash_table_insert(ctx
->defs
, block
, llvm_block
);
3822 static void visit_if(struct nir_to_llvm_context
*ctx
, nir_if
*if_stmt
)
3824 LLVMValueRef value
= get_src(ctx
, if_stmt
->condition
);
3826 LLVMBasicBlockRef merge_block
=
3827 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
3828 LLVMBasicBlockRef if_block
=
3829 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
3830 LLVMBasicBlockRef else_block
= merge_block
;
3831 if (!exec_list_is_empty(&if_stmt
->else_list
))
3832 else_block
= LLVMAppendBasicBlockInContext(
3833 ctx
->context
, ctx
->main_function
, "");
3835 LLVMValueRef cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, value
,
3836 LLVMConstInt(ctx
->i32
, 0, false), "");
3837 LLVMBuildCondBr(ctx
->builder
, cond
, if_block
, else_block
);
3839 LLVMPositionBuilderAtEnd(ctx
->builder
, if_block
);
3840 visit_cf_list(ctx
, &if_stmt
->then_list
);
3841 if (LLVMGetInsertBlock(ctx
->builder
))
3842 LLVMBuildBr(ctx
->builder
, merge_block
);
3844 if (!exec_list_is_empty(&if_stmt
->else_list
)) {
3845 LLVMPositionBuilderAtEnd(ctx
->builder
, else_block
);
3846 visit_cf_list(ctx
, &if_stmt
->else_list
);
3847 if (LLVMGetInsertBlock(ctx
->builder
))
3848 LLVMBuildBr(ctx
->builder
, merge_block
);
3851 LLVMPositionBuilderAtEnd(ctx
->builder
, merge_block
);
3854 static void visit_loop(struct nir_to_llvm_context
*ctx
, nir_loop
*loop
)
3856 LLVMBasicBlockRef continue_parent
= ctx
->continue_block
;
3857 LLVMBasicBlockRef break_parent
= ctx
->break_block
;
3859 ctx
->continue_block
=
3860 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
3862 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
3864 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
3865 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->continue_block
);
3866 visit_cf_list(ctx
, &loop
->body
);
3868 if (LLVMGetInsertBlock(ctx
->builder
))
3869 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
3870 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->break_block
);
3872 ctx
->continue_block
= continue_parent
;
3873 ctx
->break_block
= break_parent
;
3876 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
3877 struct exec_list
*list
)
3879 foreach_list_typed(nir_cf_node
, node
, node
, list
)
3881 switch (node
->type
) {
3882 case nir_cf_node_block
:
3883 visit_block(ctx
, nir_cf_node_as_block(node
));
3886 case nir_cf_node_if
:
3887 visit_if(ctx
, nir_cf_node_as_if(node
));
3890 case nir_cf_node_loop
:
3891 visit_loop(ctx
, nir_cf_node_as_loop(node
));
3901 handle_vs_input_decl(struct nir_to_llvm_context
*ctx
,
3902 struct nir_variable
*variable
)
3904 LLVMValueRef t_list_ptr
= ctx
->vertex_buffers
;
3905 LLVMValueRef t_offset
;
3906 LLVMValueRef t_list
;
3907 LLVMValueRef args
[3];
3909 LLVMValueRef buffer_index
;
3910 int index
= variable
->data
.location
- VERT_ATTRIB_GENERIC0
;
3911 int idx
= variable
->data
.location
;
3912 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, true);
3914 variable
->data
.driver_location
= idx
* 4;
3916 if (ctx
->options
->key
.vs
.instance_rate_inputs
& (1u << index
)) {
3917 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->instance_id
,
3918 ctx
->start_instance
, "");
3919 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
3920 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
3922 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->vertex_id
,
3923 ctx
->base_vertex
, "");
3925 for (unsigned i
= 0; i
< attrib_count
; ++i
, ++idx
) {
3926 t_offset
= LLVMConstInt(ctx
->i32
, index
+ i
, false);
3928 t_list
= ac_build_indexed_load_const(&ctx
->ac
, t_list_ptr
, t_offset
);
3930 args
[1] = LLVMConstInt(ctx
->i32
, 0, false);
3931 args
[2] = buffer_index
;
3932 input
= ac_emit_llvm_intrinsic(&ctx
->ac
,
3933 "llvm.SI.vs.load.input", ctx
->v4f32
, args
, 3,
3934 AC_FUNC_ATTR_READNONE
| AC_FUNC_ATTR_NOUNWIND
);
3936 for (unsigned chan
= 0; chan
< 4; chan
++) {
3937 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
3938 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
, chan
)] =
3939 to_integer(ctx
, LLVMBuildExtractElement(ctx
->builder
,
3940 input
, llvm_chan
, ""));
3946 static void interp_fs_input(struct nir_to_llvm_context
*ctx
,
3948 LLVMValueRef interp_param
,
3949 LLVMValueRef prim_mask
,
3950 LLVMValueRef result
[4])
3952 LLVMValueRef attr_number
;
3955 bool interp
= interp_param
!= NULL
;
3957 attr_number
= LLVMConstInt(ctx
->i32
, attr
, false);
3959 /* fs.constant returns the param from the middle vertex, so it's not
3960 * really useful for flat shading. It's meant to be used for custom
3961 * interpolation (but the intrinsic can't fetch from the other two
3964 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
3965 * to do the right thing. The only reason we use fs.constant is that
3966 * fs.interp cannot be used on integers, because they can be equal
3970 interp_param
= LLVMBuildBitCast(ctx
->builder
, interp_param
,
3971 LLVMVectorType(ctx
->f32
, 2), "");
3973 i
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
3975 j
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
3979 for (chan
= 0; chan
< 4; chan
++) {
3980 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
3983 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
3988 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
3989 LLVMConstInt(ctx
->i32
, 2, false),
3998 handle_fs_input_decl(struct nir_to_llvm_context
*ctx
,
3999 struct nir_variable
*variable
)
4001 int idx
= variable
->data
.location
;
4002 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4003 LLVMValueRef interp
;
4005 variable
->data
.driver_location
= idx
* 4;
4006 ctx
->input_mask
|= ((1ull << attrib_count
) - 1) << variable
->data
.location
;
4008 if (glsl_get_base_type(glsl_without_array(variable
->type
)) == GLSL_TYPE_FLOAT
) {
4009 unsigned interp_type
;
4010 if (variable
->data
.sample
) {
4011 interp_type
= INTERP_SAMPLE
;
4012 ctx
->shader_info
->fs
.force_persample
= true;
4013 } else if (variable
->data
.centroid
)
4014 interp_type
= INTERP_CENTROID
;
4016 interp_type
= INTERP_CENTER
;
4018 interp
= lookup_interp_param(ctx
, variable
->data
.interpolation
, interp_type
);
4022 for (unsigned i
= 0; i
< attrib_count
; ++i
)
4023 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
+ i
, 0)] = interp
;
4028 handle_shader_input_decl(struct nir_to_llvm_context
*ctx
,
4029 struct nir_variable
*variable
)
4031 switch (ctx
->stage
) {
4032 case MESA_SHADER_VERTEX
:
4033 handle_vs_input_decl(ctx
, variable
);
4035 case MESA_SHADER_FRAGMENT
:
4036 handle_fs_input_decl(ctx
, variable
);
4045 handle_fs_inputs_pre(struct nir_to_llvm_context
*ctx
,
4046 struct nir_shader
*nir
)
4049 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_INPUTS
; ++i
) {
4050 LLVMValueRef interp_param
;
4051 LLVMValueRef
*inputs
= ctx
->inputs
+radeon_llvm_reg_index_soa(i
, 0);
4053 if (!(ctx
->input_mask
& (1ull << i
)))
4056 if (i
>= VARYING_SLOT_VAR0
|| i
== VARYING_SLOT_PNTC
||
4057 i
== VARYING_SLOT_PRIMITIVE_ID
|| i
== VARYING_SLOT_LAYER
) {
4058 interp_param
= *inputs
;
4059 interp_fs_input(ctx
, index
, interp_param
, ctx
->prim_mask
,
4063 ctx
->shader_info
->fs
.flat_shaded_mask
|= 1u << index
;
4065 } else if (i
== VARYING_SLOT_POS
) {
4066 for(int i
= 0; i
< 3; ++i
)
4067 inputs
[i
] = ctx
->frag_pos
[i
];
4069 inputs
[3] = ac_emit_fdiv(&ctx
->ac
, ctx
->f32one
, ctx
->frag_pos
[3]);
4072 ctx
->shader_info
->fs
.num_interp
= index
;
4073 if (ctx
->input_mask
& (1 << VARYING_SLOT_PNTC
))
4074 ctx
->shader_info
->fs
.has_pcoord
= true;
4075 if (ctx
->input_mask
& (1 << VARYING_SLOT_PRIMITIVE_ID
))
4076 ctx
->shader_info
->fs
.prim_id_input
= true;
4077 if (ctx
->input_mask
& (1 << VARYING_SLOT_LAYER
))
4078 ctx
->shader_info
->fs
.layer_input
= true;
4079 ctx
->shader_info
->fs
.input_mask
= ctx
->input_mask
>> VARYING_SLOT_VAR0
;
4083 ac_build_alloca(struct nir_to_llvm_context
*ctx
,
4087 LLVMBuilderRef builder
= ctx
->builder
;
4088 LLVMBasicBlockRef current_block
= LLVMGetInsertBlock(builder
);
4089 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
4090 LLVMBasicBlockRef first_block
= LLVMGetEntryBasicBlock(function
);
4091 LLVMValueRef first_instr
= LLVMGetFirstInstruction(first_block
);
4092 LLVMBuilderRef first_builder
= LLVMCreateBuilderInContext(ctx
->context
);
4096 LLVMPositionBuilderBefore(first_builder
, first_instr
);
4098 LLVMPositionBuilderAtEnd(first_builder
, first_block
);
4101 res
= LLVMBuildAlloca(first_builder
, type
, name
);
4102 LLVMBuildStore(builder
, LLVMConstNull(type
), res
);
4104 LLVMDisposeBuilder(first_builder
);
4109 static LLVMValueRef
si_build_alloca_undef(struct nir_to_llvm_context
*ctx
,
4113 LLVMValueRef ptr
= ac_build_alloca(ctx
, type
, name
);
4114 LLVMBuildStore(ctx
->builder
, LLVMGetUndef(type
), ptr
);
4119 handle_shader_output_decl(struct nir_to_llvm_context
*ctx
,
4120 struct nir_variable
*variable
)
4122 int idx
= variable
->data
.location
+ variable
->data
.index
;
4123 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4125 variable
->data
.driver_location
= idx
* 4;
4127 if (ctx
->stage
== MESA_SHADER_VERTEX
||
4128 ctx
->stage
== MESA_SHADER_GEOMETRY
) {
4129 if (idx
== VARYING_SLOT_CLIP_DIST0
||
4130 idx
== VARYING_SLOT_CULL_DIST0
) {
4131 int length
= glsl_get_length(variable
->type
);
4132 if (ctx
->stage
== MESA_SHADER_VERTEX
) {
4133 if (idx
== VARYING_SLOT_CLIP_DIST0
) {
4134 ctx
->shader_info
->vs
.clip_dist_mask
= (1 << length
) - 1;
4135 ctx
->num_output_clips
= length
;
4136 } else if (idx
== VARYING_SLOT_CULL_DIST0
) {
4137 ctx
->shader_info
->vs
.cull_dist_mask
= (1 << length
) - 1;
4138 ctx
->num_output_culls
= length
;
4148 for (unsigned i
= 0; i
< attrib_count
; ++i
) {
4149 for (unsigned chan
= 0; chan
< 4; chan
++) {
4150 ctx
->outputs
[radeon_llvm_reg_index_soa(idx
+ i
, chan
)] =
4151 si_build_alloca_undef(ctx
, ctx
->f32
, "");
4154 ctx
->output_mask
|= ((1ull << attrib_count
) - 1) << idx
;
4158 setup_locals(struct nir_to_llvm_context
*ctx
,
4159 struct nir_function
*func
)
4162 ctx
->num_locals
= 0;
4163 nir_foreach_variable(variable
, &func
->impl
->locals
) {
4164 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4165 variable
->data
.driver_location
= ctx
->num_locals
* 4;
4166 ctx
->num_locals
+= attrib_count
;
4168 ctx
->locals
= malloc(4 * ctx
->num_locals
* sizeof(LLVMValueRef
));
4172 for (i
= 0; i
< ctx
->num_locals
; i
++) {
4173 for (j
= 0; j
< 4; j
++) {
4174 ctx
->locals
[i
* 4 + j
] =
4175 si_build_alloca_undef(ctx
, ctx
->f32
, "temp");
4181 emit_float_saturate(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
, float lo
, float hi
)
4183 v
= to_float(ctx
, v
);
4184 v
= emit_intrin_2f_param(ctx
, "llvm.maxnum.f32", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, lo
));
4185 return emit_intrin_2f_param(ctx
, "llvm.minnum.f32", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, hi
));
4189 static LLVMValueRef
emit_pack_int16(struct nir_to_llvm_context
*ctx
,
4190 LLVMValueRef src0
, LLVMValueRef src1
)
4192 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
4193 LLVMValueRef comp
[2];
4195 comp
[0] = LLVMBuildAnd(ctx
->builder
, src0
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4196 comp
[1] = LLVMBuildAnd(ctx
->builder
, src1
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4197 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
4198 return LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
4201 /* Initialize arguments for the shader export intrinsic */
4203 si_llvm_init_export_args(struct nir_to_llvm_context
*ctx
,
4204 LLVMValueRef
*values
,
4208 /* Default is 0xf. Adjusted below depending on the format. */
4209 args
[0] = LLVMConstInt(ctx
->i32
, target
!= V_008DFC_SQ_EXP_NULL
? 0xf : 0, false);
4210 /* Specify whether the EXEC mask represents the valid mask */
4211 args
[1] = LLVMConstInt(ctx
->i32
, 0, false);
4213 /* Specify whether this is the last export */
4214 args
[2] = LLVMConstInt(ctx
->i32
, 0, false);
4215 /* Specify the target we are exporting */
4216 args
[3] = LLVMConstInt(ctx
->i32
, target
, false);
4218 args
[4] = LLVMConstInt(ctx
->i32
, 0, false); /* COMPR flag */
4219 args
[5] = LLVMGetUndef(ctx
->f32
);
4220 args
[6] = LLVMGetUndef(ctx
->f32
);
4221 args
[7] = LLVMGetUndef(ctx
->f32
);
4222 args
[8] = LLVMGetUndef(ctx
->f32
);
4227 if (ctx
->stage
== MESA_SHADER_FRAGMENT
&& target
>= V_008DFC_SQ_EXP_MRT
) {
4228 LLVMValueRef val
[4];
4229 unsigned index
= target
- V_008DFC_SQ_EXP_MRT
;
4230 unsigned col_format
= (ctx
->options
->key
.fs
.col_format
>> (4 * index
)) & 0xf;
4231 bool is_int8
= (ctx
->options
->key
.fs
.is_int8
>> index
) & 1;
4233 switch(col_format
) {
4234 case V_028714_SPI_SHADER_ZERO
:
4235 args
[0] = LLVMConstInt(ctx
->i32
, 0x0, 0);
4236 args
[3] = LLVMConstInt(ctx
->i32
, V_008DFC_SQ_EXP_NULL
, 0);
4239 case V_028714_SPI_SHADER_32_R
:
4240 args
[0] = LLVMConstInt(ctx
->i32
, 0x1, 0);
4241 args
[5] = values
[0];
4244 case V_028714_SPI_SHADER_32_GR
:
4245 args
[0] = LLVMConstInt(ctx
->i32
, 0x3, 0);
4246 args
[5] = values
[0];
4247 args
[6] = values
[1];
4250 case V_028714_SPI_SHADER_32_AR
:
4251 args
[0] = LLVMConstInt(ctx
->i32
, 0x9, 0);
4252 args
[5] = values
[0];
4253 args
[8] = values
[3];
4256 case V_028714_SPI_SHADER_FP16_ABGR
:
4257 args
[4] = ctx
->i32one
;
4259 for (unsigned chan
= 0; chan
< 2; chan
++) {
4260 LLVMValueRef pack_args
[2] = {
4262 values
[2 * chan
+ 1]
4264 LLVMValueRef packed
;
4266 packed
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.packf16",
4267 ctx
->i32
, pack_args
, 2,
4268 AC_FUNC_ATTR_READNONE
);
4269 args
[chan
+ 5] = packed
;
4273 case V_028714_SPI_SHADER_UNORM16_ABGR
:
4274 for (unsigned chan
= 0; chan
< 4; chan
++) {
4275 val
[chan
] = emit_float_saturate(ctx
, values
[chan
], 0, 1);
4276 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
4277 LLVMConstReal(ctx
->f32
, 65535), "");
4278 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
4279 LLVMConstReal(ctx
->f32
, 0.5), "");
4280 val
[chan
] = LLVMBuildFPToUI(ctx
->builder
, val
[chan
],
4284 args
[4] = ctx
->i32one
;
4285 args
[5] = emit_pack_int16(ctx
, val
[0], val
[1]);
4286 args
[6] = emit_pack_int16(ctx
, val
[2], val
[3]);
4289 case V_028714_SPI_SHADER_SNORM16_ABGR
:
4290 for (unsigned chan
= 0; chan
< 4; chan
++) {
4291 val
[chan
] = emit_float_saturate(ctx
, values
[chan
], -1, 1);
4292 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
4293 LLVMConstReal(ctx
->f32
, 32767), "");
4295 /* If positive, add 0.5, else add -0.5. */
4296 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
4297 LLVMBuildSelect(ctx
->builder
,
4298 LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
,
4299 val
[chan
], ctx
->f32zero
, ""),
4300 LLVMConstReal(ctx
->f32
, 0.5),
4301 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
4302 val
[chan
] = LLVMBuildFPToSI(ctx
->builder
, val
[chan
], ctx
->i32
, "");
4305 args
[4] = ctx
->i32one
;
4306 args
[5] = emit_pack_int16(ctx
, val
[0], val
[1]);
4307 args
[6] = emit_pack_int16(ctx
, val
[2], val
[3]);
4310 case V_028714_SPI_SHADER_UINT16_ABGR
: {
4311 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 255 : 65535, 0);
4313 for (unsigned chan
= 0; chan
< 4; chan
++) {
4314 val
[chan
] = to_integer(ctx
, values
[chan
]);
4315 val
[chan
] = emit_minmax_int(ctx
, LLVMIntULT
, val
[chan
], max
);
4318 args
[4] = ctx
->i32one
;
4319 args
[5] = emit_pack_int16(ctx
, val
[0], val
[1]);
4320 args
[6] = emit_pack_int16(ctx
, val
[2], val
[3]);
4324 case V_028714_SPI_SHADER_SINT16_ABGR
: {
4325 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 127 : 32767, 0);
4326 LLVMValueRef min
= LLVMConstInt(ctx
->i32
, is_int8
? -128 : -32768, 0);
4329 for (unsigned chan
= 0; chan
< 4; chan
++) {
4330 val
[chan
] = to_integer(ctx
, values
[chan
]);
4331 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSLT
, val
[chan
], max
);
4332 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSGT
, val
[chan
], min
);
4335 args
[4] = ctx
->i32one
;
4336 args
[5] = emit_pack_int16(ctx
, val
[0], val
[1]);
4337 args
[6] = emit_pack_int16(ctx
, val
[2], val
[3]);
4342 case V_028714_SPI_SHADER_32_ABGR
:
4343 memcpy(&args
[5], values
, sizeof(values
[0]) * 4);
4347 memcpy(&args
[5], values
, sizeof(values
[0]) * 4);
4349 for (unsigned i
= 5; i
< 9; ++i
)
4350 args
[i
] = to_float(ctx
, args
[i
]);
4354 handle_vs_outputs_post(struct nir_to_llvm_context
*ctx
)
4356 uint32_t param_count
= 0;
4358 unsigned pos_idx
, num_pos_exports
= 0;
4359 LLVMValueRef args
[9];
4360 LLVMValueRef pos_args
[4][9] = { { 0 } };
4361 LLVMValueRef psize_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
4363 const uint64_t clip_mask
= ctx
->output_mask
& ((1ull << VARYING_SLOT_CLIP_DIST0
) |
4364 (1ull << VARYING_SLOT_CLIP_DIST1
) |
4365 (1ull << VARYING_SLOT_CULL_DIST0
) |
4366 (1ull << VARYING_SLOT_CULL_DIST1
));
4368 ctx
->shader_info
->vs
.prim_id_output
= 0xffffffff;
4369 ctx
->shader_info
->vs
.layer_output
= 0xffffffff;
4371 LLVMValueRef slots
[8];
4374 if (ctx
->shader_info
->vs
.cull_dist_mask
)
4375 ctx
->shader_info
->vs
.cull_dist_mask
<<= ctx
->num_output_clips
;
4377 i
= VARYING_SLOT_CLIP_DIST0
;
4378 for (j
= 0; j
< ctx
->num_output_clips
; j
++)
4379 slots
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4380 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
4381 i
= VARYING_SLOT_CULL_DIST0
;
4382 for (j
= 0; j
< ctx
->num_output_culls
; j
++)
4383 slots
[ctx
->num_output_clips
+ j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4384 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
4386 for (i
= ctx
->num_output_clips
+ ctx
->num_output_culls
; i
< 8; i
++)
4387 slots
[i
] = LLVMGetUndef(ctx
->f32
);
4389 if (ctx
->num_output_clips
+ ctx
->num_output_culls
> 4) {
4390 target
= V_008DFC_SQ_EXP_POS
+ 3;
4391 si_llvm_init_export_args(ctx
, &slots
[4], target
, args
);
4392 memcpy(pos_args
[target
- V_008DFC_SQ_EXP_POS
],
4393 args
, sizeof(args
));
4396 target
= V_008DFC_SQ_EXP_POS
+ 2;
4397 si_llvm_init_export_args(ctx
, &slots
[0], target
, args
);
4398 memcpy(pos_args
[target
- V_008DFC_SQ_EXP_POS
],
4399 args
, sizeof(args
));
4403 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
4404 LLVMValueRef values
[4];
4405 if (!(ctx
->output_mask
& (1ull << i
)))
4408 for (unsigned j
= 0; j
< 4; j
++)
4409 values
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4410 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
4412 if (i
== VARYING_SLOT_POS
) {
4413 target
= V_008DFC_SQ_EXP_POS
;
4414 } else if (i
== VARYING_SLOT_CLIP_DIST0
||
4415 i
== VARYING_SLOT_CLIP_DIST1
||
4416 i
== VARYING_SLOT_CULL_DIST0
||
4417 i
== VARYING_SLOT_CULL_DIST1
) {
4419 } else if (i
== VARYING_SLOT_PSIZ
) {
4420 ctx
->shader_info
->vs
.writes_pointsize
= true;
4421 psize_value
= values
[0];
4423 } else if (i
== VARYING_SLOT_LAYER
) {
4424 ctx
->shader_info
->vs
.writes_layer
= true;
4425 layer_value
= values
[0];
4426 ctx
->shader_info
->vs
.layer_output
= param_count
;
4427 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
4429 } else if (i
== VARYING_SLOT_VIEWPORT
) {
4430 ctx
->shader_info
->vs
.writes_viewport_index
= true;
4431 viewport_index_value
= values
[0];
4433 } else if (i
== VARYING_SLOT_PRIMITIVE_ID
) {
4434 ctx
->shader_info
->vs
.prim_id_output
= param_count
;
4435 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
4437 } else if (i
>= VARYING_SLOT_VAR0
) {
4438 ctx
->shader_info
->vs
.export_mask
|= 1u << (i
- VARYING_SLOT_VAR0
);
4439 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
4443 si_llvm_init_export_args(ctx
, values
, target
, args
);
4445 if (target
>= V_008DFC_SQ_EXP_POS
&&
4446 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
4447 memcpy(pos_args
[target
- V_008DFC_SQ_EXP_POS
],
4448 args
, sizeof(args
));
4450 ac_emit_llvm_intrinsic(&ctx
->ac
,
4457 /* We need to add the position output manually if it's missing. */
4458 if (!pos_args
[0][0]) {
4459 pos_args
[0][0] = LLVMConstInt(ctx
->i32
, 0xf, false);
4460 pos_args
[0][1] = ctx
->i32zero
; /* EXEC mask */
4461 pos_args
[0][2] = ctx
->i32zero
; /* last export? */
4462 pos_args
[0][3] = LLVMConstInt(ctx
->i32
, V_008DFC_SQ_EXP_POS
, false);
4463 pos_args
[0][4] = ctx
->i32zero
; /* COMPR flag */
4464 pos_args
[0][5] = ctx
->f32zero
; /* X */
4465 pos_args
[0][6] = ctx
->f32zero
; /* Y */
4466 pos_args
[0][7] = ctx
->f32zero
; /* Z */
4467 pos_args
[0][8] = ctx
->f32one
; /* W */
4470 uint32_t mask
= ((ctx
->shader_info
->vs
.writes_pointsize
== true ? 1 : 0) |
4471 (ctx
->shader_info
->vs
.writes_layer
== true ? 4 : 0) |
4472 (ctx
->shader_info
->vs
.writes_viewport_index
== true ? 8 : 0));
4474 pos_args
[1][0] = LLVMConstInt(ctx
->i32
, mask
, false); /* writemask */
4475 pos_args
[1][1] = ctx
->i32zero
; /* EXEC mask */
4476 pos_args
[1][2] = ctx
->i32zero
; /* last export? */
4477 pos_args
[1][3] = LLVMConstInt(ctx
->i32
, V_008DFC_SQ_EXP_POS
+ 1, false);
4478 pos_args
[1][4] = ctx
->i32zero
; /* COMPR flag */
4479 pos_args
[1][5] = ctx
->f32zero
; /* X */
4480 pos_args
[1][6] = ctx
->f32zero
; /* Y */
4481 pos_args
[1][7] = ctx
->f32zero
; /* Z */
4482 pos_args
[1][8] = ctx
->f32zero
; /* W */
4484 if (ctx
->shader_info
->vs
.writes_pointsize
== true)
4485 pos_args
[1][5] = psize_value
;
4486 if (ctx
->shader_info
->vs
.writes_layer
== true)
4487 pos_args
[1][7] = layer_value
;
4488 if (ctx
->shader_info
->vs
.writes_viewport_index
== true)
4489 pos_args
[1][8] = viewport_index_value
;
4491 for (i
= 0; i
< 4; i
++) {
4497 for (i
= 0; i
< 4; i
++) {
4498 if (!pos_args
[i
][0])
4501 /* Specify the target we are exporting */
4502 pos_args
[i
][3] = LLVMConstInt(ctx
->i32
, V_008DFC_SQ_EXP_POS
+ pos_idx
++, false);
4503 if (pos_idx
== num_pos_exports
)
4504 pos_args
[i
][2] = ctx
->i32one
;
4505 ac_emit_llvm_intrinsic(&ctx
->ac
,
4511 ctx
->shader_info
->vs
.pos_exports
= num_pos_exports
;
4512 ctx
->shader_info
->vs
.param_exports
= param_count
;
4516 handle_es_outputs_post(struct nir_to_llvm_context
*ctx
)
4519 uint64_t max_output_written
= 0;
4520 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
4521 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
4523 if (!(ctx
->output_mask
& (1ull << i
)))
4526 param_index
= shader_io_get_unique_index(i
);
4528 if (param_index
> max_output_written
)
4529 max_output_written
= param_index
;
4531 for (j
= 0; j
< 4; j
++) {
4532 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], "");
4533 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
4535 ac_build_tbuffer_store(&ctx
->ac
,
4538 LLVMGetUndef(ctx
->i32
), ctx
->es2gs_offset
,
4539 (4 * param_index
+ j
) * 4,
4540 V_008F0C_BUF_DATA_FORMAT_32
,
4541 V_008F0C_BUF_NUM_FORMAT_UINT
,
4545 ctx
->shader_info
->vs
.esgs_itemsize
= (max_output_written
+ 1) * 16;
4549 si_export_mrt_color(struct nir_to_llvm_context
*ctx
,
4550 LLVMValueRef
*color
, unsigned param
, bool is_last
)
4552 LLVMValueRef args
[9];
4554 si_llvm_init_export_args(ctx
, color
, param
,
4558 args
[1] = ctx
->i32one
; /* whether the EXEC mask is valid */
4559 args
[2] = ctx
->i32one
; /* DONE bit */
4560 } else if (args
[0] == ctx
->i32zero
)
4561 return; /* unnecessary NULL export */
4563 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.export",
4564 ctx
->voidt
, args
, 9, 0);
4568 si_export_mrt_z(struct nir_to_llvm_context
*ctx
,
4569 LLVMValueRef depth
, LLVMValueRef stencil
,
4570 LLVMValueRef samplemask
)
4572 LLVMValueRef args
[9];
4574 args
[1] = ctx
->i32one
; /* whether the EXEC mask is valid */
4575 args
[2] = ctx
->i32one
; /* DONE bit */
4576 /* Specify the target we are exporting */
4577 args
[3] = LLVMConstInt(ctx
->i32
, V_008DFC_SQ_EXP_MRTZ
, false);
4579 args
[4] = ctx
->i32zero
; /* COMP flag */
4580 args
[5] = LLVMGetUndef(ctx
->f32
); /* R, depth */
4581 args
[6] = LLVMGetUndef(ctx
->f32
); /* G, stencil test val[0:7], stencil op val[8:15] */
4582 args
[7] = LLVMGetUndef(ctx
->f32
); /* B, sample mask */
4583 args
[8] = LLVMGetUndef(ctx
->f32
); /* A, alpha to mask */
4596 args
[7] = samplemask
;
4600 /* SI (except OLAND) has a bug that it only looks
4601 * at the X writemask component. */
4602 if (ctx
->options
->chip_class
== SI
&&
4603 ctx
->options
->family
!= CHIP_OLAND
)
4606 args
[0] = LLVMConstInt(ctx
->i32
, mask
, false);
4607 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.export",
4608 ctx
->voidt
, args
, 9, 0);
4612 handle_fs_outputs_post(struct nir_to_llvm_context
*ctx
)
4615 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
4617 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
4618 LLVMValueRef values
[4];
4620 if (!(ctx
->output_mask
& (1ull << i
)))
4623 if (i
== FRAG_RESULT_DEPTH
) {
4624 ctx
->shader_info
->fs
.writes_z
= true;
4625 depth
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4626 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
4627 } else if (i
== FRAG_RESULT_STENCIL
) {
4628 ctx
->shader_info
->fs
.writes_stencil
= true;
4629 stencil
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4630 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
4633 for (unsigned j
= 0; j
< 4; j
++)
4634 values
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4635 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
4637 if (!ctx
->shader_info
->fs
.writes_z
&& !ctx
->shader_info
->fs
.writes_stencil
)
4638 last
= ctx
->output_mask
<= ((1ull << (i
+ 1)) - 1);
4640 si_export_mrt_color(ctx
, values
, V_008DFC_SQ_EXP_MRT
+ index
, last
);
4645 if (depth
|| stencil
)
4646 si_export_mrt_z(ctx
, depth
, stencil
, samplemask
);
4648 si_export_mrt_color(ctx
, NULL
, V_008DFC_SQ_EXP_NULL
, true);
4650 ctx
->shader_info
->fs
.output_mask
= index
? ((1ull << index
) - 1) : 0;
4654 emit_gs_epilogue(struct nir_to_llvm_context
*ctx
)
4656 ac_emit_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
, ctx
->gs_wave_id
);
4660 handle_shader_outputs_post(struct nir_to_llvm_context
*ctx
)
4662 switch (ctx
->stage
) {
4663 case MESA_SHADER_VERTEX
:
4664 if (ctx
->options
->key
.vs
.as_es
)
4665 handle_es_outputs_post(ctx
);
4667 handle_vs_outputs_post(ctx
);
4669 case MESA_SHADER_FRAGMENT
:
4670 handle_fs_outputs_post(ctx
);
4672 case MESA_SHADER_GEOMETRY
:
4673 emit_gs_epilogue(ctx
);
4681 handle_shared_compute_var(struct nir_to_llvm_context
*ctx
,
4682 struct nir_variable
*variable
, uint32_t *offset
, int idx
)
4684 unsigned size
= glsl_count_attribute_slots(variable
->type
, false);
4685 variable
->data
.driver_location
= *offset
;
4689 static void ac_llvm_finalize_module(struct nir_to_llvm_context
* ctx
)
4691 LLVMPassManagerRef passmgr
;
4692 /* Create the pass manager */
4693 passmgr
= LLVMCreateFunctionPassManagerForModule(
4696 /* This pass should eliminate all the load and store instructions */
4697 LLVMAddPromoteMemoryToRegisterPass(passmgr
);
4699 /* Add some optimization passes */
4700 LLVMAddScalarReplAggregatesPass(passmgr
);
4701 LLVMAddLICMPass(passmgr
);
4702 LLVMAddAggressiveDCEPass(passmgr
);
4703 LLVMAddCFGSimplificationPass(passmgr
);
4704 LLVMAddInstructionCombiningPass(passmgr
);
4707 LLVMInitializeFunctionPassManager(passmgr
);
4708 LLVMRunFunctionPassManager(passmgr
, ctx
->main_function
);
4709 LLVMFinalizeFunctionPassManager(passmgr
);
4711 LLVMDisposeBuilder(ctx
->builder
);
4712 LLVMDisposePassManager(passmgr
);
4716 ac_setup_rings(struct nir_to_llvm_context
*ctx
)
4718 if (ctx
->stage
== MESA_SHADER_VERTEX
&& ctx
->options
->key
.vs
.as_es
) {
4719 ctx
->esgs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, ctx
->i32one
);
4722 if (ctx
->is_gs_copy_shader
) {
4723 ctx
->gsvs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, 3, false));
4725 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
4727 ctx
->esgs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, 2, false));
4728 ctx
->gsvs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, 4, false));
4730 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v4i32
, "");
4732 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->gsvs_num_entries
, LLVMConstInt(ctx
->i32
, 2, false), "");
4733 tmp
= LLVMBuildExtractElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->i32one
, "");
4734 tmp
= LLVMBuildOr(ctx
->builder
, tmp
, ctx
->gsvs_ring_stride
, "");
4735 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, tmp
, ctx
->i32one
, "");
4737 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v16i8
, "");
4742 LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm
,
4743 struct nir_shader
*nir
,
4744 struct ac_shader_variant_info
*shader_info
,
4745 const struct ac_nir_compiler_options
*options
)
4747 struct nir_to_llvm_context ctx
= {0};
4748 struct nir_function
*func
;
4750 ctx
.options
= options
;
4751 ctx
.shader_info
= shader_info
;
4752 ctx
.context
= LLVMContextCreate();
4753 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
4755 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
4756 ctx
.ac
.module
= ctx
.module
;
4758 ctx
.has_ds_bpermute
= ctx
.options
->chip_class
>= VI
;
4760 memset(shader_info
, 0, sizeof(*shader_info
));
4762 LLVMSetTarget(ctx
.module
, options
->supports_spill
? "amdgcn-mesa-mesa3d" : "amdgcn--");
4765 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
4766 ctx
.ac
.builder
= ctx
.builder
;
4767 ctx
.stage
= nir
->stage
;
4769 for (i
= 0; i
< AC_UD_MAX_SETS
; i
++)
4770 shader_info
->user_sgprs_locs
.descriptor_sets
[i
].sgpr_idx
= -1;
4771 for (i
= 0; i
< AC_UD_MAX_UD
; i
++)
4772 shader_info
->user_sgprs_locs
.shader_data
[i
].sgpr_idx
= -1;
4774 create_function(&ctx
);
4776 if (nir
->stage
== MESA_SHADER_COMPUTE
) {
4778 nir_foreach_variable(variable
, &nir
->shared
)
4782 uint32_t shared_size
= 0;
4784 LLVMTypeRef i8p
= LLVMPointerType(ctx
.i8
, LOCAL_ADDR_SPACE
);
4785 nir_foreach_variable(variable
, &nir
->shared
) {
4786 handle_shared_compute_var(&ctx
, variable
, &shared_size
, idx
);
4791 var
= LLVMAddGlobalInAddressSpace(ctx
.module
,
4792 LLVMArrayType(ctx
.i8
, shared_size
),
4795 LLVMSetAlignment(var
, 4);
4796 ctx
.shared_memory
= LLVMBuildBitCast(ctx
.builder
, var
, i8p
, "");
4798 } else if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
4799 ctx
.gs_next_vertex
= ac_build_alloca(&ctx
, ctx
.i32
, "gs_next_vertex");
4801 ctx
.gs_max_out_vertices
= nir
->info
->gs
.vertices_out
;
4804 ac_setup_rings(&ctx
);
4806 nir_foreach_variable(variable
, &nir
->inputs
)
4807 handle_shader_input_decl(&ctx
, variable
);
4809 if (nir
->stage
== MESA_SHADER_FRAGMENT
)
4810 handle_fs_inputs_pre(&ctx
, nir
);
4812 nir_foreach_variable(variable
, &nir
->outputs
)
4813 handle_shader_output_decl(&ctx
, variable
);
4815 ctx
.defs
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
4816 _mesa_key_pointer_equal
);
4817 ctx
.phis
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
4818 _mesa_key_pointer_equal
);
4820 func
= (struct nir_function
*)exec_list_get_head(&nir
->functions
);
4822 setup_locals(&ctx
, func
);
4824 visit_cf_list(&ctx
, &func
->impl
->body
);
4825 phi_post_pass(&ctx
);
4827 handle_shader_outputs_post(&ctx
);
4828 LLVMBuildRetVoid(ctx
.builder
);
4830 ac_llvm_finalize_module(&ctx
);
4832 ralloc_free(ctx
.defs
);
4833 ralloc_free(ctx
.phis
);
4835 if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
4836 shader_info
->gs
.gsvs_vertex_size
= util_bitcount64(ctx
.output_mask
) * 16;
4837 shader_info
->gs
.max_gsvs_emit_size
= shader_info
->gs
.gsvs_vertex_size
*
4838 nir
->info
->gs
.vertices_out
;
4843 static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di
, void *context
)
4845 unsigned *retval
= (unsigned *)context
;
4846 LLVMDiagnosticSeverity severity
= LLVMGetDiagInfoSeverity(di
);
4847 char *description
= LLVMGetDiagInfoDescription(di
);
4849 if (severity
== LLVMDSError
) {
4851 fprintf(stderr
, "LLVM triggered Diagnostic Handler: %s\n",
4855 LLVMDisposeMessage(description
);
4858 static unsigned ac_llvm_compile(LLVMModuleRef M
,
4859 struct ac_shader_binary
*binary
,
4860 LLVMTargetMachineRef tm
)
4862 unsigned retval
= 0;
4864 LLVMContextRef llvm_ctx
;
4865 LLVMMemoryBufferRef out_buffer
;
4866 unsigned buffer_size
;
4867 const char *buffer_data
;
4870 /* Setup Diagnostic Handler*/
4871 llvm_ctx
= LLVMGetModuleContext(M
);
4873 LLVMContextSetDiagnosticHandler(llvm_ctx
, ac_diagnostic_handler
,
4877 mem_err
= LLVMTargetMachineEmitToMemoryBuffer(tm
, M
, LLVMObjectFile
,
4880 /* Process Errors/Warnings */
4882 fprintf(stderr
, "%s: %s", __FUNCTION__
, err
);
4888 /* Extract Shader Code*/
4889 buffer_size
= LLVMGetBufferSize(out_buffer
);
4890 buffer_data
= LLVMGetBufferStart(out_buffer
);
4892 ac_elf_read(buffer_data
, buffer_size
, binary
);
4895 LLVMDisposeMemoryBuffer(out_buffer
);
4901 static void ac_compile_llvm_module(LLVMTargetMachineRef tm
,
4902 LLVMModuleRef llvm_module
,
4903 struct ac_shader_binary
*binary
,
4904 struct ac_shader_config
*config
,
4905 struct ac_shader_variant_info
*shader_info
,
4906 gl_shader_stage stage
,
4907 bool dump_shader
, bool supports_spill
)
4910 ac_dump_module(llvm_module
);
4912 memset(binary
, 0, sizeof(*binary
));
4913 int v
= ac_llvm_compile(llvm_module
, binary
, tm
);
4915 fprintf(stderr
, "compile failed\n");
4919 fprintf(stderr
, "disasm:\n%s\n", binary
->disasm_string
);
4921 ac_shader_binary_read_config(binary
, config
, 0, supports_spill
);
4923 LLVMContextRef ctx
= LLVMGetModuleContext(llvm_module
);
4924 LLVMDisposeModule(llvm_module
);
4925 LLVMContextDispose(ctx
);
4927 if (stage
== MESA_SHADER_FRAGMENT
) {
4928 shader_info
->num_input_vgprs
= 0;
4929 if (G_0286CC_PERSP_SAMPLE_ENA(config
->spi_ps_input_addr
))
4930 shader_info
->num_input_vgprs
+= 2;
4931 if (G_0286CC_PERSP_CENTER_ENA(config
->spi_ps_input_addr
))
4932 shader_info
->num_input_vgprs
+= 2;
4933 if (G_0286CC_PERSP_CENTROID_ENA(config
->spi_ps_input_addr
))
4934 shader_info
->num_input_vgprs
+= 2;
4935 if (G_0286CC_PERSP_PULL_MODEL_ENA(config
->spi_ps_input_addr
))
4936 shader_info
->num_input_vgprs
+= 3;
4937 if (G_0286CC_LINEAR_SAMPLE_ENA(config
->spi_ps_input_addr
))
4938 shader_info
->num_input_vgprs
+= 2;
4939 if (G_0286CC_LINEAR_CENTER_ENA(config
->spi_ps_input_addr
))
4940 shader_info
->num_input_vgprs
+= 2;
4941 if (G_0286CC_LINEAR_CENTROID_ENA(config
->spi_ps_input_addr
))
4942 shader_info
->num_input_vgprs
+= 2;
4943 if (G_0286CC_LINE_STIPPLE_TEX_ENA(config
->spi_ps_input_addr
))
4944 shader_info
->num_input_vgprs
+= 1;
4945 if (G_0286CC_POS_X_FLOAT_ENA(config
->spi_ps_input_addr
))
4946 shader_info
->num_input_vgprs
+= 1;
4947 if (G_0286CC_POS_Y_FLOAT_ENA(config
->spi_ps_input_addr
))
4948 shader_info
->num_input_vgprs
+= 1;
4949 if (G_0286CC_POS_Z_FLOAT_ENA(config
->spi_ps_input_addr
))
4950 shader_info
->num_input_vgprs
+= 1;
4951 if (G_0286CC_POS_W_FLOAT_ENA(config
->spi_ps_input_addr
))
4952 shader_info
->num_input_vgprs
+= 1;
4953 if (G_0286CC_FRONT_FACE_ENA(config
->spi_ps_input_addr
))
4954 shader_info
->num_input_vgprs
+= 1;
4955 if (G_0286CC_ANCILLARY_ENA(config
->spi_ps_input_addr
))
4956 shader_info
->num_input_vgprs
+= 1;
4957 if (G_0286CC_SAMPLE_COVERAGE_ENA(config
->spi_ps_input_addr
))
4958 shader_info
->num_input_vgprs
+= 1;
4959 if (G_0286CC_POS_FIXED_PT_ENA(config
->spi_ps_input_addr
))
4960 shader_info
->num_input_vgprs
+= 1;
4962 config
->num_vgprs
= MAX2(config
->num_vgprs
, shader_info
->num_input_vgprs
);
4964 /* +3 for scratch wave offset and VCC */
4965 config
->num_sgprs
= MAX2(config
->num_sgprs
,
4966 shader_info
->num_input_sgprs
+ 3);
4969 void ac_compile_nir_shader(LLVMTargetMachineRef tm
,
4970 struct ac_shader_binary
*binary
,
4971 struct ac_shader_config
*config
,
4972 struct ac_shader_variant_info
*shader_info
,
4973 struct nir_shader
*nir
,
4974 const struct ac_nir_compiler_options
*options
,
4978 LLVMModuleRef llvm_module
= ac_translate_nir_to_llvm(tm
, nir
, shader_info
,
4981 ac_compile_llvm_module(tm
, llvm_module
, binary
, config
, shader_info
, nir
->stage
, dump_shader
, options
->supports_spill
);
4982 switch (nir
->stage
) {
4983 case MESA_SHADER_COMPUTE
:
4984 for (int i
= 0; i
< 3; ++i
)
4985 shader_info
->cs
.block_size
[i
] = nir
->info
->cs
.local_size
[i
];
4987 case MESA_SHADER_FRAGMENT
:
4988 shader_info
->fs
.early_fragment_test
= nir
->info
->fs
.early_fragment_tests
;
4990 case MESA_SHADER_GEOMETRY
:
4991 shader_info
->gs
.vertices_in
= nir
->info
->gs
.vertices_in
;
4992 shader_info
->gs
.vertices_out
= nir
->info
->gs
.vertices_out
;
4993 shader_info
->gs
.output_prim
= nir
->info
->gs
.output_primitive
;
4994 shader_info
->gs
.invocations
= nir
->info
->gs
.invocations
;
4996 case MESA_SHADER_VERTEX
:
4997 shader_info
->vs
.as_es
= options
->key
.vs
.as_es
;
5005 ac_gs_copy_shader_emit(struct nir_to_llvm_context
*ctx
)
5007 LLVMValueRef args
[9];
5008 args
[0] = ctx
->gsvs_ring
;
5009 args
[1] = LLVMBuildMul(ctx
->builder
, ctx
->vertex_id
, LLVMConstInt(ctx
->i32
, 4, false), "");
5010 args
[3] = ctx
->i32zero
;
5011 args
[4] = ctx
->i32one
; /* OFFEN */
5012 args
[5] = ctx
->i32zero
; /* IDXEN */
5013 args
[6] = ctx
->i32one
; /* GLC */
5014 args
[7] = ctx
->i32one
; /* SLC */
5015 args
[8] = ctx
->i32zero
; /* TFE */
5018 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5019 if (!(ctx
->output_mask
& (1ull << i
)))
5022 for (unsigned j
= 0; j
< 4; j
++) {
5024 args
[2] = LLVMConstInt(ctx
->i32
,
5026 ctx
->gs_max_out_vertices
* 16 * 4, false);
5028 value
= ac_emit_llvm_intrinsic(&ctx
->ac
,
5029 "llvm.SI.buffer.load.dword.i32.i32",
5031 AC_FUNC_ATTR_READONLY
);
5033 LLVMBuildStore(ctx
->builder
,
5034 to_float(ctx
, value
), ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)]);
5038 handle_vs_outputs_post(ctx
);
5041 void ac_create_gs_copy_shader(LLVMTargetMachineRef tm
,
5042 struct nir_shader
*geom_shader
,
5043 struct ac_shader_binary
*binary
,
5044 struct ac_shader_config
*config
,
5045 struct ac_shader_variant_info
*shader_info
,
5046 const struct ac_nir_compiler_options
*options
,
5049 struct nir_to_llvm_context ctx
= {0};
5050 ctx
.context
= LLVMContextCreate();
5051 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
5052 ctx
.options
= options
;
5053 ctx
.shader_info
= shader_info
;
5055 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
5056 ctx
.ac
.module
= ctx
.module
;
5058 ctx
.is_gs_copy_shader
= true;
5059 LLVMSetTarget(ctx
.module
, "amdgcn--");
5062 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
5063 ctx
.ac
.builder
= ctx
.builder
;
5064 ctx
.stage
= MESA_SHADER_VERTEX
;
5066 create_function(&ctx
);
5068 ctx
.gs_max_out_vertices
= geom_shader
->info
->gs
.vertices_out
;
5069 ac_setup_rings(&ctx
);
5071 nir_foreach_variable(variable
, &geom_shader
->outputs
)
5072 handle_shader_output_decl(&ctx
, variable
);
5074 ac_gs_copy_shader_emit(&ctx
);
5076 LLVMBuildRetVoid(ctx
.builder
);
5078 ac_llvm_finalize_module(&ctx
);
5080 ac_compile_llvm_module(tm
, ctx
.module
, binary
, config
, shader_info
,
5082 dump_shader
, options
->supports_spill
);