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radv/ac: use ctx->voidt in more places. (v2)
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_util.h"
26 #include "ac_binary.h"
27 #include "sid.h"
28 #include "nir/nir.h"
29 #include "../vulkan/radv_descriptor_set.h"
30 #include "util/bitscan.h"
31 #include <llvm-c/Transforms/Scalar.h>
32
33 enum radeon_llvm_calling_convention {
34 RADEON_LLVM_AMDGPU_VS = 87,
35 RADEON_LLVM_AMDGPU_GS = 88,
36 RADEON_LLVM_AMDGPU_PS = 89,
37 RADEON_LLVM_AMDGPU_CS = 90,
38 };
39
40 #define CONST_ADDR_SPACE 2
41 #define LOCAL_ADDR_SPACE 3
42
43 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
44 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
45
46 enum desc_type {
47 DESC_IMAGE,
48 DESC_FMASK,
49 DESC_SAMPLER,
50 DESC_BUFFER,
51 };
52
53 struct nir_to_llvm_context {
54 struct ac_llvm_context ac;
55 const struct ac_nir_compiler_options *options;
56 struct ac_shader_variant_info *shader_info;
57
58 LLVMContextRef context;
59 LLVMModuleRef module;
60 LLVMBuilderRef builder;
61 LLVMValueRef main_function;
62
63 struct hash_table *defs;
64 struct hash_table *phis;
65
66 LLVMValueRef descriptor_sets[AC_UD_MAX_SETS];
67 LLVMValueRef push_constants;
68 LLVMValueRef num_work_groups;
69 LLVMValueRef workgroup_ids;
70 LLVMValueRef local_invocation_ids;
71 LLVMValueRef tg_size;
72
73 LLVMValueRef vertex_buffers;
74 LLVMValueRef base_vertex;
75 LLVMValueRef start_instance;
76 LLVMValueRef vertex_id;
77 LLVMValueRef rel_auto_id;
78 LLVMValueRef vs_prim_id;
79 LLVMValueRef instance_id;
80
81 LLVMValueRef prim_mask;
82 LLVMValueRef sample_positions;
83 LLVMValueRef persp_sample, persp_center, persp_centroid;
84 LLVMValueRef linear_sample, linear_center, linear_centroid;
85 LLVMValueRef front_face;
86 LLVMValueRef ancillary;
87 LLVMValueRef frag_pos[4];
88
89 LLVMBasicBlockRef continue_block;
90 LLVMBasicBlockRef break_block;
91
92 LLVMTypeRef i1;
93 LLVMTypeRef i8;
94 LLVMTypeRef i16;
95 LLVMTypeRef i32;
96 LLVMTypeRef i64;
97 LLVMTypeRef v2i32;
98 LLVMTypeRef v3i32;
99 LLVMTypeRef v4i32;
100 LLVMTypeRef v8i32;
101 LLVMTypeRef f32;
102 LLVMTypeRef f16;
103 LLVMTypeRef v2f32;
104 LLVMTypeRef v4f32;
105 LLVMTypeRef v16i8;
106 LLVMTypeRef voidt;
107
108 LLVMValueRef i32zero;
109 LLVMValueRef i32one;
110 LLVMValueRef f32zero;
111 LLVMValueRef f32one;
112 LLVMValueRef v4f32empty;
113
114 unsigned range_md_kind;
115 unsigned uniform_md_kind;
116 unsigned invariant_load_md_kind;
117 LLVMValueRef empty_md;
118 gl_shader_stage stage;
119
120 LLVMValueRef lds;
121 LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
122 LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS * 4];
123
124 LLVMValueRef shared_memory;
125 uint64_t input_mask;
126 uint64_t output_mask;
127 int num_locals;
128 LLVMValueRef *locals;
129 bool has_ddxy;
130 unsigned num_clips;
131 unsigned num_culls;
132
133 bool has_ds_bpermute;
134 };
135
136 struct ac_tex_info {
137 LLVMValueRef args[12];
138 int arg_count;
139 LLVMTypeRef dst_type;
140 bool has_offset;
141 };
142
143 static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
144 nir_deref_var *deref,
145 enum desc_type desc_type);
146 static unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan)
147 {
148 return (index * 4) + chan;
149 }
150
151 static unsigned llvm_get_type_size(LLVMTypeRef type)
152 {
153 LLVMTypeKind kind = LLVMGetTypeKind(type);
154
155 switch (kind) {
156 case LLVMIntegerTypeKind:
157 return LLVMGetIntTypeWidth(type) / 8;
158 case LLVMFloatTypeKind:
159 return 4;
160 case LLVMPointerTypeKind:
161 return 8;
162 case LLVMVectorTypeKind:
163 return LLVMGetVectorSize(type) *
164 llvm_get_type_size(LLVMGetElementType(type));
165 default:
166 assert(0);
167 return 0;
168 }
169 }
170
171 static void set_llvm_calling_convention(LLVMValueRef func,
172 gl_shader_stage stage)
173 {
174 enum radeon_llvm_calling_convention calling_conv;
175
176 switch (stage) {
177 case MESA_SHADER_VERTEX:
178 case MESA_SHADER_TESS_CTRL:
179 case MESA_SHADER_TESS_EVAL:
180 calling_conv = RADEON_LLVM_AMDGPU_VS;
181 break;
182 case MESA_SHADER_GEOMETRY:
183 calling_conv = RADEON_LLVM_AMDGPU_GS;
184 break;
185 case MESA_SHADER_FRAGMENT:
186 calling_conv = RADEON_LLVM_AMDGPU_PS;
187 break;
188 case MESA_SHADER_COMPUTE:
189 calling_conv = RADEON_LLVM_AMDGPU_CS;
190 break;
191 default:
192 unreachable("Unhandle shader type");
193 }
194
195 LLVMSetFunctionCallConv(func, calling_conv);
196 }
197
198 static LLVMValueRef
199 create_llvm_function(LLVMContextRef ctx, LLVMModuleRef module,
200 LLVMBuilderRef builder, LLVMTypeRef *return_types,
201 unsigned num_return_elems, LLVMTypeRef *param_types,
202 unsigned param_count, unsigned array_params_mask,
203 unsigned sgpr_params, bool unsafe_math)
204 {
205 LLVMTypeRef main_function_type, ret_type;
206 LLVMBasicBlockRef main_function_body;
207
208 if (num_return_elems)
209 ret_type = LLVMStructTypeInContext(ctx, return_types,
210 num_return_elems, true);
211 else
212 ret_type = LLVMVoidTypeInContext(ctx);
213
214 /* Setup the function */
215 main_function_type =
216 LLVMFunctionType(ret_type, param_types, param_count, 0);
217 LLVMValueRef main_function =
218 LLVMAddFunction(module, "main", main_function_type);
219 main_function_body =
220 LLVMAppendBasicBlockInContext(ctx, main_function, "main_body");
221 LLVMPositionBuilderAtEnd(builder, main_function_body);
222
223 LLVMSetFunctionCallConv(main_function, RADEON_LLVM_AMDGPU_CS);
224 for (unsigned i = 0; i < sgpr_params; ++i) {
225 if (array_params_mask & (1 << i)) {
226 LLVMValueRef P = LLVMGetParam(main_function, i);
227 ac_add_function_attr(main_function, i + 1, AC_FUNC_ATTR_BYVAL);
228 ac_add_attr_dereferenceable(P, UINT64_MAX);
229 }
230 else {
231 ac_add_function_attr(main_function, i + 1, AC_FUNC_ATTR_INREG);
232 }
233 }
234
235 if (unsafe_math) {
236 /* These were copied from some LLVM test. */
237 LLVMAddTargetDependentFunctionAttr(main_function,
238 "less-precise-fpmad",
239 "true");
240 LLVMAddTargetDependentFunctionAttr(main_function,
241 "no-infs-fp-math",
242 "true");
243 LLVMAddTargetDependentFunctionAttr(main_function,
244 "no-nans-fp-math",
245 "true");
246 LLVMAddTargetDependentFunctionAttr(main_function,
247 "unsafe-fp-math",
248 "true");
249 }
250 return main_function;
251 }
252
253 static LLVMTypeRef const_array(LLVMTypeRef elem_type, int num_elements)
254 {
255 return LLVMPointerType(LLVMArrayType(elem_type, num_elements),
256 CONST_ADDR_SPACE);
257 }
258
259 static LLVMValueRef get_shared_memory_ptr(struct nir_to_llvm_context *ctx,
260 int idx,
261 LLVMTypeRef type)
262 {
263 LLVMValueRef offset;
264 LLVMValueRef ptr;
265 int addr_space;
266
267 offset = LLVMConstInt(ctx->i32, idx, false);
268
269 ptr = ctx->shared_memory;
270 ptr = LLVMBuildGEP(ctx->builder, ptr, &offset, 1, "");
271 addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
272 ptr = LLVMBuildBitCast(ctx->builder, ptr, LLVMPointerType(type, addr_space), "");
273 return ptr;
274 }
275
276 static LLVMValueRef to_integer(struct nir_to_llvm_context *ctx, LLVMValueRef v)
277 {
278 LLVMTypeRef type = LLVMTypeOf(v);
279 if (type == ctx->f32) {
280 return LLVMBuildBitCast(ctx->builder, v, ctx->i32, "");
281 } else if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
282 LLVMTypeRef elem_type = LLVMGetElementType(type);
283 if (elem_type == ctx->f32) {
284 LLVMTypeRef nt = LLVMVectorType(ctx->i32, LLVMGetVectorSize(type));
285 return LLVMBuildBitCast(ctx->builder, v, nt, "");
286 }
287 }
288 return v;
289 }
290
291 static LLVMValueRef to_float(struct nir_to_llvm_context *ctx, LLVMValueRef v)
292 {
293 LLVMTypeRef type = LLVMTypeOf(v);
294 if (type == ctx->i32) {
295 return LLVMBuildBitCast(ctx->builder, v, ctx->f32, "");
296 } else if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
297 LLVMTypeRef elem_type = LLVMGetElementType(type);
298 if (elem_type == ctx->i32) {
299 LLVMTypeRef nt = LLVMVectorType(ctx->f32, LLVMGetVectorSize(type));
300 return LLVMBuildBitCast(ctx->builder, v, nt, "");
301 }
302 }
303 return v;
304 }
305
306 static LLVMValueRef unpack_param(struct nir_to_llvm_context *ctx,
307 LLVMValueRef param, unsigned rshift,
308 unsigned bitwidth)
309 {
310 LLVMValueRef value = param;
311 if (rshift)
312 value = LLVMBuildLShr(ctx->builder, value,
313 LLVMConstInt(ctx->i32, rshift, false), "");
314
315 if (rshift + bitwidth < 32) {
316 unsigned mask = (1 << bitwidth) - 1;
317 value = LLVMBuildAnd(ctx->builder, value,
318 LLVMConstInt(ctx->i32, mask, false), "");
319 }
320 return value;
321 }
322
323 static LLVMValueRef build_gep0(struct nir_to_llvm_context *ctx,
324 LLVMValueRef base_ptr, LLVMValueRef index)
325 {
326 LLVMValueRef indices[2] = {
327 ctx->i32zero,
328 index,
329 };
330 return LLVMBuildGEP(ctx->builder, base_ptr,
331 indices, 2, "");
332 }
333
334 static LLVMValueRef build_indexed_load(struct nir_to_llvm_context *ctx,
335 LLVMValueRef base_ptr, LLVMValueRef index,
336 bool uniform)
337 {
338 LLVMValueRef pointer;
339 pointer = build_gep0(ctx, base_ptr, index);
340 if (uniform)
341 LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
342 return LLVMBuildLoad(ctx->builder, pointer, "");
343 }
344
345 static LLVMValueRef build_indexed_load_const(struct nir_to_llvm_context *ctx,
346 LLVMValueRef base_ptr, LLVMValueRef index)
347 {
348 LLVMValueRef result = build_indexed_load(ctx, base_ptr, index, true);
349 LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
350 return result;
351 }
352
353 static void set_userdata_location(struct ac_userdata_info *ud_info, uint8_t sgpr_idx, uint8_t num_sgprs)
354 {
355 ud_info->sgpr_idx = sgpr_idx;
356 ud_info->num_sgprs = num_sgprs;
357 ud_info->indirect = false;
358 ud_info->indirect_offset = 0;
359 }
360
361 static void set_userdata_location_shader(struct nir_to_llvm_context *ctx,
362 int idx, uint8_t sgpr_idx, uint8_t num_sgprs)
363 {
364 set_userdata_location(&ctx->shader_info->user_sgprs_locs.shader_data[idx], sgpr_idx, num_sgprs);
365 }
366
367 #if 0
368 static void set_userdata_location_indirect(struct ac_userdata_info *ud_info, uint8_t sgpr_idx, uint8_t num_sgprs,
369 uint32_t indirect_offset)
370 {
371 ud_info->sgpr_idx = sgpr_idx;
372 ud_info->num_sgprs = num_sgprs;
373 ud_info->indirect = true;
374 ud_info->indirect_offset = indirect_offset;
375 }
376 #endif
377
378 static void create_function(struct nir_to_llvm_context *ctx)
379 {
380 LLVMTypeRef arg_types[23];
381 unsigned arg_idx = 0;
382 unsigned array_params_mask = 0;
383 unsigned sgpr_count = 0, user_sgpr_count;
384 unsigned i;
385 unsigned num_sets = ctx->options->layout ? ctx->options->layout->num_sets : 0;
386 unsigned user_sgpr_idx;
387 bool need_push_constants;
388
389 need_push_constants = true;
390 if (!ctx->options->layout)
391 need_push_constants = false;
392 else if (!ctx->options->layout->push_constant_size &&
393 !ctx->options->layout->dynamic_offset_count)
394 need_push_constants = false;
395
396 /* 1 for each descriptor set */
397 for (unsigned i = 0; i < num_sets; ++i) {
398 if (ctx->options->layout->set[i].layout->shader_stages & (1 << ctx->stage)) {
399 array_params_mask |= (1 << arg_idx);
400 arg_types[arg_idx++] = const_array(ctx->i8, 1024 * 1024);
401 }
402 }
403
404 if (need_push_constants) {
405 /* 1 for push constants and dynamic descriptors */
406 array_params_mask |= (1 << arg_idx);
407 arg_types[arg_idx++] = const_array(ctx->i8, 1024 * 1024);
408 }
409
410 switch (ctx->stage) {
411 case MESA_SHADER_COMPUTE:
412 arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3); /* grid size */
413 user_sgpr_count = arg_idx;
414 arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3);
415 arg_types[arg_idx++] = ctx->i32;
416 sgpr_count = arg_idx;
417
418 arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3);
419 break;
420 case MESA_SHADER_VERTEX:
421 arg_types[arg_idx++] = const_array(ctx->v16i8, 16); /* vertex buffers */
422 arg_types[arg_idx++] = ctx->i32; // base vertex
423 arg_types[arg_idx++] = ctx->i32; // start instance
424 user_sgpr_count = sgpr_count = arg_idx;
425 arg_types[arg_idx++] = ctx->i32; // vertex id
426 arg_types[arg_idx++] = ctx->i32; // rel auto id
427 arg_types[arg_idx++] = ctx->i32; // vs prim id
428 arg_types[arg_idx++] = ctx->i32; // instance id
429 break;
430 case MESA_SHADER_FRAGMENT:
431 arg_types[arg_idx++] = const_array(ctx->f32, 32); /* sample positions */
432 user_sgpr_count = arg_idx;
433 arg_types[arg_idx++] = ctx->i32; /* prim mask */
434 sgpr_count = arg_idx;
435 arg_types[arg_idx++] = ctx->v2i32; /* persp sample */
436 arg_types[arg_idx++] = ctx->v2i32; /* persp center */
437 arg_types[arg_idx++] = ctx->v2i32; /* persp centroid */
438 arg_types[arg_idx++] = ctx->v3i32; /* persp pull model */
439 arg_types[arg_idx++] = ctx->v2i32; /* linear sample */
440 arg_types[arg_idx++] = ctx->v2i32; /* linear center */
441 arg_types[arg_idx++] = ctx->v2i32; /* linear centroid */
442 arg_types[arg_idx++] = ctx->f32; /* line stipple tex */
443 arg_types[arg_idx++] = ctx->f32; /* pos x float */
444 arg_types[arg_idx++] = ctx->f32; /* pos y float */
445 arg_types[arg_idx++] = ctx->f32; /* pos z float */
446 arg_types[arg_idx++] = ctx->f32; /* pos w float */
447 arg_types[arg_idx++] = ctx->i32; /* front face */
448 arg_types[arg_idx++] = ctx->i32; /* ancillary */
449 arg_types[arg_idx++] = ctx->f32; /* sample coverage */
450 arg_types[arg_idx++] = ctx->i32; /* fixed pt */
451 break;
452 default:
453 unreachable("Shader stage not implemented");
454 }
455
456 ctx->main_function = create_llvm_function(
457 ctx->context, ctx->module, ctx->builder, NULL, 0, arg_types,
458 arg_idx, array_params_mask, sgpr_count, ctx->options->unsafe_math);
459 set_llvm_calling_convention(ctx->main_function, ctx->stage);
460
461
462 ctx->shader_info->num_input_sgprs = 0;
463 ctx->shader_info->num_input_vgprs = 0;
464
465 for (i = 0; i < user_sgpr_count; i++)
466 ctx->shader_info->num_user_sgprs += llvm_get_type_size(arg_types[i]) / 4;
467
468 ctx->shader_info->num_input_sgprs = ctx->shader_info->num_user_sgprs;
469 for (; i < sgpr_count; i++)
470 ctx->shader_info->num_input_sgprs += llvm_get_type_size(arg_types[i]) / 4;
471
472 if (ctx->stage != MESA_SHADER_FRAGMENT)
473 for (; i < arg_idx; ++i)
474 ctx->shader_info->num_input_vgprs += llvm_get_type_size(arg_types[i]) / 4;
475
476 arg_idx = 0;
477 user_sgpr_idx = 0;
478 for (unsigned i = 0; i < num_sets; ++i) {
479 if (ctx->options->layout->set[i].layout->shader_stages & (1 << ctx->stage)) {
480 set_userdata_location(&ctx->shader_info->user_sgprs_locs.descriptor_sets[i], user_sgpr_idx, 2);
481 user_sgpr_idx += 2;
482 ctx->descriptor_sets[i] =
483 LLVMGetParam(ctx->main_function, arg_idx++);
484 } else
485 ctx->descriptor_sets[i] = NULL;
486 }
487
488 if (need_push_constants) {
489 ctx->push_constants = LLVMGetParam(ctx->main_function, arg_idx++);
490 set_userdata_location_shader(ctx, AC_UD_PUSH_CONSTANTS, user_sgpr_idx, 2);
491 user_sgpr_idx += 2;
492 }
493
494 switch (ctx->stage) {
495 case MESA_SHADER_COMPUTE:
496 set_userdata_location_shader(ctx, AC_UD_CS_GRID_SIZE, user_sgpr_idx, 3);
497 user_sgpr_idx += 3;
498 ctx->num_work_groups =
499 LLVMGetParam(ctx->main_function, arg_idx++);
500 ctx->workgroup_ids =
501 LLVMGetParam(ctx->main_function, arg_idx++);
502 ctx->tg_size =
503 LLVMGetParam(ctx->main_function, arg_idx++);
504 ctx->local_invocation_ids =
505 LLVMGetParam(ctx->main_function, arg_idx++);
506 break;
507 case MESA_SHADER_VERTEX:
508 set_userdata_location_shader(ctx, AC_UD_VS_VERTEX_BUFFERS, user_sgpr_idx, 2);
509 user_sgpr_idx += 2;
510 ctx->vertex_buffers = LLVMGetParam(ctx->main_function, arg_idx++);
511 set_userdata_location_shader(ctx, AC_UD_VS_BASE_VERTEX_START_INSTANCE, user_sgpr_idx, 2);
512 user_sgpr_idx += 2;
513 ctx->base_vertex = LLVMGetParam(ctx->main_function, arg_idx++);
514 ctx->start_instance = LLVMGetParam(ctx->main_function, arg_idx++);
515 ctx->vertex_id = LLVMGetParam(ctx->main_function, arg_idx++);
516 ctx->rel_auto_id = LLVMGetParam(ctx->main_function, arg_idx++);
517 ctx->vs_prim_id = LLVMGetParam(ctx->main_function, arg_idx++);
518 ctx->instance_id = LLVMGetParam(ctx->main_function, arg_idx++);
519 break;
520 case MESA_SHADER_FRAGMENT:
521 set_userdata_location_shader(ctx, AC_UD_PS_SAMPLE_POS, user_sgpr_idx, 2);
522 user_sgpr_idx += 2;
523 ctx->sample_positions = LLVMGetParam(ctx->main_function, arg_idx++);
524 ctx->prim_mask = LLVMGetParam(ctx->main_function, arg_idx++);
525 ctx->persp_sample = LLVMGetParam(ctx->main_function, arg_idx++);
526 ctx->persp_center = LLVMGetParam(ctx->main_function, arg_idx++);
527 ctx->persp_centroid = LLVMGetParam(ctx->main_function, arg_idx++);
528 arg_idx++;
529 ctx->linear_sample = LLVMGetParam(ctx->main_function, arg_idx++);
530 ctx->linear_center = LLVMGetParam(ctx->main_function, arg_idx++);
531 ctx->linear_centroid = LLVMGetParam(ctx->main_function, arg_idx++);
532 arg_idx++; /* line stipple */
533 ctx->frag_pos[0] = LLVMGetParam(ctx->main_function, arg_idx++);
534 ctx->frag_pos[1] = LLVMGetParam(ctx->main_function, arg_idx++);
535 ctx->frag_pos[2] = LLVMGetParam(ctx->main_function, arg_idx++);
536 ctx->frag_pos[3] = LLVMGetParam(ctx->main_function, arg_idx++);
537 ctx->front_face = LLVMGetParam(ctx->main_function, arg_idx++);
538 ctx->ancillary = LLVMGetParam(ctx->main_function, arg_idx++);
539 break;
540 default:
541 unreachable("Shader stage not implemented");
542 }
543 }
544
545 static void setup_types(struct nir_to_llvm_context *ctx)
546 {
547 LLVMValueRef args[4];
548
549 ctx->voidt = LLVMVoidTypeInContext(ctx->context);
550 ctx->i1 = LLVMIntTypeInContext(ctx->context, 1);
551 ctx->i8 = LLVMIntTypeInContext(ctx->context, 8);
552 ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
553 ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
554 ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
555 ctx->v2i32 = LLVMVectorType(ctx->i32, 2);
556 ctx->v3i32 = LLVMVectorType(ctx->i32, 3);
557 ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
558 ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
559 ctx->f32 = LLVMFloatTypeInContext(ctx->context);
560 ctx->f16 = LLVMHalfTypeInContext(ctx->context);
561 ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
562 ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
563 ctx->v16i8 = LLVMVectorType(ctx->i8, 16);
564
565 ctx->i32zero = LLVMConstInt(ctx->i32, 0, false);
566 ctx->i32one = LLVMConstInt(ctx->i32, 1, false);
567 ctx->f32zero = LLVMConstReal(ctx->f32, 0.0);
568 ctx->f32one = LLVMConstReal(ctx->f32, 1.0);
569
570 args[0] = ctx->f32zero;
571 args[1] = ctx->f32zero;
572 args[2] = ctx->f32zero;
573 args[3] = ctx->f32one;
574 ctx->v4f32empty = LLVMConstVector(args, 4);
575
576 ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
577 "range", 5);
578 ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context,
579 "invariant.load", 14);
580 ctx->uniform_md_kind =
581 LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14);
582 ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
583
584 args[0] = LLVMConstReal(ctx->f32, 2.5);
585 }
586
587 static int get_llvm_num_components(LLVMValueRef value)
588 {
589 LLVMTypeRef type = LLVMTypeOf(value);
590 unsigned num_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
591 ? LLVMGetVectorSize(type)
592 : 1;
593 return num_components;
594 }
595
596 static LLVMValueRef llvm_extract_elem(struct nir_to_llvm_context *ctx,
597 LLVMValueRef value,
598 int index)
599 {
600 int count = get_llvm_num_components(value);
601
602 assert(index < count);
603 if (count == 1)
604 return value;
605
606 return LLVMBuildExtractElement(ctx->builder, value,
607 LLVMConstInt(ctx->i32, index, false), "");
608 }
609
610 static LLVMValueRef trim_vector(struct nir_to_llvm_context *ctx,
611 LLVMValueRef value, unsigned count)
612 {
613 unsigned num_components = get_llvm_num_components(value);
614 if (count == num_components)
615 return value;
616
617 LLVMValueRef masks[] = {
618 LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false),
619 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false)};
620
621 if (count == 1)
622 return LLVMBuildExtractElement(ctx->builder, value, masks[0],
623 "");
624
625 LLVMValueRef swizzle = LLVMConstVector(masks, count);
626 return LLVMBuildShuffleVector(ctx->builder, value, value, swizzle, "");
627 }
628
629 static void
630 build_store_values_extended(struct nir_to_llvm_context *ctx,
631 LLVMValueRef *values,
632 unsigned value_count,
633 unsigned value_stride,
634 LLVMValueRef vec)
635 {
636 LLVMBuilderRef builder = ctx->builder;
637 unsigned i;
638
639 if (value_count == 1) {
640 LLVMBuildStore(builder, vec, values[0]);
641 return;
642 }
643
644 for (i = 0; i < value_count; i++) {
645 LLVMValueRef ptr = values[i * value_stride];
646 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
647 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
648 LLVMBuildStore(builder, value, ptr);
649 }
650 }
651
652 static LLVMTypeRef get_def_type(struct nir_to_llvm_context *ctx,
653 nir_ssa_def *def)
654 {
655 LLVMTypeRef type = LLVMIntTypeInContext(ctx->context, def->bit_size);
656 if (def->num_components > 1) {
657 type = LLVMVectorType(type, def->num_components);
658 }
659 return type;
660 }
661
662 static LLVMValueRef get_src(struct nir_to_llvm_context *ctx, nir_src src)
663 {
664 assert(src.is_ssa);
665 struct hash_entry *entry = _mesa_hash_table_search(ctx->defs, src.ssa);
666 return (LLVMValueRef)entry->data;
667 }
668
669
670 static LLVMBasicBlockRef get_block(struct nir_to_llvm_context *ctx,
671 struct nir_block *b)
672 {
673 struct hash_entry *entry = _mesa_hash_table_search(ctx->defs, b);
674 return (LLVMBasicBlockRef)entry->data;
675 }
676
677 static LLVMValueRef get_alu_src(struct nir_to_llvm_context *ctx,
678 nir_alu_src src,
679 unsigned num_components)
680 {
681 LLVMValueRef value = get_src(ctx, src.src);
682 bool need_swizzle = false;
683
684 assert(value);
685 LLVMTypeRef type = LLVMTypeOf(value);
686 unsigned src_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
687 ? LLVMGetVectorSize(type)
688 : 1;
689
690 for (unsigned i = 0; i < num_components; ++i) {
691 assert(src.swizzle[i] < src_components);
692 if (src.swizzle[i] != i)
693 need_swizzle = true;
694 }
695
696 if (need_swizzle || num_components != src_components) {
697 LLVMValueRef masks[] = {
698 LLVMConstInt(ctx->i32, src.swizzle[0], false),
699 LLVMConstInt(ctx->i32, src.swizzle[1], false),
700 LLVMConstInt(ctx->i32, src.swizzle[2], false),
701 LLVMConstInt(ctx->i32, src.swizzle[3], false)};
702
703 if (src_components > 1 && num_components == 1) {
704 value = LLVMBuildExtractElement(ctx->builder, value,
705 masks[0], "");
706 } else if (src_components == 1 && num_components > 1) {
707 LLVMValueRef values[] = {value, value, value, value};
708 value = ac_build_gather_values(&ctx->ac, values, num_components);
709 } else {
710 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
711 value = LLVMBuildShuffleVector(ctx->builder, value, value,
712 swizzle, "");
713 }
714 }
715 assert(!src.negate);
716 assert(!src.abs);
717 return value;
718 }
719
720 static LLVMValueRef emit_int_cmp(struct nir_to_llvm_context *ctx,
721 LLVMIntPredicate pred, LLVMValueRef src0,
722 LLVMValueRef src1)
723 {
724 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
725 return LLVMBuildSelect(ctx->builder, result,
726 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
727 LLVMConstInt(ctx->i32, 0, false), "");
728 }
729
730 static LLVMValueRef emit_float_cmp(struct nir_to_llvm_context *ctx,
731 LLVMRealPredicate pred, LLVMValueRef src0,
732 LLVMValueRef src1)
733 {
734 LLVMValueRef result;
735 src0 = to_float(ctx, src0);
736 src1 = to_float(ctx, src1);
737 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
738 return LLVMBuildSelect(ctx->builder, result,
739 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
740 LLVMConstInt(ctx->i32, 0, false), "");
741 }
742
743 static LLVMValueRef emit_intrin_1f_param(struct nir_to_llvm_context *ctx,
744 const char *intrin,
745 LLVMValueRef src0)
746 {
747 LLVMValueRef params[] = {
748 to_float(ctx, src0),
749 };
750 return ac_emit_llvm_intrinsic(&ctx->ac, intrin, ctx->f32, params, 1, AC_FUNC_ATTR_READNONE);
751 }
752
753 static LLVMValueRef emit_intrin_2f_param(struct nir_to_llvm_context *ctx,
754 const char *intrin,
755 LLVMValueRef src0, LLVMValueRef src1)
756 {
757 LLVMValueRef params[] = {
758 to_float(ctx, src0),
759 to_float(ctx, src1),
760 };
761 return ac_emit_llvm_intrinsic(&ctx->ac, intrin, ctx->f32, params, 2, AC_FUNC_ATTR_READNONE);
762 }
763
764 static LLVMValueRef emit_intrin_3f_param(struct nir_to_llvm_context *ctx,
765 const char *intrin,
766 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
767 {
768 LLVMValueRef params[] = {
769 to_float(ctx, src0),
770 to_float(ctx, src1),
771 to_float(ctx, src2),
772 };
773 return ac_emit_llvm_intrinsic(&ctx->ac, intrin, ctx->f32, params, 3, AC_FUNC_ATTR_READNONE);
774 }
775
776 static LLVMValueRef emit_bcsel(struct nir_to_llvm_context *ctx,
777 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
778 {
779 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
780 ctx->i32zero, "");
781 return LLVMBuildSelect(ctx->builder, v, src1, src2, "");
782 }
783
784 static LLVMValueRef emit_find_lsb(struct nir_to_llvm_context *ctx,
785 LLVMValueRef src0)
786 {
787 LLVMValueRef params[2] = {
788 src0,
789
790 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
791 * add special code to check for x=0. The reason is that
792 * the LLVM behavior for x=0 is different from what we
793 * need here.
794 *
795 * The hardware already implements the correct behavior.
796 */
797 LLVMConstInt(ctx->i32, 1, false),
798 };
799 return ac_emit_llvm_intrinsic(&ctx->ac, "llvm.cttz.i32", ctx->i32, params, 2, AC_FUNC_ATTR_READNONE);
800 }
801
802 static LLVMValueRef emit_ifind_msb(struct nir_to_llvm_context *ctx,
803 LLVMValueRef src0)
804 {
805 LLVMValueRef msb = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.AMDGPU.flbit.i32",
806 ctx->i32, &src0, 1,
807 AC_FUNC_ATTR_READNONE);
808
809 /* The HW returns the last bit index from MSB, but NIR wants
810 * the index from LSB. Invert it by doing "31 - msb". */
811 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
812 msb, "");
813
814 LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
815 LLVMValueRef cond = LLVMBuildOr(ctx->builder,
816 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
817 src0, ctx->i32zero, ""),
818 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
819 src0, all_ones, ""), "");
820
821 return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
822 }
823
824 static LLVMValueRef emit_ufind_msb(struct nir_to_llvm_context *ctx,
825 LLVMValueRef src0)
826 {
827 LLVMValueRef args[2] = {
828 src0,
829 ctx->i32one,
830 };
831 LLVMValueRef msb = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.ctlz.i32",
832 ctx->i32, args, ARRAY_SIZE(args),
833 AC_FUNC_ATTR_READNONE);
834
835 /* The HW returns the last bit index from MSB, but NIR wants
836 * the index from LSB. Invert it by doing "31 - msb". */
837 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
838 msb, "");
839
840 return LLVMBuildSelect(ctx->builder,
841 LLVMBuildICmp(ctx->builder, LLVMIntEQ, src0,
842 ctx->i32zero, ""),
843 LLVMConstInt(ctx->i32, -1, true), msb, "");
844 }
845
846 static LLVMValueRef emit_minmax_int(struct nir_to_llvm_context *ctx,
847 LLVMIntPredicate pred,
848 LLVMValueRef src0, LLVMValueRef src1)
849 {
850 return LLVMBuildSelect(ctx->builder,
851 LLVMBuildICmp(ctx->builder, pred, src0, src1, ""),
852 src0,
853 src1, "");
854
855 }
856 static LLVMValueRef emit_iabs(struct nir_to_llvm_context *ctx,
857 LLVMValueRef src0)
858 {
859 return emit_minmax_int(ctx, LLVMIntSGT, src0,
860 LLVMBuildNeg(ctx->builder, src0, ""));
861 }
862
863 static LLVMValueRef emit_fsign(struct nir_to_llvm_context *ctx,
864 LLVMValueRef src0)
865 {
866 LLVMValueRef cmp, val;
867
868 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGT, src0, ctx->f32zero, "");
869 val = LLVMBuildSelect(ctx->builder, cmp, ctx->f32one, src0, "");
870 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGE, val, ctx->f32zero, "");
871 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstReal(ctx->f32, -1.0), "");
872 return val;
873 }
874
875 static LLVMValueRef emit_isign(struct nir_to_llvm_context *ctx,
876 LLVMValueRef src0)
877 {
878 LLVMValueRef cmp, val;
879
880 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, src0, ctx->i32zero, "");
881 val = LLVMBuildSelect(ctx->builder, cmp, ctx->i32one, src0, "");
882 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGE, val, ctx->i32zero, "");
883 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstInt(ctx->i32, -1, true), "");
884 return val;
885 }
886
887 static LLVMValueRef emit_ffract(struct nir_to_llvm_context *ctx,
888 LLVMValueRef src0)
889 {
890 const char *intr = "llvm.floor.f32";
891 LLVMValueRef fsrc0 = to_float(ctx, src0);
892 LLVMValueRef params[] = {
893 fsrc0,
894 };
895 LLVMValueRef floor = ac_emit_llvm_intrinsic(&ctx->ac, intr,
896 ctx->f32, params, 1,
897 AC_FUNC_ATTR_READNONE);
898 return LLVMBuildFSub(ctx->builder, fsrc0, floor, "");
899 }
900
901 static LLVMValueRef emit_uint_carry(struct nir_to_llvm_context *ctx,
902 const char *intrin,
903 LLVMValueRef src0, LLVMValueRef src1)
904 {
905 LLVMTypeRef ret_type;
906 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
907 LLVMValueRef res;
908 LLVMValueRef params[] = { src0, src1 };
909 ret_type = LLVMStructTypeInContext(ctx->context, types,
910 2, true);
911
912 res = ac_emit_llvm_intrinsic(&ctx->ac, intrin, ret_type,
913 params, 2, AC_FUNC_ATTR_READNONE);
914
915 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
916 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
917 return res;
918 }
919
920 static LLVMValueRef emit_b2f(struct nir_to_llvm_context *ctx,
921 LLVMValueRef src0)
922 {
923 return LLVMBuildAnd(ctx->builder, src0, LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""), "");
924 }
925
926 static LLVMValueRef emit_umul_high(struct nir_to_llvm_context *ctx,
927 LLVMValueRef src0, LLVMValueRef src1)
928 {
929 LLVMValueRef dst64, result;
930 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
931 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
932
933 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
934 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
935 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
936 return result;
937 }
938
939 static LLVMValueRef emit_imul_high(struct nir_to_llvm_context *ctx,
940 LLVMValueRef src0, LLVMValueRef src1)
941 {
942 LLVMValueRef dst64, result;
943 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
944 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
945
946 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
947 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
948 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
949 return result;
950 }
951
952 static LLVMValueRef emit_bitfield_extract(struct nir_to_llvm_context *ctx,
953 const char *intrin,
954 LLVMValueRef srcs[3])
955 {
956 LLVMValueRef result;
957 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
958 result = ac_emit_llvm_intrinsic(&ctx->ac, intrin, ctx->i32, srcs, 3, AC_FUNC_ATTR_READNONE);
959
960 result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, "");
961 return result;
962 }
963
964 static LLVMValueRef emit_bitfield_insert(struct nir_to_llvm_context *ctx,
965 LLVMValueRef src0, LLVMValueRef src1,
966 LLVMValueRef src2, LLVMValueRef src3)
967 {
968 LLVMValueRef bfi_args[3], result;
969
970 bfi_args[0] = LLVMBuildShl(ctx->builder,
971 LLVMBuildSub(ctx->builder,
972 LLVMBuildShl(ctx->builder,
973 ctx->i32one,
974 src3, ""),
975 ctx->i32one, ""),
976 src2, "");
977 bfi_args[1] = LLVMBuildShl(ctx->builder, src1, src2, "");
978 bfi_args[2] = src0;
979
980 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, src3, LLVMConstInt(ctx->i32, 32, false), "");
981
982 /* Calculate:
983 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
984 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
985 */
986 result = LLVMBuildXor(ctx->builder, bfi_args[2],
987 LLVMBuildAnd(ctx->builder, bfi_args[0],
988 LLVMBuildXor(ctx->builder, bfi_args[1], bfi_args[2], ""), ""), "");
989
990 result = LLVMBuildSelect(ctx->builder, icond, src1, result, "");
991 return result;
992 }
993
994 static LLVMValueRef emit_pack_half_2x16(struct nir_to_llvm_context *ctx,
995 LLVMValueRef src0)
996 {
997 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
998 int i;
999 LLVMValueRef comp[2];
1000
1001 src0 = to_float(ctx, src0);
1002 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32zero, "");
1003 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32one, "");
1004 for (i = 0; i < 2; i++) {
1005 comp[i] = LLVMBuildFPTrunc(ctx->builder, comp[i], ctx->f16, "");
1006 comp[i] = LLVMBuildBitCast(ctx->builder, comp[i], ctx->i16, "");
1007 comp[i] = LLVMBuildZExt(ctx->builder, comp[i], ctx->i32, "");
1008 }
1009
1010 comp[1] = LLVMBuildShl(ctx->builder, comp[1], const16, "");
1011 comp[0] = LLVMBuildOr(ctx->builder, comp[0], comp[1], "");
1012
1013 return comp[0];
1014 }
1015
1016 static LLVMValueRef emit_unpack_half_2x16(struct nir_to_llvm_context *ctx,
1017 LLVMValueRef src0)
1018 {
1019 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
1020 LLVMValueRef temps[2], result, val;
1021 int i;
1022
1023 for (i = 0; i < 2; i++) {
1024 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
1025 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
1026 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
1027 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
1028 }
1029
1030 result = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(ctx->v2f32), temps[0],
1031 ctx->i32zero, "");
1032 result = LLVMBuildInsertElement(ctx->builder, result, temps[1],
1033 ctx->i32one, "");
1034 return result;
1035 }
1036
1037 /**
1038 * Set range metadata on an instruction. This can only be used on load and
1039 * call instructions. If you know an instruction can only produce the values
1040 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
1041 * \p lo is the minimum value inclusive.
1042 * \p hi is the maximum value exclusive.
1043 */
1044 static void set_range_metadata(struct nir_to_llvm_context *ctx,
1045 LLVMValueRef value, unsigned lo, unsigned hi)
1046 {
1047 LLVMValueRef range_md, md_args[2];
1048 LLVMTypeRef type = LLVMTypeOf(value);
1049 LLVMContextRef context = LLVMGetTypeContext(type);
1050
1051 md_args[0] = LLVMConstInt(type, lo, false);
1052 md_args[1] = LLVMConstInt(type, hi, false);
1053 range_md = LLVMMDNodeInContext(context, md_args, 2);
1054 LLVMSetMetadata(value, ctx->range_md_kind, range_md);
1055 }
1056
1057 static LLVMValueRef get_thread_id(struct nir_to_llvm_context *ctx)
1058 {
1059 LLVMValueRef tid;
1060 LLVMValueRef tid_args[2];
1061 tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
1062 tid_args[1] = ctx->i32zero;
1063 tid_args[1] = ac_emit_llvm_intrinsic(&ctx->ac,
1064 "llvm.amdgcn.mbcnt.lo", ctx->i32,
1065 tid_args, 2, AC_FUNC_ATTR_READNONE);
1066
1067 tid = ac_emit_llvm_intrinsic(&ctx->ac,
1068 "llvm.amdgcn.mbcnt.hi", ctx->i32,
1069 tid_args, 2, AC_FUNC_ATTR_READNONE);
1070 set_range_metadata(ctx, tid, 0, 64);
1071 return tid;
1072 }
1073
1074 /*
1075 * SI implements derivatives using the local data store (LDS)
1076 * All writes to the LDS happen in all executing threads at
1077 * the same time. TID is the Thread ID for the current
1078 * thread and is a value between 0 and 63, representing
1079 * the thread's position in the wavefront.
1080 *
1081 * For the pixel shader threads are grouped into quads of four pixels.
1082 * The TIDs of the pixels of a quad are:
1083 *
1084 * +------+------+
1085 * |4n + 0|4n + 1|
1086 * +------+------+
1087 * |4n + 2|4n + 3|
1088 * +------+------+
1089 *
1090 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
1091 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
1092 * the current pixel's column, and masking with 0xfffffffe yields the TID
1093 * of the left pixel of the current pixel's row.
1094 *
1095 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
1096 * adding 2 yields the TID of the pixel below the top pixel.
1097 */
1098 /* masks for thread ID. */
1099 #define TID_MASK_TOP_LEFT 0xfffffffc
1100 #define TID_MASK_TOP 0xfffffffd
1101 #define TID_MASK_LEFT 0xfffffffe
1102 static LLVMValueRef emit_ddxy(struct nir_to_llvm_context *ctx,
1103 nir_op op,
1104 LLVMValueRef src0)
1105 {
1106 LLVMValueRef tl, trbl, result;
1107 LLVMValueRef tl_tid, trbl_tid;
1108 LLVMValueRef args[2];
1109 LLVMValueRef thread_id;
1110 unsigned mask;
1111 int idx;
1112 ctx->has_ddxy = true;
1113
1114 if (!ctx->lds && !ctx->has_ds_bpermute)
1115 ctx->lds = LLVMAddGlobalInAddressSpace(ctx->module,
1116 LLVMArrayType(ctx->i32, 64),
1117 "ddxy_lds", LOCAL_ADDR_SPACE);
1118
1119 thread_id = get_thread_id(ctx);
1120 if (op == nir_op_fddx_fine || op == nir_op_fddx)
1121 mask = TID_MASK_LEFT;
1122 else if (op == nir_op_fddy_fine || op == nir_op_fddy)
1123 mask = TID_MASK_TOP;
1124 else
1125 mask = TID_MASK_TOP_LEFT;
1126
1127 tl_tid = LLVMBuildAnd(ctx->builder, thread_id,
1128 LLVMConstInt(ctx->i32, mask, false), "");
1129 /* for DDX we want to next X pixel, DDY next Y pixel. */
1130 if (op == nir_op_fddx_fine ||
1131 op == nir_op_fddx_coarse ||
1132 op == nir_op_fddx)
1133 idx = 1;
1134 else
1135 idx = 2;
1136
1137 trbl_tid = LLVMBuildAdd(ctx->builder, tl_tid,
1138 LLVMConstInt(ctx->i32, idx, false), "");
1139
1140 if (ctx->has_ds_bpermute) {
1141 args[0] = LLVMBuildMul(ctx->builder, tl_tid,
1142 LLVMConstInt(ctx->i32, 4, false), "");
1143 args[1] = src0;
1144 tl = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.ds.bpermute",
1145 ctx->i32, args, 2,
1146 AC_FUNC_ATTR_READNONE);
1147
1148 args[0] = LLVMBuildMul(ctx->builder, trbl_tid,
1149 LLVMConstInt(ctx->i32, 4, false), "");
1150 trbl = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.ds.bpermute",
1151 ctx->i32, args, 2,
1152 AC_FUNC_ATTR_READNONE);
1153 } else {
1154 LLVMValueRef store_ptr, load_ptr0, load_ptr1;
1155
1156 store_ptr = build_gep0(ctx, ctx->lds, thread_id);
1157 load_ptr0 = build_gep0(ctx, ctx->lds, tl_tid);
1158 load_ptr1 = build_gep0(ctx, ctx->lds, trbl_tid);
1159
1160 LLVMBuildStore(ctx->builder, src0, store_ptr);
1161 tl = LLVMBuildLoad(ctx->builder, load_ptr0, "");
1162 trbl = LLVMBuildLoad(ctx->builder, load_ptr1, "");
1163 }
1164 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
1165 trbl = LLVMBuildBitCast(ctx->builder, trbl, ctx->f32, "");
1166 result = LLVMBuildFSub(ctx->builder, trbl, tl, "");
1167 return result;
1168 }
1169
1170 /*
1171 * this takes an I,J coordinate pair,
1172 * and works out the X and Y derivatives.
1173 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
1174 */
1175 static LLVMValueRef emit_ddxy_interp(
1176 struct nir_to_llvm_context *ctx,
1177 LLVMValueRef interp_ij)
1178 {
1179 LLVMValueRef result[4], a;
1180 unsigned i;
1181
1182 for (i = 0; i < 2; i++) {
1183 a = LLVMBuildExtractElement(ctx->builder, interp_ij,
1184 LLVMConstInt(ctx->i32, i, false), "");
1185 result[i] = emit_ddxy(ctx, nir_op_fddx, a);
1186 result[2+i] = emit_ddxy(ctx, nir_op_fddy, a);
1187 }
1188 return ac_build_gather_values(&ctx->ac, result, 4);
1189 }
1190
1191 static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
1192 {
1193 LLVMValueRef src[4], result = NULL;
1194 unsigned num_components = instr->dest.dest.ssa.num_components;
1195 unsigned src_components;
1196
1197 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
1198 switch (instr->op) {
1199 case nir_op_vec2:
1200 case nir_op_vec3:
1201 case nir_op_vec4:
1202 src_components = 1;
1203 break;
1204 case nir_op_pack_half_2x16:
1205 src_components = 2;
1206 break;
1207 case nir_op_unpack_half_2x16:
1208 src_components = 1;
1209 break;
1210 default:
1211 src_components = num_components;
1212 break;
1213 }
1214 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1215 src[i] = get_alu_src(ctx, instr->src[i], src_components);
1216
1217 switch (instr->op) {
1218 case nir_op_fmov:
1219 case nir_op_imov:
1220 result = src[0];
1221 break;
1222 case nir_op_fneg:
1223 src[0] = to_float(ctx, src[0]);
1224 result = LLVMBuildFNeg(ctx->builder, src[0], "");
1225 break;
1226 case nir_op_ineg:
1227 result = LLVMBuildNeg(ctx->builder, src[0], "");
1228 break;
1229 case nir_op_inot:
1230 result = LLVMBuildNot(ctx->builder, src[0], "");
1231 break;
1232 case nir_op_iadd:
1233 result = LLVMBuildAdd(ctx->builder, src[0], src[1], "");
1234 break;
1235 case nir_op_fadd:
1236 src[0] = to_float(ctx, src[0]);
1237 src[1] = to_float(ctx, src[1]);
1238 result = LLVMBuildFAdd(ctx->builder, src[0], src[1], "");
1239 break;
1240 case nir_op_fsub:
1241 src[0] = to_float(ctx, src[0]);
1242 src[1] = to_float(ctx, src[1]);
1243 result = LLVMBuildFSub(ctx->builder, src[0], src[1], "");
1244 break;
1245 case nir_op_isub:
1246 result = LLVMBuildSub(ctx->builder, src[0], src[1], "");
1247 break;
1248 case nir_op_imul:
1249 result = LLVMBuildMul(ctx->builder, src[0], src[1], "");
1250 break;
1251 case nir_op_imod:
1252 result = LLVMBuildSRem(ctx->builder, src[0], src[1], "");
1253 break;
1254 case nir_op_umod:
1255 result = LLVMBuildURem(ctx->builder, src[0], src[1], "");
1256 break;
1257 case nir_op_fmod:
1258 src[0] = to_float(ctx, src[0]);
1259 src[1] = to_float(ctx, src[1]);
1260 result = ac_emit_fdiv(&ctx->ac, src[0], src[1]);
1261 result = emit_intrin_1f_param(ctx, "llvm.floor.f32", result);
1262 result = LLVMBuildFMul(ctx->builder, src[1] , result, "");
1263 result = LLVMBuildFSub(ctx->builder, src[0], result, "");
1264 break;
1265 case nir_op_frem:
1266 src[0] = to_float(ctx, src[0]);
1267 src[1] = to_float(ctx, src[1]);
1268 result = LLVMBuildFRem(ctx->builder, src[0], src[1], "");
1269 break;
1270 case nir_op_idiv:
1271 result = LLVMBuildSDiv(ctx->builder, src[0], src[1], "");
1272 break;
1273 case nir_op_udiv:
1274 result = LLVMBuildUDiv(ctx->builder, src[0], src[1], "");
1275 break;
1276 case nir_op_fmul:
1277 src[0] = to_float(ctx, src[0]);
1278 src[1] = to_float(ctx, src[1]);
1279 result = LLVMBuildFMul(ctx->builder, src[0], src[1], "");
1280 break;
1281 case nir_op_fdiv:
1282 src[0] = to_float(ctx, src[0]);
1283 src[1] = to_float(ctx, src[1]);
1284 result = ac_emit_fdiv(&ctx->ac, src[0], src[1]);
1285 break;
1286 case nir_op_frcp:
1287 src[0] = to_float(ctx, src[0]);
1288 result = ac_emit_fdiv(&ctx->ac, ctx->f32one, src[0]);
1289 break;
1290 case nir_op_iand:
1291 result = LLVMBuildAnd(ctx->builder, src[0], src[1], "");
1292 break;
1293 case nir_op_ior:
1294 result = LLVMBuildOr(ctx->builder, src[0], src[1], "");
1295 break;
1296 case nir_op_ixor:
1297 result = LLVMBuildXor(ctx->builder, src[0], src[1], "");
1298 break;
1299 case nir_op_ishl:
1300 result = LLVMBuildShl(ctx->builder, src[0], src[1], "");
1301 break;
1302 case nir_op_ishr:
1303 result = LLVMBuildAShr(ctx->builder, src[0], src[1], "");
1304 break;
1305 case nir_op_ushr:
1306 result = LLVMBuildLShr(ctx->builder, src[0], src[1], "");
1307 break;
1308 case nir_op_ilt:
1309 result = emit_int_cmp(ctx, LLVMIntSLT, src[0], src[1]);
1310 break;
1311 case nir_op_ine:
1312 result = emit_int_cmp(ctx, LLVMIntNE, src[0], src[1]);
1313 break;
1314 case nir_op_ieq:
1315 result = emit_int_cmp(ctx, LLVMIntEQ, src[0], src[1]);
1316 break;
1317 case nir_op_ige:
1318 result = emit_int_cmp(ctx, LLVMIntSGE, src[0], src[1]);
1319 break;
1320 case nir_op_ult:
1321 result = emit_int_cmp(ctx, LLVMIntULT, src[0], src[1]);
1322 break;
1323 case nir_op_uge:
1324 result = emit_int_cmp(ctx, LLVMIntUGE, src[0], src[1]);
1325 break;
1326 case nir_op_feq:
1327 result = emit_float_cmp(ctx, LLVMRealUEQ, src[0], src[1]);
1328 break;
1329 case nir_op_fne:
1330 result = emit_float_cmp(ctx, LLVMRealUNE, src[0], src[1]);
1331 break;
1332 case nir_op_flt:
1333 result = emit_float_cmp(ctx, LLVMRealULT, src[0], src[1]);
1334 break;
1335 case nir_op_fge:
1336 result = emit_float_cmp(ctx, LLVMRealUGE, src[0], src[1]);
1337 break;
1338 case nir_op_fabs:
1339 result = emit_intrin_1f_param(ctx, "llvm.fabs.f32", src[0]);
1340 break;
1341 case nir_op_iabs:
1342 result = emit_iabs(ctx, src[0]);
1343 break;
1344 case nir_op_imax:
1345 result = emit_minmax_int(ctx, LLVMIntSGT, src[0], src[1]);
1346 break;
1347 case nir_op_imin:
1348 result = emit_minmax_int(ctx, LLVMIntSLT, src[0], src[1]);
1349 break;
1350 case nir_op_umax:
1351 result = emit_minmax_int(ctx, LLVMIntUGT, src[0], src[1]);
1352 break;
1353 case nir_op_umin:
1354 result = emit_minmax_int(ctx, LLVMIntULT, src[0], src[1]);
1355 break;
1356 case nir_op_isign:
1357 result = emit_isign(ctx, src[0]);
1358 break;
1359 case nir_op_fsign:
1360 src[0] = to_float(ctx, src[0]);
1361 result = emit_fsign(ctx, src[0]);
1362 break;
1363 case nir_op_ffloor:
1364 result = emit_intrin_1f_param(ctx, "llvm.floor.f32", src[0]);
1365 break;
1366 case nir_op_ftrunc:
1367 result = emit_intrin_1f_param(ctx, "llvm.trunc.f32", src[0]);
1368 break;
1369 case nir_op_fceil:
1370 result = emit_intrin_1f_param(ctx, "llvm.ceil.f32", src[0]);
1371 break;
1372 case nir_op_fround_even:
1373 result = emit_intrin_1f_param(ctx, "llvm.rint.f32", src[0]);
1374 break;
1375 case nir_op_ffract:
1376 result = emit_ffract(ctx, src[0]);
1377 break;
1378 case nir_op_fsin:
1379 result = emit_intrin_1f_param(ctx, "llvm.sin.f32", src[0]);
1380 break;
1381 case nir_op_fcos:
1382 result = emit_intrin_1f_param(ctx, "llvm.cos.f32", src[0]);
1383 break;
1384 case nir_op_fsqrt:
1385 result = emit_intrin_1f_param(ctx, "llvm.sqrt.f32", src[0]);
1386 break;
1387 case nir_op_fexp2:
1388 result = emit_intrin_1f_param(ctx, "llvm.exp2.f32", src[0]);
1389 break;
1390 case nir_op_flog2:
1391 result = emit_intrin_1f_param(ctx, "llvm.log2.f32", src[0]);
1392 break;
1393 case nir_op_frsq:
1394 result = emit_intrin_1f_param(ctx, "llvm.sqrt.f32", src[0]);
1395 result = ac_emit_fdiv(&ctx->ac, ctx->f32one, result);
1396 break;
1397 case nir_op_fpow:
1398 result = emit_intrin_2f_param(ctx, "llvm.pow.f32", src[0], src[1]);
1399 break;
1400 case nir_op_fmax:
1401 result = emit_intrin_2f_param(ctx, "llvm.maxnum.f32", src[0], src[1]);
1402 break;
1403 case nir_op_fmin:
1404 result = emit_intrin_2f_param(ctx, "llvm.minnum.f32", src[0], src[1]);
1405 break;
1406 case nir_op_ffma:
1407 result = emit_intrin_3f_param(ctx, "llvm.fma.f32", src[0], src[1], src[2]);
1408 break;
1409 case nir_op_ibitfield_extract:
1410 result = emit_bitfield_extract(ctx, "llvm.AMDGPU.bfe.i32", src);
1411 break;
1412 case nir_op_ubitfield_extract:
1413 result = emit_bitfield_extract(ctx, "llvm.AMDGPU.bfe.u32", src);
1414 break;
1415 case nir_op_bitfield_insert:
1416 result = emit_bitfield_insert(ctx, src[0], src[1], src[2], src[3]);
1417 break;
1418 case nir_op_bitfield_reverse:
1419 result = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.bitreverse.i32", ctx->i32, src, 1, AC_FUNC_ATTR_READNONE);
1420 break;
1421 case nir_op_bit_count:
1422 result = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.ctpop.i32", ctx->i32, src, 1, AC_FUNC_ATTR_READNONE);
1423 break;
1424 case nir_op_vec2:
1425 case nir_op_vec3:
1426 case nir_op_vec4:
1427 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1428 src[i] = to_integer(ctx, src[i]);
1429 result = ac_build_gather_values(&ctx->ac, src, num_components);
1430 break;
1431 case nir_op_f2i:
1432 src[0] = to_float(ctx, src[0]);
1433 result = LLVMBuildFPToSI(ctx->builder, src[0], ctx->i32, "");
1434 break;
1435 case nir_op_f2u:
1436 src[0] = to_float(ctx, src[0]);
1437 result = LLVMBuildFPToUI(ctx->builder, src[0], ctx->i32, "");
1438 break;
1439 case nir_op_i2f:
1440 result = LLVMBuildSIToFP(ctx->builder, src[0], ctx->f32, "");
1441 break;
1442 case nir_op_u2f:
1443 result = LLVMBuildUIToFP(ctx->builder, src[0], ctx->f32, "");
1444 break;
1445 case nir_op_bcsel:
1446 result = emit_bcsel(ctx, src[0], src[1], src[2]);
1447 break;
1448 case nir_op_find_lsb:
1449 result = emit_find_lsb(ctx, src[0]);
1450 break;
1451 case nir_op_ufind_msb:
1452 result = emit_ufind_msb(ctx, src[0]);
1453 break;
1454 case nir_op_ifind_msb:
1455 result = emit_ifind_msb(ctx, src[0]);
1456 break;
1457 case nir_op_uadd_carry:
1458 result = emit_uint_carry(ctx, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1459 break;
1460 case nir_op_usub_borrow:
1461 result = emit_uint_carry(ctx, "llvm.usub.with.overflow.i32", src[0], src[1]);
1462 break;
1463 case nir_op_b2f:
1464 result = emit_b2f(ctx, src[0]);
1465 break;
1466 case nir_op_fquantize2f16:
1467 src[0] = to_float(ctx, src[0]);
1468 result = LLVMBuildFPTrunc(ctx->builder, src[0], ctx->f16, "");
1469 /* need to convert back up to f32 */
1470 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
1471 break;
1472 case nir_op_umul_high:
1473 result = emit_umul_high(ctx, src[0], src[1]);
1474 break;
1475 case nir_op_imul_high:
1476 result = emit_imul_high(ctx, src[0], src[1]);
1477 break;
1478 case nir_op_pack_half_2x16:
1479 result = emit_pack_half_2x16(ctx, src[0]);
1480 break;
1481 case nir_op_unpack_half_2x16:
1482 result = emit_unpack_half_2x16(ctx, src[0]);
1483 break;
1484 case nir_op_fddx:
1485 case nir_op_fddy:
1486 case nir_op_fddx_fine:
1487 case nir_op_fddy_fine:
1488 case nir_op_fddx_coarse:
1489 case nir_op_fddy_coarse:
1490 result = emit_ddxy(ctx, instr->op, src[0]);
1491 break;
1492 default:
1493 fprintf(stderr, "Unknown NIR alu instr: ");
1494 nir_print_instr(&instr->instr, stderr);
1495 fprintf(stderr, "\n");
1496 abort();
1497 }
1498
1499 if (result) {
1500 assert(instr->dest.dest.is_ssa);
1501 result = to_integer(ctx, result);
1502 _mesa_hash_table_insert(ctx->defs, &instr->dest.dest.ssa,
1503 result);
1504 }
1505 }
1506
1507 static void visit_load_const(struct nir_to_llvm_context *ctx,
1508 nir_load_const_instr *instr)
1509 {
1510 LLVMValueRef values[4], value = NULL;
1511 LLVMTypeRef element_type =
1512 LLVMIntTypeInContext(ctx->context, instr->def.bit_size);
1513
1514 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1515 switch (instr->def.bit_size) {
1516 case 32:
1517 values[i] = LLVMConstInt(element_type,
1518 instr->value.u32[i], false);
1519 break;
1520 case 64:
1521 values[i] = LLVMConstInt(element_type,
1522 instr->value.u64[i], false);
1523 break;
1524 default:
1525 fprintf(stderr,
1526 "unsupported nir load_const bit_size: %d\n",
1527 instr->def.bit_size);
1528 abort();
1529 }
1530 }
1531 if (instr->def.num_components > 1) {
1532 value = LLVMConstVector(values, instr->def.num_components);
1533 } else
1534 value = values[0];
1535
1536 _mesa_hash_table_insert(ctx->defs, &instr->def, value);
1537 }
1538
1539 static LLVMValueRef cast_ptr(struct nir_to_llvm_context *ctx, LLVMValueRef ptr,
1540 LLVMTypeRef type)
1541 {
1542 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
1543 return LLVMBuildBitCast(ctx->builder, ptr,
1544 LLVMPointerType(type, addr_space), "");
1545 }
1546
1547 static LLVMValueRef
1548 get_buffer_size(struct nir_to_llvm_context *ctx, LLVMValueRef descriptor, bool in_elements)
1549 {
1550 LLVMValueRef size =
1551 LLVMBuildExtractElement(ctx->builder, descriptor,
1552 LLVMConstInt(ctx->i32, 2, false), "");
1553
1554 /* VI only */
1555 if (ctx->options->chip_class >= VI && in_elements) {
1556 /* On VI, the descriptor contains the size in bytes,
1557 * but TXQ must return the size in elements.
1558 * The stride is always non-zero for resources using TXQ.
1559 */
1560 LLVMValueRef stride =
1561 LLVMBuildExtractElement(ctx->builder, descriptor,
1562 LLVMConstInt(ctx->i32, 1, false), "");
1563 stride = LLVMBuildLShr(ctx->builder, stride,
1564 LLVMConstInt(ctx->i32, 16, false), "");
1565 stride = LLVMBuildAnd(ctx->builder, stride,
1566 LLVMConstInt(ctx->i32, 0x3fff, false), "");
1567
1568 size = LLVMBuildUDiv(ctx->builder, size, stride, "");
1569 }
1570 return size;
1571 }
1572
1573 /**
1574 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
1575 * intrinsic names).
1576 */
1577 static void build_int_type_name(
1578 LLVMTypeRef type,
1579 char *buf, unsigned bufsize)
1580 {
1581 assert(bufsize >= 6);
1582
1583 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
1584 snprintf(buf, bufsize, "v%ui32",
1585 LLVMGetVectorSize(type));
1586 else
1587 strcpy(buf, "i32");
1588 }
1589
1590 static LLVMValueRef radv_lower_gather4_integer(struct nir_to_llvm_context *ctx,
1591 struct ac_tex_info *tinfo,
1592 nir_tex_instr *instr,
1593 const char *intr_name,
1594 unsigned coord_vgpr_index)
1595 {
1596 LLVMValueRef coord = tinfo->args[0];
1597 LLVMValueRef half_texel[2];
1598 int c;
1599
1600 //TODO Rect
1601 {
1602 LLVMValueRef txq_args[10];
1603 int txq_arg_count = 0;
1604 LLVMValueRef size;
1605 bool da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE;
1606 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, false);
1607 txq_args[txq_arg_count++] = tinfo->args[1];
1608 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0xf, 0); /* dmask */
1609 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* unorm */
1610 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
1611 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, da ? 1 : 0, 0);
1612 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
1613 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
1614 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
1615 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
1616 size = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.getresinfo.i32", ctx->v4i32,
1617 txq_args, txq_arg_count,
1618 AC_FUNC_ATTR_READNONE);
1619
1620 for (c = 0; c < 2; c++) {
1621 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1622 LLVMConstInt(ctx->i32, c, false), "");
1623 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1624 half_texel[c] = ac_emit_fdiv(&ctx->ac, ctx->f32one, half_texel[c]);
1625 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1626 LLVMConstReal(ctx->f32, -0.5), "");
1627 }
1628 }
1629
1630 for (c = 0; c < 2; c++) {
1631 LLVMValueRef tmp;
1632 LLVMValueRef index = LLVMConstInt(ctx->i32, coord_vgpr_index + c, 0);
1633 tmp = LLVMBuildExtractElement(ctx->builder, coord, index, "");
1634 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1635 tmp = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1636 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1637 coord = LLVMBuildInsertElement(ctx->builder, coord, tmp, index, "");
1638 }
1639
1640 tinfo->args[0] = coord;
1641 return ac_emit_llvm_intrinsic(&ctx->ac, intr_name, tinfo->dst_type, tinfo->args, tinfo->arg_count,
1642 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND);
1643
1644 }
1645
1646 static LLVMValueRef build_tex_intrinsic(struct nir_to_llvm_context *ctx,
1647 nir_tex_instr *instr,
1648 struct ac_tex_info *tinfo)
1649 {
1650 const char *name = "llvm.SI.image.sample";
1651 const char *infix = "";
1652 char intr_name[127];
1653 char type[64];
1654 bool is_shadow = instr->is_shadow;
1655 bool has_offset = tinfo->has_offset;
1656 switch (instr->op) {
1657 case nir_texop_txf:
1658 case nir_texop_txf_ms:
1659 case nir_texop_samples_identical:
1660 name = instr->sampler_dim == GLSL_SAMPLER_DIM_MS ? "llvm.SI.image.load" :
1661 instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? "llvm.SI.vs.load.input" :
1662 "llvm.SI.image.load.mip";
1663 is_shadow = false;
1664 has_offset = false;
1665 break;
1666 case nir_texop_txb:
1667 infix = ".b";
1668 break;
1669 case nir_texop_txl:
1670 infix = ".l";
1671 break;
1672 case nir_texop_txs:
1673 name = "llvm.SI.getresinfo";
1674 break;
1675 case nir_texop_query_levels:
1676 name = "llvm.SI.getresinfo";
1677 break;
1678 case nir_texop_tex:
1679 if (ctx->stage != MESA_SHADER_FRAGMENT)
1680 infix = ".lz";
1681 break;
1682 case nir_texop_txd:
1683 infix = ".d";
1684 break;
1685 case nir_texop_tg4:
1686 name = "llvm.SI.gather4";
1687 infix = ".lz";
1688 break;
1689 case nir_texop_lod:
1690 name = "llvm.SI.getlod";
1691 is_shadow = false;
1692 has_offset = false;
1693 break;
1694 default:
1695 break;
1696 }
1697
1698 build_int_type_name(LLVMTypeOf(tinfo->args[0]), type, sizeof(type));
1699 sprintf(intr_name, "%s%s%s%s.%s", name, is_shadow ? ".c" : "", infix,
1700 has_offset ? ".o" : "", type);
1701
1702 if (instr->op == nir_texop_tg4) {
1703 enum glsl_base_type stype = glsl_get_sampler_result_type(instr->texture->var->type);
1704 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1705 return radv_lower_gather4_integer(ctx, tinfo, instr, intr_name,
1706 (int)has_offset + (int)is_shadow);
1707 }
1708 }
1709 return ac_emit_llvm_intrinsic(&ctx->ac, intr_name, tinfo->dst_type, tinfo->args, tinfo->arg_count,
1710 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND);
1711
1712 }
1713
1714 static LLVMValueRef visit_vulkan_resource_index(struct nir_to_llvm_context *ctx,
1715 nir_intrinsic_instr *instr)
1716 {
1717 LLVMValueRef index = get_src(ctx, instr->src[0]);
1718 unsigned desc_set = nir_intrinsic_desc_set(instr);
1719 unsigned binding = nir_intrinsic_binding(instr);
1720 LLVMValueRef desc_ptr = ctx->descriptor_sets[desc_set];
1721 struct radv_descriptor_set_layout *layout = ctx->options->layout->set[desc_set].layout;
1722 unsigned base_offset = layout->binding[binding].offset;
1723 LLVMValueRef offset, stride;
1724
1725 if (layout->binding[binding].type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC ||
1726 layout->binding[binding].type == VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC) {
1727 desc_ptr = ctx->push_constants;
1728 base_offset = ctx->options->layout->push_constant_size;
1729 base_offset += 16 * layout->binding[binding].dynamic_offset_offset;
1730 stride = LLVMConstInt(ctx->i32, 16, false);
1731 } else
1732 stride = LLVMConstInt(ctx->i32, layout->binding[binding].size, false);
1733
1734 offset = LLVMConstInt(ctx->i32, base_offset, false);
1735 index = LLVMBuildMul(ctx->builder, index, stride, "");
1736 offset = LLVMBuildAdd(ctx->builder, offset, index, "");
1737
1738 desc_ptr = build_gep0(ctx, desc_ptr, offset);
1739 desc_ptr = cast_ptr(ctx, desc_ptr, ctx->v4i32);
1740 LLVMSetMetadata(desc_ptr, ctx->uniform_md_kind, ctx->empty_md);
1741
1742 return LLVMBuildLoad(ctx->builder, desc_ptr, "");
1743 }
1744
1745 static LLVMValueRef visit_load_push_constant(struct nir_to_llvm_context *ctx,
1746 nir_intrinsic_instr *instr)
1747 {
1748 LLVMValueRef ptr;
1749
1750 ptr = build_gep0(ctx, ctx->push_constants, get_src(ctx, instr->src[0]));
1751 ptr = cast_ptr(ctx, ptr, get_def_type(ctx, &instr->dest.ssa));
1752
1753 return LLVMBuildLoad(ctx->builder, ptr, "");
1754 }
1755
1756 static LLVMValueRef visit_get_buffer_size(struct nir_to_llvm_context *ctx,
1757 nir_intrinsic_instr *instr)
1758 {
1759 LLVMValueRef desc = get_src(ctx, instr->src[0]);
1760
1761 return get_buffer_size(ctx, desc, false);
1762 }
1763 static void visit_store_ssbo(struct nir_to_llvm_context *ctx,
1764 nir_intrinsic_instr *instr)
1765 {
1766 const char *store_name;
1767 LLVMTypeRef data_type = ctx->f32;
1768 unsigned writemask = nir_intrinsic_write_mask(instr);
1769 LLVMValueRef base_data, base_offset;
1770 LLVMValueRef params[6];
1771
1772 if (ctx->stage == MESA_SHADER_FRAGMENT)
1773 ctx->shader_info->fs.writes_memory = true;
1774
1775 params[1] = get_src(ctx, instr->src[1]);
1776 params[2] = LLVMConstInt(ctx->i32, 0, false); /* vindex */
1777 params[4] = LLVMConstInt(ctx->i1, 0, false); /* glc */
1778 params[5] = LLVMConstInt(ctx->i1, 0, false); /* slc */
1779
1780 if (instr->num_components > 1)
1781 data_type = LLVMVectorType(ctx->f32, instr->num_components);
1782
1783 base_data = to_float(ctx, get_src(ctx, instr->src[0]));
1784 base_data = trim_vector(ctx, base_data, instr->num_components);
1785 base_data = LLVMBuildBitCast(ctx->builder, base_data,
1786 data_type, "");
1787 base_offset = get_src(ctx, instr->src[2]); /* voffset */
1788 while (writemask) {
1789 int start, count;
1790 LLVMValueRef data;
1791 LLVMValueRef offset;
1792 LLVMValueRef tmp;
1793 u_bit_scan_consecutive_range(&writemask, &start, &count);
1794
1795 /* Due to an LLVM limitation, split 3-element writes
1796 * into a 2-element and a 1-element write. */
1797 if (count == 3) {
1798 writemask |= 1 << (start + 2);
1799 count = 2;
1800 }
1801
1802 if (count == 4) {
1803 store_name = "llvm.amdgcn.buffer.store.v4f32";
1804 data = base_data;
1805 } else if (count == 2) {
1806 tmp = LLVMBuildExtractElement(ctx->builder,
1807 base_data, LLVMConstInt(ctx->i32, start, false), "");
1808 data = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(ctx->v2f32), tmp,
1809 ctx->i32zero, "");
1810
1811 tmp = LLVMBuildExtractElement(ctx->builder,
1812 base_data, LLVMConstInt(ctx->i32, start + 1, false), "");
1813 data = LLVMBuildInsertElement(ctx->builder, data, tmp,
1814 ctx->i32one, "");
1815 store_name = "llvm.amdgcn.buffer.store.v2f32";
1816
1817 } else {
1818 assert(count == 1);
1819 if (get_llvm_num_components(base_data) > 1)
1820 data = LLVMBuildExtractElement(ctx->builder, base_data,
1821 LLVMConstInt(ctx->i32, start, false), "");
1822 else
1823 data = base_data;
1824 store_name = "llvm.amdgcn.buffer.store.f32";
1825 }
1826
1827 offset = base_offset;
1828 if (start != 0) {
1829 offset = LLVMBuildAdd(ctx->builder, offset, LLVMConstInt(ctx->i32, start * 4, false), "");
1830 }
1831 params[0] = data;
1832 params[3] = offset;
1833 ac_emit_llvm_intrinsic(&ctx->ac, store_name,
1834 ctx->voidt, params, 6, 0);
1835 }
1836 }
1837
1838 static LLVMValueRef visit_atomic_ssbo(struct nir_to_llvm_context *ctx,
1839 nir_intrinsic_instr *instr)
1840 {
1841 const char *name;
1842 LLVMValueRef params[6];
1843 int arg_count = 0;
1844 if (ctx->stage == MESA_SHADER_FRAGMENT)
1845 ctx->shader_info->fs.writes_memory = true;
1846
1847 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1848 params[arg_count++] = llvm_extract_elem(ctx, get_src(ctx, instr->src[3]), 0);
1849 }
1850 params[arg_count++] = llvm_extract_elem(ctx, get_src(ctx, instr->src[2]), 0);
1851 params[arg_count++] = get_src(ctx, instr->src[0]);
1852 params[arg_count++] = LLVMConstInt(ctx->i32, 0, false); /* vindex */
1853 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1854 params[arg_count++] = LLVMConstInt(ctx->i1, 0, false); /* slc */
1855
1856 switch (instr->intrinsic) {
1857 case nir_intrinsic_ssbo_atomic_add:
1858 name = "llvm.amdgcn.buffer.atomic.add";
1859 break;
1860 case nir_intrinsic_ssbo_atomic_imin:
1861 name = "llvm.amdgcn.buffer.atomic.smin";
1862 break;
1863 case nir_intrinsic_ssbo_atomic_umin:
1864 name = "llvm.amdgcn.buffer.atomic.umin";
1865 break;
1866 case nir_intrinsic_ssbo_atomic_imax:
1867 name = "llvm.amdgcn.buffer.atomic.smax";
1868 break;
1869 case nir_intrinsic_ssbo_atomic_umax:
1870 name = "llvm.amdgcn.buffer.atomic.umax";
1871 break;
1872 case nir_intrinsic_ssbo_atomic_and:
1873 name = "llvm.amdgcn.buffer.atomic.and";
1874 break;
1875 case nir_intrinsic_ssbo_atomic_or:
1876 name = "llvm.amdgcn.buffer.atomic.or";
1877 break;
1878 case nir_intrinsic_ssbo_atomic_xor:
1879 name = "llvm.amdgcn.buffer.atomic.xor";
1880 break;
1881 case nir_intrinsic_ssbo_atomic_exchange:
1882 name = "llvm.amdgcn.buffer.atomic.swap";
1883 break;
1884 case nir_intrinsic_ssbo_atomic_comp_swap:
1885 name = "llvm.amdgcn.buffer.atomic.cmpswap";
1886 break;
1887 default:
1888 abort();
1889 }
1890
1891 return ac_emit_llvm_intrinsic(&ctx->ac, name, ctx->i32, params, arg_count, 0);
1892 }
1893
1894 static LLVMValueRef visit_load_buffer(struct nir_to_llvm_context *ctx,
1895 nir_intrinsic_instr *instr)
1896 {
1897 const char *load_name;
1898 LLVMTypeRef data_type = ctx->f32;
1899 if (instr->num_components == 3)
1900 data_type = LLVMVectorType(ctx->f32, 4);
1901 else if (instr->num_components > 1)
1902 data_type = LLVMVectorType(ctx->f32, instr->num_components);
1903
1904 if (instr->num_components == 4 || instr->num_components == 3)
1905 load_name = "llvm.amdgcn.buffer.load.v4f32";
1906 else if (instr->num_components == 2)
1907 load_name = "llvm.amdgcn.buffer.load.v2f32";
1908 else if (instr->num_components == 1)
1909 load_name = "llvm.amdgcn.buffer.load.f32";
1910 else
1911 abort();
1912
1913 LLVMValueRef params[] = {
1914 get_src(ctx, instr->src[0]),
1915 LLVMConstInt(ctx->i32, 0, false),
1916 get_src(ctx, instr->src[1]),
1917 LLVMConstInt(ctx->i1, 0, false),
1918 LLVMConstInt(ctx->i1, 0, false),
1919 };
1920
1921 LLVMValueRef ret =
1922 ac_emit_llvm_intrinsic(&ctx->ac, load_name, data_type, params, 5, 0);
1923
1924 if (instr->num_components == 3)
1925 ret = trim_vector(ctx, ret, 3);
1926
1927 return LLVMBuildBitCast(ctx->builder, ret,
1928 get_def_type(ctx, &instr->dest.ssa), "");
1929 }
1930
1931 static LLVMValueRef visit_load_ubo_buffer(struct nir_to_llvm_context *ctx,
1932 nir_intrinsic_instr *instr)
1933 {
1934 LLVMValueRef results[4], ret;
1935 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1936 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1937
1938 rsrc = LLVMBuildBitCast(ctx->builder, rsrc, LLVMVectorType(ctx->i8, 16), "");
1939
1940 for (unsigned i = 0; i < instr->num_components; ++i) {
1941 LLVMValueRef params[] = {
1942 rsrc,
1943 LLVMBuildAdd(ctx->builder, LLVMConstInt(ctx->i32, 4 * i, 0),
1944 offset, "")
1945 };
1946 results[i] = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.load.const", ctx->f32,
1947 params, 2, AC_FUNC_ATTR_READNONE);
1948 }
1949
1950
1951 ret = ac_build_gather_values(&ctx->ac, results, instr->num_components);
1952 return LLVMBuildBitCast(ctx->builder, ret,
1953 get_def_type(ctx, &instr->dest.ssa), "");
1954 }
1955
1956 static void
1957 radv_get_deref_offset(struct nir_to_llvm_context *ctx, nir_deref *tail,
1958 bool vs_in, unsigned *const_out, LLVMValueRef *indir_out)
1959 {
1960 unsigned const_offset = 0;
1961 LLVMValueRef offset = NULL;
1962
1963
1964 while (tail->child != NULL) {
1965 const struct glsl_type *parent_type = tail->type;
1966 tail = tail->child;
1967
1968 if (tail->deref_type == nir_deref_type_array) {
1969 nir_deref_array *deref_array = nir_deref_as_array(tail);
1970 LLVMValueRef index, stride, local_offset;
1971 unsigned size = glsl_count_attribute_slots(tail->type, vs_in);
1972
1973 const_offset += size * deref_array->base_offset;
1974 if (deref_array->deref_array_type == nir_deref_array_type_direct)
1975 continue;
1976
1977 assert(deref_array->deref_array_type == nir_deref_array_type_indirect);
1978 index = get_src(ctx, deref_array->indirect);
1979 stride = LLVMConstInt(ctx->i32, size, 0);
1980 local_offset = LLVMBuildMul(ctx->builder, stride, index, "");
1981
1982 if (offset)
1983 offset = LLVMBuildAdd(ctx->builder, offset, local_offset, "");
1984 else
1985 offset = local_offset;
1986 } else if (tail->deref_type == nir_deref_type_struct) {
1987 nir_deref_struct *deref_struct = nir_deref_as_struct(tail);
1988
1989 for (unsigned i = 0; i < deref_struct->index; i++) {
1990 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1991 const_offset += glsl_count_attribute_slots(ft, vs_in);
1992 }
1993 } else
1994 unreachable("unsupported deref type");
1995
1996 }
1997
1998 if (const_offset && offset)
1999 offset = LLVMBuildAdd(ctx->builder, offset,
2000 LLVMConstInt(ctx->i32, const_offset, 0),
2001 "");
2002
2003 *const_out = const_offset;
2004 *indir_out = offset;
2005 }
2006
2007 static LLVMValueRef visit_load_var(struct nir_to_llvm_context *ctx,
2008 nir_intrinsic_instr *instr)
2009 {
2010 LLVMValueRef values[4];
2011 int idx = instr->variables[0]->var->data.driver_location;
2012 int ve = instr->dest.ssa.num_components;
2013 LLVMValueRef indir_index;
2014 unsigned const_index;
2015 switch (instr->variables[0]->var->data.mode) {
2016 case nir_var_shader_in:
2017 radv_get_deref_offset(ctx, &instr->variables[0]->deref,
2018 ctx->stage == MESA_SHADER_VERTEX,
2019 &const_index, &indir_index);
2020 for (unsigned chan = 0; chan < ve; chan++) {
2021 if (indir_index) {
2022 unsigned count = glsl_count_attribute_slots(
2023 instr->variables[0]->var->type,
2024 ctx->stage == MESA_SHADER_VERTEX);
2025 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2026 &ctx->ac, ctx->inputs + idx + chan, count,
2027 4, false);
2028
2029 values[chan] = LLVMBuildExtractElement(ctx->builder,
2030 tmp_vec,
2031 indir_index, "");
2032 } else
2033 values[chan] = ctx->inputs[idx + chan + const_index * 4];
2034 }
2035 return to_integer(ctx, ac_build_gather_values(&ctx->ac, values, ve));
2036 break;
2037 case nir_var_local:
2038 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2039 &const_index, &indir_index);
2040 for (unsigned chan = 0; chan < ve; chan++) {
2041 if (indir_index) {
2042 unsigned count = glsl_count_attribute_slots(
2043 instr->variables[0]->var->type, false);
2044 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2045 &ctx->ac, ctx->locals + idx + chan, count,
2046 4, true);
2047
2048 values[chan] = LLVMBuildExtractElement(ctx->builder,
2049 tmp_vec,
2050 indir_index, "");
2051 } else {
2052 values[chan] = LLVMBuildLoad(ctx->builder, ctx->locals[idx + chan + const_index * 4], "");
2053 }
2054 }
2055 return to_integer(ctx, ac_build_gather_values(&ctx->ac, values, ve));
2056 case nir_var_shader_out:
2057 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2058 &const_index, &indir_index);
2059 for (unsigned chan = 0; chan < ve; chan++) {
2060 if (indir_index) {
2061 unsigned count = glsl_count_attribute_slots(
2062 instr->variables[0]->var->type, false);
2063 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2064 &ctx->ac, ctx->outputs + idx + chan, count,
2065 4, true);
2066
2067 values[chan] = LLVMBuildExtractElement(ctx->builder,
2068 tmp_vec,
2069 indir_index, "");
2070 } else {
2071 values[chan] = LLVMBuildLoad(ctx->builder,
2072 ctx->outputs[idx + chan + const_index * 4],
2073 "");
2074 }
2075 }
2076 return to_integer(ctx, ac_build_gather_values(&ctx->ac, values, ve));
2077 case nir_var_shared: {
2078 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2079 &const_index, &indir_index);
2080 LLVMValueRef ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
2081 LLVMValueRef derived_ptr;
2082
2083 for (unsigned chan = 0; chan < ve; chan++) {
2084 LLVMValueRef index = LLVMConstInt(ctx->i32, chan, false);
2085 if (indir_index)
2086 index = LLVMBuildAdd(ctx->builder, index, indir_index, "");
2087 derived_ptr = LLVMBuildGEP(ctx->builder, ptr, &index, 1, "");
2088 values[chan] = LLVMBuildLoad(ctx->builder, derived_ptr, "");
2089 }
2090 return to_integer(ctx, ac_build_gather_values(&ctx->ac, values, ve));
2091 }
2092 default:
2093 break;
2094 }
2095 return NULL;
2096 }
2097
2098 static void
2099 visit_store_var(struct nir_to_llvm_context *ctx,
2100 nir_intrinsic_instr *instr)
2101 {
2102 LLVMValueRef temp_ptr, value;
2103 int idx = instr->variables[0]->var->data.driver_location;
2104 LLVMValueRef src = to_float(ctx, get_src(ctx, instr->src[0]));
2105 int writemask = instr->const_index[0];
2106 LLVMValueRef indir_index;
2107 unsigned const_index;
2108 switch (instr->variables[0]->var->data.mode) {
2109 case nir_var_shader_out:
2110 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2111 &const_index, &indir_index);
2112 for (unsigned chan = 0; chan < 4; chan++) {
2113 int stride = 4;
2114 if (!(writemask & (1 << chan)))
2115 continue;
2116 if (get_llvm_num_components(src) == 1)
2117 value = src;
2118 else
2119 value = LLVMBuildExtractElement(ctx->builder, src,
2120 LLVMConstInt(ctx->i32,
2121 chan, false),
2122 "");
2123
2124 if (instr->variables[0]->var->data.location == VARYING_SLOT_CLIP_DIST0 ||
2125 instr->variables[0]->var->data.location == VARYING_SLOT_CULL_DIST0)
2126 stride = 1;
2127 if (indir_index) {
2128 unsigned count = glsl_count_attribute_slots(
2129 instr->variables[0]->var->type, false);
2130 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2131 &ctx->ac, ctx->outputs + idx + chan, count,
2132 stride, true);
2133
2134 if (get_llvm_num_components(tmp_vec) > 1) {
2135 tmp_vec = LLVMBuildInsertElement(ctx->builder, tmp_vec,
2136 value, indir_index, "");
2137 } else
2138 tmp_vec = value;
2139 build_store_values_extended(ctx, ctx->outputs + idx + chan,
2140 count, stride, tmp_vec);
2141
2142 } else {
2143 temp_ptr = ctx->outputs[idx + chan + const_index * stride];
2144
2145 LLVMBuildStore(ctx->builder, value, temp_ptr);
2146 }
2147 }
2148 break;
2149 case nir_var_local:
2150 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2151 &const_index, &indir_index);
2152 for (unsigned chan = 0; chan < 4; chan++) {
2153 if (!(writemask & (1 << chan)))
2154 continue;
2155
2156 if (get_llvm_num_components(src) == 1)
2157 value = src;
2158 else
2159 value = LLVMBuildExtractElement(ctx->builder, src,
2160 LLVMConstInt(ctx->i32, chan, false), "");
2161 if (indir_index) {
2162 unsigned count = glsl_count_attribute_slots(
2163 instr->variables[0]->var->type, false);
2164 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2165 &ctx->ac, ctx->locals + idx + chan, count,
2166 4, true);
2167
2168 tmp_vec = LLVMBuildInsertElement(ctx->builder, tmp_vec,
2169 value, indir_index, "");
2170 build_store_values_extended(ctx, ctx->locals + idx + chan,
2171 count, 4, tmp_vec);
2172 } else {
2173 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2174
2175 LLVMBuildStore(ctx->builder, value, temp_ptr);
2176 }
2177 }
2178 break;
2179 case nir_var_shared: {
2180 LLVMValueRef ptr;
2181 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2182 &const_index, &indir_index);
2183
2184 ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
2185 LLVMValueRef derived_ptr;
2186
2187 for (unsigned chan = 0; chan < 4; chan++) {
2188 if (!(writemask & (1 << chan)))
2189 continue;
2190
2191 LLVMValueRef index = LLVMConstInt(ctx->i32, chan, false);
2192
2193 if (get_llvm_num_components(src) == 1)
2194 value = src;
2195 else
2196 value = LLVMBuildExtractElement(ctx->builder, src,
2197 LLVMConstInt(ctx->i32,
2198 chan, false),
2199 "");
2200
2201 if (indir_index)
2202 index = LLVMBuildAdd(ctx->builder, index, indir_index, "");
2203
2204 derived_ptr = LLVMBuildGEP(ctx->builder, ptr, &index, 1, "");
2205 LLVMBuildStore(ctx->builder,
2206 to_integer(ctx, value), derived_ptr);
2207 }
2208 break;
2209 }
2210 default:
2211 break;
2212 }
2213 }
2214
2215 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2216 {
2217 switch (dim) {
2218 case GLSL_SAMPLER_DIM_BUF:
2219 return 1;
2220 case GLSL_SAMPLER_DIM_1D:
2221 return array ? 2 : 1;
2222 case GLSL_SAMPLER_DIM_2D:
2223 return array ? 3 : 2;
2224 case GLSL_SAMPLER_DIM_MS:
2225 return array ? 4 : 3;
2226 case GLSL_SAMPLER_DIM_3D:
2227 case GLSL_SAMPLER_DIM_CUBE:
2228 return 3;
2229 case GLSL_SAMPLER_DIM_RECT:
2230 case GLSL_SAMPLER_DIM_SUBPASS:
2231 return 2;
2232 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2233 return 3;
2234 default:
2235 break;
2236 }
2237 return 0;
2238 }
2239
2240 static LLVMValueRef get_image_coords(struct nir_to_llvm_context *ctx,
2241 nir_intrinsic_instr *instr, bool add_frag_pos)
2242 {
2243 const struct glsl_type *type = instr->variables[0]->var->type;
2244 if(instr->variables[0]->deref.child)
2245 type = instr->variables[0]->deref.child->type;
2246
2247 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
2248 LLVMValueRef coords[4];
2249 LLVMValueRef masks[] = {
2250 LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false),
2251 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false),
2252 };
2253 LLVMValueRef res;
2254 int count;
2255 enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
2256 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2257 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2258
2259 count = image_type_to_components_count(dim,
2260 glsl_sampler_type_is_array(type));
2261
2262 if (count == 1) {
2263 if (instr->src[0].ssa->num_components)
2264 res = LLVMBuildExtractElement(ctx->builder, src0, masks[0], "");
2265 else
2266 res = src0;
2267 } else {
2268 int chan;
2269 if (is_ms)
2270 count--;
2271 for (chan = 0; chan < count; ++chan) {
2272 coords[chan] = LLVMBuildExtractElement(ctx->builder, src0, masks[chan], "");
2273 }
2274
2275 if (add_frag_pos) {
2276 for (chan = 0; chan < count; ++chan)
2277 coords[chan] = LLVMBuildAdd(ctx->builder, coords[chan], LLVMBuildFPToUI(ctx->builder, ctx->frag_pos[chan], ctx->i32, ""), "");
2278 }
2279 if (is_ms) {
2280 coords[count] = llvm_extract_elem(ctx, get_src(ctx, instr->src[1]), 0);
2281 count++;
2282 }
2283
2284 if (count == 3) {
2285 coords[3] = LLVMGetUndef(ctx->i32);
2286 count = 4;
2287 }
2288 res = ac_build_gather_values(&ctx->ac, coords, count);
2289 }
2290 return res;
2291 }
2292
2293 static void build_type_name_for_intr(
2294 LLVMTypeRef type,
2295 char *buf, unsigned bufsize)
2296 {
2297 LLVMTypeRef elem_type = type;
2298
2299 assert(bufsize >= 8);
2300
2301 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
2302 int ret = snprintf(buf, bufsize, "v%u",
2303 LLVMGetVectorSize(type));
2304 if (ret < 0) {
2305 char *type_name = LLVMPrintTypeToString(type);
2306 fprintf(stderr, "Error building type name for: %s\n",
2307 type_name);
2308 return;
2309 }
2310 elem_type = LLVMGetElementType(type);
2311 buf += ret;
2312 bufsize -= ret;
2313 }
2314 switch (LLVMGetTypeKind(elem_type)) {
2315 default: break;
2316 case LLVMIntegerTypeKind:
2317 snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type));
2318 break;
2319 case LLVMFloatTypeKind:
2320 snprintf(buf, bufsize, "f32");
2321 break;
2322 case LLVMDoubleTypeKind:
2323 snprintf(buf, bufsize, "f64");
2324 break;
2325 }
2326 }
2327
2328 static void get_image_intr_name(const char *base_name,
2329 LLVMTypeRef data_type,
2330 LLVMTypeRef coords_type,
2331 LLVMTypeRef rsrc_type,
2332 char *out_name, unsigned out_len)
2333 {
2334 char coords_type_name[8];
2335
2336 build_type_name_for_intr(coords_type, coords_type_name,
2337 sizeof(coords_type_name));
2338
2339 if (HAVE_LLVM <= 0x0309) {
2340 snprintf(out_name, out_len, "%s.%s", base_name, coords_type_name);
2341 } else {
2342 char data_type_name[8];
2343 char rsrc_type_name[8];
2344
2345 build_type_name_for_intr(data_type, data_type_name,
2346 sizeof(data_type_name));
2347 build_type_name_for_intr(rsrc_type, rsrc_type_name,
2348 sizeof(rsrc_type_name));
2349 snprintf(out_name, out_len, "%s.%s.%s.%s", base_name,
2350 data_type_name, coords_type_name, rsrc_type_name);
2351 }
2352 }
2353
2354 static LLVMValueRef visit_image_load(struct nir_to_llvm_context *ctx,
2355 nir_intrinsic_instr *instr)
2356 {
2357 LLVMValueRef params[7];
2358 LLVMValueRef res;
2359 char intrinsic_name[64];
2360 const nir_variable *var = instr->variables[0]->var;
2361 const struct glsl_type *type = var->type;
2362 if(instr->variables[0]->deref.child)
2363 type = instr->variables[0]->deref.child->type;
2364
2365 type = glsl_without_array(type);
2366 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2367 params[0] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
2368 params[1] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
2369 LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
2370 params[2] = LLVMConstInt(ctx->i32, 0, false); /* voffset */
2371 params[3] = LLVMConstInt(ctx->i1, 0, false); /* glc */
2372 params[4] = LLVMConstInt(ctx->i1, 0, false); /* slc */
2373 res = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.buffer.load.format.v4f32", ctx->v4f32,
2374 params, 5, 0);
2375
2376 res = trim_vector(ctx, res, instr->dest.ssa.num_components);
2377 res = to_integer(ctx, res);
2378 } else {
2379 bool is_da = glsl_sampler_type_is_array(type) ||
2380 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
2381 bool add_frag_pos = glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_SUBPASS;
2382 LLVMValueRef da = is_da ? ctx->i32one : ctx->i32zero;
2383 LLVMValueRef glc = LLVMConstInt(ctx->i1, 0, false);
2384 LLVMValueRef slc = LLVMConstInt(ctx->i1, 0, false);
2385
2386 params[0] = get_image_coords(ctx, instr, add_frag_pos);
2387 params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2388 params[2] = LLVMConstInt(ctx->i32, 15, false); /* dmask */
2389 if (HAVE_LLVM <= 0x0309) {
2390 params[3] = LLVMConstInt(ctx->i1, 0, false); /* r128 */
2391 params[4] = da;
2392 params[5] = glc;
2393 params[6] = slc;
2394 } else {
2395 LLVMValueRef lwe = LLVMConstInt(ctx->i1, 0, false);
2396 params[3] = glc;
2397 params[4] = slc;
2398 params[5] = lwe;
2399 params[6] = da;
2400 }
2401
2402 get_image_intr_name("llvm.amdgcn.image.load",
2403 ctx->v4f32, /* vdata */
2404 LLVMTypeOf(params[0]), /* coords */
2405 LLVMTypeOf(params[1]), /* rsrc */
2406 intrinsic_name, sizeof(intrinsic_name));
2407
2408 res = ac_emit_llvm_intrinsic(&ctx->ac, intrinsic_name, ctx->v4f32,
2409 params, 7, AC_FUNC_ATTR_READONLY);
2410 }
2411 return to_integer(ctx, res);
2412 }
2413
2414 static void visit_image_store(struct nir_to_llvm_context *ctx,
2415 nir_intrinsic_instr *instr)
2416 {
2417 LLVMValueRef params[8];
2418 char intrinsic_name[64];
2419 const nir_variable *var = instr->variables[0]->var;
2420 LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0);
2421 LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0);
2422 const struct glsl_type *type = glsl_without_array(var->type);
2423
2424 if (ctx->stage == MESA_SHADER_FRAGMENT)
2425 ctx->shader_info->fs.writes_memory = true;
2426
2427 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2428 params[0] = to_float(ctx, get_src(ctx, instr->src[2])); /* data */
2429 params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
2430 params[2] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
2431 LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
2432 params[3] = LLVMConstInt(ctx->i32, 0, false); /* voffset */
2433 params[4] = i1false; /* glc */
2434 params[5] = i1false; /* slc */
2435 ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.buffer.store.format.v4f32", ctx->voidt,
2436 params, 6, 0);
2437 } else {
2438 bool is_da = glsl_sampler_type_is_array(type) ||
2439 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
2440 LLVMValueRef da = is_da ? i1true : i1false;
2441 LLVMValueRef glc = i1false;
2442 LLVMValueRef slc = i1false;
2443
2444 params[0] = to_float(ctx, get_src(ctx, instr->src[2]));
2445 params[1] = get_image_coords(ctx, instr, false); /* coords */
2446 params[2] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2447 params[3] = LLVMConstInt(ctx->i32, 15, false); /* dmask */
2448 if (HAVE_LLVM <= 0x0309) {
2449 params[4] = i1false; /* r128 */
2450 params[5] = da;
2451 params[6] = glc;
2452 params[7] = slc;
2453 } else {
2454 LLVMValueRef lwe = i1false;
2455 params[4] = glc;
2456 params[5] = slc;
2457 params[6] = lwe;
2458 params[7] = da;
2459 }
2460
2461 get_image_intr_name("llvm.amdgcn.image.store",
2462 LLVMTypeOf(params[0]), /* vdata */
2463 LLVMTypeOf(params[1]), /* coords */
2464 LLVMTypeOf(params[2]), /* rsrc */
2465 intrinsic_name, sizeof(intrinsic_name));
2466
2467 ac_emit_llvm_intrinsic(&ctx->ac, intrinsic_name, ctx->voidt,
2468 params, 8, 0);
2469 }
2470
2471 }
2472
2473 static LLVMValueRef visit_image_atomic(struct nir_to_llvm_context *ctx,
2474 nir_intrinsic_instr *instr)
2475 {
2476 LLVMValueRef params[6];
2477 int param_count = 0;
2478 const nir_variable *var = instr->variables[0]->var;
2479 LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0);
2480 LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0);
2481 const char *base_name = "llvm.amdgcn.image.atomic";
2482 const char *atomic_name;
2483 LLVMValueRef coords;
2484 char intrinsic_name[32], coords_type[8];
2485 const struct glsl_type *type = glsl_without_array(var->type);
2486
2487 if (ctx->stage == MESA_SHADER_FRAGMENT)
2488 ctx->shader_info->fs.writes_memory = true;
2489
2490 params[param_count++] = get_src(ctx, instr->src[2]);
2491 if (instr->intrinsic == nir_intrinsic_image_atomic_comp_swap)
2492 params[param_count++] = get_src(ctx, instr->src[3]);
2493
2494 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2495 params[param_count++] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
2496 coords = params[param_count++] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
2497 LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
2498 params[param_count++] = ctx->i32zero; /* voffset */
2499 params[param_count++] = i1false; /* glc */
2500 params[param_count++] = i1false; /* slc */
2501 } else {
2502 bool da = glsl_sampler_type_is_array(type) ||
2503 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
2504
2505 coords = params[param_count++] = get_image_coords(ctx, instr, false);
2506 params[param_count++] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2507 params[param_count++] = i1false; /* r128 */
2508 params[param_count++] = da ? i1true : i1false; /* da */
2509 params[param_count++] = i1false; /* slc */
2510 }
2511
2512 switch (instr->intrinsic) {
2513 case nir_intrinsic_image_atomic_add:
2514 atomic_name = "add";
2515 break;
2516 case nir_intrinsic_image_atomic_min:
2517 atomic_name = "smin";
2518 break;
2519 case nir_intrinsic_image_atomic_max:
2520 atomic_name = "smax";
2521 break;
2522 case nir_intrinsic_image_atomic_and:
2523 atomic_name = "and";
2524 break;
2525 case nir_intrinsic_image_atomic_or:
2526 atomic_name = "or";
2527 break;
2528 case nir_intrinsic_image_atomic_xor:
2529 atomic_name = "xor";
2530 break;
2531 case nir_intrinsic_image_atomic_exchange:
2532 atomic_name = "swap";
2533 break;
2534 case nir_intrinsic_image_atomic_comp_swap:
2535 atomic_name = "cmpswap";
2536 break;
2537 default:
2538 abort();
2539 }
2540 build_int_type_name(LLVMTypeOf(coords),
2541 coords_type, sizeof(coords_type));
2542
2543 snprintf(intrinsic_name, sizeof(intrinsic_name),
2544 "%s.%s.%s", base_name, atomic_name, coords_type);
2545 return ac_emit_llvm_intrinsic(&ctx->ac, intrinsic_name, ctx->i32, params, param_count, 0);
2546 }
2547
2548 static LLVMValueRef visit_image_size(struct nir_to_llvm_context *ctx,
2549 nir_intrinsic_instr *instr)
2550 {
2551 LLVMValueRef res;
2552 LLVMValueRef params[10];
2553 const nir_variable *var = instr->variables[0]->var;
2554 const struct glsl_type *type = instr->variables[0]->var->type;
2555 bool da = glsl_sampler_type_is_array(var->type) ||
2556 glsl_get_sampler_dim(var->type) == GLSL_SAMPLER_DIM_CUBE;
2557 if(instr->variables[0]->deref.child)
2558 type = instr->variables[0]->deref.child->type;
2559
2560 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF)
2561 return get_buffer_size(ctx, get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER), true);
2562 params[0] = ctx->i32zero;
2563 params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2564 params[2] = LLVMConstInt(ctx->i32, 15, false);
2565 params[3] = ctx->i32zero;
2566 params[4] = ctx->i32zero;
2567 params[5] = da ? ctx->i32one : ctx->i32zero;
2568 params[6] = ctx->i32zero;
2569 params[7] = ctx->i32zero;
2570 params[8] = ctx->i32zero;
2571 params[9] = ctx->i32zero;
2572
2573 res = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.getresinfo.i32", ctx->v4i32,
2574 params, 10, AC_FUNC_ATTR_READNONE);
2575
2576 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE &&
2577 glsl_sampler_type_is_array(type)) {
2578 LLVMValueRef two = LLVMConstInt(ctx->i32, 2, false);
2579 LLVMValueRef six = LLVMConstInt(ctx->i32, 6, false);
2580 LLVMValueRef z = LLVMBuildExtractElement(ctx->builder, res, two, "");
2581 z = LLVMBuildSDiv(ctx->builder, z, six, "");
2582 res = LLVMBuildInsertElement(ctx->builder, res, z, two, "");
2583 }
2584 return res;
2585 }
2586
2587 static void emit_waitcnt(struct nir_to_llvm_context *ctx)
2588 {
2589 LLVMValueRef args[1] = {
2590 LLVMConstInt(ctx->i32, 0xf70, false),
2591 };
2592 ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.s.waitcnt",
2593 ctx->voidt, args, 1, 0);
2594 }
2595
2596 static void emit_barrier(struct nir_to_llvm_context *ctx)
2597 {
2598 // TODO tess
2599 ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.s.barrier",
2600 ctx->voidt, NULL, 0, 0);
2601 }
2602
2603 static void emit_discard_if(struct nir_to_llvm_context *ctx,
2604 nir_intrinsic_instr *instr)
2605 {
2606 LLVMValueRef cond;
2607 ctx->shader_info->fs.can_discard = true;
2608
2609 cond = LLVMBuildICmp(ctx->builder, LLVMIntNE,
2610 get_src(ctx, instr->src[0]),
2611 ctx->i32zero, "");
2612
2613 cond = LLVMBuildSelect(ctx->builder, cond,
2614 LLVMConstReal(ctx->f32, -1.0f),
2615 ctx->f32zero, "");
2616 ac_emit_llvm_intrinsic(&ctx->ac, "llvm.AMDGPU.kill",
2617 ctx->voidt,
2618 &cond, 1, 0);
2619 }
2620
2621 static LLVMValueRef
2622 visit_load_local_invocation_index(struct nir_to_llvm_context *ctx)
2623 {
2624 LLVMValueRef result;
2625 LLVMValueRef thread_id = get_thread_id(ctx);
2626 result = LLVMBuildAnd(ctx->builder, ctx->tg_size,
2627 LLVMConstInt(ctx->i32, 0xfc0, false), "");
2628
2629 return LLVMBuildAdd(ctx->builder, result, thread_id, "");
2630 }
2631
2632 static LLVMValueRef visit_var_atomic(struct nir_to_llvm_context *ctx,
2633 nir_intrinsic_instr *instr)
2634 {
2635 LLVMValueRef ptr, result;
2636 int idx = instr->variables[0]->var->data.driver_location;
2637 LLVMValueRef src = get_src(ctx, instr->src[0]);
2638 ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
2639
2640 if (instr->intrinsic == nir_intrinsic_var_atomic_comp_swap) {
2641 LLVMValueRef src1 = get_src(ctx, instr->src[1]);
2642 result = LLVMBuildAtomicCmpXchg(ctx->builder,
2643 ptr, src, src1,
2644 LLVMAtomicOrderingSequentiallyConsistent,
2645 LLVMAtomicOrderingSequentiallyConsistent,
2646 false);
2647 } else {
2648 LLVMAtomicRMWBinOp op;
2649 switch (instr->intrinsic) {
2650 case nir_intrinsic_var_atomic_add:
2651 op = LLVMAtomicRMWBinOpAdd;
2652 break;
2653 case nir_intrinsic_var_atomic_umin:
2654 op = LLVMAtomicRMWBinOpUMin;
2655 break;
2656 case nir_intrinsic_var_atomic_umax:
2657 op = LLVMAtomicRMWBinOpUMax;
2658 break;
2659 case nir_intrinsic_var_atomic_imin:
2660 op = LLVMAtomicRMWBinOpMin;
2661 break;
2662 case nir_intrinsic_var_atomic_imax:
2663 op = LLVMAtomicRMWBinOpMax;
2664 break;
2665 case nir_intrinsic_var_atomic_and:
2666 op = LLVMAtomicRMWBinOpAnd;
2667 break;
2668 case nir_intrinsic_var_atomic_or:
2669 op = LLVMAtomicRMWBinOpOr;
2670 break;
2671 case nir_intrinsic_var_atomic_xor:
2672 op = LLVMAtomicRMWBinOpXor;
2673 break;
2674 case nir_intrinsic_var_atomic_exchange:
2675 op = LLVMAtomicRMWBinOpXchg;
2676 break;
2677 default:
2678 return NULL;
2679 }
2680
2681 result = LLVMBuildAtomicRMW(ctx->builder, op, ptr, to_integer(ctx, src),
2682 LLVMAtomicOrderingSequentiallyConsistent,
2683 false);
2684 }
2685 return result;
2686 }
2687
2688 #define INTERP_CENTER 0
2689 #define INTERP_CENTROID 1
2690 #define INTERP_SAMPLE 2
2691
2692 static LLVMValueRef lookup_interp_param(struct nir_to_llvm_context *ctx,
2693 enum glsl_interp_mode interp, unsigned location)
2694 {
2695 switch (interp) {
2696 case INTERP_MODE_FLAT:
2697 default:
2698 return NULL;
2699 case INTERP_MODE_SMOOTH:
2700 case INTERP_MODE_NONE:
2701 if (location == INTERP_CENTER)
2702 return ctx->persp_center;
2703 else if (location == INTERP_CENTROID)
2704 return ctx->persp_centroid;
2705 else if (location == INTERP_SAMPLE)
2706 return ctx->persp_sample;
2707 break;
2708 case INTERP_MODE_NOPERSPECTIVE:
2709 if (location == INTERP_CENTER)
2710 return ctx->linear_center;
2711 else if (location == INTERP_CENTROID)
2712 return ctx->linear_centroid;
2713 else if (location == INTERP_SAMPLE)
2714 return ctx->linear_sample;
2715 break;
2716 }
2717 return NULL;
2718 }
2719
2720 static LLVMValueRef load_sample_position(struct nir_to_llvm_context *ctx,
2721 LLVMValueRef sample_id)
2722 {
2723 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
2724 LLVMValueRef offset0 = LLVMBuildMul(ctx->builder, sample_id, LLVMConstInt(ctx->i32, 8, false), "");
2725 LLVMValueRef offset1 = LLVMBuildAdd(ctx->builder, offset0, LLVMConstInt(ctx->i32, 4, false), "");
2726 LLVMValueRef result[2];
2727
2728 result[0] = build_indexed_load_const(ctx, ctx->sample_positions, offset0);
2729 result[1] = build_indexed_load_const(ctx, ctx->sample_positions, offset1);
2730
2731 return ac_build_gather_values(&ctx->ac, result, 2);
2732 }
2733
2734 static LLVMValueRef load_sample_pos(struct nir_to_llvm_context *ctx)
2735 {
2736 LLVMValueRef values[2];
2737
2738 values[0] = emit_ffract(ctx, ctx->frag_pos[0]);
2739 values[1] = emit_ffract(ctx, ctx->frag_pos[1]);
2740 return ac_build_gather_values(&ctx->ac, values, 2);
2741 }
2742
2743 static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx,
2744 nir_intrinsic_instr *instr)
2745 {
2746 LLVMValueRef result[2];
2747 LLVMValueRef interp_param, attr_number;
2748 unsigned location;
2749 unsigned chan;
2750 LLVMValueRef src_c0, src_c1;
2751 const char *intr_name;
2752 LLVMValueRef src0;
2753 int input_index = instr->variables[0]->var->data.location - VARYING_SLOT_VAR0;
2754 switch (instr->intrinsic) {
2755 case nir_intrinsic_interp_var_at_centroid:
2756 location = INTERP_CENTROID;
2757 break;
2758 case nir_intrinsic_interp_var_at_sample:
2759 case nir_intrinsic_interp_var_at_offset:
2760 location = INTERP_SAMPLE;
2761 src0 = get_src(ctx, instr->src[0]);
2762 break;
2763 default:
2764 break;
2765 }
2766
2767 if (instr->intrinsic == nir_intrinsic_interp_var_at_offset) {
2768 src_c0 = to_float(ctx, LLVMBuildExtractElement(ctx->builder, src0, ctx->i32zero, ""));
2769 src_c1 = to_float(ctx, LLVMBuildExtractElement(ctx->builder, src0, ctx->i32one, ""));
2770 } else if (instr->intrinsic == nir_intrinsic_interp_var_at_sample) {
2771 LLVMValueRef sample_position;
2772 LLVMValueRef halfval = LLVMConstReal(ctx->f32, 0.5f);
2773
2774 /* fetch sample ID */
2775 sample_position = load_sample_position(ctx, src0);
2776
2777 src_c0 = LLVMBuildExtractElement(ctx->builder, sample_position, ctx->i32zero, "");
2778 src_c0 = LLVMBuildFSub(ctx->builder, src_c0, halfval, "");
2779 src_c1 = LLVMBuildExtractElement(ctx->builder, sample_position, ctx->i32one, "");
2780 src_c1 = LLVMBuildFSub(ctx->builder, src_c1, halfval, "");
2781 }
2782 interp_param = lookup_interp_param(ctx, instr->variables[0]->var->data.interpolation, location);
2783 attr_number = LLVMConstInt(ctx->i32, input_index, false);
2784
2785 if (location == INTERP_SAMPLE) {
2786 LLVMValueRef ij_out[2];
2787 LLVMValueRef ddxy_out = emit_ddxy_interp(ctx, interp_param);
2788
2789 /*
2790 * take the I then J parameters, and the DDX/Y for it, and
2791 * calculate the IJ inputs for the interpolator.
2792 * temp1 = ddx * offset/sample.x + I;
2793 * interp_param.I = ddy * offset/sample.y + temp1;
2794 * temp1 = ddx * offset/sample.x + J;
2795 * interp_param.J = ddy * offset/sample.y + temp1;
2796 */
2797 for (unsigned i = 0; i < 2; i++) {
2798 LLVMValueRef ix_ll = LLVMConstInt(ctx->i32, i, false);
2799 LLVMValueRef iy_ll = LLVMConstInt(ctx->i32, i + 2, false);
2800 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->builder,
2801 ddxy_out, ix_ll, "");
2802 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->builder,
2803 ddxy_out, iy_ll, "");
2804 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->builder,
2805 interp_param, ix_ll, "");
2806 LLVMValueRef temp1, temp2;
2807
2808 interp_el = LLVMBuildBitCast(ctx->builder, interp_el,
2809 ctx->f32, "");
2810
2811 temp1 = LLVMBuildFMul(ctx->builder, ddx_el, src_c0, "");
2812 temp1 = LLVMBuildFAdd(ctx->builder, temp1, interp_el, "");
2813
2814 temp2 = LLVMBuildFMul(ctx->builder, ddy_el, src_c1, "");
2815 temp2 = LLVMBuildFAdd(ctx->builder, temp2, temp1, "");
2816
2817 ij_out[i] = LLVMBuildBitCast(ctx->builder,
2818 temp2, ctx->i32, "");
2819 }
2820 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
2821
2822 }
2823 intr_name = interp_param ? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
2824 for (chan = 0; chan < 2; chan++) {
2825 LLVMValueRef args[4];
2826 LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
2827
2828 args[0] = llvm_chan;
2829 args[1] = attr_number;
2830 args[2] = ctx->prim_mask;
2831 args[3] = interp_param;
2832 result[chan] = ac_emit_llvm_intrinsic(&ctx->ac, intr_name,
2833 ctx->f32, args, args[3] ? 4 : 3,
2834 AC_FUNC_ATTR_READNONE);
2835 }
2836 return ac_build_gather_values(&ctx->ac, result, 2);
2837 }
2838
2839 static void visit_intrinsic(struct nir_to_llvm_context *ctx,
2840 nir_intrinsic_instr *instr)
2841 {
2842 LLVMValueRef result = NULL;
2843
2844 switch (instr->intrinsic) {
2845 case nir_intrinsic_load_work_group_id: {
2846 result = ctx->workgroup_ids;
2847 break;
2848 }
2849 case nir_intrinsic_load_base_vertex: {
2850 result = ctx->base_vertex;
2851 break;
2852 }
2853 case nir_intrinsic_load_vertex_id_zero_base: {
2854 result = ctx->vertex_id;
2855 break;
2856 }
2857 case nir_intrinsic_load_local_invocation_id: {
2858 result = ctx->local_invocation_ids;
2859 break;
2860 }
2861 case nir_intrinsic_load_base_instance:
2862 result = ctx->start_instance;
2863 break;
2864 case nir_intrinsic_load_sample_id:
2865 ctx->shader_info->fs.force_persample = true;
2866 result = unpack_param(ctx, ctx->ancillary, 8, 4);
2867 break;
2868 case nir_intrinsic_load_sample_pos:
2869 ctx->shader_info->fs.force_persample = true;
2870 result = load_sample_pos(ctx);
2871 break;
2872 case nir_intrinsic_load_front_face:
2873 result = ctx->front_face;
2874 break;
2875 case nir_intrinsic_load_instance_id:
2876 result = ctx->instance_id;
2877 ctx->shader_info->vs.vgpr_comp_cnt = MAX2(3,
2878 ctx->shader_info->vs.vgpr_comp_cnt);
2879 break;
2880 case nir_intrinsic_load_num_work_groups:
2881 result = ctx->num_work_groups;
2882 break;
2883 case nir_intrinsic_load_local_invocation_index:
2884 result = visit_load_local_invocation_index(ctx);
2885 break;
2886 case nir_intrinsic_load_push_constant:
2887 result = visit_load_push_constant(ctx, instr);
2888 break;
2889 case nir_intrinsic_vulkan_resource_index:
2890 result = visit_vulkan_resource_index(ctx, instr);
2891 break;
2892 case nir_intrinsic_store_ssbo:
2893 visit_store_ssbo(ctx, instr);
2894 break;
2895 case nir_intrinsic_load_ssbo:
2896 result = visit_load_buffer(ctx, instr);
2897 break;
2898 case nir_intrinsic_ssbo_atomic_add:
2899 case nir_intrinsic_ssbo_atomic_imin:
2900 case nir_intrinsic_ssbo_atomic_umin:
2901 case nir_intrinsic_ssbo_atomic_imax:
2902 case nir_intrinsic_ssbo_atomic_umax:
2903 case nir_intrinsic_ssbo_atomic_and:
2904 case nir_intrinsic_ssbo_atomic_or:
2905 case nir_intrinsic_ssbo_atomic_xor:
2906 case nir_intrinsic_ssbo_atomic_exchange:
2907 case nir_intrinsic_ssbo_atomic_comp_swap:
2908 result = visit_atomic_ssbo(ctx, instr);
2909 break;
2910 case nir_intrinsic_load_ubo:
2911 result = visit_load_ubo_buffer(ctx, instr);
2912 break;
2913 case nir_intrinsic_get_buffer_size:
2914 result = visit_get_buffer_size(ctx, instr);
2915 break;
2916 case nir_intrinsic_load_var:
2917 result = visit_load_var(ctx, instr);
2918 break;
2919 case nir_intrinsic_store_var:
2920 visit_store_var(ctx, instr);
2921 break;
2922 case nir_intrinsic_image_load:
2923 result = visit_image_load(ctx, instr);
2924 break;
2925 case nir_intrinsic_image_store:
2926 visit_image_store(ctx, instr);
2927 break;
2928 case nir_intrinsic_image_atomic_add:
2929 case nir_intrinsic_image_atomic_min:
2930 case nir_intrinsic_image_atomic_max:
2931 case nir_intrinsic_image_atomic_and:
2932 case nir_intrinsic_image_atomic_or:
2933 case nir_intrinsic_image_atomic_xor:
2934 case nir_intrinsic_image_atomic_exchange:
2935 case nir_intrinsic_image_atomic_comp_swap:
2936 result = visit_image_atomic(ctx, instr);
2937 break;
2938 case nir_intrinsic_image_size:
2939 result = visit_image_size(ctx, instr);
2940 break;
2941 case nir_intrinsic_discard:
2942 ctx->shader_info->fs.can_discard = true;
2943 ac_emit_llvm_intrinsic(&ctx->ac, "llvm.AMDGPU.kilp",
2944 ctx->voidt,
2945 NULL, 0, 0);
2946 break;
2947 case nir_intrinsic_discard_if:
2948 emit_discard_if(ctx, instr);
2949 break;
2950 case nir_intrinsic_memory_barrier:
2951 emit_waitcnt(ctx);
2952 break;
2953 case nir_intrinsic_barrier:
2954 emit_barrier(ctx);
2955 break;
2956 case nir_intrinsic_var_atomic_add:
2957 case nir_intrinsic_var_atomic_imin:
2958 case nir_intrinsic_var_atomic_umin:
2959 case nir_intrinsic_var_atomic_imax:
2960 case nir_intrinsic_var_atomic_umax:
2961 case nir_intrinsic_var_atomic_and:
2962 case nir_intrinsic_var_atomic_or:
2963 case nir_intrinsic_var_atomic_xor:
2964 case nir_intrinsic_var_atomic_exchange:
2965 case nir_intrinsic_var_atomic_comp_swap:
2966 result = visit_var_atomic(ctx, instr);
2967 break;
2968 case nir_intrinsic_interp_var_at_centroid:
2969 case nir_intrinsic_interp_var_at_sample:
2970 case nir_intrinsic_interp_var_at_offset:
2971 result = visit_interp(ctx, instr);
2972 break;
2973 default:
2974 fprintf(stderr, "Unknown intrinsic: ");
2975 nir_print_instr(&instr->instr, stderr);
2976 fprintf(stderr, "\n");
2977 break;
2978 }
2979 if (result) {
2980 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
2981 }
2982 }
2983
2984 static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
2985 nir_deref_var *deref,
2986 enum desc_type desc_type)
2987 {
2988 unsigned desc_set = deref->var->data.descriptor_set;
2989 LLVMValueRef list = ctx->descriptor_sets[desc_set];
2990 struct radv_descriptor_set_layout *layout = ctx->options->layout->set[desc_set].layout;
2991 struct radv_descriptor_set_binding_layout *binding = layout->binding + deref->var->data.binding;
2992 unsigned offset = binding->offset;
2993 unsigned stride = binding->size;
2994 unsigned type_size;
2995 LLVMBuilderRef builder = ctx->builder;
2996 LLVMTypeRef type;
2997 LLVMValueRef index = NULL;
2998
2999 assert(deref->var->data.binding < layout->binding_count);
3000
3001 switch (desc_type) {
3002 case DESC_IMAGE:
3003 type = ctx->v8i32;
3004 type_size = 32;
3005 break;
3006 case DESC_FMASK:
3007 type = ctx->v8i32;
3008 offset += 32;
3009 type_size = 32;
3010 break;
3011 case DESC_SAMPLER:
3012 type = ctx->v4i32;
3013 if (binding->type == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
3014 offset += 64;
3015
3016 type_size = 16;
3017 break;
3018 case DESC_BUFFER:
3019 type = ctx->v4i32;
3020 type_size = 16;
3021 break;
3022 default:
3023 unreachable("invalid desc_type\n");
3024 }
3025
3026 if (deref->deref.child) {
3027 nir_deref_array *child = (nir_deref_array*)deref->deref.child;
3028
3029 assert(child->deref_array_type != nir_deref_array_type_wildcard);
3030 offset += child->base_offset * stride;
3031 if (child->deref_array_type == nir_deref_array_type_indirect) {
3032 index = get_src(ctx, child->indirect);
3033 }
3034 }
3035
3036 assert(stride % type_size == 0);
3037
3038 if (!index)
3039 index = ctx->i32zero;
3040
3041 index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, stride / type_size, 0), "");
3042
3043 list = build_gep0(ctx, list, LLVMConstInt(ctx->i32, offset, 0));
3044 list = LLVMBuildPointerCast(builder, list, const_array(type, 0), "");
3045
3046 return build_indexed_load_const(ctx, list, index);
3047 }
3048
3049 static void set_tex_fetch_args(struct nir_to_llvm_context *ctx,
3050 struct ac_tex_info *tinfo,
3051 nir_tex_instr *instr,
3052 nir_texop op,
3053 LLVMValueRef res_ptr, LLVMValueRef samp_ptr,
3054 LLVMValueRef *param, unsigned count,
3055 unsigned dmask)
3056 {
3057 int num_args;
3058 unsigned is_rect = 0;
3059 bool da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE;
3060
3061 if (op == nir_texop_lod)
3062 da = false;
3063 /* Pad to power of two vector */
3064 while (count < util_next_power_of_two(count))
3065 param[count++] = LLVMGetUndef(ctx->i32);
3066
3067 if (count > 1)
3068 tinfo->args[0] = ac_build_gather_values(&ctx->ac, param, count);
3069 else
3070 tinfo->args[0] = param[0];
3071
3072 tinfo->args[1] = res_ptr;
3073 num_args = 2;
3074
3075 if (op == nir_texop_txf ||
3076 op == nir_texop_txf_ms ||
3077 op == nir_texop_query_levels ||
3078 op == nir_texop_texture_samples ||
3079 op == nir_texop_txs)
3080 tinfo->dst_type = ctx->v4i32;
3081 else {
3082 tinfo->dst_type = ctx->v4f32;
3083 tinfo->args[num_args++] = samp_ptr;
3084 }
3085
3086 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF && op == nir_texop_txf) {
3087 tinfo->args[0] = res_ptr;
3088 tinfo->args[1] = LLVMConstInt(ctx->i32, 0, false);
3089 tinfo->args[2] = param[0];
3090 tinfo->arg_count = 3;
3091 return;
3092 }
3093
3094 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, dmask, 0);
3095 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, is_rect, 0); /* unorm */
3096 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
3097 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, da ? 1 : 0, 0);
3098 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
3099 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
3100 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
3101 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
3102
3103 tinfo->arg_count = num_args;
3104 }
3105
3106 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3107 *
3108 * SI-CI:
3109 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3110 * filtering manually. The driver sets img7 to a mask clearing
3111 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3112 * s_and_b32 samp0, samp0, img7
3113 *
3114 * VI:
3115 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3116 */
3117 static LLVMValueRef sici_fix_sampler_aniso(struct nir_to_llvm_context *ctx,
3118 LLVMValueRef res, LLVMValueRef samp)
3119 {
3120 LLVMBuilderRef builder = ctx->builder;
3121 LLVMValueRef img7, samp0;
3122
3123 if (ctx->options->chip_class >= VI)
3124 return samp;
3125
3126 img7 = LLVMBuildExtractElement(builder, res,
3127 LLVMConstInt(ctx->i32, 7, 0), "");
3128 samp0 = LLVMBuildExtractElement(builder, samp,
3129 LLVMConstInt(ctx->i32, 0, 0), "");
3130 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3131 return LLVMBuildInsertElement(builder, samp, samp0,
3132 LLVMConstInt(ctx->i32, 0, 0), "");
3133 }
3134
3135 static void tex_fetch_ptrs(struct nir_to_llvm_context *ctx,
3136 nir_tex_instr *instr,
3137 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3138 LLVMValueRef *fmask_ptr)
3139 {
3140 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF)
3141 *res_ptr = get_sampler_desc(ctx, instr->texture, DESC_BUFFER);
3142 else
3143 *res_ptr = get_sampler_desc(ctx, instr->texture, DESC_IMAGE);
3144 if (samp_ptr) {
3145 if (instr->sampler)
3146 *samp_ptr = get_sampler_desc(ctx, instr->sampler, DESC_SAMPLER);
3147 else
3148 *samp_ptr = get_sampler_desc(ctx, instr->texture, DESC_SAMPLER);
3149 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3150 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3151 }
3152 if (fmask_ptr && !instr->sampler && (instr->op == nir_texop_txf_ms ||
3153 instr->op == nir_texop_samples_identical))
3154 *fmask_ptr = get_sampler_desc(ctx, instr->texture, DESC_FMASK);
3155 }
3156
3157 static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
3158 {
3159 LLVMValueRef result = NULL;
3160 struct ac_tex_info tinfo = { 0 };
3161 unsigned dmask = 0xf;
3162 LLVMValueRef address[16];
3163 LLVMValueRef coords[5];
3164 LLVMValueRef coord = NULL, lod = NULL, comparator = NULL;
3165 LLVMValueRef bias = NULL, offsets = NULL;
3166 LLVMValueRef res_ptr, samp_ptr, fmask_ptr = NULL, sample_index = NULL;
3167 LLVMValueRef ddx = NULL, ddy = NULL;
3168 LLVMValueRef derivs[6];
3169 unsigned chan, count = 0;
3170 unsigned const_src = 0, num_deriv_comp = 0;
3171
3172 tex_fetch_ptrs(ctx, instr, &res_ptr, &samp_ptr, &fmask_ptr);
3173
3174 for (unsigned i = 0; i < instr->num_srcs; i++) {
3175 switch (instr->src[i].src_type) {
3176 case nir_tex_src_coord:
3177 coord = get_src(ctx, instr->src[i].src);
3178 break;
3179 case nir_tex_src_projector:
3180 break;
3181 case nir_tex_src_comparator:
3182 comparator = get_src(ctx, instr->src[i].src);
3183 break;
3184 case nir_tex_src_offset:
3185 offsets = get_src(ctx, instr->src[i].src);
3186 const_src = i;
3187 break;
3188 case nir_tex_src_bias:
3189 bias = get_src(ctx, instr->src[i].src);
3190 break;
3191 case nir_tex_src_lod:
3192 lod = get_src(ctx, instr->src[i].src);
3193 break;
3194 case nir_tex_src_ms_index:
3195 sample_index = get_src(ctx, instr->src[i].src);
3196 break;
3197 case nir_tex_src_ms_mcs:
3198 break;
3199 case nir_tex_src_ddx:
3200 ddx = get_src(ctx, instr->src[i].src);
3201 num_deriv_comp = instr->src[i].src.ssa->num_components;
3202 break;
3203 case nir_tex_src_ddy:
3204 ddy = get_src(ctx, instr->src[i].src);
3205 break;
3206 case nir_tex_src_texture_offset:
3207 case nir_tex_src_sampler_offset:
3208 case nir_tex_src_plane:
3209 default:
3210 break;
3211 }
3212 }
3213
3214 if (instr->op == nir_texop_texture_samples) {
3215 LLVMValueRef res, samples, is_msaa;
3216 res = LLVMBuildBitCast(ctx->builder, res_ptr, ctx->v8i32, "");
3217 samples = LLVMBuildExtractElement(ctx->builder, res,
3218 LLVMConstInt(ctx->i32, 3, false), "");
3219 is_msaa = LLVMBuildLShr(ctx->builder, samples,
3220 LLVMConstInt(ctx->i32, 28, false), "");
3221 is_msaa = LLVMBuildAnd(ctx->builder, is_msaa,
3222 LLVMConstInt(ctx->i32, 0xe, false), "");
3223 is_msaa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, is_msaa,
3224 LLVMConstInt(ctx->i32, 0xe, false), "");
3225
3226 samples = LLVMBuildLShr(ctx->builder, samples,
3227 LLVMConstInt(ctx->i32, 16, false), "");
3228 samples = LLVMBuildAnd(ctx->builder, samples,
3229 LLVMConstInt(ctx->i32, 0xf, false), "");
3230 samples = LLVMBuildShl(ctx->builder, ctx->i32one,
3231 samples, "");
3232 samples = LLVMBuildSelect(ctx->builder, is_msaa, samples,
3233 ctx->i32one, "");
3234 result = samples;
3235 goto write_result;
3236 }
3237
3238 if (coord)
3239 for (chan = 0; chan < instr->coord_components; chan++)
3240 coords[chan] = llvm_extract_elem(ctx, coord, chan);
3241
3242 if (offsets && instr->op != nir_texop_txf) {
3243 LLVMValueRef offset[3], pack;
3244 for (chan = 0; chan < 3; ++chan)
3245 offset[chan] = ctx->i32zero;
3246
3247 tinfo.has_offset = true;
3248 for (chan = 0; chan < get_llvm_num_components(offsets); chan++) {
3249 offset[chan] = llvm_extract_elem(ctx, offsets, chan);
3250 offset[chan] = LLVMBuildAnd(ctx->builder, offset[chan],
3251 LLVMConstInt(ctx->i32, 0x3f, false), "");
3252 if (chan)
3253 offset[chan] = LLVMBuildShl(ctx->builder, offset[chan],
3254 LLVMConstInt(ctx->i32, chan * 8, false), "");
3255 }
3256 pack = LLVMBuildOr(ctx->builder, offset[0], offset[1], "");
3257 pack = LLVMBuildOr(ctx->builder, pack, offset[2], "");
3258 address[count++] = pack;
3259
3260 }
3261 /* pack LOD bias value */
3262 if (instr->op == nir_texop_txb && bias) {
3263 address[count++] = bias;
3264 }
3265
3266 /* Pack depth comparison value */
3267 if (instr->is_shadow && comparator) {
3268 address[count++] = llvm_extract_elem(ctx, comparator, 0);
3269 }
3270
3271 /* pack derivatives */
3272 if (ddx || ddy) {
3273 switch (instr->sampler_dim) {
3274 case GLSL_SAMPLER_DIM_3D:
3275 case GLSL_SAMPLER_DIM_CUBE:
3276 num_deriv_comp = 3;
3277 break;
3278 case GLSL_SAMPLER_DIM_2D:
3279 default:
3280 num_deriv_comp = 2;
3281 break;
3282 case GLSL_SAMPLER_DIM_1D:
3283 num_deriv_comp = 1;
3284 break;
3285 }
3286
3287 for (unsigned i = 0; i < num_deriv_comp; i++) {
3288 derivs[i * 2] = to_float(ctx, llvm_extract_elem(ctx, ddx, i));
3289 derivs[i * 2 + 1] = to_float(ctx, llvm_extract_elem(ctx, ddy, i));
3290 }
3291 }
3292
3293 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && coord) {
3294 for (chan = 0; chan < instr->coord_components; chan++)
3295 coords[chan] = to_float(ctx, coords[chan]);
3296 if (instr->coord_components == 3)
3297 coords[3] = LLVMGetUndef(ctx->f32);
3298 ac_prepare_cube_coords(&ctx->ac,
3299 instr->op == nir_texop_txd, instr->is_array,
3300 coords, derivs);
3301 if (num_deriv_comp)
3302 num_deriv_comp--;
3303 }
3304
3305 if (ddx || ddy) {
3306 for (unsigned i = 0; i < num_deriv_comp * 2; i++)
3307 address[count++] = derivs[i];
3308 }
3309
3310 /* Pack texture coordinates */
3311 if (coord) {
3312 address[count++] = coords[0];
3313 if (instr->coord_components > 1)
3314 address[count++] = coords[1];
3315 if (instr->coord_components > 2) {
3316 /* This seems like a bit of a hack - but it passes Vulkan CTS with it */
3317 if (instr->sampler_dim != GLSL_SAMPLER_DIM_3D && instr->op != nir_texop_txf) {
3318 coords[2] = to_float(ctx, coords[2]);
3319 coords[2] = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.rint.f32", ctx->f32, &coords[2],
3320 1, 0);
3321 coords[2] = to_integer(ctx, coords[2]);
3322 }
3323 address[count++] = coords[2];
3324 }
3325 }
3326
3327 /* Pack LOD */
3328 if ((instr->op == nir_texop_txl || instr->op == nir_texop_txf) && lod) {
3329 address[count++] = lod;
3330 } else if (instr->op == nir_texop_txf_ms && sample_index) {
3331 address[count++] = sample_index;
3332 } else if(instr->op == nir_texop_txs) {
3333 count = 0;
3334 if (lod)
3335 address[count++] = lod;
3336 else
3337 address[count++] = ctx->i32zero;
3338 }
3339
3340 for (chan = 0; chan < count; chan++) {
3341 address[chan] = LLVMBuildBitCast(ctx->builder,
3342 address[chan], ctx->i32, "");
3343 }
3344
3345 if (instr->op == nir_texop_samples_identical) {
3346 LLVMValueRef txf_address[4];
3347 struct ac_tex_info txf_info = { 0 };
3348 unsigned txf_count = count;
3349 memcpy(txf_address, address, sizeof(txf_address));
3350
3351 if (!instr->is_array)
3352 txf_address[2] = ctx->i32zero;
3353 txf_address[3] = ctx->i32zero;
3354
3355 set_tex_fetch_args(ctx, &txf_info, instr, nir_texop_txf,
3356 fmask_ptr, NULL,
3357 txf_address, txf_count, 0xf);
3358
3359 result = build_tex_intrinsic(ctx, instr, &txf_info);
3360
3361 result = LLVMBuildExtractElement(ctx->builder, result, ctx->i32zero, "");
3362 result = emit_int_cmp(ctx, LLVMIntEQ, result, ctx->i32zero);
3363 goto write_result;
3364 }
3365
3366 /* Adjust the sample index according to FMASK.
3367 *
3368 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3369 * which is the identity mapping. Each nibble says which physical sample
3370 * should be fetched to get that sample.
3371 *
3372 * For example, 0x11111100 means there are only 2 samples stored and
3373 * the second sample covers 3/4 of the pixel. When reading samples 0
3374 * and 1, return physical sample 0 (determined by the first two 0s
3375 * in FMASK), otherwise return physical sample 1.
3376 *
3377 * The sample index should be adjusted as follows:
3378 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
3379 */
3380 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS) {
3381 LLVMValueRef txf_address[4];
3382 struct ac_tex_info txf_info = { 0 };
3383 unsigned txf_count = count;
3384 memcpy(txf_address, address, sizeof(txf_address));
3385
3386 if (!instr->is_array)
3387 txf_address[2] = ctx->i32zero;
3388 txf_address[3] = ctx->i32zero;
3389
3390 set_tex_fetch_args(ctx, &txf_info, instr, nir_texop_txf,
3391 fmask_ptr, NULL,
3392 txf_address, txf_count, 0xf);
3393
3394 result = build_tex_intrinsic(ctx, instr, &txf_info);
3395 LLVMValueRef four = LLVMConstInt(ctx->i32, 4, false);
3396 LLVMValueRef F = LLVMConstInt(ctx->i32, 0xf, false);
3397
3398 LLVMValueRef fmask = LLVMBuildExtractElement(ctx->builder,
3399 result,
3400 ctx->i32zero, "");
3401
3402 unsigned sample_chan = instr->is_array ? 3 : 2;
3403
3404 LLVMValueRef sample_index4 =
3405 LLVMBuildMul(ctx->builder, address[sample_chan], four, "");
3406 LLVMValueRef shifted_fmask =
3407 LLVMBuildLShr(ctx->builder, fmask, sample_index4, "");
3408 LLVMValueRef final_sample =
3409 LLVMBuildAnd(ctx->builder, shifted_fmask, F, "");
3410
3411 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3412 * resource descriptor is 0 (invalid),
3413 */
3414 LLVMValueRef fmask_desc =
3415 LLVMBuildBitCast(ctx->builder, fmask_ptr,
3416 ctx->v8i32, "");
3417
3418 LLVMValueRef fmask_word1 =
3419 LLVMBuildExtractElement(ctx->builder, fmask_desc,
3420 ctx->i32one, "");
3421
3422 LLVMValueRef word1_is_nonzero =
3423 LLVMBuildICmp(ctx->builder, LLVMIntNE,
3424 fmask_word1, ctx->i32zero, "");
3425
3426 /* Replace the MSAA sample index. */
3427 address[sample_chan] =
3428 LLVMBuildSelect(ctx->builder, word1_is_nonzero,
3429 final_sample, address[sample_chan], "");
3430 }
3431
3432 if (offsets && instr->op == nir_texop_txf) {
3433 nir_const_value *const_offset =
3434 nir_src_as_const_value(instr->src[const_src].src);
3435 int num_offsets = instr->src[const_src].src.ssa->num_components;
3436 assert(const_offset);
3437 num_offsets = MIN2(num_offsets, instr->coord_components);
3438 if (num_offsets > 2)
3439 address[2] = LLVMBuildAdd(ctx->builder,
3440 address[2], LLVMConstInt(ctx->i32, const_offset->i32[2], false), "");
3441 if (num_offsets > 1)
3442 address[1] = LLVMBuildAdd(ctx->builder,
3443 address[1], LLVMConstInt(ctx->i32, const_offset->i32[1], false), "");
3444 address[0] = LLVMBuildAdd(ctx->builder,
3445 address[0], LLVMConstInt(ctx->i32, const_offset->i32[0], false), "");
3446
3447 }
3448
3449 /* TODO TG4 support */
3450 if (instr->op == nir_texop_tg4) {
3451 if (instr->is_shadow)
3452 dmask = 1;
3453 else
3454 dmask = 1 << instr->component;
3455 }
3456 set_tex_fetch_args(ctx, &tinfo, instr, instr->op,
3457 res_ptr, samp_ptr, address, count, dmask);
3458
3459 result = build_tex_intrinsic(ctx, instr, &tinfo);
3460
3461 if (instr->op == nir_texop_query_levels)
3462 result = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, 3, false), "");
3463 else if (instr->is_shadow && instr->op != nir_texop_txs && instr->op != nir_texop_lod && instr->op != nir_texop_tg4)
3464 result = LLVMBuildExtractElement(ctx->builder, result, ctx->i32zero, "");
3465 else if (instr->op == nir_texop_txs &&
3466 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3467 instr->is_array) {
3468 LLVMValueRef two = LLVMConstInt(ctx->i32, 2, false);
3469 LLVMValueRef six = LLVMConstInt(ctx->i32, 6, false);
3470 LLVMValueRef z = LLVMBuildExtractElement(ctx->builder, result, two, "");
3471 z = LLVMBuildSDiv(ctx->builder, z, six, "");
3472 result = LLVMBuildInsertElement(ctx->builder, result, z, two, "");
3473 } else if (instr->dest.ssa.num_components != 4)
3474 result = trim_vector(ctx, result, instr->dest.ssa.num_components);
3475
3476 write_result:
3477 if (result) {
3478 assert(instr->dest.is_ssa);
3479 result = to_integer(ctx, result);
3480 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
3481 }
3482 }
3483
3484
3485 static void visit_phi(struct nir_to_llvm_context *ctx, nir_phi_instr *instr)
3486 {
3487 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3488 LLVMValueRef result = LLVMBuildPhi(ctx->builder, type, "");
3489
3490 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
3491 _mesa_hash_table_insert(ctx->phis, instr, result);
3492 }
3493
3494 static void visit_post_phi(struct nir_to_llvm_context *ctx,
3495 nir_phi_instr *instr,
3496 LLVMValueRef llvm_phi)
3497 {
3498 nir_foreach_phi_src(src, instr) {
3499 LLVMBasicBlockRef block = get_block(ctx, src->pred);
3500 LLVMValueRef llvm_src = get_src(ctx, src->src);
3501
3502 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
3503 }
3504 }
3505
3506 static void phi_post_pass(struct nir_to_llvm_context *ctx)
3507 {
3508 struct hash_entry *entry;
3509 hash_table_foreach(ctx->phis, entry) {
3510 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
3511 (LLVMValueRef)entry->data);
3512 }
3513 }
3514
3515
3516 static void visit_ssa_undef(struct nir_to_llvm_context *ctx,
3517 nir_ssa_undef_instr *instr)
3518 {
3519 unsigned num_components = instr->def.num_components;
3520 LLVMValueRef undef;
3521
3522 if (num_components == 1)
3523 undef = LLVMGetUndef(ctx->i32);
3524 else {
3525 undef = LLVMGetUndef(LLVMVectorType(ctx->i32, num_components));
3526 }
3527 _mesa_hash_table_insert(ctx->defs, &instr->def, undef);
3528 }
3529
3530 static void visit_jump(struct nir_to_llvm_context *ctx,
3531 nir_jump_instr *instr)
3532 {
3533 switch (instr->type) {
3534 case nir_jump_break:
3535 LLVMBuildBr(ctx->builder, ctx->break_block);
3536 LLVMClearInsertionPosition(ctx->builder);
3537 break;
3538 case nir_jump_continue:
3539 LLVMBuildBr(ctx->builder, ctx->continue_block);
3540 LLVMClearInsertionPosition(ctx->builder);
3541 break;
3542 default:
3543 fprintf(stderr, "Unknown NIR jump instr: ");
3544 nir_print_instr(&instr->instr, stderr);
3545 fprintf(stderr, "\n");
3546 abort();
3547 }
3548 }
3549
3550 static void visit_cf_list(struct nir_to_llvm_context *ctx,
3551 struct exec_list *list);
3552
3553 static void visit_block(struct nir_to_llvm_context *ctx, nir_block *block)
3554 {
3555 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->builder);
3556 nir_foreach_instr(instr, block)
3557 {
3558 switch (instr->type) {
3559 case nir_instr_type_alu:
3560 visit_alu(ctx, nir_instr_as_alu(instr));
3561 break;
3562 case nir_instr_type_load_const:
3563 visit_load_const(ctx, nir_instr_as_load_const(instr));
3564 break;
3565 case nir_instr_type_intrinsic:
3566 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
3567 break;
3568 case nir_instr_type_tex:
3569 visit_tex(ctx, nir_instr_as_tex(instr));
3570 break;
3571 case nir_instr_type_phi:
3572 visit_phi(ctx, nir_instr_as_phi(instr));
3573 break;
3574 case nir_instr_type_ssa_undef:
3575 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
3576 break;
3577 case nir_instr_type_jump:
3578 visit_jump(ctx, nir_instr_as_jump(instr));
3579 break;
3580 default:
3581 fprintf(stderr, "Unknown NIR instr type: ");
3582 nir_print_instr(instr, stderr);
3583 fprintf(stderr, "\n");
3584 abort();
3585 }
3586 }
3587
3588 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
3589 }
3590
3591 static void visit_if(struct nir_to_llvm_context *ctx, nir_if *if_stmt)
3592 {
3593 LLVMValueRef value = get_src(ctx, if_stmt->condition);
3594
3595 LLVMBasicBlockRef merge_block =
3596 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3597 LLVMBasicBlockRef if_block =
3598 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3599 LLVMBasicBlockRef else_block = merge_block;
3600 if (!exec_list_is_empty(&if_stmt->else_list))
3601 else_block = LLVMAppendBasicBlockInContext(
3602 ctx->context, ctx->main_function, "");
3603
3604 LLVMValueRef cond = LLVMBuildICmp(ctx->builder, LLVMIntNE, value,
3605 LLVMConstInt(ctx->i32, 0, false), "");
3606 LLVMBuildCondBr(ctx->builder, cond, if_block, else_block);
3607
3608 LLVMPositionBuilderAtEnd(ctx->builder, if_block);
3609 visit_cf_list(ctx, &if_stmt->then_list);
3610 if (LLVMGetInsertBlock(ctx->builder))
3611 LLVMBuildBr(ctx->builder, merge_block);
3612
3613 if (!exec_list_is_empty(&if_stmt->else_list)) {
3614 LLVMPositionBuilderAtEnd(ctx->builder, else_block);
3615 visit_cf_list(ctx, &if_stmt->else_list);
3616 if (LLVMGetInsertBlock(ctx->builder))
3617 LLVMBuildBr(ctx->builder, merge_block);
3618 }
3619
3620 LLVMPositionBuilderAtEnd(ctx->builder, merge_block);
3621 }
3622
3623 static void visit_loop(struct nir_to_llvm_context *ctx, nir_loop *loop)
3624 {
3625 LLVMBasicBlockRef continue_parent = ctx->continue_block;
3626 LLVMBasicBlockRef break_parent = ctx->break_block;
3627
3628 ctx->continue_block =
3629 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3630 ctx->break_block =
3631 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3632
3633 LLVMBuildBr(ctx->builder, ctx->continue_block);
3634 LLVMPositionBuilderAtEnd(ctx->builder, ctx->continue_block);
3635 visit_cf_list(ctx, &loop->body);
3636
3637 if (LLVMGetInsertBlock(ctx->builder))
3638 LLVMBuildBr(ctx->builder, ctx->continue_block);
3639 LLVMPositionBuilderAtEnd(ctx->builder, ctx->break_block);
3640
3641 ctx->continue_block = continue_parent;
3642 ctx->break_block = break_parent;
3643 }
3644
3645 static void visit_cf_list(struct nir_to_llvm_context *ctx,
3646 struct exec_list *list)
3647 {
3648 foreach_list_typed(nir_cf_node, node, node, list)
3649 {
3650 switch (node->type) {
3651 case nir_cf_node_block:
3652 visit_block(ctx, nir_cf_node_as_block(node));
3653 break;
3654
3655 case nir_cf_node_if:
3656 visit_if(ctx, nir_cf_node_as_if(node));
3657 break;
3658
3659 case nir_cf_node_loop:
3660 visit_loop(ctx, nir_cf_node_as_loop(node));
3661 break;
3662
3663 default:
3664 assert(0);
3665 }
3666 }
3667 }
3668
3669 static void
3670 handle_vs_input_decl(struct nir_to_llvm_context *ctx,
3671 struct nir_variable *variable)
3672 {
3673 LLVMValueRef t_list_ptr = ctx->vertex_buffers;
3674 LLVMValueRef t_offset;
3675 LLVMValueRef t_list;
3676 LLVMValueRef args[3];
3677 LLVMValueRef input;
3678 LLVMValueRef buffer_index;
3679 int index = variable->data.location - VERT_ATTRIB_GENERIC0;
3680 int idx = variable->data.location;
3681 unsigned attrib_count = glsl_count_attribute_slots(variable->type, true);
3682
3683 variable->data.driver_location = idx * 4;
3684
3685 if (ctx->options->key.vs.instance_rate_inputs & (1u << index)) {
3686 buffer_index = LLVMBuildAdd(ctx->builder, ctx->instance_id,
3687 ctx->start_instance, "");
3688 ctx->shader_info->vs.vgpr_comp_cnt = MAX2(3,
3689 ctx->shader_info->vs.vgpr_comp_cnt);
3690 } else
3691 buffer_index = LLVMBuildAdd(ctx->builder, ctx->vertex_id,
3692 ctx->base_vertex, "");
3693
3694 for (unsigned i = 0; i < attrib_count; ++i, ++idx) {
3695 t_offset = LLVMConstInt(ctx->i32, index + i, false);
3696
3697 t_list = build_indexed_load_const(ctx, t_list_ptr, t_offset);
3698 args[0] = t_list;
3699 args[1] = LLVMConstInt(ctx->i32, 0, false);
3700 args[2] = buffer_index;
3701 input = ac_emit_llvm_intrinsic(&ctx->ac,
3702 "llvm.SI.vs.load.input", ctx->v4f32, args, 3,
3703 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND);
3704
3705 for (unsigned chan = 0; chan < 4; chan++) {
3706 LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
3707 ctx->inputs[radeon_llvm_reg_index_soa(idx, chan)] =
3708 to_integer(ctx, LLVMBuildExtractElement(ctx->builder,
3709 input, llvm_chan, ""));
3710 }
3711 }
3712 }
3713
3714
3715 static void interp_fs_input(struct nir_to_llvm_context *ctx,
3716 unsigned attr,
3717 LLVMValueRef interp_param,
3718 LLVMValueRef prim_mask,
3719 LLVMValueRef result[4])
3720 {
3721 const char *intr_name;
3722 LLVMValueRef attr_number;
3723 unsigned chan;
3724
3725 attr_number = LLVMConstInt(ctx->i32, attr, false);
3726
3727 /* fs.constant returns the param from the middle vertex, so it's not
3728 * really useful for flat shading. It's meant to be used for custom
3729 * interpolation (but the intrinsic can't fetch from the other two
3730 * vertices).
3731 *
3732 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
3733 * to do the right thing. The only reason we use fs.constant is that
3734 * fs.interp cannot be used on integers, because they can be equal
3735 * to NaN.
3736 */
3737 intr_name = interp_param ? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
3738
3739 for (chan = 0; chan < 4; chan++) {
3740 LLVMValueRef args[4];
3741 LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
3742
3743 args[0] = llvm_chan;
3744 args[1] = attr_number;
3745 args[2] = prim_mask;
3746 args[3] = interp_param;
3747 result[chan] = ac_emit_llvm_intrinsic(&ctx->ac, intr_name,
3748 ctx->f32, args, args[3] ? 4 : 3,
3749 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND);
3750 }
3751 }
3752
3753 static void
3754 handle_fs_input_decl(struct nir_to_llvm_context *ctx,
3755 struct nir_variable *variable)
3756 {
3757 int idx = variable->data.location;
3758 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3759 LLVMValueRef interp;
3760
3761 variable->data.driver_location = idx * 4;
3762 ctx->input_mask |= ((1ull << attrib_count) - 1) << variable->data.location;
3763
3764 if (glsl_get_base_type(glsl_without_array(variable->type)) == GLSL_TYPE_FLOAT) {
3765 unsigned interp_type;
3766 if (variable->data.sample) {
3767 interp_type = INTERP_SAMPLE;
3768 ctx->shader_info->fs.force_persample = true;
3769 } else if (variable->data.centroid)
3770 interp_type = INTERP_CENTROID;
3771 else
3772 interp_type = INTERP_CENTER;
3773
3774 interp = lookup_interp_param(ctx, variable->data.interpolation, interp_type);
3775 } else
3776 interp = NULL;
3777
3778 for (unsigned i = 0; i < attrib_count; ++i)
3779 ctx->inputs[radeon_llvm_reg_index_soa(idx + i, 0)] = interp;
3780
3781 }
3782
3783 static void
3784 handle_shader_input_decl(struct nir_to_llvm_context *ctx,
3785 struct nir_variable *variable)
3786 {
3787 switch (ctx->stage) {
3788 case MESA_SHADER_VERTEX:
3789 handle_vs_input_decl(ctx, variable);
3790 break;
3791 case MESA_SHADER_FRAGMENT:
3792 handle_fs_input_decl(ctx, variable);
3793 break;
3794 default:
3795 break;
3796 }
3797
3798 }
3799
3800 static void
3801 handle_fs_inputs_pre(struct nir_to_llvm_context *ctx,
3802 struct nir_shader *nir)
3803 {
3804 unsigned index = 0;
3805 for (unsigned i = 0; i < RADEON_LLVM_MAX_INPUTS; ++i) {
3806 LLVMValueRef interp_param;
3807 LLVMValueRef *inputs = ctx->inputs +radeon_llvm_reg_index_soa(i, 0);
3808
3809 if (!(ctx->input_mask & (1ull << i)))
3810 continue;
3811
3812 if (i >= VARYING_SLOT_VAR0 || i == VARYING_SLOT_PNTC) {
3813 interp_param = *inputs;
3814 interp_fs_input(ctx, index, interp_param, ctx->prim_mask,
3815 inputs);
3816
3817 if (!interp_param)
3818 ctx->shader_info->fs.flat_shaded_mask |= 1u << index;
3819 ++index;
3820 } else if (i == VARYING_SLOT_POS) {
3821 for(int i = 0; i < 3; ++i)
3822 inputs[i] = ctx->frag_pos[i];
3823
3824 inputs[3] = ac_emit_fdiv(&ctx->ac, ctx->f32one, ctx->frag_pos[3]);
3825 }
3826 }
3827 ctx->shader_info->fs.num_interp = index;
3828 if (ctx->input_mask & (1 << VARYING_SLOT_PNTC))
3829 ctx->shader_info->fs.has_pcoord = true;
3830 ctx->shader_info->fs.input_mask = ctx->input_mask >> VARYING_SLOT_VAR0;
3831 }
3832
3833 static LLVMValueRef
3834 ac_build_alloca(struct nir_to_llvm_context *ctx,
3835 LLVMTypeRef type,
3836 const char *name)
3837 {
3838 LLVMBuilderRef builder = ctx->builder;
3839 LLVMBasicBlockRef current_block = LLVMGetInsertBlock(builder);
3840 LLVMValueRef function = LLVMGetBasicBlockParent(current_block);
3841 LLVMBasicBlockRef first_block = LLVMGetEntryBasicBlock(function);
3842 LLVMValueRef first_instr = LLVMGetFirstInstruction(first_block);
3843 LLVMBuilderRef first_builder = LLVMCreateBuilderInContext(ctx->context);
3844 LLVMValueRef res;
3845
3846 if (first_instr) {
3847 LLVMPositionBuilderBefore(first_builder, first_instr);
3848 } else {
3849 LLVMPositionBuilderAtEnd(first_builder, first_block);
3850 }
3851
3852 res = LLVMBuildAlloca(first_builder, type, name);
3853 LLVMBuildStore(builder, LLVMConstNull(type), res);
3854
3855 LLVMDisposeBuilder(first_builder);
3856
3857 return res;
3858 }
3859
3860 static LLVMValueRef si_build_alloca_undef(struct nir_to_llvm_context *ctx,
3861 LLVMTypeRef type,
3862 const char *name)
3863 {
3864 LLVMValueRef ptr = ac_build_alloca(ctx, type, name);
3865 LLVMBuildStore(ctx->builder, LLVMGetUndef(type), ptr);
3866 return ptr;
3867 }
3868
3869 static void
3870 handle_shader_output_decl(struct nir_to_llvm_context *ctx,
3871 struct nir_variable *variable)
3872 {
3873 int idx = variable->data.location + variable->data.index;
3874 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3875
3876 variable->data.driver_location = idx * 4;
3877
3878 if (ctx->stage == MESA_SHADER_VERTEX) {
3879
3880 if (idx == VARYING_SLOT_CLIP_DIST0 ||
3881 idx == VARYING_SLOT_CULL_DIST0) {
3882 int length = glsl_get_length(variable->type);
3883 if (idx == VARYING_SLOT_CLIP_DIST0) {
3884 ctx->shader_info->vs.clip_dist_mask = (1 << length) - 1;
3885 ctx->num_clips = length;
3886 } else if (idx == VARYING_SLOT_CULL_DIST0) {
3887 ctx->shader_info->vs.cull_dist_mask = (1 << length) - 1;
3888 ctx->num_culls = length;
3889 }
3890 if (length > 4)
3891 attrib_count = 2;
3892 else
3893 attrib_count = 1;
3894 }
3895 }
3896
3897 for (unsigned i = 0; i < attrib_count; ++i) {
3898 for (unsigned chan = 0; chan < 4; chan++) {
3899 ctx->outputs[radeon_llvm_reg_index_soa(idx + i, chan)] =
3900 si_build_alloca_undef(ctx, ctx->f32, "");
3901 }
3902 }
3903 ctx->output_mask |= ((1ull << attrib_count) - 1) << idx;
3904 }
3905
3906 static void
3907 setup_locals(struct nir_to_llvm_context *ctx,
3908 struct nir_function *func)
3909 {
3910 int i, j;
3911 ctx->num_locals = 0;
3912 nir_foreach_variable(variable, &func->impl->locals) {
3913 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3914 variable->data.driver_location = ctx->num_locals * 4;
3915 ctx->num_locals += attrib_count;
3916 }
3917 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
3918 if (!ctx->locals)
3919 return;
3920
3921 for (i = 0; i < ctx->num_locals; i++) {
3922 for (j = 0; j < 4; j++) {
3923 ctx->locals[i * 4 + j] =
3924 si_build_alloca_undef(ctx, ctx->f32, "temp");
3925 }
3926 }
3927 }
3928
3929 static LLVMValueRef
3930 emit_float_saturate(struct nir_to_llvm_context *ctx, LLVMValueRef v, float lo, float hi)
3931 {
3932 v = to_float(ctx, v);
3933 v = emit_intrin_2f_param(ctx, "llvm.maxnum.f32", v, LLVMConstReal(ctx->f32, lo));
3934 return emit_intrin_2f_param(ctx, "llvm.minnum.f32", v, LLVMConstReal(ctx->f32, hi));
3935 }
3936
3937
3938 static LLVMValueRef emit_pack_int16(struct nir_to_llvm_context *ctx,
3939 LLVMValueRef src0, LLVMValueRef src1)
3940 {
3941 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
3942 LLVMValueRef comp[2];
3943
3944 comp[0] = LLVMBuildAnd(ctx->builder, src0, LLVMConstInt(ctx-> i32, 65535, 0), "");
3945 comp[1] = LLVMBuildAnd(ctx->builder, src1, LLVMConstInt(ctx-> i32, 65535, 0), "");
3946 comp[1] = LLVMBuildShl(ctx->builder, comp[1], const16, "");
3947 return LLVMBuildOr(ctx->builder, comp[0], comp[1], "");
3948 }
3949
3950 /* Initialize arguments for the shader export intrinsic */
3951 static void
3952 si_llvm_init_export_args(struct nir_to_llvm_context *ctx,
3953 LLVMValueRef *values,
3954 unsigned target,
3955 LLVMValueRef *args)
3956 {
3957 /* Default is 0xf. Adjusted below depending on the format. */
3958 args[0] = LLVMConstInt(ctx->i32, target != V_008DFC_SQ_EXP_NULL ? 0xf : 0, false);
3959 /* Specify whether the EXEC mask represents the valid mask */
3960 args[1] = LLVMConstInt(ctx->i32, 0, false);
3961
3962 /* Specify whether this is the last export */
3963 args[2] = LLVMConstInt(ctx->i32, 0, false);
3964 /* Specify the target we are exporting */
3965 args[3] = LLVMConstInt(ctx->i32, target, false);
3966
3967 args[4] = LLVMConstInt(ctx->i32, 0, false); /* COMPR flag */
3968 args[5] = LLVMGetUndef(ctx->f32);
3969 args[6] = LLVMGetUndef(ctx->f32);
3970 args[7] = LLVMGetUndef(ctx->f32);
3971 args[8] = LLVMGetUndef(ctx->f32);
3972
3973 if (!values)
3974 return;
3975
3976 if (ctx->stage == MESA_SHADER_FRAGMENT && target >= V_008DFC_SQ_EXP_MRT) {
3977 LLVMValueRef val[4];
3978 unsigned index = target - V_008DFC_SQ_EXP_MRT;
3979 unsigned col_format = (ctx->options->key.fs.col_format >> (4 * index)) & 0xf;
3980 bool is_int8 = (ctx->options->key.fs.is_int8 >> index) & 1;
3981
3982 switch(col_format) {
3983 case V_028714_SPI_SHADER_ZERO:
3984 args[0] = LLVMConstInt(ctx->i32, 0x0, 0);
3985 args[3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_NULL, 0);
3986 break;
3987
3988 case V_028714_SPI_SHADER_32_R:
3989 args[0] = LLVMConstInt(ctx->i32, 0x1, 0);
3990 args[5] = values[0];
3991 break;
3992
3993 case V_028714_SPI_SHADER_32_GR:
3994 args[0] = LLVMConstInt(ctx->i32, 0x3, 0);
3995 args[5] = values[0];
3996 args[6] = values[1];
3997 break;
3998
3999 case V_028714_SPI_SHADER_32_AR:
4000 args[0] = LLVMConstInt(ctx->i32, 0x9, 0);
4001 args[5] = values[0];
4002 args[8] = values[3];
4003 break;
4004
4005 case V_028714_SPI_SHADER_FP16_ABGR:
4006 args[4] = ctx->i32one;
4007
4008 for (unsigned chan = 0; chan < 2; chan++) {
4009 LLVMValueRef pack_args[2] = {
4010 values[2 * chan],
4011 values[2 * chan + 1]
4012 };
4013 LLVMValueRef packed;
4014
4015 packed = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.packf16",
4016 ctx->i32, pack_args, 2,
4017 AC_FUNC_ATTR_READNONE);
4018 args[chan + 5] = packed;
4019 }
4020 break;
4021
4022 case V_028714_SPI_SHADER_UNORM16_ABGR:
4023 for (unsigned chan = 0; chan < 4; chan++) {
4024 val[chan] = emit_float_saturate(ctx, values[chan], 0, 1);
4025 val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
4026 LLVMConstReal(ctx->f32, 65535), "");
4027 val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
4028 LLVMConstReal(ctx->f32, 0.5), "");
4029 val[chan] = LLVMBuildFPToUI(ctx->builder, val[chan],
4030 ctx->i32, "");
4031 }
4032
4033 args[4] = ctx->i32one;
4034 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4035 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4036 break;
4037
4038 case V_028714_SPI_SHADER_SNORM16_ABGR:
4039 for (unsigned chan = 0; chan < 4; chan++) {
4040 val[chan] = emit_float_saturate(ctx, values[chan], -1, 1);
4041 val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
4042 LLVMConstReal(ctx->f32, 32767), "");
4043
4044 /* If positive, add 0.5, else add -0.5. */
4045 val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
4046 LLVMBuildSelect(ctx->builder,
4047 LLVMBuildFCmp(ctx->builder, LLVMRealOGE,
4048 val[chan], ctx->f32zero, ""),
4049 LLVMConstReal(ctx->f32, 0.5),
4050 LLVMConstReal(ctx->f32, -0.5), ""), "");
4051 val[chan] = LLVMBuildFPToSI(ctx->builder, val[chan], ctx->i32, "");
4052 }
4053
4054 args[4] = ctx->i32one;
4055 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4056 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4057 break;
4058
4059 case V_028714_SPI_SHADER_UINT16_ABGR: {
4060 LLVMValueRef max = LLVMConstInt(ctx->i32, is_int8 ? 255 : 65535, 0);
4061
4062 for (unsigned chan = 0; chan < 4; chan++) {
4063 val[chan] = to_integer(ctx, values[chan]);
4064 val[chan] = emit_minmax_int(ctx, LLVMIntULT, val[chan], max);
4065 }
4066
4067 args[4] = ctx->i32one;
4068 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4069 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4070 break;
4071 }
4072
4073 case V_028714_SPI_SHADER_SINT16_ABGR: {
4074 LLVMValueRef max = LLVMConstInt(ctx->i32, is_int8 ? 127 : 32767, 0);
4075 LLVMValueRef min = LLVMConstInt(ctx->i32, is_int8 ? -128 : -32768, 0);
4076
4077 /* Clamp. */
4078 for (unsigned chan = 0; chan < 4; chan++) {
4079 val[chan] = to_integer(ctx, values[chan]);
4080 val[chan] = emit_minmax_int(ctx, LLVMIntSLT, val[chan], max);
4081 val[chan] = emit_minmax_int(ctx, LLVMIntSGT, val[chan], min);
4082 }
4083
4084 args[4] = ctx->i32one;
4085 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4086 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4087 break;
4088 }
4089
4090 default:
4091 case V_028714_SPI_SHADER_32_ABGR:
4092 memcpy(&args[5], values, sizeof(values[0]) * 4);
4093 break;
4094 }
4095 } else
4096 memcpy(&args[5], values, sizeof(values[0]) * 4);
4097
4098 for (unsigned i = 5; i < 9; ++i)
4099 args[i] = to_float(ctx, args[i]);
4100 }
4101
4102 static void
4103 handle_vs_outputs_post(struct nir_to_llvm_context *ctx)
4104 {
4105 uint32_t param_count = 0;
4106 unsigned target;
4107 unsigned pos_idx, num_pos_exports = 0;
4108 LLVMValueRef args[9];
4109 LLVMValueRef pos_args[4][9] = { { 0 } };
4110 LLVMValueRef psize_value = 0;
4111 int i;
4112 const uint64_t clip_mask = ctx->output_mask & ((1ull << VARYING_SLOT_CLIP_DIST0) |
4113 (1ull << VARYING_SLOT_CLIP_DIST1) |
4114 (1ull << VARYING_SLOT_CULL_DIST0) |
4115 (1ull << VARYING_SLOT_CULL_DIST1));
4116
4117 if (clip_mask) {
4118 LLVMValueRef slots[8];
4119 unsigned j;
4120
4121 if (ctx->shader_info->vs.cull_dist_mask)
4122 ctx->shader_info->vs.cull_dist_mask <<= ctx->num_clips;
4123
4124 i = VARYING_SLOT_CLIP_DIST0;
4125 for (j = 0; j < ctx->num_clips; j++)
4126 slots[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4127 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4128 i = VARYING_SLOT_CULL_DIST0;
4129 for (j = 0; j < ctx->num_culls; j++)
4130 slots[ctx->num_clips + j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4131 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4132
4133 for (i = ctx->num_clips + ctx->num_culls; i < 8; i++)
4134 slots[i] = LLVMGetUndef(ctx->f32);
4135
4136 if (ctx->num_clips + ctx->num_culls > 4) {
4137 target = V_008DFC_SQ_EXP_POS + 3;
4138 si_llvm_init_export_args(ctx, &slots[4], target, args);
4139 memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
4140 args, sizeof(args));
4141 }
4142
4143 target = V_008DFC_SQ_EXP_POS + 2;
4144 si_llvm_init_export_args(ctx, &slots[0], target, args);
4145 memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
4146 args, sizeof(args));
4147
4148 }
4149
4150 for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
4151 LLVMValueRef values[4];
4152 if (!(ctx->output_mask & (1ull << i)))
4153 continue;
4154
4155 for (unsigned j = 0; j < 4; j++)
4156 values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4157 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4158
4159 if (i == VARYING_SLOT_POS) {
4160 target = V_008DFC_SQ_EXP_POS;
4161 } else if (i == VARYING_SLOT_CLIP_DIST0 ||
4162 i == VARYING_SLOT_CLIP_DIST1 ||
4163 i == VARYING_SLOT_CULL_DIST0 ||
4164 i == VARYING_SLOT_CULL_DIST1) {
4165 continue;
4166 } else if (i == VARYING_SLOT_PSIZ) {
4167 ctx->shader_info->vs.writes_pointsize = true;
4168 psize_value = values[0];
4169 continue;
4170 } else if (i >= VARYING_SLOT_VAR0) {
4171 ctx->shader_info->vs.export_mask |= 1u << (i - VARYING_SLOT_VAR0);
4172 target = V_008DFC_SQ_EXP_PARAM + param_count;
4173 param_count++;
4174 }
4175
4176 si_llvm_init_export_args(ctx, values, target, args);
4177
4178 if (target >= V_008DFC_SQ_EXP_POS &&
4179 target <= (V_008DFC_SQ_EXP_POS + 3)) {
4180 memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
4181 args, sizeof(args));
4182 } else {
4183 ac_emit_llvm_intrinsic(&ctx->ac,
4184 "llvm.SI.export",
4185 ctx->voidt,
4186 args, 9, 0);
4187 }
4188 }
4189
4190 /* We need to add the position output manually if it's missing. */
4191 if (!pos_args[0][0]) {
4192 pos_args[0][0] = LLVMConstInt(ctx->i32, 0xf, false);
4193 pos_args[0][1] = ctx->i32zero; /* EXEC mask */
4194 pos_args[0][2] = ctx->i32zero; /* last export? */
4195 pos_args[0][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS, false);
4196 pos_args[0][4] = ctx->i32zero; /* COMPR flag */
4197 pos_args[0][5] = ctx->f32zero; /* X */
4198 pos_args[0][6] = ctx->f32zero; /* Y */
4199 pos_args[0][7] = ctx->f32zero; /* Z */
4200 pos_args[0][8] = ctx->f32one; /* W */
4201 }
4202
4203 if (ctx->shader_info->vs.writes_pointsize == true) {
4204 pos_args[1][0] = LLVMConstInt(ctx->i32, (ctx->shader_info->vs.writes_pointsize == true), false); /* writemask */
4205 pos_args[1][1] = ctx->i32zero; /* EXEC mask */
4206 pos_args[1][2] = ctx->i32zero; /* last export? */
4207 pos_args[1][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS + 1, false);
4208 pos_args[1][4] = ctx->i32zero; /* COMPR flag */
4209 pos_args[1][5] = ctx->f32zero; /* X */
4210 pos_args[1][6] = ctx->f32zero; /* Y */
4211 pos_args[1][7] = ctx->f32zero; /* Z */
4212 pos_args[1][8] = ctx->f32zero; /* W */
4213
4214 if (ctx->shader_info->vs.writes_pointsize == true)
4215 pos_args[1][5] = psize_value;
4216 }
4217 for (i = 0; i < 4; i++) {
4218 if (pos_args[i][0])
4219 num_pos_exports++;
4220 }
4221
4222 pos_idx = 0;
4223 for (i = 0; i < 4; i++) {
4224 if (!pos_args[i][0])
4225 continue;
4226
4227 /* Specify the target we are exporting */
4228 pos_args[i][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS + pos_idx++, false);
4229 if (pos_idx == num_pos_exports)
4230 pos_args[i][2] = ctx->i32one;
4231 ac_emit_llvm_intrinsic(&ctx->ac,
4232 "llvm.SI.export",
4233 ctx->voidt,
4234 pos_args[i], 9, 0);
4235 }
4236
4237 ctx->shader_info->vs.pos_exports = num_pos_exports;
4238 ctx->shader_info->vs.param_exports = param_count;
4239 }
4240
4241 static void
4242 si_export_mrt_color(struct nir_to_llvm_context *ctx,
4243 LLVMValueRef *color, unsigned param, bool is_last)
4244 {
4245 LLVMValueRef args[9];
4246 /* Export */
4247 si_llvm_init_export_args(ctx, color, param,
4248 args);
4249
4250 if (is_last) {
4251 args[1] = ctx->i32one; /* whether the EXEC mask is valid */
4252 args[2] = ctx->i32one; /* DONE bit */
4253 } else if (args[0] == ctx->i32zero)
4254 return; /* unnecessary NULL export */
4255
4256 ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.export",
4257 ctx->voidt, args, 9, 0);
4258 }
4259
4260 static void
4261 si_export_mrt_z(struct nir_to_llvm_context *ctx,
4262 LLVMValueRef depth, LLVMValueRef stencil,
4263 LLVMValueRef samplemask)
4264 {
4265 LLVMValueRef args[9];
4266 unsigned mask = 0;
4267 args[1] = ctx->i32one; /* whether the EXEC mask is valid */
4268 args[2] = ctx->i32one; /* DONE bit */
4269 /* Specify the target we are exporting */
4270 args[3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_MRTZ, false);
4271
4272 args[4] = ctx->i32zero; /* COMP flag */
4273 args[5] = LLVMGetUndef(ctx->f32); /* R, depth */
4274 args[6] = LLVMGetUndef(ctx->f32); /* G, stencil test val[0:7], stencil op val[8:15] */
4275 args[7] = LLVMGetUndef(ctx->f32); /* B, sample mask */
4276 args[8] = LLVMGetUndef(ctx->f32); /* A, alpha to mask */
4277
4278 if (depth) {
4279 args[5] = depth;
4280 mask |= 0x1;
4281 }
4282
4283 if (stencil) {
4284 args[6] = stencil;
4285 mask |= 0x2;
4286 }
4287
4288 if (samplemask) {
4289 args[7] = samplemask;
4290 mask |= 0x04;
4291 }
4292
4293 /* SI (except OLAND) has a bug that it only looks
4294 * at the X writemask component. */
4295 if (ctx->options->chip_class == SI &&
4296 ctx->options->family != CHIP_OLAND)
4297 mask |= 0x01;
4298
4299 args[0] = LLVMConstInt(ctx->i32, mask, false);
4300 ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.export",
4301 ctx->voidt, args, 9, 0);
4302 }
4303
4304 static void
4305 handle_fs_outputs_post(struct nir_to_llvm_context *ctx)
4306 {
4307 unsigned index = 0;
4308 LLVMValueRef depth = NULL, stencil = NULL, samplemask = NULL;
4309
4310 for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
4311 LLVMValueRef values[4];
4312
4313 if (!(ctx->output_mask & (1ull << i)))
4314 continue;
4315
4316 if (i == FRAG_RESULT_DEPTH) {
4317 ctx->shader_info->fs.writes_z = true;
4318 depth = to_float(ctx, LLVMBuildLoad(ctx->builder,
4319 ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
4320 } else if (i == FRAG_RESULT_STENCIL) {
4321 ctx->shader_info->fs.writes_stencil = true;
4322 stencil = to_float(ctx, LLVMBuildLoad(ctx->builder,
4323 ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
4324 } else {
4325 bool last = false;
4326 for (unsigned j = 0; j < 4; j++)
4327 values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4328 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4329
4330 if (!ctx->shader_info->fs.writes_z && !ctx->shader_info->fs.writes_stencil)
4331 last = ctx->output_mask <= ((1ull << (i + 1)) - 1);
4332
4333 si_export_mrt_color(ctx, values, V_008DFC_SQ_EXP_MRT + index, last);
4334 index++;
4335 }
4336 }
4337
4338 if (depth || stencil)
4339 si_export_mrt_z(ctx, depth, stencil, samplemask);
4340 else if (!index)
4341 si_export_mrt_color(ctx, NULL, V_008DFC_SQ_EXP_NULL, true);
4342
4343 ctx->shader_info->fs.output_mask = index ? ((1ull << index) - 1) : 0;
4344 }
4345
4346 static void
4347 handle_shader_outputs_post(struct nir_to_llvm_context *ctx)
4348 {
4349 switch (ctx->stage) {
4350 case MESA_SHADER_VERTEX:
4351 handle_vs_outputs_post(ctx);
4352 break;
4353 case MESA_SHADER_FRAGMENT:
4354 handle_fs_outputs_post(ctx);
4355 break;
4356 default:
4357 break;
4358 }
4359 }
4360
4361 static void
4362 handle_shared_compute_var(struct nir_to_llvm_context *ctx,
4363 struct nir_variable *variable, uint32_t *offset, int idx)
4364 {
4365 unsigned size = glsl_count_attribute_slots(variable->type, false);
4366 variable->data.driver_location = *offset;
4367 *offset += size;
4368 }
4369
4370 static void ac_llvm_finalize_module(struct nir_to_llvm_context * ctx)
4371 {
4372 LLVMPassManagerRef passmgr;
4373 /* Create the pass manager */
4374 passmgr = LLVMCreateFunctionPassManagerForModule(
4375 ctx->module);
4376
4377 /* This pass should eliminate all the load and store instructions */
4378 LLVMAddPromoteMemoryToRegisterPass(passmgr);
4379
4380 /* Add some optimization passes */
4381 LLVMAddScalarReplAggregatesPass(passmgr);
4382 LLVMAddLICMPass(passmgr);
4383 LLVMAddAggressiveDCEPass(passmgr);
4384 LLVMAddCFGSimplificationPass(passmgr);
4385 LLVMAddInstructionCombiningPass(passmgr);
4386
4387 /* Run the pass */
4388 LLVMInitializeFunctionPassManager(passmgr);
4389 LLVMRunFunctionPassManager(passmgr, ctx->main_function);
4390 LLVMFinalizeFunctionPassManager(passmgr);
4391
4392 LLVMDisposeBuilder(ctx->builder);
4393 LLVMDisposePassManager(passmgr);
4394 }
4395
4396 static
4397 LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
4398 struct nir_shader *nir,
4399 struct ac_shader_variant_info *shader_info,
4400 const struct ac_nir_compiler_options *options)
4401 {
4402 struct nir_to_llvm_context ctx = {0};
4403 struct nir_function *func;
4404 unsigned i;
4405 ctx.options = options;
4406 ctx.shader_info = shader_info;
4407 ctx.context = LLVMContextCreate();
4408 ctx.module = LLVMModuleCreateWithNameInContext("shader", ctx.context);
4409
4410 ac_llvm_context_init(&ctx.ac, ctx.context);
4411 ctx.ac.module = ctx.module;
4412
4413 ctx.has_ds_bpermute = ctx.options->chip_class >= VI;
4414
4415 memset(shader_info, 0, sizeof(*shader_info));
4416
4417 LLVMSetTarget(ctx.module, "amdgcn--");
4418 setup_types(&ctx);
4419
4420 ctx.builder = LLVMCreateBuilderInContext(ctx.context);
4421 ctx.ac.builder = ctx.builder;
4422 ctx.stage = nir->stage;
4423
4424 for (i = 0; i < AC_UD_MAX_SETS; i++)
4425 shader_info->user_sgprs_locs.descriptor_sets[i].sgpr_idx = -1;
4426 for (i = 0; i < AC_UD_MAX_UD; i++)
4427 shader_info->user_sgprs_locs.shader_data[i].sgpr_idx = -1;
4428
4429 create_function(&ctx);
4430
4431 if (nir->stage == MESA_SHADER_COMPUTE) {
4432 int num_shared = 0;
4433 nir_foreach_variable(variable, &nir->shared)
4434 num_shared++;
4435 if (num_shared) {
4436 int idx = 0;
4437 uint32_t shared_size = 0;
4438 LLVMValueRef var;
4439 LLVMTypeRef i8p = LLVMPointerType(ctx.i8, LOCAL_ADDR_SPACE);
4440 nir_foreach_variable(variable, &nir->shared) {
4441 handle_shared_compute_var(&ctx, variable, &shared_size, idx);
4442 idx++;
4443 }
4444
4445 shared_size *= 4;
4446 var = LLVMAddGlobalInAddressSpace(ctx.module,
4447 LLVMArrayType(ctx.i8, shared_size),
4448 "compute_lds",
4449 LOCAL_ADDR_SPACE);
4450 LLVMSetAlignment(var, 4);
4451 ctx.shared_memory = LLVMBuildBitCast(ctx.builder, var, i8p, "");
4452 }
4453 }
4454
4455 nir_foreach_variable(variable, &nir->inputs)
4456 handle_shader_input_decl(&ctx, variable);
4457
4458 if (nir->stage == MESA_SHADER_FRAGMENT)
4459 handle_fs_inputs_pre(&ctx, nir);
4460
4461 nir_foreach_variable(variable, &nir->outputs)
4462 handle_shader_output_decl(&ctx, variable);
4463
4464 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4465 _mesa_key_pointer_equal);
4466 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4467 _mesa_key_pointer_equal);
4468
4469 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4470
4471 setup_locals(&ctx, func);
4472
4473 visit_cf_list(&ctx, &func->impl->body);
4474 phi_post_pass(&ctx);
4475
4476 handle_shader_outputs_post(&ctx);
4477 LLVMBuildRetVoid(ctx.builder);
4478
4479 ac_llvm_finalize_module(&ctx);
4480 free(ctx.locals);
4481 ralloc_free(ctx.defs);
4482 ralloc_free(ctx.phis);
4483
4484 return ctx.module;
4485 }
4486
4487 static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di, void *context)
4488 {
4489 unsigned *retval = (unsigned *)context;
4490 LLVMDiagnosticSeverity severity = LLVMGetDiagInfoSeverity(di);
4491 char *description = LLVMGetDiagInfoDescription(di);
4492
4493 if (severity == LLVMDSError) {
4494 *retval = 1;
4495 fprintf(stderr, "LLVM triggered Diagnostic Handler: %s\n",
4496 description);
4497 }
4498
4499 LLVMDisposeMessage(description);
4500 }
4501
4502 static unsigned ac_llvm_compile(LLVMModuleRef M,
4503 struct ac_shader_binary *binary,
4504 LLVMTargetMachineRef tm)
4505 {
4506 unsigned retval = 0;
4507 char *err;
4508 LLVMContextRef llvm_ctx;
4509 LLVMMemoryBufferRef out_buffer;
4510 unsigned buffer_size;
4511 const char *buffer_data;
4512 LLVMBool mem_err;
4513
4514 /* Setup Diagnostic Handler*/
4515 llvm_ctx = LLVMGetModuleContext(M);
4516
4517 LLVMContextSetDiagnosticHandler(llvm_ctx, ac_diagnostic_handler,
4518 &retval);
4519
4520 /* Compile IR*/
4521 mem_err = LLVMTargetMachineEmitToMemoryBuffer(tm, M, LLVMObjectFile,
4522 &err, &out_buffer);
4523
4524 /* Process Errors/Warnings */
4525 if (mem_err) {
4526 fprintf(stderr, "%s: %s", __FUNCTION__, err);
4527 free(err);
4528 retval = 1;
4529 goto out;
4530 }
4531
4532 /* Extract Shader Code*/
4533 buffer_size = LLVMGetBufferSize(out_buffer);
4534 buffer_data = LLVMGetBufferStart(out_buffer);
4535
4536 ac_elf_read(buffer_data, buffer_size, binary);
4537
4538 /* Clean up */
4539 LLVMDisposeMemoryBuffer(out_buffer);
4540
4541 out:
4542 return retval;
4543 }
4544
4545 void ac_compile_nir_shader(LLVMTargetMachineRef tm,
4546 struct ac_shader_binary *binary,
4547 struct ac_shader_config *config,
4548 struct ac_shader_variant_info *shader_info,
4549 struct nir_shader *nir,
4550 const struct ac_nir_compiler_options *options,
4551 bool dump_shader)
4552 {
4553
4554 LLVMModuleRef llvm_module = ac_translate_nir_to_llvm(tm, nir, shader_info,
4555 options);
4556 if (dump_shader)
4557 LLVMDumpModule(llvm_module);
4558
4559 memset(binary, 0, sizeof(*binary));
4560 int v = ac_llvm_compile(llvm_module, binary, tm);
4561 if (v) {
4562 fprintf(stderr, "compile failed\n");
4563 }
4564
4565 if (dump_shader)
4566 fprintf(stderr, "disasm:\n%s\n", binary->disasm_string);
4567
4568 ac_shader_binary_read_config(binary, config, 0);
4569
4570 LLVMContextRef ctx = LLVMGetModuleContext(llvm_module);
4571 LLVMDisposeModule(llvm_module);
4572 LLVMContextDispose(ctx);
4573
4574 if (nir->stage == MESA_SHADER_FRAGMENT) {
4575 shader_info->num_input_vgprs = 0;
4576 if (G_0286CC_PERSP_SAMPLE_ENA(config->spi_ps_input_addr))
4577 shader_info->num_input_vgprs += 2;
4578 if (G_0286CC_PERSP_CENTER_ENA(config->spi_ps_input_addr))
4579 shader_info->num_input_vgprs += 2;
4580 if (G_0286CC_PERSP_CENTROID_ENA(config->spi_ps_input_addr))
4581 shader_info->num_input_vgprs += 2;
4582 if (G_0286CC_PERSP_PULL_MODEL_ENA(config->spi_ps_input_addr))
4583 shader_info->num_input_vgprs += 3;
4584 if (G_0286CC_LINEAR_SAMPLE_ENA(config->spi_ps_input_addr))
4585 shader_info->num_input_vgprs += 2;
4586 if (G_0286CC_LINEAR_CENTER_ENA(config->spi_ps_input_addr))
4587 shader_info->num_input_vgprs += 2;
4588 if (G_0286CC_LINEAR_CENTROID_ENA(config->spi_ps_input_addr))
4589 shader_info->num_input_vgprs += 2;
4590 if (G_0286CC_LINE_STIPPLE_TEX_ENA(config->spi_ps_input_addr))
4591 shader_info->num_input_vgprs += 1;
4592 if (G_0286CC_POS_X_FLOAT_ENA(config->spi_ps_input_addr))
4593 shader_info->num_input_vgprs += 1;
4594 if (G_0286CC_POS_Y_FLOAT_ENA(config->spi_ps_input_addr))
4595 shader_info->num_input_vgprs += 1;
4596 if (G_0286CC_POS_Z_FLOAT_ENA(config->spi_ps_input_addr))
4597 shader_info->num_input_vgprs += 1;
4598 if (G_0286CC_POS_W_FLOAT_ENA(config->spi_ps_input_addr))
4599 shader_info->num_input_vgprs += 1;
4600 if (G_0286CC_FRONT_FACE_ENA(config->spi_ps_input_addr))
4601 shader_info->num_input_vgprs += 1;
4602 if (G_0286CC_ANCILLARY_ENA(config->spi_ps_input_addr))
4603 shader_info->num_input_vgprs += 1;
4604 if (G_0286CC_SAMPLE_COVERAGE_ENA(config->spi_ps_input_addr))
4605 shader_info->num_input_vgprs += 1;
4606 if (G_0286CC_POS_FIXED_PT_ENA(config->spi_ps_input_addr))
4607 shader_info->num_input_vgprs += 1;
4608 }
4609 config->num_vgprs = MAX2(config->num_vgprs, shader_info->num_input_vgprs);
4610
4611 /* +3 for scratch wave offset and VCC */
4612 config->num_sgprs = MAX2(config->num_sgprs,
4613 shader_info->num_input_sgprs + 3);
4614 if (nir->stage == MESA_SHADER_COMPUTE) {
4615 for (int i = 0; i < 3; ++i)
4616 shader_info->cs.block_size[i] = nir->info->cs.local_size[i];
4617 }
4618
4619 if (nir->stage == MESA_SHADER_FRAGMENT)
4620 shader_info->fs.early_fragment_test = nir->info->fs.early_fragment_tests;
4621 }