2 * Copyright © 2016 Bas Nieuwenhuizen
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
30 #include "../vulkan/radv_descriptor_set.h"
31 #include "util/bitscan.h"
32 #include <llvm-c/Transforms/Scalar.h>
33 #include "ac_shader_info.h"
34 #include "ac_exp_param.h"
36 enum radeon_llvm_calling_convention
{
37 RADEON_LLVM_AMDGPU_VS
= 87,
38 RADEON_LLVM_AMDGPU_GS
= 88,
39 RADEON_LLVM_AMDGPU_PS
= 89,
40 RADEON_LLVM_AMDGPU_CS
= 90,
43 #define CONST_ADDR_SPACE 2
44 #define LOCAL_ADDR_SPACE 3
46 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
47 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
56 struct nir_to_llvm_context
{
57 struct ac_llvm_context ac
;
58 const struct ac_nir_compiler_options
*options
;
59 struct ac_shader_variant_info
*shader_info
;
60 unsigned max_workgroup_size
;
61 LLVMContextRef context
;
63 LLVMBuilderRef builder
;
64 LLVMValueRef main_function
;
66 struct hash_table
*defs
;
67 struct hash_table
*phis
;
69 LLVMValueRef descriptor_sets
[AC_UD_MAX_SETS
];
70 LLVMValueRef ring_offsets
;
71 LLVMValueRef push_constants
;
72 LLVMValueRef num_work_groups
;
73 LLVMValueRef workgroup_ids
;
74 LLVMValueRef local_invocation_ids
;
77 LLVMValueRef vertex_buffers
;
78 LLVMValueRef base_vertex
;
79 LLVMValueRef start_instance
;
80 LLVMValueRef draw_index
;
81 LLVMValueRef vertex_id
;
82 LLVMValueRef rel_auto_id
;
83 LLVMValueRef vs_prim_id
;
84 LLVMValueRef instance_id
;
85 LLVMValueRef ls_out_layout
;
86 LLVMValueRef es2gs_offset
;
88 LLVMValueRef tcs_offchip_layout
;
89 LLVMValueRef tcs_out_offsets
;
90 LLVMValueRef tcs_out_layout
;
91 LLVMValueRef tcs_in_layout
;
93 LLVMValueRef tess_factor_offset
;
94 LLVMValueRef tcs_patch_id
;
95 LLVMValueRef tcs_rel_ids
;
96 LLVMValueRef tes_rel_patch_id
;
97 LLVMValueRef tes_patch_id
;
101 LLVMValueRef gsvs_ring_stride
;
102 LLVMValueRef gsvs_num_entries
;
103 LLVMValueRef gs2vs_offset
;
104 LLVMValueRef gs_wave_id
;
105 LLVMValueRef gs_vtx_offset
[6];
106 LLVMValueRef gs_prim_id
, gs_invocation_id
;
108 LLVMValueRef esgs_ring
;
109 LLVMValueRef gsvs_ring
;
110 LLVMValueRef hs_ring_tess_offchip
;
111 LLVMValueRef hs_ring_tess_factor
;
113 LLVMValueRef prim_mask
;
114 LLVMValueRef sample_pos_offset
;
115 LLVMValueRef persp_sample
, persp_center
, persp_centroid
;
116 LLVMValueRef linear_sample
, linear_center
, linear_centroid
;
117 LLVMValueRef front_face
;
118 LLVMValueRef ancillary
;
119 LLVMValueRef sample_coverage
;
120 LLVMValueRef frag_pos
[4];
122 LLVMBasicBlockRef continue_block
;
123 LLVMBasicBlockRef break_block
;
143 LLVMValueRef i1false
;
144 LLVMValueRef i32zero
;
146 LLVMValueRef f32zero
;
148 LLVMValueRef v4f32empty
;
150 unsigned uniform_md_kind
;
151 LLVMValueRef empty_md
;
152 gl_shader_stage stage
;
155 LLVMValueRef inputs
[RADEON_LLVM_MAX_INPUTS
* 4];
156 LLVMValueRef outputs
[RADEON_LLVM_MAX_OUTPUTS
* 4];
158 LLVMValueRef shared_memory
;
160 uint64_t output_mask
;
162 LLVMValueRef
*locals
;
164 uint8_t num_output_clips
;
165 uint8_t num_output_culls
;
167 bool has_ds_bpermute
;
169 bool is_gs_copy_shader
;
170 LLVMValueRef gs_next_vertex
;
171 unsigned gs_max_out_vertices
;
173 unsigned tes_primitive_mode
;
174 uint64_t tess_outputs_written
;
175 uint64_t tess_patch_outputs_written
;
178 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
179 const nir_deref_var
*deref
,
180 enum desc_type desc_type
);
181 static unsigned radeon_llvm_reg_index_soa(unsigned index
, unsigned chan
)
183 return (index
* 4) + chan
;
186 static unsigned shader_io_get_unique_index(gl_varying_slot slot
)
188 /* handle patch indices separate */
189 if (slot
== VARYING_SLOT_TESS_LEVEL_OUTER
)
191 if (slot
== VARYING_SLOT_TESS_LEVEL_INNER
)
193 if (slot
>= VARYING_SLOT_PATCH0
&& slot
<= VARYING_SLOT_TESS_MAX
)
194 return 2 + (slot
- VARYING_SLOT_PATCH0
);
196 if (slot
== VARYING_SLOT_POS
)
198 if (slot
== VARYING_SLOT_PSIZ
)
200 if (slot
== VARYING_SLOT_CLIP_DIST0
)
202 /* 3 is reserved for clip dist as well */
203 if (slot
>= VARYING_SLOT_VAR0
&& slot
<= VARYING_SLOT_VAR31
)
204 return 4 + (slot
- VARYING_SLOT_VAR0
);
205 unreachable("illegal slot in get unique index\n");
208 static unsigned llvm_get_type_size(LLVMTypeRef type
)
210 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
213 case LLVMIntegerTypeKind
:
214 return LLVMGetIntTypeWidth(type
) / 8;
215 case LLVMFloatTypeKind
:
217 case LLVMPointerTypeKind
:
219 case LLVMVectorTypeKind
:
220 return LLVMGetVectorSize(type
) *
221 llvm_get_type_size(LLVMGetElementType(type
));
228 static void set_llvm_calling_convention(LLVMValueRef func
,
229 gl_shader_stage stage
)
231 enum radeon_llvm_calling_convention calling_conv
;
234 case MESA_SHADER_VERTEX
:
235 case MESA_SHADER_TESS_CTRL
:
236 case MESA_SHADER_TESS_EVAL
:
237 calling_conv
= RADEON_LLVM_AMDGPU_VS
;
239 case MESA_SHADER_GEOMETRY
:
240 calling_conv
= RADEON_LLVM_AMDGPU_GS
;
242 case MESA_SHADER_FRAGMENT
:
243 calling_conv
= RADEON_LLVM_AMDGPU_PS
;
245 case MESA_SHADER_COMPUTE
:
246 calling_conv
= RADEON_LLVM_AMDGPU_CS
;
249 unreachable("Unhandle shader type");
252 LLVMSetFunctionCallConv(func
, calling_conv
);
257 LLVMTypeRef types
[MAX_ARGS
];
258 LLVMValueRef
*assign
[MAX_ARGS
];
259 unsigned array_params_mask
;
261 uint8_t user_sgpr_count
;
263 uint8_t num_user_sgprs_used
;
264 uint8_t num_sgprs_used
;
265 uint8_t num_vgprs_used
;
269 add_argument(struct arg_info
*info
,
270 LLVMTypeRef type
, LLVMValueRef
*param_ptr
)
272 assert(info
->count
< MAX_ARGS
);
273 info
->assign
[info
->count
] = param_ptr
;
274 info
->types
[info
->count
] = type
;
279 add_sgpr_argument(struct arg_info
*info
,
280 LLVMTypeRef type
, LLVMValueRef
*param_ptr
)
282 add_argument(info
, type
, param_ptr
);
283 info
->num_sgprs_used
+= llvm_get_type_size(type
) / 4;
288 add_user_sgpr_argument(struct arg_info
*info
,
290 LLVMValueRef
*param_ptr
)
292 add_sgpr_argument(info
, type
, param_ptr
);
293 info
->num_user_sgprs_used
+= llvm_get_type_size(type
) / 4;
294 info
->user_sgpr_count
++;
298 add_vgpr_argument(struct arg_info
*info
,
300 LLVMValueRef
*param_ptr
)
302 add_argument(info
, type
, param_ptr
);
303 info
->num_vgprs_used
+= llvm_get_type_size(type
) / 4;
307 add_user_sgpr_array_argument(struct arg_info
*info
,
309 LLVMValueRef
*param_ptr
)
311 info
->array_params_mask
|= (1 << info
->count
);
312 add_user_sgpr_argument(info
, type
, param_ptr
);
315 static void assign_arguments(LLVMValueRef main_function
,
316 struct arg_info
*info
)
319 for (i
= 0; i
< info
->count
; i
++) {
321 *info
->assign
[i
] = LLVMGetParam(main_function
, i
);
326 create_llvm_function(LLVMContextRef ctx
, LLVMModuleRef module
,
327 LLVMBuilderRef builder
, LLVMTypeRef
*return_types
,
328 unsigned num_return_elems
,
329 struct arg_info
*args
,
330 unsigned max_workgroup_size
,
333 LLVMTypeRef main_function_type
, ret_type
;
334 LLVMBasicBlockRef main_function_body
;
336 if (num_return_elems
)
337 ret_type
= LLVMStructTypeInContext(ctx
, return_types
,
338 num_return_elems
, true);
340 ret_type
= LLVMVoidTypeInContext(ctx
);
342 /* Setup the function */
344 LLVMFunctionType(ret_type
, args
->types
, args
->count
, 0);
345 LLVMValueRef main_function
=
346 LLVMAddFunction(module
, "main", main_function_type
);
348 LLVMAppendBasicBlockInContext(ctx
, main_function
, "main_body");
349 LLVMPositionBuilderAtEnd(builder
, main_function_body
);
351 LLVMSetFunctionCallConv(main_function
, RADEON_LLVM_AMDGPU_CS
);
352 for (unsigned i
= 0; i
< args
->sgpr_count
; ++i
) {
353 if (args
->array_params_mask
& (1 << i
)) {
354 LLVMValueRef P
= LLVMGetParam(main_function
, i
);
355 ac_add_function_attr(ctx
, main_function
, i
+ 1, AC_FUNC_ATTR_BYVAL
);
356 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
359 ac_add_function_attr(ctx
, main_function
, i
+ 1, AC_FUNC_ATTR_INREG
);
363 if (max_workgroup_size
) {
364 ac_llvm_add_target_dep_function_attr(main_function
,
365 "amdgpu-max-work-group-size",
369 /* These were copied from some LLVM test. */
370 LLVMAddTargetDependentFunctionAttr(main_function
,
371 "less-precise-fpmad",
373 LLVMAddTargetDependentFunctionAttr(main_function
,
376 LLVMAddTargetDependentFunctionAttr(main_function
,
379 LLVMAddTargetDependentFunctionAttr(main_function
,
383 return main_function
;
386 static LLVMTypeRef
const_array(LLVMTypeRef elem_type
, int num_elements
)
388 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
392 static LLVMValueRef
get_shared_memory_ptr(struct nir_to_llvm_context
*ctx
,
400 offset
= LLVMConstInt(ctx
->i32
, idx
* 16, false);
402 ptr
= ctx
->shared_memory
;
403 ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &offset
, 1, "");
404 addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
405 ptr
= LLVMBuildBitCast(ctx
->builder
, ptr
, LLVMPointerType(type
, addr_space
), "");
409 static LLVMTypeRef
to_integer_type_scalar(struct ac_llvm_context
*ctx
, LLVMTypeRef t
)
411 if (t
== ctx
->f16
|| t
== ctx
->i16
)
413 else if (t
== ctx
->f32
|| t
== ctx
->i32
)
415 else if (t
== ctx
->f64
|| t
== ctx
->i64
)
418 unreachable("Unhandled integer size");
421 static LLVMTypeRef
to_integer_type(struct ac_llvm_context
*ctx
, LLVMTypeRef t
)
423 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
424 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
425 return LLVMVectorType(to_integer_type_scalar(ctx
, elem_type
),
426 LLVMGetVectorSize(t
));
428 return to_integer_type_scalar(ctx
, t
);
431 static LLVMValueRef
to_integer(struct ac_llvm_context
*ctx
, LLVMValueRef v
)
433 LLVMTypeRef type
= LLVMTypeOf(v
);
434 return LLVMBuildBitCast(ctx
->builder
, v
, to_integer_type(ctx
, type
), "");
437 static LLVMTypeRef
to_float_type_scalar(struct ac_llvm_context
*ctx
, LLVMTypeRef t
)
439 if (t
== ctx
->i16
|| t
== ctx
->f16
)
441 else if (t
== ctx
->i32
|| t
== ctx
->f32
)
443 else if (t
== ctx
->i64
|| t
== ctx
->f64
)
446 unreachable("Unhandled float size");
449 static LLVMTypeRef
to_float_type(struct ac_llvm_context
*ctx
, LLVMTypeRef t
)
451 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
452 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
453 return LLVMVectorType(to_float_type_scalar(ctx
, elem_type
),
454 LLVMGetVectorSize(t
));
456 return to_float_type_scalar(ctx
, t
);
459 static LLVMValueRef
to_float(struct ac_llvm_context
*ctx
, LLVMValueRef v
)
461 LLVMTypeRef type
= LLVMTypeOf(v
);
462 return LLVMBuildBitCast(ctx
->builder
, v
, to_float_type(ctx
, type
), "");
465 static int get_elem_bits(struct ac_llvm_context
*ctx
, LLVMTypeRef type
)
467 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
468 type
= LLVMGetElementType(type
);
470 if (LLVMGetTypeKind(type
) == LLVMIntegerTypeKind
)
471 return LLVMGetIntTypeWidth(type
);
473 if (type
== ctx
->f16
)
475 if (type
== ctx
->f32
)
477 if (type
== ctx
->f64
)
480 unreachable("Unhandled type kind in get_elem_bits");
483 static LLVMValueRef
unpack_param(struct nir_to_llvm_context
*ctx
,
484 LLVMValueRef param
, unsigned rshift
,
487 LLVMValueRef value
= param
;
489 value
= LLVMBuildLShr(ctx
->builder
, value
,
490 LLVMConstInt(ctx
->i32
, rshift
, false), "");
492 if (rshift
+ bitwidth
< 32) {
493 unsigned mask
= (1 << bitwidth
) - 1;
494 value
= LLVMBuildAnd(ctx
->builder
, value
,
495 LLVMConstInt(ctx
->i32
, mask
, false), "");
500 static LLVMValueRef
get_rel_patch_id(struct nir_to_llvm_context
*ctx
)
502 switch (ctx
->stage
) {
503 case MESA_SHADER_TESS_CTRL
:
504 return unpack_param(ctx
, ctx
->tcs_rel_ids
, 0, 8);
505 case MESA_SHADER_TESS_EVAL
:
506 return ctx
->tes_rel_patch_id
;
509 unreachable("Illegal stage");
513 /* Tessellation shaders pass outputs to the next shader using LDS.
515 * LS outputs = TCS inputs
516 * TCS outputs = TES inputs
519 * - TCS inputs for patch 0
520 * - TCS inputs for patch 1
521 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
523 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
524 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
525 * - TCS outputs for patch 1
526 * - Per-patch TCS outputs for patch 1
527 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
528 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
531 * All three shaders VS(LS), TCS, TES share the same LDS space.
534 get_tcs_in_patch_stride(struct nir_to_llvm_context
*ctx
)
536 if (ctx
->stage
== MESA_SHADER_VERTEX
)
537 return unpack_param(ctx
, ctx
->ls_out_layout
, 0, 13);
538 else if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
539 return unpack_param(ctx
, ctx
->tcs_in_layout
, 0, 13);
547 get_tcs_out_patch_stride(struct nir_to_llvm_context
*ctx
)
549 return unpack_param(ctx
, ctx
->tcs_out_layout
, 0, 13);
553 get_tcs_out_patch0_offset(struct nir_to_llvm_context
*ctx
)
555 return LLVMBuildMul(ctx
->builder
,
556 unpack_param(ctx
, ctx
->tcs_out_offsets
, 0, 16),
557 LLVMConstInt(ctx
->i32
, 4, false), "");
561 get_tcs_out_patch0_patch_data_offset(struct nir_to_llvm_context
*ctx
)
563 return LLVMBuildMul(ctx
->builder
,
564 unpack_param(ctx
, ctx
->tcs_out_offsets
, 16, 16),
565 LLVMConstInt(ctx
->i32
, 4, false), "");
569 get_tcs_in_current_patch_offset(struct nir_to_llvm_context
*ctx
)
571 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
572 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
574 return LLVMBuildMul(ctx
->builder
, patch_stride
, rel_patch_id
, "");
578 get_tcs_out_current_patch_offset(struct nir_to_llvm_context
*ctx
)
580 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
581 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
582 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
584 return LLVMBuildAdd(ctx
->builder
, patch0_offset
,
585 LLVMBuildMul(ctx
->builder
, patch_stride
,
591 get_tcs_out_current_patch_data_offset(struct nir_to_llvm_context
*ctx
)
593 LLVMValueRef patch0_patch_data_offset
=
594 get_tcs_out_patch0_patch_data_offset(ctx
);
595 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
596 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
598 return LLVMBuildAdd(ctx
->builder
, patch0_patch_data_offset
,
599 LLVMBuildMul(ctx
->builder
, patch_stride
,
604 static void set_userdata_location(struct ac_userdata_info
*ud_info
, uint8_t *sgpr_idx
, uint8_t num_sgprs
)
606 ud_info
->sgpr_idx
= *sgpr_idx
;
607 ud_info
->num_sgprs
= num_sgprs
;
608 ud_info
->indirect
= false;
609 ud_info
->indirect_offset
= 0;
610 *sgpr_idx
+= num_sgprs
;
613 static void set_userdata_location_shader(struct nir_to_llvm_context
*ctx
,
614 int idx
, uint8_t *sgpr_idx
, uint8_t num_sgprs
)
616 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.shader_data
[idx
], sgpr_idx
, num_sgprs
);
620 static void set_userdata_location_indirect(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
,
621 uint32_t indirect_offset
)
623 ud_info
->sgpr_idx
= sgpr_idx
;
624 ud_info
->num_sgprs
= num_sgprs
;
625 ud_info
->indirect
= true;
626 ud_info
->indirect_offset
= indirect_offset
;
629 static void declare_tess_lds(struct nir_to_llvm_context
*ctx
)
631 unsigned lds_size
= ctx
->options
->chip_class
>= CIK
? 65536 : 32768;
632 ctx
->lds
= LLVMBuildIntToPtr(ctx
->builder
, ctx
->i32zero
,
633 LLVMPointerType(LLVMArrayType(ctx
->i32
, lds_size
/ 4), LOCAL_ADDR_SPACE
),
637 struct user_sgpr_info
{
638 bool need_ring_offsets
;
640 bool indirect_all_descriptor_sets
;
643 static void allocate_user_sgprs(struct nir_to_llvm_context
*ctx
,
644 struct user_sgpr_info
*user_sgpr_info
)
646 memset(user_sgpr_info
, 0, sizeof(struct user_sgpr_info
));
648 /* until we sort out scratch/global buffers always assign ring offsets for gs/vs/es */
649 if (ctx
->stage
== MESA_SHADER_GEOMETRY
||
650 ctx
->stage
== MESA_SHADER_VERTEX
||
651 ctx
->stage
== MESA_SHADER_TESS_CTRL
||
652 ctx
->stage
== MESA_SHADER_TESS_EVAL
||
653 ctx
->is_gs_copy_shader
)
654 user_sgpr_info
->need_ring_offsets
= true;
656 if (ctx
->stage
== MESA_SHADER_FRAGMENT
&&
657 ctx
->shader_info
->info
.ps
.needs_sample_positions
)
658 user_sgpr_info
->need_ring_offsets
= true;
660 /* 2 user sgprs will nearly always be allocated for scratch/rings */
661 if (ctx
->options
->supports_spill
|| user_sgpr_info
->need_ring_offsets
) {
662 user_sgpr_info
->sgpr_count
+= 2;
665 switch (ctx
->stage
) {
666 case MESA_SHADER_COMPUTE
:
667 user_sgpr_info
->sgpr_count
+= ctx
->shader_info
->info
.cs
.grid_components_used
;
669 case MESA_SHADER_FRAGMENT
:
670 user_sgpr_info
->sgpr_count
+= ctx
->shader_info
->info
.ps
.needs_sample_positions
;
672 case MESA_SHADER_VERTEX
:
673 if (!ctx
->is_gs_copy_shader
) {
674 user_sgpr_info
->sgpr_count
+= ctx
->shader_info
->info
.vs
.has_vertex_buffers
? 2 : 0;
675 if (ctx
->shader_info
->info
.vs
.needs_draw_id
) {
676 user_sgpr_info
->sgpr_count
+= 3;
678 user_sgpr_info
->sgpr_count
+= 2;
681 if (ctx
->options
->key
.vs
.as_ls
)
682 user_sgpr_info
->sgpr_count
++;
684 case MESA_SHADER_TESS_CTRL
:
685 user_sgpr_info
->sgpr_count
+= 4;
687 case MESA_SHADER_TESS_EVAL
:
688 user_sgpr_info
->sgpr_count
+= 1;
690 case MESA_SHADER_GEOMETRY
:
691 user_sgpr_info
->sgpr_count
+= 2;
697 if (ctx
->shader_info
->info
.needs_push_constants
)
698 user_sgpr_info
->sgpr_count
+= 2;
700 uint32_t remaining_sgprs
= 16 - user_sgpr_info
->sgpr_count
;
701 if (remaining_sgprs
/ 2 < util_bitcount(ctx
->shader_info
->info
.desc_set_used_mask
)) {
702 user_sgpr_info
->sgpr_count
+= 2;
703 user_sgpr_info
->indirect_all_descriptor_sets
= true;
705 user_sgpr_info
->sgpr_count
+= util_bitcount(ctx
->shader_info
->info
.desc_set_used_mask
) * 2;
709 static void create_function(struct nir_to_llvm_context
*ctx
)
711 unsigned num_sets
= ctx
->options
->layout
? ctx
->options
->layout
->num_sets
: 0;
712 uint8_t user_sgpr_idx
;
713 struct user_sgpr_info user_sgpr_info
;
714 struct arg_info args
= {};
715 LLVMValueRef desc_sets
;
717 allocate_user_sgprs(ctx
, &user_sgpr_info
);
718 if (user_sgpr_info
.need_ring_offsets
&& !ctx
->options
->supports_spill
) {
719 add_user_sgpr_argument(&args
, const_array(ctx
->v16i8
, 16), &ctx
->ring_offsets
); /* address of rings */
722 /* 1 for each descriptor set */
723 if (!user_sgpr_info
.indirect_all_descriptor_sets
) {
724 for (unsigned i
= 0; i
< num_sets
; ++i
) {
725 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
726 add_user_sgpr_array_argument(&args
, const_array(ctx
->i8
, 1024 * 1024), &ctx
->descriptor_sets
[i
]);
730 add_user_sgpr_array_argument(&args
, const_array(const_array(ctx
->i8
, 1024 * 1024), 32), &desc_sets
);
732 if (ctx
->shader_info
->info
.needs_push_constants
) {
733 /* 1 for push constants and dynamic descriptors */
734 add_user_sgpr_array_argument(&args
, const_array(ctx
->i8
, 1024 * 1024), &ctx
->push_constants
);
737 switch (ctx
->stage
) {
738 case MESA_SHADER_COMPUTE
:
739 if (ctx
->shader_info
->info
.cs
.grid_components_used
)
740 add_user_sgpr_argument(&args
, LLVMVectorType(ctx
->i32
, ctx
->shader_info
->info
.cs
.grid_components_used
), &ctx
->num_work_groups
); /* grid size */
741 add_sgpr_argument(&args
, LLVMVectorType(ctx
->i32
, 3), &ctx
->workgroup_ids
);
742 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->tg_size
);
743 add_vgpr_argument(&args
, LLVMVectorType(ctx
->i32
, 3), &ctx
->local_invocation_ids
);
745 case MESA_SHADER_VERTEX
:
746 if (!ctx
->is_gs_copy_shader
) {
747 if (ctx
->shader_info
->info
.vs
.has_vertex_buffers
)
748 add_user_sgpr_argument(&args
, const_array(ctx
->v16i8
, 16), &ctx
->vertex_buffers
); /* vertex buffers */
749 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->base_vertex
); // base vertex
750 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->start_instance
);// start instance
751 if (ctx
->shader_info
->info
.vs
.needs_draw_id
)
752 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->draw_index
); // draw id
754 if (ctx
->options
->key
.vs
.as_es
)
755 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->es2gs_offset
); // es2gs offset
756 else if (ctx
->options
->key
.vs
.as_ls
)
757 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->ls_out_layout
); // ls out layout
758 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->vertex_id
); // vertex id
759 if (!ctx
->is_gs_copy_shader
) {
760 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->rel_auto_id
); // rel auto id
761 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->vs_prim_id
); // vs prim id
762 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->instance_id
); // instance id
765 case MESA_SHADER_TESS_CTRL
:
766 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_offchip_layout
); // tcs offchip layout
767 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_out_offsets
); // tcs out offsets
768 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_out_layout
); // tcs out layout
769 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_in_layout
); // tcs in layout
770 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->oc_lds
); // param oc lds
771 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->tess_factor_offset
); // tess factor offset
772 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_patch_id
); // patch id
773 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_rel_ids
); // rel ids;
775 case MESA_SHADER_TESS_EVAL
:
776 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_offchip_layout
); // tcs offchip layout
777 if (ctx
->options
->key
.tes
.as_es
) {
778 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->oc_lds
); // OC LDS
779 add_sgpr_argument(&args
, ctx
->i32
, NULL
); //
780 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->es2gs_offset
); // es2gs offset
782 add_sgpr_argument(&args
, ctx
->i32
, NULL
); //
783 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->oc_lds
); // OC LDS
785 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->tes_u
); // tes_u
786 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->tes_v
); // tes_v
787 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->tes_rel_patch_id
); // tes rel patch id
788 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->tes_patch_id
); // tes patch id
790 case MESA_SHADER_GEOMETRY
:
791 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->gsvs_ring_stride
); // gsvs stride
792 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->gsvs_num_entries
); // gsvs num entires
793 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->gs2vs_offset
); // gs2vs offset
794 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->gs_wave_id
); // wave id
795 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]); // vtx0
796 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]); // vtx1
797 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_prim_id
); // prim id
798 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
799 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
800 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
801 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
802 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_invocation_id
);
804 case MESA_SHADER_FRAGMENT
:
805 if (ctx
->shader_info
->info
.ps
.needs_sample_positions
)
806 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->sample_pos_offset
); /* sample position offset */
807 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->prim_mask
); /* prim mask */
808 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->persp_sample
); /* persp sample */
809 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->persp_center
); /* persp center */
810 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->persp_centroid
); /* persp centroid */
811 add_vgpr_argument(&args
, ctx
->v3i32
, NULL
); /* persp pull model */
812 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->linear_sample
); /* linear sample */
813 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->linear_center
); /* linear center */
814 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->linear_centroid
); /* linear centroid */
815 add_vgpr_argument(&args
, ctx
->f32
, NULL
); /* line stipple tex */
816 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->frag_pos
[0]); /* pos x float */
817 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->frag_pos
[1]); /* pos y float */
818 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->frag_pos
[2]); /* pos z float */
819 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->frag_pos
[3]); /* pos w float */
820 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->front_face
); /* front face */
821 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->ancillary
); /* ancillary */
822 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->sample_coverage
); /* sample coverage */
823 add_vgpr_argument(&args
, ctx
->i32
, NULL
); /* fixed pt */
826 unreachable("Shader stage not implemented");
829 ctx
->main_function
= create_llvm_function(
830 ctx
->context
, ctx
->module
, ctx
->builder
, NULL
, 0, &args
,
831 ctx
->max_workgroup_size
,
832 ctx
->options
->unsafe_math
);
833 set_llvm_calling_convention(ctx
->main_function
, ctx
->stage
);
836 ctx
->shader_info
->num_input_vgprs
= 0;
837 ctx
->shader_info
->num_input_sgprs
= ctx
->shader_info
->num_user_sgprs
=
838 ctx
->options
->supports_spill
? 2 : 0;
840 ctx
->shader_info
->num_user_sgprs
+= args
.num_user_sgprs_used
;
841 ctx
->shader_info
->num_input_sgprs
+= args
.num_sgprs_used
;
843 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
844 ctx
->shader_info
->num_input_vgprs
= args
.num_vgprs_used
;
846 assign_arguments(ctx
->main_function
, &args
);
850 if (ctx
->options
->supports_spill
|| user_sgpr_info
.need_ring_offsets
) {
851 set_userdata_location_shader(ctx
, AC_UD_SCRATCH_RING_OFFSETS
, &user_sgpr_idx
, 2);
852 if (ctx
->options
->supports_spill
) {
853 ctx
->ring_offsets
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.implicit.buffer.ptr",
854 LLVMPointerType(ctx
->i8
, CONST_ADDR_SPACE
),
855 NULL
, 0, AC_FUNC_ATTR_READNONE
);
856 ctx
->ring_offsets
= LLVMBuildBitCast(ctx
->builder
, ctx
->ring_offsets
,
857 const_array(ctx
->v16i8
, 16), "");
861 if (!user_sgpr_info
.indirect_all_descriptor_sets
) {
862 for (unsigned i
= 0; i
< num_sets
; ++i
) {
863 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
864 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.descriptor_sets
[i
], &user_sgpr_idx
, 2);
866 ctx
->descriptor_sets
[i
] = NULL
;
869 uint32_t desc_sgpr_idx
= user_sgpr_idx
;
870 set_userdata_location_shader(ctx
, AC_UD_INDIRECT_DESCRIPTOR_SETS
, &user_sgpr_idx
, 2);
872 for (unsigned i
= 0; i
< num_sets
; ++i
) {
873 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
874 set_userdata_location_indirect(&ctx
->shader_info
->user_sgprs_locs
.descriptor_sets
[i
], desc_sgpr_idx
, 2, i
* 8);
875 ctx
->descriptor_sets
[i
] = ac_build_indexed_load_const(&ctx
->ac
, desc_sets
, LLVMConstInt(ctx
->i32
, i
, false));
878 ctx
->descriptor_sets
[i
] = NULL
;
880 ctx
->shader_info
->need_indirect_descriptor_sets
= true;
883 if (ctx
->shader_info
->info
.needs_push_constants
) {
884 set_userdata_location_shader(ctx
, AC_UD_PUSH_CONSTANTS
, &user_sgpr_idx
, 2);
887 switch (ctx
->stage
) {
888 case MESA_SHADER_COMPUTE
:
889 if (ctx
->shader_info
->info
.cs
.grid_components_used
) {
890 set_userdata_location_shader(ctx
, AC_UD_CS_GRID_SIZE
, &user_sgpr_idx
, ctx
->shader_info
->info
.cs
.grid_components_used
);
893 case MESA_SHADER_VERTEX
:
894 if (!ctx
->is_gs_copy_shader
) {
895 if (ctx
->shader_info
->info
.vs
.has_vertex_buffers
) {
896 set_userdata_location_shader(ctx
, AC_UD_VS_VERTEX_BUFFERS
, &user_sgpr_idx
, 2);
899 if (ctx
->shader_info
->info
.vs
.needs_draw_id
)
902 set_userdata_location_shader(ctx
, AC_UD_VS_BASE_VERTEX_START_INSTANCE
, &user_sgpr_idx
, vs_num
);
904 if (ctx
->options
->key
.vs
.as_ls
) {
905 set_userdata_location_shader(ctx
, AC_UD_VS_LS_TCS_IN_LAYOUT
, &user_sgpr_idx
, 1);
907 if (ctx
->options
->key
.vs
.as_ls
)
908 declare_tess_lds(ctx
);
910 case MESA_SHADER_TESS_CTRL
:
911 set_userdata_location_shader(ctx
, AC_UD_TCS_OFFCHIP_LAYOUT
, &user_sgpr_idx
, 4);
912 declare_tess_lds(ctx
);
914 case MESA_SHADER_TESS_EVAL
:
915 set_userdata_location_shader(ctx
, AC_UD_TES_OFFCHIP_LAYOUT
, &user_sgpr_idx
, 1);
917 case MESA_SHADER_GEOMETRY
:
918 set_userdata_location_shader(ctx
, AC_UD_GS_VS_RING_STRIDE_ENTRIES
, &user_sgpr_idx
, 2);
920 case MESA_SHADER_FRAGMENT
:
921 if (ctx
->shader_info
->info
.ps
.needs_sample_positions
) {
922 set_userdata_location_shader(ctx
, AC_UD_PS_SAMPLE_POS_OFFSET
, &user_sgpr_idx
, 1);
926 unreachable("Shader stage not implemented");
930 static void setup_types(struct nir_to_llvm_context
*ctx
)
932 LLVMValueRef args
[4];
934 ctx
->voidt
= LLVMVoidTypeInContext(ctx
->context
);
935 ctx
->i1
= LLVMIntTypeInContext(ctx
->context
, 1);
936 ctx
->i8
= LLVMIntTypeInContext(ctx
->context
, 8);
937 ctx
->i16
= LLVMIntTypeInContext(ctx
->context
, 16);
938 ctx
->i32
= LLVMIntTypeInContext(ctx
->context
, 32);
939 ctx
->i64
= LLVMIntTypeInContext(ctx
->context
, 64);
940 ctx
->v2i32
= LLVMVectorType(ctx
->i32
, 2);
941 ctx
->v3i32
= LLVMVectorType(ctx
->i32
, 3);
942 ctx
->v4i32
= LLVMVectorType(ctx
->i32
, 4);
943 ctx
->v8i32
= LLVMVectorType(ctx
->i32
, 8);
944 ctx
->f32
= LLVMFloatTypeInContext(ctx
->context
);
945 ctx
->f16
= LLVMHalfTypeInContext(ctx
->context
);
946 ctx
->f64
= LLVMDoubleTypeInContext(ctx
->context
);
947 ctx
->v2f32
= LLVMVectorType(ctx
->f32
, 2);
948 ctx
->v4f32
= LLVMVectorType(ctx
->f32
, 4);
949 ctx
->v16i8
= LLVMVectorType(ctx
->i8
, 16);
951 ctx
->i1false
= LLVMConstInt(ctx
->i1
, 0, false);
952 ctx
->i1true
= LLVMConstInt(ctx
->i1
, 1, false);
953 ctx
->i32zero
= LLVMConstInt(ctx
->i32
, 0, false);
954 ctx
->i32one
= LLVMConstInt(ctx
->i32
, 1, false);
955 ctx
->f32zero
= LLVMConstReal(ctx
->f32
, 0.0);
956 ctx
->f32one
= LLVMConstReal(ctx
->f32
, 1.0);
958 args
[0] = ctx
->f32zero
;
959 args
[1] = ctx
->f32zero
;
960 args
[2] = ctx
->f32zero
;
961 args
[3] = ctx
->f32one
;
962 ctx
->v4f32empty
= LLVMConstVector(args
, 4);
964 ctx
->uniform_md_kind
=
965 LLVMGetMDKindIDInContext(ctx
->context
, "amdgpu.uniform", 14);
966 ctx
->empty_md
= LLVMMDNodeInContext(ctx
->context
, NULL
, 0);
968 args
[0] = LLVMConstReal(ctx
->f32
, 2.5);
971 static int get_llvm_num_components(LLVMValueRef value
)
973 LLVMTypeRef type
= LLVMTypeOf(value
);
974 unsigned num_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
975 ? LLVMGetVectorSize(type
)
977 return num_components
;
980 static LLVMValueRef
llvm_extract_elem(struct nir_to_llvm_context
*ctx
,
984 int count
= get_llvm_num_components(value
);
986 assert(index
< count
);
990 return LLVMBuildExtractElement(ctx
->builder
, value
,
991 LLVMConstInt(ctx
->i32
, index
, false), "");
994 static LLVMValueRef
trim_vector(struct nir_to_llvm_context
*ctx
,
995 LLVMValueRef value
, unsigned count
)
997 unsigned num_components
= get_llvm_num_components(value
);
998 if (count
== num_components
)
1001 LLVMValueRef masks
[] = {
1002 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
1003 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false)};
1006 return LLVMBuildExtractElement(ctx
->builder
, value
, masks
[0],
1009 LLVMValueRef swizzle
= LLVMConstVector(masks
, count
);
1010 return LLVMBuildShuffleVector(ctx
->builder
, value
, value
, swizzle
, "");
1014 build_store_values_extended(struct nir_to_llvm_context
*ctx
,
1015 LLVMValueRef
*values
,
1016 unsigned value_count
,
1017 unsigned value_stride
,
1020 LLVMBuilderRef builder
= ctx
->builder
;
1023 if (value_count
== 1) {
1024 LLVMBuildStore(builder
, vec
, values
[0]);
1028 for (i
= 0; i
< value_count
; i
++) {
1029 LLVMValueRef ptr
= values
[i
* value_stride
];
1030 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, i
, false);
1031 LLVMValueRef value
= LLVMBuildExtractElement(builder
, vec
, index
, "");
1032 LLVMBuildStore(builder
, value
, ptr
);
1036 static LLVMTypeRef
get_def_type(struct nir_to_llvm_context
*ctx
,
1037 const nir_ssa_def
*def
)
1039 LLVMTypeRef type
= LLVMIntTypeInContext(ctx
->context
, def
->bit_size
);
1040 if (def
->num_components
> 1) {
1041 type
= LLVMVectorType(type
, def
->num_components
);
1046 static LLVMValueRef
get_src(struct nir_to_llvm_context
*ctx
, nir_src src
)
1049 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, src
.ssa
);
1050 return (LLVMValueRef
)entry
->data
;
1054 static LLVMBasicBlockRef
get_block(struct nir_to_llvm_context
*ctx
,
1055 const struct nir_block
*b
)
1057 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, b
);
1058 return (LLVMBasicBlockRef
)entry
->data
;
1061 static LLVMValueRef
get_alu_src(struct nir_to_llvm_context
*ctx
,
1063 unsigned num_components
)
1065 LLVMValueRef value
= get_src(ctx
, src
.src
);
1066 bool need_swizzle
= false;
1069 LLVMTypeRef type
= LLVMTypeOf(value
);
1070 unsigned src_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
1071 ? LLVMGetVectorSize(type
)
1074 for (unsigned i
= 0; i
< num_components
; ++i
) {
1075 assert(src
.swizzle
[i
] < src_components
);
1076 if (src
.swizzle
[i
] != i
)
1077 need_swizzle
= true;
1080 if (need_swizzle
|| num_components
!= src_components
) {
1081 LLVMValueRef masks
[] = {
1082 LLVMConstInt(ctx
->i32
, src
.swizzle
[0], false),
1083 LLVMConstInt(ctx
->i32
, src
.swizzle
[1], false),
1084 LLVMConstInt(ctx
->i32
, src
.swizzle
[2], false),
1085 LLVMConstInt(ctx
->i32
, src
.swizzle
[3], false)};
1087 if (src_components
> 1 && num_components
== 1) {
1088 value
= LLVMBuildExtractElement(ctx
->builder
, value
,
1090 } else if (src_components
== 1 && num_components
> 1) {
1091 LLVMValueRef values
[] = {value
, value
, value
, value
};
1092 value
= ac_build_gather_values(&ctx
->ac
, values
, num_components
);
1094 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
1095 value
= LLVMBuildShuffleVector(ctx
->builder
, value
, value
,
1099 assert(!src
.negate
);
1104 static LLVMValueRef
emit_int_cmp(struct nir_to_llvm_context
*ctx
,
1105 LLVMIntPredicate pred
, LLVMValueRef src0
,
1108 LLVMValueRef result
= LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, "");
1109 return LLVMBuildSelect(ctx
->builder
, result
,
1110 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
1111 LLVMConstInt(ctx
->i32
, 0, false), "");
1114 static LLVMValueRef
emit_float_cmp(struct nir_to_llvm_context
*ctx
,
1115 LLVMRealPredicate pred
, LLVMValueRef src0
,
1118 LLVMValueRef result
;
1119 src0
= to_float(&ctx
->ac
, src0
);
1120 src1
= to_float(&ctx
->ac
, src1
);
1121 result
= LLVMBuildFCmp(ctx
->builder
, pred
, src0
, src1
, "");
1122 return LLVMBuildSelect(ctx
->builder
, result
,
1123 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
1124 LLVMConstInt(ctx
->i32
, 0, false), "");
1127 static LLVMValueRef
emit_intrin_1f_param(struct nir_to_llvm_context
*ctx
,
1129 LLVMTypeRef result_type
,
1133 LLVMValueRef params
[] = {
1134 to_float(&ctx
->ac
, src0
),
1137 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(&ctx
->ac
, result_type
));
1138 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 1, AC_FUNC_ATTR_READNONE
);
1141 static LLVMValueRef
emit_intrin_2f_param(struct nir_to_llvm_context
*ctx
,
1143 LLVMTypeRef result_type
,
1144 LLVMValueRef src0
, LLVMValueRef src1
)
1147 LLVMValueRef params
[] = {
1148 to_float(&ctx
->ac
, src0
),
1149 to_float(&ctx
->ac
, src1
),
1152 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(&ctx
->ac
, result_type
));
1153 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 2, AC_FUNC_ATTR_READNONE
);
1156 static LLVMValueRef
emit_intrin_3f_param(struct nir_to_llvm_context
*ctx
,
1158 LLVMTypeRef result_type
,
1159 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
1162 LLVMValueRef params
[] = {
1163 to_float(&ctx
->ac
, src0
),
1164 to_float(&ctx
->ac
, src1
),
1165 to_float(&ctx
->ac
, src2
),
1168 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(&ctx
->ac
, result_type
));
1169 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 3, AC_FUNC_ATTR_READNONE
);
1172 static LLVMValueRef
emit_bcsel(struct nir_to_llvm_context
*ctx
,
1173 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
1175 LLVMValueRef v
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, src0
,
1177 return LLVMBuildSelect(ctx
->builder
, v
, src1
, src2
, "");
1180 static LLVMValueRef
emit_find_lsb(struct nir_to_llvm_context
*ctx
,
1183 LLVMValueRef params
[2] = {
1186 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
1187 * add special code to check for x=0. The reason is that
1188 * the LLVM behavior for x=0 is different from what we
1191 * The hardware already implements the correct behavior.
1193 LLVMConstInt(ctx
->i1
, 1, false),
1195 return ac_build_intrinsic(&ctx
->ac
, "llvm.cttz.i32", ctx
->i32
, params
, 2, AC_FUNC_ATTR_READNONE
);
1198 static LLVMValueRef
emit_ifind_msb(struct nir_to_llvm_context
*ctx
,
1201 return ac_build_imsb(&ctx
->ac
, src0
, ctx
->i32
);
1204 static LLVMValueRef
emit_ufind_msb(struct nir_to_llvm_context
*ctx
,
1207 return ac_build_umsb(&ctx
->ac
, src0
, ctx
->i32
);
1210 static LLVMValueRef
emit_minmax_int(struct nir_to_llvm_context
*ctx
,
1211 LLVMIntPredicate pred
,
1212 LLVMValueRef src0
, LLVMValueRef src1
)
1214 return LLVMBuildSelect(ctx
->builder
,
1215 LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, ""),
1220 static LLVMValueRef
emit_iabs(struct nir_to_llvm_context
*ctx
,
1223 return emit_minmax_int(ctx
, LLVMIntSGT
, src0
,
1224 LLVMBuildNeg(ctx
->builder
, src0
, ""));
1227 static LLVMValueRef
emit_fsign(struct nir_to_llvm_context
*ctx
,
1230 LLVMValueRef cmp
, val
;
1232 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGT
, src0
, ctx
->f32zero
, "");
1233 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->f32one
, src0
, "");
1234 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
, val
, ctx
->f32zero
, "");
1235 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstReal(ctx
->f32
, -1.0), "");
1239 static LLVMValueRef
emit_isign(struct nir_to_llvm_context
*ctx
,
1242 LLVMValueRef cmp
, val
;
1244 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGT
, src0
, ctx
->i32zero
, "");
1245 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->i32one
, src0
, "");
1246 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGE
, val
, ctx
->i32zero
, "");
1247 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstInt(ctx
->i32
, -1, true), "");
1251 static LLVMValueRef
emit_ffract(struct nir_to_llvm_context
*ctx
,
1254 const char *intr
= "llvm.floor.f32";
1255 LLVMValueRef fsrc0
= to_float(&ctx
->ac
, src0
);
1256 LLVMValueRef params
[] = {
1259 LLVMValueRef floor
= ac_build_intrinsic(&ctx
->ac
, intr
,
1260 ctx
->f32
, params
, 1,
1261 AC_FUNC_ATTR_READNONE
);
1262 return LLVMBuildFSub(ctx
->builder
, fsrc0
, floor
, "");
1265 static LLVMValueRef
emit_uint_carry(struct nir_to_llvm_context
*ctx
,
1267 LLVMValueRef src0
, LLVMValueRef src1
)
1269 LLVMTypeRef ret_type
;
1270 LLVMTypeRef types
[] = { ctx
->i32
, ctx
->i1
};
1272 LLVMValueRef params
[] = { src0
, src1
};
1273 ret_type
= LLVMStructTypeInContext(ctx
->context
, types
,
1276 res
= ac_build_intrinsic(&ctx
->ac
, intrin
, ret_type
,
1277 params
, 2, AC_FUNC_ATTR_READNONE
);
1279 res
= LLVMBuildExtractValue(ctx
->builder
, res
, 1, "");
1280 res
= LLVMBuildZExt(ctx
->builder
, res
, ctx
->i32
, "");
1284 static LLVMValueRef
emit_b2f(struct nir_to_llvm_context
*ctx
,
1287 return LLVMBuildAnd(ctx
->builder
, src0
, LLVMBuildBitCast(ctx
->builder
, LLVMConstReal(ctx
->f32
, 1.0), ctx
->i32
, ""), "");
1290 static LLVMValueRef
emit_b2i(struct ac_llvm_context
*ctx
,
1293 return LLVMBuildAnd(ctx
->builder
, src0
, ctx
->i32_1
, "");
1296 static LLVMValueRef
emit_i2b(struct ac_llvm_context
*ctx
,
1299 return LLVMBuildSExt(ctx
->builder
,
1300 LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, src0
, ctx
->i32_0
, ""),
1304 static LLVMValueRef
emit_f2f16(struct nir_to_llvm_context
*ctx
,
1307 LLVMValueRef result
;
1310 src0
= to_float(&ctx
->ac
, src0
);
1311 result
= LLVMBuildFPTrunc(ctx
->builder
, src0
, ctx
->f16
, "");
1313 /* TODO SI/CIK options here */
1314 if (ctx
->options
->chip_class
>= VI
) {
1315 LLVMValueRef args
[2];
1316 /* Check if the result is a denormal - and flush to 0 if so. */
1318 args
[1] = LLVMConstInt(ctx
->i32
, N_SUBNORMAL
| P_SUBNORMAL
, false);
1319 cond
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.class.f16", ctx
->i1
, args
, 2, AC_FUNC_ATTR_READNONE
);
1322 /* need to convert back up to f32 */
1323 result
= LLVMBuildFPExt(ctx
->builder
, result
, ctx
->f32
, "");
1325 if (ctx
->options
->chip_class
>= VI
)
1326 result
= LLVMBuildSelect(ctx
->builder
, cond
, ctx
->f32zero
, result
, "");
1331 static LLVMValueRef
emit_umul_high(struct nir_to_llvm_context
*ctx
,
1332 LLVMValueRef src0
, LLVMValueRef src1
)
1334 LLVMValueRef dst64
, result
;
1335 src0
= LLVMBuildZExt(ctx
->builder
, src0
, ctx
->i64
, "");
1336 src1
= LLVMBuildZExt(ctx
->builder
, src1
, ctx
->i64
, "");
1338 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1339 dst64
= LLVMBuildLShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1340 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1344 static LLVMValueRef
emit_imul_high(struct nir_to_llvm_context
*ctx
,
1345 LLVMValueRef src0
, LLVMValueRef src1
)
1347 LLVMValueRef dst64
, result
;
1348 src0
= LLVMBuildSExt(ctx
->builder
, src0
, ctx
->i64
, "");
1349 src1
= LLVMBuildSExt(ctx
->builder
, src1
, ctx
->i64
, "");
1351 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1352 dst64
= LLVMBuildAShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1353 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1357 static LLVMValueRef
emit_bitfield_extract(struct nir_to_llvm_context
*ctx
,
1359 const LLVMValueRef srcs
[3])
1361 LLVMValueRef result
;
1362 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, srcs
[2], LLVMConstInt(ctx
->i32
, 32, false), "");
1364 result
= ac_build_bfe(&ctx
->ac
, srcs
[0], srcs
[1], srcs
[2], is_signed
);
1365 result
= LLVMBuildSelect(ctx
->builder
, icond
, srcs
[0], result
, "");
1369 static LLVMValueRef
emit_bitfield_insert(struct nir_to_llvm_context
*ctx
,
1370 LLVMValueRef src0
, LLVMValueRef src1
,
1371 LLVMValueRef src2
, LLVMValueRef src3
)
1373 LLVMValueRef bfi_args
[3], result
;
1375 bfi_args
[0] = LLVMBuildShl(ctx
->builder
,
1376 LLVMBuildSub(ctx
->builder
,
1377 LLVMBuildShl(ctx
->builder
,
1382 bfi_args
[1] = LLVMBuildShl(ctx
->builder
, src1
, src2
, "");
1385 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, src3
, LLVMConstInt(ctx
->i32
, 32, false), "");
1388 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
1389 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
1391 result
= LLVMBuildXor(ctx
->builder
, bfi_args
[2],
1392 LLVMBuildAnd(ctx
->builder
, bfi_args
[0],
1393 LLVMBuildXor(ctx
->builder
, bfi_args
[1], bfi_args
[2], ""), ""), "");
1395 result
= LLVMBuildSelect(ctx
->builder
, icond
, src1
, result
, "");
1399 static LLVMValueRef
emit_pack_half_2x16(struct nir_to_llvm_context
*ctx
,
1402 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1404 LLVMValueRef comp
[2];
1406 src0
= to_float(&ctx
->ac
, src0
);
1407 comp
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, "");
1408 comp
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, "");
1409 for (i
= 0; i
< 2; i
++) {
1410 comp
[i
] = LLVMBuildFPTrunc(ctx
->builder
, comp
[i
], ctx
->f16
, "");
1411 comp
[i
] = LLVMBuildBitCast(ctx
->builder
, comp
[i
], ctx
->i16
, "");
1412 comp
[i
] = LLVMBuildZExt(ctx
->builder
, comp
[i
], ctx
->i32
, "");
1415 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
1416 comp
[0] = LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
1421 static LLVMValueRef
emit_unpack_half_2x16(struct nir_to_llvm_context
*ctx
,
1424 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1425 LLVMValueRef temps
[2], result
, val
;
1428 for (i
= 0; i
< 2; i
++) {
1429 val
= i
== 1 ? LLVMBuildLShr(ctx
->builder
, src0
, const16
, "") : src0
;
1430 val
= LLVMBuildTrunc(ctx
->builder
, val
, ctx
->i16
, "");
1431 val
= LLVMBuildBitCast(ctx
->builder
, val
, ctx
->f16
, "");
1432 temps
[i
] = LLVMBuildFPExt(ctx
->builder
, val
, ctx
->f32
, "");
1435 result
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), temps
[0],
1437 result
= LLVMBuildInsertElement(ctx
->builder
, result
, temps
[1],
1442 static LLVMValueRef
emit_ddxy(struct nir_to_llvm_context
*ctx
,
1448 LLVMValueRef result
;
1449 ctx
->has_ddxy
= true;
1451 if (!ctx
->lds
&& !ctx
->has_ds_bpermute
)
1452 ctx
->lds
= LLVMAddGlobalInAddressSpace(ctx
->module
,
1453 LLVMArrayType(ctx
->i32
, 64),
1454 "ddxy_lds", LOCAL_ADDR_SPACE
);
1456 if (op
== nir_op_fddx_fine
|| op
== nir_op_fddx
)
1457 mask
= AC_TID_MASK_LEFT
;
1458 else if (op
== nir_op_fddy_fine
|| op
== nir_op_fddy
)
1459 mask
= AC_TID_MASK_TOP
;
1461 mask
= AC_TID_MASK_TOP_LEFT
;
1463 /* for DDX we want to next X pixel, DDY next Y pixel. */
1464 if (op
== nir_op_fddx_fine
||
1465 op
== nir_op_fddx_coarse
||
1471 result
= ac_build_ddxy(&ctx
->ac
, ctx
->has_ds_bpermute
,
1472 mask
, idx
, ctx
->lds
,
1478 * this takes an I,J coordinate pair,
1479 * and works out the X and Y derivatives.
1480 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
1482 static LLVMValueRef
emit_ddxy_interp(
1483 struct nir_to_llvm_context
*ctx
,
1484 LLVMValueRef interp_ij
)
1486 LLVMValueRef result
[4], a
;
1489 for (i
= 0; i
< 2; i
++) {
1490 a
= LLVMBuildExtractElement(ctx
->builder
, interp_ij
,
1491 LLVMConstInt(ctx
->i32
, i
, false), "");
1492 result
[i
] = emit_ddxy(ctx
, nir_op_fddx
, a
);
1493 result
[2+i
] = emit_ddxy(ctx
, nir_op_fddy
, a
);
1495 return ac_build_gather_values(&ctx
->ac
, result
, 4);
1498 static void visit_alu(struct nir_to_llvm_context
*ctx
, const nir_alu_instr
*instr
)
1500 LLVMValueRef src
[4], result
= NULL
;
1501 unsigned num_components
= instr
->dest
.dest
.ssa
.num_components
;
1502 unsigned src_components
;
1503 LLVMTypeRef def_type
= get_def_type(ctx
, &instr
->dest
.dest
.ssa
);
1505 assert(nir_op_infos
[instr
->op
].num_inputs
<= ARRAY_SIZE(src
));
1506 switch (instr
->op
) {
1512 case nir_op_pack_half_2x16
:
1515 case nir_op_unpack_half_2x16
:
1519 src_components
= num_components
;
1522 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1523 src
[i
] = get_alu_src(ctx
, instr
->src
[i
], src_components
);
1525 switch (instr
->op
) {
1531 src
[0] = to_float(&ctx
->ac
, src
[0]);
1532 result
= LLVMBuildFNeg(ctx
->builder
, src
[0], "");
1535 result
= LLVMBuildNeg(ctx
->builder
, src
[0], "");
1538 result
= LLVMBuildNot(ctx
->builder
, src
[0], "");
1541 result
= LLVMBuildAdd(ctx
->builder
, src
[0], src
[1], "");
1544 src
[0] = to_float(&ctx
->ac
, src
[0]);
1545 src
[1] = to_float(&ctx
->ac
, src
[1]);
1546 result
= LLVMBuildFAdd(ctx
->builder
, src
[0], src
[1], "");
1549 src
[0] = to_float(&ctx
->ac
, src
[0]);
1550 src
[1] = to_float(&ctx
->ac
, src
[1]);
1551 result
= LLVMBuildFSub(ctx
->builder
, src
[0], src
[1], "");
1554 result
= LLVMBuildSub(ctx
->builder
, src
[0], src
[1], "");
1557 result
= LLVMBuildMul(ctx
->builder
, src
[0], src
[1], "");
1560 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1563 result
= LLVMBuildURem(ctx
->builder
, src
[0], src
[1], "");
1566 src
[0] = to_float(&ctx
->ac
, src
[0]);
1567 src
[1] = to_float(&ctx
->ac
, src
[1]);
1568 result
= ac_build_fdiv(&ctx
->ac
, src
[0], src
[1]);
1569 result
= emit_intrin_1f_param(ctx
, "llvm.floor",
1570 to_float_type(&ctx
->ac
, def_type
), result
);
1571 result
= LLVMBuildFMul(ctx
->builder
, src
[1] , result
, "");
1572 result
= LLVMBuildFSub(ctx
->builder
, src
[0], result
, "");
1575 src
[0] = to_float(&ctx
->ac
, src
[0]);
1576 src
[1] = to_float(&ctx
->ac
, src
[1]);
1577 result
= LLVMBuildFRem(ctx
->builder
, src
[0], src
[1], "");
1580 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1583 result
= LLVMBuildSDiv(ctx
->builder
, src
[0], src
[1], "");
1586 result
= LLVMBuildUDiv(ctx
->builder
, src
[0], src
[1], "");
1589 src
[0] = to_float(&ctx
->ac
, src
[0]);
1590 src
[1] = to_float(&ctx
->ac
, src
[1]);
1591 result
= LLVMBuildFMul(ctx
->builder
, src
[0], src
[1], "");
1594 src
[0] = to_float(&ctx
->ac
, src
[0]);
1595 src
[1] = to_float(&ctx
->ac
, src
[1]);
1596 result
= ac_build_fdiv(&ctx
->ac
, src
[0], src
[1]);
1599 src
[0] = to_float(&ctx
->ac
, src
[0]);
1600 result
= ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, src
[0]);
1603 result
= LLVMBuildAnd(ctx
->builder
, src
[0], src
[1], "");
1606 result
= LLVMBuildOr(ctx
->builder
, src
[0], src
[1], "");
1609 result
= LLVMBuildXor(ctx
->builder
, src
[0], src
[1], "");
1612 result
= LLVMBuildShl(ctx
->builder
, src
[0], src
[1], "");
1615 result
= LLVMBuildAShr(ctx
->builder
, src
[0], src
[1], "");
1618 result
= LLVMBuildLShr(ctx
->builder
, src
[0], src
[1], "");
1621 result
= emit_int_cmp(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1624 result
= emit_int_cmp(ctx
, LLVMIntNE
, src
[0], src
[1]);
1627 result
= emit_int_cmp(ctx
, LLVMIntEQ
, src
[0], src
[1]);
1630 result
= emit_int_cmp(ctx
, LLVMIntSGE
, src
[0], src
[1]);
1633 result
= emit_int_cmp(ctx
, LLVMIntULT
, src
[0], src
[1]);
1636 result
= emit_int_cmp(ctx
, LLVMIntUGE
, src
[0], src
[1]);
1639 result
= emit_float_cmp(ctx
, LLVMRealUEQ
, src
[0], src
[1]);
1642 result
= emit_float_cmp(ctx
, LLVMRealUNE
, src
[0], src
[1]);
1645 result
= emit_float_cmp(ctx
, LLVMRealULT
, src
[0], src
[1]);
1648 result
= emit_float_cmp(ctx
, LLVMRealUGE
, src
[0], src
[1]);
1651 result
= emit_intrin_1f_param(ctx
, "llvm.fabs",
1652 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1655 result
= emit_iabs(ctx
, src
[0]);
1658 result
= emit_minmax_int(ctx
, LLVMIntSGT
, src
[0], src
[1]);
1661 result
= emit_minmax_int(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1664 result
= emit_minmax_int(ctx
, LLVMIntUGT
, src
[0], src
[1]);
1667 result
= emit_minmax_int(ctx
, LLVMIntULT
, src
[0], src
[1]);
1670 result
= emit_isign(ctx
, src
[0]);
1673 src
[0] = to_float(&ctx
->ac
, src
[0]);
1674 result
= emit_fsign(ctx
, src
[0]);
1677 result
= emit_intrin_1f_param(ctx
, "llvm.floor",
1678 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1681 result
= emit_intrin_1f_param(ctx
, "llvm.trunc",
1682 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1685 result
= emit_intrin_1f_param(ctx
, "llvm.ceil",
1686 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1688 case nir_op_fround_even
:
1689 result
= emit_intrin_1f_param(ctx
, "llvm.rint",
1690 to_float_type(&ctx
->ac
, def_type
),src
[0]);
1693 result
= emit_ffract(ctx
, src
[0]);
1696 result
= emit_intrin_1f_param(ctx
, "llvm.sin",
1697 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1700 result
= emit_intrin_1f_param(ctx
, "llvm.cos",
1701 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1704 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt",
1705 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1708 result
= emit_intrin_1f_param(ctx
, "llvm.exp2",
1709 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1712 result
= emit_intrin_1f_param(ctx
, "llvm.log2",
1713 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1716 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt",
1717 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1718 result
= ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, result
);
1721 result
= emit_intrin_2f_param(ctx
, "llvm.pow",
1722 to_float_type(&ctx
->ac
, def_type
), src
[0], src
[1]);
1725 result
= emit_intrin_2f_param(ctx
, "llvm.maxnum",
1726 to_float_type(&ctx
->ac
, def_type
), src
[0], src
[1]);
1727 if (instr
->dest
.dest
.ssa
.bit_size
== 32)
1728 result
= emit_intrin_1f_param(ctx
, "llvm.canonicalize",
1729 to_float_type(&ctx
->ac
, def_type
),
1733 result
= emit_intrin_2f_param(ctx
, "llvm.minnum",
1734 to_float_type(&ctx
->ac
, def_type
), src
[0], src
[1]);
1735 if (instr
->dest
.dest
.ssa
.bit_size
== 32)
1736 result
= emit_intrin_1f_param(ctx
, "llvm.canonicalize",
1737 to_float_type(&ctx
->ac
, def_type
),
1741 result
= emit_intrin_3f_param(ctx
, "llvm.fma",
1742 to_float_type(&ctx
->ac
, def_type
), src
[0], src
[1], src
[2]);
1744 case nir_op_ibitfield_extract
:
1745 result
= emit_bitfield_extract(ctx
, true, src
);
1747 case nir_op_ubitfield_extract
:
1748 result
= emit_bitfield_extract(ctx
, false, src
);
1750 case nir_op_bitfield_insert
:
1751 result
= emit_bitfield_insert(ctx
, src
[0], src
[1], src
[2], src
[3]);
1753 case nir_op_bitfield_reverse
:
1754 result
= ac_build_intrinsic(&ctx
->ac
, "llvm.bitreverse.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1756 case nir_op_bit_count
:
1757 result
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1762 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1763 src
[i
] = to_integer(&ctx
->ac
, src
[i
]);
1764 result
= ac_build_gather_values(&ctx
->ac
, src
, num_components
);
1768 src
[0] = to_float(&ctx
->ac
, src
[0]);
1769 result
= LLVMBuildFPToSI(ctx
->builder
, src
[0], def_type
, "");
1773 src
[0] = to_float(&ctx
->ac
, src
[0]);
1774 result
= LLVMBuildFPToUI(ctx
->builder
, src
[0], def_type
, "");
1778 result
= LLVMBuildSIToFP(ctx
->builder
, src
[0], to_float_type(&ctx
->ac
, def_type
), "");
1782 result
= LLVMBuildUIToFP(ctx
->builder
, src
[0], to_float_type(&ctx
->ac
, def_type
), "");
1785 result
= LLVMBuildFPExt(ctx
->builder
, src
[0], to_float_type(&ctx
->ac
, def_type
), "");
1788 result
= LLVMBuildFPTrunc(ctx
->builder
, src
[0], to_float_type(&ctx
->ac
, def_type
), "");
1792 if (get_elem_bits(&ctx
->ac
, LLVMTypeOf(src
[0])) < get_elem_bits(&ctx
->ac
, def_type
))
1793 result
= LLVMBuildZExt(ctx
->builder
, src
[0], def_type
, "");
1795 result
= LLVMBuildTrunc(ctx
->builder
, src
[0], def_type
, "");
1799 if (get_elem_bits(&ctx
->ac
, LLVMTypeOf(src
[0])) < get_elem_bits(&ctx
->ac
, def_type
))
1800 result
= LLVMBuildSExt(ctx
->builder
, src
[0], def_type
, "");
1802 result
= LLVMBuildTrunc(ctx
->builder
, src
[0], def_type
, "");
1805 result
= emit_bcsel(ctx
, src
[0], src
[1], src
[2]);
1807 case nir_op_find_lsb
:
1808 result
= emit_find_lsb(ctx
, src
[0]);
1810 case nir_op_ufind_msb
:
1811 result
= emit_ufind_msb(ctx
, src
[0]);
1813 case nir_op_ifind_msb
:
1814 result
= emit_ifind_msb(ctx
, src
[0]);
1816 case nir_op_uadd_carry
:
1817 result
= emit_uint_carry(ctx
, "llvm.uadd.with.overflow.i32", src
[0], src
[1]);
1819 case nir_op_usub_borrow
:
1820 result
= emit_uint_carry(ctx
, "llvm.usub.with.overflow.i32", src
[0], src
[1]);
1823 result
= emit_b2f(ctx
, src
[0]);
1826 result
= emit_b2i(&ctx
->ac
, src
[0]);
1829 result
= emit_i2b(&ctx
->ac
, src
[0]);
1831 case nir_op_fquantize2f16
:
1832 result
= emit_f2f16(ctx
, src
[0]);
1834 case nir_op_umul_high
:
1835 result
= emit_umul_high(ctx
, src
[0], src
[1]);
1837 case nir_op_imul_high
:
1838 result
= emit_imul_high(ctx
, src
[0], src
[1]);
1840 case nir_op_pack_half_2x16
:
1841 result
= emit_pack_half_2x16(ctx
, src
[0]);
1843 case nir_op_unpack_half_2x16
:
1844 result
= emit_unpack_half_2x16(ctx
, src
[0]);
1848 case nir_op_fddx_fine
:
1849 case nir_op_fddy_fine
:
1850 case nir_op_fddx_coarse
:
1851 case nir_op_fddy_coarse
:
1852 result
= emit_ddxy(ctx
, instr
->op
, src
[0]);
1855 fprintf(stderr
, "Unknown NIR alu instr: ");
1856 nir_print_instr(&instr
->instr
, stderr
);
1857 fprintf(stderr
, "\n");
1862 assert(instr
->dest
.dest
.is_ssa
);
1863 result
= to_integer(&ctx
->ac
, result
);
1864 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.dest
.ssa
,
1869 static void visit_load_const(struct nir_to_llvm_context
*ctx
,
1870 const nir_load_const_instr
*instr
)
1872 LLVMValueRef values
[4], value
= NULL
;
1873 LLVMTypeRef element_type
=
1874 LLVMIntTypeInContext(ctx
->context
, instr
->def
.bit_size
);
1876 for (unsigned i
= 0; i
< instr
->def
.num_components
; ++i
) {
1877 switch (instr
->def
.bit_size
) {
1879 values
[i
] = LLVMConstInt(element_type
,
1880 instr
->value
.u32
[i
], false);
1883 values
[i
] = LLVMConstInt(element_type
,
1884 instr
->value
.u64
[i
], false);
1888 "unsupported nir load_const bit_size: %d\n",
1889 instr
->def
.bit_size
);
1893 if (instr
->def
.num_components
> 1) {
1894 value
= LLVMConstVector(values
, instr
->def
.num_components
);
1898 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, value
);
1901 static LLVMValueRef
cast_ptr(struct nir_to_llvm_context
*ctx
, LLVMValueRef ptr
,
1904 int addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
1905 return LLVMBuildBitCast(ctx
->builder
, ptr
,
1906 LLVMPointerType(type
, addr_space
), "");
1910 get_buffer_size(struct nir_to_llvm_context
*ctx
, LLVMValueRef descriptor
, bool in_elements
)
1913 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1914 LLVMConstInt(ctx
->i32
, 2, false), "");
1917 if (ctx
->options
->chip_class
>= VI
&& in_elements
) {
1918 /* On VI, the descriptor contains the size in bytes,
1919 * but TXQ must return the size in elements.
1920 * The stride is always non-zero for resources using TXQ.
1922 LLVMValueRef stride
=
1923 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1924 LLVMConstInt(ctx
->i32
, 1, false), "");
1925 stride
= LLVMBuildLShr(ctx
->builder
, stride
,
1926 LLVMConstInt(ctx
->i32
, 16, false), "");
1927 stride
= LLVMBuildAnd(ctx
->builder
, stride
,
1928 LLVMConstInt(ctx
->i32
, 0x3fff, false), "");
1930 size
= LLVMBuildUDiv(ctx
->builder
, size
, stride
, "");
1936 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
1939 static void build_int_type_name(
1941 char *buf
, unsigned bufsize
)
1943 assert(bufsize
>= 6);
1945 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
1946 snprintf(buf
, bufsize
, "v%ui32",
1947 LLVMGetVectorSize(type
));
1952 static LLVMValueRef
radv_lower_gather4_integer(struct nir_to_llvm_context
*ctx
,
1953 struct ac_image_args
*args
,
1954 const nir_tex_instr
*instr
)
1956 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
1957 LLVMValueRef coord
= args
->addr
;
1958 LLVMValueRef half_texel
[2];
1959 LLVMValueRef compare_cube_wa
;
1960 LLVMValueRef result
;
1962 unsigned coord_vgpr_index
= (unsigned)args
->offset
+ (unsigned)args
->compare
;
1966 struct ac_image_args txq_args
= { 0 };
1968 txq_args
.da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
1969 txq_args
.opcode
= ac_image_get_resinfo
;
1970 txq_args
.dmask
= 0xf;
1971 txq_args
.addr
= ctx
->i32zero
;
1972 txq_args
.resource
= args
->resource
;
1973 LLVMValueRef size
= ac_build_image_opcode(&ctx
->ac
, &txq_args
);
1975 for (c
= 0; c
< 2; c
++) {
1976 half_texel
[c
] = LLVMBuildExtractElement(ctx
->builder
, size
,
1977 LLVMConstInt(ctx
->i32
, c
, false), "");
1978 half_texel
[c
] = LLVMBuildUIToFP(ctx
->builder
, half_texel
[c
], ctx
->f32
, "");
1979 half_texel
[c
] = ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, half_texel
[c
]);
1980 half_texel
[c
] = LLVMBuildFMul(ctx
->builder
, half_texel
[c
],
1981 LLVMConstReal(ctx
->f32
, -0.5), "");
1985 LLVMValueRef orig_coords
= args
->addr
;
1987 for (c
= 0; c
< 2; c
++) {
1989 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
1990 tmp
= LLVMBuildExtractElement(ctx
->builder
, coord
, index
, "");
1991 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
1992 tmp
= LLVMBuildFAdd(ctx
->builder
, tmp
, half_texel
[c
], "");
1993 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
1994 coord
= LLVMBuildInsertElement(ctx
->builder
, coord
, tmp
, index
, "");
1999 * Apparantly cube has issue with integer types that the workaround doesn't solve,
2000 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
2001 * workaround by sampling using a scaled type and converting.
2002 * This is taken from amdgpu-pro shaders.
2004 /* NOTE this produces some ugly code compared to amdgpu-pro,
2005 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
2006 * and then reads them back. -pro generates two selects,
2007 * one s_cmp for the descriptor rewriting
2008 * one v_cmp for the coordinate and result changes.
2010 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
) {
2011 LLVMValueRef tmp
, tmp2
;
2013 /* workaround 8/8/8/8 uint/sint cube gather bug */
2014 /* first detect it then change to a scaled read and f2i */
2015 tmp
= LLVMBuildExtractElement(ctx
->builder
, args
->resource
, ctx
->i32one
, "");
2018 /* extract the DATA_FORMAT */
2019 tmp
= ac_build_bfe(&ctx
->ac
, tmp
, LLVMConstInt(ctx
->i32
, 20, false),
2020 LLVMConstInt(ctx
->i32
, 6, false), false);
2022 /* is the DATA_FORMAT == 8_8_8_8 */
2023 compare_cube_wa
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, tmp
, LLVMConstInt(ctx
->i32
, V_008F14_IMG_DATA_FORMAT_8_8_8_8
, false), "");
2025 if (stype
== GLSL_TYPE_UINT
)
2026 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
2027 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, LLVMConstInt(ctx
->i32
, 0x8000000, false),
2028 LLVMConstInt(ctx
->i32
, 0x10000000, false), "");
2030 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
2031 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, LLVMConstInt(ctx
->i32
, 0xc000000, false),
2032 LLVMConstInt(ctx
->i32
, 0x14000000, false), "");
2034 /* replace the NUM FORMAT in the descriptor */
2035 tmp2
= LLVMBuildAnd(ctx
->builder
, tmp2
, LLVMConstInt(ctx
->i32
, C_008F14_NUM_FORMAT_GFX6
, false), "");
2036 tmp2
= LLVMBuildOr(ctx
->builder
, tmp2
, tmp
, "");
2038 args
->resource
= LLVMBuildInsertElement(ctx
->builder
, args
->resource
, tmp2
, ctx
->i32one
, "");
2040 /* don't modify the coordinates for this case */
2041 coord
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, orig_coords
, coord
, "");
2044 result
= ac_build_image_opcode(&ctx
->ac
, args
);
2046 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
) {
2047 LLVMValueRef tmp
, tmp2
;
2049 /* if the cube workaround is in place, f2i the result. */
2050 for (c
= 0; c
< 4; c
++) {
2051 tmp
= LLVMBuildExtractElement(ctx
->builder
, result
, LLVMConstInt(ctx
->i32
, c
, false), "");
2052 if (stype
== GLSL_TYPE_UINT
)
2053 tmp2
= LLVMBuildFPToUI(ctx
->builder
, tmp
, ctx
->i32
, "");
2055 tmp2
= LLVMBuildFPToSI(ctx
->builder
, tmp
, ctx
->i32
, "");
2056 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
2057 tmp2
= LLVMBuildBitCast(ctx
->builder
, tmp2
, ctx
->i32
, "");
2058 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, tmp2
, tmp
, "");
2059 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
2060 result
= LLVMBuildInsertElement(ctx
->builder
, result
, tmp
, LLVMConstInt(ctx
->i32
, c
, false), "");
2066 static LLVMValueRef
build_tex_intrinsic(struct nir_to_llvm_context
*ctx
,
2067 const nir_tex_instr
*instr
,
2069 struct ac_image_args
*args
)
2071 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
2072 return ac_build_buffer_load_format(&ctx
->ac
,
2075 LLVMConstInt(ctx
->i32
, 0, false),
2079 args
->opcode
= ac_image_sample
;
2080 args
->compare
= instr
->is_shadow
;
2082 switch (instr
->op
) {
2084 case nir_texop_txf_ms
:
2085 case nir_texop_samples_identical
:
2086 args
->opcode
= instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
? ac_image_load
: ac_image_load_mip
;
2087 args
->compare
= false;
2088 args
->offset
= false;
2095 args
->level_zero
= true;
2100 case nir_texop_query_levels
:
2101 args
->opcode
= ac_image_get_resinfo
;
2104 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
2105 args
->level_zero
= true;
2111 args
->opcode
= ac_image_gather4
;
2112 args
->level_zero
= true;
2115 args
->opcode
= ac_image_get_lod
;
2116 args
->compare
= false;
2117 args
->offset
= false;
2123 if (instr
->op
== nir_texop_tg4
) {
2124 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
2125 if (stype
== GLSL_TYPE_UINT
|| stype
== GLSL_TYPE_INT
) {
2126 return radv_lower_gather4_integer(ctx
, args
, instr
);
2129 return ac_build_image_opcode(&ctx
->ac
, args
);
2132 static LLVMValueRef
visit_vulkan_resource_index(struct nir_to_llvm_context
*ctx
,
2133 nir_intrinsic_instr
*instr
)
2135 LLVMValueRef index
= get_src(ctx
, instr
->src
[0]);
2136 unsigned desc_set
= nir_intrinsic_desc_set(instr
);
2137 unsigned binding
= nir_intrinsic_binding(instr
);
2138 LLVMValueRef desc_ptr
= ctx
->descriptor_sets
[desc_set
];
2139 struct radv_pipeline_layout
*pipeline_layout
= ctx
->options
->layout
;
2140 struct radv_descriptor_set_layout
*layout
= pipeline_layout
->set
[desc_set
].layout
;
2141 unsigned base_offset
= layout
->binding
[binding
].offset
;
2142 LLVMValueRef offset
, stride
;
2144 if (layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
||
2145 layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
) {
2146 unsigned idx
= pipeline_layout
->set
[desc_set
].dynamic_offset_start
+
2147 layout
->binding
[binding
].dynamic_offset_offset
;
2148 desc_ptr
= ctx
->push_constants
;
2149 base_offset
= pipeline_layout
->push_constant_size
+ 16 * idx
;
2150 stride
= LLVMConstInt(ctx
->i32
, 16, false);
2152 stride
= LLVMConstInt(ctx
->i32
, layout
->binding
[binding
].size
, false);
2154 offset
= LLVMConstInt(ctx
->i32
, base_offset
, false);
2155 index
= LLVMBuildMul(ctx
->builder
, index
, stride
, "");
2156 offset
= LLVMBuildAdd(ctx
->builder
, offset
, index
, "");
2158 desc_ptr
= ac_build_gep0(&ctx
->ac
, desc_ptr
, offset
);
2159 desc_ptr
= cast_ptr(ctx
, desc_ptr
, ctx
->v4i32
);
2160 LLVMSetMetadata(desc_ptr
, ctx
->uniform_md_kind
, ctx
->empty_md
);
2162 return LLVMBuildLoad(ctx
->builder
, desc_ptr
, "");
2165 static LLVMValueRef
visit_load_push_constant(struct nir_to_llvm_context
*ctx
,
2166 nir_intrinsic_instr
*instr
)
2168 LLVMValueRef ptr
, addr
;
2170 addr
= LLVMConstInt(ctx
->i32
, nir_intrinsic_base(instr
), 0);
2171 addr
= LLVMBuildAdd(ctx
->builder
, addr
, get_src(ctx
, instr
->src
[0]), "");
2173 ptr
= ac_build_gep0(&ctx
->ac
, ctx
->push_constants
, addr
);
2174 ptr
= cast_ptr(ctx
, ptr
, get_def_type(ctx
, &instr
->dest
.ssa
));
2176 return LLVMBuildLoad(ctx
->builder
, ptr
, "");
2179 static LLVMValueRef
visit_get_buffer_size(struct nir_to_llvm_context
*ctx
,
2180 const nir_intrinsic_instr
*instr
)
2182 LLVMValueRef desc
= get_src(ctx
, instr
->src
[0]);
2184 return get_buffer_size(ctx
, desc
, false);
2186 static void visit_store_ssbo(struct nir_to_llvm_context
*ctx
,
2187 nir_intrinsic_instr
*instr
)
2189 const char *store_name
;
2190 LLVMValueRef src_data
= get_src(ctx
, instr
->src
[0]);
2191 LLVMTypeRef data_type
= ctx
->f32
;
2192 int elem_size_mult
= get_elem_bits(&ctx
->ac
, LLVMTypeOf(src_data
)) / 32;
2193 int components_32bit
= elem_size_mult
* instr
->num_components
;
2194 unsigned writemask
= nir_intrinsic_write_mask(instr
);
2195 LLVMValueRef base_data
, base_offset
;
2196 LLVMValueRef params
[6];
2198 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2199 ctx
->shader_info
->fs
.writes_memory
= true;
2201 params
[1] = get_src(ctx
, instr
->src
[1]);
2202 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
2203 params
[4] = ctx
->i1false
; /* glc */
2204 params
[5] = ctx
->i1false
; /* slc */
2206 if (components_32bit
> 1)
2207 data_type
= LLVMVectorType(ctx
->f32
, components_32bit
);
2209 base_data
= to_float(&ctx
->ac
, src_data
);
2210 base_data
= trim_vector(ctx
, base_data
, instr
->num_components
);
2211 base_data
= LLVMBuildBitCast(ctx
->builder
, base_data
,
2213 base_offset
= get_src(ctx
, instr
->src
[2]); /* voffset */
2217 LLVMValueRef offset
;
2219 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
2221 /* Due to an LLVM limitation, split 3-element writes
2222 * into a 2-element and a 1-element write. */
2224 writemask
|= 1 << (start
+ 2);
2228 start
*= elem_size_mult
;
2229 count
*= elem_size_mult
;
2232 writemask
|= ((1u << (count
- 4)) - 1u) << (start
+ 4);
2237 store_name
= "llvm.amdgcn.buffer.store.v4f32";
2239 } else if (count
== 2) {
2240 tmp
= LLVMBuildExtractElement(ctx
->builder
,
2241 base_data
, LLVMConstInt(ctx
->i32
, start
, false), "");
2242 data
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), tmp
,
2245 tmp
= LLVMBuildExtractElement(ctx
->builder
,
2246 base_data
, LLVMConstInt(ctx
->i32
, start
+ 1, false), "");
2247 data
= LLVMBuildInsertElement(ctx
->builder
, data
, tmp
,
2249 store_name
= "llvm.amdgcn.buffer.store.v2f32";
2253 if (get_llvm_num_components(base_data
) > 1)
2254 data
= LLVMBuildExtractElement(ctx
->builder
, base_data
,
2255 LLVMConstInt(ctx
->i32
, start
, false), "");
2258 store_name
= "llvm.amdgcn.buffer.store.f32";
2261 offset
= base_offset
;
2263 offset
= LLVMBuildAdd(ctx
->builder
, offset
, LLVMConstInt(ctx
->i32
, start
* 4, false), "");
2267 ac_build_intrinsic(&ctx
->ac
, store_name
,
2268 ctx
->voidt
, params
, 6, 0);
2272 static LLVMValueRef
visit_atomic_ssbo(struct nir_to_llvm_context
*ctx
,
2273 const nir_intrinsic_instr
*instr
)
2276 LLVMValueRef params
[6];
2278 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2279 ctx
->shader_info
->fs
.writes_memory
= true;
2281 if (instr
->intrinsic
== nir_intrinsic_ssbo_atomic_comp_swap
) {
2282 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[3]), 0);
2284 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[2]), 0);
2285 params
[arg_count
++] = get_src(ctx
, instr
->src
[0]);
2286 params
[arg_count
++] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
2287 params
[arg_count
++] = get_src(ctx
, instr
->src
[1]); /* voffset */
2288 params
[arg_count
++] = ctx
->i1false
; /* slc */
2290 switch (instr
->intrinsic
) {
2291 case nir_intrinsic_ssbo_atomic_add
:
2292 name
= "llvm.amdgcn.buffer.atomic.add";
2294 case nir_intrinsic_ssbo_atomic_imin
:
2295 name
= "llvm.amdgcn.buffer.atomic.smin";
2297 case nir_intrinsic_ssbo_atomic_umin
:
2298 name
= "llvm.amdgcn.buffer.atomic.umin";
2300 case nir_intrinsic_ssbo_atomic_imax
:
2301 name
= "llvm.amdgcn.buffer.atomic.smax";
2303 case nir_intrinsic_ssbo_atomic_umax
:
2304 name
= "llvm.amdgcn.buffer.atomic.umax";
2306 case nir_intrinsic_ssbo_atomic_and
:
2307 name
= "llvm.amdgcn.buffer.atomic.and";
2309 case nir_intrinsic_ssbo_atomic_or
:
2310 name
= "llvm.amdgcn.buffer.atomic.or";
2312 case nir_intrinsic_ssbo_atomic_xor
:
2313 name
= "llvm.amdgcn.buffer.atomic.xor";
2315 case nir_intrinsic_ssbo_atomic_exchange
:
2316 name
= "llvm.amdgcn.buffer.atomic.swap";
2318 case nir_intrinsic_ssbo_atomic_comp_swap
:
2319 name
= "llvm.amdgcn.buffer.atomic.cmpswap";
2325 return ac_build_intrinsic(&ctx
->ac
, name
, ctx
->i32
, params
, arg_count
, 0);
2328 static LLVMValueRef
visit_load_buffer(struct nir_to_llvm_context
*ctx
,
2329 const nir_intrinsic_instr
*instr
)
2331 LLVMValueRef results
[2];
2332 int load_components
;
2333 int num_components
= instr
->num_components
;
2334 if (instr
->dest
.ssa
.bit_size
== 64)
2335 num_components
*= 2;
2337 for (int i
= 0; i
< num_components
; i
+= load_components
) {
2338 load_components
= MIN2(num_components
- i
, 4);
2339 const char *load_name
;
2340 LLVMTypeRef data_type
= ctx
->f32
;
2341 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, i
* 4, false);
2342 offset
= LLVMBuildAdd(ctx
->builder
, get_src(ctx
, instr
->src
[1]), offset
, "");
2344 if (load_components
== 3)
2345 data_type
= LLVMVectorType(ctx
->f32
, 4);
2346 else if (load_components
> 1)
2347 data_type
= LLVMVectorType(ctx
->f32
, load_components
);
2349 if (load_components
>= 3)
2350 load_name
= "llvm.amdgcn.buffer.load.v4f32";
2351 else if (load_components
== 2)
2352 load_name
= "llvm.amdgcn.buffer.load.v2f32";
2353 else if (load_components
== 1)
2354 load_name
= "llvm.amdgcn.buffer.load.f32";
2356 unreachable("unhandled number of components");
2358 LLVMValueRef params
[] = {
2359 get_src(ctx
, instr
->src
[0]),
2360 LLVMConstInt(ctx
->i32
, 0, false),
2366 results
[i
] = ac_build_intrinsic(&ctx
->ac
, load_name
, data_type
, params
, 5, 0);
2370 LLVMValueRef ret
= results
[0];
2371 if (num_components
> 4 || num_components
== 3) {
2372 LLVMValueRef masks
[] = {
2373 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
2374 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false),
2375 LLVMConstInt(ctx
->i32
, 4, false), LLVMConstInt(ctx
->i32
, 5, false),
2376 LLVMConstInt(ctx
->i32
, 6, false), LLVMConstInt(ctx
->i32
, 7, false)
2379 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
2380 ret
= LLVMBuildShuffleVector(ctx
->builder
, results
[0],
2381 results
[num_components
> 4 ? 1 : 0], swizzle
, "");
2384 return LLVMBuildBitCast(ctx
->builder
, ret
,
2385 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2388 static LLVMValueRef
visit_load_ubo_buffer(struct nir_to_llvm_context
*ctx
,
2389 const nir_intrinsic_instr
*instr
)
2391 LLVMValueRef results
[8], ret
;
2392 LLVMValueRef rsrc
= get_src(ctx
, instr
->src
[0]);
2393 LLVMValueRef offset
= get_src(ctx
, instr
->src
[1]);
2394 int num_components
= instr
->num_components
;
2396 rsrc
= LLVMBuildBitCast(ctx
->builder
, rsrc
, LLVMVectorType(ctx
->i8
, 16), "");
2398 if (instr
->dest
.ssa
.bit_size
== 64)
2399 num_components
*= 2;
2401 for (unsigned i
= 0; i
< num_components
; ++i
) {
2402 LLVMValueRef params
[] = {
2404 LLVMBuildAdd(ctx
->builder
, LLVMConstInt(ctx
->i32
, 4 * i
, 0),
2407 results
[i
] = ac_build_intrinsic(&ctx
->ac
, "llvm.SI.load.const", ctx
->f32
,
2409 AC_FUNC_ATTR_READNONE
|
2410 AC_FUNC_ATTR_LEGACY
);
2414 ret
= ac_build_gather_values(&ctx
->ac
, results
, instr
->num_components
);
2415 return LLVMBuildBitCast(ctx
->builder
, ret
,
2416 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2420 radv_get_deref_offset(struct nir_to_llvm_context
*ctx
, nir_deref_var
*deref
,
2421 bool vs_in
, unsigned *vertex_index_out
,
2422 LLVMValueRef
*vertex_index_ref
,
2423 unsigned *const_out
, LLVMValueRef
*indir_out
)
2425 unsigned const_offset
= 0;
2426 nir_deref
*tail
= &deref
->deref
;
2427 LLVMValueRef offset
= NULL
;
2429 if (vertex_index_out
!= NULL
|| vertex_index_ref
!= NULL
) {
2431 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2432 if (vertex_index_out
)
2433 *vertex_index_out
= deref_array
->base_offset
;
2435 if (vertex_index_ref
) {
2436 LLVMValueRef vtx
= LLVMConstInt(ctx
->i32
, deref_array
->base_offset
, false);
2437 if (deref_array
->deref_array_type
== nir_deref_array_type_indirect
) {
2438 vtx
= LLVMBuildAdd(ctx
->builder
, vtx
, get_src(ctx
, deref_array
->indirect
), "");
2440 *vertex_index_ref
= vtx
;
2444 if (deref
->var
->data
.compact
) {
2445 assert(tail
->child
->deref_type
== nir_deref_type_array
);
2446 assert(glsl_type_is_scalar(glsl_without_array(deref
->var
->type
)));
2447 nir_deref_array
*deref_array
= nir_deref_as_array(tail
->child
);
2448 /* We always lower indirect dereferences for "compact" array vars. */
2449 assert(deref_array
->deref_array_type
== nir_deref_array_type_direct
);
2451 const_offset
= deref_array
->base_offset
;
2455 while (tail
->child
!= NULL
) {
2456 const struct glsl_type
*parent_type
= tail
->type
;
2459 if (tail
->deref_type
== nir_deref_type_array
) {
2460 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2461 LLVMValueRef index
, stride
, local_offset
;
2462 unsigned size
= glsl_count_attribute_slots(tail
->type
, vs_in
);
2464 const_offset
+= size
* deref_array
->base_offset
;
2465 if (deref_array
->deref_array_type
== nir_deref_array_type_direct
)
2468 assert(deref_array
->deref_array_type
== nir_deref_array_type_indirect
);
2469 index
= get_src(ctx
, deref_array
->indirect
);
2470 stride
= LLVMConstInt(ctx
->i32
, size
, 0);
2471 local_offset
= LLVMBuildMul(ctx
->builder
, stride
, index
, "");
2474 offset
= LLVMBuildAdd(ctx
->builder
, offset
, local_offset
, "");
2476 offset
= local_offset
;
2477 } else if (tail
->deref_type
== nir_deref_type_struct
) {
2478 nir_deref_struct
*deref_struct
= nir_deref_as_struct(tail
);
2480 for (unsigned i
= 0; i
< deref_struct
->index
; i
++) {
2481 const struct glsl_type
*ft
= glsl_get_struct_field(parent_type
, i
);
2482 const_offset
+= glsl_count_attribute_slots(ft
, vs_in
);
2485 unreachable("unsupported deref type");
2489 if (const_offset
&& offset
)
2490 offset
= LLVMBuildAdd(ctx
->builder
, offset
,
2491 LLVMConstInt(ctx
->i32
, const_offset
, 0),
2494 *const_out
= const_offset
;
2495 *indir_out
= offset
;
2499 lds_load(struct nir_to_llvm_context
*ctx
,
2500 LLVMValueRef dw_addr
)
2503 value
= ac_build_indexed_load(&ctx
->ac
, ctx
->lds
, dw_addr
, false);
2508 lds_store(struct nir_to_llvm_context
*ctx
,
2509 LLVMValueRef dw_addr
, LLVMValueRef value
)
2511 value
= LLVMBuildBitCast(ctx
->builder
, value
, ctx
->i32
, "");
2512 ac_build_indexed_store(&ctx
->ac
, ctx
->lds
,
2516 /* The offchip buffer layout for TCS->TES is
2518 * - attribute 0 of patch 0 vertex 0
2519 * - attribute 0 of patch 0 vertex 1
2520 * - attribute 0 of patch 0 vertex 2
2522 * - attribute 0 of patch 1 vertex 0
2523 * - attribute 0 of patch 1 vertex 1
2525 * - attribute 1 of patch 0 vertex 0
2526 * - attribute 1 of patch 0 vertex 1
2528 * - per patch attribute 0 of patch 0
2529 * - per patch attribute 0 of patch 1
2532 * Note that every attribute has 4 components.
2534 static LLVMValueRef
get_tcs_tes_buffer_address(struct nir_to_llvm_context
*ctx
,
2535 LLVMValueRef vertex_index
,
2536 LLVMValueRef param_index
)
2538 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
2539 LLVMValueRef param_stride
, constant16
;
2540 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
2542 vertices_per_patch
= unpack_param(ctx
, ctx
->tcs_offchip_layout
, 9, 6);
2543 num_patches
= unpack_param(ctx
, ctx
->tcs_offchip_layout
, 0, 9);
2544 total_vertices
= LLVMBuildMul(ctx
->builder
, vertices_per_patch
,
2547 constant16
= LLVMConstInt(ctx
->i32
, 16, false);
2549 base_addr
= LLVMBuildMul(ctx
->builder
, rel_patch_id
,
2550 vertices_per_patch
, "");
2552 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2555 param_stride
= total_vertices
;
2557 base_addr
= rel_patch_id
;
2558 param_stride
= num_patches
;
2561 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2562 LLVMBuildMul(ctx
->builder
, param_index
,
2563 param_stride
, ""), "");
2565 base_addr
= LLVMBuildMul(ctx
->builder
, base_addr
, constant16
, "");
2567 if (!vertex_index
) {
2568 LLVMValueRef patch_data_offset
=
2569 unpack_param(ctx
, ctx
->tcs_offchip_layout
, 16, 16);
2571 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2572 patch_data_offset
, "");
2577 static LLVMValueRef
get_tcs_tes_buffer_address_params(struct nir_to_llvm_context
*ctx
,
2579 unsigned const_index
,
2581 LLVMValueRef vertex_index
,
2582 LLVMValueRef indir_index
)
2584 LLVMValueRef param_index
;
2587 param_index
= LLVMBuildAdd(ctx
->builder
, LLVMConstInt(ctx
->i32
, param
, false),
2590 if (const_index
&& !is_compact
)
2591 param
+= const_index
;
2592 param_index
= LLVMConstInt(ctx
->i32
, param
, false);
2594 return get_tcs_tes_buffer_address(ctx
, vertex_index
, param_index
);
2598 mark_tess_output(struct nir_to_llvm_context
*ctx
,
2599 bool is_patch
, uint32_t param
)
2603 ctx
->tess_patch_outputs_written
|= (1ull << param
);
2605 ctx
->tess_outputs_written
|= (1ull << param
);
2609 get_dw_address(struct nir_to_llvm_context
*ctx
,
2610 LLVMValueRef dw_addr
,
2612 unsigned const_index
,
2613 bool compact_const_index
,
2614 LLVMValueRef vertex_index
,
2615 LLVMValueRef stride
,
2616 LLVMValueRef indir_index
)
2621 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2622 LLVMBuildMul(ctx
->builder
,
2628 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2629 LLVMBuildMul(ctx
->builder
, indir_index
,
2630 LLVMConstInt(ctx
->i32
, 4, false), ""), "");
2631 else if (const_index
&& !compact_const_index
)
2632 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2633 LLVMConstInt(ctx
->i32
, const_index
, false), "");
2635 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2636 LLVMConstInt(ctx
->i32
, param
* 4, false), "");
2638 if (const_index
&& compact_const_index
)
2639 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2640 LLVMConstInt(ctx
->i32
, const_index
, false), "");
2645 load_tcs_input(struct nir_to_llvm_context
*ctx
,
2646 nir_intrinsic_instr
*instr
)
2648 LLVMValueRef dw_addr
, stride
;
2649 unsigned const_index
;
2650 LLVMValueRef vertex_index
;
2651 LLVMValueRef indir_index
;
2653 LLVMValueRef value
[4], result
;
2654 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2655 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2656 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2657 radv_get_deref_offset(ctx
, instr
->variables
[0],
2658 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2659 &const_index
, &indir_index
);
2661 stride
= unpack_param(ctx
, ctx
->tcs_in_layout
, 13, 8);
2662 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
2663 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2666 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2667 value
[i
] = lds_load(ctx
, dw_addr
);
2668 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2671 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2672 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2677 load_tcs_output(struct nir_to_llvm_context
*ctx
,
2678 nir_intrinsic_instr
*instr
)
2680 LLVMValueRef dw_addr
, stride
;
2681 LLVMValueRef value
[4], result
;
2682 LLVMValueRef vertex_index
= NULL
;
2683 LLVMValueRef indir_index
= NULL
;
2684 unsigned const_index
= 0;
2686 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2687 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2688 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2689 radv_get_deref_offset(ctx
, instr
->variables
[0],
2690 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2691 &const_index
, &indir_index
);
2693 if (!instr
->variables
[0]->var
->data
.patch
) {
2694 stride
= unpack_param(ctx
, ctx
->tcs_out_layout
, 13, 8);
2695 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
2697 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
2700 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2703 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2704 value
[i
] = lds_load(ctx
, dw_addr
);
2705 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2708 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2709 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2714 store_tcs_output(struct nir_to_llvm_context
*ctx
,
2715 nir_intrinsic_instr
*instr
,
2719 LLVMValueRef stride
, dw_addr
;
2720 LLVMValueRef buf_addr
= NULL
;
2721 LLVMValueRef vertex_index
= NULL
;
2722 LLVMValueRef indir_index
= NULL
;
2723 unsigned const_index
= 0;
2725 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2726 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2728 radv_get_deref_offset(ctx
, instr
->variables
[0],
2729 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2730 &const_index
, &indir_index
);
2732 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2733 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CLIP_DIST0
&&
2734 is_compact
&& const_index
> 3) {
2739 if (!instr
->variables
[0]->var
->data
.patch
) {
2740 stride
= unpack_param(ctx
, ctx
->tcs_out_layout
, 13, 8);
2741 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
2743 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
2746 mark_tess_output(ctx
, instr
->variables
[0]->var
->data
.patch
, param
);
2748 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2750 buf_addr
= get_tcs_tes_buffer_address_params(ctx
, param
, const_index
, is_compact
,
2751 vertex_index
, indir_index
);
2753 unsigned base
= is_compact
? const_index
: 0;
2754 for (unsigned chan
= 0; chan
< 8; chan
++) {
2755 bool is_tess_factor
= false;
2756 if (!(writemask
& (1 << chan
)))
2758 LLVMValueRef value
= llvm_extract_elem(ctx
, src
, chan
);
2760 lds_store(ctx
, dw_addr
, value
);
2762 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_TESS_LEVEL_INNER
||
2763 instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_TESS_LEVEL_OUTER
)
2764 is_tess_factor
= true;
2766 if (!is_tess_factor
&& writemask
!= 0xF)
2767 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, value
, 1,
2768 buf_addr
, ctx
->oc_lds
,
2769 4 * (base
+ chan
), 1, 0, true, false);
2771 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2775 if (writemask
== 0xF) {
2776 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, src
, 4,
2777 buf_addr
, ctx
->oc_lds
,
2778 (base
* 4), 1, 0, true, false);
2783 load_tes_input(struct nir_to_llvm_context
*ctx
,
2784 const nir_intrinsic_instr
*instr
)
2786 LLVMValueRef buf_addr
;
2787 LLVMValueRef result
;
2788 LLVMValueRef vertex_index
= NULL
;
2789 LLVMValueRef indir_index
= NULL
;
2790 unsigned const_index
= 0;
2792 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2793 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2795 radv_get_deref_offset(ctx
, instr
->variables
[0],
2796 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2797 &const_index
, &indir_index
);
2798 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2799 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CLIP_DIST0
&&
2800 is_compact
&& const_index
> 3) {
2804 buf_addr
= get_tcs_tes_buffer_address_params(ctx
, param
, const_index
,
2805 is_compact
, vertex_index
, indir_index
);
2807 result
= ac_build_buffer_load(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, instr
->num_components
, NULL
,
2808 buf_addr
, ctx
->oc_lds
, is_compact
? (4 * const_index
) : 0, 1, 0, true, false);
2809 result
= trim_vector(ctx
, result
, instr
->num_components
);
2810 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2815 load_gs_input(struct nir_to_llvm_context
*ctx
,
2816 nir_intrinsic_instr
*instr
)
2818 LLVMValueRef indir_index
, vtx_offset
;
2819 unsigned const_index
;
2820 LLVMValueRef args
[9];
2821 unsigned param
, vtx_offset_param
;
2822 LLVMValueRef value
[4], result
;
2823 unsigned vertex_index
;
2824 radv_get_deref_offset(ctx
, instr
->variables
[0],
2825 false, &vertex_index
, NULL
,
2826 &const_index
, &indir_index
);
2827 vtx_offset_param
= vertex_index
;
2828 assert(vtx_offset_param
< 6);
2829 vtx_offset
= LLVMBuildMul(ctx
->builder
, ctx
->gs_vtx_offset
[vtx_offset_param
],
2830 LLVMConstInt(ctx
->i32
, 4, false), "");
2832 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2833 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2835 args
[0] = ctx
->esgs_ring
;
2836 args
[1] = vtx_offset
;
2837 args
[2] = LLVMConstInt(ctx
->i32
, (param
* 4 + i
+ const_index
) * 256, false);
2838 args
[3] = ctx
->i32zero
;
2839 args
[4] = ctx
->i32one
; /* OFFEN */
2840 args
[5] = ctx
->i32zero
; /* IDXEN */
2841 args
[6] = ctx
->i32one
; /* GLC */
2842 args
[7] = ctx
->i32zero
; /* SLC */
2843 args
[8] = ctx
->i32zero
; /* TFE */
2845 value
[i
] = ac_build_intrinsic(&ctx
->ac
, "llvm.SI.buffer.load.dword.i32.i32",
2847 AC_FUNC_ATTR_READONLY
|
2848 AC_FUNC_ATTR_LEGACY
);
2850 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2855 static LLVMValueRef
visit_load_var(struct nir_to_llvm_context
*ctx
,
2856 nir_intrinsic_instr
*instr
)
2858 LLVMValueRef values
[8];
2859 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2860 int ve
= instr
->dest
.ssa
.num_components
;
2861 LLVMValueRef indir_index
;
2863 unsigned const_index
;
2864 bool vs_in
= ctx
->stage
== MESA_SHADER_VERTEX
&&
2865 instr
->variables
[0]->var
->data
.mode
== nir_var_shader_in
;
2866 radv_get_deref_offset(ctx
, instr
->variables
[0], vs_in
, NULL
, NULL
,
2867 &const_index
, &indir_index
);
2869 if (instr
->dest
.ssa
.bit_size
== 64)
2872 switch (instr
->variables
[0]->var
->data
.mode
) {
2873 case nir_var_shader_in
:
2874 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
2875 return load_tcs_input(ctx
, instr
);
2876 if (ctx
->stage
== MESA_SHADER_TESS_EVAL
)
2877 return load_tes_input(ctx
, instr
);
2878 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
2879 return load_gs_input(ctx
, instr
);
2881 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2883 unsigned count
= glsl_count_attribute_slots(
2884 instr
->variables
[0]->var
->type
,
2885 ctx
->stage
== MESA_SHADER_VERTEX
);
2887 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2888 &ctx
->ac
, ctx
->inputs
+ idx
+ chan
, count
,
2891 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2895 values
[chan
] = ctx
->inputs
[idx
+ chan
+ const_index
* 4];
2899 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2901 unsigned count
= glsl_count_attribute_slots(
2902 instr
->variables
[0]->var
->type
, false);
2904 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2905 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
2908 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2912 values
[chan
] = LLVMBuildLoad(ctx
->builder
, ctx
->locals
[idx
+ chan
+ const_index
* 4], "");
2916 case nir_var_shader_out
:
2917 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
2918 return load_tcs_output(ctx
, instr
);
2919 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2921 unsigned count
= glsl_count_attribute_slots(
2922 instr
->variables
[0]->var
->type
, false);
2924 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2925 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2928 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2932 values
[chan
] = LLVMBuildLoad(ctx
->builder
,
2933 ctx
->outputs
[idx
+ chan
+ const_index
* 4],
2938 case nir_var_shared
: {
2939 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2940 LLVMValueRef derived_ptr
;
2943 indir_index
= LLVMBuildMul(ctx
->builder
, indir_index
, LLVMConstInt(ctx
->i32
, 4, false), "");
2945 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2946 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
2948 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
2949 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
2951 values
[chan
] = LLVMBuildLoad(ctx
->builder
, derived_ptr
, "");
2956 unreachable("unhandle variable mode");
2958 ret
= ac_build_gather_values(&ctx
->ac
, values
, ve
);
2959 return LLVMBuildBitCast(ctx
->builder
, ret
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2963 visit_store_var(struct nir_to_llvm_context
*ctx
,
2964 nir_intrinsic_instr
*instr
)
2966 LLVMValueRef temp_ptr
, value
;
2967 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2968 LLVMValueRef src
= to_float(&ctx
->ac
, get_src(ctx
, instr
->src
[0]));
2969 int writemask
= instr
->const_index
[0];
2970 LLVMValueRef indir_index
;
2971 unsigned const_index
;
2972 radv_get_deref_offset(ctx
, instr
->variables
[0], false,
2973 NULL
, NULL
, &const_index
, &indir_index
);
2975 if (get_elem_bits(&ctx
->ac
, LLVMTypeOf(src
)) == 64) {
2976 int old_writemask
= writemask
;
2978 src
= LLVMBuildBitCast(ctx
->builder
, src
,
2979 LLVMVectorType(ctx
->f32
, get_llvm_num_components(src
) * 2),
2983 for (unsigned chan
= 0; chan
< 4; chan
++) {
2984 if (old_writemask
& (1 << chan
))
2985 writemask
|= 3u << (2 * chan
);
2989 switch (instr
->variables
[0]->var
->data
.mode
) {
2990 case nir_var_shader_out
:
2992 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
2993 store_tcs_output(ctx
, instr
, src
, writemask
);
2997 for (unsigned chan
= 0; chan
< 8; chan
++) {
2999 if (!(writemask
& (1 << chan
)))
3002 value
= llvm_extract_elem(ctx
, src
, chan
);
3004 if (instr
->variables
[0]->var
->data
.compact
)
3007 unsigned count
= glsl_count_attribute_slots(
3008 instr
->variables
[0]->var
->type
, false);
3010 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
3011 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
3014 if (get_llvm_num_components(tmp_vec
) > 1) {
3015 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
3016 value
, indir_index
, "");
3019 build_store_values_extended(ctx
, ctx
->outputs
+ idx
+ chan
,
3020 count
, stride
, tmp_vec
);
3023 temp_ptr
= ctx
->outputs
[idx
+ chan
+ const_index
* stride
];
3025 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
3030 for (unsigned chan
= 0; chan
< 8; chan
++) {
3031 if (!(writemask
& (1 << chan
)))
3034 value
= llvm_extract_elem(ctx
, src
, chan
);
3036 unsigned count
= glsl_count_attribute_slots(
3037 instr
->variables
[0]->var
->type
, false);
3039 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
3040 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
3043 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
3044 value
, indir_index
, "");
3045 build_store_values_extended(ctx
, ctx
->locals
+ idx
+ chan
,
3048 temp_ptr
= ctx
->locals
[idx
+ chan
+ const_index
* 4];
3050 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
3054 case nir_var_shared
: {
3055 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
3058 indir_index
= LLVMBuildMul(ctx
->builder
, indir_index
, LLVMConstInt(ctx
->i32
, 4, false), "");
3060 for (unsigned chan
= 0; chan
< 8; chan
++) {
3061 if (!(writemask
& (1 << chan
)))
3063 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
3064 LLVMValueRef derived_ptr
;
3067 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
3069 value
= llvm_extract_elem(ctx
, src
, chan
);
3070 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
3071 LLVMBuildStore(ctx
->builder
,
3072 to_integer(&ctx
->ac
, value
), derived_ptr
);
3081 static int image_type_to_components_count(enum glsl_sampler_dim dim
, bool array
)
3084 case GLSL_SAMPLER_DIM_BUF
:
3086 case GLSL_SAMPLER_DIM_1D
:
3087 return array
? 2 : 1;
3088 case GLSL_SAMPLER_DIM_2D
:
3089 return array
? 3 : 2;
3090 case GLSL_SAMPLER_DIM_MS
:
3091 return array
? 4 : 3;
3092 case GLSL_SAMPLER_DIM_3D
:
3093 case GLSL_SAMPLER_DIM_CUBE
:
3095 case GLSL_SAMPLER_DIM_RECT
:
3096 case GLSL_SAMPLER_DIM_SUBPASS
:
3098 case GLSL_SAMPLER_DIM_SUBPASS_MS
:
3108 /* Adjust the sample index according to FMASK.
3110 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3111 * which is the identity mapping. Each nibble says which physical sample
3112 * should be fetched to get that sample.
3114 * For example, 0x11111100 means there are only 2 samples stored and
3115 * the second sample covers 3/4 of the pixel. When reading samples 0
3116 * and 1, return physical sample 0 (determined by the first two 0s
3117 * in FMASK), otherwise return physical sample 1.
3119 * The sample index should be adjusted as follows:
3120 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
3122 static LLVMValueRef
adjust_sample_index_using_fmask(struct nir_to_llvm_context
*ctx
,
3123 LLVMValueRef coord_x
, LLVMValueRef coord_y
,
3124 LLVMValueRef coord_z
,
3125 LLVMValueRef sample_index
,
3126 LLVMValueRef fmask_desc_ptr
)
3128 LLVMValueRef fmask_load_address
[4];
3131 fmask_load_address
[0] = coord_x
;
3132 fmask_load_address
[1] = coord_y
;
3134 fmask_load_address
[2] = coord_z
;
3135 fmask_load_address
[3] = LLVMGetUndef(ctx
->i32
);
3138 struct ac_image_args args
= {0};
3140 args
.opcode
= ac_image_load
;
3141 args
.da
= coord_z
? true : false;
3142 args
.resource
= fmask_desc_ptr
;
3144 args
.addr
= ac_build_gather_values(&ctx
->ac
, fmask_load_address
, coord_z
? 4 : 2);
3146 res
= ac_build_image_opcode(&ctx
->ac
, &args
);
3148 res
= to_integer(&ctx
->ac
, res
);
3149 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, false);
3150 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xf, false);
3152 LLVMValueRef fmask
= LLVMBuildExtractElement(ctx
->builder
,
3156 LLVMValueRef sample_index4
=
3157 LLVMBuildMul(ctx
->builder
, sample_index
, four
, "");
3158 LLVMValueRef shifted_fmask
=
3159 LLVMBuildLShr(ctx
->builder
, fmask
, sample_index4
, "");
3160 LLVMValueRef final_sample
=
3161 LLVMBuildAnd(ctx
->builder
, shifted_fmask
, F
, "");
3163 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3164 * resource descriptor is 0 (invalid),
3166 LLVMValueRef fmask_desc
=
3167 LLVMBuildBitCast(ctx
->builder
, fmask_desc_ptr
,
3170 LLVMValueRef fmask_word1
=
3171 LLVMBuildExtractElement(ctx
->builder
, fmask_desc
,
3174 LLVMValueRef word1_is_nonzero
=
3175 LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
3176 fmask_word1
, ctx
->i32zero
, "");
3178 /* Replace the MSAA sample index. */
3180 LLVMBuildSelect(ctx
->builder
, word1_is_nonzero
,
3181 final_sample
, sample_index
, "");
3182 return sample_index
;
3185 static LLVMValueRef
get_image_coords(struct nir_to_llvm_context
*ctx
,
3186 const nir_intrinsic_instr
*instr
)
3188 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
3189 if(instr
->variables
[0]->deref
.child
)
3190 type
= instr
->variables
[0]->deref
.child
->type
;
3192 LLVMValueRef src0
= get_src(ctx
, instr
->src
[0]);
3193 LLVMValueRef coords
[4];
3194 LLVMValueRef masks
[] = {
3195 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
3196 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false),
3199 LLVMValueRef sample_index
= llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[1]), 0);
3202 enum glsl_sampler_dim dim
= glsl_get_sampler_dim(type
);
3203 bool add_frag_pos
= (dim
== GLSL_SAMPLER_DIM_SUBPASS
||
3204 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
3205 bool is_ms
= (dim
== GLSL_SAMPLER_DIM_MS
||
3206 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
3208 count
= image_type_to_components_count(dim
,
3209 glsl_sampler_type_is_array(type
));
3212 LLVMValueRef fmask_load_address
[3];
3215 fmask_load_address
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[0], "");
3216 fmask_load_address
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[1], "");
3217 if (glsl_sampler_type_is_array(type
))
3218 fmask_load_address
[2] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[2], "");
3220 fmask_load_address
[2] = NULL
;
3222 for (chan
= 0; chan
< 2; ++chan
)
3223 fmask_load_address
[chan
] = LLVMBuildAdd(ctx
->builder
, fmask_load_address
[chan
], LLVMBuildFPToUI(ctx
->builder
, ctx
->frag_pos
[chan
], ctx
->i32
, ""), "");
3225 sample_index
= adjust_sample_index_using_fmask(ctx
,
3226 fmask_load_address
[0],
3227 fmask_load_address
[1],
3228 fmask_load_address
[2],
3230 get_sampler_desc(ctx
, instr
->variables
[0], DESC_FMASK
));
3233 if (instr
->src
[0].ssa
->num_components
)
3234 res
= LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[0], "");
3241 for (chan
= 0; chan
< count
; ++chan
) {
3242 coords
[chan
] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[chan
], "");
3246 for (chan
= 0; chan
< count
; ++chan
)
3247 coords
[chan
] = LLVMBuildAdd(ctx
->builder
, coords
[chan
], LLVMBuildFPToUI(ctx
->builder
, ctx
->frag_pos
[chan
], ctx
->i32
, ""), "");
3250 coords
[count
] = sample_index
;
3255 coords
[3] = LLVMGetUndef(ctx
->i32
);
3258 res
= ac_build_gather_values(&ctx
->ac
, coords
, count
);
3263 static LLVMValueRef
visit_image_load(struct nir_to_llvm_context
*ctx
,
3264 const nir_intrinsic_instr
*instr
)
3266 LLVMValueRef params
[7];
3268 char intrinsic_name
[64];
3269 const nir_variable
*var
= instr
->variables
[0]->var
;
3270 const struct glsl_type
*type
= var
->type
;
3271 if(instr
->variables
[0]->deref
.child
)
3272 type
= instr
->variables
[0]->deref
.child
->type
;
3274 type
= glsl_without_array(type
);
3275 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3276 params
[0] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
3277 params
[1] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
3278 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
3279 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
3280 params
[3] = ctx
->i1false
; /* glc */
3281 params
[4] = ctx
->i1false
; /* slc */
3282 res
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.load.format.v4f32", ctx
->v4f32
,
3285 res
= trim_vector(ctx
, res
, instr
->dest
.ssa
.num_components
);
3286 res
= to_integer(&ctx
->ac
, res
);
3288 bool is_da
= glsl_sampler_type_is_array(type
) ||
3289 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3290 LLVMValueRef da
= is_da
? ctx
->i1true
: ctx
->i1false
;
3291 LLVMValueRef glc
= ctx
->i1false
;
3292 LLVMValueRef slc
= ctx
->i1false
;
3294 params
[0] = get_image_coords(ctx
, instr
);
3295 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3296 params
[2] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
3297 if (HAVE_LLVM
<= 0x0309) {
3298 params
[3] = ctx
->i1false
; /* r128 */
3303 LLVMValueRef lwe
= ctx
->i1false
;
3310 ac_get_image_intr_name("llvm.amdgcn.image.load",
3311 ctx
->v4f32
, /* vdata */
3312 LLVMTypeOf(params
[0]), /* coords */
3313 LLVMTypeOf(params
[1]), /* rsrc */
3314 intrinsic_name
, sizeof(intrinsic_name
));
3316 res
= ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->v4f32
,
3317 params
, 7, AC_FUNC_ATTR_READONLY
);
3319 return to_integer(&ctx
->ac
, res
);
3322 static void visit_image_store(struct nir_to_llvm_context
*ctx
,
3323 nir_intrinsic_instr
*instr
)
3325 LLVMValueRef params
[8];
3326 char intrinsic_name
[64];
3327 const nir_variable
*var
= instr
->variables
[0]->var
;
3328 const struct glsl_type
*type
= glsl_without_array(var
->type
);
3330 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
3331 ctx
->shader_info
->fs
.writes_memory
= true;
3333 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3334 params
[0] = to_float(&ctx
->ac
, get_src(ctx
, instr
->src
[2])); /* data */
3335 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
3336 params
[2] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
3337 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
3338 params
[3] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
3339 params
[4] = ctx
->i1false
; /* glc */
3340 params
[5] = ctx
->i1false
; /* slc */
3341 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.store.format.v4f32", ctx
->voidt
,
3344 bool is_da
= glsl_sampler_type_is_array(type
) ||
3345 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3346 LLVMValueRef da
= is_da
? ctx
->i1true
: ctx
->i1false
;
3347 LLVMValueRef glc
= ctx
->i1false
;
3348 LLVMValueRef slc
= ctx
->i1false
;
3350 params
[0] = to_float(&ctx
->ac
, get_src(ctx
, instr
->src
[2]));
3351 params
[1] = get_image_coords(ctx
, instr
); /* coords */
3352 params
[2] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3353 params
[3] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
3354 if (HAVE_LLVM
<= 0x0309) {
3355 params
[4] = ctx
->i1false
; /* r128 */
3360 LLVMValueRef lwe
= ctx
->i1false
;
3367 ac_get_image_intr_name("llvm.amdgcn.image.store",
3368 LLVMTypeOf(params
[0]), /* vdata */
3369 LLVMTypeOf(params
[1]), /* coords */
3370 LLVMTypeOf(params
[2]), /* rsrc */
3371 intrinsic_name
, sizeof(intrinsic_name
));
3373 ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->voidt
,
3379 static LLVMValueRef
visit_image_atomic(struct nir_to_llvm_context
*ctx
,
3380 const nir_intrinsic_instr
*instr
)
3382 LLVMValueRef params
[6];
3383 int param_count
= 0;
3384 const nir_variable
*var
= instr
->variables
[0]->var
;
3386 const char *base_name
= "llvm.amdgcn.image.atomic";
3387 const char *atomic_name
;
3388 LLVMValueRef coords
;
3389 char intrinsic_name
[32], coords_type
[8];
3390 const struct glsl_type
*type
= glsl_without_array(var
->type
);
3392 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
3393 ctx
->shader_info
->fs
.writes_memory
= true;
3395 params
[param_count
++] = get_src(ctx
, instr
->src
[2]);
3396 if (instr
->intrinsic
== nir_intrinsic_image_atomic_comp_swap
)
3397 params
[param_count
++] = get_src(ctx
, instr
->src
[3]);
3399 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3400 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
3401 coords
= params
[param_count
++] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
3402 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
3403 params
[param_count
++] = ctx
->i32zero
; /* voffset */
3404 params
[param_count
++] = ctx
->i1false
; /* glc */
3405 params
[param_count
++] = ctx
->i1false
; /* slc */
3407 bool da
= glsl_sampler_type_is_array(type
) ||
3408 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3410 coords
= params
[param_count
++] = get_image_coords(ctx
, instr
);
3411 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3412 params
[param_count
++] = ctx
->i1false
; /* r128 */
3413 params
[param_count
++] = da
? ctx
->i1true
: ctx
->i1false
; /* da */
3414 params
[param_count
++] = ctx
->i1false
; /* slc */
3417 switch (instr
->intrinsic
) {
3418 case nir_intrinsic_image_atomic_add
:
3419 atomic_name
= "add";
3421 case nir_intrinsic_image_atomic_min
:
3422 atomic_name
= "smin";
3424 case nir_intrinsic_image_atomic_max
:
3425 atomic_name
= "smax";
3427 case nir_intrinsic_image_atomic_and
:
3428 atomic_name
= "and";
3430 case nir_intrinsic_image_atomic_or
:
3433 case nir_intrinsic_image_atomic_xor
:
3434 atomic_name
= "xor";
3436 case nir_intrinsic_image_atomic_exchange
:
3437 atomic_name
= "swap";
3439 case nir_intrinsic_image_atomic_comp_swap
:
3440 atomic_name
= "cmpswap";
3445 build_int_type_name(LLVMTypeOf(coords
),
3446 coords_type
, sizeof(coords_type
));
3448 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
3449 "%s.%s.%s", base_name
, atomic_name
, coords_type
);
3450 return ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->i32
, params
, param_count
, 0);
3453 static LLVMValueRef
visit_image_size(struct nir_to_llvm_context
*ctx
,
3454 const nir_intrinsic_instr
*instr
)
3457 const nir_variable
*var
= instr
->variables
[0]->var
;
3458 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
3459 bool da
= glsl_sampler_type_is_array(var
->type
) ||
3460 glsl_get_sampler_dim(var
->type
) == GLSL_SAMPLER_DIM_CUBE
;
3461 if(instr
->variables
[0]->deref
.child
)
3462 type
= instr
->variables
[0]->deref
.child
->type
;
3464 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
)
3465 return get_buffer_size(ctx
, get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
), true);
3467 struct ac_image_args args
= { 0 };
3471 args
.resource
= get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3472 args
.opcode
= ac_image_get_resinfo
;
3473 args
.addr
= ctx
->i32zero
;
3475 res
= ac_build_image_opcode(&ctx
->ac
, &args
);
3477 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
&&
3478 glsl_sampler_type_is_array(type
)) {
3479 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
3480 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
3481 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, res
, two
, "");
3482 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
3483 res
= LLVMBuildInsertElement(ctx
->builder
, res
, z
, two
, "");
3488 #define NOOP_WAITCNT 0xf7f
3489 #define LGKM_CNT 0x07f
3490 #define VM_CNT 0xf70
3492 static void emit_waitcnt(struct nir_to_llvm_context
*ctx
,
3495 LLVMValueRef args
[1] = {
3496 LLVMConstInt(ctx
->i32
, simm16
, false),
3498 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.waitcnt",
3499 ctx
->voidt
, args
, 1, 0);
3502 static void emit_barrier(struct nir_to_llvm_context
*ctx
)
3504 /* SI only (thanks to a hw bug workaround):
3505 * The real barrier instruction isn’t needed, because an entire patch
3506 * always fits into a single wave.
3508 if (ctx
->options
->chip_class
== SI
&&
3509 ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
3510 emit_waitcnt(ctx
, LGKM_CNT
& VM_CNT
);
3513 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.barrier",
3514 ctx
->voidt
, NULL
, 0, AC_FUNC_ATTR_CONVERGENT
);
3517 static void emit_discard_if(struct nir_to_llvm_context
*ctx
,
3518 const nir_intrinsic_instr
*instr
)
3521 ctx
->shader_info
->fs
.can_discard
= true;
3523 cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
3524 get_src(ctx
, instr
->src
[0]),
3527 cond
= LLVMBuildSelect(ctx
->builder
, cond
,
3528 LLVMConstReal(ctx
->f32
, -1.0f
),
3530 ac_build_kill(&ctx
->ac
, cond
);
3534 visit_load_local_invocation_index(struct nir_to_llvm_context
*ctx
)
3536 LLVMValueRef result
;
3537 LLVMValueRef thread_id
= ac_get_thread_id(&ctx
->ac
);
3538 result
= LLVMBuildAnd(ctx
->builder
, ctx
->tg_size
,
3539 LLVMConstInt(ctx
->i32
, 0xfc0, false), "");
3541 return LLVMBuildAdd(ctx
->builder
, result
, thread_id
, "");
3544 static LLVMValueRef
visit_var_atomic(struct nir_to_llvm_context
*ctx
,
3545 const nir_intrinsic_instr
*instr
)
3547 LLVMValueRef ptr
, result
;
3548 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
3549 LLVMValueRef src
= get_src(ctx
, instr
->src
[0]);
3550 ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
3552 if (instr
->intrinsic
== nir_intrinsic_var_atomic_comp_swap
) {
3553 LLVMValueRef src1
= get_src(ctx
, instr
->src
[1]);
3554 result
= LLVMBuildAtomicCmpXchg(ctx
->builder
,
3556 LLVMAtomicOrderingSequentiallyConsistent
,
3557 LLVMAtomicOrderingSequentiallyConsistent
,
3560 LLVMAtomicRMWBinOp op
;
3561 switch (instr
->intrinsic
) {
3562 case nir_intrinsic_var_atomic_add
:
3563 op
= LLVMAtomicRMWBinOpAdd
;
3565 case nir_intrinsic_var_atomic_umin
:
3566 op
= LLVMAtomicRMWBinOpUMin
;
3568 case nir_intrinsic_var_atomic_umax
:
3569 op
= LLVMAtomicRMWBinOpUMax
;
3571 case nir_intrinsic_var_atomic_imin
:
3572 op
= LLVMAtomicRMWBinOpMin
;
3574 case nir_intrinsic_var_atomic_imax
:
3575 op
= LLVMAtomicRMWBinOpMax
;
3577 case nir_intrinsic_var_atomic_and
:
3578 op
= LLVMAtomicRMWBinOpAnd
;
3580 case nir_intrinsic_var_atomic_or
:
3581 op
= LLVMAtomicRMWBinOpOr
;
3583 case nir_intrinsic_var_atomic_xor
:
3584 op
= LLVMAtomicRMWBinOpXor
;
3586 case nir_intrinsic_var_atomic_exchange
:
3587 op
= LLVMAtomicRMWBinOpXchg
;
3593 result
= LLVMBuildAtomicRMW(ctx
->builder
, op
, ptr
, to_integer(&ctx
->ac
, src
),
3594 LLVMAtomicOrderingSequentiallyConsistent
,
3600 #define INTERP_CENTER 0
3601 #define INTERP_CENTROID 1
3602 #define INTERP_SAMPLE 2
3604 static LLVMValueRef
lookup_interp_param(struct nir_to_llvm_context
*ctx
,
3605 enum glsl_interp_mode interp
, unsigned location
)
3608 case INTERP_MODE_FLAT
:
3611 case INTERP_MODE_SMOOTH
:
3612 case INTERP_MODE_NONE
:
3613 if (location
== INTERP_CENTER
)
3614 return ctx
->persp_center
;
3615 else if (location
== INTERP_CENTROID
)
3616 return ctx
->persp_centroid
;
3617 else if (location
== INTERP_SAMPLE
)
3618 return ctx
->persp_sample
;
3620 case INTERP_MODE_NOPERSPECTIVE
:
3621 if (location
== INTERP_CENTER
)
3622 return ctx
->linear_center
;
3623 else if (location
== INTERP_CENTROID
)
3624 return ctx
->linear_centroid
;
3625 else if (location
== INTERP_SAMPLE
)
3626 return ctx
->linear_sample
;
3632 static LLVMValueRef
load_sample_position(struct nir_to_llvm_context
*ctx
,
3633 LLVMValueRef sample_id
)
3635 LLVMValueRef result
;
3636 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_PS_SAMPLE_POSITIONS
, false));
3638 ptr
= LLVMBuildBitCast(ctx
->builder
, ptr
,
3639 const_array(ctx
->v2f32
, 64), "");
3641 sample_id
= LLVMBuildAdd(ctx
->builder
, sample_id
, ctx
->sample_pos_offset
, "");
3642 result
= ac_build_indexed_load(&ctx
->ac
, ptr
, sample_id
, false);
3647 static LLVMValueRef
load_sample_pos(struct nir_to_llvm_context
*ctx
)
3649 LLVMValueRef values
[2];
3651 values
[0] = emit_ffract(ctx
, ctx
->frag_pos
[0]);
3652 values
[1] = emit_ffract(ctx
, ctx
->frag_pos
[1]);
3653 return ac_build_gather_values(&ctx
->ac
, values
, 2);
3656 static LLVMValueRef
visit_interp(struct nir_to_llvm_context
*ctx
,
3657 const nir_intrinsic_instr
*instr
)
3659 LLVMValueRef result
[2];
3660 LLVMValueRef interp_param
, attr_number
;
3663 LLVMValueRef src_c0
, src_c1
;
3665 int input_index
= instr
->variables
[0]->var
->data
.location
- VARYING_SLOT_VAR0
;
3666 switch (instr
->intrinsic
) {
3667 case nir_intrinsic_interp_var_at_centroid
:
3668 location
= INTERP_CENTROID
;
3670 case nir_intrinsic_interp_var_at_sample
:
3671 case nir_intrinsic_interp_var_at_offset
:
3672 location
= INTERP_CENTER
;
3673 src0
= get_src(ctx
, instr
->src
[0]);
3679 if (instr
->intrinsic
== nir_intrinsic_interp_var_at_offset
) {
3680 src_c0
= to_float(&ctx
->ac
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, ""));
3681 src_c1
= to_float(&ctx
->ac
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, ""));
3682 } else if (instr
->intrinsic
== nir_intrinsic_interp_var_at_sample
) {
3683 LLVMValueRef sample_position
;
3684 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3686 /* fetch sample ID */
3687 sample_position
= load_sample_position(ctx
, src0
);
3689 src_c0
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32zero
, "");
3690 src_c0
= LLVMBuildFSub(ctx
->builder
, src_c0
, halfval
, "");
3691 src_c1
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32one
, "");
3692 src_c1
= LLVMBuildFSub(ctx
->builder
, src_c1
, halfval
, "");
3694 interp_param
= lookup_interp_param(ctx
, instr
->variables
[0]->var
->data
.interpolation
, location
);
3695 attr_number
= LLVMConstInt(ctx
->i32
, input_index
, false);
3697 if (location
== INTERP_SAMPLE
|| location
== INTERP_CENTER
) {
3698 LLVMValueRef ij_out
[2];
3699 LLVMValueRef ddxy_out
= emit_ddxy_interp(ctx
, interp_param
);
3702 * take the I then J parameters, and the DDX/Y for it, and
3703 * calculate the IJ inputs for the interpolator.
3704 * temp1 = ddx * offset/sample.x + I;
3705 * interp_param.I = ddy * offset/sample.y + temp1;
3706 * temp1 = ddx * offset/sample.x + J;
3707 * interp_param.J = ddy * offset/sample.y + temp1;
3709 for (unsigned i
= 0; i
< 2; i
++) {
3710 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, false);
3711 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, false);
3712 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->builder
,
3713 ddxy_out
, ix_ll
, "");
3714 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->builder
,
3715 ddxy_out
, iy_ll
, "");
3716 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->builder
,
3717 interp_param
, ix_ll
, "");
3718 LLVMValueRef temp1
, temp2
;
3720 interp_el
= LLVMBuildBitCast(ctx
->builder
, interp_el
,
3723 temp1
= LLVMBuildFMul(ctx
->builder
, ddx_el
, src_c0
, "");
3724 temp1
= LLVMBuildFAdd(ctx
->builder
, temp1
, interp_el
, "");
3726 temp2
= LLVMBuildFMul(ctx
->builder
, ddy_el
, src_c1
, "");
3727 temp2
= LLVMBuildFAdd(ctx
->builder
, temp2
, temp1
, "");
3729 ij_out
[i
] = LLVMBuildBitCast(ctx
->builder
,
3730 temp2
, ctx
->i32
, "");
3732 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
3736 for (chan
= 0; chan
< 2; chan
++) {
3737 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
3740 interp_param
= LLVMBuildBitCast(ctx
->builder
,
3741 interp_param
, LLVMVectorType(ctx
->f32
, 2), "");
3742 LLVMValueRef i
= LLVMBuildExtractElement(
3743 ctx
->builder
, interp_param
, ctx
->i32zero
, "");
3744 LLVMValueRef j
= LLVMBuildExtractElement(
3745 ctx
->builder
, interp_param
, ctx
->i32one
, "");
3747 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
3748 llvm_chan
, attr_number
,
3749 ctx
->prim_mask
, i
, j
);
3751 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
3752 LLVMConstInt(ctx
->i32
, 2, false),
3753 llvm_chan
, attr_number
,
3757 return ac_build_gather_values(&ctx
->ac
, result
, 2);
3761 visit_emit_vertex(struct nir_to_llvm_context
*ctx
,
3762 const nir_intrinsic_instr
*instr
)
3764 LLVMValueRef gs_next_vertex
;
3765 LLVMValueRef can_emit
, kill
;
3768 assert(instr
->const_index
[0] == 0);
3769 /* Write vertex attribute values to GSVS ring */
3770 gs_next_vertex
= LLVMBuildLoad(ctx
->builder
,
3771 ctx
->gs_next_vertex
,
3774 /* If this thread has already emitted the declared maximum number of
3775 * vertices, kill it: excessive vertex emissions are not supposed to
3776 * have any effect, and GS threads have no externally observable
3777 * effects other than emitting vertices.
3779 can_emit
= LLVMBuildICmp(ctx
->builder
, LLVMIntULT
, gs_next_vertex
,
3780 LLVMConstInt(ctx
->i32
, ctx
->gs_max_out_vertices
, false), "");
3782 kill
= LLVMBuildSelect(ctx
->builder
, can_emit
,
3783 LLVMConstReal(ctx
->f32
, 1.0f
),
3784 LLVMConstReal(ctx
->f32
, -1.0f
), "");
3785 ac_build_kill(&ctx
->ac
, kill
);
3787 /* loop num outputs */
3789 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
3790 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
3795 if (!(ctx
->output_mask
& (1ull << i
)))
3798 if (i
== VARYING_SLOT_CLIP_DIST0
) {
3799 /* pack clip and cull into a single set of slots */
3800 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
3804 for (unsigned j
= 0; j
< length
; j
++) {
3805 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
,
3807 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, (slot
* 4 + j
) * ctx
->gs_max_out_vertices
, false);
3808 voffset
= LLVMBuildAdd(ctx
->builder
, voffset
, gs_next_vertex
, "");
3809 voffset
= LLVMBuildMul(ctx
->builder
, voffset
, LLVMConstInt(ctx
->i32
, 4, false), "");
3811 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
3813 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->gsvs_ring
,
3815 voffset
, ctx
->gs2vs_offset
, 0,
3821 gs_next_vertex
= LLVMBuildAdd(ctx
->builder
, gs_next_vertex
,
3823 LLVMBuildStore(ctx
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
);
3825 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
3829 visit_end_primitive(struct nir_to_llvm_context
*ctx
,
3830 const nir_intrinsic_instr
*instr
)
3832 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
3836 visit_load_tess_coord(struct nir_to_llvm_context
*ctx
,
3837 const nir_intrinsic_instr
*instr
)
3839 LLVMValueRef coord
[4] = {
3846 if (ctx
->tes_primitive_mode
== GL_TRIANGLES
)
3847 coord
[2] = LLVMBuildFSub(ctx
->builder
, ctx
->f32one
,
3848 LLVMBuildFAdd(ctx
->builder
, coord
[0], coord
[1], ""), "");
3850 LLVMValueRef result
= ac_build_gather_values(&ctx
->ac
, coord
, instr
->num_components
);
3851 return LLVMBuildBitCast(ctx
->builder
, result
,
3852 get_def_type(ctx
, &instr
->dest
.ssa
), "");
3855 static void visit_intrinsic(struct nir_to_llvm_context
*ctx
,
3856 nir_intrinsic_instr
*instr
)
3858 LLVMValueRef result
= NULL
;
3860 switch (instr
->intrinsic
) {
3861 case nir_intrinsic_load_work_group_id
: {
3862 result
= ctx
->workgroup_ids
;
3865 case nir_intrinsic_load_base_vertex
: {
3866 result
= ctx
->base_vertex
;
3869 case nir_intrinsic_load_vertex_id_zero_base
: {
3870 result
= ctx
->vertex_id
;
3873 case nir_intrinsic_load_local_invocation_id
: {
3874 result
= ctx
->local_invocation_ids
;
3877 case nir_intrinsic_load_base_instance
:
3878 result
= ctx
->start_instance
;
3880 case nir_intrinsic_load_draw_id
:
3881 result
= ctx
->draw_index
;
3883 case nir_intrinsic_load_invocation_id
:
3884 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
3885 result
= unpack_param(ctx
, ctx
->tcs_rel_ids
, 8, 5);
3887 result
= ctx
->gs_invocation_id
;
3889 case nir_intrinsic_load_primitive_id
:
3890 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
3891 ctx
->shader_info
->gs
.uses_prim_id
= true;
3892 result
= ctx
->gs_prim_id
;
3893 } else if (ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
3894 ctx
->shader_info
->tcs
.uses_prim_id
= true;
3895 result
= ctx
->tcs_patch_id
;
3896 } else if (ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
3897 ctx
->shader_info
->tcs
.uses_prim_id
= true;
3898 result
= ctx
->tes_patch_id
;
3900 fprintf(stderr
, "Unknown primitive id intrinsic: %d", ctx
->stage
);
3902 case nir_intrinsic_load_sample_id
:
3903 ctx
->shader_info
->fs
.force_persample
= true;
3904 result
= unpack_param(ctx
, ctx
->ancillary
, 8, 4);
3906 case nir_intrinsic_load_sample_pos
:
3907 ctx
->shader_info
->fs
.force_persample
= true;
3908 result
= load_sample_pos(ctx
);
3910 case nir_intrinsic_load_sample_mask_in
:
3911 result
= ctx
->sample_coverage
;
3913 case nir_intrinsic_load_front_face
:
3914 result
= ctx
->front_face
;
3916 case nir_intrinsic_load_instance_id
:
3917 result
= ctx
->instance_id
;
3918 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
3919 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
3921 case nir_intrinsic_load_num_work_groups
:
3922 result
= ctx
->num_work_groups
;
3924 case nir_intrinsic_load_local_invocation_index
:
3925 result
= visit_load_local_invocation_index(ctx
);
3927 case nir_intrinsic_load_push_constant
:
3928 result
= visit_load_push_constant(ctx
, instr
);
3930 case nir_intrinsic_vulkan_resource_index
:
3931 result
= visit_vulkan_resource_index(ctx
, instr
);
3933 case nir_intrinsic_store_ssbo
:
3934 visit_store_ssbo(ctx
, instr
);
3936 case nir_intrinsic_load_ssbo
:
3937 result
= visit_load_buffer(ctx
, instr
);
3939 case nir_intrinsic_ssbo_atomic_add
:
3940 case nir_intrinsic_ssbo_atomic_imin
:
3941 case nir_intrinsic_ssbo_atomic_umin
:
3942 case nir_intrinsic_ssbo_atomic_imax
:
3943 case nir_intrinsic_ssbo_atomic_umax
:
3944 case nir_intrinsic_ssbo_atomic_and
:
3945 case nir_intrinsic_ssbo_atomic_or
:
3946 case nir_intrinsic_ssbo_atomic_xor
:
3947 case nir_intrinsic_ssbo_atomic_exchange
:
3948 case nir_intrinsic_ssbo_atomic_comp_swap
:
3949 result
= visit_atomic_ssbo(ctx
, instr
);
3951 case nir_intrinsic_load_ubo
:
3952 result
= visit_load_ubo_buffer(ctx
, instr
);
3954 case nir_intrinsic_get_buffer_size
:
3955 result
= visit_get_buffer_size(ctx
, instr
);
3957 case nir_intrinsic_load_var
:
3958 result
= visit_load_var(ctx
, instr
);
3960 case nir_intrinsic_store_var
:
3961 visit_store_var(ctx
, instr
);
3963 case nir_intrinsic_image_load
:
3964 result
= visit_image_load(ctx
, instr
);
3966 case nir_intrinsic_image_store
:
3967 visit_image_store(ctx
, instr
);
3969 case nir_intrinsic_image_atomic_add
:
3970 case nir_intrinsic_image_atomic_min
:
3971 case nir_intrinsic_image_atomic_max
:
3972 case nir_intrinsic_image_atomic_and
:
3973 case nir_intrinsic_image_atomic_or
:
3974 case nir_intrinsic_image_atomic_xor
:
3975 case nir_intrinsic_image_atomic_exchange
:
3976 case nir_intrinsic_image_atomic_comp_swap
:
3977 result
= visit_image_atomic(ctx
, instr
);
3979 case nir_intrinsic_image_size
:
3980 result
= visit_image_size(ctx
, instr
);
3982 case nir_intrinsic_discard
:
3983 ctx
->shader_info
->fs
.can_discard
= true;
3984 ac_build_intrinsic(&ctx
->ac
, "llvm.AMDGPU.kilp",
3986 NULL
, 0, AC_FUNC_ATTR_LEGACY
);
3988 case nir_intrinsic_discard_if
:
3989 emit_discard_if(ctx
, instr
);
3991 case nir_intrinsic_memory_barrier
:
3992 emit_waitcnt(ctx
, VM_CNT
);
3994 case nir_intrinsic_barrier
:
3997 case nir_intrinsic_var_atomic_add
:
3998 case nir_intrinsic_var_atomic_imin
:
3999 case nir_intrinsic_var_atomic_umin
:
4000 case nir_intrinsic_var_atomic_imax
:
4001 case nir_intrinsic_var_atomic_umax
:
4002 case nir_intrinsic_var_atomic_and
:
4003 case nir_intrinsic_var_atomic_or
:
4004 case nir_intrinsic_var_atomic_xor
:
4005 case nir_intrinsic_var_atomic_exchange
:
4006 case nir_intrinsic_var_atomic_comp_swap
:
4007 result
= visit_var_atomic(ctx
, instr
);
4009 case nir_intrinsic_interp_var_at_centroid
:
4010 case nir_intrinsic_interp_var_at_sample
:
4011 case nir_intrinsic_interp_var_at_offset
:
4012 result
= visit_interp(ctx
, instr
);
4014 case nir_intrinsic_emit_vertex
:
4015 visit_emit_vertex(ctx
, instr
);
4017 case nir_intrinsic_end_primitive
:
4018 visit_end_primitive(ctx
, instr
);
4020 case nir_intrinsic_load_tess_coord
:
4021 result
= visit_load_tess_coord(ctx
, instr
);
4023 case nir_intrinsic_load_patch_vertices_in
:
4024 result
= LLVMConstInt(ctx
->i32
, ctx
->options
->key
.tcs
.input_vertices
, false);
4027 fprintf(stderr
, "Unknown intrinsic: ");
4028 nir_print_instr(&instr
->instr
, stderr
);
4029 fprintf(stderr
, "\n");
4033 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4037 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
4038 const nir_deref_var
*deref
,
4039 enum desc_type desc_type
)
4041 unsigned desc_set
= deref
->var
->data
.descriptor_set
;
4042 LLVMValueRef list
= ctx
->descriptor_sets
[desc_set
];
4043 struct radv_descriptor_set_layout
*layout
= ctx
->options
->layout
->set
[desc_set
].layout
;
4044 struct radv_descriptor_set_binding_layout
*binding
= layout
->binding
+ deref
->var
->data
.binding
;
4045 unsigned offset
= binding
->offset
;
4046 unsigned stride
= binding
->size
;
4048 LLVMBuilderRef builder
= ctx
->builder
;
4050 LLVMValueRef index
= NULL
;
4051 unsigned constant_index
= 0;
4053 assert(deref
->var
->data
.binding
< layout
->binding_count
);
4055 switch (desc_type
) {
4067 if (binding
->type
== VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
)
4077 unreachable("invalid desc_type\n");
4080 if (deref
->deref
.child
) {
4081 const nir_deref_array
*child
=
4082 (const nir_deref_array
*)deref
->deref
.child
;
4084 assert(child
->deref_array_type
!= nir_deref_array_type_wildcard
);
4085 offset
+= child
->base_offset
* stride
;
4086 if (child
->deref_array_type
== nir_deref_array_type_indirect
) {
4087 index
= get_src(ctx
, child
->indirect
);
4090 constant_index
= child
->base_offset
;
4092 if (desc_type
== DESC_SAMPLER
&& binding
->immutable_samplers_offset
&&
4093 (!index
|| binding
->immutable_samplers_equal
)) {
4094 if (binding
->immutable_samplers_equal
)
4097 const uint32_t *samplers
= radv_immutable_samplers(layout
, binding
);
4099 LLVMValueRef constants
[] = {
4100 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 0], 0),
4101 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 1], 0),
4102 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 2], 0),
4103 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 3], 0),
4105 return ac_build_gather_values(&ctx
->ac
, constants
, 4);
4108 assert(stride
% type_size
== 0);
4111 index
= ctx
->i32zero
;
4113 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, stride
/ type_size
, 0), "");
4115 list
= ac_build_gep0(&ctx
->ac
, list
, LLVMConstInt(ctx
->i32
, offset
, 0));
4116 list
= LLVMBuildPointerCast(builder
, list
, const_array(type
, 0), "");
4118 return ac_build_indexed_load_const(&ctx
->ac
, list
, index
);
4121 static void set_tex_fetch_args(struct nir_to_llvm_context
*ctx
,
4122 struct ac_image_args
*args
,
4123 const nir_tex_instr
*instr
,
4125 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
4126 LLVMValueRef
*param
, unsigned count
,
4129 unsigned is_rect
= 0;
4130 bool da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
4132 if (op
== nir_texop_lod
)
4134 /* Pad to power of two vector */
4135 while (count
< util_next_power_of_two(count
))
4136 param
[count
++] = LLVMGetUndef(ctx
->i32
);
4139 args
->addr
= ac_build_gather_values(&ctx
->ac
, param
, count
);
4141 args
->addr
= param
[0];
4143 args
->resource
= res_ptr
;
4144 args
->sampler
= samp_ptr
;
4146 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
&& op
== nir_texop_txf
) {
4147 args
->addr
= param
[0];
4151 args
->dmask
= dmask
;
4152 args
->unorm
= is_rect
;
4156 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4159 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4160 * filtering manually. The driver sets img7 to a mask clearing
4161 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4162 * s_and_b32 samp0, samp0, img7
4165 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4167 static LLVMValueRef
sici_fix_sampler_aniso(struct nir_to_llvm_context
*ctx
,
4168 LLVMValueRef res
, LLVMValueRef samp
)
4170 LLVMBuilderRef builder
= ctx
->builder
;
4171 LLVMValueRef img7
, samp0
;
4173 if (ctx
->options
->chip_class
>= VI
)
4176 img7
= LLVMBuildExtractElement(builder
, res
,
4177 LLVMConstInt(ctx
->i32
, 7, 0), "");
4178 samp0
= LLVMBuildExtractElement(builder
, samp
,
4179 LLVMConstInt(ctx
->i32
, 0, 0), "");
4180 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
4181 return LLVMBuildInsertElement(builder
, samp
, samp0
,
4182 LLVMConstInt(ctx
->i32
, 0, 0), "");
4185 static void tex_fetch_ptrs(struct nir_to_llvm_context
*ctx
,
4186 nir_tex_instr
*instr
,
4187 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
,
4188 LLVMValueRef
*fmask_ptr
)
4190 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
)
4191 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_BUFFER
);
4193 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_IMAGE
);
4196 *samp_ptr
= get_sampler_desc(ctx
, instr
->sampler
, DESC_SAMPLER
);
4198 *samp_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_SAMPLER
);
4199 if (instr
->sampler_dim
< GLSL_SAMPLER_DIM_RECT
)
4200 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
4202 if (fmask_ptr
&& !instr
->sampler
&& (instr
->op
== nir_texop_txf_ms
||
4203 instr
->op
== nir_texop_samples_identical
))
4204 *fmask_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_FMASK
);
4207 static LLVMValueRef
apply_round_slice(struct nir_to_llvm_context
*ctx
,
4210 coord
= to_float(&ctx
->ac
, coord
);
4211 coord
= ac_build_intrinsic(&ctx
->ac
, "llvm.rint.f32", ctx
->f32
, &coord
, 1, 0);
4212 coord
= to_integer(&ctx
->ac
, coord
);
4216 static void visit_tex(struct nir_to_llvm_context
*ctx
, nir_tex_instr
*instr
)
4218 LLVMValueRef result
= NULL
;
4219 struct ac_image_args args
= { 0 };
4220 unsigned dmask
= 0xf;
4221 LLVMValueRef address
[16];
4222 LLVMValueRef coords
[5];
4223 LLVMValueRef coord
= NULL
, lod
= NULL
, comparator
= NULL
;
4224 LLVMValueRef bias
= NULL
, offsets
= NULL
;
4225 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
, sample_index
= NULL
;
4226 LLVMValueRef ddx
= NULL
, ddy
= NULL
;
4227 LLVMValueRef derivs
[6];
4228 unsigned chan
, count
= 0;
4229 unsigned const_src
= 0, num_deriv_comp
= 0;
4230 bool lod_is_zero
= false;
4231 tex_fetch_ptrs(ctx
, instr
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4233 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
4234 switch (instr
->src
[i
].src_type
) {
4235 case nir_tex_src_coord
:
4236 coord
= get_src(ctx
, instr
->src
[i
].src
);
4238 case nir_tex_src_projector
:
4240 case nir_tex_src_comparator
:
4241 comparator
= get_src(ctx
, instr
->src
[i
].src
);
4243 case nir_tex_src_offset
:
4244 offsets
= get_src(ctx
, instr
->src
[i
].src
);
4247 case nir_tex_src_bias
:
4248 bias
= get_src(ctx
, instr
->src
[i
].src
);
4250 case nir_tex_src_lod
: {
4251 nir_const_value
*val
= nir_src_as_const_value(instr
->src
[i
].src
);
4253 if (val
&& val
->i32
[0] == 0)
4255 lod
= get_src(ctx
, instr
->src
[i
].src
);
4258 case nir_tex_src_ms_index
:
4259 sample_index
= get_src(ctx
, instr
->src
[i
].src
);
4261 case nir_tex_src_ms_mcs
:
4263 case nir_tex_src_ddx
:
4264 ddx
= get_src(ctx
, instr
->src
[i
].src
);
4265 num_deriv_comp
= instr
->src
[i
].src
.ssa
->num_components
;
4267 case nir_tex_src_ddy
:
4268 ddy
= get_src(ctx
, instr
->src
[i
].src
);
4270 case nir_tex_src_texture_offset
:
4271 case nir_tex_src_sampler_offset
:
4272 case nir_tex_src_plane
:
4278 if (instr
->op
== nir_texop_txs
&& instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
4279 result
= get_buffer_size(ctx
, res_ptr
, true);
4283 if (instr
->op
== nir_texop_texture_samples
) {
4284 LLVMValueRef res
, samples
, is_msaa
;
4285 res
= LLVMBuildBitCast(ctx
->builder
, res_ptr
, ctx
->v8i32
, "");
4286 samples
= LLVMBuildExtractElement(ctx
->builder
, res
,
4287 LLVMConstInt(ctx
->i32
, 3, false), "");
4288 is_msaa
= LLVMBuildLShr(ctx
->builder
, samples
,
4289 LLVMConstInt(ctx
->i32
, 28, false), "");
4290 is_msaa
= LLVMBuildAnd(ctx
->builder
, is_msaa
,
4291 LLVMConstInt(ctx
->i32
, 0xe, false), "");
4292 is_msaa
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, is_msaa
,
4293 LLVMConstInt(ctx
->i32
, 0xe, false), "");
4295 samples
= LLVMBuildLShr(ctx
->builder
, samples
,
4296 LLVMConstInt(ctx
->i32
, 16, false), "");
4297 samples
= LLVMBuildAnd(ctx
->builder
, samples
,
4298 LLVMConstInt(ctx
->i32
, 0xf, false), "");
4299 samples
= LLVMBuildShl(ctx
->builder
, ctx
->i32one
,
4301 samples
= LLVMBuildSelect(ctx
->builder
, is_msaa
, samples
,
4308 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
4309 coords
[chan
] = llvm_extract_elem(ctx
, coord
, chan
);
4311 if (offsets
&& instr
->op
!= nir_texop_txf
) {
4312 LLVMValueRef offset
[3], pack
;
4313 for (chan
= 0; chan
< 3; ++chan
)
4314 offset
[chan
] = ctx
->i32zero
;
4317 for (chan
= 0; chan
< get_llvm_num_components(offsets
); chan
++) {
4318 offset
[chan
] = llvm_extract_elem(ctx
, offsets
, chan
);
4319 offset
[chan
] = LLVMBuildAnd(ctx
->builder
, offset
[chan
],
4320 LLVMConstInt(ctx
->i32
, 0x3f, false), "");
4322 offset
[chan
] = LLVMBuildShl(ctx
->builder
, offset
[chan
],
4323 LLVMConstInt(ctx
->i32
, chan
* 8, false), "");
4325 pack
= LLVMBuildOr(ctx
->builder
, offset
[0], offset
[1], "");
4326 pack
= LLVMBuildOr(ctx
->builder
, pack
, offset
[2], "");
4327 address
[count
++] = pack
;
4330 /* pack LOD bias value */
4331 if (instr
->op
== nir_texop_txb
&& bias
) {
4332 address
[count
++] = bias
;
4335 /* Pack depth comparison value */
4336 if (instr
->is_shadow
&& comparator
) {
4337 address
[count
++] = llvm_extract_elem(ctx
, comparator
, 0);
4340 /* pack derivatives */
4342 switch (instr
->sampler_dim
) {
4343 case GLSL_SAMPLER_DIM_3D
:
4344 case GLSL_SAMPLER_DIM_CUBE
:
4347 case GLSL_SAMPLER_DIM_2D
:
4351 case GLSL_SAMPLER_DIM_1D
:
4356 for (unsigned i
= 0; i
< num_deriv_comp
; i
++) {
4357 derivs
[i
] = to_float(&ctx
->ac
, llvm_extract_elem(ctx
, ddx
, i
));
4358 derivs
[num_deriv_comp
+ i
] = to_float(&ctx
->ac
, llvm_extract_elem(ctx
, ddy
, i
));
4362 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&& coord
) {
4363 if (instr
->is_array
&& instr
->op
!= nir_texop_lod
)
4364 coords
[3] = apply_round_slice(ctx
, coords
[3]);
4365 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
4366 coords
[chan
] = to_float(&ctx
->ac
, coords
[chan
]);
4367 if (instr
->coord_components
== 3)
4368 coords
[3] = LLVMGetUndef(ctx
->f32
);
4369 ac_prepare_cube_coords(&ctx
->ac
,
4370 instr
->op
== nir_texop_txd
, instr
->is_array
,
4377 for (unsigned i
= 0; i
< num_deriv_comp
* 2; i
++)
4378 address
[count
++] = derivs
[i
];
4381 /* Pack texture coordinates */
4383 address
[count
++] = coords
[0];
4384 if (instr
->coord_components
> 1) {
4385 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_1D
&& instr
->is_array
&& instr
->op
!= nir_texop_txf
) {
4386 coords
[1] = apply_round_slice(ctx
, coords
[1]);
4388 address
[count
++] = coords
[1];
4390 if (instr
->coord_components
> 2) {
4391 /* This seems like a bit of a hack - but it passes Vulkan CTS with it */
4392 if (instr
->sampler_dim
!= GLSL_SAMPLER_DIM_3D
&&
4393 instr
->sampler_dim
!= GLSL_SAMPLER_DIM_CUBE
&&
4394 instr
->op
!= nir_texop_txf
) {
4395 coords
[2] = apply_round_slice(ctx
, coords
[2]);
4397 address
[count
++] = coords
[2];
4402 if (lod
&& ((instr
->op
== nir_texop_txl
&& !lod_is_zero
) ||
4403 instr
->op
== nir_texop_txf
)) {
4404 address
[count
++] = lod
;
4405 } else if (instr
->op
== nir_texop_txf_ms
&& sample_index
) {
4406 address
[count
++] = sample_index
;
4407 } else if(instr
->op
== nir_texop_txs
) {
4410 address
[count
++] = lod
;
4412 address
[count
++] = ctx
->i32zero
;
4415 for (chan
= 0; chan
< count
; chan
++) {
4416 address
[chan
] = LLVMBuildBitCast(ctx
->builder
,
4417 address
[chan
], ctx
->i32
, "");
4420 if (instr
->op
== nir_texop_samples_identical
) {
4421 LLVMValueRef txf_address
[4];
4422 struct ac_image_args txf_args
= { 0 };
4423 unsigned txf_count
= count
;
4424 memcpy(txf_address
, address
, sizeof(txf_address
));
4426 if (!instr
->is_array
)
4427 txf_address
[2] = ctx
->i32zero
;
4428 txf_address
[3] = ctx
->i32zero
;
4430 set_tex_fetch_args(ctx
, &txf_args
, instr
, nir_texop_txf
,
4432 txf_address
, txf_count
, 0xf);
4434 result
= build_tex_intrinsic(ctx
, instr
, false, &txf_args
);
4436 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
4437 result
= emit_int_cmp(ctx
, LLVMIntEQ
, result
, ctx
->i32zero
);
4441 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
&&
4442 instr
->op
!= nir_texop_txs
) {
4443 unsigned sample_chan
= instr
->is_array
? 3 : 2;
4444 address
[sample_chan
] = adjust_sample_index_using_fmask(ctx
,
4447 instr
->is_array
? address
[2] : NULL
,
4448 address
[sample_chan
],
4452 if (offsets
&& instr
->op
== nir_texop_txf
) {
4453 nir_const_value
*const_offset
=
4454 nir_src_as_const_value(instr
->src
[const_src
].src
);
4455 int num_offsets
= instr
->src
[const_src
].src
.ssa
->num_components
;
4456 assert(const_offset
);
4457 num_offsets
= MIN2(num_offsets
, instr
->coord_components
);
4458 if (num_offsets
> 2)
4459 address
[2] = LLVMBuildAdd(ctx
->builder
,
4460 address
[2], LLVMConstInt(ctx
->i32
, const_offset
->i32
[2], false), "");
4461 if (num_offsets
> 1)
4462 address
[1] = LLVMBuildAdd(ctx
->builder
,
4463 address
[1], LLVMConstInt(ctx
->i32
, const_offset
->i32
[1], false), "");
4464 address
[0] = LLVMBuildAdd(ctx
->builder
,
4465 address
[0], LLVMConstInt(ctx
->i32
, const_offset
->i32
[0], false), "");
4469 /* TODO TG4 support */
4470 if (instr
->op
== nir_texop_tg4
) {
4471 if (instr
->is_shadow
)
4474 dmask
= 1 << instr
->component
;
4476 set_tex_fetch_args(ctx
, &args
, instr
, instr
->op
,
4477 res_ptr
, samp_ptr
, address
, count
, dmask
);
4479 result
= build_tex_intrinsic(ctx
, instr
, lod_is_zero
, &args
);
4481 if (instr
->op
== nir_texop_query_levels
)
4482 result
= LLVMBuildExtractElement(ctx
->builder
, result
, LLVMConstInt(ctx
->i32
, 3, false), "");
4483 else if (instr
->is_shadow
&& instr
->op
!= nir_texop_txs
&& instr
->op
!= nir_texop_lod
&& instr
->op
!= nir_texop_tg4
)
4484 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
4485 else if (instr
->op
== nir_texop_txs
&&
4486 instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&&
4488 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
4489 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
4490 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, result
, two
, "");
4491 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
4492 result
= LLVMBuildInsertElement(ctx
->builder
, result
, z
, two
, "");
4493 } else if (instr
->dest
.ssa
.num_components
!= 4)
4494 result
= trim_vector(ctx
, result
, instr
->dest
.ssa
.num_components
);
4498 assert(instr
->dest
.is_ssa
);
4499 result
= to_integer(&ctx
->ac
, result
);
4500 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4505 static void visit_phi(struct nir_to_llvm_context
*ctx
, nir_phi_instr
*instr
)
4507 LLVMTypeRef type
= get_def_type(ctx
, &instr
->dest
.ssa
);
4508 LLVMValueRef result
= LLVMBuildPhi(ctx
->builder
, type
, "");
4510 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4511 _mesa_hash_table_insert(ctx
->phis
, instr
, result
);
4514 static void visit_post_phi(struct nir_to_llvm_context
*ctx
,
4515 nir_phi_instr
*instr
,
4516 LLVMValueRef llvm_phi
)
4518 nir_foreach_phi_src(src
, instr
) {
4519 LLVMBasicBlockRef block
= get_block(ctx
, src
->pred
);
4520 LLVMValueRef llvm_src
= get_src(ctx
, src
->src
);
4522 LLVMAddIncoming(llvm_phi
, &llvm_src
, &block
, 1);
4526 static void phi_post_pass(struct nir_to_llvm_context
*ctx
)
4528 struct hash_entry
*entry
;
4529 hash_table_foreach(ctx
->phis
, entry
) {
4530 visit_post_phi(ctx
, (nir_phi_instr
*)entry
->key
,
4531 (LLVMValueRef
)entry
->data
);
4536 static void visit_ssa_undef(struct nir_to_llvm_context
*ctx
,
4537 const nir_ssa_undef_instr
*instr
)
4539 unsigned num_components
= instr
->def
.num_components
;
4542 if (num_components
== 1)
4543 undef
= LLVMGetUndef(ctx
->i32
);
4545 undef
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, num_components
));
4547 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, undef
);
4550 static void visit_jump(struct nir_to_llvm_context
*ctx
,
4551 const nir_jump_instr
*instr
)
4553 switch (instr
->type
) {
4554 case nir_jump_break
:
4555 LLVMBuildBr(ctx
->builder
, ctx
->break_block
);
4556 LLVMClearInsertionPosition(ctx
->builder
);
4558 case nir_jump_continue
:
4559 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4560 LLVMClearInsertionPosition(ctx
->builder
);
4563 fprintf(stderr
, "Unknown NIR jump instr: ");
4564 nir_print_instr(&instr
->instr
, stderr
);
4565 fprintf(stderr
, "\n");
4570 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
4571 struct exec_list
*list
);
4573 static void visit_block(struct nir_to_llvm_context
*ctx
, nir_block
*block
)
4575 LLVMBasicBlockRef llvm_block
= LLVMGetInsertBlock(ctx
->builder
);
4576 nir_foreach_instr(instr
, block
)
4578 switch (instr
->type
) {
4579 case nir_instr_type_alu
:
4580 visit_alu(ctx
, nir_instr_as_alu(instr
));
4582 case nir_instr_type_load_const
:
4583 visit_load_const(ctx
, nir_instr_as_load_const(instr
));
4585 case nir_instr_type_intrinsic
:
4586 visit_intrinsic(ctx
, nir_instr_as_intrinsic(instr
));
4588 case nir_instr_type_tex
:
4589 visit_tex(ctx
, nir_instr_as_tex(instr
));
4591 case nir_instr_type_phi
:
4592 visit_phi(ctx
, nir_instr_as_phi(instr
));
4594 case nir_instr_type_ssa_undef
:
4595 visit_ssa_undef(ctx
, nir_instr_as_ssa_undef(instr
));
4597 case nir_instr_type_jump
:
4598 visit_jump(ctx
, nir_instr_as_jump(instr
));
4601 fprintf(stderr
, "Unknown NIR instr type: ");
4602 nir_print_instr(instr
, stderr
);
4603 fprintf(stderr
, "\n");
4608 _mesa_hash_table_insert(ctx
->defs
, block
, llvm_block
);
4611 static void visit_if(struct nir_to_llvm_context
*ctx
, nir_if
*if_stmt
)
4613 LLVMValueRef value
= get_src(ctx
, if_stmt
->condition
);
4615 LLVMBasicBlockRef merge_block
=
4616 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4617 LLVMBasicBlockRef if_block
=
4618 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4619 LLVMBasicBlockRef else_block
= merge_block
;
4620 if (!exec_list_is_empty(&if_stmt
->else_list
))
4621 else_block
= LLVMAppendBasicBlockInContext(
4622 ctx
->context
, ctx
->main_function
, "");
4624 LLVMValueRef cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, value
,
4625 LLVMConstInt(ctx
->i32
, 0, false), "");
4626 LLVMBuildCondBr(ctx
->builder
, cond
, if_block
, else_block
);
4628 LLVMPositionBuilderAtEnd(ctx
->builder
, if_block
);
4629 visit_cf_list(ctx
, &if_stmt
->then_list
);
4630 if (LLVMGetInsertBlock(ctx
->builder
))
4631 LLVMBuildBr(ctx
->builder
, merge_block
);
4633 if (!exec_list_is_empty(&if_stmt
->else_list
)) {
4634 LLVMPositionBuilderAtEnd(ctx
->builder
, else_block
);
4635 visit_cf_list(ctx
, &if_stmt
->else_list
);
4636 if (LLVMGetInsertBlock(ctx
->builder
))
4637 LLVMBuildBr(ctx
->builder
, merge_block
);
4640 LLVMPositionBuilderAtEnd(ctx
->builder
, merge_block
);
4643 static void visit_loop(struct nir_to_llvm_context
*ctx
, nir_loop
*loop
)
4645 LLVMBasicBlockRef continue_parent
= ctx
->continue_block
;
4646 LLVMBasicBlockRef break_parent
= ctx
->break_block
;
4648 ctx
->continue_block
=
4649 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4651 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4653 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4654 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->continue_block
);
4655 visit_cf_list(ctx
, &loop
->body
);
4657 if (LLVMGetInsertBlock(ctx
->builder
))
4658 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4659 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->break_block
);
4661 ctx
->continue_block
= continue_parent
;
4662 ctx
->break_block
= break_parent
;
4665 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
4666 struct exec_list
*list
)
4668 foreach_list_typed(nir_cf_node
, node
, node
, list
)
4670 switch (node
->type
) {
4671 case nir_cf_node_block
:
4672 visit_block(ctx
, nir_cf_node_as_block(node
));
4675 case nir_cf_node_if
:
4676 visit_if(ctx
, nir_cf_node_as_if(node
));
4679 case nir_cf_node_loop
:
4680 visit_loop(ctx
, nir_cf_node_as_loop(node
));
4690 handle_vs_input_decl(struct nir_to_llvm_context
*ctx
,
4691 struct nir_variable
*variable
)
4693 LLVMValueRef t_list_ptr
= ctx
->vertex_buffers
;
4694 LLVMValueRef t_offset
;
4695 LLVMValueRef t_list
;
4697 LLVMValueRef buffer_index
;
4698 int index
= variable
->data
.location
- VERT_ATTRIB_GENERIC0
;
4699 int idx
= variable
->data
.location
;
4700 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, true);
4702 variable
->data
.driver_location
= idx
* 4;
4704 if (ctx
->options
->key
.vs
.instance_rate_inputs
& (1u << index
)) {
4705 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->instance_id
,
4706 ctx
->start_instance
, "");
4707 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
4708 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
4710 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->vertex_id
,
4711 ctx
->base_vertex
, "");
4713 for (unsigned i
= 0; i
< attrib_count
; ++i
, ++idx
) {
4714 t_offset
= LLVMConstInt(ctx
->i32
, index
+ i
, false);
4716 t_list
= ac_build_indexed_load_const(&ctx
->ac
, t_list_ptr
, t_offset
);
4718 input
= ac_build_buffer_load_format(&ctx
->ac
, t_list
,
4720 LLVMConstInt(ctx
->i32
, 0, false),
4723 for (unsigned chan
= 0; chan
< 4; chan
++) {
4724 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4725 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
, chan
)] =
4726 to_integer(&ctx
->ac
, LLVMBuildExtractElement(ctx
->builder
,
4727 input
, llvm_chan
, ""));
4732 static void interp_fs_input(struct nir_to_llvm_context
*ctx
,
4734 LLVMValueRef interp_param
,
4735 LLVMValueRef prim_mask
,
4736 LLVMValueRef result
[4])
4738 LLVMValueRef attr_number
;
4741 bool interp
= interp_param
!= NULL
;
4743 attr_number
= LLVMConstInt(ctx
->i32
, attr
, false);
4745 /* fs.constant returns the param from the middle vertex, so it's not
4746 * really useful for flat shading. It's meant to be used for custom
4747 * interpolation (but the intrinsic can't fetch from the other two
4750 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
4751 * to do the right thing. The only reason we use fs.constant is that
4752 * fs.interp cannot be used on integers, because they can be equal
4756 interp_param
= LLVMBuildBitCast(ctx
->builder
, interp_param
,
4757 LLVMVectorType(ctx
->f32
, 2), "");
4759 i
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
4761 j
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
4765 for (chan
= 0; chan
< 4; chan
++) {
4766 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4769 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
4774 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
4775 LLVMConstInt(ctx
->i32
, 2, false),
4784 handle_fs_input_decl(struct nir_to_llvm_context
*ctx
,
4785 struct nir_variable
*variable
)
4787 int idx
= variable
->data
.location
;
4788 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4789 LLVMValueRef interp
;
4791 variable
->data
.driver_location
= idx
* 4;
4792 ctx
->input_mask
|= ((1ull << attrib_count
) - 1) << variable
->data
.location
;
4794 if (glsl_get_base_type(glsl_without_array(variable
->type
)) == GLSL_TYPE_FLOAT
) {
4795 unsigned interp_type
;
4796 if (variable
->data
.sample
) {
4797 interp_type
= INTERP_SAMPLE
;
4798 ctx
->shader_info
->fs
.force_persample
= true;
4799 } else if (variable
->data
.centroid
)
4800 interp_type
= INTERP_CENTROID
;
4802 interp_type
= INTERP_CENTER
;
4804 interp
= lookup_interp_param(ctx
, variable
->data
.interpolation
, interp_type
);
4808 for (unsigned i
= 0; i
< attrib_count
; ++i
)
4809 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
+ i
, 0)] = interp
;
4814 handle_shader_input_decl(struct nir_to_llvm_context
*ctx
,
4815 struct nir_variable
*variable
)
4817 switch (ctx
->stage
) {
4818 case MESA_SHADER_VERTEX
:
4819 handle_vs_input_decl(ctx
, variable
);
4821 case MESA_SHADER_FRAGMENT
:
4822 handle_fs_input_decl(ctx
, variable
);
4831 handle_fs_inputs_pre(struct nir_to_llvm_context
*ctx
,
4832 struct nir_shader
*nir
)
4835 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_INPUTS
; ++i
) {
4836 LLVMValueRef interp_param
;
4837 LLVMValueRef
*inputs
= ctx
->inputs
+radeon_llvm_reg_index_soa(i
, 0);
4839 if (!(ctx
->input_mask
& (1ull << i
)))
4842 if (i
>= VARYING_SLOT_VAR0
|| i
== VARYING_SLOT_PNTC
||
4843 i
== VARYING_SLOT_PRIMITIVE_ID
|| i
== VARYING_SLOT_LAYER
) {
4844 interp_param
= *inputs
;
4845 interp_fs_input(ctx
, index
, interp_param
, ctx
->prim_mask
,
4849 ctx
->shader_info
->fs
.flat_shaded_mask
|= 1u << index
;
4851 } else if (i
== VARYING_SLOT_POS
) {
4852 for(int i
= 0; i
< 3; ++i
)
4853 inputs
[i
] = ctx
->frag_pos
[i
];
4855 inputs
[3] = ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, ctx
->frag_pos
[3]);
4858 ctx
->shader_info
->fs
.num_interp
= index
;
4859 if (ctx
->input_mask
& (1 << VARYING_SLOT_PNTC
))
4860 ctx
->shader_info
->fs
.has_pcoord
= true;
4861 if (ctx
->input_mask
& (1 << VARYING_SLOT_PRIMITIVE_ID
))
4862 ctx
->shader_info
->fs
.prim_id_input
= true;
4863 if (ctx
->input_mask
& (1 << VARYING_SLOT_LAYER
))
4864 ctx
->shader_info
->fs
.layer_input
= true;
4865 ctx
->shader_info
->fs
.input_mask
= ctx
->input_mask
>> VARYING_SLOT_VAR0
;
4869 ac_build_alloca(struct nir_to_llvm_context
*ctx
,
4873 LLVMBuilderRef builder
= ctx
->builder
;
4874 LLVMBasicBlockRef current_block
= LLVMGetInsertBlock(builder
);
4875 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
4876 LLVMBasicBlockRef first_block
= LLVMGetEntryBasicBlock(function
);
4877 LLVMValueRef first_instr
= LLVMGetFirstInstruction(first_block
);
4878 LLVMBuilderRef first_builder
= LLVMCreateBuilderInContext(ctx
->context
);
4882 LLVMPositionBuilderBefore(first_builder
, first_instr
);
4884 LLVMPositionBuilderAtEnd(first_builder
, first_block
);
4887 res
= LLVMBuildAlloca(first_builder
, type
, name
);
4888 LLVMBuildStore(builder
, LLVMConstNull(type
), res
);
4890 LLVMDisposeBuilder(first_builder
);
4895 static LLVMValueRef
si_build_alloca_undef(struct nir_to_llvm_context
*ctx
,
4899 LLVMValueRef ptr
= ac_build_alloca(ctx
, type
, name
);
4900 LLVMBuildStore(ctx
->builder
, LLVMGetUndef(type
), ptr
);
4905 handle_shader_output_decl(struct nir_to_llvm_context
*ctx
,
4906 struct nir_variable
*variable
)
4908 int idx
= variable
->data
.location
+ variable
->data
.index
;
4909 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4910 uint64_t mask_attribs
;
4911 variable
->data
.driver_location
= idx
* 4;
4913 /* tess ctrl has it's own load/store paths for outputs */
4914 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
4917 mask_attribs
= ((1ull << attrib_count
) - 1) << idx
;
4918 if (ctx
->stage
== MESA_SHADER_VERTEX
||
4919 ctx
->stage
== MESA_SHADER_TESS_EVAL
||
4920 ctx
->stage
== MESA_SHADER_GEOMETRY
) {
4921 if (idx
== VARYING_SLOT_CLIP_DIST0
) {
4922 int length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
4923 if (ctx
->stage
== MESA_SHADER_VERTEX
) {
4924 ctx
->shader_info
->vs
.outinfo
.clip_dist_mask
= (1 << ctx
->num_output_clips
) - 1;
4925 ctx
->shader_info
->vs
.outinfo
.cull_dist_mask
= (1 << ctx
->num_output_culls
) - 1;
4927 if (ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
4928 ctx
->shader_info
->tes
.outinfo
.clip_dist_mask
= (1 << ctx
->num_output_clips
) - 1;
4929 ctx
->shader_info
->tes
.outinfo
.cull_dist_mask
= (1 << ctx
->num_output_culls
) - 1;
4936 mask_attribs
= 1ull << idx
;
4940 for (unsigned i
= 0; i
< attrib_count
; ++i
) {
4941 for (unsigned chan
= 0; chan
< 4; chan
++) {
4942 ctx
->outputs
[radeon_llvm_reg_index_soa(idx
+ i
, chan
)] =
4943 si_build_alloca_undef(ctx
, ctx
->f32
, "");
4946 ctx
->output_mask
|= mask_attribs
;
4950 setup_locals(struct nir_to_llvm_context
*ctx
,
4951 struct nir_function
*func
)
4954 ctx
->num_locals
= 0;
4955 nir_foreach_variable(variable
, &func
->impl
->locals
) {
4956 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4957 variable
->data
.driver_location
= ctx
->num_locals
* 4;
4958 ctx
->num_locals
+= attrib_count
;
4960 ctx
->locals
= malloc(4 * ctx
->num_locals
* sizeof(LLVMValueRef
));
4964 for (i
= 0; i
< ctx
->num_locals
; i
++) {
4965 for (j
= 0; j
< 4; j
++) {
4966 ctx
->locals
[i
* 4 + j
] =
4967 si_build_alloca_undef(ctx
, ctx
->f32
, "temp");
4973 emit_float_saturate(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
, float lo
, float hi
)
4975 v
= to_float(&ctx
->ac
, v
);
4976 v
= emit_intrin_2f_param(ctx
, "llvm.maxnum.f32", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, lo
));
4977 return emit_intrin_2f_param(ctx
, "llvm.minnum.f32", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, hi
));
4981 static LLVMValueRef
emit_pack_int16(struct nir_to_llvm_context
*ctx
,
4982 LLVMValueRef src0
, LLVMValueRef src1
)
4984 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
4985 LLVMValueRef comp
[2];
4987 comp
[0] = LLVMBuildAnd(ctx
->builder
, src0
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4988 comp
[1] = LLVMBuildAnd(ctx
->builder
, src1
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4989 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
4990 return LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
4993 /* Initialize arguments for the shader export intrinsic */
4995 si_llvm_init_export_args(struct nir_to_llvm_context
*ctx
,
4996 LLVMValueRef
*values
,
4998 struct ac_export_args
*args
)
5000 /* Default is 0xf. Adjusted below depending on the format. */
5001 args
->enabled_channels
= 0xf;
5003 /* Specify whether the EXEC mask represents the valid mask */
5004 args
->valid_mask
= 0;
5006 /* Specify whether this is the last export */
5009 /* Specify the target we are exporting */
5010 args
->target
= target
;
5012 args
->compr
= false;
5013 args
->out
[0] = LLVMGetUndef(ctx
->f32
);
5014 args
->out
[1] = LLVMGetUndef(ctx
->f32
);
5015 args
->out
[2] = LLVMGetUndef(ctx
->f32
);
5016 args
->out
[3] = LLVMGetUndef(ctx
->f32
);
5021 if (ctx
->stage
== MESA_SHADER_FRAGMENT
&& target
>= V_008DFC_SQ_EXP_MRT
) {
5022 LLVMValueRef val
[4];
5023 unsigned index
= target
- V_008DFC_SQ_EXP_MRT
;
5024 unsigned col_format
= (ctx
->options
->key
.fs
.col_format
>> (4 * index
)) & 0xf;
5025 bool is_int8
= (ctx
->options
->key
.fs
.is_int8
>> index
) & 1;
5027 switch(col_format
) {
5028 case V_028714_SPI_SHADER_ZERO
:
5029 args
->enabled_channels
= 0; /* writemask */
5030 args
->target
= V_008DFC_SQ_EXP_NULL
;
5033 case V_028714_SPI_SHADER_32_R
:
5034 args
->enabled_channels
= 1;
5035 args
->out
[0] = values
[0];
5038 case V_028714_SPI_SHADER_32_GR
:
5039 args
->enabled_channels
= 0x3;
5040 args
->out
[0] = values
[0];
5041 args
->out
[1] = values
[1];
5044 case V_028714_SPI_SHADER_32_AR
:
5045 args
->enabled_channels
= 0x9;
5046 args
->out
[0] = values
[0];
5047 args
->out
[3] = values
[3];
5050 case V_028714_SPI_SHADER_FP16_ABGR
:
5053 for (unsigned chan
= 0; chan
< 2; chan
++) {
5054 LLVMValueRef pack_args
[2] = {
5056 values
[2 * chan
+ 1]
5058 LLVMValueRef packed
;
5060 packed
= ac_build_cvt_pkrtz_f16(&ctx
->ac
, pack_args
);
5061 args
->out
[chan
] = packed
;
5065 case V_028714_SPI_SHADER_UNORM16_ABGR
:
5066 for (unsigned chan
= 0; chan
< 4; chan
++) {
5067 val
[chan
] = ac_build_clamp(&ctx
->ac
, values
[chan
]);
5068 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
5069 LLVMConstReal(ctx
->f32
, 65535), "");
5070 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
5071 LLVMConstReal(ctx
->f32
, 0.5), "");
5072 val
[chan
] = LLVMBuildFPToUI(ctx
->builder
, val
[chan
],
5077 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5078 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5081 case V_028714_SPI_SHADER_SNORM16_ABGR
:
5082 for (unsigned chan
= 0; chan
< 4; chan
++) {
5083 val
[chan
] = emit_float_saturate(ctx
, values
[chan
], -1, 1);
5084 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
5085 LLVMConstReal(ctx
->f32
, 32767), "");
5087 /* If positive, add 0.5, else add -0.5. */
5088 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
5089 LLVMBuildSelect(ctx
->builder
,
5090 LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
,
5091 val
[chan
], ctx
->f32zero
, ""),
5092 LLVMConstReal(ctx
->f32
, 0.5),
5093 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
5094 val
[chan
] = LLVMBuildFPToSI(ctx
->builder
, val
[chan
], ctx
->i32
, "");
5098 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5099 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5102 case V_028714_SPI_SHADER_UINT16_ABGR
: {
5103 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 255 : 65535, 0);
5105 for (unsigned chan
= 0; chan
< 4; chan
++) {
5106 val
[chan
] = to_integer(&ctx
->ac
, values
[chan
]);
5107 val
[chan
] = emit_minmax_int(ctx
, LLVMIntULT
, val
[chan
], max
);
5111 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5112 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5116 case V_028714_SPI_SHADER_SINT16_ABGR
: {
5117 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 127 : 32767, 0);
5118 LLVMValueRef min
= LLVMConstInt(ctx
->i32
, is_int8
? -128 : -32768, 0);
5121 for (unsigned chan
= 0; chan
< 4; chan
++) {
5122 val
[chan
] = to_integer(&ctx
->ac
, values
[chan
]);
5123 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSLT
, val
[chan
], max
);
5124 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSGT
, val
[chan
], min
);
5128 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5129 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5134 case V_028714_SPI_SHADER_32_ABGR
:
5135 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
5139 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
5141 for (unsigned i
= 0; i
< 4; ++i
)
5142 args
->out
[i
] = to_float(&ctx
->ac
, args
->out
[i
]);
5146 handle_vs_outputs_post(struct nir_to_llvm_context
*ctx
,
5147 bool export_prim_id
,
5148 struct ac_vs_output_info
*outinfo
)
5150 uint32_t param_count
= 0;
5152 unsigned pos_idx
, num_pos_exports
= 0;
5153 struct ac_export_args args
, pos_args
[4] = {};
5154 LLVMValueRef psize_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
5157 memset(outinfo
->vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
5158 sizeof(outinfo
->vs_output_param_offset
));
5160 if (ctx
->output_mask
& (1ull << VARYING_SLOT_CLIP_DIST0
)) {
5161 LLVMValueRef slots
[8];
5164 if (outinfo
->cull_dist_mask
)
5165 outinfo
->cull_dist_mask
<<= ctx
->num_output_clips
;
5167 i
= VARYING_SLOT_CLIP_DIST0
;
5168 for (j
= 0; j
< ctx
->num_output_clips
+ ctx
->num_output_culls
; j
++)
5169 slots
[j
] = to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
5170 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5172 for (i
= ctx
->num_output_clips
+ ctx
->num_output_culls
; i
< 8; i
++)
5173 slots
[i
] = LLVMGetUndef(ctx
->f32
);
5175 if (ctx
->num_output_clips
+ ctx
->num_output_culls
> 4) {
5176 target
= V_008DFC_SQ_EXP_POS
+ 3;
5177 si_llvm_init_export_args(ctx
, &slots
[4], target
, &args
);
5178 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5179 &args
, sizeof(args
));
5182 target
= V_008DFC_SQ_EXP_POS
+ 2;
5183 si_llvm_init_export_args(ctx
, &slots
[0], target
, &args
);
5184 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5185 &args
, sizeof(args
));
5189 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5190 LLVMValueRef values
[4];
5191 if (!(ctx
->output_mask
& (1ull << i
)))
5194 for (unsigned j
= 0; j
< 4; j
++)
5195 values
[j
] = to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
5196 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5198 if (i
== VARYING_SLOT_POS
) {
5199 target
= V_008DFC_SQ_EXP_POS
;
5200 } else if (i
== VARYING_SLOT_CLIP_DIST0
) {
5202 } else if (i
== VARYING_SLOT_PSIZ
) {
5203 outinfo
->writes_pointsize
= true;
5204 psize_value
= values
[0];
5206 } else if (i
== VARYING_SLOT_LAYER
) {
5207 outinfo
->writes_layer
= true;
5208 layer_value
= values
[0];
5209 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5210 outinfo
->vs_output_param_offset
[VARYING_SLOT_LAYER
] = param_count
;
5212 } else if (i
== VARYING_SLOT_VIEWPORT
) {
5213 outinfo
->writes_viewport_index
= true;
5214 viewport_index_value
= values
[0];
5216 } else if (i
== VARYING_SLOT_PRIMITIVE_ID
) {
5217 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5218 outinfo
->vs_output_param_offset
[VARYING_SLOT_PRIMITIVE_ID
] = param_count
;
5220 } else if (i
>= VARYING_SLOT_VAR0
) {
5221 outinfo
->export_mask
|= 1u << (i
- VARYING_SLOT_VAR0
);
5222 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5223 outinfo
->vs_output_param_offset
[i
] = param_count
;
5227 si_llvm_init_export_args(ctx
, values
, target
, &args
);
5229 if (target
>= V_008DFC_SQ_EXP_POS
&&
5230 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
5231 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5232 &args
, sizeof(args
));
5234 ac_build_export(&ctx
->ac
, &args
);
5238 /* We need to add the position output manually if it's missing. */
5239 if (!pos_args
[0].out
[0]) {
5240 pos_args
[0].enabled_channels
= 0xf;
5241 pos_args
[0].valid_mask
= 0;
5242 pos_args
[0].done
= 0;
5243 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
5244 pos_args
[0].compr
= 0;
5245 pos_args
[0].out
[0] = ctx
->f32zero
; /* X */
5246 pos_args
[0].out
[1] = ctx
->f32zero
; /* Y */
5247 pos_args
[0].out
[2] = ctx
->f32zero
; /* Z */
5248 pos_args
[0].out
[3] = ctx
->f32one
; /* W */
5251 uint32_t mask
= ((outinfo
->writes_pointsize
== true ? 1 : 0) |
5252 (outinfo
->writes_layer
== true ? 4 : 0) |
5253 (outinfo
->writes_viewport_index
== true ? 8 : 0));
5255 pos_args
[1].enabled_channels
= mask
;
5256 pos_args
[1].valid_mask
= 0;
5257 pos_args
[1].done
= 0;
5258 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
5259 pos_args
[1].compr
= 0;
5260 pos_args
[1].out
[0] = ctx
->f32zero
; /* X */
5261 pos_args
[1].out
[1] = ctx
->f32zero
; /* Y */
5262 pos_args
[1].out
[2] = ctx
->f32zero
; /* Z */
5263 pos_args
[1].out
[3] = ctx
->f32zero
; /* W */
5265 if (outinfo
->writes_pointsize
== true)
5266 pos_args
[1].out
[0] = psize_value
;
5267 if (outinfo
->writes_layer
== true)
5268 pos_args
[1].out
[2] = layer_value
;
5269 if (outinfo
->writes_viewport_index
== true)
5270 pos_args
[1].out
[3] = viewport_index_value
;
5272 for (i
= 0; i
< 4; i
++) {
5273 if (pos_args
[i
].out
[0])
5278 for (i
= 0; i
< 4; i
++) {
5279 if (!pos_args
[i
].out
[0])
5282 /* Specify the target we are exporting */
5283 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
5284 if (pos_idx
== num_pos_exports
)
5285 pos_args
[i
].done
= 1;
5286 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
5290 if (export_prim_id
) {
5291 LLVMValueRef values
[4];
5292 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5293 outinfo
->vs_output_param_offset
[VARYING_SLOT_PRIMITIVE_ID
] = param_count
;
5296 values
[0] = ctx
->vs_prim_id
;
5297 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(2,
5298 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
5299 for (unsigned j
= 1; j
< 4; j
++)
5300 values
[j
] = ctx
->f32zero
;
5301 si_llvm_init_export_args(ctx
, values
, target
, &args
);
5302 ac_build_export(&ctx
->ac
, &args
);
5303 outinfo
->export_prim_id
= true;
5306 outinfo
->pos_exports
= num_pos_exports
;
5307 outinfo
->param_exports
= param_count
;
5311 handle_es_outputs_post(struct nir_to_llvm_context
*ctx
,
5312 struct ac_es_output_info
*outinfo
)
5315 uint64_t max_output_written
= 0;
5316 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5317 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
5321 if (!(ctx
->output_mask
& (1ull << i
)))
5324 if (i
== VARYING_SLOT_CLIP_DIST0
)
5325 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
5327 param_index
= shader_io_get_unique_index(i
);
5329 max_output_written
= MAX2(param_index
+ (length
> 4), max_output_written
);
5331 for (j
= 0; j
< length
; j
++) {
5332 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], "");
5333 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
5335 ac_build_buffer_store_dword(&ctx
->ac
,
5338 NULL
, ctx
->es2gs_offset
,
5339 (4 * param_index
+ j
) * 4,
5343 outinfo
->esgs_itemsize
= (max_output_written
+ 1) * 16;
5347 handle_ls_outputs_post(struct nir_to_llvm_context
*ctx
)
5349 LLVMValueRef vertex_id
= ctx
->rel_auto_id
;
5350 LLVMValueRef vertex_dw_stride
= unpack_param(ctx
, ctx
->ls_out_layout
, 13, 8);
5351 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->builder
, vertex_id
,
5352 vertex_dw_stride
, "");
5354 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5355 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
5358 if (!(ctx
->output_mask
& (1ull << i
)))
5361 if (i
== VARYING_SLOT_CLIP_DIST0
)
5362 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
5363 int param
= shader_io_get_unique_index(i
);
5364 mark_tess_output(ctx
, false, param
);
5366 mark_tess_output(ctx
, false, param
+ 1);
5367 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->builder
, base_dw_addr
,
5368 LLVMConstInt(ctx
->i32
, param
* 4, false),
5370 for (unsigned j
= 0; j
< length
; j
++) {
5371 lds_store(ctx
, dw_addr
,
5372 LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], ""));
5373 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
, ctx
->i32one
, "");
5378 struct ac_build_if_state
5380 struct nir_to_llvm_context
*ctx
;
5381 LLVMValueRef condition
;
5382 LLVMBasicBlockRef entry_block
;
5383 LLVMBasicBlockRef true_block
;
5384 LLVMBasicBlockRef false_block
;
5385 LLVMBasicBlockRef merge_block
;
5388 static LLVMBasicBlockRef
5389 ac_build_insert_new_block(struct nir_to_llvm_context
*ctx
, const char *name
)
5391 LLVMBasicBlockRef current_block
;
5392 LLVMBasicBlockRef next_block
;
5393 LLVMBasicBlockRef new_block
;
5395 /* get current basic block */
5396 current_block
= LLVMGetInsertBlock(ctx
->builder
);
5398 /* chqeck if there's another block after this one */
5399 next_block
= LLVMGetNextBasicBlock(current_block
);
5401 /* insert the new block before the next block */
5402 new_block
= LLVMInsertBasicBlockInContext(ctx
->context
, next_block
, name
);
5405 /* append new block after current block */
5406 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
5407 new_block
= LLVMAppendBasicBlockInContext(ctx
->context
, function
, name
);
5413 ac_nir_build_if(struct ac_build_if_state
*ifthen
,
5414 struct nir_to_llvm_context
*ctx
,
5415 LLVMValueRef condition
)
5417 LLVMBasicBlockRef block
= LLVMGetInsertBlock(ctx
->builder
);
5419 memset(ifthen
, 0, sizeof *ifthen
);
5421 ifthen
->condition
= condition
;
5422 ifthen
->entry_block
= block
;
5424 /* create endif/merge basic block for the phi functions */
5425 ifthen
->merge_block
= ac_build_insert_new_block(ctx
, "endif-block");
5427 /* create/insert true_block before merge_block */
5428 ifthen
->true_block
=
5429 LLVMInsertBasicBlockInContext(ctx
->context
,
5430 ifthen
->merge_block
,
5433 /* successive code goes into the true block */
5434 LLVMPositionBuilderAtEnd(ctx
->builder
, ifthen
->true_block
);
5438 * End a conditional.
5441 ac_nir_build_endif(struct ac_build_if_state
*ifthen
)
5443 LLVMBuilderRef builder
= ifthen
->ctx
->builder
;
5445 /* Insert branch to the merge block from current block */
5446 LLVMBuildBr(builder
, ifthen
->merge_block
);
5449 * Now patch in the various branch instructions.
5452 /* Insert the conditional branch instruction at the end of entry_block */
5453 LLVMPositionBuilderAtEnd(builder
, ifthen
->entry_block
);
5454 if (ifthen
->false_block
) {
5455 /* we have an else clause */
5456 LLVMBuildCondBr(builder
, ifthen
->condition
,
5457 ifthen
->true_block
, ifthen
->false_block
);
5460 /* no else clause */
5461 LLVMBuildCondBr(builder
, ifthen
->condition
,
5462 ifthen
->true_block
, ifthen
->merge_block
);
5465 /* Resume building code at end of the ifthen->merge_block */
5466 LLVMPositionBuilderAtEnd(builder
, ifthen
->merge_block
);
5470 write_tess_factors(struct nir_to_llvm_context
*ctx
)
5472 unsigned stride
, outer_comps
, inner_comps
;
5473 struct ac_build_if_state if_ctx
, inner_if_ctx
;
5474 LLVMValueRef invocation_id
= unpack_param(ctx
, ctx
->tcs_rel_ids
, 8, 5);
5475 LLVMValueRef rel_patch_id
= unpack_param(ctx
, ctx
->tcs_rel_ids
, 0, 8);
5476 unsigned tess_inner_index
, tess_outer_index
;
5477 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
5478 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
5482 switch (ctx
->options
->key
.tcs
.primitive_mode
) {
5502 ac_nir_build_if(&if_ctx
, ctx
,
5503 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
5504 invocation_id
, ctx
->i32zero
, ""));
5506 tess_inner_index
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER
);
5507 tess_outer_index
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER
);
5509 mark_tess_output(ctx
, true, tess_inner_index
);
5510 mark_tess_output(ctx
, true, tess_outer_index
);
5511 lds_base
= get_tcs_out_current_patch_data_offset(ctx
);
5512 lds_inner
= LLVMBuildAdd(ctx
->builder
, lds_base
,
5513 LLVMConstInt(ctx
->i32
, tess_inner_index
* 4, false), "");
5514 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_base
,
5515 LLVMConstInt(ctx
->i32
, tess_outer_index
* 4, false), "");
5517 for (i
= 0; i
< 4; i
++) {
5518 inner
[i
] = LLVMGetUndef(ctx
->i32
);
5519 outer
[i
] = LLVMGetUndef(ctx
->i32
);
5523 if (ctx
->options
->key
.tcs
.primitive_mode
== GL_ISOLINES
) {
5524 outer
[0] = out
[1] = lds_load(ctx
, lds_outer
);
5525 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_outer
,
5526 LLVMConstInt(ctx
->i32
, 1, false), "");
5527 outer
[1] = out
[0] = lds_load(ctx
, lds_outer
);
5529 for (i
= 0; i
< outer_comps
; i
++) {
5531 lds_load(ctx
, lds_outer
);
5532 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_outer
,
5533 LLVMConstInt(ctx
->i32
, 1, false), "");
5535 for (i
= 0; i
< inner_comps
; i
++) {
5536 inner
[i
] = out
[outer_comps
+i
] =
5537 lds_load(ctx
, lds_inner
);
5538 lds_inner
= LLVMBuildAdd(ctx
->builder
, lds_inner
,
5539 LLVMConstInt(ctx
->i32
, 1, false), "");
5543 /* Convert the outputs to vectors for stores. */
5544 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
5548 vec1
= ac_build_gather_values(&ctx
->ac
, out
+ 4, stride
- 4);
5551 buffer
= ctx
->hs_ring_tess_factor
;
5552 tf_base
= ctx
->tess_factor_offset
;
5553 byteoffset
= LLVMBuildMul(ctx
->builder
, rel_patch_id
,
5554 LLVMConstInt(ctx
->i32
, 4 * stride
, false), "");
5556 ac_nir_build_if(&inner_if_ctx
, ctx
,
5557 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
5558 rel_patch_id
, ctx
->i32zero
, ""));
5560 /* Store the dynamic HS control word. */
5561 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
5562 LLVMConstInt(ctx
->i32
, 0x80000000, false),
5563 1, ctx
->i32zero
, tf_base
,
5564 0, 1, 0, true, false);
5565 ac_nir_build_endif(&inner_if_ctx
);
5567 /* Store the tessellation factors. */
5568 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
5569 MIN2(stride
, 4), byteoffset
, tf_base
,
5570 4, 1, 0, true, false);
5572 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
5573 stride
- 4, byteoffset
, tf_base
,
5574 20, 1, 0, true, false);
5576 //TODO store to offchip for TES to read - only if TES reads them
5578 LLVMValueRef inner_vec
, outer_vec
, tf_outer_offset
;
5579 LLVMValueRef tf_inner_offset
;
5580 unsigned param_outer
, param_inner
;
5582 param_outer
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER
);
5583 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, NULL
,
5584 LLVMConstInt(ctx
->i32
, param_outer
, 0));
5586 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
,
5587 util_next_power_of_two(outer_comps
));
5589 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, outer_vec
,
5590 outer_comps
, tf_outer_offset
,
5591 ctx
->oc_lds
, 0, 1, 0, true, false);
5593 param_inner
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER
);
5594 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, NULL
,
5595 LLVMConstInt(ctx
->i32
, param_inner
, 0));
5597 inner_vec
= inner_comps
== 1 ? inner
[0] :
5598 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
5599 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, inner_vec
,
5600 inner_comps
, tf_inner_offset
,
5601 ctx
->oc_lds
, 0, 1, 0, true, false);
5604 ac_nir_build_endif(&if_ctx
);
5608 handle_tcs_outputs_post(struct nir_to_llvm_context
*ctx
)
5610 write_tess_factors(ctx
);
5614 si_export_mrt_color(struct nir_to_llvm_context
*ctx
,
5615 LLVMValueRef
*color
, unsigned param
, bool is_last
,
5616 struct ac_export_args
*args
)
5619 si_llvm_init_export_args(ctx
, color
, param
,
5623 args
->valid_mask
= 1; /* whether the EXEC mask is valid */
5624 args
->done
= 1; /* DONE bit */
5625 } else if (!args
->enabled_channels
)
5626 return false; /* unnecessary NULL export */
5632 si_export_mrt_z(struct nir_to_llvm_context
*ctx
,
5633 LLVMValueRef depth
, LLVMValueRef stencil
,
5634 LLVMValueRef samplemask
)
5636 struct ac_export_args args
;
5638 args
.enabled_channels
= 0;
5639 args
.valid_mask
= 1;
5641 args
.target
= V_008DFC_SQ_EXP_MRTZ
;
5644 args
.out
[0] = LLVMGetUndef(ctx
->f32
); /* R, depth */
5645 args
.out
[1] = LLVMGetUndef(ctx
->f32
); /* G, stencil test val[0:7], stencil op val[8:15] */
5646 args
.out
[2] = LLVMGetUndef(ctx
->f32
); /* B, sample mask */
5647 args
.out
[3] = LLVMGetUndef(ctx
->f32
); /* A, alpha to mask */
5650 args
.out
[0] = depth
;
5651 args
.enabled_channels
|= 0x1;
5655 args
.out
[1] = stencil
;
5656 args
.enabled_channels
|= 0x2;
5660 args
.out
[2] = samplemask
;
5661 args
.enabled_channels
|= 0x4;
5664 /* SI (except OLAND) has a bug that it only looks
5665 * at the X writemask component. */
5666 if (ctx
->options
->chip_class
== SI
&&
5667 ctx
->options
->family
!= CHIP_OLAND
)
5668 args
.enabled_channels
|= 0x1;
5670 ac_build_export(&ctx
->ac
, &args
);
5674 handle_fs_outputs_post(struct nir_to_llvm_context
*ctx
)
5677 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
5678 struct ac_export_args color_args
[8];
5680 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5681 LLVMValueRef values
[4];
5683 if (!(ctx
->output_mask
& (1ull << i
)))
5686 if (i
== FRAG_RESULT_DEPTH
) {
5687 ctx
->shader_info
->fs
.writes_z
= true;
5688 depth
= to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
5689 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
5690 } else if (i
== FRAG_RESULT_STENCIL
) {
5691 ctx
->shader_info
->fs
.writes_stencil
= true;
5692 stencil
= to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
5693 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
5694 } else if (i
== FRAG_RESULT_SAMPLE_MASK
) {
5695 ctx
->shader_info
->fs
.writes_sample_mask
= true;
5696 samplemask
= to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
5697 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
5700 for (unsigned j
= 0; j
< 4; j
++)
5701 values
[j
] = to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
5702 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5704 if (!ctx
->shader_info
->fs
.writes_z
&& !ctx
->shader_info
->fs
.writes_stencil
&& !ctx
->shader_info
->fs
.writes_sample_mask
)
5705 last
= ctx
->output_mask
<= ((1ull << (i
+ 1)) - 1);
5707 bool ret
= si_export_mrt_color(ctx
, values
, V_008DFC_SQ_EXP_MRT
+ (i
- FRAG_RESULT_DATA0
), last
, &color_args
[index
]);
5713 for (unsigned i
= 0; i
< index
; i
++)
5714 ac_build_export(&ctx
->ac
, &color_args
[i
]);
5715 if (depth
|| stencil
|| samplemask
)
5716 si_export_mrt_z(ctx
, depth
, stencil
, samplemask
);
5718 si_export_mrt_color(ctx
, NULL
, V_008DFC_SQ_EXP_NULL
, true, &color_args
[0]);
5719 ac_build_export(&ctx
->ac
, &color_args
[0]);
5722 ctx
->shader_info
->fs
.output_mask
= index
? ((1ull << index
) - 1) : 0;
5726 emit_gs_epilogue(struct nir_to_llvm_context
*ctx
)
5728 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
, ctx
->gs_wave_id
);
5732 handle_shader_outputs_post(struct nir_to_llvm_context
*ctx
)
5734 switch (ctx
->stage
) {
5735 case MESA_SHADER_VERTEX
:
5736 if (ctx
->options
->key
.vs
.as_ls
)
5737 handle_ls_outputs_post(ctx
);
5738 else if (ctx
->options
->key
.vs
.as_es
)
5739 handle_es_outputs_post(ctx
, &ctx
->shader_info
->vs
.es_info
);
5741 handle_vs_outputs_post(ctx
, ctx
->options
->key
.vs
.export_prim_id
,
5742 &ctx
->shader_info
->vs
.outinfo
);
5744 case MESA_SHADER_FRAGMENT
:
5745 handle_fs_outputs_post(ctx
);
5747 case MESA_SHADER_GEOMETRY
:
5748 emit_gs_epilogue(ctx
);
5750 case MESA_SHADER_TESS_CTRL
:
5751 handle_tcs_outputs_post(ctx
);
5753 case MESA_SHADER_TESS_EVAL
:
5754 if (ctx
->options
->key
.tes
.as_es
)
5755 handle_es_outputs_post(ctx
, &ctx
->shader_info
->tes
.es_info
);
5757 handle_vs_outputs_post(ctx
, ctx
->options
->key
.tes
.export_prim_id
,
5758 &ctx
->shader_info
->tes
.outinfo
);
5766 handle_shared_compute_var(struct nir_to_llvm_context
*ctx
,
5767 struct nir_variable
*variable
, uint32_t *offset
, int idx
)
5769 unsigned size
= glsl_count_attribute_slots(variable
->type
, false);
5770 variable
->data
.driver_location
= *offset
;
5774 static void ac_llvm_finalize_module(struct nir_to_llvm_context
* ctx
)
5776 LLVMPassManagerRef passmgr
;
5777 /* Create the pass manager */
5778 passmgr
= LLVMCreateFunctionPassManagerForModule(
5781 /* This pass should eliminate all the load and store instructions */
5782 LLVMAddPromoteMemoryToRegisterPass(passmgr
);
5784 /* Add some optimization passes */
5785 LLVMAddScalarReplAggregatesPass(passmgr
);
5786 LLVMAddLICMPass(passmgr
);
5787 LLVMAddAggressiveDCEPass(passmgr
);
5788 LLVMAddCFGSimplificationPass(passmgr
);
5789 LLVMAddInstructionCombiningPass(passmgr
);
5792 LLVMInitializeFunctionPassManager(passmgr
);
5793 LLVMRunFunctionPassManager(passmgr
, ctx
->main_function
);
5794 LLVMFinalizeFunctionPassManager(passmgr
);
5796 LLVMDisposeBuilder(ctx
->builder
);
5797 LLVMDisposePassManager(passmgr
);
5801 ac_nir_eliminate_const_vs_outputs(struct nir_to_llvm_context
*ctx
)
5803 struct ac_vs_output_info
*outinfo
;
5805 switch (ctx
->stage
) {
5806 case MESA_SHADER_FRAGMENT
:
5807 case MESA_SHADER_COMPUTE
:
5808 case MESA_SHADER_TESS_CTRL
:
5809 case MESA_SHADER_GEOMETRY
:
5811 case MESA_SHADER_VERTEX
:
5812 if (ctx
->options
->key
.vs
.as_ls
||
5813 ctx
->options
->key
.vs
.as_es
)
5815 outinfo
= &ctx
->shader_info
->vs
.outinfo
;
5817 case MESA_SHADER_TESS_EVAL
:
5818 if (ctx
->options
->key
.vs
.as_es
)
5820 outinfo
= &ctx
->shader_info
->tes
.outinfo
;
5823 unreachable("Unhandled shader type");
5826 ac_optimize_vs_outputs(&ctx
->ac
,
5828 outinfo
->vs_output_param_offset
,
5830 &outinfo
->param_exports
);
5834 ac_setup_rings(struct nir_to_llvm_context
*ctx
)
5836 if ((ctx
->stage
== MESA_SHADER_VERTEX
&& ctx
->options
->key
.vs
.as_es
) ||
5837 (ctx
->stage
== MESA_SHADER_TESS_EVAL
&& ctx
->options
->key
.tes
.as_es
)) {
5838 ctx
->esgs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_ESGS_VS
, false));
5841 if (ctx
->is_gs_copy_shader
) {
5842 ctx
->gsvs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_GSVS_VS
, false));
5844 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
5846 ctx
->esgs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_ESGS_GS
, false));
5847 ctx
->gsvs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_GSVS_GS
, false));
5849 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v4i32
, "");
5851 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->gsvs_num_entries
, LLVMConstInt(ctx
->i32
, 2, false), "");
5852 tmp
= LLVMBuildExtractElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->i32one
, "");
5853 tmp
= LLVMBuildOr(ctx
->builder
, tmp
, ctx
->gsvs_ring_stride
, "");
5854 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, tmp
, ctx
->i32one
, "");
5856 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v16i8
, "");
5859 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
||
5860 ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
5861 ctx
->hs_ring_tess_offchip
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_HS_TESS_OFFCHIP
, false));
5862 ctx
->hs_ring_tess_factor
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_HS_TESS_FACTOR
, false));
5867 ac_nir_get_max_workgroup_size(enum chip_class chip_class
,
5868 const struct nir_shader
*nir
)
5870 switch (nir
->stage
) {
5871 case MESA_SHADER_TESS_CTRL
:
5872 return chip_class
>= CIK
? 128 : 64;
5873 case MESA_SHADER_GEOMETRY
:
5875 case MESA_SHADER_COMPUTE
:
5881 unsigned max_workgroup_size
= nir
->info
.cs
.local_size
[0] *
5882 nir
->info
.cs
.local_size
[1] *
5883 nir
->info
.cs
.local_size
[2];
5884 return max_workgroup_size
;
5888 LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm
,
5889 struct nir_shader
*nir
,
5890 struct ac_shader_variant_info
*shader_info
,
5891 const struct ac_nir_compiler_options
*options
)
5893 struct nir_to_llvm_context ctx
= {0};
5894 struct nir_function
*func
;
5896 ctx
.options
= options
;
5897 ctx
.shader_info
= shader_info
;
5898 ctx
.context
= LLVMContextCreate();
5899 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
5901 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
5902 ctx
.ac
.module
= ctx
.module
;
5904 ctx
.has_ds_bpermute
= ctx
.options
->chip_class
>= VI
;
5906 memset(shader_info
, 0, sizeof(*shader_info
));
5908 ac_nir_shader_info_pass(nir
, options
, &shader_info
->info
);
5910 LLVMSetTarget(ctx
.module
, options
->supports_spill
? "amdgcn-mesa-mesa3d" : "amdgcn--");
5912 LLVMTargetDataRef data_layout
= LLVMCreateTargetDataLayout(tm
);
5913 char *data_layout_str
= LLVMCopyStringRepOfTargetData(data_layout
);
5914 LLVMSetDataLayout(ctx
.module
, data_layout_str
);
5915 LLVMDisposeTargetData(data_layout
);
5916 LLVMDisposeMessage(data_layout_str
);
5920 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
5921 ctx
.ac
.builder
= ctx
.builder
;
5922 ctx
.stage
= nir
->stage
;
5923 ctx
.max_workgroup_size
= ac_nir_get_max_workgroup_size(ctx
.options
->chip_class
, nir
);
5925 for (i
= 0; i
< AC_UD_MAX_SETS
; i
++)
5926 shader_info
->user_sgprs_locs
.descriptor_sets
[i
].sgpr_idx
= -1;
5927 for (i
= 0; i
< AC_UD_MAX_UD
; i
++)
5928 shader_info
->user_sgprs_locs
.shader_data
[i
].sgpr_idx
= -1;
5930 create_function(&ctx
);
5932 if (nir
->stage
== MESA_SHADER_COMPUTE
) {
5934 nir_foreach_variable(variable
, &nir
->shared
)
5938 uint32_t shared_size
= 0;
5940 LLVMTypeRef i8p
= LLVMPointerType(ctx
.i8
, LOCAL_ADDR_SPACE
);
5941 nir_foreach_variable(variable
, &nir
->shared
) {
5942 handle_shared_compute_var(&ctx
, variable
, &shared_size
, idx
);
5947 var
= LLVMAddGlobalInAddressSpace(ctx
.module
,
5948 LLVMArrayType(ctx
.i8
, shared_size
),
5951 LLVMSetAlignment(var
, 4);
5952 ctx
.shared_memory
= LLVMBuildBitCast(ctx
.builder
, var
, i8p
, "");
5954 } else if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
5955 ctx
.gs_next_vertex
= ac_build_alloca(&ctx
, ctx
.i32
, "gs_next_vertex");
5957 ctx
.gs_max_out_vertices
= nir
->info
.gs
.vertices_out
;
5958 } else if (nir
->stage
== MESA_SHADER_TESS_EVAL
) {
5959 ctx
.tes_primitive_mode
= nir
->info
.tess
.primitive_mode
;
5962 ac_setup_rings(&ctx
);
5964 nir_foreach_variable(variable
, &nir
->inputs
)
5965 handle_shader_input_decl(&ctx
, variable
);
5967 if (nir
->stage
== MESA_SHADER_FRAGMENT
)
5968 handle_fs_inputs_pre(&ctx
, nir
);
5970 ctx
.num_output_clips
= nir
->info
.clip_distance_array_size
;
5971 ctx
.num_output_culls
= nir
->info
.cull_distance_array_size
;
5973 nir_foreach_variable(variable
, &nir
->outputs
)
5974 handle_shader_output_decl(&ctx
, variable
);
5976 ctx
.defs
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
5977 _mesa_key_pointer_equal
);
5978 ctx
.phis
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
5979 _mesa_key_pointer_equal
);
5981 func
= (struct nir_function
*)exec_list_get_head(&nir
->functions
);
5983 setup_locals(&ctx
, func
);
5985 visit_cf_list(&ctx
, &func
->impl
->body
);
5986 phi_post_pass(&ctx
);
5988 handle_shader_outputs_post(&ctx
);
5989 LLVMBuildRetVoid(ctx
.builder
);
5991 ac_llvm_finalize_module(&ctx
);
5993 ac_nir_eliminate_const_vs_outputs(&ctx
);
5995 ralloc_free(ctx
.defs
);
5996 ralloc_free(ctx
.phis
);
5998 if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
5999 unsigned addclip
= ctx
.num_output_clips
+ ctx
.num_output_culls
> 4;
6000 shader_info
->gs
.gsvs_vertex_size
= (util_bitcount64(ctx
.output_mask
) + addclip
) * 16;
6001 shader_info
->gs
.max_gsvs_emit_size
= shader_info
->gs
.gsvs_vertex_size
*
6002 nir
->info
.gs
.vertices_out
;
6003 } else if (nir
->stage
== MESA_SHADER_TESS_CTRL
) {
6004 shader_info
->tcs
.outputs_written
= ctx
.tess_outputs_written
;
6005 shader_info
->tcs
.patch_outputs_written
= ctx
.tess_patch_outputs_written
;
6006 } else if (nir
->stage
== MESA_SHADER_VERTEX
&& ctx
.options
->key
.vs
.as_ls
) {
6007 shader_info
->vs
.outputs_written
= ctx
.tess_outputs_written
;
6013 static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di
, void *context
)
6015 unsigned *retval
= (unsigned *)context
;
6016 LLVMDiagnosticSeverity severity
= LLVMGetDiagInfoSeverity(di
);
6017 char *description
= LLVMGetDiagInfoDescription(di
);
6019 if (severity
== LLVMDSError
) {
6021 fprintf(stderr
, "LLVM triggered Diagnostic Handler: %s\n",
6025 LLVMDisposeMessage(description
);
6028 static unsigned ac_llvm_compile(LLVMModuleRef M
,
6029 struct ac_shader_binary
*binary
,
6030 LLVMTargetMachineRef tm
)
6032 unsigned retval
= 0;
6034 LLVMContextRef llvm_ctx
;
6035 LLVMMemoryBufferRef out_buffer
;
6036 unsigned buffer_size
;
6037 const char *buffer_data
;
6040 /* Setup Diagnostic Handler*/
6041 llvm_ctx
= LLVMGetModuleContext(M
);
6043 LLVMContextSetDiagnosticHandler(llvm_ctx
, ac_diagnostic_handler
,
6047 mem_err
= LLVMTargetMachineEmitToMemoryBuffer(tm
, M
, LLVMObjectFile
,
6050 /* Process Errors/Warnings */
6052 fprintf(stderr
, "%s: %s", __FUNCTION__
, err
);
6058 /* Extract Shader Code*/
6059 buffer_size
= LLVMGetBufferSize(out_buffer
);
6060 buffer_data
= LLVMGetBufferStart(out_buffer
);
6062 ac_elf_read(buffer_data
, buffer_size
, binary
);
6065 LLVMDisposeMemoryBuffer(out_buffer
);
6071 static void ac_compile_llvm_module(LLVMTargetMachineRef tm
,
6072 LLVMModuleRef llvm_module
,
6073 struct ac_shader_binary
*binary
,
6074 struct ac_shader_config
*config
,
6075 struct ac_shader_variant_info
*shader_info
,
6076 gl_shader_stage stage
,
6077 bool dump_shader
, bool supports_spill
)
6080 ac_dump_module(llvm_module
);
6082 memset(binary
, 0, sizeof(*binary
));
6083 int v
= ac_llvm_compile(llvm_module
, binary
, tm
);
6085 fprintf(stderr
, "compile failed\n");
6089 fprintf(stderr
, "disasm:\n%s\n", binary
->disasm_string
);
6091 ac_shader_binary_read_config(binary
, config
, 0, supports_spill
);
6093 LLVMContextRef ctx
= LLVMGetModuleContext(llvm_module
);
6094 LLVMDisposeModule(llvm_module
);
6095 LLVMContextDispose(ctx
);
6097 if (stage
== MESA_SHADER_FRAGMENT
) {
6098 shader_info
->num_input_vgprs
= 0;
6099 if (G_0286CC_PERSP_SAMPLE_ENA(config
->spi_ps_input_addr
))
6100 shader_info
->num_input_vgprs
+= 2;
6101 if (G_0286CC_PERSP_CENTER_ENA(config
->spi_ps_input_addr
))
6102 shader_info
->num_input_vgprs
+= 2;
6103 if (G_0286CC_PERSP_CENTROID_ENA(config
->spi_ps_input_addr
))
6104 shader_info
->num_input_vgprs
+= 2;
6105 if (G_0286CC_PERSP_PULL_MODEL_ENA(config
->spi_ps_input_addr
))
6106 shader_info
->num_input_vgprs
+= 3;
6107 if (G_0286CC_LINEAR_SAMPLE_ENA(config
->spi_ps_input_addr
))
6108 shader_info
->num_input_vgprs
+= 2;
6109 if (G_0286CC_LINEAR_CENTER_ENA(config
->spi_ps_input_addr
))
6110 shader_info
->num_input_vgprs
+= 2;
6111 if (G_0286CC_LINEAR_CENTROID_ENA(config
->spi_ps_input_addr
))
6112 shader_info
->num_input_vgprs
+= 2;
6113 if (G_0286CC_LINE_STIPPLE_TEX_ENA(config
->spi_ps_input_addr
))
6114 shader_info
->num_input_vgprs
+= 1;
6115 if (G_0286CC_POS_X_FLOAT_ENA(config
->spi_ps_input_addr
))
6116 shader_info
->num_input_vgprs
+= 1;
6117 if (G_0286CC_POS_Y_FLOAT_ENA(config
->spi_ps_input_addr
))
6118 shader_info
->num_input_vgprs
+= 1;
6119 if (G_0286CC_POS_Z_FLOAT_ENA(config
->spi_ps_input_addr
))
6120 shader_info
->num_input_vgprs
+= 1;
6121 if (G_0286CC_POS_W_FLOAT_ENA(config
->spi_ps_input_addr
))
6122 shader_info
->num_input_vgprs
+= 1;
6123 if (G_0286CC_FRONT_FACE_ENA(config
->spi_ps_input_addr
))
6124 shader_info
->num_input_vgprs
+= 1;
6125 if (G_0286CC_ANCILLARY_ENA(config
->spi_ps_input_addr
))
6126 shader_info
->num_input_vgprs
+= 1;
6127 if (G_0286CC_SAMPLE_COVERAGE_ENA(config
->spi_ps_input_addr
))
6128 shader_info
->num_input_vgprs
+= 1;
6129 if (G_0286CC_POS_FIXED_PT_ENA(config
->spi_ps_input_addr
))
6130 shader_info
->num_input_vgprs
+= 1;
6132 config
->num_vgprs
= MAX2(config
->num_vgprs
, shader_info
->num_input_vgprs
);
6134 /* +3 for scratch wave offset and VCC */
6135 config
->num_sgprs
= MAX2(config
->num_sgprs
,
6136 shader_info
->num_input_sgprs
+ 3);
6139 void ac_compile_nir_shader(LLVMTargetMachineRef tm
,
6140 struct ac_shader_binary
*binary
,
6141 struct ac_shader_config
*config
,
6142 struct ac_shader_variant_info
*shader_info
,
6143 struct nir_shader
*nir
,
6144 const struct ac_nir_compiler_options
*options
,
6148 LLVMModuleRef llvm_module
= ac_translate_nir_to_llvm(tm
, nir
, shader_info
,
6151 ac_compile_llvm_module(tm
, llvm_module
, binary
, config
, shader_info
, nir
->stage
, dump_shader
, options
->supports_spill
);
6152 switch (nir
->stage
) {
6153 case MESA_SHADER_COMPUTE
:
6154 for (int i
= 0; i
< 3; ++i
)
6155 shader_info
->cs
.block_size
[i
] = nir
->info
.cs
.local_size
[i
];
6157 case MESA_SHADER_FRAGMENT
:
6158 shader_info
->fs
.early_fragment_test
= nir
->info
.fs
.early_fragment_tests
;
6160 case MESA_SHADER_GEOMETRY
:
6161 shader_info
->gs
.vertices_in
= nir
->info
.gs
.vertices_in
;
6162 shader_info
->gs
.vertices_out
= nir
->info
.gs
.vertices_out
;
6163 shader_info
->gs
.output_prim
= nir
->info
.gs
.output_primitive
;
6164 shader_info
->gs
.invocations
= nir
->info
.gs
.invocations
;
6166 case MESA_SHADER_TESS_EVAL
:
6167 shader_info
->tes
.primitive_mode
= nir
->info
.tess
.primitive_mode
;
6168 shader_info
->tes
.spacing
= nir
->info
.tess
.spacing
;
6169 shader_info
->tes
.ccw
= nir
->info
.tess
.ccw
;
6170 shader_info
->tes
.point_mode
= nir
->info
.tess
.point_mode
;
6171 shader_info
->tes
.as_es
= options
->key
.tes
.as_es
;
6173 case MESA_SHADER_TESS_CTRL
:
6174 shader_info
->tcs
.tcs_vertices_out
= nir
->info
.tess
.tcs_vertices_out
;
6176 case MESA_SHADER_VERTEX
:
6177 shader_info
->vs
.as_es
= options
->key
.vs
.as_es
;
6178 shader_info
->vs
.as_ls
= options
->key
.vs
.as_ls
;
6179 /* in LS mode we need at least 1, invocation id needs 3, handled elsewhere */
6180 if (options
->key
.vs
.as_ls
)
6181 shader_info
->vs
.vgpr_comp_cnt
= MAX2(1, shader_info
->vs
.vgpr_comp_cnt
);
6189 ac_gs_copy_shader_emit(struct nir_to_llvm_context
*ctx
)
6191 LLVMValueRef args
[9];
6192 args
[0] = ctx
->gsvs_ring
;
6193 args
[1] = LLVMBuildMul(ctx
->builder
, ctx
->vertex_id
, LLVMConstInt(ctx
->i32
, 4, false), "");
6194 args
[3] = ctx
->i32zero
;
6195 args
[4] = ctx
->i32one
; /* OFFEN */
6196 args
[5] = ctx
->i32zero
; /* IDXEN */
6197 args
[6] = ctx
->i32one
; /* GLC */
6198 args
[7] = ctx
->i32one
; /* SLC */
6199 args
[8] = ctx
->i32zero
; /* TFE */
6203 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
6207 if (!(ctx
->output_mask
& (1ull << i
)))
6210 if (i
== VARYING_SLOT_CLIP_DIST0
) {
6211 /* unpack clip and cull from a single set of slots */
6212 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
6217 for (unsigned j
= 0; j
< length
; j
++) {
6219 args
[2] = LLVMConstInt(ctx
->i32
,
6221 ctx
->gs_max_out_vertices
* 16 * 4, false);
6223 value
= ac_build_intrinsic(&ctx
->ac
,
6224 "llvm.SI.buffer.load.dword.i32.i32",
6226 AC_FUNC_ATTR_READONLY
|
6227 AC_FUNC_ATTR_LEGACY
);
6229 LLVMBuildStore(ctx
->builder
,
6230 to_float(&ctx
->ac
, value
), ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)]);
6234 handle_vs_outputs_post(ctx
, false, &ctx
->shader_info
->vs
.outinfo
);
6237 void ac_create_gs_copy_shader(LLVMTargetMachineRef tm
,
6238 struct nir_shader
*geom_shader
,
6239 struct ac_shader_binary
*binary
,
6240 struct ac_shader_config
*config
,
6241 struct ac_shader_variant_info
*shader_info
,
6242 const struct ac_nir_compiler_options
*options
,
6245 struct nir_to_llvm_context ctx
= {0};
6246 ctx
.context
= LLVMContextCreate();
6247 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
6248 ctx
.options
= options
;
6249 ctx
.shader_info
= shader_info
;
6251 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
6252 ctx
.ac
.module
= ctx
.module
;
6254 ctx
.is_gs_copy_shader
= true;
6255 LLVMSetTarget(ctx
.module
, "amdgcn--");
6258 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
6259 ctx
.ac
.builder
= ctx
.builder
;
6260 ctx
.stage
= MESA_SHADER_VERTEX
;
6262 create_function(&ctx
);
6264 ctx
.gs_max_out_vertices
= geom_shader
->info
.gs
.vertices_out
;
6265 ac_setup_rings(&ctx
);
6267 ctx
.num_output_clips
= geom_shader
->info
.clip_distance_array_size
;
6268 ctx
.num_output_culls
= geom_shader
->info
.cull_distance_array_size
;
6270 nir_foreach_variable(variable
, &geom_shader
->outputs
)
6271 handle_shader_output_decl(&ctx
, variable
);
6273 ac_gs_copy_shader_emit(&ctx
);
6275 LLVMBuildRetVoid(ctx
.builder
);
6277 ac_llvm_finalize_module(&ctx
);
6279 ac_compile_llvm_module(tm
, ctx
.module
, binary
, config
, shader_info
,
6281 dump_shader
, options
->supports_spill
);