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nir/i965/anv/radv/gallium: make shader info a pointer
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_binary.h"
26 #include "sid.h"
27 #include "nir/nir.h"
28 #include "../vulkan/radv_descriptor_set.h"
29 #include "util/bitscan.h"
30 #include <llvm-c/Transforms/Scalar.h>
31
32 enum radeon_llvm_calling_convention {
33 RADEON_LLVM_AMDGPU_VS = 87,
34 RADEON_LLVM_AMDGPU_GS = 88,
35 RADEON_LLVM_AMDGPU_PS = 89,
36 RADEON_LLVM_AMDGPU_CS = 90,
37 };
38
39 #define CONST_ADDR_SPACE 2
40 #define LOCAL_ADDR_SPACE 3
41
42 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
43 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
44
45 enum desc_type {
46 DESC_IMAGE,
47 DESC_FMASK,
48 DESC_SAMPLER,
49 DESC_BUFFER,
50 };
51
52 struct nir_to_llvm_context {
53 const struct ac_nir_compiler_options *options;
54 struct ac_shader_variant_info *shader_info;
55
56 LLVMContextRef context;
57 LLVMModuleRef module;
58 LLVMBuilderRef builder;
59 LLVMValueRef main_function;
60
61 struct hash_table *defs;
62 struct hash_table *phis;
63
64 LLVMValueRef descriptor_sets[4];
65 LLVMValueRef push_constants;
66 LLVMValueRef num_work_groups;
67 LLVMValueRef workgroup_ids;
68 LLVMValueRef local_invocation_ids;
69 LLVMValueRef tg_size;
70
71 LLVMValueRef vertex_buffers;
72 LLVMValueRef base_vertex;
73 LLVMValueRef start_instance;
74 LLVMValueRef vertex_id;
75 LLVMValueRef rel_auto_id;
76 LLVMValueRef vs_prim_id;
77 LLVMValueRef instance_id;
78
79 LLVMValueRef prim_mask;
80 LLVMValueRef sample_positions;
81 LLVMValueRef persp_sample, persp_center, persp_centroid;
82 LLVMValueRef linear_sample, linear_center, linear_centroid;
83 LLVMValueRef front_face;
84 LLVMValueRef ancillary;
85 LLVMValueRef frag_pos[4];
86
87 LLVMBasicBlockRef continue_block;
88 LLVMBasicBlockRef break_block;
89
90 LLVMTypeRef i1;
91 LLVMTypeRef i8;
92 LLVMTypeRef i16;
93 LLVMTypeRef i32;
94 LLVMTypeRef i64;
95 LLVMTypeRef v2i32;
96 LLVMTypeRef v3i32;
97 LLVMTypeRef v4i32;
98 LLVMTypeRef v8i32;
99 LLVMTypeRef f32;
100 LLVMTypeRef f16;
101 LLVMTypeRef v2f32;
102 LLVMTypeRef v4f32;
103 LLVMTypeRef v16i8;
104 LLVMTypeRef voidt;
105
106 LLVMValueRef i32zero;
107 LLVMValueRef i32one;
108 LLVMValueRef f32zero;
109 LLVMValueRef f32one;
110 LLVMValueRef v4f32empty;
111
112 unsigned range_md_kind;
113 unsigned uniform_md_kind;
114 unsigned fpmath_md_kind;
115 unsigned invariant_load_md_kind;
116 LLVMValueRef empty_md;
117 LLVMValueRef fpmath_md_2p5_ulp;
118 gl_shader_stage stage;
119
120 LLVMValueRef lds;
121 LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
122 LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS * 4];
123
124 LLVMValueRef shared_memory;
125 uint64_t input_mask;
126 uint64_t output_mask;
127 int num_locals;
128 LLVMValueRef *locals;
129 bool has_ddxy;
130 unsigned num_clips;
131 unsigned num_culls;
132 };
133
134 struct ac_tex_info {
135 LLVMValueRef args[12];
136 int arg_count;
137 LLVMTypeRef dst_type;
138 bool has_offset;
139 };
140
141 static LLVMValueRef
142 emit_llvm_intrinsic(struct nir_to_llvm_context *ctx, const char *name,
143 LLVMTypeRef return_type, LLVMValueRef *params,
144 unsigned param_count, LLVMAttribute attribs);
145 static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
146 nir_deref_var *deref,
147 enum desc_type desc_type);
148 static unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan)
149 {
150 return (index * 4) + chan;
151 }
152
153 static unsigned llvm_get_type_size(LLVMTypeRef type)
154 {
155 LLVMTypeKind kind = LLVMGetTypeKind(type);
156
157 switch (kind) {
158 case LLVMIntegerTypeKind:
159 return LLVMGetIntTypeWidth(type) / 8;
160 case LLVMFloatTypeKind:
161 return 4;
162 case LLVMPointerTypeKind:
163 return 8;
164 case LLVMVectorTypeKind:
165 return LLVMGetVectorSize(type) *
166 llvm_get_type_size(LLVMGetElementType(type));
167 default:
168 assert(0);
169 return 0;
170 }
171 }
172
173 static void set_llvm_calling_convention(LLVMValueRef func,
174 gl_shader_stage stage)
175 {
176 enum radeon_llvm_calling_convention calling_conv;
177
178 switch (stage) {
179 case MESA_SHADER_VERTEX:
180 case MESA_SHADER_TESS_CTRL:
181 case MESA_SHADER_TESS_EVAL:
182 calling_conv = RADEON_LLVM_AMDGPU_VS;
183 break;
184 case MESA_SHADER_GEOMETRY:
185 calling_conv = RADEON_LLVM_AMDGPU_GS;
186 break;
187 case MESA_SHADER_FRAGMENT:
188 calling_conv = RADEON_LLVM_AMDGPU_PS;
189 break;
190 case MESA_SHADER_COMPUTE:
191 calling_conv = RADEON_LLVM_AMDGPU_CS;
192 break;
193 default:
194 unreachable("Unhandle shader type");
195 }
196
197 LLVMSetFunctionCallConv(func, calling_conv);
198 }
199
200 static LLVMValueRef
201 create_llvm_function(LLVMContextRef ctx, LLVMModuleRef module,
202 LLVMBuilderRef builder, LLVMTypeRef *return_types,
203 unsigned num_return_elems, LLVMTypeRef *param_types,
204 unsigned param_count, unsigned array_params,
205 unsigned sgpr_params, bool unsafe_math)
206 {
207 LLVMTypeRef main_function_type, ret_type;
208 LLVMBasicBlockRef main_function_body;
209
210 if (num_return_elems)
211 ret_type = LLVMStructTypeInContext(ctx, return_types,
212 num_return_elems, true);
213 else
214 ret_type = LLVMVoidTypeInContext(ctx);
215
216 /* Setup the function */
217 main_function_type =
218 LLVMFunctionType(ret_type, param_types, param_count, 0);
219 LLVMValueRef main_function =
220 LLVMAddFunction(module, "main", main_function_type);
221 main_function_body =
222 LLVMAppendBasicBlockInContext(ctx, main_function, "main_body");
223 LLVMPositionBuilderAtEnd(builder, main_function_body);
224
225 LLVMSetFunctionCallConv(main_function, RADEON_LLVM_AMDGPU_CS);
226 for (unsigned i = 0; i < sgpr_params; ++i) {
227 LLVMValueRef P = LLVMGetParam(main_function, i);
228
229 if (i < array_params) {
230 LLVMAddAttribute(P, LLVMByValAttribute);
231 ac_add_attr_dereferenceable(P, UINT64_MAX);
232 }
233 else
234 LLVMAddAttribute(P, LLVMInRegAttribute);
235 }
236
237 if (unsafe_math) {
238 /* These were copied from some LLVM test. */
239 LLVMAddTargetDependentFunctionAttr(main_function,
240 "less-precise-fpmad",
241 "true");
242 LLVMAddTargetDependentFunctionAttr(main_function,
243 "no-infs-fp-math",
244 "true");
245 LLVMAddTargetDependentFunctionAttr(main_function,
246 "no-nans-fp-math",
247 "true");
248 LLVMAddTargetDependentFunctionAttr(main_function,
249 "unsafe-fp-math",
250 "true");
251 }
252 return main_function;
253 }
254
255 static LLVMTypeRef const_array(LLVMTypeRef elem_type, int num_elements)
256 {
257 return LLVMPointerType(LLVMArrayType(elem_type, num_elements),
258 CONST_ADDR_SPACE);
259 }
260
261 static LLVMValueRef get_shared_memory_ptr(struct nir_to_llvm_context *ctx,
262 int idx,
263 LLVMTypeRef type)
264 {
265 LLVMValueRef offset;
266 LLVMValueRef ptr;
267 int addr_space;
268
269 offset = LLVMConstInt(ctx->i32, idx, false);
270
271 ptr = ctx->shared_memory;
272 ptr = LLVMBuildGEP(ctx->builder, ptr, &offset, 1, "");
273 addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
274 ptr = LLVMBuildBitCast(ctx->builder, ptr, LLVMPointerType(type, addr_space), "");
275 return ptr;
276 }
277
278 static LLVMValueRef to_integer(struct nir_to_llvm_context *ctx, LLVMValueRef v)
279 {
280 LLVMTypeRef type = LLVMTypeOf(v);
281 if (type == ctx->f32) {
282 return LLVMBuildBitCast(ctx->builder, v, ctx->i32, "");
283 } else if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
284 LLVMTypeRef elem_type = LLVMGetElementType(type);
285 if (elem_type == ctx->f32) {
286 LLVMTypeRef nt = LLVMVectorType(ctx->i32, LLVMGetVectorSize(type));
287 return LLVMBuildBitCast(ctx->builder, v, nt, "");
288 }
289 }
290 return v;
291 }
292
293 static LLVMValueRef to_float(struct nir_to_llvm_context *ctx, LLVMValueRef v)
294 {
295 LLVMTypeRef type = LLVMTypeOf(v);
296 if (type == ctx->i32) {
297 return LLVMBuildBitCast(ctx->builder, v, ctx->f32, "");
298 } else if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
299 LLVMTypeRef elem_type = LLVMGetElementType(type);
300 if (elem_type == ctx->i32) {
301 LLVMTypeRef nt = LLVMVectorType(ctx->f32, LLVMGetVectorSize(type));
302 return LLVMBuildBitCast(ctx->builder, v, nt, "");
303 }
304 }
305 return v;
306 }
307
308 static LLVMValueRef build_indexed_load(struct nir_to_llvm_context *ctx,
309 LLVMValueRef base_ptr, LLVMValueRef index,
310 bool uniform)
311 {
312 LLVMValueRef pointer;
313 LLVMValueRef indices[] = {ctx->i32zero, index};
314
315 pointer = LLVMBuildGEP(ctx->builder, base_ptr, indices, 2, "");
316 if (uniform)
317 LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
318 return LLVMBuildLoad(ctx->builder, pointer, "");
319 }
320
321 static LLVMValueRef build_indexed_load_const(struct nir_to_llvm_context *ctx,
322 LLVMValueRef base_ptr, LLVMValueRef index)
323 {
324 LLVMValueRef result = build_indexed_load(ctx, base_ptr, index, true);
325 LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
326 return result;
327 }
328
329 static void create_function(struct nir_to_llvm_context *ctx,
330 struct nir_shader *nir)
331 {
332 LLVMTypeRef arg_types[23];
333 unsigned arg_idx = 0;
334 unsigned array_count = 0;
335 unsigned sgpr_count = 0, user_sgpr_count;
336 unsigned i;
337
338 /* 1 for each descriptor set */
339 for (unsigned i = 0; i < 4; ++i)
340 arg_types[arg_idx++] = const_array(ctx->i8, 1024 * 1024);
341
342 /* 1 for push constants and dynamic descriptors */
343 arg_types[arg_idx++] = const_array(ctx->i8, 1024 * 1024);
344
345 array_count = arg_idx;
346 switch (nir->stage) {
347 case MESA_SHADER_COMPUTE:
348 arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3); /* grid size */
349 user_sgpr_count = arg_idx;
350 arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3);
351 arg_types[arg_idx++] = ctx->i32;
352 sgpr_count = arg_idx;
353
354 arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3);
355 break;
356 case MESA_SHADER_VERTEX:
357 arg_types[arg_idx++] = const_array(ctx->v16i8, 16); /* vertex buffers */
358 arg_types[arg_idx++] = ctx->i32; // base vertex
359 arg_types[arg_idx++] = ctx->i32; // start instance
360 user_sgpr_count = sgpr_count = arg_idx;
361 arg_types[arg_idx++] = ctx->i32; // vertex id
362 arg_types[arg_idx++] = ctx->i32; // rel auto id
363 arg_types[arg_idx++] = ctx->i32; // vs prim id
364 arg_types[arg_idx++] = ctx->i32; // instance id
365 break;
366 case MESA_SHADER_FRAGMENT:
367 arg_types[arg_idx++] = const_array(ctx->f32, 32); /* sample positions */
368 user_sgpr_count = arg_idx;
369 arg_types[arg_idx++] = ctx->i32; /* prim mask */
370 sgpr_count = arg_idx;
371 arg_types[arg_idx++] = ctx->v2i32; /* persp sample */
372 arg_types[arg_idx++] = ctx->v2i32; /* persp center */
373 arg_types[arg_idx++] = ctx->v2i32; /* persp centroid */
374 arg_types[arg_idx++] = ctx->v3i32; /* persp pull model */
375 arg_types[arg_idx++] = ctx->v2i32; /* linear sample */
376 arg_types[arg_idx++] = ctx->v2i32; /* linear center */
377 arg_types[arg_idx++] = ctx->v2i32; /* linear centroid */
378 arg_types[arg_idx++] = ctx->f32; /* line stipple tex */
379 arg_types[arg_idx++] = ctx->f32; /* pos x float */
380 arg_types[arg_idx++] = ctx->f32; /* pos y float */
381 arg_types[arg_idx++] = ctx->f32; /* pos z float */
382 arg_types[arg_idx++] = ctx->f32; /* pos w float */
383 arg_types[arg_idx++] = ctx->i32; /* front face */
384 arg_types[arg_idx++] = ctx->i32; /* ancillary */
385 arg_types[arg_idx++] = ctx->f32; /* sample coverage */
386 arg_types[arg_idx++] = ctx->i32; /* fixed pt */
387 break;
388 default:
389 unreachable("Shader stage not implemented");
390 }
391
392 ctx->main_function = create_llvm_function(
393 ctx->context, ctx->module, ctx->builder, NULL, 0, arg_types,
394 arg_idx, array_count, sgpr_count, ctx->options->unsafe_math);
395 set_llvm_calling_convention(ctx->main_function, nir->stage);
396
397
398 ctx->shader_info->num_input_sgprs = 0;
399 ctx->shader_info->num_input_vgprs = 0;
400
401 for (i = 0; i < user_sgpr_count; i++)
402 ctx->shader_info->num_user_sgprs += llvm_get_type_size(arg_types[i]) / 4;
403
404 ctx->shader_info->num_input_sgprs = ctx->shader_info->num_user_sgprs;
405 for (; i < sgpr_count; i++)
406 ctx->shader_info->num_input_sgprs += llvm_get_type_size(arg_types[i]) / 4;
407
408 if (nir->stage != MESA_SHADER_FRAGMENT)
409 for (; i < arg_idx; ++i)
410 ctx->shader_info->num_input_vgprs += llvm_get_type_size(arg_types[i]) / 4;
411
412 arg_idx = 0;
413 for (unsigned i = 0; i < 4; ++i)
414 ctx->descriptor_sets[i] =
415 LLVMGetParam(ctx->main_function, arg_idx++);
416
417 ctx->push_constants = LLVMGetParam(ctx->main_function, arg_idx++);
418
419 switch (nir->stage) {
420 case MESA_SHADER_COMPUTE:
421 ctx->num_work_groups =
422 LLVMGetParam(ctx->main_function, arg_idx++);
423 ctx->workgroup_ids =
424 LLVMGetParam(ctx->main_function, arg_idx++);
425 ctx->tg_size =
426 LLVMGetParam(ctx->main_function, arg_idx++);
427 ctx->local_invocation_ids =
428 LLVMGetParam(ctx->main_function, arg_idx++);
429 break;
430 case MESA_SHADER_VERTEX:
431 ctx->vertex_buffers = LLVMGetParam(ctx->main_function, arg_idx++);
432 ctx->base_vertex = LLVMGetParam(ctx->main_function, arg_idx++);
433 ctx->start_instance = LLVMGetParam(ctx->main_function, arg_idx++);
434 ctx->vertex_id = LLVMGetParam(ctx->main_function, arg_idx++);
435 ctx->rel_auto_id = LLVMGetParam(ctx->main_function, arg_idx++);
436 ctx->vs_prim_id = LLVMGetParam(ctx->main_function, arg_idx++);
437 ctx->instance_id = LLVMGetParam(ctx->main_function, arg_idx++);
438 break;
439 case MESA_SHADER_FRAGMENT:
440 ctx->sample_positions = LLVMGetParam(ctx->main_function, arg_idx++);
441 ctx->prim_mask = LLVMGetParam(ctx->main_function, arg_idx++);
442 ctx->persp_sample = LLVMGetParam(ctx->main_function, arg_idx++);
443 ctx->persp_center = LLVMGetParam(ctx->main_function, arg_idx++);
444 ctx->persp_centroid = LLVMGetParam(ctx->main_function, arg_idx++);
445 arg_idx++;
446 ctx->linear_sample = LLVMGetParam(ctx->main_function, arg_idx++);
447 ctx->linear_center = LLVMGetParam(ctx->main_function, arg_idx++);
448 ctx->linear_centroid = LLVMGetParam(ctx->main_function, arg_idx++);
449 arg_idx++; /* line stipple */
450 ctx->frag_pos[0] = LLVMGetParam(ctx->main_function, arg_idx++);
451 ctx->frag_pos[1] = LLVMGetParam(ctx->main_function, arg_idx++);
452 ctx->frag_pos[2] = LLVMGetParam(ctx->main_function, arg_idx++);
453 ctx->frag_pos[3] = LLVMGetParam(ctx->main_function, arg_idx++);
454 ctx->front_face = LLVMGetParam(ctx->main_function, arg_idx++);
455 ctx->ancillary = LLVMGetParam(ctx->main_function, arg_idx++);
456 break;
457 default:
458 unreachable("Shader stage not implemented");
459 }
460 }
461
462 static void setup_types(struct nir_to_llvm_context *ctx)
463 {
464 LLVMValueRef args[4];
465
466 ctx->voidt = LLVMVoidTypeInContext(ctx->context);
467 ctx->i1 = LLVMIntTypeInContext(ctx->context, 1);
468 ctx->i8 = LLVMIntTypeInContext(ctx->context, 8);
469 ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
470 ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
471 ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
472 ctx->v2i32 = LLVMVectorType(ctx->i32, 2);
473 ctx->v3i32 = LLVMVectorType(ctx->i32, 3);
474 ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
475 ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
476 ctx->f32 = LLVMFloatTypeInContext(ctx->context);
477 ctx->f16 = LLVMHalfTypeInContext(ctx->context);
478 ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
479 ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
480 ctx->v16i8 = LLVMVectorType(ctx->i8, 16);
481
482 ctx->i32zero = LLVMConstInt(ctx->i32, 0, false);
483 ctx->i32one = LLVMConstInt(ctx->i32, 1, false);
484 ctx->f32zero = LLVMConstReal(ctx->f32, 0.0);
485 ctx->f32one = LLVMConstReal(ctx->f32, 1.0);
486
487 args[0] = ctx->f32zero;
488 args[1] = ctx->f32zero;
489 args[2] = ctx->f32zero;
490 args[3] = ctx->f32one;
491 ctx->v4f32empty = LLVMConstVector(args, 4);
492
493 ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
494 "range", 5);
495 ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context,
496 "invariant.load", 14);
497 ctx->uniform_md_kind =
498 LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14);
499 ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
500
501 ctx->fpmath_md_kind = LLVMGetMDKindIDInContext(ctx->context, "fpmath", 6);
502
503 args[0] = LLVMConstReal(ctx->f32, 2.5);
504 ctx->fpmath_md_2p5_ulp = LLVMMDNodeInContext(ctx->context, args, 1);
505 }
506
507 static int get_llvm_num_components(LLVMValueRef value)
508 {
509 LLVMTypeRef type = LLVMTypeOf(value);
510 unsigned num_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
511 ? LLVMGetVectorSize(type)
512 : 1;
513 return num_components;
514 }
515
516 static LLVMValueRef llvm_extract_elem(struct nir_to_llvm_context *ctx,
517 LLVMValueRef value,
518 int index)
519 {
520 int count = get_llvm_num_components(value);
521
522 assert(index < count);
523 if (count == 1)
524 return value;
525
526 return LLVMBuildExtractElement(ctx->builder, value,
527 LLVMConstInt(ctx->i32, index, false), "");
528 }
529
530 static LLVMValueRef trim_vector(struct nir_to_llvm_context *ctx,
531 LLVMValueRef value, unsigned count)
532 {
533 unsigned num_components = get_llvm_num_components(value);
534 if (count == num_components)
535 return value;
536
537 LLVMValueRef masks[] = {
538 LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false),
539 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false)};
540
541 if (count == 1)
542 return LLVMBuildExtractElement(ctx->builder, value, masks[0],
543 "");
544
545 LLVMValueRef swizzle = LLVMConstVector(masks, count);
546 return LLVMBuildShuffleVector(ctx->builder, value, value, swizzle, "");
547 }
548
549 static LLVMValueRef
550 build_gather_values_extended(struct nir_to_llvm_context *ctx,
551 LLVMValueRef *values,
552 unsigned value_count,
553 unsigned value_stride,
554 bool load)
555 {
556 LLVMBuilderRef builder = ctx->builder;
557 LLVMValueRef vec;
558 unsigned i;
559
560
561 if (value_count == 1) {
562 if (load)
563 return LLVMBuildLoad(builder, values[0], "");
564 return values[0];
565 }
566
567 for (i = 0; i < value_count; i++) {
568 LLVMValueRef value = values[i * value_stride];
569 if (load)
570 value = LLVMBuildLoad(builder, value, "");
571
572 if (!i)
573 vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
574 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
575 vec = LLVMBuildInsertElement(builder, vec, value, index, "");
576 }
577 return vec;
578 }
579
580
581 static void
582 build_store_values_extended(struct nir_to_llvm_context *ctx,
583 LLVMValueRef *values,
584 unsigned value_count,
585 unsigned value_stride,
586 LLVMValueRef vec)
587 {
588 LLVMBuilderRef builder = ctx->builder;
589 unsigned i;
590
591 if (value_count == 1) {
592 LLVMBuildStore(builder, vec, values[0]);
593 return;
594 }
595
596 for (i = 0; i < value_count; i++) {
597 LLVMValueRef ptr = values[i * value_stride];
598 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
599 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
600 LLVMBuildStore(builder, value, ptr);
601 }
602 }
603
604 static LLVMValueRef
605 build_gather_values(struct nir_to_llvm_context *ctx,
606 LLVMValueRef *values,
607 unsigned value_count)
608 {
609 return build_gather_values_extended(ctx, values, value_count, 1, false);
610 }
611
612 static LLVMTypeRef get_def_type(struct nir_to_llvm_context *ctx,
613 nir_ssa_def *def)
614 {
615 LLVMTypeRef type = LLVMIntTypeInContext(ctx->context, def->bit_size);
616 if (def->num_components > 1) {
617 type = LLVMVectorType(type, def->num_components);
618 }
619 return type;
620 }
621
622 static LLVMValueRef get_src(struct nir_to_llvm_context *ctx, nir_src src)
623 {
624 assert(src.is_ssa);
625 struct hash_entry *entry = _mesa_hash_table_search(ctx->defs, src.ssa);
626 return (LLVMValueRef)entry->data;
627 }
628
629
630 static LLVMBasicBlockRef get_block(struct nir_to_llvm_context *ctx,
631 struct nir_block *b)
632 {
633 struct hash_entry *entry = _mesa_hash_table_search(ctx->defs, b);
634 return (LLVMBasicBlockRef)entry->data;
635 }
636
637 static LLVMValueRef get_alu_src(struct nir_to_llvm_context *ctx,
638 nir_alu_src src,
639 unsigned num_components)
640 {
641 LLVMValueRef value = get_src(ctx, src.src);
642 bool need_swizzle = false;
643
644 assert(value);
645 LLVMTypeRef type = LLVMTypeOf(value);
646 unsigned src_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
647 ? LLVMGetVectorSize(type)
648 : 1;
649
650 for (unsigned i = 0; i < num_components; ++i) {
651 assert(src.swizzle[i] < src_components);
652 if (src.swizzle[i] != i)
653 need_swizzle = true;
654 }
655
656 if (need_swizzle || num_components != src_components) {
657 LLVMValueRef masks[] = {
658 LLVMConstInt(ctx->i32, src.swizzle[0], false),
659 LLVMConstInt(ctx->i32, src.swizzle[1], false),
660 LLVMConstInt(ctx->i32, src.swizzle[2], false),
661 LLVMConstInt(ctx->i32, src.swizzle[3], false)};
662
663 if (src_components > 1 && num_components == 1) {
664 value = LLVMBuildExtractElement(ctx->builder, value,
665 masks[0], "");
666 } else if (src_components == 1 && num_components > 1) {
667 LLVMValueRef values[] = {value, value, value, value};
668 value = build_gather_values(ctx, values, num_components);
669 } else {
670 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
671 value = LLVMBuildShuffleVector(ctx->builder, value, value,
672 swizzle, "");
673 }
674 }
675 assert(!src.negate);
676 assert(!src.abs);
677 return value;
678 }
679
680 static LLVMValueRef emit_int_cmp(struct nir_to_llvm_context *ctx,
681 LLVMIntPredicate pred, LLVMValueRef src0,
682 LLVMValueRef src1)
683 {
684 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
685 return LLVMBuildSelect(ctx->builder, result,
686 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
687 LLVMConstInt(ctx->i32, 0, false), "");
688 }
689
690 static LLVMValueRef emit_float_cmp(struct nir_to_llvm_context *ctx,
691 LLVMRealPredicate pred, LLVMValueRef src0,
692 LLVMValueRef src1)
693 {
694 LLVMValueRef result;
695 src0 = to_float(ctx, src0);
696 src1 = to_float(ctx, src1);
697 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
698 return LLVMBuildSelect(ctx->builder, result,
699 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
700 LLVMConstInt(ctx->i32, 0, false), "");
701 }
702
703 static LLVMValueRef emit_intrin_1f_param(struct nir_to_llvm_context *ctx,
704 const char *intrin,
705 LLVMValueRef src0)
706 {
707 LLVMValueRef params[] = {
708 to_float(ctx, src0),
709 };
710 return emit_llvm_intrinsic(ctx, intrin, ctx->f32, params, 1, LLVMReadNoneAttribute);
711 }
712
713 static LLVMValueRef emit_intrin_2f_param(struct nir_to_llvm_context *ctx,
714 const char *intrin,
715 LLVMValueRef src0, LLVMValueRef src1)
716 {
717 LLVMValueRef params[] = {
718 to_float(ctx, src0),
719 to_float(ctx, src1),
720 };
721 return emit_llvm_intrinsic(ctx, intrin, ctx->f32, params, 2, LLVMReadNoneAttribute);
722 }
723
724 static LLVMValueRef emit_intrin_3f_param(struct nir_to_llvm_context *ctx,
725 const char *intrin,
726 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
727 {
728 LLVMValueRef params[] = {
729 to_float(ctx, src0),
730 to_float(ctx, src1),
731 to_float(ctx, src2),
732 };
733 return emit_llvm_intrinsic(ctx, intrin, ctx->f32, params, 3, LLVMReadNoneAttribute);
734 }
735
736 static LLVMValueRef emit_bcsel(struct nir_to_llvm_context *ctx,
737 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
738 {
739 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
740 ctx->i32zero, "");
741 return LLVMBuildSelect(ctx->builder, v, src1, src2, "");
742 }
743
744 static LLVMValueRef emit_find_lsb(struct nir_to_llvm_context *ctx,
745 LLVMValueRef src0)
746 {
747 LLVMValueRef params[2] = {
748 src0,
749
750 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
751 * add special code to check for x=0. The reason is that
752 * the LLVM behavior for x=0 is different from what we
753 * need here.
754 *
755 * The hardware already implements the correct behavior.
756 */
757 LLVMConstInt(ctx->i32, 1, false),
758 };
759 return emit_llvm_intrinsic(ctx, "llvm.cttz.i32", ctx->i32, params, 2, LLVMReadNoneAttribute);
760 }
761
762 static LLVMValueRef emit_ifind_msb(struct nir_to_llvm_context *ctx,
763 LLVMValueRef src0)
764 {
765 LLVMValueRef msb = emit_llvm_intrinsic(ctx, "llvm.AMDGPU.flbit.i32",
766 ctx->i32, &src0, 1,
767 LLVMReadNoneAttribute);
768
769 /* The HW returns the last bit index from MSB, but NIR wants
770 * the index from LSB. Invert it by doing "31 - msb". */
771 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
772 msb, "");
773
774 LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
775 LLVMValueRef cond = LLVMBuildOr(ctx->builder,
776 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
777 src0, ctx->i32zero, ""),
778 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
779 src0, all_ones, ""), "");
780
781 return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
782 }
783
784 static LLVMValueRef emit_ufind_msb(struct nir_to_llvm_context *ctx,
785 LLVMValueRef src0)
786 {
787 LLVMValueRef args[2] = {
788 src0,
789 ctx->i32one,
790 };
791 LLVMValueRef msb = emit_llvm_intrinsic(ctx, "llvm.ctlz.i32",
792 ctx->i32, args, ARRAY_SIZE(args),
793 LLVMReadNoneAttribute);
794
795 /* The HW returns the last bit index from MSB, but NIR wants
796 * the index from LSB. Invert it by doing "31 - msb". */
797 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
798 msb, "");
799
800 return LLVMBuildSelect(ctx->builder,
801 LLVMBuildICmp(ctx->builder, LLVMIntEQ, src0,
802 ctx->i32zero, ""),
803 LLVMConstInt(ctx->i32, -1, true), msb, "");
804 }
805
806 static LLVMValueRef emit_minmax_int(struct nir_to_llvm_context *ctx,
807 LLVMIntPredicate pred,
808 LLVMValueRef src0, LLVMValueRef src1)
809 {
810 return LLVMBuildSelect(ctx->builder,
811 LLVMBuildICmp(ctx->builder, pred, src0, src1, ""),
812 src0,
813 src1, "");
814
815 }
816 static LLVMValueRef emit_iabs(struct nir_to_llvm_context *ctx,
817 LLVMValueRef src0)
818 {
819 return emit_minmax_int(ctx, LLVMIntSGT, src0,
820 LLVMBuildNeg(ctx->builder, src0, ""));
821 }
822
823 static LLVMValueRef emit_fsign(struct nir_to_llvm_context *ctx,
824 LLVMValueRef src0)
825 {
826 LLVMValueRef cmp, val;
827
828 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGT, src0, ctx->f32zero, "");
829 val = LLVMBuildSelect(ctx->builder, cmp, ctx->f32one, src0, "");
830 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGE, val, ctx->f32zero, "");
831 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstReal(ctx->f32, -1.0), "");
832 return val;
833 }
834
835 static LLVMValueRef emit_isign(struct nir_to_llvm_context *ctx,
836 LLVMValueRef src0)
837 {
838 LLVMValueRef cmp, val;
839
840 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, src0, ctx->i32zero, "");
841 val = LLVMBuildSelect(ctx->builder, cmp, ctx->i32one, src0, "");
842 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGE, val, ctx->i32zero, "");
843 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstInt(ctx->i32, -1, true), "");
844 return val;
845 }
846
847 static LLVMValueRef emit_ffract(struct nir_to_llvm_context *ctx,
848 LLVMValueRef src0)
849 {
850 const char *intr = "llvm.floor.f32";
851 LLVMValueRef fsrc0 = to_float(ctx, src0);
852 LLVMValueRef params[] = {
853 fsrc0,
854 };
855 LLVMValueRef floor = emit_llvm_intrinsic(ctx, intr,
856 ctx->f32, params, 1,
857 LLVMReadNoneAttribute);
858 return LLVMBuildFSub(ctx->builder, fsrc0, floor, "");
859 }
860
861 static LLVMValueRef emit_uint_carry(struct nir_to_llvm_context *ctx,
862 const char *intrin,
863 LLVMValueRef src0, LLVMValueRef src1)
864 {
865 LLVMTypeRef ret_type;
866 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
867 LLVMValueRef res;
868 LLVMValueRef params[] = { src0, src1 };
869 ret_type = LLVMStructTypeInContext(ctx->context, types,
870 2, true);
871
872 res = emit_llvm_intrinsic(ctx, intrin, ret_type,
873 params, 2, LLVMReadNoneAttribute);
874
875 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
876 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
877 return res;
878 }
879
880 static LLVMValueRef emit_b2f(struct nir_to_llvm_context *ctx,
881 LLVMValueRef src0)
882 {
883 return LLVMBuildAnd(ctx->builder, src0, LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""), "");
884 }
885
886 static LLVMValueRef emit_umul_high(struct nir_to_llvm_context *ctx,
887 LLVMValueRef src0, LLVMValueRef src1)
888 {
889 LLVMValueRef dst64, result;
890 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
891 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
892
893 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
894 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
895 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
896 return result;
897 }
898
899 static LLVMValueRef emit_imul_high(struct nir_to_llvm_context *ctx,
900 LLVMValueRef src0, LLVMValueRef src1)
901 {
902 LLVMValueRef dst64, result;
903 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
904 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
905
906 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
907 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
908 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
909 return result;
910 }
911
912 static LLVMValueRef emit_bitfield_extract(struct nir_to_llvm_context *ctx,
913 const char *intrin,
914 LLVMValueRef srcs[3])
915 {
916 LLVMValueRef result;
917 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
918 result = emit_llvm_intrinsic(ctx, intrin, ctx->i32, srcs, 3, LLVMReadNoneAttribute);
919
920 result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, "");
921 return result;
922 }
923
924 static LLVMValueRef emit_bitfield_insert(struct nir_to_llvm_context *ctx,
925 LLVMValueRef src0, LLVMValueRef src1,
926 LLVMValueRef src2, LLVMValueRef src3)
927 {
928 LLVMValueRef bfi_args[3], result;
929
930 bfi_args[0] = LLVMBuildShl(ctx->builder,
931 LLVMBuildSub(ctx->builder,
932 LLVMBuildShl(ctx->builder,
933 ctx->i32one,
934 src3, ""),
935 ctx->i32one, ""),
936 src2, "");
937 bfi_args[1] = LLVMBuildShl(ctx->builder, src1, src2, "");
938 bfi_args[2] = src0;
939
940 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, src3, LLVMConstInt(ctx->i32, 32, false), "");
941
942 /* Calculate:
943 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
944 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
945 */
946 result = LLVMBuildXor(ctx->builder, bfi_args[2],
947 LLVMBuildAnd(ctx->builder, bfi_args[0],
948 LLVMBuildXor(ctx->builder, bfi_args[1], bfi_args[2], ""), ""), "");
949
950 result = LLVMBuildSelect(ctx->builder, icond, src1, result, "");
951 return result;
952 }
953
954 static LLVMValueRef emit_pack_half_2x16(struct nir_to_llvm_context *ctx,
955 LLVMValueRef src0)
956 {
957 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
958 int i;
959 LLVMValueRef comp[2];
960
961 src0 = to_float(ctx, src0);
962 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32zero, "");
963 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32one, "");
964 for (i = 0; i < 2; i++) {
965 comp[i] = LLVMBuildFPTrunc(ctx->builder, comp[i], ctx->f16, "");
966 comp[i] = LLVMBuildBitCast(ctx->builder, comp[i], ctx->i16, "");
967 comp[i] = LLVMBuildZExt(ctx->builder, comp[i], ctx->i32, "");
968 }
969
970 comp[1] = LLVMBuildShl(ctx->builder, comp[1], const16, "");
971 comp[0] = LLVMBuildOr(ctx->builder, comp[0], comp[1], "");
972
973 return comp[0];
974 }
975
976 static LLVMValueRef emit_unpack_half_2x16(struct nir_to_llvm_context *ctx,
977 LLVMValueRef src0)
978 {
979 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
980 LLVMValueRef temps[2], result, val;
981 int i;
982
983 for (i = 0; i < 2; i++) {
984 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
985 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
986 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
987 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
988 }
989
990 result = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(ctx->v2f32), temps[0],
991 ctx->i32zero, "");
992 result = LLVMBuildInsertElement(ctx->builder, result, temps[1],
993 ctx->i32one, "");
994 return result;
995 }
996
997 /**
998 * Set range metadata on an instruction. This can only be used on load and
999 * call instructions. If you know an instruction can only produce the values
1000 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
1001 * \p lo is the minimum value inclusive.
1002 * \p hi is the maximum value exclusive.
1003 */
1004 static void set_range_metadata(struct nir_to_llvm_context *ctx,
1005 LLVMValueRef value, unsigned lo, unsigned hi)
1006 {
1007 LLVMValueRef range_md, md_args[2];
1008 LLVMTypeRef type = LLVMTypeOf(value);
1009 LLVMContextRef context = LLVMGetTypeContext(type);
1010
1011 md_args[0] = LLVMConstInt(type, lo, false);
1012 md_args[1] = LLVMConstInt(type, hi, false);
1013 range_md = LLVMMDNodeInContext(context, md_args, 2);
1014 LLVMSetMetadata(value, ctx->range_md_kind, range_md);
1015 }
1016
1017 static LLVMValueRef get_thread_id(struct nir_to_llvm_context *ctx)
1018 {
1019 LLVMValueRef tid;
1020 LLVMValueRef tid_args[2];
1021 tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
1022 tid_args[1] = ctx->i32zero;
1023 tid_args[1] = emit_llvm_intrinsic(ctx,
1024 "llvm.amdgcn.mbcnt.lo", ctx->i32,
1025 tid_args, 2, LLVMReadNoneAttribute);
1026
1027 tid = emit_llvm_intrinsic(ctx,
1028 "llvm.amdgcn.mbcnt.hi", ctx->i32,
1029 tid_args, 2, LLVMReadNoneAttribute);
1030 set_range_metadata(ctx, tid, 0, 64);
1031 return tid;
1032 }
1033
1034 /*
1035 * SI implements derivatives using the local data store (LDS)
1036 * All writes to the LDS happen in all executing threads at
1037 * the same time. TID is the Thread ID for the current
1038 * thread and is a value between 0 and 63, representing
1039 * the thread's position in the wavefront.
1040 *
1041 * For the pixel shader threads are grouped into quads of four pixels.
1042 * The TIDs of the pixels of a quad are:
1043 *
1044 * +------+------+
1045 * |4n + 0|4n + 1|
1046 * +------+------+
1047 * |4n + 2|4n + 3|
1048 * +------+------+
1049 *
1050 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
1051 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
1052 * the current pixel's column, and masking with 0xfffffffe yields the TID
1053 * of the left pixel of the current pixel's row.
1054 *
1055 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
1056 * adding 2 yields the TID of the pixel below the top pixel.
1057 */
1058 /* masks for thread ID. */
1059 #define TID_MASK_TOP_LEFT 0xfffffffc
1060 #define TID_MASK_TOP 0xfffffffd
1061 #define TID_MASK_LEFT 0xfffffffe
1062 static LLVMValueRef emit_ddxy(struct nir_to_llvm_context *ctx,
1063 nir_alu_instr *instr,
1064 LLVMValueRef src0)
1065 {
1066 LLVMValueRef indices[2];
1067 LLVMValueRef store_ptr, load_ptr0, load_ptr1;
1068 LLVMValueRef tl, trbl, result;
1069 LLVMValueRef tl_tid, trbl_tid;
1070 LLVMValueRef args[2];
1071 unsigned mask;
1072 int idx;
1073 ctx->has_ddxy = true;
1074 if (!ctx->lds)
1075 ctx->lds = LLVMAddGlobalInAddressSpace(ctx->module,
1076 LLVMArrayType(ctx->i32, 64),
1077 "ddxy_lds", LOCAL_ADDR_SPACE);
1078
1079 indices[0] = ctx->i32zero;
1080 indices[1] = get_thread_id(ctx);
1081 store_ptr = LLVMBuildGEP(ctx->builder, ctx->lds,
1082 indices, 2, "");
1083
1084 if (instr->op == nir_op_fddx_fine || instr->op == nir_op_fddx)
1085 mask = TID_MASK_LEFT;
1086 else if (instr->op == nir_op_fddy_fine || instr->op == nir_op_fddy)
1087 mask = TID_MASK_TOP;
1088 else
1089 mask = TID_MASK_TOP_LEFT;
1090
1091 tl_tid = LLVMBuildAnd(ctx->builder, indices[1],
1092 LLVMConstInt(ctx->i32, mask, false), "");
1093 indices[1] = tl_tid;
1094 load_ptr0 = LLVMBuildGEP(ctx->builder, ctx->lds,
1095 indices, 2, "");
1096
1097 /* for DDX we want to next X pixel, DDY next Y pixel. */
1098 if (instr->op == nir_op_fddx_fine ||
1099 instr->op == nir_op_fddx_coarse ||
1100 instr->op == nir_op_fddx)
1101 idx = 1;
1102 else
1103 idx = 2;
1104
1105 trbl_tid = LLVMBuildAdd(ctx->builder, indices[1],
1106 LLVMConstInt(ctx->i32, idx, false), "");
1107 indices[1] = trbl_tid;
1108 load_ptr1 = LLVMBuildGEP(ctx->builder, ctx->lds,
1109 indices, 2, "");
1110
1111 if (ctx->options->family >= CHIP_TONGA) {
1112 args[0] = LLVMBuildMul(ctx->builder, tl_tid,
1113 LLVMConstInt(ctx->i32, 4, false), "");
1114 args[1] = src0;
1115 tl = emit_llvm_intrinsic(ctx, "llvm.amdgcn.ds.bpermute",
1116 ctx->i32, args, 2,
1117 LLVMReadNoneAttribute);
1118
1119 args[0] = LLVMBuildMul(ctx->builder, trbl_tid,
1120 LLVMConstInt(ctx->i32, 4, false), "");
1121 trbl = emit_llvm_intrinsic(ctx, "llvm.amdgcn.ds.bpermute",
1122 ctx->i32, args, 2,
1123 LLVMReadNoneAttribute);
1124 } else {
1125 LLVMBuildStore(ctx->builder, src0, store_ptr);
1126
1127 tl = LLVMBuildLoad(ctx->builder, load_ptr0, "");
1128 trbl = LLVMBuildLoad(ctx->builder, load_ptr1, "");
1129 }
1130 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
1131 trbl = LLVMBuildBitCast(ctx->builder, trbl, ctx->f32, "");
1132 result = LLVMBuildFSub(ctx->builder, trbl, tl, "");
1133 return result;
1134 }
1135
1136 /*
1137 * this takes an I,J coordinate pair,
1138 * and works out the X and Y derivatives.
1139 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
1140 */
1141 static LLVMValueRef emit_ddxy_interp(
1142 struct nir_to_llvm_context *ctx,
1143 LLVMValueRef interp_ij)
1144 {
1145 LLVMValueRef indices[2];
1146 LLVMValueRef store_ptr, load_ptr_x, load_ptr_y, load_ptr_ddx, load_ptr_ddy, temp, temp2;
1147 LLVMValueRef tl, tr, bl, result[4];
1148 unsigned c;
1149
1150 if (!ctx->lds)
1151 ctx->lds = LLVMAddGlobalInAddressSpace(ctx->module,
1152 LLVMArrayType(ctx->i32, 64),
1153 "ddxy_lds", LOCAL_ADDR_SPACE);
1154
1155 indices[0] = ctx->i32zero;
1156 indices[1] = get_thread_id(ctx);
1157 store_ptr = LLVMBuildGEP(ctx->builder, ctx->lds,
1158 indices, 2, "");
1159
1160 temp = LLVMBuildAnd(ctx->builder, indices[1],
1161 LLVMConstInt(ctx->i32, TID_MASK_LEFT, false), "");
1162
1163 temp2 = LLVMBuildAnd(ctx->builder, indices[1],
1164 LLVMConstInt(ctx->i32, TID_MASK_TOP, false), "");
1165
1166 indices[1] = temp;
1167 load_ptr_x = LLVMBuildGEP(ctx->builder, ctx->lds,
1168 indices, 2, "");
1169
1170 indices[1] = temp2;
1171 load_ptr_y = LLVMBuildGEP(ctx->builder, ctx->lds,
1172 indices, 2, "");
1173
1174 indices[1] = LLVMBuildAdd(ctx->builder, temp,
1175 LLVMConstInt(ctx->i32, 1, false), "");
1176 load_ptr_ddx = LLVMBuildGEP(ctx->builder, ctx->lds,
1177 indices, 2, "");
1178
1179 indices[1] = LLVMBuildAdd(ctx->builder, temp2,
1180 LLVMConstInt(ctx->i32, 2, false), "");
1181 load_ptr_ddy = LLVMBuildGEP(ctx->builder, ctx->lds,
1182 indices, 2, "");
1183
1184 for (c = 0; c < 2; ++c) {
1185 LLVMValueRef store_val;
1186 LLVMValueRef c_ll = LLVMConstInt(ctx->i32, c, false);
1187
1188 store_val = LLVMBuildExtractElement(ctx->builder,
1189 interp_ij, c_ll, "");
1190 LLVMBuildStore(ctx->builder,
1191 store_val,
1192 store_ptr);
1193
1194 tl = LLVMBuildLoad(ctx->builder, load_ptr_x, "");
1195 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
1196
1197 tr = LLVMBuildLoad(ctx->builder, load_ptr_ddx, "");
1198 tr = LLVMBuildBitCast(ctx->builder, tr, ctx->f32, "");
1199
1200 result[c] = LLVMBuildFSub(ctx->builder, tr, tl, "");
1201
1202 tl = LLVMBuildLoad(ctx->builder, load_ptr_y, "");
1203 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
1204
1205 bl = LLVMBuildLoad(ctx->builder, load_ptr_ddy, "");
1206 bl = LLVMBuildBitCast(ctx->builder, bl, ctx->f32, "");
1207
1208 result[c + 2] = LLVMBuildFSub(ctx->builder, bl, tl, "");
1209 }
1210
1211 return build_gather_values(ctx, result, 4);
1212 }
1213
1214 static LLVMValueRef emit_fdiv(struct nir_to_llvm_context *ctx,
1215 LLVMValueRef num,
1216 LLVMValueRef den)
1217 {
1218 LLVMValueRef ret = LLVMBuildFDiv(ctx->builder, num, den, "");
1219
1220 if (!LLVMIsConstant(ret))
1221 LLVMSetMetadata(ret, ctx->fpmath_md_kind, ctx->fpmath_md_2p5_ulp);
1222 return ret;
1223 }
1224
1225 static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
1226 {
1227 LLVMValueRef src[4], result = NULL;
1228 unsigned num_components = instr->dest.dest.ssa.num_components;
1229 unsigned src_components;
1230
1231 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
1232 switch (instr->op) {
1233 case nir_op_vec2:
1234 case nir_op_vec3:
1235 case nir_op_vec4:
1236 src_components = 1;
1237 break;
1238 case nir_op_pack_half_2x16:
1239 src_components = 2;
1240 break;
1241 case nir_op_unpack_half_2x16:
1242 src_components = 1;
1243 break;
1244 default:
1245 src_components = num_components;
1246 break;
1247 }
1248 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1249 src[i] = get_alu_src(ctx, instr->src[i], src_components);
1250
1251 switch (instr->op) {
1252 case nir_op_fmov:
1253 case nir_op_imov:
1254 result = src[0];
1255 break;
1256 case nir_op_fneg:
1257 src[0] = to_float(ctx, src[0]);
1258 result = LLVMBuildFNeg(ctx->builder, src[0], "");
1259 break;
1260 case nir_op_ineg:
1261 result = LLVMBuildNeg(ctx->builder, src[0], "");
1262 break;
1263 case nir_op_inot:
1264 result = LLVMBuildNot(ctx->builder, src[0], "");
1265 break;
1266 case nir_op_iadd:
1267 result = LLVMBuildAdd(ctx->builder, src[0], src[1], "");
1268 break;
1269 case nir_op_fadd:
1270 src[0] = to_float(ctx, src[0]);
1271 src[1] = to_float(ctx, src[1]);
1272 result = LLVMBuildFAdd(ctx->builder, src[0], src[1], "");
1273 break;
1274 case nir_op_fsub:
1275 src[0] = to_float(ctx, src[0]);
1276 src[1] = to_float(ctx, src[1]);
1277 result = LLVMBuildFSub(ctx->builder, src[0], src[1], "");
1278 break;
1279 case nir_op_isub:
1280 result = LLVMBuildSub(ctx->builder, src[0], src[1], "");
1281 break;
1282 case nir_op_imul:
1283 result = LLVMBuildMul(ctx->builder, src[0], src[1], "");
1284 break;
1285 case nir_op_imod:
1286 result = LLVMBuildSRem(ctx->builder, src[0], src[1], "");
1287 break;
1288 case nir_op_umod:
1289 result = LLVMBuildURem(ctx->builder, src[0], src[1], "");
1290 break;
1291 case nir_op_fmod:
1292 src[0] = to_float(ctx, src[0]);
1293 src[1] = to_float(ctx, src[1]);
1294 result = emit_fdiv(ctx, src[0], src[1]);
1295 result = emit_intrin_1f_param(ctx, "llvm.floor.f32", result);
1296 result = LLVMBuildFMul(ctx->builder, src[1] , result, "");
1297 result = LLVMBuildFSub(ctx->builder, src[0], result, "");
1298 break;
1299 case nir_op_frem:
1300 src[0] = to_float(ctx, src[0]);
1301 src[1] = to_float(ctx, src[1]);
1302 result = LLVMBuildFRem(ctx->builder, src[0], src[1], "");
1303 break;
1304 case nir_op_idiv:
1305 result = LLVMBuildSDiv(ctx->builder, src[0], src[1], "");
1306 break;
1307 case nir_op_udiv:
1308 result = LLVMBuildUDiv(ctx->builder, src[0], src[1], "");
1309 break;
1310 case nir_op_fmul:
1311 src[0] = to_float(ctx, src[0]);
1312 src[1] = to_float(ctx, src[1]);
1313 result = LLVMBuildFMul(ctx->builder, src[0], src[1], "");
1314 break;
1315 case nir_op_fdiv:
1316 src[0] = to_float(ctx, src[0]);
1317 src[1] = to_float(ctx, src[1]);
1318 result = emit_fdiv(ctx, src[0], src[1]);
1319 break;
1320 case nir_op_frcp:
1321 src[0] = to_float(ctx, src[0]);
1322 result = emit_fdiv(ctx, ctx->f32one, src[0]);
1323 break;
1324 case nir_op_iand:
1325 result = LLVMBuildAnd(ctx->builder, src[0], src[1], "");
1326 break;
1327 case nir_op_ior:
1328 result = LLVMBuildOr(ctx->builder, src[0], src[1], "");
1329 break;
1330 case nir_op_ixor:
1331 result = LLVMBuildXor(ctx->builder, src[0], src[1], "");
1332 break;
1333 case nir_op_ishl:
1334 result = LLVMBuildShl(ctx->builder, src[0], src[1], "");
1335 break;
1336 case nir_op_ishr:
1337 result = LLVMBuildAShr(ctx->builder, src[0], src[1], "");
1338 break;
1339 case nir_op_ushr:
1340 result = LLVMBuildLShr(ctx->builder, src[0], src[1], "");
1341 break;
1342 case nir_op_ilt:
1343 result = emit_int_cmp(ctx, LLVMIntSLT, src[0], src[1]);
1344 break;
1345 case nir_op_ine:
1346 result = emit_int_cmp(ctx, LLVMIntNE, src[0], src[1]);
1347 break;
1348 case nir_op_ieq:
1349 result = emit_int_cmp(ctx, LLVMIntEQ, src[0], src[1]);
1350 break;
1351 case nir_op_ige:
1352 result = emit_int_cmp(ctx, LLVMIntSGE, src[0], src[1]);
1353 break;
1354 case nir_op_ult:
1355 result = emit_int_cmp(ctx, LLVMIntULT, src[0], src[1]);
1356 break;
1357 case nir_op_uge:
1358 result = emit_int_cmp(ctx, LLVMIntUGE, src[0], src[1]);
1359 break;
1360 case nir_op_feq:
1361 result = emit_float_cmp(ctx, LLVMRealUEQ, src[0], src[1]);
1362 break;
1363 case nir_op_fne:
1364 result = emit_float_cmp(ctx, LLVMRealUNE, src[0], src[1]);
1365 break;
1366 case nir_op_flt:
1367 result = emit_float_cmp(ctx, LLVMRealULT, src[0], src[1]);
1368 break;
1369 case nir_op_fge:
1370 result = emit_float_cmp(ctx, LLVMRealUGE, src[0], src[1]);
1371 break;
1372 case nir_op_fabs:
1373 result = emit_intrin_1f_param(ctx, "llvm.fabs.f32", src[0]);
1374 break;
1375 case nir_op_iabs:
1376 result = emit_iabs(ctx, src[0]);
1377 break;
1378 case nir_op_imax:
1379 result = emit_minmax_int(ctx, LLVMIntSGT, src[0], src[1]);
1380 break;
1381 case nir_op_imin:
1382 result = emit_minmax_int(ctx, LLVMIntSLT, src[0], src[1]);
1383 break;
1384 case nir_op_umax:
1385 result = emit_minmax_int(ctx, LLVMIntUGT, src[0], src[1]);
1386 break;
1387 case nir_op_umin:
1388 result = emit_minmax_int(ctx, LLVMIntULT, src[0], src[1]);
1389 break;
1390 case nir_op_isign:
1391 result = emit_isign(ctx, src[0]);
1392 break;
1393 case nir_op_fsign:
1394 src[0] = to_float(ctx, src[0]);
1395 result = emit_fsign(ctx, src[0]);
1396 break;
1397 case nir_op_ffloor:
1398 result = emit_intrin_1f_param(ctx, "llvm.floor.f32", src[0]);
1399 break;
1400 case nir_op_ftrunc:
1401 result = emit_intrin_1f_param(ctx, "llvm.trunc.f32", src[0]);
1402 break;
1403 case nir_op_fceil:
1404 result = emit_intrin_1f_param(ctx, "llvm.ceil.f32", src[0]);
1405 break;
1406 case nir_op_fround_even:
1407 result = emit_intrin_1f_param(ctx, "llvm.rint.f32", src[0]);
1408 break;
1409 case nir_op_ffract:
1410 result = emit_ffract(ctx, src[0]);
1411 break;
1412 case nir_op_fsin:
1413 result = emit_intrin_1f_param(ctx, "llvm.sin.f32", src[0]);
1414 break;
1415 case nir_op_fcos:
1416 result = emit_intrin_1f_param(ctx, "llvm.cos.f32", src[0]);
1417 break;
1418 case nir_op_fsqrt:
1419 result = emit_intrin_1f_param(ctx, "llvm.sqrt.f32", src[0]);
1420 break;
1421 case nir_op_fexp2:
1422 result = emit_intrin_1f_param(ctx, "llvm.exp2.f32", src[0]);
1423 break;
1424 case nir_op_flog2:
1425 result = emit_intrin_1f_param(ctx, "llvm.log2.f32", src[0]);
1426 break;
1427 case nir_op_frsq:
1428 result = emit_intrin_1f_param(ctx, "llvm.sqrt.f32", src[0]);
1429 result = emit_fdiv(ctx, ctx->f32one, result);
1430 break;
1431 case nir_op_fpow:
1432 result = emit_intrin_2f_param(ctx, "llvm.pow.f32", src[0], src[1]);
1433 break;
1434 case nir_op_fmax:
1435 result = emit_intrin_2f_param(ctx, "llvm.maxnum.f32", src[0], src[1]);
1436 break;
1437 case nir_op_fmin:
1438 result = emit_intrin_2f_param(ctx, "llvm.minnum.f32", src[0], src[1]);
1439 break;
1440 case nir_op_ffma:
1441 result = emit_intrin_3f_param(ctx, "llvm.fma.f32", src[0], src[1], src[2]);
1442 break;
1443 case nir_op_ibitfield_extract:
1444 result = emit_bitfield_extract(ctx, "llvm.AMDGPU.bfe.i32", src);
1445 break;
1446 case nir_op_ubitfield_extract:
1447 result = emit_bitfield_extract(ctx, "llvm.AMDGPU.bfe.u32", src);
1448 break;
1449 case nir_op_bitfield_insert:
1450 result = emit_bitfield_insert(ctx, src[0], src[1], src[2], src[3]);
1451 break;
1452 case nir_op_bitfield_reverse:
1453 result = emit_llvm_intrinsic(ctx, "llvm.bitreverse.i32", ctx->i32, src, 1, LLVMReadNoneAttribute);
1454 break;
1455 case nir_op_bit_count:
1456 result = emit_llvm_intrinsic(ctx, "llvm.ctpop.i32", ctx->i32, src, 1, LLVMReadNoneAttribute);
1457 break;
1458 case nir_op_vec2:
1459 case nir_op_vec3:
1460 case nir_op_vec4:
1461 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1462 src[i] = to_integer(ctx, src[i]);
1463 result = build_gather_values(ctx, src, num_components);
1464 break;
1465 case nir_op_f2i:
1466 src[0] = to_float(ctx, src[0]);
1467 result = LLVMBuildFPToSI(ctx->builder, src[0], ctx->i32, "");
1468 break;
1469 case nir_op_f2u:
1470 src[0] = to_float(ctx, src[0]);
1471 result = LLVMBuildFPToUI(ctx->builder, src[0], ctx->i32, "");
1472 break;
1473 case nir_op_i2f:
1474 result = LLVMBuildSIToFP(ctx->builder, src[0], ctx->f32, "");
1475 break;
1476 case nir_op_u2f:
1477 result = LLVMBuildUIToFP(ctx->builder, src[0], ctx->f32, "");
1478 break;
1479 case nir_op_bcsel:
1480 result = emit_bcsel(ctx, src[0], src[1], src[2]);
1481 break;
1482 case nir_op_find_lsb:
1483 result = emit_find_lsb(ctx, src[0]);
1484 break;
1485 case nir_op_ufind_msb:
1486 result = emit_ufind_msb(ctx, src[0]);
1487 break;
1488 case nir_op_ifind_msb:
1489 result = emit_ifind_msb(ctx, src[0]);
1490 break;
1491 case nir_op_uadd_carry:
1492 result = emit_uint_carry(ctx, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1493 break;
1494 case nir_op_usub_borrow:
1495 result = emit_uint_carry(ctx, "llvm.usub.with.overflow.i32", src[0], src[1]);
1496 break;
1497 case nir_op_b2f:
1498 result = emit_b2f(ctx, src[0]);
1499 break;
1500 case nir_op_fquantize2f16:
1501 src[0] = to_float(ctx, src[0]);
1502 result = LLVMBuildFPTrunc(ctx->builder, src[0], ctx->f16, "");
1503 /* need to convert back up to f32 */
1504 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
1505 break;
1506 case nir_op_umul_high:
1507 result = emit_umul_high(ctx, src[0], src[1]);
1508 break;
1509 case nir_op_imul_high:
1510 result = emit_imul_high(ctx, src[0], src[1]);
1511 break;
1512 case nir_op_pack_half_2x16:
1513 result = emit_pack_half_2x16(ctx, src[0]);
1514 break;
1515 case nir_op_unpack_half_2x16:
1516 result = emit_unpack_half_2x16(ctx, src[0]);
1517 break;
1518 case nir_op_fddx:
1519 case nir_op_fddy:
1520 case nir_op_fddx_fine:
1521 case nir_op_fddy_fine:
1522 case nir_op_fddx_coarse:
1523 case nir_op_fddy_coarse:
1524 result = emit_ddxy(ctx, instr, src[0]);
1525 break;
1526 default:
1527 fprintf(stderr, "Unknown NIR alu instr: ");
1528 nir_print_instr(&instr->instr, stderr);
1529 fprintf(stderr, "\n");
1530 abort();
1531 }
1532
1533 if (result) {
1534 assert(instr->dest.dest.is_ssa);
1535 result = to_integer(ctx, result);
1536 _mesa_hash_table_insert(ctx->defs, &instr->dest.dest.ssa,
1537 result);
1538 }
1539 }
1540
1541 static void visit_load_const(struct nir_to_llvm_context *ctx,
1542 nir_load_const_instr *instr)
1543 {
1544 LLVMValueRef values[4], value = NULL;
1545 LLVMTypeRef element_type =
1546 LLVMIntTypeInContext(ctx->context, instr->def.bit_size);
1547
1548 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1549 switch (instr->def.bit_size) {
1550 case 32:
1551 values[i] = LLVMConstInt(element_type,
1552 instr->value.u32[i], false);
1553 break;
1554 case 64:
1555 values[i] = LLVMConstInt(element_type,
1556 instr->value.u64[i], false);
1557 break;
1558 default:
1559 fprintf(stderr,
1560 "unsupported nir load_const bit_size: %d\n",
1561 instr->def.bit_size);
1562 abort();
1563 }
1564 }
1565 if (instr->def.num_components > 1) {
1566 value = LLVMConstVector(values, instr->def.num_components);
1567 } else
1568 value = values[0];
1569
1570 _mesa_hash_table_insert(ctx->defs, &instr->def, value);
1571 }
1572
1573 static LLVMValueRef cast_ptr(struct nir_to_llvm_context *ctx, LLVMValueRef ptr,
1574 LLVMTypeRef type)
1575 {
1576 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
1577 return LLVMBuildBitCast(ctx->builder, ptr,
1578 LLVMPointerType(type, addr_space), "");
1579 }
1580
1581 static LLVMValueRef
1582 emit_llvm_intrinsic(struct nir_to_llvm_context *ctx, const char *name,
1583 LLVMTypeRef return_type, LLVMValueRef *params,
1584 unsigned param_count, LLVMAttribute attribs)
1585 {
1586 LLVMValueRef function;
1587
1588 function = LLVMGetNamedFunction(ctx->module, name);
1589 if (!function) {
1590 LLVMTypeRef param_types[32], function_type;
1591 unsigned i;
1592
1593 assert(param_count <= 32);
1594
1595 for (i = 0; i < param_count; ++i) {
1596 assert(params[i]);
1597 param_types[i] = LLVMTypeOf(params[i]);
1598 }
1599 function_type =
1600 LLVMFunctionType(return_type, param_types, param_count, 0);
1601 function = LLVMAddFunction(ctx->module, name, function_type);
1602
1603 LLVMSetFunctionCallConv(function, LLVMCCallConv);
1604 LLVMSetLinkage(function, LLVMExternalLinkage);
1605
1606 LLVMAddFunctionAttr(function, attribs | LLVMNoUnwindAttribute);
1607 }
1608 return LLVMBuildCall(ctx->builder, function, params, param_count, "");
1609 }
1610
1611 static LLVMValueRef
1612 get_buffer_size(struct nir_to_llvm_context *ctx, LLVMValueRef descriptor, bool in_elements)
1613 {
1614 LLVMValueRef size =
1615 LLVMBuildExtractElement(ctx->builder, descriptor,
1616 LLVMConstInt(ctx->i32, 2, false), "");
1617
1618 /* VI only */
1619 if (ctx->options->chip_class >= VI && in_elements) {
1620 /* On VI, the descriptor contains the size in bytes,
1621 * but TXQ must return the size in elements.
1622 * The stride is always non-zero for resources using TXQ.
1623 */
1624 LLVMValueRef stride =
1625 LLVMBuildExtractElement(ctx->builder, descriptor,
1626 LLVMConstInt(ctx->i32, 1, false), "");
1627 stride = LLVMBuildLShr(ctx->builder, stride,
1628 LLVMConstInt(ctx->i32, 16, false), "");
1629 stride = LLVMBuildAnd(ctx->builder, stride,
1630 LLVMConstInt(ctx->i32, 0x3fff, false), "");
1631
1632 size = LLVMBuildUDiv(ctx->builder, size, stride, "");
1633 }
1634 return size;
1635 }
1636
1637 /**
1638 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
1639 * intrinsic names).
1640 */
1641 static void build_int_type_name(
1642 LLVMTypeRef type,
1643 char *buf, unsigned bufsize)
1644 {
1645 assert(bufsize >= 6);
1646
1647 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
1648 snprintf(buf, bufsize, "v%ui32",
1649 LLVMGetVectorSize(type));
1650 else
1651 strcpy(buf, "i32");
1652 }
1653
1654 static LLVMValueRef radv_lower_gather4_integer(struct nir_to_llvm_context *ctx,
1655 struct ac_tex_info *tinfo,
1656 nir_tex_instr *instr,
1657 const char *intr_name,
1658 unsigned coord_vgpr_index)
1659 {
1660 LLVMValueRef coord = tinfo->args[0];
1661 LLVMValueRef half_texel[2];
1662 int c;
1663
1664 //TODO Rect
1665 {
1666 LLVMValueRef txq_args[10];
1667 int txq_arg_count = 0;
1668 LLVMValueRef size;
1669 bool da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE;
1670 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, false);
1671 txq_args[txq_arg_count++] = tinfo->args[1];
1672 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0xf, 0); /* dmask */
1673 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* unorm */
1674 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
1675 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, da ? 1 : 0, 0);
1676 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
1677 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
1678 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
1679 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
1680 size = emit_llvm_intrinsic(ctx, "llvm.SI.getresinfo.i32", ctx->v4i32,
1681 txq_args, txq_arg_count,
1682 LLVMReadNoneAttribute);
1683
1684 for (c = 0; c < 2; c++) {
1685 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1686 ctx->i32zero, "");
1687 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1688 half_texel[c] = emit_fdiv(ctx, ctx->f32one, half_texel[c]);
1689 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1690 LLVMConstReal(ctx->f32, -0.5), "");
1691 }
1692 }
1693
1694 for (c = 0; c < 2; c++) {
1695 LLVMValueRef tmp;
1696 LLVMValueRef index = LLVMConstInt(ctx->i32, coord_vgpr_index + c, 0);
1697 tmp = LLVMBuildExtractElement(ctx->builder, coord, index, "");
1698 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1699 tmp = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1700 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1701 coord = LLVMBuildInsertElement(ctx->builder, coord, tmp, index, "");
1702 }
1703
1704 tinfo->args[0] = coord;
1705 return emit_llvm_intrinsic(ctx, intr_name, tinfo->dst_type, tinfo->args, tinfo->arg_count,
1706 LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
1707
1708 }
1709
1710 static LLVMValueRef build_tex_intrinsic(struct nir_to_llvm_context *ctx,
1711 nir_tex_instr *instr,
1712 struct ac_tex_info *tinfo)
1713 {
1714 const char *name = "llvm.SI.image.sample";
1715 const char *infix = "";
1716 char intr_name[127];
1717 char type[64];
1718 bool is_shadow = instr->is_shadow;
1719 bool has_offset = tinfo->has_offset;
1720 switch (instr->op) {
1721 case nir_texop_txf:
1722 case nir_texop_txf_ms:
1723 case nir_texop_samples_identical:
1724 name = instr->sampler_dim == GLSL_SAMPLER_DIM_MS ? "llvm.SI.image.load" :
1725 instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? "llvm.SI.vs.load.input" :
1726 "llvm.SI.image.load.mip";
1727 is_shadow = false;
1728 has_offset = false;
1729 break;
1730 case nir_texop_txb:
1731 infix = ".b";
1732 break;
1733 case nir_texop_txl:
1734 infix = ".l";
1735 break;
1736 case nir_texop_txs:
1737 name = "llvm.SI.getresinfo";
1738 break;
1739 case nir_texop_query_levels:
1740 name = "llvm.SI.getresinfo";
1741 break;
1742 case nir_texop_tex:
1743 if (ctx->stage != MESA_SHADER_FRAGMENT)
1744 infix = ".lz";
1745 break;
1746 case nir_texop_txd:
1747 infix = ".d";
1748 break;
1749 case nir_texop_tg4:
1750 name = "llvm.SI.gather4";
1751 infix = ".lz";
1752 break;
1753 case nir_texop_lod:
1754 name = "llvm.SI.getlod";
1755 is_shadow = false;
1756 has_offset = false;
1757 break;
1758 default:
1759 break;
1760 }
1761
1762 build_int_type_name(LLVMTypeOf(tinfo->args[0]), type, sizeof(type));
1763 sprintf(intr_name, "%s%s%s%s.%s", name, is_shadow ? ".c" : "", infix,
1764 has_offset ? ".o" : "", type);
1765
1766 if (instr->op == nir_texop_tg4) {
1767 enum glsl_base_type stype = glsl_get_sampler_result_type(instr->texture->var->type);
1768 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1769 return radv_lower_gather4_integer(ctx, tinfo, instr, intr_name,
1770 (int)has_offset + (int)is_shadow);
1771 }
1772 }
1773 return emit_llvm_intrinsic(ctx, intr_name, tinfo->dst_type, tinfo->args, tinfo->arg_count,
1774 LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
1775
1776 }
1777
1778 static LLVMValueRef visit_vulkan_resource_index(struct nir_to_llvm_context *ctx,
1779 nir_intrinsic_instr *instr)
1780 {
1781 LLVMValueRef index = get_src(ctx, instr->src[0]);
1782 unsigned desc_set = nir_intrinsic_desc_set(instr);
1783 unsigned binding = nir_intrinsic_binding(instr);
1784 LLVMValueRef desc_ptr = ctx->descriptor_sets[desc_set];
1785 struct radv_descriptor_set_layout *layout = ctx->options->layout->set[desc_set].layout;
1786 unsigned base_offset = layout->binding[binding].offset;
1787 LLVMValueRef offset, stride;
1788
1789 if (layout->binding[binding].type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC ||
1790 layout->binding[binding].type == VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC) {
1791 desc_ptr = ctx->push_constants;
1792 base_offset = ctx->options->layout->push_constant_size;
1793 base_offset += 16 * layout->binding[binding].dynamic_offset_offset;
1794 stride = LLVMConstInt(ctx->i32, 16, false);
1795 } else
1796 stride = LLVMConstInt(ctx->i32, layout->binding[binding].size, false);
1797
1798 offset = LLVMConstInt(ctx->i32, base_offset, false);
1799 index = LLVMBuildMul(ctx->builder, index, stride, "");
1800 offset = LLVMBuildAdd(ctx->builder, offset, index, "");
1801
1802 LLVMValueRef indices[] = {ctx->i32zero, offset};
1803 desc_ptr = LLVMBuildGEP(ctx->builder, desc_ptr, indices, 2, "");
1804 desc_ptr = cast_ptr(ctx, desc_ptr, ctx->v4i32);
1805 LLVMSetMetadata(desc_ptr, ctx->uniform_md_kind, ctx->empty_md);
1806
1807 return LLVMBuildLoad(ctx->builder, desc_ptr, "");
1808 }
1809
1810 static LLVMValueRef visit_load_push_constant(struct nir_to_llvm_context *ctx,
1811 nir_intrinsic_instr *instr)
1812 {
1813 LLVMValueRef ptr;
1814
1815 LLVMValueRef indices[] = {ctx->i32zero, get_src(ctx, instr->src[0])};
1816 ptr = LLVMBuildGEP(ctx->builder, ctx->push_constants, indices, 2, "");
1817 ptr = cast_ptr(ctx, ptr, get_def_type(ctx, &instr->dest.ssa));
1818
1819 return LLVMBuildLoad(ctx->builder, ptr, "");
1820 }
1821
1822 static LLVMValueRef visit_get_buffer_size(struct nir_to_llvm_context *ctx,
1823 nir_intrinsic_instr *instr)
1824 {
1825 LLVMValueRef desc = get_src(ctx, instr->src[0]);
1826
1827 return get_buffer_size(ctx, desc, false);
1828 }
1829 static void visit_store_ssbo(struct nir_to_llvm_context *ctx,
1830 nir_intrinsic_instr *instr)
1831 {
1832 const char *store_name;
1833 LLVMTypeRef data_type = ctx->f32;
1834 unsigned writemask = nir_intrinsic_write_mask(instr);
1835 LLVMValueRef base_data, base_offset;
1836 LLVMValueRef params[6];
1837
1838 if (ctx->stage == MESA_SHADER_FRAGMENT)
1839 ctx->shader_info->fs.writes_memory = true;
1840
1841 params[1] = get_src(ctx, instr->src[1]);
1842 params[2] = LLVMConstInt(ctx->i32, 0, false); /* vindex */
1843 params[4] = LLVMConstInt(ctx->i1, 0, false); /* glc */
1844 params[5] = LLVMConstInt(ctx->i1, 0, false); /* slc */
1845
1846 if (instr->num_components > 1)
1847 data_type = LLVMVectorType(ctx->f32, instr->num_components);
1848
1849 base_data = to_float(ctx, get_src(ctx, instr->src[0]));
1850 base_data = trim_vector(ctx, base_data, instr->num_components);
1851 base_data = LLVMBuildBitCast(ctx->builder, base_data,
1852 data_type, "");
1853 base_offset = get_src(ctx, instr->src[2]); /* voffset */
1854 while (writemask) {
1855 int start, count;
1856 LLVMValueRef data;
1857 LLVMValueRef offset;
1858 LLVMValueRef tmp;
1859 u_bit_scan_consecutive_range(&writemask, &start, &count);
1860
1861 /* Due to an LLVM limitation, split 3-element writes
1862 * into a 2-element and a 1-element write. */
1863 if (count == 3) {
1864 writemask |= 1 << (start + 2);
1865 count = 2;
1866 }
1867
1868 if (count == 4) {
1869 store_name = "llvm.amdgcn.buffer.store.v4f32";
1870 data = base_data;
1871 } else if (count == 2) {
1872 tmp = LLVMBuildExtractElement(ctx->builder,
1873 base_data, LLVMConstInt(ctx->i32, start, false), "");
1874 data = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(ctx->v2f32), tmp,
1875 ctx->i32zero, "");
1876
1877 tmp = LLVMBuildExtractElement(ctx->builder,
1878 base_data, LLVMConstInt(ctx->i32, start + 1, false), "");
1879 data = LLVMBuildInsertElement(ctx->builder, data, tmp,
1880 ctx->i32one, "");
1881 store_name = "llvm.amdgcn.buffer.store.v2f32";
1882
1883 } else {
1884 assert(count == 1);
1885 if (get_llvm_num_components(base_data) > 1)
1886 data = LLVMBuildExtractElement(ctx->builder, base_data,
1887 LLVMConstInt(ctx->i32, start, false), "");
1888 else
1889 data = base_data;
1890 store_name = "llvm.amdgcn.buffer.store.f32";
1891 }
1892
1893 offset = base_offset;
1894 if (start != 0) {
1895 offset = LLVMBuildAdd(ctx->builder, offset, LLVMConstInt(ctx->i32, start * 4, false), "");
1896 }
1897 params[0] = data;
1898 params[3] = offset;
1899 emit_llvm_intrinsic(ctx, store_name,
1900 LLVMVoidTypeInContext(ctx->context), params, 6, 0);
1901 }
1902 }
1903
1904 static LLVMValueRef visit_atomic_ssbo(struct nir_to_llvm_context *ctx,
1905 nir_intrinsic_instr *instr)
1906 {
1907 const char *name;
1908 LLVMValueRef params[5];
1909 int arg_count = 0;
1910 if (ctx->stage == MESA_SHADER_FRAGMENT)
1911 ctx->shader_info->fs.writes_memory = true;
1912
1913 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1914 params[arg_count++] = get_src(ctx, instr->src[3]);
1915 }
1916 params[arg_count++] = get_src(ctx, instr->src[2]);
1917 params[arg_count++] = get_src(ctx, instr->src[0]);
1918 params[arg_count++] = LLVMConstInt(ctx->i32, 0, false); /* vindex */
1919 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1920 params[arg_count++] = LLVMConstInt(ctx->i1, 0, false); /* slc */
1921
1922 switch (instr->intrinsic) {
1923 case nir_intrinsic_ssbo_atomic_add:
1924 name = "llvm.amdgcn.buffer.atomic.add";
1925 break;
1926 case nir_intrinsic_ssbo_atomic_imin:
1927 name = "llvm.amdgcn.buffer.atomic.smin";
1928 break;
1929 case nir_intrinsic_ssbo_atomic_umin:
1930 name = "llvm.amdgcn.buffer.atomic.umin";
1931 break;
1932 case nir_intrinsic_ssbo_atomic_imax:
1933 name = "llvm.amdgcn.buffer.atomic.smax";
1934 break;
1935 case nir_intrinsic_ssbo_atomic_umax:
1936 name = "llvm.amdgcn.buffer.atomic.umax";
1937 break;
1938 case nir_intrinsic_ssbo_atomic_and:
1939 name = "llvm.amdgcn.buffer.atomic.and";
1940 break;
1941 case nir_intrinsic_ssbo_atomic_or:
1942 name = "llvm.amdgcn.buffer.atomic.or";
1943 break;
1944 case nir_intrinsic_ssbo_atomic_xor:
1945 name = "llvm.amdgcn.buffer.atomic.xor";
1946 break;
1947 case nir_intrinsic_ssbo_atomic_exchange:
1948 name = "llvm.amdgcn.buffer.atomic.swap";
1949 break;
1950 case nir_intrinsic_ssbo_atomic_comp_swap:
1951 name = "llvm.amdgcn.buffer.atomic.cmpswap";
1952 break;
1953 default:
1954 abort();
1955 }
1956
1957 return emit_llvm_intrinsic(ctx, name, ctx->i32, params, arg_count, 0);
1958 }
1959
1960 static LLVMValueRef visit_load_buffer(struct nir_to_llvm_context *ctx,
1961 nir_intrinsic_instr *instr)
1962 {
1963 const char *load_name;
1964 LLVMTypeRef data_type = ctx->f32;
1965 if (instr->num_components == 3)
1966 data_type = LLVMVectorType(ctx->f32, 4);
1967 else if (instr->num_components > 1)
1968 data_type = LLVMVectorType(ctx->f32, instr->num_components);
1969
1970 if (instr->num_components == 4 || instr->num_components == 3)
1971 load_name = "llvm.amdgcn.buffer.load.v4f32";
1972 else if (instr->num_components == 2)
1973 load_name = "llvm.amdgcn.buffer.load.v2f32";
1974 else if (instr->num_components == 1)
1975 load_name = "llvm.amdgcn.buffer.load.f32";
1976 else
1977 abort();
1978
1979 LLVMValueRef params[] = {
1980 get_src(ctx, instr->src[0]),
1981 LLVMConstInt(ctx->i32, 0, false),
1982 get_src(ctx, instr->src[1]),
1983 LLVMConstInt(ctx->i1, 0, false),
1984 LLVMConstInt(ctx->i1, 0, false),
1985 };
1986
1987 LLVMValueRef ret =
1988 emit_llvm_intrinsic(ctx, load_name, data_type, params, 5, 0);
1989
1990 if (instr->num_components == 3)
1991 ret = trim_vector(ctx, ret, 3);
1992
1993 return LLVMBuildBitCast(ctx->builder, ret,
1994 get_def_type(ctx, &instr->dest.ssa), "");
1995 }
1996
1997 static void
1998 radv_get_deref_offset(struct nir_to_llvm_context *ctx, nir_deref *tail,
1999 bool vs_in, unsigned *const_out, LLVMValueRef *indir_out)
2000 {
2001 unsigned const_offset = 0;
2002 LLVMValueRef offset = NULL;
2003
2004
2005 while (tail->child != NULL) {
2006 const struct glsl_type *parent_type = tail->type;
2007 tail = tail->child;
2008
2009 if (tail->deref_type == nir_deref_type_array) {
2010 nir_deref_array *deref_array = nir_deref_as_array(tail);
2011 LLVMValueRef index, stride, local_offset;
2012 unsigned size = glsl_count_attribute_slots(tail->type, vs_in);
2013
2014 const_offset += size * deref_array->base_offset;
2015 if (deref_array->deref_array_type == nir_deref_array_type_direct)
2016 continue;
2017
2018 assert(deref_array->deref_array_type == nir_deref_array_type_indirect);
2019 index = get_src(ctx, deref_array->indirect);
2020 stride = LLVMConstInt(ctx->i32, size, 0);
2021 local_offset = LLVMBuildMul(ctx->builder, stride, index, "");
2022
2023 if (offset)
2024 offset = LLVMBuildAdd(ctx->builder, offset, local_offset, "");
2025 else
2026 offset = local_offset;
2027 } else if (tail->deref_type == nir_deref_type_struct) {
2028 nir_deref_struct *deref_struct = nir_deref_as_struct(tail);
2029
2030 for (unsigned i = 0; i < deref_struct->index; i++) {
2031 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2032 const_offset += glsl_count_attribute_slots(ft, vs_in);
2033 }
2034 } else
2035 unreachable("unsupported deref type");
2036
2037 }
2038
2039 if (const_offset && offset)
2040 offset = LLVMBuildAdd(ctx->builder, offset,
2041 LLVMConstInt(ctx->i32, const_offset, 0),
2042 "");
2043
2044 *const_out = const_offset;
2045 *indir_out = offset;
2046 }
2047
2048 static LLVMValueRef visit_load_var(struct nir_to_llvm_context *ctx,
2049 nir_intrinsic_instr *instr)
2050 {
2051 LLVMValueRef values[4];
2052 int idx = instr->variables[0]->var->data.driver_location;
2053 int ve = instr->dest.ssa.num_components;
2054 LLVMValueRef indir_index;
2055 unsigned const_index;
2056 switch (instr->variables[0]->var->data.mode) {
2057 case nir_var_shader_in:
2058 radv_get_deref_offset(ctx, &instr->variables[0]->deref,
2059 ctx->stage == MESA_SHADER_VERTEX,
2060 &const_index, &indir_index);
2061 for (unsigned chan = 0; chan < ve; chan++) {
2062 if (indir_index) {
2063 unsigned count = glsl_count_attribute_slots(
2064 instr->variables[0]->var->type,
2065 ctx->stage == MESA_SHADER_VERTEX);
2066 LLVMValueRef tmp_vec = build_gather_values_extended(
2067 ctx, ctx->inputs + idx + chan, count,
2068 4, false);
2069
2070 values[chan] = LLVMBuildExtractElement(ctx->builder,
2071 tmp_vec,
2072 indir_index, "");
2073 } else
2074 values[chan] = ctx->inputs[idx + chan + const_index * 4];
2075 }
2076 return to_integer(ctx, build_gather_values(ctx, values, ve));
2077 break;
2078 case nir_var_local:
2079 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2080 &const_index, &indir_index);
2081 for (unsigned chan = 0; chan < ve; chan++) {
2082 if (indir_index) {
2083 unsigned count = glsl_count_attribute_slots(
2084 instr->variables[0]->var->type, false);
2085 LLVMValueRef tmp_vec = build_gather_values_extended(
2086 ctx, ctx->locals + idx + chan, count,
2087 4, true);
2088
2089 values[chan] = LLVMBuildExtractElement(ctx->builder,
2090 tmp_vec,
2091 indir_index, "");
2092 } else {
2093 values[chan] = LLVMBuildLoad(ctx->builder, ctx->locals[idx + chan + const_index * 4], "");
2094 }
2095 }
2096 return to_integer(ctx, build_gather_values(ctx, values, ve));
2097 case nir_var_shader_out:
2098 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2099 &const_index, &indir_index);
2100 for (unsigned chan = 0; chan < ve; chan++) {
2101 if (indir_index) {
2102 unsigned count = glsl_count_attribute_slots(
2103 instr->variables[0]->var->type, false);
2104 LLVMValueRef tmp_vec = build_gather_values_extended(
2105 ctx, ctx->outputs + idx + chan, count,
2106 4, true);
2107
2108 values[chan] = LLVMBuildExtractElement(ctx->builder,
2109 tmp_vec,
2110 indir_index, "");
2111 } else {
2112 values[chan] = LLVMBuildLoad(ctx->builder,
2113 ctx->outputs[idx + chan + const_index * 4],
2114 "");
2115 }
2116 }
2117 return to_integer(ctx, build_gather_values(ctx, values, ve));
2118 case nir_var_shared: {
2119 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2120 &const_index, &indir_index);
2121 LLVMValueRef ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
2122 LLVMValueRef derived_ptr;
2123 LLVMValueRef index = ctx->i32zero;
2124 if (indir_index)
2125 index = LLVMBuildAdd(ctx->builder, index, indir_index, "");
2126 derived_ptr = LLVMBuildGEP(ctx->builder, ptr, &index, 1, "");
2127
2128 return to_integer(ctx, LLVMBuildLoad(ctx->builder, derived_ptr, ""));
2129 break;
2130 }
2131 default:
2132 break;
2133 }
2134 return NULL;
2135 }
2136
2137 static void
2138 visit_store_var(struct nir_to_llvm_context *ctx,
2139 nir_intrinsic_instr *instr)
2140 {
2141 LLVMValueRef temp_ptr, value;
2142 int idx = instr->variables[0]->var->data.driver_location;
2143 LLVMValueRef src = to_float(ctx, get_src(ctx, instr->src[0]));
2144 int writemask = instr->const_index[0];
2145 LLVMValueRef indir_index;
2146 unsigned const_index;
2147 switch (instr->variables[0]->var->data.mode) {
2148 case nir_var_shader_out:
2149 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2150 &const_index, &indir_index);
2151 for (unsigned chan = 0; chan < 4; chan++) {
2152 int stride = 4;
2153 if (!(writemask & (1 << chan)))
2154 continue;
2155 if (get_llvm_num_components(src) == 1)
2156 value = src;
2157 else
2158 value = LLVMBuildExtractElement(ctx->builder, src,
2159 LLVMConstInt(ctx->i32,
2160 chan, false),
2161 "");
2162
2163 if (instr->variables[0]->var->data.location == VARYING_SLOT_CLIP_DIST0 ||
2164 instr->variables[0]->var->data.location == VARYING_SLOT_CULL_DIST0)
2165 stride = 1;
2166 if (indir_index) {
2167 unsigned count = glsl_count_attribute_slots(
2168 instr->variables[0]->var->type, false);
2169 LLVMValueRef tmp_vec = build_gather_values_extended(
2170 ctx, ctx->outputs + idx + chan, count,
2171 stride, true);
2172
2173 if (get_llvm_num_components(tmp_vec) > 1) {
2174 tmp_vec = LLVMBuildInsertElement(ctx->builder, tmp_vec,
2175 value, indir_index, "");
2176 } else
2177 tmp_vec = value;
2178 build_store_values_extended(ctx, ctx->outputs + idx + chan,
2179 count, stride, tmp_vec);
2180
2181 } else {
2182 temp_ptr = ctx->outputs[idx + chan + const_index * stride];
2183
2184 LLVMBuildStore(ctx->builder, value, temp_ptr);
2185 }
2186 }
2187 break;
2188 case nir_var_local:
2189 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2190 &const_index, &indir_index);
2191 for (unsigned chan = 0; chan < 4; chan++) {
2192 if (!(writemask & (1 << chan)))
2193 continue;
2194
2195 if (get_llvm_num_components(src) == 1)
2196 value = src;
2197 else
2198 value = LLVMBuildExtractElement(ctx->builder, src,
2199 LLVMConstInt(ctx->i32, chan, false), "");
2200 if (indir_index) {
2201 unsigned count = glsl_count_attribute_slots(
2202 instr->variables[0]->var->type, false);
2203 LLVMValueRef tmp_vec = build_gather_values_extended(
2204 ctx, ctx->locals + idx + chan, count,
2205 4, true);
2206
2207 tmp_vec = LLVMBuildInsertElement(ctx->builder, tmp_vec,
2208 value, indir_index, "");
2209 build_store_values_extended(ctx, ctx->locals + idx + chan,
2210 count, 4, tmp_vec);
2211 } else {
2212 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2213
2214 LLVMBuildStore(ctx->builder, value, temp_ptr);
2215 }
2216 }
2217 break;
2218 case nir_var_shared: {
2219 LLVMValueRef ptr;
2220 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2221 &const_index, &indir_index);
2222
2223 ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
2224 LLVMValueRef index = ctx->i32zero;
2225 LLVMValueRef derived_ptr;
2226
2227 if (indir_index)
2228 index = LLVMBuildAdd(ctx->builder, index, indir_index, "");
2229 derived_ptr = LLVMBuildGEP(ctx->builder, ptr, &index, 1, "");
2230 LLVMBuildStore(ctx->builder,
2231 to_integer(ctx, src), derived_ptr);
2232 break;
2233 }
2234 default:
2235 break;
2236 }
2237 }
2238
2239 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2240 {
2241 switch (dim) {
2242 case GLSL_SAMPLER_DIM_BUF:
2243 return 1;
2244 case GLSL_SAMPLER_DIM_1D:
2245 return array ? 2 : 1;
2246 case GLSL_SAMPLER_DIM_2D:
2247 return array ? 3 : 2;
2248 case GLSL_SAMPLER_DIM_3D:
2249 case GLSL_SAMPLER_DIM_CUBE:
2250 return 3;
2251 case GLSL_SAMPLER_DIM_RECT:
2252 case GLSL_SAMPLER_DIM_SUBPASS:
2253 return 2;
2254 default:
2255 break;
2256 }
2257 return 0;
2258 }
2259
2260 static LLVMValueRef get_image_coords(struct nir_to_llvm_context *ctx,
2261 nir_intrinsic_instr *instr, bool add_frag_pos)
2262 {
2263 const struct glsl_type *type = instr->variables[0]->var->type;
2264 if(instr->variables[0]->deref.child)
2265 type = instr->variables[0]->deref.child->type;
2266
2267 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
2268 LLVMValueRef coords[4];
2269 LLVMValueRef masks[] = {
2270 LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false),
2271 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false),
2272 };
2273 LLVMValueRef res;
2274 int count;
2275 count = image_type_to_components_count(glsl_get_sampler_dim(type),
2276 glsl_sampler_type_is_array(type));
2277
2278 if (count == 1) {
2279 if (instr->src[0].ssa->num_components)
2280 res = LLVMBuildExtractElement(ctx->builder, src0, masks[0], "");
2281 else
2282 res = src0;
2283 } else {
2284 int chan;
2285 for (chan = 0; chan < count; ++chan) {
2286 coords[chan] = LLVMBuildExtractElement(ctx->builder, src0, masks[chan], "");
2287 }
2288
2289 if (add_frag_pos) {
2290 for (chan = 0; chan < count; ++chan)
2291 coords[chan] = LLVMBuildAdd(ctx->builder, coords[chan], LLVMBuildFPToUI(ctx->builder, ctx->frag_pos[chan], ctx->i32, ""), "");
2292 }
2293 if (count == 3) {
2294 coords[3] = LLVMGetUndef(ctx->i32);
2295 count = 4;
2296 }
2297 res = build_gather_values(ctx, coords, count);
2298 }
2299 return res;
2300 }
2301
2302 static void build_type_name_for_intr(
2303 LLVMTypeRef type,
2304 char *buf, unsigned bufsize)
2305 {
2306 LLVMTypeRef elem_type = type;
2307
2308 assert(bufsize >= 8);
2309
2310 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
2311 int ret = snprintf(buf, bufsize, "v%u",
2312 LLVMGetVectorSize(type));
2313 if (ret < 0) {
2314 char *type_name = LLVMPrintTypeToString(type);
2315 fprintf(stderr, "Error building type name for: %s\n",
2316 type_name);
2317 return;
2318 }
2319 elem_type = LLVMGetElementType(type);
2320 buf += ret;
2321 bufsize -= ret;
2322 }
2323 switch (LLVMGetTypeKind(elem_type)) {
2324 default: break;
2325 case LLVMIntegerTypeKind:
2326 snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type));
2327 break;
2328 case LLVMFloatTypeKind:
2329 snprintf(buf, bufsize, "f32");
2330 break;
2331 case LLVMDoubleTypeKind:
2332 snprintf(buf, bufsize, "f64");
2333 break;
2334 }
2335 }
2336
2337 static void get_image_intr_name(const char *base_name,
2338 LLVMTypeRef data_type,
2339 LLVMTypeRef coords_type,
2340 LLVMTypeRef rsrc_type,
2341 char *out_name, unsigned out_len)
2342 {
2343 char coords_type_name[8];
2344
2345 build_type_name_for_intr(coords_type, coords_type_name,
2346 sizeof(coords_type_name));
2347
2348 if (HAVE_LLVM <= 0x0309) {
2349 snprintf(out_name, out_len, "%s.%s", base_name, coords_type_name);
2350 } else {
2351 char data_type_name[8];
2352 char rsrc_type_name[8];
2353
2354 build_type_name_for_intr(data_type, data_type_name,
2355 sizeof(data_type_name));
2356 build_type_name_for_intr(rsrc_type, rsrc_type_name,
2357 sizeof(rsrc_type_name));
2358 snprintf(out_name, out_len, "%s.%s.%s.%s", base_name,
2359 data_type_name, coords_type_name, rsrc_type_name);
2360 }
2361 }
2362
2363 static LLVMValueRef visit_image_load(struct nir_to_llvm_context *ctx,
2364 nir_intrinsic_instr *instr)
2365 {
2366 LLVMValueRef params[7];
2367 LLVMValueRef res;
2368 char intrinsic_name[64];
2369 const nir_variable *var = instr->variables[0]->var;
2370 const struct glsl_type *type = var->type;
2371 if(instr->variables[0]->deref.child)
2372 type = instr->variables[0]->deref.child->type;
2373
2374 type = glsl_without_array(type);
2375 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2376 params[0] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
2377 params[1] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
2378 LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
2379 params[2] = LLVMConstInt(ctx->i32, 0, false); /* voffset */
2380 params[3] = LLVMConstInt(ctx->i1, 0, false); /* glc */
2381 params[4] = LLVMConstInt(ctx->i1, 0, false); /* slc */
2382 res = emit_llvm_intrinsic(ctx, "llvm.amdgcn.buffer.load.format.v4f32", ctx->v4f32,
2383 params, 5, 0);
2384
2385 res = trim_vector(ctx, res, instr->dest.ssa.num_components);
2386 res = to_integer(ctx, res);
2387 } else {
2388 bool is_da = glsl_sampler_type_is_array(type) ||
2389 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
2390 bool add_frag_pos = glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_SUBPASS;
2391 LLVMValueRef da = is_da ? ctx->i32one : ctx->i32zero;
2392 LLVMValueRef glc = LLVMConstInt(ctx->i1, 0, false);
2393 LLVMValueRef slc = LLVMConstInt(ctx->i1, 0, false);
2394
2395 params[0] = get_image_coords(ctx, instr, add_frag_pos);
2396 params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2397 params[2] = LLVMConstInt(ctx->i32, 15, false); /* dmask */
2398 if (HAVE_LLVM <= 0x0309) {
2399 params[3] = LLVMConstInt(ctx->i1, 0, false); /* r128 */
2400 params[4] = da;
2401 params[5] = glc;
2402 params[6] = slc;
2403 } else {
2404 LLVMValueRef lwe = LLVMConstInt(ctx->i1, 0, false);
2405 params[3] = glc;
2406 params[4] = slc;
2407 params[5] = lwe;
2408 params[6] = da;
2409 }
2410
2411 get_image_intr_name("llvm.amdgcn.image.load",
2412 ctx->v4f32, /* vdata */
2413 LLVMTypeOf(params[0]), /* coords */
2414 LLVMTypeOf(params[1]), /* rsrc */
2415 intrinsic_name, sizeof(intrinsic_name));
2416
2417 res = emit_llvm_intrinsic(ctx, intrinsic_name, ctx->v4f32,
2418 params, 7, LLVMReadOnlyAttribute);
2419 }
2420 return to_integer(ctx, res);
2421 }
2422
2423 static void visit_image_store(struct nir_to_llvm_context *ctx,
2424 nir_intrinsic_instr *instr)
2425 {
2426 LLVMValueRef params[8];
2427 char intrinsic_name[64];
2428 const nir_variable *var = instr->variables[0]->var;
2429 LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0);
2430 LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0);
2431 const struct glsl_type *type = glsl_without_array(var->type);
2432
2433 if (ctx->stage == MESA_SHADER_FRAGMENT)
2434 ctx->shader_info->fs.writes_memory = true;
2435
2436 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2437 params[0] = to_float(ctx, get_src(ctx, instr->src[2])); /* data */
2438 params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
2439 params[2] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
2440 LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
2441 params[3] = LLVMConstInt(ctx->i32, 0, false); /* voffset */
2442 params[4] = i1false; /* glc */
2443 params[5] = i1false; /* slc */
2444 emit_llvm_intrinsic(ctx, "llvm.amdgcn.buffer.store.format.v4f32", ctx->voidt,
2445 params, 6, 0);
2446 } else {
2447 bool is_da = glsl_sampler_type_is_array(type) ||
2448 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
2449 LLVMValueRef da = is_da ? i1true : i1false;
2450 LLVMValueRef glc = i1false;
2451 LLVMValueRef slc = i1false;
2452
2453 params[0] = to_float(ctx, get_src(ctx, instr->src[2]));
2454 params[1] = get_image_coords(ctx, instr, false); /* coords */
2455 params[2] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2456 params[3] = LLVMConstInt(ctx->i32, 15, false); /* dmask */
2457 if (HAVE_LLVM <= 0x0309) {
2458 params[4] = i1false; /* r128 */
2459 params[5] = da;
2460 params[6] = glc;
2461 params[7] = slc;
2462 } else {
2463 LLVMValueRef lwe = i1false;
2464 params[4] = glc;
2465 params[5] = slc;
2466 params[6] = lwe;
2467 params[7] = da;
2468 }
2469
2470 get_image_intr_name("llvm.amdgcn.image.store",
2471 LLVMTypeOf(params[0]), /* vdata */
2472 LLVMTypeOf(params[1]), /* coords */
2473 LLVMTypeOf(params[2]), /* rsrc */
2474 intrinsic_name, sizeof(intrinsic_name));
2475
2476 emit_llvm_intrinsic(ctx, intrinsic_name, ctx->voidt,
2477 params, 8, 0);
2478 }
2479
2480 }
2481
2482 static LLVMValueRef visit_image_atomic(struct nir_to_llvm_context *ctx,
2483 nir_intrinsic_instr *instr)
2484 {
2485 LLVMValueRef params[6];
2486 int param_count = 0;
2487 const nir_variable *var = instr->variables[0]->var;
2488 LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0);
2489 LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0);
2490 const char *base_name = "llvm.amdgcn.image.atomic";
2491 const char *atomic_name;
2492 LLVMValueRef coords;
2493 char intrinsic_name[32], coords_type[8];
2494 const struct glsl_type *type = glsl_without_array(var->type);
2495
2496 if (ctx->stage == MESA_SHADER_FRAGMENT)
2497 ctx->shader_info->fs.writes_memory = true;
2498
2499 params[param_count++] = get_src(ctx, instr->src[2]);
2500 if (instr->intrinsic == nir_intrinsic_image_atomic_comp_swap)
2501 params[param_count++] = get_src(ctx, instr->src[3]);
2502
2503 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2504 params[param_count++] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
2505 coords = params[param_count++] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
2506 LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
2507 params[param_count++] = ctx->i32zero; /* voffset */
2508 params[param_count++] = i1false; /* glc */
2509 params[param_count++] = i1false; /* slc */
2510 } else {
2511 bool da = glsl_sampler_type_is_array(type) ||
2512 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
2513
2514 coords = params[param_count++] = get_image_coords(ctx, instr, false);
2515 params[param_count++] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2516 params[param_count++] = i1false; /* r128 */
2517 params[param_count++] = da ? i1true : i1false; /* da */
2518 params[param_count++] = i1false; /* slc */
2519 }
2520
2521 switch (instr->intrinsic) {
2522 case nir_intrinsic_image_atomic_add:
2523 atomic_name = "add";
2524 break;
2525 case nir_intrinsic_image_atomic_min:
2526 atomic_name = "smin";
2527 break;
2528 case nir_intrinsic_image_atomic_max:
2529 atomic_name = "smax";
2530 break;
2531 case nir_intrinsic_image_atomic_and:
2532 atomic_name = "and";
2533 break;
2534 case nir_intrinsic_image_atomic_or:
2535 atomic_name = "or";
2536 break;
2537 case nir_intrinsic_image_atomic_xor:
2538 atomic_name = "xor";
2539 break;
2540 case nir_intrinsic_image_atomic_exchange:
2541 atomic_name = "swap";
2542 break;
2543 case nir_intrinsic_image_atomic_comp_swap:
2544 atomic_name = "cmpswap";
2545 break;
2546 default:
2547 abort();
2548 }
2549 build_int_type_name(LLVMTypeOf(coords),
2550 coords_type, sizeof(coords_type));
2551
2552 snprintf(intrinsic_name, sizeof(intrinsic_name),
2553 "%s.%s.%s", base_name, atomic_name, coords_type);
2554 return emit_llvm_intrinsic(ctx, intrinsic_name, ctx->i32, params, param_count, 0);
2555 }
2556
2557 static LLVMValueRef visit_image_size(struct nir_to_llvm_context *ctx,
2558 nir_intrinsic_instr *instr)
2559 {
2560 LLVMValueRef res;
2561 LLVMValueRef params[10];
2562 const nir_variable *var = instr->variables[0]->var;
2563 const struct glsl_type *type = instr->variables[0]->var->type;
2564 bool da = glsl_sampler_type_is_array(var->type) ||
2565 glsl_get_sampler_dim(var->type) == GLSL_SAMPLER_DIM_CUBE;
2566 if(instr->variables[0]->deref.child)
2567 type = instr->variables[0]->deref.child->type;
2568
2569 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF)
2570 return get_buffer_size(ctx, get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER), true);
2571 params[0] = ctx->i32zero;
2572 params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2573 params[2] = LLVMConstInt(ctx->i32, 15, false);
2574 params[3] = ctx->i32zero;
2575 params[4] = ctx->i32zero;
2576 params[5] = da ? ctx->i32one : ctx->i32zero;
2577 params[6] = ctx->i32zero;
2578 params[7] = ctx->i32zero;
2579 params[8] = ctx->i32zero;
2580 params[9] = ctx->i32zero;
2581
2582 res = emit_llvm_intrinsic(ctx, "llvm.SI.getresinfo.i32", ctx->v4i32,
2583 params, 10, LLVMReadNoneAttribute);
2584
2585 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE &&
2586 glsl_sampler_type_is_array(type)) {
2587 LLVMValueRef two = LLVMConstInt(ctx->i32, 2, false);
2588 LLVMValueRef six = LLVMConstInt(ctx->i32, 6, false);
2589 LLVMValueRef z = LLVMBuildExtractElement(ctx->builder, res, two, "");
2590 z = LLVMBuildSDiv(ctx->builder, z, six, "");
2591 res = LLVMBuildInsertElement(ctx->builder, res, z, two, "");
2592 }
2593 return res;
2594 }
2595
2596 static void emit_waitcnt(struct nir_to_llvm_context *ctx)
2597 {
2598 LLVMValueRef args[1] = {
2599 LLVMConstInt(ctx->i32, 0xf70, false),
2600 };
2601 emit_llvm_intrinsic(ctx, "llvm.amdgcn.s.waitcnt",
2602 ctx->voidt, args, 1, 0);
2603 }
2604
2605 static void emit_barrier(struct nir_to_llvm_context *ctx)
2606 {
2607 // TODO tess
2608 emit_llvm_intrinsic(ctx, "llvm.amdgcn.s.barrier",
2609 ctx->voidt, NULL, 0, 0);
2610 }
2611
2612 static LLVMValueRef
2613 visit_load_local_invocation_index(struct nir_to_llvm_context *ctx)
2614 {
2615 LLVMValueRef result;
2616 LLVMValueRef thread_id = get_thread_id(ctx);
2617 result = LLVMBuildAnd(ctx->builder, ctx->tg_size,
2618 LLVMConstInt(ctx->i32, 0xfc0, false), "");
2619
2620 return LLVMBuildAdd(ctx->builder, result, thread_id, "");
2621 }
2622
2623 static LLVMValueRef visit_var_atomic(struct nir_to_llvm_context *ctx,
2624 nir_intrinsic_instr *instr)
2625 {
2626 LLVMValueRef ptr, result;
2627 int idx = instr->variables[0]->var->data.driver_location;
2628 LLVMValueRef src = get_src(ctx, instr->src[0]);
2629 ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
2630
2631 if (instr->intrinsic == nir_intrinsic_var_atomic_comp_swap) {
2632 LLVMValueRef src1 = get_src(ctx, instr->src[1]);
2633 result = LLVMBuildAtomicCmpXchg(ctx->builder,
2634 ptr, src, src1,
2635 LLVMAtomicOrderingSequentiallyConsistent,
2636 LLVMAtomicOrderingSequentiallyConsistent,
2637 false);
2638 } else {
2639 LLVMAtomicRMWBinOp op;
2640 switch (instr->intrinsic) {
2641 case nir_intrinsic_var_atomic_add:
2642 op = LLVMAtomicRMWBinOpAdd;
2643 break;
2644 case nir_intrinsic_var_atomic_umin:
2645 op = LLVMAtomicRMWBinOpUMin;
2646 break;
2647 case nir_intrinsic_var_atomic_umax:
2648 op = LLVMAtomicRMWBinOpUMax;
2649 break;
2650 case nir_intrinsic_var_atomic_imin:
2651 op = LLVMAtomicRMWBinOpMin;
2652 break;
2653 case nir_intrinsic_var_atomic_imax:
2654 op = LLVMAtomicRMWBinOpMax;
2655 break;
2656 case nir_intrinsic_var_atomic_and:
2657 op = LLVMAtomicRMWBinOpAnd;
2658 break;
2659 case nir_intrinsic_var_atomic_or:
2660 op = LLVMAtomicRMWBinOpOr;
2661 break;
2662 case nir_intrinsic_var_atomic_xor:
2663 op = LLVMAtomicRMWBinOpXor;
2664 break;
2665 case nir_intrinsic_var_atomic_exchange:
2666 op = LLVMAtomicRMWBinOpXchg;
2667 break;
2668 default:
2669 return NULL;
2670 }
2671
2672 result = LLVMBuildAtomicRMW(ctx->builder, op, ptr, to_integer(ctx, src),
2673 LLVMAtomicOrderingSequentiallyConsistent,
2674 false);
2675 }
2676 return result;
2677 }
2678
2679 #define INTERP_CENTER 0
2680 #define INTERP_CENTROID 1
2681 #define INTERP_SAMPLE 2
2682
2683 static LLVMValueRef lookup_interp_param(struct nir_to_llvm_context *ctx,
2684 enum glsl_interp_mode interp, unsigned location)
2685 {
2686 switch (interp) {
2687 case INTERP_MODE_FLAT:
2688 default:
2689 return NULL;
2690 case INTERP_MODE_SMOOTH:
2691 case INTERP_MODE_NONE:
2692 if (location == INTERP_CENTER)
2693 return ctx->persp_center;
2694 else if (location == INTERP_CENTROID)
2695 return ctx->persp_centroid;
2696 else if (location == INTERP_SAMPLE)
2697 return ctx->persp_sample;
2698 break;
2699 case INTERP_MODE_NOPERSPECTIVE:
2700 if (location == INTERP_CENTER)
2701 return ctx->linear_center;
2702 else if (location == INTERP_CENTROID)
2703 return ctx->linear_centroid;
2704 else if (location == INTERP_SAMPLE)
2705 return ctx->linear_sample;
2706 break;
2707 }
2708 return NULL;
2709 }
2710
2711 static LLVMValueRef load_sample_position(struct nir_to_llvm_context *ctx,
2712 LLVMValueRef sample_id)
2713 {
2714 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
2715 LLVMValueRef offset0 = LLVMBuildMul(ctx->builder, sample_id, LLVMConstInt(ctx->i32, 8, false), "");
2716 LLVMValueRef offset1 = LLVMBuildAdd(ctx->builder, offset0, LLVMConstInt(ctx->i32, 4, false), "");
2717 LLVMValueRef result[2];
2718
2719 result[0] = build_indexed_load_const(ctx, ctx->sample_positions, offset0);
2720 result[1] = build_indexed_load_const(ctx, ctx->sample_positions, offset1);
2721
2722 return build_gather_values(ctx, result, 2);
2723 }
2724
2725 static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx,
2726 nir_intrinsic_instr *instr)
2727 {
2728 LLVMValueRef result[2];
2729 LLVMValueRef interp_param, attr_number;
2730 unsigned location;
2731 unsigned chan;
2732 LLVMValueRef src_c0, src_c1;
2733 const char *intr_name;
2734 LLVMValueRef src0;
2735 int input_index = instr->variables[0]->var->data.location - VARYING_SLOT_VAR0;
2736 switch (instr->intrinsic) {
2737 case nir_intrinsic_interp_var_at_centroid:
2738 location = INTERP_CENTROID;
2739 break;
2740 case nir_intrinsic_interp_var_at_sample:
2741 case nir_intrinsic_interp_var_at_offset:
2742 location = INTERP_SAMPLE;
2743 src0 = get_src(ctx, instr->src[0]);
2744 break;
2745 default:
2746 break;
2747 }
2748
2749 if (instr->intrinsic == nir_intrinsic_interp_var_at_offset) {
2750 src_c0 = to_float(ctx, LLVMBuildExtractElement(ctx->builder, src0, ctx->i32zero, ""));
2751 src_c1 = to_float(ctx, LLVMBuildExtractElement(ctx->builder, src0, ctx->i32one, ""));
2752 } else if (instr->intrinsic == nir_intrinsic_interp_var_at_sample) {
2753 LLVMValueRef sample_position;
2754 LLVMValueRef halfval = LLVMConstReal(ctx->f32, 0.5f);
2755
2756 /* fetch sample ID */
2757 sample_position = load_sample_position(ctx, src0);
2758
2759 src_c0 = LLVMBuildExtractElement(ctx->builder, sample_position, ctx->i32zero, "");
2760 src_c0 = LLVMBuildFSub(ctx->builder, src_c0, halfval, "");
2761 src_c1 = LLVMBuildExtractElement(ctx->builder, sample_position, ctx->i32one, "");
2762 src_c1 = LLVMBuildFSub(ctx->builder, src_c1, halfval, "");
2763 }
2764 interp_param = lookup_interp_param(ctx, instr->variables[0]->var->data.interpolation, location);
2765 attr_number = LLVMConstInt(ctx->i32, input_index, false);
2766
2767 if (location == INTERP_SAMPLE) {
2768 LLVMValueRef ij_out[2];
2769 LLVMValueRef ddxy_out = emit_ddxy_interp(ctx, interp_param);
2770
2771 /*
2772 * take the I then J parameters, and the DDX/Y for it, and
2773 * calculate the IJ inputs for the interpolator.
2774 * temp1 = ddx * offset/sample.x + I;
2775 * interp_param.I = ddy * offset/sample.y + temp1;
2776 * temp1 = ddx * offset/sample.x + J;
2777 * interp_param.J = ddy * offset/sample.y + temp1;
2778 */
2779 for (unsigned i = 0; i < 2; i++) {
2780 LLVMValueRef ix_ll = LLVMConstInt(ctx->i32, i, false);
2781 LLVMValueRef iy_ll = LLVMConstInt(ctx->i32, i + 2, false);
2782 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->builder,
2783 ddxy_out, ix_ll, "");
2784 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->builder,
2785 ddxy_out, iy_ll, "");
2786 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->builder,
2787 interp_param, ix_ll, "");
2788 LLVMValueRef temp1, temp2;
2789
2790 interp_el = LLVMBuildBitCast(ctx->builder, interp_el,
2791 ctx->f32, "");
2792
2793 temp1 = LLVMBuildFMul(ctx->builder, ddx_el, src_c0, "");
2794 temp1 = LLVMBuildFAdd(ctx->builder, temp1, interp_el, "");
2795
2796 temp2 = LLVMBuildFMul(ctx->builder, ddy_el, src_c1, "");
2797 temp2 = LLVMBuildFAdd(ctx->builder, temp2, temp1, "");
2798
2799 ij_out[i] = LLVMBuildBitCast(ctx->builder,
2800 temp2, ctx->i32, "");
2801 }
2802 interp_param = build_gather_values(ctx, ij_out, 2);
2803
2804 }
2805 intr_name = interp_param ? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
2806 for (chan = 0; chan < 2; chan++) {
2807 LLVMValueRef args[4];
2808 LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
2809
2810 args[0] = llvm_chan;
2811 args[1] = attr_number;
2812 args[2] = ctx->prim_mask;
2813 args[3] = interp_param;
2814 result[chan] = emit_llvm_intrinsic(ctx, intr_name,
2815 ctx->f32, args, args[3] ? 4 : 3,
2816 LLVMReadNoneAttribute);
2817 }
2818 return build_gather_values(ctx, result, 2);
2819 }
2820
2821 static void visit_intrinsic(struct nir_to_llvm_context *ctx,
2822 nir_intrinsic_instr *instr)
2823 {
2824 LLVMValueRef result = NULL;
2825
2826 switch (instr->intrinsic) {
2827 case nir_intrinsic_load_work_group_id: {
2828 result = ctx->workgroup_ids;
2829 break;
2830 }
2831 case nir_intrinsic_load_base_vertex: {
2832 result = ctx->base_vertex;
2833 break;
2834 }
2835 case nir_intrinsic_load_vertex_id_zero_base: {
2836 result = ctx->vertex_id;
2837 break;
2838 }
2839 case nir_intrinsic_load_local_invocation_id: {
2840 result = ctx->local_invocation_ids;
2841 break;
2842 }
2843 case nir_intrinsic_load_base_instance:
2844 result = ctx->start_instance;
2845 break;
2846 case nir_intrinsic_load_sample_id:
2847 result = ctx->ancillary;
2848 break;
2849 case nir_intrinsic_load_front_face:
2850 result = ctx->front_face;
2851 break;
2852 case nir_intrinsic_load_instance_id:
2853 result = ctx->instance_id;
2854 ctx->shader_info->vs.vgpr_comp_cnt = MAX2(3,
2855 ctx->shader_info->vs.vgpr_comp_cnt);
2856 break;
2857 case nir_intrinsic_load_num_work_groups:
2858 result = ctx->num_work_groups;
2859 break;
2860 case nir_intrinsic_load_local_invocation_index:
2861 result = visit_load_local_invocation_index(ctx);
2862 break;
2863 case nir_intrinsic_load_push_constant:
2864 result = visit_load_push_constant(ctx, instr);
2865 break;
2866 case nir_intrinsic_vulkan_resource_index:
2867 result = visit_vulkan_resource_index(ctx, instr);
2868 break;
2869 case nir_intrinsic_store_ssbo:
2870 visit_store_ssbo(ctx, instr);
2871 break;
2872 case nir_intrinsic_load_ssbo:
2873 result = visit_load_buffer(ctx, instr);
2874 break;
2875 case nir_intrinsic_ssbo_atomic_add:
2876 case nir_intrinsic_ssbo_atomic_imin:
2877 case nir_intrinsic_ssbo_atomic_umin:
2878 case nir_intrinsic_ssbo_atomic_imax:
2879 case nir_intrinsic_ssbo_atomic_umax:
2880 case nir_intrinsic_ssbo_atomic_and:
2881 case nir_intrinsic_ssbo_atomic_or:
2882 case nir_intrinsic_ssbo_atomic_xor:
2883 case nir_intrinsic_ssbo_atomic_exchange:
2884 case nir_intrinsic_ssbo_atomic_comp_swap:
2885 result = visit_atomic_ssbo(ctx, instr);
2886 break;
2887 case nir_intrinsic_load_ubo:
2888 result = visit_load_buffer(ctx, instr);
2889 break;
2890 case nir_intrinsic_get_buffer_size:
2891 result = visit_get_buffer_size(ctx, instr);
2892 break;
2893 case nir_intrinsic_load_var:
2894 result = visit_load_var(ctx, instr);
2895 break;
2896 case nir_intrinsic_store_var:
2897 visit_store_var(ctx, instr);
2898 break;
2899 case nir_intrinsic_image_load:
2900 result = visit_image_load(ctx, instr);
2901 break;
2902 case nir_intrinsic_image_store:
2903 visit_image_store(ctx, instr);
2904 break;
2905 case nir_intrinsic_image_atomic_add:
2906 case nir_intrinsic_image_atomic_min:
2907 case nir_intrinsic_image_atomic_max:
2908 case nir_intrinsic_image_atomic_and:
2909 case nir_intrinsic_image_atomic_or:
2910 case nir_intrinsic_image_atomic_xor:
2911 case nir_intrinsic_image_atomic_exchange:
2912 case nir_intrinsic_image_atomic_comp_swap:
2913 result = visit_image_atomic(ctx, instr);
2914 break;
2915 case nir_intrinsic_image_size:
2916 result = visit_image_size(ctx, instr);
2917 break;
2918 case nir_intrinsic_discard:
2919 ctx->shader_info->fs.can_discard = true;
2920 emit_llvm_intrinsic(ctx, "llvm.AMDGPU.kilp",
2921 LLVMVoidTypeInContext(ctx->context),
2922 NULL, 0, 0);
2923 break;
2924 case nir_intrinsic_memory_barrier:
2925 emit_waitcnt(ctx);
2926 break;
2927 case nir_intrinsic_barrier:
2928 emit_barrier(ctx);
2929 break;
2930 case nir_intrinsic_var_atomic_add:
2931 case nir_intrinsic_var_atomic_imin:
2932 case nir_intrinsic_var_atomic_umin:
2933 case nir_intrinsic_var_atomic_imax:
2934 case nir_intrinsic_var_atomic_umax:
2935 case nir_intrinsic_var_atomic_and:
2936 case nir_intrinsic_var_atomic_or:
2937 case nir_intrinsic_var_atomic_xor:
2938 case nir_intrinsic_var_atomic_exchange:
2939 case nir_intrinsic_var_atomic_comp_swap:
2940 result = visit_var_atomic(ctx, instr);
2941 break;
2942 case nir_intrinsic_interp_var_at_centroid:
2943 case nir_intrinsic_interp_var_at_sample:
2944 case nir_intrinsic_interp_var_at_offset:
2945 result = visit_interp(ctx, instr);
2946 break;
2947 default:
2948 fprintf(stderr, "Unknown intrinsic: ");
2949 nir_print_instr(&instr->instr, stderr);
2950 fprintf(stderr, "\n");
2951 break;
2952 }
2953 if (result) {
2954 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
2955 }
2956 }
2957
2958 static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
2959 nir_deref_var *deref,
2960 enum desc_type desc_type)
2961 {
2962 unsigned desc_set = deref->var->data.descriptor_set;
2963 LLVMValueRef list = ctx->descriptor_sets[desc_set];
2964 struct radv_descriptor_set_layout *layout = ctx->options->layout->set[desc_set].layout;
2965 struct radv_descriptor_set_binding_layout *binding = layout->binding + deref->var->data.binding;
2966 unsigned offset = binding->offset;
2967 unsigned stride = binding->size;
2968 unsigned type_size;
2969 LLVMBuilderRef builder = ctx->builder;
2970 LLVMTypeRef type;
2971 LLVMValueRef indices[2];
2972 LLVMValueRef index = NULL;
2973
2974 assert(deref->var->data.binding < layout->binding_count);
2975
2976 switch (desc_type) {
2977 case DESC_IMAGE:
2978 type = ctx->v8i32;
2979 type_size = 32;
2980 break;
2981 case DESC_FMASK:
2982 type = ctx->v8i32;
2983 offset += 32;
2984 type_size = 32;
2985 break;
2986 case DESC_SAMPLER:
2987 type = ctx->v4i32;
2988 if (binding->type == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
2989 offset += 64;
2990
2991 type_size = 16;
2992 break;
2993 case DESC_BUFFER:
2994 type = ctx->v4i32;
2995 type_size = 16;
2996 break;
2997 }
2998
2999 if (deref->deref.child) {
3000 nir_deref_array *child = (nir_deref_array*)deref->deref.child;
3001
3002 assert(child->deref_array_type != nir_deref_array_type_wildcard);
3003 offset += child->base_offset * stride;
3004 if (child->deref_array_type == nir_deref_array_type_indirect) {
3005 index = get_src(ctx, child->indirect);
3006 }
3007 }
3008
3009 assert(stride % type_size == 0);
3010
3011 if (!index)
3012 index = ctx->i32zero;
3013
3014 index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, stride / type_size, 0), "");
3015 indices[0] = ctx->i32zero;
3016 indices[1] = LLVMConstInt(ctx->i32, offset, 0);
3017 list = LLVMBuildGEP(builder, list, indices, 2, "");
3018 list = LLVMBuildPointerCast(builder, list, const_array(type, 0), "");
3019
3020 return build_indexed_load_const(ctx, list, index);
3021 }
3022
3023 static void set_tex_fetch_args(struct nir_to_llvm_context *ctx,
3024 struct ac_tex_info *tinfo,
3025 nir_tex_instr *instr,
3026 nir_texop op,
3027 LLVMValueRef res_ptr, LLVMValueRef samp_ptr,
3028 LLVMValueRef *param, unsigned count,
3029 unsigned dmask)
3030 {
3031 int num_args;
3032 unsigned is_rect = 0;
3033 bool da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE;
3034
3035 if (op == nir_texop_lod)
3036 da = false;
3037 /* Pad to power of two vector */
3038 while (count < util_next_power_of_two(count))
3039 param[count++] = LLVMGetUndef(ctx->i32);
3040
3041 if (count > 1)
3042 tinfo->args[0] = build_gather_values(ctx, param, count);
3043 else
3044 tinfo->args[0] = param[0];
3045
3046 tinfo->args[1] = res_ptr;
3047 num_args = 2;
3048
3049 if (op == nir_texop_txf ||
3050 op == nir_texop_txf_ms ||
3051 op == nir_texop_query_levels ||
3052 op == nir_texop_texture_samples ||
3053 op == nir_texop_txs)
3054 tinfo->dst_type = ctx->v4i32;
3055 else {
3056 tinfo->dst_type = ctx->v4f32;
3057 tinfo->args[num_args++] = samp_ptr;
3058 }
3059
3060 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF && op == nir_texop_txf) {
3061 tinfo->args[0] = res_ptr;
3062 tinfo->args[1] = LLVMConstInt(ctx->i32, 0, false);
3063 tinfo->args[2] = param[0];
3064 tinfo->arg_count = 3;
3065 return;
3066 }
3067
3068 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, dmask, 0);
3069 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, is_rect, 0); /* unorm */
3070 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
3071 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, da ? 1 : 0, 0);
3072 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
3073 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
3074 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
3075 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
3076
3077 tinfo->arg_count = num_args;
3078 }
3079
3080 static void tex_fetch_ptrs(struct nir_to_llvm_context *ctx,
3081 nir_tex_instr *instr,
3082 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3083 LLVMValueRef *fmask_ptr)
3084 {
3085 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF)
3086 *res_ptr = get_sampler_desc(ctx, instr->texture, DESC_BUFFER);
3087 else
3088 *res_ptr = get_sampler_desc(ctx, instr->texture, DESC_IMAGE);
3089 if (samp_ptr) {
3090 if (instr->sampler)
3091 *samp_ptr = get_sampler_desc(ctx, instr->sampler, DESC_SAMPLER);
3092 else
3093 *samp_ptr = get_sampler_desc(ctx, instr->texture, DESC_SAMPLER);
3094 }
3095 if (fmask_ptr && !instr->sampler && (instr->op == nir_texop_txf_ms ||
3096 instr->op == nir_texop_samples_identical))
3097 *fmask_ptr = get_sampler_desc(ctx, instr->texture, DESC_FMASK);
3098 }
3099
3100 static LLVMValueRef build_cube_intrinsic(struct nir_to_llvm_context *ctx,
3101 LLVMValueRef *in)
3102 {
3103
3104 LLVMValueRef v, cube_vec;
3105
3106 if (1) {
3107 LLVMTypeRef f32 = LLVMTypeOf(in[0]);
3108 LLVMValueRef out[4];
3109
3110 out[0] = emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubetc",
3111 f32, in, 3, LLVMReadNoneAttribute);
3112 out[1] = emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubesc",
3113 f32, in, 3, LLVMReadNoneAttribute);
3114 out[2] = emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubema",
3115 f32, in, 3, LLVMReadNoneAttribute);
3116 out[3] = emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubeid",
3117 f32, in, 3, LLVMReadNoneAttribute);
3118
3119 return build_gather_values(ctx, out, 4);
3120 } else {
3121 LLVMValueRef c[4];
3122 c[0] = in[0];
3123 c[1] = in[1];
3124 c[2] = in[2];
3125 c[3] = LLVMGetUndef(LLVMTypeOf(in[0]));
3126 cube_vec = build_gather_values(ctx, c, 4);
3127 v = emit_llvm_intrinsic(ctx, "llvm.AMDGPU.cube", LLVMTypeOf(cube_vec),
3128 &cube_vec, 1, LLVMReadNoneAttribute);
3129 }
3130 return v;
3131 }
3132
3133 static void cube_to_2d_coords(struct nir_to_llvm_context *ctx,
3134 LLVMValueRef *in, LLVMValueRef *out)
3135 {
3136 LLVMValueRef coords[4];
3137 LLVMValueRef mad_args[3];
3138 LLVMValueRef v;
3139 LLVMValueRef tmp;
3140 int i;
3141
3142 v = build_cube_intrinsic(ctx, in);
3143 for (i = 0; i < 4; i++)
3144 coords[i] = LLVMBuildExtractElement(ctx->builder, v,
3145 LLVMConstInt(ctx->i32, i, false), "");
3146
3147 coords[2] = emit_llvm_intrinsic(ctx, "llvm.fabs.f32", ctx->f32,
3148 &coords[2], 1, LLVMReadNoneAttribute);
3149 coords[2] = emit_fdiv(ctx, ctx->f32one, coords[2]);
3150
3151 mad_args[1] = coords[2];
3152 mad_args[2] = LLVMConstReal(ctx->f32, 1.5);
3153 mad_args[0] = coords[0];
3154
3155 /* emit MAD */
3156 tmp = LLVMBuildFMul(ctx->builder, mad_args[0], mad_args[1], "");
3157 coords[0] = LLVMBuildFAdd(ctx->builder, tmp, mad_args[2], "");
3158
3159 mad_args[0] = coords[1];
3160
3161 /* emit MAD */
3162 tmp = LLVMBuildFMul(ctx->builder, mad_args[0], mad_args[1], "");
3163 coords[1] = LLVMBuildFAdd(ctx->builder, tmp, mad_args[2], "");
3164
3165 /* apply xyz = yxw swizzle to cooords */
3166 out[0] = coords[1];
3167 out[1] = coords[0];
3168 out[2] = coords[3];
3169 }
3170
3171 static void emit_prepare_cube_coords(struct nir_to_llvm_context *ctx,
3172 LLVMValueRef *coords_arg, int num_coords,
3173 bool is_deriv,
3174 bool is_array, LLVMValueRef *derivs_arg)
3175 {
3176 LLVMValueRef coords[4];
3177 int i;
3178 cube_to_2d_coords(ctx, coords_arg, coords);
3179
3180 if (is_deriv && derivs_arg) {
3181 LLVMValueRef derivs[4];
3182 int axis;
3183
3184 /* Convert cube derivatives to 2D derivatives. */
3185 for (axis = 0; axis < 2; axis++) {
3186 LLVMValueRef shifted_cube_coords[4], shifted_coords[4];
3187
3188 /* Shift the cube coordinates by the derivatives to get
3189 * the cube coordinates of the "neighboring pixel".
3190 */
3191 for (i = 0; i < 3; i++)
3192 shifted_cube_coords[i] =
3193 LLVMBuildFAdd(ctx->builder, coords_arg[i],
3194 derivs_arg[axis*3+i], "");
3195 shifted_cube_coords[3] = LLVMGetUndef(ctx->f32);
3196
3197 /* Project the shifted cube coordinates onto the face. */
3198 cube_to_2d_coords(ctx, shifted_cube_coords,
3199 shifted_coords);
3200
3201 /* Subtract both sets of 2D coordinates to get 2D derivatives.
3202 * This won't work if the shifted coordinates ended up
3203 * in a different face.
3204 */
3205 for (i = 0; i < 2; i++)
3206 derivs[axis * 2 + i] =
3207 LLVMBuildFSub(ctx->builder, shifted_coords[i],
3208 coords[i], "");
3209 }
3210
3211 memcpy(derivs_arg, derivs, sizeof(derivs));
3212 }
3213
3214 if (is_array) {
3215 /* for cube arrays coord.z = coord.w(array_index) * 8 + face */
3216 /* coords_arg.w component - array_index for cube arrays */
3217 LLVMValueRef tmp = LLVMBuildFMul(ctx->builder, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), "");
3218 coords[2] = LLVMBuildFAdd(ctx->builder, tmp, coords[2], "");
3219 }
3220
3221 memcpy(coords_arg, coords, sizeof(coords));
3222 }
3223
3224 static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
3225 {
3226 LLVMValueRef result = NULL;
3227 struct ac_tex_info tinfo = { 0 };
3228 unsigned dmask = 0xf;
3229 LLVMValueRef address[16];
3230 LLVMValueRef coords[5];
3231 LLVMValueRef coord = NULL, lod = NULL, comparitor = NULL, bias, offsets = NULL;
3232 LLVMValueRef res_ptr, samp_ptr, fmask_ptr = NULL, sample_index = NULL;
3233 LLVMValueRef ddx = NULL, ddy = NULL;
3234 LLVMValueRef derivs[6];
3235 unsigned chan, count = 0;
3236 unsigned const_src = 0, num_deriv_comp = 0;
3237
3238 tex_fetch_ptrs(ctx, instr, &res_ptr, &samp_ptr, &fmask_ptr);
3239
3240 for (unsigned i = 0; i < instr->num_srcs; i++) {
3241 switch (instr->src[i].src_type) {
3242 case nir_tex_src_coord:
3243 coord = get_src(ctx, instr->src[i].src);
3244 break;
3245 case nir_tex_src_projector:
3246 break;
3247 case nir_tex_src_comparitor:
3248 comparitor = get_src(ctx, instr->src[i].src);
3249 break;
3250 case nir_tex_src_offset:
3251 offsets = get_src(ctx, instr->src[i].src);
3252 const_src = i;
3253 break;
3254 case nir_tex_src_bias:
3255 bias = get_src(ctx, instr->src[i].src);
3256 break;
3257 case nir_tex_src_lod:
3258 lod = get_src(ctx, instr->src[i].src);
3259 break;
3260 case nir_tex_src_ms_index:
3261 sample_index = get_src(ctx, instr->src[i].src);
3262 break;
3263 case nir_tex_src_ms_mcs:
3264 break;
3265 case nir_tex_src_ddx:
3266 ddx = get_src(ctx, instr->src[i].src);
3267 num_deriv_comp = instr->src[i].src.ssa->num_components;
3268 break;
3269 case nir_tex_src_ddy:
3270 ddy = get_src(ctx, instr->src[i].src);
3271 break;
3272 case nir_tex_src_texture_offset:
3273 case nir_tex_src_sampler_offset:
3274 case nir_tex_src_plane:
3275 default:
3276 break;
3277 }
3278 }
3279
3280 if (instr->op == nir_texop_texture_samples) {
3281 LLVMValueRef res, samples;
3282 res = LLVMBuildBitCast(ctx->builder, res_ptr, ctx->v8i32, "");
3283 samples = LLVMBuildExtractElement(ctx->builder, res,
3284 LLVMConstInt(ctx->i32, 3, false), "");
3285 samples = LLVMBuildLShr(ctx->builder, samples,
3286 LLVMConstInt(ctx->i32, 16, false), "");
3287 samples = LLVMBuildAnd(ctx->builder, samples,
3288 LLVMConstInt(ctx->i32, 0xf, false), "");
3289 samples = LLVMBuildShl(ctx->builder, ctx->i32one,
3290 samples, "");
3291
3292 result = samples;
3293 goto write_result;
3294 }
3295
3296 if (coord)
3297 for (chan = 0; chan < instr->coord_components; chan++)
3298 coords[chan] = llvm_extract_elem(ctx, coord, chan);
3299
3300 if (offsets && instr->op != nir_texop_txf) {
3301 LLVMValueRef offset[3], pack;
3302 for (chan = 0; chan < 3; ++chan)
3303 offset[chan] = ctx->i32zero;
3304
3305 tinfo.has_offset = true;
3306 for (chan = 0; chan < get_llvm_num_components(offsets); chan++) {
3307 offset[chan] = llvm_extract_elem(ctx, offsets, chan);
3308 offset[chan] = LLVMBuildAnd(ctx->builder, offset[chan],
3309 LLVMConstInt(ctx->i32, 0x3f, false), "");
3310 if (chan)
3311 offset[chan] = LLVMBuildShl(ctx->builder, offset[chan],
3312 LLVMConstInt(ctx->i32, chan * 8, false), "");
3313 }
3314 pack = LLVMBuildOr(ctx->builder, offset[0], offset[1], "");
3315 pack = LLVMBuildOr(ctx->builder, pack, offset[2], "");
3316 address[count++] = pack;
3317
3318 }
3319 /* pack LOD bias value */
3320 if (instr->op == nir_texop_txb && bias) {
3321 address[count++] = bias;
3322 }
3323
3324 /* Pack depth comparison value */
3325 if (instr->is_shadow && comparitor) {
3326 address[count++] = llvm_extract_elem(ctx, comparitor, 0);
3327 }
3328
3329 /* pack derivatives */
3330 if (ddx || ddy) {
3331 switch (instr->sampler_dim) {
3332 case GLSL_SAMPLER_DIM_3D:
3333 case GLSL_SAMPLER_DIM_CUBE:
3334 num_deriv_comp = 3;
3335 break;
3336 case GLSL_SAMPLER_DIM_2D:
3337 default:
3338 num_deriv_comp = 2;
3339 break;
3340 case GLSL_SAMPLER_DIM_1D:
3341 num_deriv_comp = 1;
3342 break;
3343 }
3344
3345 for (unsigned i = 0; i < num_deriv_comp; i++) {
3346 derivs[i * 2] = to_float(ctx, llvm_extract_elem(ctx, ddx, i));
3347 derivs[i * 2 + 1] = to_float(ctx, llvm_extract_elem(ctx, ddy, i));
3348 }
3349 }
3350
3351 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && coord) {
3352 for (chan = 0; chan < instr->coord_components; chan++)
3353 coords[chan] = to_float(ctx, coords[chan]);
3354 if (instr->coord_components == 3)
3355 coords[3] = LLVMGetUndef(ctx->f32);
3356 emit_prepare_cube_coords(ctx, coords, instr->coord_components, instr->op == nir_texop_txd, instr->is_array, derivs);
3357 if (num_deriv_comp)
3358 num_deriv_comp--;
3359 }
3360
3361 if (ddx || ddy) {
3362 for (unsigned i = 0; i < num_deriv_comp * 2; i++)
3363 address[count++] = derivs[i];
3364 }
3365
3366 /* Pack texture coordinates */
3367 if (coord) {
3368 address[count++] = coords[0];
3369 if (instr->coord_components > 1)
3370 address[count++] = coords[1];
3371 if (instr->coord_components > 2) {
3372 /* This seems like a bit of a hack - but it passes Vulkan CTS with it */
3373 if (instr->sampler_dim != GLSL_SAMPLER_DIM_3D && instr->op != nir_texop_txf) {
3374 coords[2] = to_float(ctx, coords[2]);
3375 coords[2] = emit_llvm_intrinsic(ctx, "llvm.rint.f32", ctx->f32, &coords[2],
3376 1, 0);
3377 coords[2] = to_integer(ctx, coords[2]);
3378 }
3379 address[count++] = coords[2];
3380 }
3381 }
3382
3383 /* Pack LOD */
3384 if ((instr->op == nir_texop_txl || instr->op == nir_texop_txf) && lod) {
3385 address[count++] = lod;
3386 } else if (instr->op == nir_texop_txf_ms && sample_index) {
3387 address[count++] = sample_index;
3388 } else if(instr->op == nir_texop_txs) {
3389 count = 0;
3390 address[count++] = lod;
3391 }
3392
3393 for (chan = 0; chan < count; chan++) {
3394 address[chan] = LLVMBuildBitCast(ctx->builder,
3395 address[chan], ctx->i32, "");
3396 }
3397
3398 if (instr->op == nir_texop_samples_identical) {
3399 LLVMValueRef txf_address[4];
3400 struct ac_tex_info txf_info = { 0 };
3401 unsigned txf_count = count;
3402 memcpy(txf_address, address, sizeof(txf_address));
3403
3404 if (!instr->is_array)
3405 txf_address[2] = ctx->i32zero;
3406 txf_address[3] = ctx->i32zero;
3407
3408 set_tex_fetch_args(ctx, &txf_info, instr, nir_texop_txf,
3409 fmask_ptr, NULL,
3410 txf_address, txf_count, 0xf);
3411
3412 result = build_tex_intrinsic(ctx, instr, &txf_info);
3413
3414 result = LLVMBuildExtractElement(ctx->builder, result, ctx->i32zero, "");
3415 result = emit_int_cmp(ctx, LLVMIntEQ, result, ctx->i32zero);
3416 goto write_result;
3417 }
3418
3419 /* Adjust the sample index according to FMASK.
3420 *
3421 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3422 * which is the identity mapping. Each nibble says which physical sample
3423 * should be fetched to get that sample.
3424 *
3425 * For example, 0x11111100 means there are only 2 samples stored and
3426 * the second sample covers 3/4 of the pixel. When reading samples 0
3427 * and 1, return physical sample 0 (determined by the first two 0s
3428 * in FMASK), otherwise return physical sample 1.
3429 *
3430 * The sample index should be adjusted as follows:
3431 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
3432 */
3433 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS) {
3434 LLVMValueRef txf_address[4];
3435 struct ac_tex_info txf_info = { 0 };
3436 unsigned txf_count = count;
3437 memcpy(txf_address, address, sizeof(txf_address));
3438
3439 if (!instr->is_array)
3440 txf_address[2] = ctx->i32zero;
3441 txf_address[3] = ctx->i32zero;
3442
3443 set_tex_fetch_args(ctx, &txf_info, instr, nir_texop_txf,
3444 fmask_ptr, NULL,
3445 txf_address, txf_count, 0xf);
3446
3447 result = build_tex_intrinsic(ctx, instr, &txf_info);
3448 LLVMValueRef four = LLVMConstInt(ctx->i32, 4, false);
3449 LLVMValueRef F = LLVMConstInt(ctx->i32, 0xf, false);
3450
3451 LLVMValueRef fmask = LLVMBuildExtractElement(ctx->builder,
3452 result,
3453 ctx->i32zero, "");
3454
3455 unsigned sample_chan = instr->is_array ? 3 : 2;
3456
3457 LLVMValueRef sample_index4 =
3458 LLVMBuildMul(ctx->builder, address[sample_chan], four, "");
3459 LLVMValueRef shifted_fmask =
3460 LLVMBuildLShr(ctx->builder, fmask, sample_index4, "");
3461 LLVMValueRef final_sample =
3462 LLVMBuildAnd(ctx->builder, shifted_fmask, F, "");
3463
3464 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3465 * resource descriptor is 0 (invalid),
3466 */
3467 LLVMValueRef fmask_desc =
3468 LLVMBuildBitCast(ctx->builder, fmask_ptr,
3469 ctx->v8i32, "");
3470
3471 LLVMValueRef fmask_word1 =
3472 LLVMBuildExtractElement(ctx->builder, fmask_desc,
3473 ctx->i32one, "");
3474
3475 LLVMValueRef word1_is_nonzero =
3476 LLVMBuildICmp(ctx->builder, LLVMIntNE,
3477 fmask_word1, ctx->i32zero, "");
3478
3479 /* Replace the MSAA sample index. */
3480 address[sample_chan] =
3481 LLVMBuildSelect(ctx->builder, word1_is_nonzero,
3482 final_sample, address[sample_chan], "");
3483 }
3484
3485 if (offsets && instr->op == nir_texop_txf) {
3486 nir_const_value *const_offset =
3487 nir_src_as_const_value(instr->src[const_src].src);
3488
3489 assert(const_offset);
3490 if (instr->coord_components > 2)
3491 address[2] = LLVMBuildAdd(ctx->builder,
3492 address[2], LLVMConstInt(ctx->i32, const_offset->i32[2], false), "");
3493 if (instr->coord_components > 1)
3494 address[1] = LLVMBuildAdd(ctx->builder,
3495 address[1], LLVMConstInt(ctx->i32, const_offset->i32[1], false), "");
3496 address[0] = LLVMBuildAdd(ctx->builder,
3497 address[0], LLVMConstInt(ctx->i32, const_offset->i32[0], false), "");
3498
3499 }
3500
3501 /* TODO TG4 support */
3502 if (instr->op == nir_texop_tg4) {
3503 if (instr->is_shadow)
3504 dmask = 1;
3505 else
3506 dmask = 1 << instr->component;
3507 }
3508 set_tex_fetch_args(ctx, &tinfo, instr, instr->op,
3509 res_ptr, samp_ptr, address, count, dmask);
3510
3511 result = build_tex_intrinsic(ctx, instr, &tinfo);
3512
3513 if (instr->op == nir_texop_query_levels)
3514 result = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, 3, false), "");
3515 else if (instr->op == nir_texop_txs &&
3516 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3517 instr->is_array) {
3518 LLVMValueRef two = LLVMConstInt(ctx->i32, 2, false);
3519 LLVMValueRef six = LLVMConstInt(ctx->i32, 6, false);
3520 LLVMValueRef z = LLVMBuildExtractElement(ctx->builder, result, two, "");
3521 z = LLVMBuildSDiv(ctx->builder, z, six, "");
3522 result = LLVMBuildInsertElement(ctx->builder, result, z, two, "");
3523 }
3524
3525 write_result:
3526 if (result) {
3527 assert(instr->dest.is_ssa);
3528 result = to_integer(ctx, result);
3529 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
3530 }
3531 }
3532
3533
3534 static void visit_phi(struct nir_to_llvm_context *ctx, nir_phi_instr *instr)
3535 {
3536 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3537 LLVMValueRef result = LLVMBuildPhi(ctx->builder, type, "");
3538
3539 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
3540 _mesa_hash_table_insert(ctx->phis, instr, result);
3541 }
3542
3543 static void visit_post_phi(struct nir_to_llvm_context *ctx,
3544 nir_phi_instr *instr,
3545 LLVMValueRef llvm_phi)
3546 {
3547 nir_foreach_phi_src(src, instr) {
3548 LLVMBasicBlockRef block = get_block(ctx, src->pred);
3549 LLVMValueRef llvm_src = get_src(ctx, src->src);
3550
3551 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
3552 }
3553 }
3554
3555 static void phi_post_pass(struct nir_to_llvm_context *ctx)
3556 {
3557 struct hash_entry *entry;
3558 hash_table_foreach(ctx->phis, entry) {
3559 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
3560 (LLVMValueRef)entry->data);
3561 }
3562 }
3563
3564
3565 static void visit_ssa_undef(struct nir_to_llvm_context *ctx,
3566 nir_ssa_undef_instr *instr)
3567 {
3568 unsigned num_components = instr->def.num_components;
3569 LLVMValueRef undef;
3570
3571 if (num_components == 1)
3572 undef = LLVMGetUndef(ctx->i32);
3573 else {
3574 undef = LLVMGetUndef(LLVMVectorType(ctx->i32, num_components));
3575 }
3576 _mesa_hash_table_insert(ctx->defs, &instr->def, undef);
3577 }
3578
3579 static void visit_jump(struct nir_to_llvm_context *ctx,
3580 nir_jump_instr *instr)
3581 {
3582 switch (instr->type) {
3583 case nir_jump_break:
3584 LLVMBuildBr(ctx->builder, ctx->break_block);
3585 LLVMClearInsertionPosition(ctx->builder);
3586 break;
3587 case nir_jump_continue:
3588 LLVMBuildBr(ctx->builder, ctx->continue_block);
3589 LLVMClearInsertionPosition(ctx->builder);
3590 break;
3591 default:
3592 fprintf(stderr, "Unknown NIR jump instr: ");
3593 nir_print_instr(&instr->instr, stderr);
3594 fprintf(stderr, "\n");
3595 abort();
3596 }
3597 }
3598
3599 static void visit_cf_list(struct nir_to_llvm_context *ctx,
3600 struct exec_list *list);
3601
3602 static void visit_block(struct nir_to_llvm_context *ctx, nir_block *block)
3603 {
3604 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->builder);
3605 nir_foreach_instr(instr, block)
3606 {
3607 switch (instr->type) {
3608 case nir_instr_type_alu:
3609 visit_alu(ctx, nir_instr_as_alu(instr));
3610 break;
3611 case nir_instr_type_load_const:
3612 visit_load_const(ctx, nir_instr_as_load_const(instr));
3613 break;
3614 case nir_instr_type_intrinsic:
3615 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
3616 break;
3617 case nir_instr_type_tex:
3618 visit_tex(ctx, nir_instr_as_tex(instr));
3619 break;
3620 case nir_instr_type_phi:
3621 visit_phi(ctx, nir_instr_as_phi(instr));
3622 break;
3623 case nir_instr_type_ssa_undef:
3624 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
3625 break;
3626 case nir_instr_type_jump:
3627 visit_jump(ctx, nir_instr_as_jump(instr));
3628 break;
3629 default:
3630 fprintf(stderr, "Unknown NIR instr type: ");
3631 nir_print_instr(instr, stderr);
3632 fprintf(stderr, "\n");
3633 abort();
3634 }
3635 }
3636
3637 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
3638 }
3639
3640 static void visit_if(struct nir_to_llvm_context *ctx, nir_if *if_stmt)
3641 {
3642 LLVMValueRef value = get_src(ctx, if_stmt->condition);
3643
3644 LLVMBasicBlockRef merge_block =
3645 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3646 LLVMBasicBlockRef if_block =
3647 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3648 LLVMBasicBlockRef else_block = merge_block;
3649 if (!exec_list_is_empty(&if_stmt->else_list))
3650 else_block = LLVMAppendBasicBlockInContext(
3651 ctx->context, ctx->main_function, "");
3652
3653 LLVMValueRef cond = LLVMBuildICmp(ctx->builder, LLVMIntNE, value,
3654 LLVMConstInt(ctx->i32, 0, false), "");
3655 LLVMBuildCondBr(ctx->builder, cond, if_block, else_block);
3656
3657 LLVMPositionBuilderAtEnd(ctx->builder, if_block);
3658 visit_cf_list(ctx, &if_stmt->then_list);
3659 if (LLVMGetInsertBlock(ctx->builder))
3660 LLVMBuildBr(ctx->builder, merge_block);
3661
3662 if (!exec_list_is_empty(&if_stmt->else_list)) {
3663 LLVMPositionBuilderAtEnd(ctx->builder, else_block);
3664 visit_cf_list(ctx, &if_stmt->else_list);
3665 if (LLVMGetInsertBlock(ctx->builder))
3666 LLVMBuildBr(ctx->builder, merge_block);
3667 }
3668
3669 LLVMPositionBuilderAtEnd(ctx->builder, merge_block);
3670 }
3671
3672 static void visit_loop(struct nir_to_llvm_context *ctx, nir_loop *loop)
3673 {
3674 LLVMBasicBlockRef continue_parent = ctx->continue_block;
3675 LLVMBasicBlockRef break_parent = ctx->break_block;
3676
3677 ctx->continue_block =
3678 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3679 ctx->break_block =
3680 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3681
3682 LLVMBuildBr(ctx->builder, ctx->continue_block);
3683 LLVMPositionBuilderAtEnd(ctx->builder, ctx->continue_block);
3684 visit_cf_list(ctx, &loop->body);
3685
3686 if (LLVMGetInsertBlock(ctx->builder))
3687 LLVMBuildBr(ctx->builder, ctx->continue_block);
3688 LLVMPositionBuilderAtEnd(ctx->builder, ctx->break_block);
3689
3690 ctx->continue_block = continue_parent;
3691 ctx->break_block = break_parent;
3692 }
3693
3694 static void visit_cf_list(struct nir_to_llvm_context *ctx,
3695 struct exec_list *list)
3696 {
3697 foreach_list_typed(nir_cf_node, node, node, list)
3698 {
3699 switch (node->type) {
3700 case nir_cf_node_block:
3701 visit_block(ctx, nir_cf_node_as_block(node));
3702 break;
3703
3704 case nir_cf_node_if:
3705 visit_if(ctx, nir_cf_node_as_if(node));
3706 break;
3707
3708 case nir_cf_node_loop:
3709 visit_loop(ctx, nir_cf_node_as_loop(node));
3710 break;
3711
3712 default:
3713 assert(0);
3714 }
3715 }
3716 }
3717
3718 static void
3719 handle_vs_input_decl(struct nir_to_llvm_context *ctx,
3720 struct nir_variable *variable)
3721 {
3722 LLVMValueRef t_list_ptr = ctx->vertex_buffers;
3723 LLVMValueRef t_offset;
3724 LLVMValueRef t_list;
3725 LLVMValueRef args[3];
3726 LLVMValueRef input;
3727 LLVMValueRef buffer_index;
3728 int index = variable->data.location - VERT_ATTRIB_GENERIC0;
3729 int idx = variable->data.location;
3730 unsigned attrib_count = glsl_count_attribute_slots(variable->type, true);
3731
3732 variable->data.driver_location = idx * 4;
3733
3734 if (ctx->options->key.vs.instance_rate_inputs & (1u << index)) {
3735 buffer_index = LLVMBuildAdd(ctx->builder, ctx->instance_id,
3736 ctx->start_instance, "");
3737 ctx->shader_info->vs.vgpr_comp_cnt = MAX2(3,
3738 ctx->shader_info->vs.vgpr_comp_cnt);
3739 } else
3740 buffer_index = LLVMBuildAdd(ctx->builder, ctx->vertex_id,
3741 ctx->base_vertex, "");
3742
3743 for (unsigned i = 0; i < attrib_count; ++i, ++idx) {
3744 t_offset = LLVMConstInt(ctx->i32, index + i, false);
3745
3746 t_list = build_indexed_load_const(ctx, t_list_ptr, t_offset);
3747 args[0] = t_list;
3748 args[1] = LLVMConstInt(ctx->i32, 0, false);
3749 args[2] = buffer_index;
3750 input = emit_llvm_intrinsic(ctx,
3751 "llvm.SI.vs.load.input", ctx->v4f32, args, 3,
3752 LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
3753
3754 for (unsigned chan = 0; chan < 4; chan++) {
3755 LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
3756 ctx->inputs[radeon_llvm_reg_index_soa(idx, chan)] =
3757 to_integer(ctx, LLVMBuildExtractElement(ctx->builder,
3758 input, llvm_chan, ""));
3759 }
3760 }
3761 }
3762
3763
3764 static void interp_fs_input(struct nir_to_llvm_context *ctx,
3765 unsigned attr,
3766 LLVMValueRef interp_param,
3767 LLVMValueRef prim_mask,
3768 LLVMValueRef result[4])
3769 {
3770 const char *intr_name;
3771 LLVMValueRef attr_number;
3772 unsigned chan;
3773
3774 attr_number = LLVMConstInt(ctx->i32, attr, false);
3775
3776 /* fs.constant returns the param from the middle vertex, so it's not
3777 * really useful for flat shading. It's meant to be used for custom
3778 * interpolation (but the intrinsic can't fetch from the other two
3779 * vertices).
3780 *
3781 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
3782 * to do the right thing. The only reason we use fs.constant is that
3783 * fs.interp cannot be used on integers, because they can be equal
3784 * to NaN.
3785 */
3786 intr_name = interp_param ? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
3787
3788 for (chan = 0; chan < 4; chan++) {
3789 LLVMValueRef args[4];
3790 LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
3791
3792 args[0] = llvm_chan;
3793 args[1] = attr_number;
3794 args[2] = prim_mask;
3795 args[3] = interp_param;
3796 result[chan] = emit_llvm_intrinsic(ctx, intr_name,
3797 ctx->f32, args, args[3] ? 4 : 3,
3798 LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
3799 }
3800 }
3801
3802 static void
3803 handle_fs_input_decl(struct nir_to_llvm_context *ctx,
3804 struct nir_variable *variable)
3805 {
3806 int idx = variable->data.location;
3807 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3808 LLVMValueRef interp;
3809
3810 variable->data.driver_location = idx * 4;
3811 ctx->input_mask |= ((1ull << attrib_count) - 1) << variable->data.location;
3812
3813 if (glsl_get_base_type(glsl_without_array(variable->type)) == GLSL_TYPE_FLOAT)
3814 interp = lookup_interp_param(ctx, variable->data.interpolation, INTERP_CENTER);
3815 else
3816 interp = NULL;
3817
3818 for (unsigned i = 0; i < attrib_count; ++i)
3819 ctx->inputs[radeon_llvm_reg_index_soa(idx + i, 0)] = interp;
3820
3821 }
3822
3823 static void
3824 handle_shader_input_decl(struct nir_to_llvm_context *ctx,
3825 struct nir_variable *variable)
3826 {
3827 switch (ctx->stage) {
3828 case MESA_SHADER_VERTEX:
3829 handle_vs_input_decl(ctx, variable);
3830 break;
3831 case MESA_SHADER_FRAGMENT:
3832 handle_fs_input_decl(ctx, variable);
3833 break;
3834 default:
3835 break;
3836 }
3837
3838 }
3839
3840 static void
3841 handle_fs_inputs_pre(struct nir_to_llvm_context *ctx,
3842 struct nir_shader *nir)
3843 {
3844 unsigned index = 0;
3845 for (unsigned i = 0; i < RADEON_LLVM_MAX_INPUTS; ++i) {
3846 LLVMValueRef interp_param;
3847 LLVMValueRef *inputs = ctx->inputs +radeon_llvm_reg_index_soa(i, 0);
3848
3849 if (!(ctx->input_mask & (1ull << i)))
3850 continue;
3851
3852 if (i >= VARYING_SLOT_VAR0 || i == VARYING_SLOT_PNTC) {
3853 interp_param = *inputs;
3854 interp_fs_input(ctx, index, interp_param, ctx->prim_mask,
3855 inputs);
3856
3857 if (!interp_param)
3858 ctx->shader_info->fs.flat_shaded_mask |= 1u << index;
3859 ++index;
3860 } else if (i == VARYING_SLOT_POS) {
3861 for(int i = 0; i < 3; ++i)
3862 inputs[i] = ctx->frag_pos[i];
3863
3864 inputs[3] = emit_fdiv(ctx, ctx->f32one, ctx->frag_pos[3]);
3865 }
3866 }
3867 ctx->shader_info->fs.num_interp = index;
3868 if (ctx->input_mask & (1 << VARYING_SLOT_PNTC))
3869 ctx->shader_info->fs.has_pcoord = true;
3870 ctx->shader_info->fs.input_mask = ctx->input_mask >> VARYING_SLOT_VAR0;
3871 }
3872
3873 static LLVMValueRef
3874 ac_build_alloca(struct nir_to_llvm_context *ctx,
3875 LLVMTypeRef type,
3876 const char *name)
3877 {
3878 LLVMBuilderRef builder = ctx->builder;
3879 LLVMBasicBlockRef current_block = LLVMGetInsertBlock(builder);
3880 LLVMValueRef function = LLVMGetBasicBlockParent(current_block);
3881 LLVMBasicBlockRef first_block = LLVMGetEntryBasicBlock(function);
3882 LLVMValueRef first_instr = LLVMGetFirstInstruction(first_block);
3883 LLVMBuilderRef first_builder = LLVMCreateBuilderInContext(ctx->context);
3884 LLVMValueRef res;
3885
3886 if (first_instr) {
3887 LLVMPositionBuilderBefore(first_builder, first_instr);
3888 } else {
3889 LLVMPositionBuilderAtEnd(first_builder, first_block);
3890 }
3891
3892 res = LLVMBuildAlloca(first_builder, type, name);
3893 LLVMBuildStore(builder, LLVMConstNull(type), res);
3894
3895 LLVMDisposeBuilder(first_builder);
3896
3897 return res;
3898 }
3899
3900 static LLVMValueRef si_build_alloca_undef(struct nir_to_llvm_context *ctx,
3901 LLVMTypeRef type,
3902 const char *name)
3903 {
3904 LLVMValueRef ptr = ac_build_alloca(ctx, type, name);
3905 LLVMBuildStore(ctx->builder, LLVMGetUndef(type), ptr);
3906 return ptr;
3907 }
3908
3909 static void
3910 handle_shader_output_decl(struct nir_to_llvm_context *ctx,
3911 struct nir_variable *variable)
3912 {
3913 int idx = variable->data.location;
3914 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3915
3916 variable->data.driver_location = idx * 4;
3917
3918 if (ctx->stage == MESA_SHADER_VERTEX) {
3919
3920 if (idx == VARYING_SLOT_CLIP_DIST0 ||
3921 idx == VARYING_SLOT_CULL_DIST0) {
3922 int length = glsl_get_length(variable->type);
3923 if (idx == VARYING_SLOT_CLIP_DIST0) {
3924 ctx->shader_info->vs.clip_dist_mask = (1 << length) - 1;
3925 ctx->num_clips = length;
3926 } else if (idx == VARYING_SLOT_CULL_DIST0) {
3927 ctx->shader_info->vs.cull_dist_mask = (1 << length) - 1;
3928 ctx->num_culls = length;
3929 }
3930 if (length > 4)
3931 attrib_count = 2;
3932 else
3933 attrib_count = 1;
3934 }
3935 }
3936
3937 for (unsigned i = 0; i < attrib_count; ++i) {
3938 for (unsigned chan = 0; chan < 4; chan++) {
3939 ctx->outputs[radeon_llvm_reg_index_soa(idx + i, chan)] =
3940 si_build_alloca_undef(ctx, ctx->f32, "");
3941 }
3942 }
3943 ctx->output_mask |= ((1ull << attrib_count) - 1) << variable->data.location;
3944 }
3945
3946 static void
3947 setup_locals(struct nir_to_llvm_context *ctx,
3948 struct nir_function *func)
3949 {
3950 int i, j;
3951 ctx->num_locals = 0;
3952 nir_foreach_variable(variable, &func->impl->locals) {
3953 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3954 variable->data.driver_location = ctx->num_locals * 4;
3955 ctx->num_locals += attrib_count;
3956 }
3957 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
3958 if (!ctx->locals)
3959 return;
3960
3961 for (i = 0; i < ctx->num_locals; i++) {
3962 for (j = 0; j < 4; j++) {
3963 ctx->locals[i * 4 + j] =
3964 si_build_alloca_undef(ctx, ctx->f32, "temp");
3965 }
3966 }
3967 }
3968
3969 static LLVMValueRef
3970 emit_float_saturate(struct nir_to_llvm_context *ctx, LLVMValueRef v, float lo, float hi)
3971 {
3972 v = to_float(ctx, v);
3973 v = emit_intrin_2f_param(ctx, "llvm.maxnum.f32", v, LLVMConstReal(ctx->f32, lo));
3974 return emit_intrin_2f_param(ctx, "llvm.minnum.f32", v, LLVMConstReal(ctx->f32, hi));
3975 }
3976
3977
3978 static LLVMValueRef emit_pack_int16(struct nir_to_llvm_context *ctx,
3979 LLVMValueRef src0, LLVMValueRef src1)
3980 {
3981 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
3982 LLVMValueRef comp[2];
3983
3984 comp[0] = LLVMBuildAnd(ctx->builder, src0, LLVMConstInt(ctx-> i32, 65535, 0), "");
3985 comp[1] = LLVMBuildAnd(ctx->builder, src1, LLVMConstInt(ctx-> i32, 65535, 0), "");
3986 comp[1] = LLVMBuildShl(ctx->builder, comp[1], const16, "");
3987 return LLVMBuildOr(ctx->builder, comp[0], comp[1], "");
3988 }
3989
3990 /* Initialize arguments for the shader export intrinsic */
3991 static void
3992 si_llvm_init_export_args(struct nir_to_llvm_context *ctx,
3993 LLVMValueRef *values,
3994 unsigned target,
3995 LLVMValueRef *args)
3996 {
3997 /* Default is 0xf. Adjusted below depending on the format. */
3998 args[0] = LLVMConstInt(ctx->i32, target != V_008DFC_SQ_EXP_NULL ? 0xf : 0, false);
3999 /* Specify whether the EXEC mask represents the valid mask */
4000 args[1] = LLVMConstInt(ctx->i32, 0, false);
4001
4002 /* Specify whether this is the last export */
4003 args[2] = LLVMConstInt(ctx->i32, 0, false);
4004 /* Specify the target we are exporting */
4005 args[3] = LLVMConstInt(ctx->i32, target, false);
4006
4007 args[4] = LLVMConstInt(ctx->i32, 0, false); /* COMPR flag */
4008 args[5] = LLVMGetUndef(ctx->f32);
4009 args[6] = LLVMGetUndef(ctx->f32);
4010 args[7] = LLVMGetUndef(ctx->f32);
4011 args[8] = LLVMGetUndef(ctx->f32);
4012
4013 if (!values)
4014 return;
4015
4016 if (ctx->stage == MESA_SHADER_FRAGMENT && target >= V_008DFC_SQ_EXP_MRT) {
4017 LLVMValueRef val[4];
4018 unsigned index = target - V_008DFC_SQ_EXP_MRT;
4019 unsigned col_format = (ctx->options->key.fs.col_format >> (4 * index)) & 0xf;
4020 bool is_int8 = (ctx->options->key.fs.is_int8 >> index) & 1;
4021
4022 switch(col_format) {
4023 case V_028714_SPI_SHADER_ZERO:
4024 args[0] = LLVMConstInt(ctx->i32, 0x0, 0);
4025 args[3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_NULL, 0);
4026 break;
4027
4028 case V_028714_SPI_SHADER_32_R:
4029 args[0] = LLVMConstInt(ctx->i32, 0x1, 0);
4030 args[5] = values[0];
4031 break;
4032
4033 case V_028714_SPI_SHADER_32_GR:
4034 args[0] = LLVMConstInt(ctx->i32, 0x3, 0);
4035 args[5] = values[0];
4036 args[6] = values[1];
4037 break;
4038
4039 case V_028714_SPI_SHADER_32_AR:
4040 args[0] = LLVMConstInt(ctx->i32, 0x9, 0);
4041 args[5] = values[0];
4042 args[8] = values[3];
4043 break;
4044
4045 case V_028714_SPI_SHADER_FP16_ABGR:
4046 args[4] = ctx->i32one;
4047
4048 for (unsigned chan = 0; chan < 2; chan++) {
4049 LLVMValueRef pack_args[2] = {
4050 values[2 * chan],
4051 values[2 * chan + 1]
4052 };
4053 LLVMValueRef packed;
4054
4055 packed = emit_llvm_intrinsic(ctx, "llvm.SI.packf16",
4056 ctx->i32, pack_args, 2,
4057 LLVMReadNoneAttribute);
4058 args[chan + 5] = packed;
4059 }
4060 break;
4061
4062 case V_028714_SPI_SHADER_UNORM16_ABGR:
4063 for (unsigned chan = 0; chan < 4; chan++) {
4064 val[chan] = emit_float_saturate(ctx, values[chan], 0, 1);
4065 val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
4066 LLVMConstReal(ctx->f32, 65535), "");
4067 val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
4068 LLVMConstReal(ctx->f32, 0.5), "");
4069 val[chan] = LLVMBuildFPToUI(ctx->builder, val[chan],
4070 ctx->i32, "");
4071 }
4072
4073 args[4] = ctx->i32one;
4074 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4075 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4076 break;
4077
4078 case V_028714_SPI_SHADER_SNORM16_ABGR:
4079 for (unsigned chan = 0; chan < 4; chan++) {
4080 val[chan] = emit_float_saturate(ctx, values[chan], -1, 1);
4081 val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
4082 LLVMConstReal(ctx->f32, 32767), "");
4083
4084 /* If positive, add 0.5, else add -0.5. */
4085 val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
4086 LLVMBuildSelect(ctx->builder,
4087 LLVMBuildFCmp(ctx->builder, LLVMRealOGE,
4088 val[chan], ctx->f32zero, ""),
4089 LLVMConstReal(ctx->f32, 0.5),
4090 LLVMConstReal(ctx->f32, -0.5), ""), "");
4091 val[chan] = LLVMBuildFPToSI(ctx->builder, val[chan], ctx->i32, "");
4092 }
4093
4094 args[4] = ctx->i32one;
4095 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4096 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4097 break;
4098
4099 case V_028714_SPI_SHADER_UINT16_ABGR: {
4100 LLVMValueRef max = LLVMConstInt(ctx->i32, is_int8 ? 255 : 65535, 0);
4101
4102 for (unsigned chan = 0; chan < 4; chan++) {
4103 val[chan] = to_integer(ctx, values[chan]);
4104 val[chan] = emit_minmax_int(ctx, LLVMIntULT, val[chan], max);
4105 }
4106
4107 args[4] = ctx->i32one;
4108 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4109 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4110 break;
4111 }
4112
4113 case V_028714_SPI_SHADER_SINT16_ABGR: {
4114 LLVMValueRef max = LLVMConstInt(ctx->i32, is_int8 ? 127 : 32767, 0);
4115 LLVMValueRef min = LLVMConstInt(ctx->i32, is_int8 ? -128 : -32768, 0);
4116
4117 /* Clamp. */
4118 for (unsigned chan = 0; chan < 4; chan++) {
4119 val[chan] = to_integer(ctx, values[chan]);
4120 val[chan] = emit_minmax_int(ctx, LLVMIntSLT, val[chan], max);
4121 val[chan] = emit_minmax_int(ctx, LLVMIntSGT, val[chan], min);
4122 }
4123
4124 args[4] = ctx->i32one;
4125 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4126 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4127 break;
4128 }
4129
4130 default:
4131 case V_028714_SPI_SHADER_32_ABGR:
4132 memcpy(&args[5], values, sizeof(values[0]) * 4);
4133 break;
4134 }
4135 } else
4136 memcpy(&args[5], values, sizeof(values[0]) * 4);
4137
4138 for (unsigned i = 5; i < 9; ++i)
4139 args[i] = to_float(ctx, args[i]);
4140 }
4141
4142 static void
4143 handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
4144 struct nir_shader *nir)
4145 {
4146 uint32_t param_count = 0;
4147 unsigned target;
4148 unsigned pos_idx, num_pos_exports = 0;
4149 LLVMValueRef args[9];
4150 LLVMValueRef pos_args[4][9] = { { 0 } };
4151 LLVMValueRef psize_value = 0;
4152 int i;
4153 const uint64_t clip_mask = ctx->output_mask & ((1ull << VARYING_SLOT_CLIP_DIST0) |
4154 (1ull << VARYING_SLOT_CLIP_DIST1) |
4155 (1ull << VARYING_SLOT_CULL_DIST0) |
4156 (1ull << VARYING_SLOT_CULL_DIST1));
4157
4158 if (clip_mask) {
4159 LLVMValueRef slots[8];
4160 unsigned j;
4161
4162 if (ctx->shader_info->vs.cull_dist_mask)
4163 ctx->shader_info->vs.cull_dist_mask <<= ctx->num_clips;
4164
4165 i = VARYING_SLOT_CLIP_DIST0;
4166 for (j = 0; j < ctx->num_clips; j++)
4167 slots[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4168 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4169 i = VARYING_SLOT_CULL_DIST0;
4170 for (j = 0; j < ctx->num_culls; j++)
4171 slots[ctx->num_clips + j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4172 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4173
4174 for (i = ctx->num_clips + ctx->num_culls; i < 8; i++)
4175 slots[i] = LLVMGetUndef(ctx->f32);
4176
4177 if (ctx->num_clips + ctx->num_culls > 4) {
4178 target = V_008DFC_SQ_EXP_POS + 3;
4179 si_llvm_init_export_args(ctx, &slots[4], target, args);
4180 memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
4181 args, sizeof(args));
4182 }
4183
4184 target = V_008DFC_SQ_EXP_POS + 2;
4185 si_llvm_init_export_args(ctx, &slots[0], target, args);
4186 memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
4187 args, sizeof(args));
4188
4189 }
4190
4191 for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
4192 LLVMValueRef values[4];
4193 if (!(ctx->output_mask & (1ull << i)))
4194 continue;
4195
4196 for (unsigned j = 0; j < 4; j++)
4197 values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4198 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4199
4200 if (i == VARYING_SLOT_POS) {
4201 target = V_008DFC_SQ_EXP_POS;
4202 } else if (i == VARYING_SLOT_CLIP_DIST0 ||
4203 i == VARYING_SLOT_CLIP_DIST1 ||
4204 i == VARYING_SLOT_CULL_DIST0 ||
4205 i == VARYING_SLOT_CULL_DIST1) {
4206 continue;
4207 } else if (i == VARYING_SLOT_PSIZ) {
4208 ctx->shader_info->vs.writes_pointsize = true;
4209 psize_value = values[0];
4210 continue;
4211 } else if (i >= VARYING_SLOT_VAR0) {
4212 ctx->shader_info->vs.export_mask |= 1u << (i - VARYING_SLOT_VAR0);
4213 target = V_008DFC_SQ_EXP_PARAM + param_count;
4214 param_count++;
4215 }
4216
4217 si_llvm_init_export_args(ctx, values, target, args);
4218
4219 if (target >= V_008DFC_SQ_EXP_POS &&
4220 target <= (V_008DFC_SQ_EXP_POS + 3)) {
4221 memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
4222 args, sizeof(args));
4223 } else {
4224 emit_llvm_intrinsic(ctx,
4225 "llvm.SI.export",
4226 LLVMVoidTypeInContext(ctx->context),
4227 args, 9, 0);
4228 }
4229 }
4230
4231 /* We need to add the position output manually if it's missing. */
4232 if (!pos_args[0][0]) {
4233 pos_args[0][0] = LLVMConstInt(ctx->i32, 0xf, false);
4234 pos_args[0][1] = ctx->i32zero; /* EXEC mask */
4235 pos_args[0][2] = ctx->i32zero; /* last export? */
4236 pos_args[0][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS, false);
4237 pos_args[0][4] = ctx->i32zero; /* COMPR flag */
4238 pos_args[0][5] = ctx->f32zero; /* X */
4239 pos_args[0][6] = ctx->f32zero; /* Y */
4240 pos_args[0][7] = ctx->f32zero; /* Z */
4241 pos_args[0][8] = ctx->f32one; /* W */
4242 }
4243
4244 if (ctx->shader_info->vs.writes_pointsize == true) {
4245 pos_args[1][0] = LLVMConstInt(ctx->i32, (ctx->shader_info->vs.writes_pointsize == true), false); /* writemask */
4246 pos_args[1][1] = ctx->i32zero; /* EXEC mask */
4247 pos_args[1][2] = ctx->i32zero; /* last export? */
4248 pos_args[1][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS + 1, false);
4249 pos_args[1][4] = ctx->i32zero; /* COMPR flag */
4250 pos_args[1][5] = ctx->f32zero; /* X */
4251 pos_args[1][6] = ctx->f32zero; /* Y */
4252 pos_args[1][7] = ctx->f32zero; /* Z */
4253 pos_args[1][8] = ctx->f32zero; /* W */
4254
4255 if (ctx->shader_info->vs.writes_pointsize == true)
4256 pos_args[1][5] = psize_value;
4257 }
4258 for (i = 0; i < 4; i++) {
4259 if (pos_args[i][0])
4260 num_pos_exports++;
4261 }
4262
4263 pos_idx = 0;
4264 for (i = 0; i < 4; i++) {
4265 if (!pos_args[i][0])
4266 continue;
4267
4268 /* Specify the target we are exporting */
4269 pos_args[i][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS + pos_idx++, false);
4270 if (pos_idx == num_pos_exports)
4271 pos_args[i][2] = ctx->i32one;
4272 emit_llvm_intrinsic(ctx,
4273 "llvm.SI.export",
4274 LLVMVoidTypeInContext(ctx->context),
4275 pos_args[i], 9, 0);
4276 }
4277
4278 ctx->shader_info->vs.pos_exports = num_pos_exports;
4279 ctx->shader_info->vs.param_exports = param_count;
4280 }
4281
4282 static void
4283 si_export_mrt_color(struct nir_to_llvm_context *ctx,
4284 LLVMValueRef *color, unsigned param, bool is_last)
4285 {
4286 LLVMValueRef args[9];
4287 /* Export */
4288 si_llvm_init_export_args(ctx, color, param,
4289 args);
4290
4291 if (is_last) {
4292 args[1] = ctx->i32one; /* whether the EXEC mask is valid */
4293 args[2] = ctx->i32one; /* DONE bit */
4294 } else if (args[0] == ctx->i32zero)
4295 return; /* unnecessary NULL export */
4296
4297 emit_llvm_intrinsic(ctx, "llvm.SI.export",
4298 ctx->voidt, args, 9, 0);
4299 }
4300
4301 static void
4302 si_export_mrt_z(struct nir_to_llvm_context *ctx,
4303 LLVMValueRef depth, LLVMValueRef stencil,
4304 LLVMValueRef samplemask)
4305 {
4306 LLVMValueRef args[9];
4307 unsigned mask = 0;
4308 args[1] = ctx->i32one; /* whether the EXEC mask is valid */
4309 args[2] = ctx->i32one; /* DONE bit */
4310 /* Specify the target we are exporting */
4311 args[3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_MRTZ, false);
4312
4313 args[4] = ctx->i32zero; /* COMP flag */
4314 args[5] = LLVMGetUndef(ctx->f32); /* R, depth */
4315 args[6] = LLVMGetUndef(ctx->f32); /* G, stencil test val[0:7], stencil op val[8:15] */
4316 args[7] = LLVMGetUndef(ctx->f32); /* B, sample mask */
4317 args[8] = LLVMGetUndef(ctx->f32); /* A, alpha to mask */
4318
4319 if (depth) {
4320 args[5] = depth;
4321 mask |= 0x1;
4322 }
4323
4324 if (stencil) {
4325 args[6] = stencil;
4326 mask |= 0x2;
4327 }
4328
4329 if (samplemask) {
4330 args[7] = samplemask;
4331 mask |= 0x04;
4332 }
4333
4334 /* SI (except OLAND) has a bug that it only looks
4335 * at the X writemask component. */
4336 if (ctx->options->chip_class == SI &&
4337 ctx->options->family != CHIP_OLAND)
4338 mask |= 0x01;
4339
4340 args[0] = LLVMConstInt(ctx->i32, mask, false);
4341 emit_llvm_intrinsic(ctx, "llvm.SI.export",
4342 ctx->voidt, args, 9, 0);
4343 }
4344
4345 static void
4346 handle_fs_outputs_post(struct nir_to_llvm_context *ctx,
4347 struct nir_shader *nir)
4348 {
4349 unsigned index = 0;
4350 LLVMValueRef depth = NULL, stencil = NULL, samplemask = NULL;
4351
4352 for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
4353 LLVMValueRef values[4];
4354 bool last;
4355 if (!(ctx->output_mask & (1ull << i)))
4356 continue;
4357
4358 last = ctx->output_mask <= ((1ull << (i + 1)) - 1);
4359
4360 if (i == FRAG_RESULT_DEPTH) {
4361 ctx->shader_info->fs.writes_z = true;
4362 depth = to_float(ctx, LLVMBuildLoad(ctx->builder,
4363 ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
4364 } else if (i == FRAG_RESULT_STENCIL) {
4365 ctx->shader_info->fs.writes_stencil = true;
4366 stencil = to_float(ctx, LLVMBuildLoad(ctx->builder,
4367 ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
4368 } else {
4369 for (unsigned j = 0; j < 4; j++)
4370 values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4371 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4372
4373 si_export_mrt_color(ctx, values, V_008DFC_SQ_EXP_MRT + index, last);
4374 index++;
4375 }
4376 }
4377
4378 if (depth || stencil)
4379 si_export_mrt_z(ctx, depth, stencil, samplemask);
4380 else if (!index)
4381 si_export_mrt_color(ctx, NULL, V_008DFC_SQ_EXP_NULL, true);
4382
4383 ctx->shader_info->fs.output_mask = index ? ((1ull << index) - 1) : 0;
4384 }
4385
4386 static void
4387 handle_shader_outputs_post(struct nir_to_llvm_context *ctx,
4388 struct nir_shader *nir)
4389 {
4390 switch (ctx->stage) {
4391 case MESA_SHADER_VERTEX:
4392 handle_vs_outputs_post(ctx, nir);
4393 break;
4394 case MESA_SHADER_FRAGMENT:
4395 handle_fs_outputs_post(ctx, nir);
4396 break;
4397 default:
4398 break;
4399 }
4400 }
4401
4402 static void
4403 handle_shared_compute_var(struct nir_to_llvm_context *ctx,
4404 struct nir_variable *variable, uint32_t *offset, int idx)
4405 {
4406 unsigned size = glsl_count_attribute_slots(variable->type, false);
4407 variable->data.driver_location = *offset;
4408 *offset += size;
4409 }
4410
4411 static void ac_llvm_finalize_module(struct nir_to_llvm_context * ctx)
4412 {
4413 LLVMPassManagerRef passmgr;
4414 /* Create the pass manager */
4415 passmgr = LLVMCreateFunctionPassManagerForModule(
4416 ctx->module);
4417
4418 /* This pass should eliminate all the load and store instructions */
4419 LLVMAddPromoteMemoryToRegisterPass(passmgr);
4420
4421 /* Add some optimization passes */
4422 LLVMAddScalarReplAggregatesPass(passmgr);
4423 LLVMAddLICMPass(passmgr);
4424 LLVMAddAggressiveDCEPass(passmgr);
4425 LLVMAddCFGSimplificationPass(passmgr);
4426 LLVMAddInstructionCombiningPass(passmgr);
4427
4428 /* Run the pass */
4429 LLVMInitializeFunctionPassManager(passmgr);
4430 LLVMRunFunctionPassManager(passmgr, ctx->main_function);
4431 LLVMFinalizeFunctionPassManager(passmgr);
4432
4433 LLVMDisposeBuilder(ctx->builder);
4434 LLVMDisposePassManager(passmgr);
4435 }
4436
4437 static
4438 LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
4439 struct nir_shader *nir,
4440 struct ac_shader_variant_info *shader_info,
4441 const struct ac_nir_compiler_options *options)
4442 {
4443 struct nir_to_llvm_context ctx = {0};
4444 struct nir_function *func;
4445 ctx.options = options;
4446 ctx.shader_info = shader_info;
4447 ctx.context = LLVMContextCreate();
4448 ctx.module = LLVMModuleCreateWithNameInContext("shader", ctx.context);
4449
4450 memset(shader_info, 0, sizeof(*shader_info));
4451
4452 LLVMSetTarget(ctx.module, "amdgcn--");
4453 setup_types(&ctx);
4454
4455 ctx.builder = LLVMCreateBuilderInContext(ctx.context);
4456 ctx.stage = nir->stage;
4457
4458 create_function(&ctx, nir);
4459
4460 if (nir->stage == MESA_SHADER_COMPUTE) {
4461 int num_shared = 0;
4462 nir_foreach_variable(variable, &nir->shared)
4463 num_shared++;
4464 if (num_shared) {
4465 int idx = 0;
4466 uint32_t shared_size = 0;
4467 LLVMValueRef var;
4468 LLVMTypeRef i8p = LLVMPointerType(ctx.i8, LOCAL_ADDR_SPACE);
4469 nir_foreach_variable(variable, &nir->shared) {
4470 handle_shared_compute_var(&ctx, variable, &shared_size, idx);
4471 idx++;
4472 }
4473
4474 shared_size *= 4;
4475 var = LLVMAddGlobalInAddressSpace(ctx.module,
4476 LLVMArrayType(ctx.i8, shared_size),
4477 "compute_lds",
4478 LOCAL_ADDR_SPACE);
4479 LLVMSetAlignment(var, 4);
4480 ctx.shared_memory = LLVMBuildBitCast(ctx.builder, var, i8p, "");
4481 }
4482 }
4483
4484 nir_foreach_variable(variable, &nir->inputs)
4485 handle_shader_input_decl(&ctx, variable);
4486
4487 if (nir->stage == MESA_SHADER_FRAGMENT)
4488 handle_fs_inputs_pre(&ctx, nir);
4489
4490 nir_foreach_variable(variable, &nir->outputs)
4491 handle_shader_output_decl(&ctx, variable);
4492
4493 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4494 _mesa_key_pointer_equal);
4495 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4496 _mesa_key_pointer_equal);
4497
4498 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4499
4500 setup_locals(&ctx, func);
4501
4502 visit_cf_list(&ctx, &func->impl->body);
4503 phi_post_pass(&ctx);
4504
4505 handle_shader_outputs_post(&ctx, nir);
4506 LLVMBuildRetVoid(ctx.builder);
4507
4508 ac_llvm_finalize_module(&ctx);
4509 free(ctx.locals);
4510 ralloc_free(ctx.defs);
4511 ralloc_free(ctx.phis);
4512
4513 return ctx.module;
4514 }
4515
4516 static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di, void *context)
4517 {
4518 unsigned *retval = (unsigned *)context;
4519 LLVMDiagnosticSeverity severity = LLVMGetDiagInfoSeverity(di);
4520 char *description = LLVMGetDiagInfoDescription(di);
4521
4522 if (severity == LLVMDSError) {
4523 *retval = 1;
4524 fprintf(stderr, "LLVM triggered Diagnostic Handler: %s\n",
4525 description);
4526 }
4527
4528 LLVMDisposeMessage(description);
4529 }
4530
4531 static unsigned ac_llvm_compile(LLVMModuleRef M,
4532 struct ac_shader_binary *binary,
4533 LLVMTargetMachineRef tm)
4534 {
4535 unsigned retval = 0;
4536 char *err;
4537 LLVMContextRef llvm_ctx;
4538 LLVMMemoryBufferRef out_buffer;
4539 unsigned buffer_size;
4540 const char *buffer_data;
4541 LLVMBool mem_err;
4542
4543 /* Setup Diagnostic Handler*/
4544 llvm_ctx = LLVMGetModuleContext(M);
4545
4546 LLVMContextSetDiagnosticHandler(llvm_ctx, ac_diagnostic_handler,
4547 &retval);
4548
4549 /* Compile IR*/
4550 mem_err = LLVMTargetMachineEmitToMemoryBuffer(tm, M, LLVMObjectFile,
4551 &err, &out_buffer);
4552
4553 /* Process Errors/Warnings */
4554 if (mem_err) {
4555 fprintf(stderr, "%s: %s", __FUNCTION__, err);
4556 free(err);
4557 retval = 1;
4558 goto out;
4559 }
4560
4561 /* Extract Shader Code*/
4562 buffer_size = LLVMGetBufferSize(out_buffer);
4563 buffer_data = LLVMGetBufferStart(out_buffer);
4564
4565 ac_elf_read(buffer_data, buffer_size, binary);
4566
4567 /* Clean up */
4568 LLVMDisposeMemoryBuffer(out_buffer);
4569
4570 out:
4571 return retval;
4572 }
4573
4574 void ac_compile_nir_shader(LLVMTargetMachineRef tm,
4575 struct ac_shader_binary *binary,
4576 struct ac_shader_config *config,
4577 struct ac_shader_variant_info *shader_info,
4578 struct nir_shader *nir,
4579 const struct ac_nir_compiler_options *options,
4580 bool dump_shader)
4581 {
4582
4583 LLVMModuleRef llvm_module = ac_translate_nir_to_llvm(tm, nir, shader_info,
4584 options);
4585 if (dump_shader)
4586 LLVMDumpModule(llvm_module);
4587
4588 memset(binary, 0, sizeof(*binary));
4589 int v = ac_llvm_compile(llvm_module, binary, tm);
4590 if (v) {
4591 fprintf(stderr, "compile failed\n");
4592 }
4593
4594 if (dump_shader)
4595 fprintf(stderr, "disasm:\n%s\n", binary->disasm_string);
4596
4597 ac_shader_binary_read_config(binary, config, 0);
4598
4599 LLVMContextRef ctx = LLVMGetModuleContext(llvm_module);
4600 LLVMDisposeModule(llvm_module);
4601 LLVMContextDispose(ctx);
4602
4603 if (nir->stage == MESA_SHADER_FRAGMENT) {
4604 shader_info->num_input_vgprs = 0;
4605 if (G_0286CC_PERSP_SAMPLE_ENA(config->spi_ps_input_addr))
4606 shader_info->num_input_vgprs += 2;
4607 if (G_0286CC_PERSP_CENTER_ENA(config->spi_ps_input_addr))
4608 shader_info->num_input_vgprs += 2;
4609 if (G_0286CC_PERSP_CENTROID_ENA(config->spi_ps_input_addr))
4610 shader_info->num_input_vgprs += 2;
4611 if (G_0286CC_PERSP_PULL_MODEL_ENA(config->spi_ps_input_addr))
4612 shader_info->num_input_vgprs += 3;
4613 if (G_0286CC_LINEAR_SAMPLE_ENA(config->spi_ps_input_addr))
4614 shader_info->num_input_vgprs += 2;
4615 if (G_0286CC_LINEAR_CENTER_ENA(config->spi_ps_input_addr))
4616 shader_info->num_input_vgprs += 2;
4617 if (G_0286CC_LINEAR_CENTROID_ENA(config->spi_ps_input_addr))
4618 shader_info->num_input_vgprs += 2;
4619 if (G_0286CC_LINE_STIPPLE_TEX_ENA(config->spi_ps_input_addr))
4620 shader_info->num_input_vgprs += 1;
4621 if (G_0286CC_POS_X_FLOAT_ENA(config->spi_ps_input_addr))
4622 shader_info->num_input_vgprs += 1;
4623 if (G_0286CC_POS_Y_FLOAT_ENA(config->spi_ps_input_addr))
4624 shader_info->num_input_vgprs += 1;
4625 if (G_0286CC_POS_Z_FLOAT_ENA(config->spi_ps_input_addr))
4626 shader_info->num_input_vgprs += 1;
4627 if (G_0286CC_POS_W_FLOAT_ENA(config->spi_ps_input_addr))
4628 shader_info->num_input_vgprs += 1;
4629 if (G_0286CC_FRONT_FACE_ENA(config->spi_ps_input_addr))
4630 shader_info->num_input_vgprs += 1;
4631 if (G_0286CC_ANCILLARY_ENA(config->spi_ps_input_addr))
4632 shader_info->num_input_vgprs += 1;
4633 if (G_0286CC_SAMPLE_COVERAGE_ENA(config->spi_ps_input_addr))
4634 shader_info->num_input_vgprs += 1;
4635 if (G_0286CC_POS_FIXED_PT_ENA(config->spi_ps_input_addr))
4636 shader_info->num_input_vgprs += 1;
4637 }
4638 config->num_vgprs = MAX2(config->num_vgprs, shader_info->num_input_vgprs);
4639
4640 /* +3 for scratch wave offset and VCC */
4641 config->num_sgprs = MAX2(config->num_sgprs,
4642 shader_info->num_input_sgprs + 3);
4643 if (nir->stage == MESA_SHADER_COMPUTE) {
4644 for (int i = 0; i < 3; ++i)
4645 shader_info->cs.block_size[i] = nir->info->cs.local_size[i];
4646 }
4647
4648 if (nir->stage == MESA_SHADER_FRAGMENT)
4649 shader_info->fs.early_fragment_test = nir->info->fs.early_fragment_tests;
4650 }