projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
nir: Drop imov/fmov in favor of one mov instruction
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41
42 LLVMValueRef *ssa_defs;
43
44 struct hash_table *defs;
45 struct hash_table *phis;
46 struct hash_table *vars;
47
48 LLVMValueRef main_function;
49 LLVMBasicBlockRef continue_block;
50 LLVMBasicBlockRef break_block;
51
52 int num_locals;
53 LLVMValueRef *locals;
54 };
55
56 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
57 nir_deref_instr *deref_instr,
58 enum ac_descriptor_type desc_type,
59 const nir_instr *instr,
60 bool image, bool write);
61
62 static void
63 build_store_values_extended(struct ac_llvm_context *ac,
64 LLVMValueRef *values,
65 unsigned value_count,
66 unsigned value_stride,
67 LLVMValueRef vec)
68 {
69 LLVMBuilderRef builder = ac->builder;
70 unsigned i;
71
72 for (i = 0; i < value_count; i++) {
73 LLVMValueRef ptr = values[i * value_stride];
74 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
75 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
76 LLVMBuildStore(builder, value, ptr);
77 }
78 }
79
80 static enum ac_image_dim
81 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
82 bool is_array)
83 {
84 switch (dim) {
85 case GLSL_SAMPLER_DIM_1D:
86 if (ctx->chip_class >= GFX9)
87 return is_array ? ac_image_2darray : ac_image_2d;
88 return is_array ? ac_image_1darray : ac_image_1d;
89 case GLSL_SAMPLER_DIM_2D:
90 case GLSL_SAMPLER_DIM_RECT:
91 case GLSL_SAMPLER_DIM_EXTERNAL:
92 return is_array ? ac_image_2darray : ac_image_2d;
93 case GLSL_SAMPLER_DIM_3D:
94 return ac_image_3d;
95 case GLSL_SAMPLER_DIM_CUBE:
96 return ac_image_cube;
97 case GLSL_SAMPLER_DIM_MS:
98 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
99 case GLSL_SAMPLER_DIM_SUBPASS:
100 return ac_image_2darray;
101 case GLSL_SAMPLER_DIM_SUBPASS_MS:
102 return ac_image_2darraymsaa;
103 default:
104 unreachable("bad sampler dim");
105 }
106 }
107
108 static enum ac_image_dim
109 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
110 bool is_array)
111 {
112 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
113
114 if (dim == ac_image_cube ||
115 (ctx->chip_class <= GFX8 && dim == ac_image_3d))
116 dim = ac_image_2darray;
117
118 return dim;
119 }
120
121 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
122 const nir_ssa_def *def)
123 {
124 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
125 if (def->num_components > 1) {
126 type = LLVMVectorType(type, def->num_components);
127 }
128 return type;
129 }
130
131 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
132 {
133 assert(src.is_ssa);
134 return nir->ssa_defs[src.ssa->index];
135 }
136
137 static LLVMValueRef
138 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
139 {
140 LLVMValueRef ptr = get_src(ctx, src);
141 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
142 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
143
144 return LLVMBuildBitCast(ctx->ac.builder, ptr,
145 LLVMPointerType(ctx->ac.i32, addr_space), "");
146 }
147
148 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
149 const struct nir_block *b)
150 {
151 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
152 return (LLVMBasicBlockRef)entry->data;
153 }
154
155 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
156 nir_alu_src src,
157 unsigned num_components)
158 {
159 LLVMValueRef value = get_src(ctx, src.src);
160 bool need_swizzle = false;
161
162 assert(value);
163 unsigned src_components = ac_get_llvm_num_components(value);
164 for (unsigned i = 0; i < num_components; ++i) {
165 assert(src.swizzle[i] < src_components);
166 if (src.swizzle[i] != i)
167 need_swizzle = true;
168 }
169
170 if (need_swizzle || num_components != src_components) {
171 LLVMValueRef masks[] = {
172 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
173 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
174 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
175 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
176
177 if (src_components > 1 && num_components == 1) {
178 value = LLVMBuildExtractElement(ctx->ac.builder, value,
179 masks[0], "");
180 } else if (src_components == 1 && num_components > 1) {
181 LLVMValueRef values[] = {value, value, value, value};
182 value = ac_build_gather_values(&ctx->ac, values, num_components);
183 } else {
184 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
185 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
186 swizzle, "");
187 }
188 }
189 assert(!src.negate);
190 assert(!src.abs);
191 return value;
192 }
193
194 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
195 LLVMIntPredicate pred, LLVMValueRef src0,
196 LLVMValueRef src1)
197 {
198 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
199 return LLVMBuildSelect(ctx->builder, result,
200 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
201 ctx->i32_0, "");
202 }
203
204 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
205 LLVMRealPredicate pred, LLVMValueRef src0,
206 LLVMValueRef src1)
207 {
208 LLVMValueRef result;
209 src0 = ac_to_float(ctx, src0);
210 src1 = ac_to_float(ctx, src1);
211 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
212 return LLVMBuildSelect(ctx->builder, result,
213 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
214 ctx->i32_0, "");
215 }
216
217 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
218 const char *intrin,
219 LLVMTypeRef result_type,
220 LLVMValueRef src0)
221 {
222 char name[64];
223 LLVMValueRef params[] = {
224 ac_to_float(ctx, src0),
225 };
226
227 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
228 ac_get_elem_bits(ctx, result_type));
229 assert(length < sizeof(name));
230 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
231 }
232
233 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
234 const char *intrin,
235 LLVMTypeRef result_type,
236 LLVMValueRef src0, LLVMValueRef src1)
237 {
238 char name[64];
239 LLVMValueRef params[] = {
240 ac_to_float(ctx, src0),
241 ac_to_float(ctx, src1),
242 };
243
244 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
245 ac_get_elem_bits(ctx, result_type));
246 assert(length < sizeof(name));
247 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
248 }
249
250 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
251 const char *intrin,
252 LLVMTypeRef result_type,
253 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
254 {
255 char name[64];
256 LLVMValueRef params[] = {
257 ac_to_float(ctx, src0),
258 ac_to_float(ctx, src1),
259 ac_to_float(ctx, src2),
260 };
261
262 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
263 ac_get_elem_bits(ctx, result_type));
264 assert(length < sizeof(name));
265 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
266 }
267
268 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
269 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
270 {
271 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
272
273 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
274 ctx->i32_0, "");
275 return LLVMBuildSelect(ctx->builder, v,
276 ac_to_integer_or_pointer(ctx, src1),
277 ac_to_integer_or_pointer(ctx, src2), "");
278 }
279
280 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
281 LLVMValueRef src0)
282 {
283 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
284 }
285
286 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
287 const char *intrin,
288 LLVMValueRef src0, LLVMValueRef src1)
289 {
290 LLVMTypeRef ret_type;
291 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
292 LLVMValueRef res;
293 LLVMValueRef params[] = { src0, src1 };
294 ret_type = LLVMStructTypeInContext(ctx->context, types,
295 2, true);
296
297 res = ac_build_intrinsic(ctx, intrin, ret_type,
298 params, 2, AC_FUNC_ATTR_READNONE);
299
300 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
301 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
302 return res;
303 }
304
305 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
306 LLVMValueRef src0,
307 unsigned bitsize)
308 {
309 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
310 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
311 "");
312 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
313
314 switch (bitsize) {
315 case 16:
316 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
317 case 32:
318 return result;
319 case 64:
320 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
321 default:
322 unreachable("Unsupported bit size.");
323 }
324 }
325
326 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
327 LLVMValueRef src0)
328 {
329 src0 = ac_to_float(ctx, src0);
330 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
331 return LLVMBuildSExt(ctx->builder,
332 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
333 ctx->i32, "");
334 }
335
336 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
337 LLVMValueRef src0,
338 unsigned bitsize)
339 {
340 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
341
342 switch (bitsize) {
343 case 8:
344 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
345 case 16:
346 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
347 case 32:
348 return result;
349 case 64:
350 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
351 default:
352 unreachable("Unsupported bit size.");
353 }
354 }
355
356 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
357 LLVMValueRef src0)
358 {
359 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
360 return LLVMBuildSExt(ctx->builder,
361 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
362 ctx->i32, "");
363 }
364
365 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
366 LLVMValueRef src0)
367 {
368 LLVMValueRef result;
369 LLVMValueRef cond = NULL;
370
371 src0 = ac_to_float(ctx, src0);
372 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
373
374 if (ctx->chip_class >= GFX8) {
375 LLVMValueRef args[2];
376 /* Check if the result is a denormal - and flush to 0 if so. */
377 args[0] = result;
378 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
379 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
380 }
381
382 /* need to convert back up to f32 */
383 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
384
385 if (ctx->chip_class >= GFX8)
386 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
387 else {
388 /* for GFX6-GFX7 */
389 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
390 * so compare the result and flush to 0 if it's smaller.
391 */
392 LLVMValueRef temp, cond2;
393 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
394 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
395 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
396 temp, "");
397 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
398 temp, ctx->f32_0, "");
399 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
400 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
401 }
402 return result;
403 }
404
405 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
406 LLVMValueRef src0, LLVMValueRef src1)
407 {
408 LLVMValueRef dst64, result;
409 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
410 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
411
412 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
413 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
414 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
415 return result;
416 }
417
418 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
419 LLVMValueRef src0, LLVMValueRef src1)
420 {
421 LLVMValueRef dst64, result;
422 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
423 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
424
425 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
426 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
427 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
428 return result;
429 }
430
431 static LLVMValueRef emit_bitfield_extract(struct ac_llvm_context *ctx,
432 bool is_signed,
433 const LLVMValueRef srcs[3])
434 {
435 LLVMValueRef result;
436
437 if (HAVE_LLVM >= 0x0800) {
438 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
439 result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed);
440 result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, "");
441 } else {
442 /* FIXME: LLVM 7+ returns incorrect result when count is 0.
443 * https://bugs.freedesktop.org/show_bug.cgi?id=107276
444 */
445 LLVMValueRef zero = ctx->i32_0;
446 LLVMValueRef icond1 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
447 LLVMValueRef icond2 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], zero, "");
448
449 result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed);
450 result = LLVMBuildSelect(ctx->builder, icond1, srcs[0], result, "");
451 result = LLVMBuildSelect(ctx->builder, icond2, zero, result, "");
452 }
453
454 return result;
455 }
456
457 static LLVMValueRef emit_bitfield_insert(struct ac_llvm_context *ctx,
458 LLVMValueRef src0, LLVMValueRef src1,
459 LLVMValueRef src2, LLVMValueRef src3)
460 {
461 LLVMValueRef bfi_args[3], result;
462
463 bfi_args[0] = LLVMBuildShl(ctx->builder,
464 LLVMBuildSub(ctx->builder,
465 LLVMBuildShl(ctx->builder,
466 ctx->i32_1,
467 src3, ""),
468 ctx->i32_1, ""),
469 src2, "");
470 bfi_args[1] = LLVMBuildShl(ctx->builder, src1, src2, "");
471 bfi_args[2] = src0;
472
473 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, src3, LLVMConstInt(ctx->i32, 32, false), "");
474
475 /* Calculate:
476 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
477 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
478 */
479 result = LLVMBuildXor(ctx->builder, bfi_args[2],
480 LLVMBuildAnd(ctx->builder, bfi_args[0],
481 LLVMBuildXor(ctx->builder, bfi_args[1], bfi_args[2], ""), ""), "");
482
483 result = LLVMBuildSelect(ctx->builder, icond, src1, result, "");
484 return result;
485 }
486
487 static LLVMValueRef emit_pack_half_2x16(struct ac_llvm_context *ctx,
488 LLVMValueRef src0)
489 {
490 LLVMValueRef comp[2];
491
492 src0 = ac_to_float(ctx, src0);
493 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
494 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
495
496 return LLVMBuildBitCast(ctx->builder, ac_build_cvt_pkrtz_f16(ctx, comp),
497 ctx->i32, "");
498 }
499
500 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
501 LLVMValueRef src0)
502 {
503 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
504 LLVMValueRef temps[2], val;
505 int i;
506
507 for (i = 0; i < 2; i++) {
508 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
509 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
510 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
511 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
512 }
513 return ac_build_gather_values(ctx, temps, 2);
514 }
515
516 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
517 nir_op op,
518 LLVMValueRef src0)
519 {
520 unsigned mask;
521 int idx;
522 LLVMValueRef result;
523
524 if (op == nir_op_fddx_fine)
525 mask = AC_TID_MASK_LEFT;
526 else if (op == nir_op_fddy_fine)
527 mask = AC_TID_MASK_TOP;
528 else
529 mask = AC_TID_MASK_TOP_LEFT;
530
531 /* for DDX we want to next X pixel, DDY next Y pixel. */
532 if (op == nir_op_fddx_fine ||
533 op == nir_op_fddx_coarse ||
534 op == nir_op_fddx)
535 idx = 1;
536 else
537 idx = 2;
538
539 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
540 return result;
541 }
542
543 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
544 {
545 LLVMValueRef src[4], result = NULL;
546 unsigned num_components = instr->dest.dest.ssa.num_components;
547 unsigned src_components;
548 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
549
550 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
551 switch (instr->op) {
552 case nir_op_vec2:
553 case nir_op_vec3:
554 case nir_op_vec4:
555 src_components = 1;
556 break;
557 case nir_op_pack_half_2x16:
558 src_components = 2;
559 break;
560 case nir_op_unpack_half_2x16:
561 src_components = 1;
562 break;
563 case nir_op_cube_face_coord:
564 case nir_op_cube_face_index:
565 src_components = 3;
566 break;
567 default:
568 src_components = num_components;
569 break;
570 }
571 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
572 src[i] = get_alu_src(ctx, instr->src[i], src_components);
573
574 switch (instr->op) {
575 case nir_op_mov:
576 result = src[0];
577 break;
578 case nir_op_fneg:
579 src[0] = ac_to_float(&ctx->ac, src[0]);
580 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
581 break;
582 case nir_op_ineg:
583 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
584 break;
585 case nir_op_inot:
586 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
587 break;
588 case nir_op_iadd:
589 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
590 break;
591 case nir_op_fadd:
592 src[0] = ac_to_float(&ctx->ac, src[0]);
593 src[1] = ac_to_float(&ctx->ac, src[1]);
594 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
595 break;
596 case nir_op_fsub:
597 src[0] = ac_to_float(&ctx->ac, src[0]);
598 src[1] = ac_to_float(&ctx->ac, src[1]);
599 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
600 break;
601 case nir_op_isub:
602 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
603 break;
604 case nir_op_imul:
605 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
606 break;
607 case nir_op_imod:
608 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
609 break;
610 case nir_op_umod:
611 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
612 break;
613 case nir_op_fmod:
614 src[0] = ac_to_float(&ctx->ac, src[0]);
615 src[1] = ac_to_float(&ctx->ac, src[1]);
616 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
617 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
618 ac_to_float_type(&ctx->ac, def_type), result);
619 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
620 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
621 break;
622 case nir_op_frem:
623 src[0] = ac_to_float(&ctx->ac, src[0]);
624 src[1] = ac_to_float(&ctx->ac, src[1]);
625 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
626 break;
627 case nir_op_irem:
628 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
629 break;
630 case nir_op_idiv:
631 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
632 break;
633 case nir_op_udiv:
634 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
635 break;
636 case nir_op_fmul:
637 src[0] = ac_to_float(&ctx->ac, src[0]);
638 src[1] = ac_to_float(&ctx->ac, src[1]);
639 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
640 break;
641 case nir_op_frcp:
642 src[0] = ac_to_float(&ctx->ac, src[0]);
643 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
644 break;
645 case nir_op_iand:
646 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
647 break;
648 case nir_op_ior:
649 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
650 break;
651 case nir_op_ixor:
652 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
653 break;
654 case nir_op_ishl:
655 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
656 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
657 LLVMTypeOf(src[0]), "");
658 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
659 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
660 LLVMTypeOf(src[0]), "");
661 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
662 break;
663 case nir_op_ishr:
664 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
665 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
666 LLVMTypeOf(src[0]), "");
667 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
668 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
669 LLVMTypeOf(src[0]), "");
670 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
671 break;
672 case nir_op_ushr:
673 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
674 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
675 LLVMTypeOf(src[0]), "");
676 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
677 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
678 LLVMTypeOf(src[0]), "");
679 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
680 break;
681 case nir_op_ilt32:
682 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
683 break;
684 case nir_op_ine32:
685 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
686 break;
687 case nir_op_ieq32:
688 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
689 break;
690 case nir_op_ige32:
691 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
692 break;
693 case nir_op_ult32:
694 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
695 break;
696 case nir_op_uge32:
697 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
698 break;
699 case nir_op_feq32:
700 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
701 break;
702 case nir_op_fne32:
703 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
704 break;
705 case nir_op_flt32:
706 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
707 break;
708 case nir_op_fge32:
709 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
710 break;
711 case nir_op_fabs:
712 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
713 ac_to_float_type(&ctx->ac, def_type), src[0]);
714 break;
715 case nir_op_iabs:
716 result = emit_iabs(&ctx->ac, src[0]);
717 break;
718 case nir_op_imax:
719 result = ac_build_imax(&ctx->ac, src[0], src[1]);
720 break;
721 case nir_op_imin:
722 result = ac_build_imin(&ctx->ac, src[0], src[1]);
723 break;
724 case nir_op_umax:
725 result = ac_build_umax(&ctx->ac, src[0], src[1]);
726 break;
727 case nir_op_umin:
728 result = ac_build_umin(&ctx->ac, src[0], src[1]);
729 break;
730 case nir_op_isign:
731 result = ac_build_isign(&ctx->ac, src[0],
732 instr->dest.dest.ssa.bit_size);
733 break;
734 case nir_op_fsign:
735 src[0] = ac_to_float(&ctx->ac, src[0]);
736 result = ac_build_fsign(&ctx->ac, src[0],
737 instr->dest.dest.ssa.bit_size);
738 break;
739 case nir_op_ffloor:
740 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
741 ac_to_float_type(&ctx->ac, def_type), src[0]);
742 break;
743 case nir_op_ftrunc:
744 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
745 ac_to_float_type(&ctx->ac, def_type), src[0]);
746 break;
747 case nir_op_fceil:
748 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
749 ac_to_float_type(&ctx->ac, def_type), src[0]);
750 break;
751 case nir_op_fround_even:
752 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
753 ac_to_float_type(&ctx->ac, def_type),src[0]);
754 break;
755 case nir_op_ffract:
756 src[0] = ac_to_float(&ctx->ac, src[0]);
757 result = ac_build_fract(&ctx->ac, src[0],
758 instr->dest.dest.ssa.bit_size);
759 break;
760 case nir_op_fsin:
761 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
762 ac_to_float_type(&ctx->ac, def_type), src[0]);
763 break;
764 case nir_op_fcos:
765 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
766 ac_to_float_type(&ctx->ac, def_type), src[0]);
767 break;
768 case nir_op_fsqrt:
769 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
770 ac_to_float_type(&ctx->ac, def_type), src[0]);
771 break;
772 case nir_op_fexp2:
773 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
774 ac_to_float_type(&ctx->ac, def_type), src[0]);
775 break;
776 case nir_op_flog2:
777 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
778 ac_to_float_type(&ctx->ac, def_type), src[0]);
779 break;
780 case nir_op_frsq:
781 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
782 ac_to_float_type(&ctx->ac, def_type), src[0]);
783 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
784 break;
785 case nir_op_frexp_exp:
786 src[0] = ac_to_float(&ctx->ac, src[0]);
787 result = ac_build_frexp_exp(&ctx->ac, src[0],
788 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
789 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
790 result = LLVMBuildSExt(ctx->ac.builder, result,
791 ctx->ac.i32, "");
792 break;
793 case nir_op_frexp_sig:
794 src[0] = ac_to_float(&ctx->ac, src[0]);
795 result = ac_build_frexp_mant(&ctx->ac, src[0],
796 instr->dest.dest.ssa.bit_size);
797 break;
798 case nir_op_fpow:
799 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
800 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
801 break;
802 case nir_op_fmax:
803 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
804 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
805 if (ctx->ac.chip_class < GFX9 &&
806 instr->dest.dest.ssa.bit_size == 32) {
807 /* Only pre-GFX9 chips do not flush denorms. */
808 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
809 ac_to_float_type(&ctx->ac, def_type),
810 result);
811 }
812 break;
813 case nir_op_fmin:
814 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
815 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
816 if (ctx->ac.chip_class < GFX9 &&
817 instr->dest.dest.ssa.bit_size == 32) {
818 /* Only pre-GFX9 chips do not flush denorms. */
819 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
820 ac_to_float_type(&ctx->ac, def_type),
821 result);
822 }
823 break;
824 case nir_op_ffma:
825 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
826 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
827 break;
828 case nir_op_ldexp:
829 src[0] = ac_to_float(&ctx->ac, src[0]);
830 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
831 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
832 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
833 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
834 else
835 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
836 break;
837 case nir_op_ibitfield_extract:
838 result = emit_bitfield_extract(&ctx->ac, true, src);
839 break;
840 case nir_op_ubitfield_extract:
841 result = emit_bitfield_extract(&ctx->ac, false, src);
842 break;
843 case nir_op_bitfield_insert:
844 result = emit_bitfield_insert(&ctx->ac, src[0], src[1], src[2], src[3]);
845 break;
846 case nir_op_bitfield_reverse:
847 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
848 break;
849 case nir_op_bit_count:
850 result = ac_build_bit_count(&ctx->ac, src[0]);
851 break;
852 case nir_op_vec2:
853 case nir_op_vec3:
854 case nir_op_vec4:
855 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
856 src[i] = ac_to_integer(&ctx->ac, src[i]);
857 result = ac_build_gather_values(&ctx->ac, src, num_components);
858 break;
859 case nir_op_f2i8:
860 case nir_op_f2i16:
861 case nir_op_f2i32:
862 case nir_op_f2i64:
863 src[0] = ac_to_float(&ctx->ac, src[0]);
864 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
865 break;
866 case nir_op_f2u8:
867 case nir_op_f2u16:
868 case nir_op_f2u32:
869 case nir_op_f2u64:
870 src[0] = ac_to_float(&ctx->ac, src[0]);
871 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
872 break;
873 case nir_op_i2f16:
874 case nir_op_i2f32:
875 case nir_op_i2f64:
876 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
877 break;
878 case nir_op_u2f16:
879 case nir_op_u2f32:
880 case nir_op_u2f64:
881 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
882 break;
883 case nir_op_f2f16_rtz:
884 src[0] = ac_to_float(&ctx->ac, src[0]);
885 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
886 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
887 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
888 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
889 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
890 break;
891 case nir_op_f2f16_rtne:
892 case nir_op_f2f16:
893 case nir_op_f2f32:
894 case nir_op_f2f64:
895 src[0] = ac_to_float(&ctx->ac, src[0]);
896 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
897 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
898 else
899 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
900 break;
901 case nir_op_u2u8:
902 case nir_op_u2u16:
903 case nir_op_u2u32:
904 case nir_op_u2u64:
905 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
906 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
907 else
908 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
909 break;
910 case nir_op_i2i8:
911 case nir_op_i2i16:
912 case nir_op_i2i32:
913 case nir_op_i2i64:
914 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
915 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
916 else
917 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
918 break;
919 case nir_op_b32csel:
920 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
921 break;
922 case nir_op_find_lsb:
923 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
924 break;
925 case nir_op_ufind_msb:
926 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
927 break;
928 case nir_op_ifind_msb:
929 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
930 break;
931 case nir_op_uadd_carry:
932 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
933 break;
934 case nir_op_usub_borrow:
935 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
936 break;
937 case nir_op_b2f16:
938 case nir_op_b2f32:
939 case nir_op_b2f64:
940 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
941 break;
942 case nir_op_f2b32:
943 result = emit_f2b(&ctx->ac, src[0]);
944 break;
945 case nir_op_b2i8:
946 case nir_op_b2i16:
947 case nir_op_b2i32:
948 case nir_op_b2i64:
949 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
950 break;
951 case nir_op_i2b32:
952 result = emit_i2b(&ctx->ac, src[0]);
953 break;
954 case nir_op_fquantize2f16:
955 result = emit_f2f16(&ctx->ac, src[0]);
956 break;
957 case nir_op_umul_high:
958 result = emit_umul_high(&ctx->ac, src[0], src[1]);
959 break;
960 case nir_op_imul_high:
961 result = emit_imul_high(&ctx->ac, src[0], src[1]);
962 break;
963 case nir_op_pack_half_2x16:
964 result = emit_pack_half_2x16(&ctx->ac, src[0]);
965 break;
966 case nir_op_unpack_half_2x16:
967 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
968 break;
969 case nir_op_fddx:
970 case nir_op_fddy:
971 case nir_op_fddx_fine:
972 case nir_op_fddy_fine:
973 case nir_op_fddx_coarse:
974 case nir_op_fddy_coarse:
975 result = emit_ddxy(ctx, instr->op, src[0]);
976 break;
977
978 case nir_op_unpack_64_2x32_split_x: {
979 assert(ac_get_llvm_num_components(src[0]) == 1);
980 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
981 ctx->ac.v2i32,
982 "");
983 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
984 ctx->ac.i32_0, "");
985 break;
986 }
987
988 case nir_op_unpack_64_2x32_split_y: {
989 assert(ac_get_llvm_num_components(src[0]) == 1);
990 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
991 ctx->ac.v2i32,
992 "");
993 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
994 ctx->ac.i32_1, "");
995 break;
996 }
997
998 case nir_op_pack_64_2x32_split: {
999 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1000 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1001 break;
1002 }
1003
1004 case nir_op_pack_32_2x16_split: {
1005 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1006 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1007 break;
1008 }
1009
1010 case nir_op_unpack_32_2x16_split_x: {
1011 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1012 ctx->ac.v2i16,
1013 "");
1014 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1015 ctx->ac.i32_0, "");
1016 break;
1017 }
1018
1019 case nir_op_unpack_32_2x16_split_y: {
1020 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1021 ctx->ac.v2i16,
1022 "");
1023 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1024 ctx->ac.i32_1, "");
1025 break;
1026 }
1027
1028 case nir_op_cube_face_coord: {
1029 src[0] = ac_to_float(&ctx->ac, src[0]);
1030 LLVMValueRef results[2];
1031 LLVMValueRef in[3];
1032 for (unsigned chan = 0; chan < 3; chan++)
1033 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1034 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1035 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1036 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1037 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1038 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1039 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1040 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1041 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1042 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1043 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1044 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1045 result = ac_build_gather_values(&ctx->ac, results, 2);
1046 break;
1047 }
1048
1049 case nir_op_cube_face_index: {
1050 src[0] = ac_to_float(&ctx->ac, src[0]);
1051 LLVMValueRef in[3];
1052 for (unsigned chan = 0; chan < 3; chan++)
1053 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1054 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1055 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1056 break;
1057 }
1058
1059 case nir_op_fmin3:
1060 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1061 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1062 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1063 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1064 break;
1065 case nir_op_umin3:
1066 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1067 result = ac_build_umin(&ctx->ac, result, src[2]);
1068 break;
1069 case nir_op_imin3:
1070 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1071 result = ac_build_imin(&ctx->ac, result, src[2]);
1072 break;
1073 case nir_op_fmax3:
1074 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1075 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1076 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1077 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1078 break;
1079 case nir_op_umax3:
1080 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1081 result = ac_build_umax(&ctx->ac, result, src[2]);
1082 break;
1083 case nir_op_imax3:
1084 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1085 result = ac_build_imax(&ctx->ac, result, src[2]);
1086 break;
1087 case nir_op_fmed3: {
1088 src[0] = ac_to_float(&ctx->ac, src[0]);
1089 src[1] = ac_to_float(&ctx->ac, src[1]);
1090 src[2] = ac_to_float(&ctx->ac, src[2]);
1091 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1092 instr->dest.dest.ssa.bit_size);
1093 break;
1094 }
1095 case nir_op_imed3: {
1096 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1097 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1098 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1099 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1100 break;
1101 }
1102 case nir_op_umed3: {
1103 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1104 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1105 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1106 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1107 break;
1108 }
1109
1110 default:
1111 fprintf(stderr, "Unknown NIR alu instr: ");
1112 nir_print_instr(&instr->instr, stderr);
1113 fprintf(stderr, "\n");
1114 abort();
1115 }
1116
1117 if (result) {
1118 assert(instr->dest.dest.is_ssa);
1119 result = ac_to_integer_or_pointer(&ctx->ac, result);
1120 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1121 }
1122 }
1123
1124 static void visit_load_const(struct ac_nir_context *ctx,
1125 const nir_load_const_instr *instr)
1126 {
1127 LLVMValueRef values[4], value = NULL;
1128 LLVMTypeRef element_type =
1129 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1130
1131 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1132 switch (instr->def.bit_size) {
1133 case 8:
1134 values[i] = LLVMConstInt(element_type,
1135 instr->value[i].u8, false);
1136 break;
1137 case 16:
1138 values[i] = LLVMConstInt(element_type,
1139 instr->value[i].u16, false);
1140 break;
1141 case 32:
1142 values[i] = LLVMConstInt(element_type,
1143 instr->value[i].u32, false);
1144 break;
1145 case 64:
1146 values[i] = LLVMConstInt(element_type,
1147 instr->value[i].u64, false);
1148 break;
1149 default:
1150 fprintf(stderr,
1151 "unsupported nir load_const bit_size: %d\n",
1152 instr->def.bit_size);
1153 abort();
1154 }
1155 }
1156 if (instr->def.num_components > 1) {
1157 value = LLVMConstVector(values, instr->def.num_components);
1158 } else
1159 value = values[0];
1160
1161 ctx->ssa_defs[instr->def.index] = value;
1162 }
1163
1164 static LLVMValueRef
1165 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1166 {
1167 LLVMValueRef size =
1168 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1169 LLVMConstInt(ctx->ac.i32, 2, false), "");
1170
1171 /* GFX8 only */
1172 if (ctx->ac.chip_class == GFX8 && in_elements) {
1173 /* On GFX8, the descriptor contains the size in bytes,
1174 * but TXQ must return the size in elements.
1175 * The stride is always non-zero for resources using TXQ.
1176 */
1177 LLVMValueRef stride =
1178 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1179 ctx->ac.i32_1, "");
1180 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1181 LLVMConstInt(ctx->ac.i32, 16, false), "");
1182 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1183 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1184
1185 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1186 }
1187 return size;
1188 }
1189
1190 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1191 nir_variable *var,
1192 struct ac_image_args *args,
1193 const nir_tex_instr *instr)
1194 {
1195 const struct glsl_type *type = glsl_without_array(var->type);
1196 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1197 LLVMValueRef half_texel[2];
1198 LLVMValueRef compare_cube_wa = NULL;
1199 LLVMValueRef result;
1200
1201 //TODO Rect
1202 {
1203 struct ac_image_args txq_args = { 0 };
1204
1205 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1206 txq_args.opcode = ac_image_get_resinfo;
1207 txq_args.dmask = 0xf;
1208 txq_args.lod = ctx->i32_0;
1209 txq_args.resource = args->resource;
1210 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1211 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1212
1213 for (unsigned c = 0; c < 2; c++) {
1214 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1215 LLVMConstInt(ctx->i32, c, false), "");
1216 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1217 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1218 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1219 LLVMConstReal(ctx->f32, -0.5), "");
1220 }
1221 }
1222
1223 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1224
1225 for (unsigned c = 0; c < 2; c++) {
1226 LLVMValueRef tmp;
1227 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1228 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1229 }
1230
1231 /*
1232 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1233 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1234 * workaround by sampling using a scaled type and converting.
1235 * This is taken from amdgpu-pro shaders.
1236 */
1237 /* NOTE this produces some ugly code compared to amdgpu-pro,
1238 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1239 * and then reads them back. -pro generates two selects,
1240 * one s_cmp for the descriptor rewriting
1241 * one v_cmp for the coordinate and result changes.
1242 */
1243 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1244 LLVMValueRef tmp, tmp2;
1245
1246 /* workaround 8/8/8/8 uint/sint cube gather bug */
1247 /* first detect it then change to a scaled read and f2i */
1248 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1249 tmp2 = tmp;
1250
1251 /* extract the DATA_FORMAT */
1252 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1253 LLVMConstInt(ctx->i32, 6, false), false);
1254
1255 /* is the DATA_FORMAT == 8_8_8_8 */
1256 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1257
1258 if (stype == GLSL_TYPE_UINT)
1259 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1260 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1261 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1262 else
1263 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1264 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1265 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1266
1267 /* replace the NUM FORMAT in the descriptor */
1268 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT_GFX6, false), "");
1269 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1270
1271 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1272
1273 /* don't modify the coordinates for this case */
1274 for (unsigned c = 0; c < 2; ++c)
1275 args->coords[c] = LLVMBuildSelect(
1276 ctx->builder, compare_cube_wa,
1277 orig_coords[c], args->coords[c], "");
1278 }
1279
1280 args->attributes = AC_FUNC_ATTR_READNONE;
1281 result = ac_build_image_opcode(ctx, args);
1282
1283 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1284 LLVMValueRef tmp, tmp2;
1285
1286 /* if the cube workaround is in place, f2i the result. */
1287 for (unsigned c = 0; c < 4; c++) {
1288 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1289 if (stype == GLSL_TYPE_UINT)
1290 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1291 else
1292 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1293 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1294 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1295 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1296 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1297 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1298 }
1299 }
1300 return result;
1301 }
1302
1303 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1304 {
1305 nir_deref_instr *texture_deref_instr = NULL;
1306
1307 for (unsigned i = 0; i < instr->num_srcs; i++) {
1308 switch (instr->src[i].src_type) {
1309 case nir_tex_src_texture_deref:
1310 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1311 break;
1312 default:
1313 break;
1314 }
1315 }
1316 return texture_deref_instr;
1317 }
1318
1319 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1320 const nir_tex_instr *instr,
1321 struct ac_image_args *args)
1322 {
1323 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1324 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1325
1326 if (ctx->abi->gfx9_stride_size_workaround) {
1327 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1328 args->resource,
1329 args->coords[0],
1330 ctx->ac.i32_0,
1331 util_last_bit(mask),
1332 false, true);
1333 } else {
1334 return ac_build_buffer_load_format(&ctx->ac,
1335 args->resource,
1336 args->coords[0],
1337 ctx->ac.i32_0,
1338 util_last_bit(mask),
1339 false, true);
1340 }
1341 }
1342
1343 args->opcode = ac_image_sample;
1344
1345 switch (instr->op) {
1346 case nir_texop_txf:
1347 case nir_texop_txf_ms:
1348 case nir_texop_samples_identical:
1349 args->opcode = args->level_zero ||
1350 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1351 ac_image_load : ac_image_load_mip;
1352 args->level_zero = false;
1353 break;
1354 case nir_texop_txs:
1355 case nir_texop_query_levels:
1356 args->opcode = ac_image_get_resinfo;
1357 if (!args->lod)
1358 args->lod = ctx->ac.i32_0;
1359 args->level_zero = false;
1360 break;
1361 case nir_texop_tex:
1362 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1363 assert(!args->lod);
1364 args->level_zero = true;
1365 }
1366 break;
1367 case nir_texop_tg4:
1368 args->opcode = ac_image_gather4;
1369 args->level_zero = true;
1370 break;
1371 case nir_texop_lod:
1372 args->opcode = ac_image_get_lod;
1373 break;
1374 default:
1375 break;
1376 }
1377
1378 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1379 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1380 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1381 const struct glsl_type *type = glsl_without_array(var->type);
1382 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1383 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1384 return lower_gather4_integer(&ctx->ac, var, args, instr);
1385 }
1386 }
1387
1388 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1389 if (instr->op == nir_texop_lod && ctx->ac.chip_class >= GFX9) {
1390 if ((args->dim == ac_image_2darray ||
1391 args->dim == ac_image_2d) && !args->coords[1]) {
1392 args->coords[1] = ctx->ac.i32_0;
1393 }
1394 }
1395
1396 args->attributes = AC_FUNC_ATTR_READNONE;
1397 return ac_build_image_opcode(&ctx->ac, args);
1398 }
1399
1400 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1401 nir_intrinsic_instr *instr)
1402 {
1403 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1404 LLVMValueRef index = get_src(ctx, instr->src[1]);
1405
1406 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1407 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1408 return result;
1409 }
1410
1411 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1412 nir_intrinsic_instr *instr)
1413 {
1414 LLVMValueRef ptr, addr;
1415 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1416 unsigned index = nir_intrinsic_base(instr);
1417
1418 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1419 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1420
1421 /* Load constant values from user SGPRS when possible, otherwise
1422 * fallback to the default path that loads directly from memory.
1423 */
1424 if (LLVMIsConstant(src0) &&
1425 instr->dest.ssa.bit_size == 32) {
1426 unsigned count = instr->dest.ssa.num_components;
1427 unsigned offset = index;
1428
1429 offset += LLVMConstIntGetZExtValue(src0);
1430 offset /= 4;
1431
1432 offset -= ctx->abi->base_inline_push_consts;
1433
1434 if (offset + count <= ctx->abi->num_inline_push_consts) {
1435 return ac_build_gather_values(&ctx->ac,
1436 ctx->abi->inline_push_consts + offset,
1437 count);
1438 }
1439 }
1440
1441 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1442
1443 if (instr->dest.ssa.bit_size == 8) {
1444 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1445 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1446 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1447 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1448
1449 LLVMValueRef params[3];
1450 if (load_dwords > 1) {
1451 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1452 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1453 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1454 } else {
1455 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1456 params[0] = ctx->ac.i32_0;
1457 params[1] = res;
1458 }
1459 params[2] = addr;
1460 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1461
1462 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1463 if (instr->dest.ssa.num_components > 1)
1464 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1465 return res;
1466 } else if (instr->dest.ssa.bit_size == 16) {
1467 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1468 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1469 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1470 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1471 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1472 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1473 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1474 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1475 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1476 LLVMConstInt(ctx->ac.i32, 4, false)};
1477 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1478 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1479 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1480 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1481 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1482 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1483 }
1484
1485 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1486
1487 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1488 }
1489
1490 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1491 const nir_intrinsic_instr *instr)
1492 {
1493 LLVMValueRef index = get_src(ctx, instr->src[0]);
1494
1495 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1496 }
1497
1498 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1499 {
1500 uint32_t new_mask = 0;
1501 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1502 if (mask & (1u << i))
1503 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1504 return new_mask;
1505 }
1506
1507 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1508 unsigned start, unsigned count)
1509 {
1510 LLVMValueRef mask[] = {
1511 ctx->i32_0, ctx->i32_1,
1512 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1513
1514 unsigned src_elements = ac_get_llvm_num_components(src);
1515
1516 if (count == src_elements) {
1517 assert(start == 0);
1518 return src;
1519 } else if (count == 1) {
1520 assert(start < src_elements);
1521 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1522 } else {
1523 assert(start + count <= src_elements);
1524 assert(count <= 4);
1525 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1526 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1527 }
1528 }
1529
1530 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1531 enum gl_access_qualifier access,
1532 bool may_store_unaligned,
1533 bool writeonly_memory)
1534 {
1535 unsigned cache_policy = 0;
1536
1537 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1538 * store opcodes not aligned to a dword are affected. The only way to
1539 * get unaligned stores is through shader images.
1540 */
1541 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1542 /* If this is write-only, don't keep data in L1 to prevent
1543 * evicting L1 cache lines that may be needed by other
1544 * instructions.
1545 */
1546 writeonly_memory ||
1547 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1548 cache_policy |= ac_glc;
1549 }
1550
1551 return cache_policy;
1552 }
1553
1554 static void visit_store_ssbo(struct ac_nir_context *ctx,
1555 nir_intrinsic_instr *instr)
1556 {
1557 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1558 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1559 unsigned writemask = nir_intrinsic_write_mask(instr);
1560 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1561 bool writeonly_memory = access & ACCESS_NON_READABLE;
1562 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1563
1564 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1565 get_src(ctx, instr->src[1]), true);
1566 LLVMValueRef base_data = src_data;
1567 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1568 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1569
1570 while (writemask) {
1571 int start, count;
1572 LLVMValueRef data, offset;
1573 LLVMTypeRef data_type;
1574
1575 u_bit_scan_consecutive_range(&writemask, &start, &count);
1576
1577 /* Due to an LLVM limitation, split 3-element writes
1578 * into a 2-element and a 1-element write. */
1579 if (count == 3) {
1580 writemask |= 1 << (start + 2);
1581 count = 2;
1582 }
1583 int num_bytes = count * elem_size_bytes; /* count in bytes */
1584
1585 /* we can only store 4 DWords at the same time.
1586 * can only happen for 64 Bit vectors. */
1587 if (num_bytes > 16) {
1588 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1589 count = 2;
1590 num_bytes = 16;
1591 }
1592
1593 /* check alignment of 16 Bit stores */
1594 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1595 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1596 count = 1;
1597 num_bytes = 2;
1598 }
1599 data = extract_vector_range(&ctx->ac, base_data, start, count);
1600
1601 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1602 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1603
1604 if (num_bytes == 1) {
1605 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1606 offset, ctx->ac.i32_0,
1607 cache_policy & ac_glc,
1608 writeonly_memory);
1609 } else if (num_bytes == 2) {
1610 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1611 offset, ctx->ac.i32_0,
1612 cache_policy & ac_glc,
1613 writeonly_memory);
1614 } else {
1615 int num_channels = num_bytes / 4;
1616
1617 switch (num_bytes) {
1618 case 16: /* v4f32 */
1619 data_type = ctx->ac.v4f32;
1620 break;
1621 case 8: /* v2f32 */
1622 data_type = ctx->ac.v2f32;
1623 break;
1624 case 4: /* f32 */
1625 data_type = ctx->ac.f32;
1626 break;
1627 default:
1628 unreachable("Malformed vector store.");
1629 }
1630 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1631
1632 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1633 num_channels, offset,
1634 ctx->ac.i32_0, 0,
1635 cache_policy & ac_glc,
1636 false, writeonly_memory,
1637 false);
1638 }
1639 }
1640 }
1641
1642 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1643 const nir_intrinsic_instr *instr)
1644 {
1645 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1646 const char *op;
1647 char name[64], type[8];
1648 LLVMValueRef params[6];
1649 int arg_count = 0;
1650
1651 switch (instr->intrinsic) {
1652 case nir_intrinsic_ssbo_atomic_add:
1653 op = "add";
1654 break;
1655 case nir_intrinsic_ssbo_atomic_imin:
1656 op = "smin";
1657 break;
1658 case nir_intrinsic_ssbo_atomic_umin:
1659 op = "umin";
1660 break;
1661 case nir_intrinsic_ssbo_atomic_imax:
1662 op = "smax";
1663 break;
1664 case nir_intrinsic_ssbo_atomic_umax:
1665 op = "umax";
1666 break;
1667 case nir_intrinsic_ssbo_atomic_and:
1668 op = "and";
1669 break;
1670 case nir_intrinsic_ssbo_atomic_or:
1671 op = "or";
1672 break;
1673 case nir_intrinsic_ssbo_atomic_xor:
1674 op = "xor";
1675 break;
1676 case nir_intrinsic_ssbo_atomic_exchange:
1677 op = "swap";
1678 break;
1679 case nir_intrinsic_ssbo_atomic_comp_swap:
1680 op = "cmpswap";
1681 break;
1682 default:
1683 abort();
1684 }
1685
1686 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1687 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1688 }
1689 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1690 params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
1691 get_src(ctx, instr->src[0]),
1692 true);
1693
1694 if (HAVE_LLVM >= 0x900) {
1695 /* XXX: The new raw/struct atomic intrinsics are buggy with
1696 * LLVM 8, see r358579.
1697 */
1698 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1699 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1700 params[arg_count++] = ctx->ac.i32_0; /* slc */
1701
1702 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1703 snprintf(name, sizeof(name),
1704 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1705 } else {
1706 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1707 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1708 params[arg_count++] = ctx->ac.i1false; /* slc */
1709
1710 assert(return_type == ctx->ac.i32);
1711 snprintf(name, sizeof(name),
1712 "llvm.amdgcn.buffer.atomic.%s", op);
1713 }
1714
1715 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1716 arg_count, 0);
1717 }
1718
1719 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1720 const nir_intrinsic_instr *instr)
1721 {
1722 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1723 int num_components = instr->num_components;
1724 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1725 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1726
1727 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1728 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1729 get_src(ctx, instr->src[0]), false);
1730 LLVMValueRef vindex = ctx->ac.i32_0;
1731
1732 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1733 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1734
1735 LLVMValueRef results[4];
1736 for (int i = 0; i < num_components;) {
1737 int num_elems = num_components - i;
1738 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1739 num_elems = 1;
1740 if (num_elems * elem_size_bytes > 16)
1741 num_elems = 16 / elem_size_bytes;
1742 int load_bytes = num_elems * elem_size_bytes;
1743
1744 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1745
1746 LLVMValueRef ret;
1747
1748 if (load_bytes == 1) {
1749 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1750 rsrc,
1751 offset,
1752 ctx->ac.i32_0,
1753 immoffset,
1754 cache_policy & ac_glc);
1755 } else if (load_bytes == 2) {
1756 ret = ac_build_tbuffer_load_short(&ctx->ac,
1757 rsrc,
1758 offset,
1759 ctx->ac.i32_0,
1760 immoffset,
1761 cache_policy & ac_glc);
1762 } else {
1763 int num_channels = util_next_power_of_two(load_bytes) / 4;
1764
1765 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1766 vindex, offset, immoffset, 0,
1767 cache_policy & ac_glc, 0,
1768 false, false);
1769 }
1770
1771 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1772 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1773 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1774
1775 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1776 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1777
1778 for (unsigned j = 0; j < num_elems; j++) {
1779 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1780 }
1781 i += num_elems;
1782 }
1783
1784 return ac_build_gather_values(&ctx->ac, results, num_components);
1785 }
1786
1787 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1788 const nir_intrinsic_instr *instr)
1789 {
1790 LLVMValueRef ret;
1791 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1792 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1793 int num_components = instr->num_components;
1794
1795 if (ctx->abi->load_ubo)
1796 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1797
1798 if (instr->dest.ssa.bit_size == 64)
1799 num_components *= 2;
1800
1801 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1802 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1803 LLVMValueRef results[num_components];
1804 for (unsigned i = 0; i < num_components; ++i) {
1805 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1806 load_bytes * i, 0);
1807
1808 if (load_bytes == 1) {
1809 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1810 rsrc,
1811 offset,
1812 ctx->ac.i32_0,
1813 immoffset,
1814 false);
1815 } else {
1816 assert(load_bytes == 2);
1817 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1818 rsrc,
1819 offset,
1820 ctx->ac.i32_0,
1821 immoffset,
1822 false);
1823 }
1824 }
1825 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1826 } else {
1827 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1828 NULL, 0, false, false, true, true);
1829
1830 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1831 }
1832
1833 return LLVMBuildBitCast(ctx->ac.builder, ret,
1834 get_def_type(ctx, &instr->dest.ssa), "");
1835 }
1836
1837 static void
1838 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1839 bool vs_in, unsigned *vertex_index_out,
1840 LLVMValueRef *vertex_index_ref,
1841 unsigned *const_out, LLVMValueRef *indir_out)
1842 {
1843 nir_variable *var = nir_deref_instr_get_variable(instr);
1844 nir_deref_path path;
1845 unsigned idx_lvl = 1;
1846
1847 nir_deref_path_init(&path, instr, NULL);
1848
1849 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1850 if (vertex_index_ref) {
1851 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1852 if (vertex_index_out)
1853 *vertex_index_out = 0;
1854 } else {
1855 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1856 }
1857 ++idx_lvl;
1858 }
1859
1860 uint32_t const_offset = 0;
1861 LLVMValueRef offset = NULL;
1862
1863 if (var->data.compact) {
1864 assert(instr->deref_type == nir_deref_type_array);
1865 const_offset = nir_src_as_uint(instr->arr.index);
1866 goto out;
1867 }
1868
1869 for (; path.path[idx_lvl]; ++idx_lvl) {
1870 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1871 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1872 unsigned index = path.path[idx_lvl]->strct.index;
1873
1874 for (unsigned i = 0; i < index; i++) {
1875 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1876 const_offset += glsl_count_attribute_slots(ft, vs_in);
1877 }
1878 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1879 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1880 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1881 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1882 if (offset)
1883 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1884 else
1885 offset = array_off;
1886 } else
1887 unreachable("Uhandled deref type in get_deref_instr_offset");
1888 }
1889
1890 out:
1891 nir_deref_path_finish(&path);
1892
1893 if (const_offset && offset)
1894 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1895 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1896 "");
1897
1898 *const_out = const_offset;
1899 *indir_out = offset;
1900 }
1901
1902 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1903 nir_intrinsic_instr *instr,
1904 bool load_inputs)
1905 {
1906 LLVMValueRef result;
1907 LLVMValueRef vertex_index = NULL;
1908 LLVMValueRef indir_index = NULL;
1909 unsigned const_index = 0;
1910
1911 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1912
1913 unsigned location = var->data.location;
1914 unsigned driver_location = var->data.driver_location;
1915 const bool is_patch = var->data.patch;
1916 const bool is_compact = var->data.compact;
1917
1918 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1919 false, NULL, is_patch ? NULL : &vertex_index,
1920 &const_index, &indir_index);
1921
1922 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1923
1924 LLVMTypeRef src_component_type;
1925 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1926 src_component_type = LLVMGetElementType(dest_type);
1927 else
1928 src_component_type = dest_type;
1929
1930 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1931 vertex_index, indir_index,
1932 const_index, location, driver_location,
1933 var->data.location_frac,
1934 instr->num_components,
1935 is_patch, is_compact, load_inputs);
1936 if (instr->dest.ssa.bit_size == 16) {
1937 result = ac_to_integer(&ctx->ac, result);
1938 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
1939 }
1940 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
1941 }
1942
1943 static unsigned
1944 type_scalar_size_bytes(const struct glsl_type *type)
1945 {
1946 assert(glsl_type_is_vector_or_scalar(type) ||
1947 glsl_type_is_matrix(type));
1948 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
1949 }
1950
1951 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
1952 nir_intrinsic_instr *instr)
1953 {
1954 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1955 nir_variable *var = nir_deref_instr_get_variable(deref);
1956
1957 LLVMValueRef values[8];
1958 int idx = 0;
1959 int ve = instr->dest.ssa.num_components;
1960 unsigned comp = 0;
1961 LLVMValueRef indir_index;
1962 LLVMValueRef ret;
1963 unsigned const_index;
1964 unsigned stride = 4;
1965 int mode = deref->mode;
1966
1967 if (var) {
1968 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
1969 var->data.mode == nir_var_shader_in;
1970 idx = var->data.driver_location;
1971 comp = var->data.location_frac;
1972 mode = var->data.mode;
1973
1974 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
1975 &const_index, &indir_index);
1976
1977 if (var->data.compact) {
1978 stride = 1;
1979 const_index += comp;
1980 comp = 0;
1981 }
1982 }
1983
1984 if (instr->dest.ssa.bit_size == 64 &&
1985 (deref->mode == nir_var_shader_in ||
1986 deref->mode == nir_var_shader_out ||
1987 deref->mode == nir_var_function_temp))
1988 ve *= 2;
1989
1990 switch (mode) {
1991 case nir_var_shader_in:
1992 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
1993 ctx->stage == MESA_SHADER_TESS_EVAL) {
1994 return load_tess_varyings(ctx, instr, true);
1995 }
1996
1997 if (ctx->stage == MESA_SHADER_GEOMETRY) {
1998 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
1999 LLVMValueRef indir_index;
2000 unsigned const_index, vertex_index;
2001 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2002 &const_index, &indir_index);
2003
2004 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2005 var->data.driver_location,
2006 var->data.location_frac,
2007 instr->num_components, vertex_index, const_index, type);
2008 }
2009
2010 for (unsigned chan = comp; chan < ve + comp; chan++) {
2011 if (indir_index) {
2012 unsigned count = glsl_count_attribute_slots(
2013 var->type,
2014 ctx->stage == MESA_SHADER_VERTEX);
2015 count -= chan / 4;
2016 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2017 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2018 stride, false, true);
2019
2020 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2021 tmp_vec,
2022 indir_index, "");
2023 } else
2024 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2025 }
2026 break;
2027 case nir_var_function_temp:
2028 for (unsigned chan = 0; chan < ve; chan++) {
2029 if (indir_index) {
2030 unsigned count = glsl_count_attribute_slots(
2031 var->type, false);
2032 count -= chan / 4;
2033 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2034 &ctx->ac, ctx->locals + idx + chan, count,
2035 stride, true, true);
2036
2037 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2038 tmp_vec,
2039 indir_index, "");
2040 } else {
2041 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2042 }
2043 }
2044 break;
2045 case nir_var_mem_shared: {
2046 LLVMValueRef address = get_src(ctx, instr->src[0]);
2047 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2048 return LLVMBuildBitCast(ctx->ac.builder, val,
2049 get_def_type(ctx, &instr->dest.ssa),
2050 "");
2051 }
2052 case nir_var_shader_out:
2053 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2054 return load_tess_varyings(ctx, instr, false);
2055 }
2056
2057 for (unsigned chan = comp; chan < ve + comp; chan++) {
2058 if (indir_index) {
2059 unsigned count = glsl_count_attribute_slots(
2060 var->type, false);
2061 count -= chan / 4;
2062 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2063 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2064 stride, true, true);
2065
2066 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2067 tmp_vec,
2068 indir_index, "");
2069 } else {
2070 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2071 ctx->abi->outputs[idx + chan + const_index * stride],
2072 "");
2073 }
2074 }
2075 break;
2076 case nir_var_mem_global: {
2077 LLVMValueRef address = get_src(ctx, instr->src[0]);
2078 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2079 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2080 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2081
2082 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2083 if (stride != natural_stride) {
2084 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2085 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2086 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2087
2088 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2089 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2090 values[i] = LLVMBuildLoad(ctx->ac.builder,
2091 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2092 }
2093 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2094 } else {
2095 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2096 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2097 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2098 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2099 return val;
2100 }
2101 }
2102 default:
2103 unreachable("unhandle variable mode");
2104 }
2105 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2106 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2107 }
2108
2109 static void
2110 visit_store_var(struct ac_nir_context *ctx,
2111 nir_intrinsic_instr *instr)
2112 {
2113 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2114 nir_variable *var = nir_deref_instr_get_variable(deref);
2115
2116 LLVMValueRef temp_ptr, value;
2117 int idx = 0;
2118 unsigned comp = 0;
2119 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2120 int writemask = instr->const_index[0];
2121 LLVMValueRef indir_index;
2122 unsigned const_index;
2123
2124 if (var) {
2125 get_deref_offset(ctx, deref, false,
2126 NULL, NULL, &const_index, &indir_index);
2127 idx = var->data.driver_location;
2128 comp = var->data.location_frac;
2129
2130 if (var->data.compact) {
2131 const_index += comp;
2132 comp = 0;
2133 }
2134 }
2135
2136 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2137 (deref->mode == nir_var_shader_out ||
2138 deref->mode == nir_var_function_temp)) {
2139
2140 src = LLVMBuildBitCast(ctx->ac.builder, src,
2141 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2142 "");
2143
2144 writemask = widen_mask(writemask, 2);
2145 }
2146
2147 writemask = writemask << comp;
2148
2149 switch (deref->mode) {
2150 case nir_var_shader_out:
2151
2152 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2153 LLVMValueRef vertex_index = NULL;
2154 LLVMValueRef indir_index = NULL;
2155 unsigned const_index = 0;
2156 const bool is_patch = var->data.patch;
2157
2158 get_deref_offset(ctx, deref, false, NULL,
2159 is_patch ? NULL : &vertex_index,
2160 &const_index, &indir_index);
2161
2162 ctx->abi->store_tcs_outputs(ctx->abi, var,
2163 vertex_index, indir_index,
2164 const_index, src, writemask);
2165 return;
2166 }
2167
2168 for (unsigned chan = 0; chan < 8; chan++) {
2169 int stride = 4;
2170 if (!(writemask & (1 << chan)))
2171 continue;
2172
2173 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2174
2175 if (var->data.compact)
2176 stride = 1;
2177 if (indir_index) {
2178 unsigned count = glsl_count_attribute_slots(
2179 var->type, false);
2180 count -= chan / 4;
2181 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2182 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2183 stride, true, true);
2184
2185 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2186 value, indir_index, "");
2187 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2188 count, stride, tmp_vec);
2189
2190 } else {
2191 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2192
2193 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2194 }
2195 }
2196 break;
2197 case nir_var_function_temp:
2198 for (unsigned chan = 0; chan < 8; chan++) {
2199 if (!(writemask & (1 << chan)))
2200 continue;
2201
2202 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2203 if (indir_index) {
2204 unsigned count = glsl_count_attribute_slots(
2205 var->type, false);
2206 count -= chan / 4;
2207 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2208 &ctx->ac, ctx->locals + idx + chan, count,
2209 4, true, true);
2210
2211 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2212 value, indir_index, "");
2213 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2214 count, 4, tmp_vec);
2215 } else {
2216 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2217
2218 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2219 }
2220 }
2221 break;
2222
2223 case nir_var_mem_global:
2224 case nir_var_mem_shared: {
2225 int writemask = instr->const_index[0];
2226 LLVMValueRef address = get_src(ctx, instr->src[0]);
2227 LLVMValueRef val = get_src(ctx, instr->src[1]);
2228
2229 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2230 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2231 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2232
2233 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2234 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2235 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2236
2237 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2238 stride == natural_stride) {
2239 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2240 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2241 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2242
2243 val = LLVMBuildBitCast(ctx->ac.builder, val,
2244 LLVMGetElementType(LLVMTypeOf(address)), "");
2245 LLVMBuildStore(ctx->ac.builder, val, address);
2246 } else {
2247 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2248 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2249 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2250 for (unsigned chan = 0; chan < 4; chan++) {
2251 if (!(writemask & (1 << chan)))
2252 continue;
2253
2254 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2255
2256 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2257 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2258 chan);
2259 src = LLVMBuildBitCast(ctx->ac.builder, src,
2260 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2261 LLVMBuildStore(ctx->ac.builder, src, ptr);
2262 }
2263 }
2264 break;
2265 }
2266 default:
2267 abort();
2268 break;
2269 }
2270 }
2271
2272 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2273 {
2274 switch (dim) {
2275 case GLSL_SAMPLER_DIM_BUF:
2276 return 1;
2277 case GLSL_SAMPLER_DIM_1D:
2278 return array ? 2 : 1;
2279 case GLSL_SAMPLER_DIM_2D:
2280 return array ? 3 : 2;
2281 case GLSL_SAMPLER_DIM_MS:
2282 return array ? 4 : 3;
2283 case GLSL_SAMPLER_DIM_3D:
2284 case GLSL_SAMPLER_DIM_CUBE:
2285 return 3;
2286 case GLSL_SAMPLER_DIM_RECT:
2287 case GLSL_SAMPLER_DIM_SUBPASS:
2288 return 2;
2289 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2290 return 3;
2291 default:
2292 break;
2293 }
2294 return 0;
2295 }
2296
2297 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2298 LLVMValueRef coord_x, LLVMValueRef coord_y,
2299 LLVMValueRef coord_z,
2300 LLVMValueRef sample_index,
2301 LLVMValueRef fmask_desc_ptr)
2302 {
2303 unsigned sample_chan = coord_z ? 3 : 2;
2304 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2305 addr[sample_chan] = sample_index;
2306
2307 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2308 return addr[sample_chan];
2309 }
2310
2311 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2312 {
2313 assert(instr->src[0].is_ssa);
2314 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2315 }
2316
2317 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2318 const nir_intrinsic_instr *instr,
2319 enum ac_descriptor_type desc_type,
2320 bool write)
2321 {
2322 nir_deref_instr *deref_instr =
2323 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2324 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2325
2326 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2327 }
2328
2329 static void get_image_coords(struct ac_nir_context *ctx,
2330 const nir_intrinsic_instr *instr,
2331 struct ac_image_args *args,
2332 enum glsl_sampler_dim dim,
2333 bool is_array)
2334 {
2335 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2336 LLVMValueRef masks[] = {
2337 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2338 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2339 };
2340 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2341
2342 int count;
2343 bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2344 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2345 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2346 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2347 bool gfx9_1d = ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2348 count = image_type_to_components_count(dim, is_array);
2349
2350 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2351 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2352 LLVMValueRef fmask_load_address[3];
2353 int chan;
2354
2355 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2356 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2357 if (is_array)
2358 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2359 else
2360 fmask_load_address[2] = NULL;
2361 if (add_frag_pos) {
2362 for (chan = 0; chan < 2; ++chan)
2363 fmask_load_address[chan] =
2364 LLVMBuildAdd(ctx->ac.builder, fmask_load_address[chan],
2365 LLVMBuildFPToUI(ctx->ac.builder, ctx->abi->frag_pos[chan],
2366 ctx->ac.i32, ""), "");
2367 fmask_load_address[2] = ac_to_integer(&ctx->ac, ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2368 }
2369 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2370 fmask_load_address[0],
2371 fmask_load_address[1],
2372 fmask_load_address[2],
2373 sample_index,
2374 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2375 AC_DESC_FMASK, &instr->instr, false, false));
2376 }
2377 if (count == 1 && !gfx9_1d) {
2378 if (instr->src[1].ssa->num_components)
2379 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2380 else
2381 args->coords[0] = src0;
2382 } else {
2383 int chan;
2384 if (is_ms)
2385 count--;
2386 for (chan = 0; chan < count; ++chan) {
2387 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2388 }
2389 if (add_frag_pos) {
2390 for (chan = 0; chan < 2; ++chan) {
2391 args->coords[chan] = LLVMBuildAdd(
2392 ctx->ac.builder, args->coords[chan],
2393 LLVMBuildFPToUI(
2394 ctx->ac.builder, ctx->abi->frag_pos[chan],
2395 ctx->ac.i32, ""), "");
2396 }
2397 args->coords[2] = ac_to_integer(&ctx->ac,
2398 ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2399 count++;
2400 }
2401
2402 if (gfx9_1d) {
2403 if (is_array) {
2404 args->coords[2] = args->coords[1];
2405 args->coords[1] = ctx->ac.i32_0;
2406 } else
2407 args->coords[1] = ctx->ac.i32_0;
2408 count++;
2409 }
2410
2411 if (is_ms) {
2412 args->coords[count] = sample_index;
2413 count++;
2414 }
2415 }
2416 }
2417
2418 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2419 const nir_intrinsic_instr *instr,
2420 bool write, bool atomic)
2421 {
2422 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2423 if (ctx->abi->gfx9_stride_size_workaround ||
2424 (ctx->abi->gfx9_stride_size_workaround_for_atomic && atomic)) {
2425 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2426 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2427 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2428
2429 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2430 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2431 elem_count, stride, "");
2432
2433 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2434 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2435 }
2436 return rsrc;
2437 }
2438
2439 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2440 const nir_intrinsic_instr *instr,
2441 bool bindless)
2442 {
2443 LLVMValueRef res;
2444
2445 enum glsl_sampler_dim dim;
2446 enum gl_access_qualifier access;
2447 bool is_array;
2448 if (bindless) {
2449 dim = nir_intrinsic_image_dim(instr);
2450 access = nir_intrinsic_access(instr);
2451 is_array = nir_intrinsic_image_array(instr);
2452 } else {
2453 const nir_deref_instr *image_deref = get_image_deref(instr);
2454 const struct glsl_type *type = image_deref->type;
2455 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2456 dim = glsl_get_sampler_dim(type);
2457 access = var->data.image.access;
2458 is_array = glsl_sampler_type_is_array(type);
2459 }
2460
2461 struct ac_image_args args = {};
2462
2463 args.cache_policy = get_cache_policy(ctx, access, false, false);
2464
2465 if (dim == GLSL_SAMPLER_DIM_BUF) {
2466 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2467 unsigned num_channels = util_last_bit(mask);
2468 LLVMValueRef rsrc, vindex;
2469
2470 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2471 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2472 ctx->ac.i32_0, "");
2473
2474 /* TODO: set "can_speculate" when OpenGL needs it. */
2475 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2476 ctx->ac.i32_0, num_channels,
2477 !!(args.cache_policy & ac_glc),
2478 false);
2479 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2480
2481 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2482 res = ac_to_integer(&ctx->ac, res);
2483 } else {
2484 args.opcode = ac_image_load;
2485 get_image_coords(ctx, instr, &args, dim, is_array);
2486 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2487 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2488 args.dmask = 15;
2489 args.attributes = AC_FUNC_ATTR_READONLY;
2490
2491 res = ac_build_image_opcode(&ctx->ac, &args);
2492 }
2493 return res;
2494 }
2495
2496 static void visit_image_store(struct ac_nir_context *ctx,
2497 nir_intrinsic_instr *instr,
2498 bool bindless)
2499 {
2500
2501
2502 enum glsl_sampler_dim dim;
2503 enum gl_access_qualifier access;
2504 bool is_array;
2505 if (bindless) {
2506 dim = nir_intrinsic_image_dim(instr);
2507 access = nir_intrinsic_access(instr);
2508 is_array = nir_intrinsic_image_array(instr);
2509 } else {
2510 const nir_deref_instr *image_deref = get_image_deref(instr);
2511 const struct glsl_type *type = image_deref->type;
2512 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2513 dim = glsl_get_sampler_dim(type);
2514 access = var->data.image.access;
2515 is_array = glsl_sampler_type_is_array(type);
2516 }
2517
2518 bool writeonly_memory = access & ACCESS_NON_READABLE;
2519 struct ac_image_args args = {};
2520
2521 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2522
2523 if (dim == GLSL_SAMPLER_DIM_BUF) {
2524 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2525 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2526 unsigned src_channels = ac_get_llvm_num_components(src);
2527 LLVMValueRef vindex;
2528
2529 if (src_channels == 3)
2530 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2531
2532 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2533 get_src(ctx, instr->src[1]),
2534 ctx->ac.i32_0, "");
2535
2536 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2537 ctx->ac.i32_0, src_channels,
2538 args.cache_policy & ac_glc,
2539 writeonly_memory);
2540 } else {
2541 args.opcode = ac_image_store;
2542 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2543 get_image_coords(ctx, instr, &args, dim, is_array);
2544 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2545 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2546 args.dmask = 15;
2547
2548 ac_build_image_opcode(&ctx->ac, &args);
2549 }
2550
2551 }
2552
2553 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2554 const nir_intrinsic_instr *instr,
2555 bool bindless)
2556 {
2557 LLVMValueRef params[7];
2558 int param_count = 0;
2559
2560 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2561 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2562 const char *atomic_name;
2563 char intrinsic_name[64];
2564 enum ac_atomic_op atomic_subop;
2565 MAYBE_UNUSED int length;
2566
2567 enum glsl_sampler_dim dim;
2568 bool is_unsigned = false;
2569 bool is_array;
2570 if (bindless) {
2571 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_min ||
2572 instr->intrinsic == nir_intrinsic_bindless_image_atomic_max) {
2573 const GLenum format = nir_intrinsic_format(instr);
2574 assert(format == GL_R32UI || format == GL_R32I);
2575 is_unsigned = format == GL_R32UI;
2576 }
2577 dim = nir_intrinsic_image_dim(instr);
2578 is_array = nir_intrinsic_image_array(instr);
2579 } else {
2580 const struct glsl_type *type = get_image_deref(instr)->type;
2581 is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2582 dim = glsl_get_sampler_dim(type);
2583 is_array = glsl_sampler_type_is_array(type);
2584 }
2585
2586 switch (instr->intrinsic) {
2587 case nir_intrinsic_bindless_image_atomic_add:
2588 case nir_intrinsic_image_deref_atomic_add:
2589 atomic_name = "add";
2590 atomic_subop = ac_atomic_add;
2591 break;
2592 case nir_intrinsic_bindless_image_atomic_min:
2593 case nir_intrinsic_image_deref_atomic_min:
2594 atomic_name = is_unsigned ? "umin" : "smin";
2595 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2596 break;
2597 case nir_intrinsic_bindless_image_atomic_max:
2598 case nir_intrinsic_image_deref_atomic_max:
2599 atomic_name = is_unsigned ? "umax" : "smax";
2600 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2601 break;
2602 case nir_intrinsic_bindless_image_atomic_and:
2603 case nir_intrinsic_image_deref_atomic_and:
2604 atomic_name = "and";
2605 atomic_subop = ac_atomic_and;
2606 break;
2607 case nir_intrinsic_bindless_image_atomic_or:
2608 case nir_intrinsic_image_deref_atomic_or:
2609 atomic_name = "or";
2610 atomic_subop = ac_atomic_or;
2611 break;
2612 case nir_intrinsic_bindless_image_atomic_xor:
2613 case nir_intrinsic_image_deref_atomic_xor:
2614 atomic_name = "xor";
2615 atomic_subop = ac_atomic_xor;
2616 break;
2617 case nir_intrinsic_bindless_image_atomic_exchange:
2618 case nir_intrinsic_image_deref_atomic_exchange:
2619 atomic_name = "swap";
2620 atomic_subop = ac_atomic_swap;
2621 break;
2622 case nir_intrinsic_bindless_image_atomic_comp_swap:
2623 case nir_intrinsic_image_deref_atomic_comp_swap:
2624 atomic_name = "cmpswap";
2625 atomic_subop = 0; /* not used */
2626 break;
2627 default:
2628 abort();
2629 }
2630
2631 if (cmpswap)
2632 params[param_count++] = get_src(ctx, instr->src[4]);
2633 params[param_count++] = get_src(ctx, instr->src[3]);
2634
2635 if (dim == GLSL_SAMPLER_DIM_BUF) {
2636 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2637 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2638 ctx->ac.i32_0, ""); /* vindex */
2639 params[param_count++] = ctx->ac.i32_0; /* voffset */
2640 if (HAVE_LLVM >= 0x900) {
2641 /* XXX: The new raw/struct atomic intrinsics are buggy
2642 * with LLVM 8, see r358579.
2643 */
2644 params[param_count++] = ctx->ac.i32_0; /* soffset */
2645 params[param_count++] = ctx->ac.i32_0; /* slc */
2646
2647 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2648 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2649 } else {
2650 params[param_count++] = ctx->ac.i1false; /* slc */
2651
2652 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2653 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2654 }
2655
2656 assert(length < sizeof(intrinsic_name));
2657 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2658 params, param_count, 0);
2659 } else {
2660 struct ac_image_args args = {};
2661 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2662 args.atomic = atomic_subop;
2663 args.data[0] = params[0];
2664 if (cmpswap)
2665 args.data[1] = params[1];
2666 get_image_coords(ctx, instr, &args, dim, is_array);
2667 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2668 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2669
2670 return ac_build_image_opcode(&ctx->ac, &args);
2671 }
2672 }
2673
2674 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2675 const nir_intrinsic_instr *instr,
2676 bool bindless)
2677 {
2678 enum glsl_sampler_dim dim;
2679 bool is_array;
2680 if (bindless) {
2681 dim = nir_intrinsic_image_dim(instr);
2682 is_array = nir_intrinsic_image_array(instr);
2683 } else {
2684 const struct glsl_type *type = get_image_deref(instr)->type;
2685 dim = glsl_get_sampler_dim(type);
2686 is_array = glsl_sampler_type_is_array(type);
2687 }
2688
2689 struct ac_image_args args = { 0 };
2690 args.dim = get_ac_sampler_dim(&ctx->ac, dim, is_array);
2691 args.dmask = 0xf;
2692 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2693 args.opcode = ac_image_get_resinfo;
2694 args.lod = ctx->ac.i32_0;
2695 args.attributes = AC_FUNC_ATTR_READNONE;
2696
2697 return ac_build_image_opcode(&ctx->ac, &args);
2698 }
2699
2700 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2701 const nir_intrinsic_instr *instr,
2702 bool bindless)
2703 {
2704 LLVMValueRef res;
2705
2706 enum glsl_sampler_dim dim;
2707 bool is_array;
2708 if (bindless) {
2709 dim = nir_intrinsic_image_dim(instr);
2710 is_array = nir_intrinsic_image_array(instr);
2711 } else {
2712 const struct glsl_type *type = get_image_deref(instr)->type;
2713 dim = glsl_get_sampler_dim(type);
2714 is_array = glsl_sampler_type_is_array(type);
2715 }
2716
2717 if (dim == GLSL_SAMPLER_DIM_BUF)
2718 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2719
2720 struct ac_image_args args = { 0 };
2721
2722 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2723 args.dmask = 0xf;
2724 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2725 args.opcode = ac_image_get_resinfo;
2726 args.lod = ctx->ac.i32_0;
2727 args.attributes = AC_FUNC_ATTR_READNONE;
2728
2729 res = ac_build_image_opcode(&ctx->ac, &args);
2730
2731 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2732
2733 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2734 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2735 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2736 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2737 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2738 }
2739 if (ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2740 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2741 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2742 ctx->ac.i32_1, "");
2743
2744 }
2745 return res;
2746 }
2747
2748 static void emit_membar(struct ac_llvm_context *ac,
2749 const nir_intrinsic_instr *instr)
2750 {
2751 unsigned waitcnt = NOOP_WAITCNT;
2752
2753 switch (instr->intrinsic) {
2754 case nir_intrinsic_memory_barrier:
2755 case nir_intrinsic_group_memory_barrier:
2756 waitcnt &= VM_CNT & LGKM_CNT;
2757 break;
2758 case nir_intrinsic_memory_barrier_atomic_counter:
2759 case nir_intrinsic_memory_barrier_buffer:
2760 case nir_intrinsic_memory_barrier_image:
2761 waitcnt &= VM_CNT;
2762 break;
2763 case nir_intrinsic_memory_barrier_shared:
2764 waitcnt &= LGKM_CNT;
2765 break;
2766 default:
2767 break;
2768 }
2769 if (waitcnt != NOOP_WAITCNT)
2770 ac_build_waitcnt(ac, waitcnt);
2771 }
2772
2773 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2774 {
2775 /* GFX6 only (thanks to a hw bug workaround):
2776 * The real barrier instruction isn’t needed, because an entire patch
2777 * always fits into a single wave.
2778 */
2779 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2780 ac_build_waitcnt(ac, LGKM_CNT & VM_CNT);
2781 return;
2782 }
2783 ac_build_s_barrier(ac);
2784 }
2785
2786 static void emit_discard(struct ac_nir_context *ctx,
2787 const nir_intrinsic_instr *instr)
2788 {
2789 LLVMValueRef cond;
2790
2791 if (instr->intrinsic == nir_intrinsic_discard_if) {
2792 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2793 get_src(ctx, instr->src[0]),
2794 ctx->ac.i32_0, "");
2795 } else {
2796 assert(instr->intrinsic == nir_intrinsic_discard);
2797 cond = ctx->ac.i1false;
2798 }
2799
2800 ctx->abi->emit_kill(ctx->abi, cond);
2801 }
2802
2803 static LLVMValueRef
2804 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2805 {
2806 LLVMValueRef result;
2807 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2808 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2809 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2810
2811 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2812 }
2813
2814 static LLVMValueRef
2815 visit_load_subgroup_id(struct ac_nir_context *ctx)
2816 {
2817 if (ctx->stage == MESA_SHADER_COMPUTE) {
2818 LLVMValueRef result;
2819 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2820 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2821 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2822 } else {
2823 return LLVMConstInt(ctx->ac.i32, 0, false);
2824 }
2825 }
2826
2827 static LLVMValueRef
2828 visit_load_num_subgroups(struct ac_nir_context *ctx)
2829 {
2830 if (ctx->stage == MESA_SHADER_COMPUTE) {
2831 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2832 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2833 } else {
2834 return LLVMConstInt(ctx->ac.i32, 1, false);
2835 }
2836 }
2837
2838 static LLVMValueRef
2839 visit_first_invocation(struct ac_nir_context *ctx)
2840 {
2841 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2842
2843 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2844 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2845 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2846 "llvm.cttz.i64",
2847 ctx->ac.i64, args, 2,
2848 AC_FUNC_ATTR_NOUNWIND |
2849 AC_FUNC_ATTR_READNONE);
2850
2851 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2852 }
2853
2854 static LLVMValueRef
2855 visit_load_shared(struct ac_nir_context *ctx,
2856 const nir_intrinsic_instr *instr)
2857 {
2858 LLVMValueRef values[4], derived_ptr, index, ret;
2859
2860 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2861
2862 for (int chan = 0; chan < instr->num_components; chan++) {
2863 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2864 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2865 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2866 }
2867
2868 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2869 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2870 }
2871
2872 static void
2873 visit_store_shared(struct ac_nir_context *ctx,
2874 const nir_intrinsic_instr *instr)
2875 {
2876 LLVMValueRef derived_ptr, data,index;
2877 LLVMBuilderRef builder = ctx->ac.builder;
2878
2879 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2880 LLVMValueRef src = get_src(ctx, instr->src[0]);
2881
2882 int writemask = nir_intrinsic_write_mask(instr);
2883 for (int chan = 0; chan < 4; chan++) {
2884 if (!(writemask & (1 << chan))) {
2885 continue;
2886 }
2887 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2888 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2889 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2890 LLVMBuildStore(builder, data, derived_ptr);
2891 }
2892 }
2893
2894 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2895 const nir_intrinsic_instr *instr,
2896 LLVMValueRef ptr, int src_idx)
2897 {
2898 LLVMValueRef result;
2899 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2900
2901 const char *sync_scope = HAVE_LLVM >= 0x0900 ? "workgroup-one-as" : "workgroup";
2902
2903 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2904 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2905 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2906 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
2907 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2908 } else {
2909 LLVMAtomicRMWBinOp op;
2910 switch (instr->intrinsic) {
2911 case nir_intrinsic_shared_atomic_add:
2912 case nir_intrinsic_deref_atomic_add:
2913 op = LLVMAtomicRMWBinOpAdd;
2914 break;
2915 case nir_intrinsic_shared_atomic_umin:
2916 case nir_intrinsic_deref_atomic_umin:
2917 op = LLVMAtomicRMWBinOpUMin;
2918 break;
2919 case nir_intrinsic_shared_atomic_umax:
2920 case nir_intrinsic_deref_atomic_umax:
2921 op = LLVMAtomicRMWBinOpUMax;
2922 break;
2923 case nir_intrinsic_shared_atomic_imin:
2924 case nir_intrinsic_deref_atomic_imin:
2925 op = LLVMAtomicRMWBinOpMin;
2926 break;
2927 case nir_intrinsic_shared_atomic_imax:
2928 case nir_intrinsic_deref_atomic_imax:
2929 op = LLVMAtomicRMWBinOpMax;
2930 break;
2931 case nir_intrinsic_shared_atomic_and:
2932 case nir_intrinsic_deref_atomic_and:
2933 op = LLVMAtomicRMWBinOpAnd;
2934 break;
2935 case nir_intrinsic_shared_atomic_or:
2936 case nir_intrinsic_deref_atomic_or:
2937 op = LLVMAtomicRMWBinOpOr;
2938 break;
2939 case nir_intrinsic_shared_atomic_xor:
2940 case nir_intrinsic_deref_atomic_xor:
2941 op = LLVMAtomicRMWBinOpXor;
2942 break;
2943 case nir_intrinsic_shared_atomic_exchange:
2944 case nir_intrinsic_deref_atomic_exchange:
2945 op = LLVMAtomicRMWBinOpXchg;
2946 break;
2947 default:
2948 return NULL;
2949 }
2950
2951 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
2952 }
2953 return result;
2954 }
2955
2956 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
2957 {
2958 LLVMValueRef values[2];
2959 LLVMValueRef pos[2];
2960
2961 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
2962 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
2963
2964 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
2965 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
2966 return ac_build_gather_values(&ctx->ac, values, 2);
2967 }
2968
2969 static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
2970 const nir_intrinsic_instr *instr)
2971 {
2972 LLVMValueRef result[4];
2973 LLVMValueRef interp_param;
2974 unsigned location;
2975 unsigned chan;
2976 LLVMValueRef src_c0 = NULL;
2977 LLVMValueRef src_c1 = NULL;
2978 LLVMValueRef src0 = NULL;
2979
2980 nir_deref_instr *deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2981 nir_variable *var = nir_deref_instr_get_variable(deref_instr);
2982 int input_base = ctx->abi->fs_input_attr_indices[var->data.location - VARYING_SLOT_VAR0];
2983 switch (instr->intrinsic) {
2984 case nir_intrinsic_interp_deref_at_centroid:
2985 location = INTERP_CENTROID;
2986 break;
2987 case nir_intrinsic_interp_deref_at_sample:
2988 case nir_intrinsic_interp_deref_at_offset:
2989 location = INTERP_CENTER;
2990 src0 = get_src(ctx, instr->src[1]);
2991 break;
2992 default:
2993 break;
2994 }
2995
2996 if (instr->intrinsic == nir_intrinsic_interp_deref_at_offset) {
2997 src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_0, ""));
2998 src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_1, ""));
2999 } else if (instr->intrinsic == nir_intrinsic_interp_deref_at_sample) {
3000 LLVMValueRef sample_position;
3001 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3002
3003 /* fetch sample ID */
3004 sample_position = ctx->abi->load_sample_position(ctx->abi, src0);
3005
3006 src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_0, "");
3007 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3008 src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_1, "");
3009 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3010 }
3011 interp_param = ctx->abi->lookup_interp_param(ctx->abi, var->data.interpolation, location);
3012
3013 if (location == INTERP_CENTER) {
3014 LLVMValueRef ij_out[2];
3015 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3016
3017 /*
3018 * take the I then J parameters, and the DDX/Y for it, and
3019 * calculate the IJ inputs for the interpolator.
3020 * temp1 = ddx * offset/sample.x + I;
3021 * interp_param.I = ddy * offset/sample.y + temp1;
3022 * temp1 = ddx * offset/sample.x + J;
3023 * interp_param.J = ddy * offset/sample.y + temp1;
3024 */
3025 for (unsigned i = 0; i < 2; i++) {
3026 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3027 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3028 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3029 ddxy_out, ix_ll, "");
3030 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3031 ddxy_out, iy_ll, "");
3032 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3033 interp_param, ix_ll, "");
3034 LLVMValueRef temp1, temp2;
3035
3036 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3037 ctx->ac.f32, "");
3038
3039 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3040 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3041
3042 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3043 temp2, ctx->ac.i32, "");
3044 }
3045 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3046
3047 }
3048
3049 LLVMValueRef attrib_idx = ctx->ac.i32_0;
3050 while(deref_instr->deref_type != nir_deref_type_var) {
3051 if (deref_instr->deref_type == nir_deref_type_array) {
3052 unsigned array_size = glsl_count_attribute_slots(deref_instr->type, false);
3053
3054 LLVMValueRef offset;
3055 if (nir_src_is_const(deref_instr->arr.index)) {
3056 offset = LLVMConstInt(ctx->ac.i32, array_size * nir_src_as_uint(deref_instr->arr.index), false);
3057 } else {
3058 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3059
3060 offset = LLVMBuildMul(ctx->ac.builder, indirect,
3061 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3062 }
3063
3064 attrib_idx = LLVMBuildAdd(ctx->ac.builder, attrib_idx, offset, "");
3065 deref_instr = nir_src_as_deref(deref_instr->parent);
3066 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3067 LLVMValueRef offset;
3068 unsigned sidx = deref_instr->strct.index;
3069 deref_instr = nir_src_as_deref(deref_instr->parent);
3070 offset = LLVMConstInt(ctx->ac.i32, glsl_get_struct_location_offset(deref_instr->type, sidx), false);
3071 attrib_idx = LLVMBuildAdd(ctx->ac.builder, attrib_idx, offset, "");
3072 } else {
3073 unreachable("Unsupported deref type");
3074 }
3075
3076 }
3077
3078 unsigned attrib_size = glsl_count_attribute_slots(var->type, false);
3079 for (chan = 0; chan < 4; chan++) {
3080 LLVMValueRef gather = LLVMGetUndef(LLVMVectorType(ctx->ac.f32, attrib_size));
3081 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false);
3082
3083 for (unsigned idx = 0; idx < attrib_size; ++idx) {
3084 LLVMValueRef v, attr_number;
3085
3086 attr_number = LLVMConstInt(ctx->ac.i32, input_base + idx, false);
3087 if (interp_param) {
3088 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3089 interp_param, ctx->ac.v2f32, "");
3090 LLVMValueRef i = LLVMBuildExtractElement(
3091 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3092 LLVMValueRef j = LLVMBuildExtractElement(
3093 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3094
3095 v = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3096 ctx->abi->prim_mask, i, j);
3097 } else {
3098 v = ac_build_fs_interp_mov(&ctx->ac, LLVMConstInt(ctx->ac.i32, 2, false),
3099 llvm_chan, attr_number, ctx->abi->prim_mask);
3100 }
3101
3102 gather = LLVMBuildInsertElement(ctx->ac.builder, gather, v,
3103 LLVMConstInt(ctx->ac.i32, idx, false), "");
3104 }
3105
3106 result[chan] = LLVMBuildExtractElement(ctx->ac.builder, gather, attrib_idx, "");
3107
3108 }
3109 return ac_build_varying_gather_values(&ctx->ac, result, instr->num_components,
3110 var->data.location_frac);
3111 }
3112
3113 static void visit_intrinsic(struct ac_nir_context *ctx,
3114 nir_intrinsic_instr *instr)
3115 {
3116 LLVMValueRef result = NULL;
3117
3118 switch (instr->intrinsic) {
3119 case nir_intrinsic_ballot:
3120 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3121 break;
3122 case nir_intrinsic_read_invocation:
3123 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3124 get_src(ctx, instr->src[1]));
3125 break;
3126 case nir_intrinsic_read_first_invocation:
3127 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3128 break;
3129 case nir_intrinsic_load_subgroup_invocation:
3130 result = ac_get_thread_id(&ctx->ac);
3131 break;
3132 case nir_intrinsic_load_work_group_id: {
3133 LLVMValueRef values[3];
3134
3135 for (int i = 0; i < 3; i++) {
3136 values[i] = ctx->abi->workgroup_ids[i] ?
3137 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3138 }
3139
3140 result = ac_build_gather_values(&ctx->ac, values, 3);
3141 break;
3142 }
3143 case nir_intrinsic_load_base_vertex:
3144 case nir_intrinsic_load_first_vertex:
3145 result = ctx->abi->load_base_vertex(ctx->abi);
3146 break;
3147 case nir_intrinsic_load_local_group_size:
3148 result = ctx->abi->load_local_group_size(ctx->abi);
3149 break;
3150 case nir_intrinsic_load_vertex_id:
3151 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3152 ctx->abi->base_vertex, "");
3153 break;
3154 case nir_intrinsic_load_vertex_id_zero_base: {
3155 result = ctx->abi->vertex_id;
3156 break;
3157 }
3158 case nir_intrinsic_load_local_invocation_id: {
3159 result = ctx->abi->local_invocation_ids;
3160 break;
3161 }
3162 case nir_intrinsic_load_base_instance:
3163 result = ctx->abi->start_instance;
3164 break;
3165 case nir_intrinsic_load_draw_id:
3166 result = ctx->abi->draw_id;
3167 break;
3168 case nir_intrinsic_load_view_index:
3169 result = ctx->abi->view_index;
3170 break;
3171 case nir_intrinsic_load_invocation_id:
3172 if (ctx->stage == MESA_SHADER_TESS_CTRL)
3173 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3174 else
3175 result = ctx->abi->gs_invocation_id;
3176 break;
3177 case nir_intrinsic_load_primitive_id:
3178 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3179 result = ctx->abi->gs_prim_id;
3180 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3181 result = ctx->abi->tcs_patch_id;
3182 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3183 result = ctx->abi->tes_patch_id;
3184 } else
3185 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3186 break;
3187 case nir_intrinsic_load_sample_id:
3188 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3189 break;
3190 case nir_intrinsic_load_sample_pos:
3191 result = load_sample_pos(ctx);
3192 break;
3193 case nir_intrinsic_load_sample_mask_in:
3194 result = ctx->abi->load_sample_mask_in(ctx->abi);
3195 break;
3196 case nir_intrinsic_load_frag_coord: {
3197 LLVMValueRef values[4] = {
3198 ctx->abi->frag_pos[0],
3199 ctx->abi->frag_pos[1],
3200 ctx->abi->frag_pos[2],
3201 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3202 };
3203 result = ac_to_integer(&ctx->ac,
3204 ac_build_gather_values(&ctx->ac, values, 4));
3205 break;
3206 }
3207 case nir_intrinsic_load_front_face:
3208 result = ctx->abi->front_face;
3209 break;
3210 case nir_intrinsic_load_helper_invocation:
3211 result = ac_build_load_helper_invocation(&ctx->ac);
3212 break;
3213 case nir_intrinsic_load_instance_id:
3214 result = ctx->abi->instance_id;
3215 break;
3216 case nir_intrinsic_load_num_work_groups:
3217 result = ctx->abi->num_work_groups;
3218 break;
3219 case nir_intrinsic_load_local_invocation_index:
3220 result = visit_load_local_invocation_index(ctx);
3221 break;
3222 case nir_intrinsic_load_subgroup_id:
3223 result = visit_load_subgroup_id(ctx);
3224 break;
3225 case nir_intrinsic_load_num_subgroups:
3226 result = visit_load_num_subgroups(ctx);
3227 break;
3228 case nir_intrinsic_first_invocation:
3229 result = visit_first_invocation(ctx);
3230 break;
3231 case nir_intrinsic_load_push_constant:
3232 result = visit_load_push_constant(ctx, instr);
3233 break;
3234 case nir_intrinsic_vulkan_resource_index: {
3235 LLVMValueRef index = get_src(ctx, instr->src[0]);
3236 unsigned desc_set = nir_intrinsic_desc_set(instr);
3237 unsigned binding = nir_intrinsic_binding(instr);
3238
3239 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3240 binding);
3241 break;
3242 }
3243 case nir_intrinsic_vulkan_resource_reindex:
3244 result = visit_vulkan_resource_reindex(ctx, instr);
3245 break;
3246 case nir_intrinsic_store_ssbo:
3247 visit_store_ssbo(ctx, instr);
3248 break;
3249 case nir_intrinsic_load_ssbo:
3250 result = visit_load_buffer(ctx, instr);
3251 break;
3252 case nir_intrinsic_ssbo_atomic_add:
3253 case nir_intrinsic_ssbo_atomic_imin:
3254 case nir_intrinsic_ssbo_atomic_umin:
3255 case nir_intrinsic_ssbo_atomic_imax:
3256 case nir_intrinsic_ssbo_atomic_umax:
3257 case nir_intrinsic_ssbo_atomic_and:
3258 case nir_intrinsic_ssbo_atomic_or:
3259 case nir_intrinsic_ssbo_atomic_xor:
3260 case nir_intrinsic_ssbo_atomic_exchange:
3261 case nir_intrinsic_ssbo_atomic_comp_swap:
3262 result = visit_atomic_ssbo(ctx, instr);
3263 break;
3264 case nir_intrinsic_load_ubo:
3265 result = visit_load_ubo_buffer(ctx, instr);
3266 break;
3267 case nir_intrinsic_get_buffer_size:
3268 result = visit_get_buffer_size(ctx, instr);
3269 break;
3270 case nir_intrinsic_load_deref:
3271 result = visit_load_var(ctx, instr);
3272 break;
3273 case nir_intrinsic_store_deref:
3274 visit_store_var(ctx, instr);
3275 break;
3276 case nir_intrinsic_load_shared:
3277 result = visit_load_shared(ctx, instr);
3278 break;
3279 case nir_intrinsic_store_shared:
3280 visit_store_shared(ctx, instr);
3281 break;
3282 case nir_intrinsic_bindless_image_samples:
3283 result = visit_image_samples(ctx, instr, true);
3284 break;
3285 case nir_intrinsic_image_deref_samples:
3286 result = visit_image_samples(ctx, instr, false);
3287 break;
3288 case nir_intrinsic_bindless_image_load:
3289 result = visit_image_load(ctx, instr, true);
3290 break;
3291 case nir_intrinsic_image_deref_load:
3292 result = visit_image_load(ctx, instr, false);
3293 break;
3294 case nir_intrinsic_bindless_image_store:
3295 visit_image_store(ctx, instr, true);
3296 break;
3297 case nir_intrinsic_image_deref_store:
3298 visit_image_store(ctx, instr, false);
3299 break;
3300 case nir_intrinsic_bindless_image_atomic_add:
3301 case nir_intrinsic_bindless_image_atomic_min:
3302 case nir_intrinsic_bindless_image_atomic_max:
3303 case nir_intrinsic_bindless_image_atomic_and:
3304 case nir_intrinsic_bindless_image_atomic_or:
3305 case nir_intrinsic_bindless_image_atomic_xor:
3306 case nir_intrinsic_bindless_image_atomic_exchange:
3307 case nir_intrinsic_bindless_image_atomic_comp_swap:
3308 result = visit_image_atomic(ctx, instr, true);
3309 break;
3310 case nir_intrinsic_image_deref_atomic_add:
3311 case nir_intrinsic_image_deref_atomic_min:
3312 case nir_intrinsic_image_deref_atomic_max:
3313 case nir_intrinsic_image_deref_atomic_and:
3314 case nir_intrinsic_image_deref_atomic_or:
3315 case nir_intrinsic_image_deref_atomic_xor:
3316 case nir_intrinsic_image_deref_atomic_exchange:
3317 case nir_intrinsic_image_deref_atomic_comp_swap:
3318 result = visit_image_atomic(ctx, instr, false);
3319 break;
3320 case nir_intrinsic_bindless_image_size:
3321 result = visit_image_size(ctx, instr, true);
3322 break;
3323 case nir_intrinsic_image_deref_size:
3324 result = visit_image_size(ctx, instr, false);
3325 break;
3326 case nir_intrinsic_shader_clock:
3327 result = ac_build_shader_clock(&ctx->ac);
3328 break;
3329 case nir_intrinsic_discard:
3330 case nir_intrinsic_discard_if:
3331 emit_discard(ctx, instr);
3332 break;
3333 case nir_intrinsic_memory_barrier:
3334 case nir_intrinsic_group_memory_barrier:
3335 case nir_intrinsic_memory_barrier_atomic_counter:
3336 case nir_intrinsic_memory_barrier_buffer:
3337 case nir_intrinsic_memory_barrier_image:
3338 case nir_intrinsic_memory_barrier_shared:
3339 emit_membar(&ctx->ac, instr);
3340 break;
3341 case nir_intrinsic_barrier:
3342 ac_emit_barrier(&ctx->ac, ctx->stage);
3343 break;
3344 case nir_intrinsic_shared_atomic_add:
3345 case nir_intrinsic_shared_atomic_imin:
3346 case nir_intrinsic_shared_atomic_umin:
3347 case nir_intrinsic_shared_atomic_imax:
3348 case nir_intrinsic_shared_atomic_umax:
3349 case nir_intrinsic_shared_atomic_and:
3350 case nir_intrinsic_shared_atomic_or:
3351 case nir_intrinsic_shared_atomic_xor:
3352 case nir_intrinsic_shared_atomic_exchange:
3353 case nir_intrinsic_shared_atomic_comp_swap: {
3354 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3355 result = visit_var_atomic(ctx, instr, ptr, 1);
3356 break;
3357 }
3358 case nir_intrinsic_deref_atomic_add:
3359 case nir_intrinsic_deref_atomic_imin:
3360 case nir_intrinsic_deref_atomic_umin:
3361 case nir_intrinsic_deref_atomic_imax:
3362 case nir_intrinsic_deref_atomic_umax:
3363 case nir_intrinsic_deref_atomic_and:
3364 case nir_intrinsic_deref_atomic_or:
3365 case nir_intrinsic_deref_atomic_xor:
3366 case nir_intrinsic_deref_atomic_exchange:
3367 case nir_intrinsic_deref_atomic_comp_swap: {
3368 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3369 result = visit_var_atomic(ctx, instr, ptr, 1);
3370 break;
3371 }
3372 case nir_intrinsic_interp_deref_at_centroid:
3373 case nir_intrinsic_interp_deref_at_sample:
3374 case nir_intrinsic_interp_deref_at_offset:
3375 result = visit_interp(ctx, instr);
3376 break;
3377 case nir_intrinsic_emit_vertex:
3378 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3379 break;
3380 case nir_intrinsic_end_primitive:
3381 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3382 break;
3383 case nir_intrinsic_load_tess_coord:
3384 result = ctx->abi->load_tess_coord(ctx->abi);
3385 break;
3386 case nir_intrinsic_load_tess_level_outer:
3387 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
3388 break;
3389 case nir_intrinsic_load_tess_level_inner:
3390 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
3391 break;
3392 case nir_intrinsic_load_patch_vertices_in:
3393 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3394 break;
3395 case nir_intrinsic_vote_all: {
3396 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3397 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3398 break;
3399 }
3400 case nir_intrinsic_vote_any: {
3401 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3402 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3403 break;
3404 }
3405 case nir_intrinsic_shuffle:
3406 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3407 get_src(ctx, instr->src[1]));
3408 break;
3409 case nir_intrinsic_reduce:
3410 result = ac_build_reduce(&ctx->ac,
3411 get_src(ctx, instr->src[0]),
3412 instr->const_index[0],
3413 instr->const_index[1]);
3414 break;
3415 case nir_intrinsic_inclusive_scan:
3416 result = ac_build_inclusive_scan(&ctx->ac,
3417 get_src(ctx, instr->src[0]),
3418 instr->const_index[0]);
3419 break;
3420 case nir_intrinsic_exclusive_scan:
3421 result = ac_build_exclusive_scan(&ctx->ac,
3422 get_src(ctx, instr->src[0]),
3423 instr->const_index[0]);
3424 break;
3425 case nir_intrinsic_quad_broadcast: {
3426 unsigned lane = nir_src_as_uint(instr->src[1]);
3427 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3428 lane, lane, lane, lane);
3429 break;
3430 }
3431 case nir_intrinsic_quad_swap_horizontal:
3432 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3433 break;
3434 case nir_intrinsic_quad_swap_vertical:
3435 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3436 break;
3437 case nir_intrinsic_quad_swap_diagonal:
3438 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3439 break;
3440 default:
3441 fprintf(stderr, "Unknown intrinsic: ");
3442 nir_print_instr(&instr->instr, stderr);
3443 fprintf(stderr, "\n");
3444 break;
3445 }
3446 if (result) {
3447 ctx->ssa_defs[instr->dest.ssa.index] = result;
3448 }
3449 }
3450
3451 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3452 unsigned base_index,
3453 unsigned constant_index,
3454 LLVMValueRef dynamic_index)
3455 {
3456 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3457 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3458 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3459
3460 /* Bindless uniforms are 64bit so multiple index by 8 */
3461 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3462 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3463
3464 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3465
3466 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3467 NULL, 0, false, false, true, true);
3468
3469 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3470 }
3471
3472 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3473 nir_deref_instr *deref_instr,
3474 enum ac_descriptor_type desc_type,
3475 const nir_instr *instr,
3476 bool image, bool write)
3477 {
3478 LLVMValueRef index = NULL;
3479 unsigned constant_index = 0;
3480 unsigned descriptor_set;
3481 unsigned base_index;
3482 bool bindless = false;
3483
3484 if (!deref_instr) {
3485 descriptor_set = 0;
3486 if (image) {
3487 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3488 base_index = 0;
3489 bindless = true;
3490 index = get_src(ctx, img_instr->src[0]);
3491 } else {
3492 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3493 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3494 nir_tex_src_sampler_handle);
3495 if (sampSrcIdx != -1) {
3496 base_index = 0;
3497 bindless = true;
3498 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3499 } else {
3500 assert(tex_instr && !image);
3501 base_index = tex_instr->sampler_index;
3502 }
3503 }
3504 } else {
3505 while(deref_instr->deref_type != nir_deref_type_var) {
3506 if (deref_instr->deref_type == nir_deref_type_array) {
3507 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3508 if (!array_size)
3509 array_size = 1;
3510
3511 if (nir_src_is_const(deref_instr->arr.index)) {
3512 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3513 } else {
3514 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3515
3516 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3517 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3518
3519 if (!index)
3520 index = indirect;
3521 else
3522 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3523 }
3524
3525 deref_instr = nir_src_as_deref(deref_instr->parent);
3526 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3527 unsigned sidx = deref_instr->strct.index;
3528 deref_instr = nir_src_as_deref(deref_instr->parent);
3529 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3530 } else {
3531 unreachable("Unsupported deref type");
3532 }
3533 }
3534 descriptor_set = deref_instr->var->data.descriptor_set;
3535
3536 if (deref_instr->var->data.bindless) {
3537 /* For now just assert on unhandled variable types */
3538 assert(deref_instr->var->data.mode == nir_var_uniform);
3539
3540 base_index = deref_instr->var->data.driver_location;
3541 bindless = true;
3542
3543 index = index ? index : ctx->ac.i32_0;
3544 index = get_bindless_index_from_uniform(ctx, base_index,
3545 constant_index, index);
3546 } else
3547 base_index = deref_instr->var->data.binding;
3548 }
3549
3550 return ctx->abi->load_sampler_desc(ctx->abi,
3551 descriptor_set,
3552 base_index,
3553 constant_index, index,
3554 desc_type, image, write, bindless);
3555 }
3556
3557 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3558 *
3559 * GFX6-GFX7:
3560 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3561 * filtering manually. The driver sets img7 to a mask clearing
3562 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3563 * s_and_b32 samp0, samp0, img7
3564 *
3565 * GFX8:
3566 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3567 */
3568 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3569 LLVMValueRef res, LLVMValueRef samp)
3570 {
3571 LLVMBuilderRef builder = ctx->ac.builder;
3572 LLVMValueRef img7, samp0;
3573
3574 if (ctx->ac.chip_class >= GFX8)
3575 return samp;
3576
3577 img7 = LLVMBuildExtractElement(builder, res,
3578 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3579 samp0 = LLVMBuildExtractElement(builder, samp,
3580 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3581 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3582 return LLVMBuildInsertElement(builder, samp, samp0,
3583 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3584 }
3585
3586 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3587 nir_tex_instr *instr,
3588 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3589 LLVMValueRef *fmask_ptr)
3590 {
3591 nir_deref_instr *texture_deref_instr = NULL;
3592 nir_deref_instr *sampler_deref_instr = NULL;
3593 int plane = -1;
3594
3595 for (unsigned i = 0; i < instr->num_srcs; i++) {
3596 switch (instr->src[i].src_type) {
3597 case nir_tex_src_texture_deref:
3598 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3599 break;
3600 case nir_tex_src_sampler_deref:
3601 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3602 break;
3603 case nir_tex_src_plane:
3604 plane = nir_src_as_int(instr->src[i].src);
3605 break;
3606 default:
3607 break;
3608 }
3609 }
3610
3611 if (!sampler_deref_instr)
3612 sampler_deref_instr = texture_deref_instr;
3613
3614 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3615
3616 if (plane >= 0) {
3617 assert(instr->op != nir_texop_txf_ms &&
3618 instr->op != nir_texop_samples_identical);
3619 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3620
3621 main_descriptor = AC_DESC_PLANE_0 + plane;
3622 }
3623
3624 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3625
3626 if (samp_ptr) {
3627 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3628 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3629 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3630 }
3631 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3632 instr->op == nir_texop_samples_identical))
3633 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3634 }
3635
3636 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3637 LLVMValueRef coord)
3638 {
3639 coord = ac_to_float(ctx, coord);
3640 coord = ac_build_round(ctx, coord);
3641 coord = ac_to_integer(ctx, coord);
3642 return coord;
3643 }
3644
3645 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3646 {
3647 LLVMValueRef result = NULL;
3648 struct ac_image_args args = { 0 };
3649 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3650 LLVMValueRef ddx = NULL, ddy = NULL;
3651 unsigned offset_src = 0;
3652
3653 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3654
3655 for (unsigned i = 0; i < instr->num_srcs; i++) {
3656 switch (instr->src[i].src_type) {
3657 case nir_tex_src_coord: {
3658 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3659 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3660 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3661 break;
3662 }
3663 case nir_tex_src_projector:
3664 break;
3665 case nir_tex_src_comparator:
3666 if (instr->is_shadow)
3667 args.compare = get_src(ctx, instr->src[i].src);
3668 break;
3669 case nir_tex_src_offset:
3670 args.offset = get_src(ctx, instr->src[i].src);
3671 offset_src = i;
3672 break;
3673 case nir_tex_src_bias:
3674 if (instr->op == nir_texop_txb)
3675 args.bias = get_src(ctx, instr->src[i].src);
3676 break;
3677 case nir_tex_src_lod: {
3678 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
3679 args.level_zero = true;
3680 else
3681 args.lod = get_src(ctx, instr->src[i].src);
3682 break;
3683 }
3684 case nir_tex_src_ms_index:
3685 sample_index = get_src(ctx, instr->src[i].src);
3686 break;
3687 case nir_tex_src_ms_mcs:
3688 break;
3689 case nir_tex_src_ddx:
3690 ddx = get_src(ctx, instr->src[i].src);
3691 break;
3692 case nir_tex_src_ddy:
3693 ddy = get_src(ctx, instr->src[i].src);
3694 break;
3695 case nir_tex_src_texture_offset:
3696 case nir_tex_src_sampler_offset:
3697 case nir_tex_src_plane:
3698 default:
3699 break;
3700 }
3701 }
3702
3703 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3704 result = get_buffer_size(ctx, args.resource, true);
3705 goto write_result;
3706 }
3707
3708 if (instr->op == nir_texop_texture_samples) {
3709 LLVMValueRef res, samples, is_msaa;
3710 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3711 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3712 LLVMConstInt(ctx->ac.i32, 3, false), "");
3713 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3714 LLVMConstInt(ctx->ac.i32, 28, false), "");
3715 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3716 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3717 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3718 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3719
3720 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3721 LLVMConstInt(ctx->ac.i32, 16, false), "");
3722 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3723 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3724 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3725 samples, "");
3726 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3727 ctx->ac.i32_1, "");
3728 result = samples;
3729 goto write_result;
3730 }
3731
3732 if (args.offset && instr->op != nir_texop_txf) {
3733 LLVMValueRef offset[3], pack;
3734 for (unsigned chan = 0; chan < 3; ++chan)
3735 offset[chan] = ctx->ac.i32_0;
3736
3737 unsigned num_components = ac_get_llvm_num_components(args.offset);
3738 for (unsigned chan = 0; chan < num_components; chan++) {
3739 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3740 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3741 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3742 if (chan)
3743 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3744 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3745 }
3746 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3747 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3748 args.offset = pack;
3749 }
3750
3751 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3752 * so the depth comparison value isn't clamped for Z16 and
3753 * Z24 anymore. Do it manually here.
3754 *
3755 * It's unnecessary if the original texture format was
3756 * Z32_FLOAT, but we don't know that here.
3757 */
3758 if (args.compare && ctx->ac.chip_class >= GFX8 && ctx->abi->clamp_shadow_reference)
3759 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3760
3761 /* pack derivatives */
3762 if (ddx || ddy) {
3763 int num_src_deriv_channels, num_dest_deriv_channels;
3764 switch (instr->sampler_dim) {
3765 case GLSL_SAMPLER_DIM_3D:
3766 case GLSL_SAMPLER_DIM_CUBE:
3767 num_src_deriv_channels = 3;
3768 num_dest_deriv_channels = 3;
3769 break;
3770 case GLSL_SAMPLER_DIM_2D:
3771 default:
3772 num_src_deriv_channels = 2;
3773 num_dest_deriv_channels = 2;
3774 break;
3775 case GLSL_SAMPLER_DIM_1D:
3776 num_src_deriv_channels = 1;
3777 if (ctx->ac.chip_class >= GFX9) {
3778 num_dest_deriv_channels = 2;
3779 } else {
3780 num_dest_deriv_channels = 1;
3781 }
3782 break;
3783 }
3784
3785 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3786 args.derivs[i] = ac_to_float(&ctx->ac,
3787 ac_llvm_extract_elem(&ctx->ac, ddx, i));
3788 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
3789 ac_llvm_extract_elem(&ctx->ac, ddy, i));
3790 }
3791 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3792 args.derivs[i] = ctx->ac.f32_0;
3793 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3794 }
3795 }
3796
3797 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
3798 for (unsigned chan = 0; chan < instr->coord_components; chan++)
3799 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
3800 if (instr->coord_components == 3)
3801 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
3802 ac_prepare_cube_coords(&ctx->ac,
3803 instr->op == nir_texop_txd, instr->is_array,
3804 instr->op == nir_texop_lod, args.coords, args.derivs);
3805 }
3806
3807 /* Texture coordinates fixups */
3808 if (instr->coord_components > 1 &&
3809 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3810 instr->is_array &&
3811 instr->op != nir_texop_txf) {
3812 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
3813 }
3814
3815 if (instr->coord_components > 2 &&
3816 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3817 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3818 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3819 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3820 instr->is_array &&
3821 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3822 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
3823 }
3824
3825 if (ctx->ac.chip_class >= GFX9 &&
3826 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3827 instr->op != nir_texop_lod) {
3828 LLVMValueRef filler;
3829 if (instr->op == nir_texop_txf)
3830 filler = ctx->ac.i32_0;
3831 else
3832 filler = LLVMConstReal(ctx->ac.f32, 0.5);
3833
3834 if (instr->is_array)
3835 args.coords[2] = args.coords[1];
3836 args.coords[1] = filler;
3837 }
3838
3839 /* Pack sample index */
3840 if (instr->op == nir_texop_txf_ms && sample_index)
3841 args.coords[instr->coord_components] = sample_index;
3842
3843 if (instr->op == nir_texop_samples_identical) {
3844 struct ac_image_args txf_args = { 0 };
3845 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
3846
3847 txf_args.dmask = 0xf;
3848 txf_args.resource = fmask_ptr;
3849 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
3850 result = build_tex_intrinsic(ctx, instr, &txf_args);
3851
3852 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3853 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
3854 goto write_result;
3855 }
3856
3857 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS &&
3858 instr->op != nir_texop_txs) {
3859 unsigned sample_chan = instr->is_array ? 3 : 2;
3860 args.coords[sample_chan] = adjust_sample_index_using_fmask(
3861 &ctx->ac, args.coords[0], args.coords[1],
3862 instr->is_array ? args.coords[2] : NULL,
3863 args.coords[sample_chan], fmask_ptr);
3864 }
3865
3866 if (args.offset && instr->op == nir_texop_txf) {
3867 int num_offsets = instr->src[offset_src].src.ssa->num_components;
3868 num_offsets = MIN2(num_offsets, instr->coord_components);
3869 for (unsigned i = 0; i < num_offsets; ++i) {
3870 args.coords[i] = LLVMBuildAdd(
3871 ctx->ac.builder, args.coords[i],
3872 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
3873 }
3874 args.offset = NULL;
3875 }
3876
3877 /* TODO TG4 support */
3878 args.dmask = 0xf;
3879 if (instr->op == nir_texop_tg4) {
3880 if (instr->is_shadow)
3881 args.dmask = 1;
3882 else
3883 args.dmask = 1 << instr->component;
3884 }
3885
3886 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
3887 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
3888 result = build_tex_intrinsic(ctx, instr, &args);
3889
3890 if (instr->op == nir_texop_query_levels)
3891 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
3892 else if (instr->is_shadow && instr->is_new_style_shadow &&
3893 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
3894 instr->op != nir_texop_tg4)
3895 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3896 else if (instr->op == nir_texop_txs &&
3897 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3898 instr->is_array) {
3899 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3900 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3901 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3902 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3903 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
3904 } else if (ctx->ac.chip_class >= GFX9 &&
3905 instr->op == nir_texop_txs &&
3906 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3907 instr->is_array) {
3908 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3909 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3910 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
3911 ctx->ac.i32_1, "");
3912 } else if (instr->dest.ssa.num_components != 4)
3913 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
3914
3915 write_result:
3916 if (result) {
3917 assert(instr->dest.is_ssa);
3918 result = ac_to_integer(&ctx->ac, result);
3919 ctx->ssa_defs[instr->dest.ssa.index] = result;
3920 }
3921 }
3922
3923
3924 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
3925 {
3926 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3927 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
3928
3929 ctx->ssa_defs[instr->dest.ssa.index] = result;
3930 _mesa_hash_table_insert(ctx->phis, instr, result);
3931 }
3932
3933 static void visit_post_phi(struct ac_nir_context *ctx,
3934 nir_phi_instr *instr,
3935 LLVMValueRef llvm_phi)
3936 {
3937 nir_foreach_phi_src(src, instr) {
3938 LLVMBasicBlockRef block = get_block(ctx, src->pred);
3939 LLVMValueRef llvm_src = get_src(ctx, src->src);
3940
3941 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
3942 }
3943 }
3944
3945 static void phi_post_pass(struct ac_nir_context *ctx)
3946 {
3947 hash_table_foreach(ctx->phis, entry) {
3948 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
3949 (LLVMValueRef)entry->data);
3950 }
3951 }
3952
3953
3954 static void visit_ssa_undef(struct ac_nir_context *ctx,
3955 const nir_ssa_undef_instr *instr)
3956 {
3957 unsigned num_components = instr->def.num_components;
3958 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
3959 LLVMValueRef undef;
3960
3961 if (num_components == 1)
3962 undef = LLVMGetUndef(type);
3963 else {
3964 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
3965 }
3966 ctx->ssa_defs[instr->def.index] = undef;
3967 }
3968
3969 static void visit_jump(struct ac_llvm_context *ctx,
3970 const nir_jump_instr *instr)
3971 {
3972 switch (instr->type) {
3973 case nir_jump_break:
3974 ac_build_break(ctx);
3975 break;
3976 case nir_jump_continue:
3977 ac_build_continue(ctx);
3978 break;
3979 default:
3980 fprintf(stderr, "Unknown NIR jump instr: ");
3981 nir_print_instr(&instr->instr, stderr);
3982 fprintf(stderr, "\n");
3983 abort();
3984 }
3985 }
3986
3987 static LLVMTypeRef
3988 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
3989 enum glsl_base_type type)
3990 {
3991 switch (type) {
3992 case GLSL_TYPE_INT:
3993 case GLSL_TYPE_UINT:
3994 case GLSL_TYPE_BOOL:
3995 case GLSL_TYPE_SUBROUTINE:
3996 return ac->i32;
3997 case GLSL_TYPE_INT8:
3998 case GLSL_TYPE_UINT8:
3999 return ac->i8;
4000 case GLSL_TYPE_INT16:
4001 case GLSL_TYPE_UINT16:
4002 return ac->i16;
4003 case GLSL_TYPE_FLOAT:
4004 return ac->f32;
4005 case GLSL_TYPE_FLOAT16:
4006 return ac->f16;
4007 case GLSL_TYPE_INT64:
4008 case GLSL_TYPE_UINT64:
4009 return ac->i64;
4010 case GLSL_TYPE_DOUBLE:
4011 return ac->f64;
4012 default:
4013 unreachable("unknown GLSL type");
4014 }
4015 }
4016
4017 static LLVMTypeRef
4018 glsl_to_llvm_type(struct ac_llvm_context *ac,
4019 const struct glsl_type *type)
4020 {
4021 if (glsl_type_is_scalar(type)) {
4022 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4023 }
4024
4025 if (glsl_type_is_vector(type)) {
4026 return LLVMVectorType(
4027 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4028 glsl_get_vector_elements(type));
4029 }
4030
4031 if (glsl_type_is_matrix(type)) {
4032 return LLVMArrayType(
4033 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4034 glsl_get_matrix_columns(type));
4035 }
4036
4037 if (glsl_type_is_array(type)) {
4038 return LLVMArrayType(
4039 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4040 glsl_get_length(type));
4041 }
4042
4043 assert(glsl_type_is_struct_or_ifc(type));
4044
4045 LLVMTypeRef member_types[glsl_get_length(type)];
4046
4047 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4048 member_types[i] =
4049 glsl_to_llvm_type(ac,
4050 glsl_get_struct_field(type, i));
4051 }
4052
4053 return LLVMStructTypeInContext(ac->context, member_types,
4054 glsl_get_length(type), false);
4055 }
4056
4057 static void visit_deref(struct ac_nir_context *ctx,
4058 nir_deref_instr *instr)
4059 {
4060 if (instr->mode != nir_var_mem_shared &&
4061 instr->mode != nir_var_mem_global)
4062 return;
4063
4064 LLVMValueRef result = NULL;
4065 switch(instr->deref_type) {
4066 case nir_deref_type_var: {
4067 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4068 result = entry->data;
4069 break;
4070 }
4071 case nir_deref_type_struct:
4072 if (instr->mode == nir_var_mem_global) {
4073 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4074 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4075 instr->strct.index);
4076 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4077 LLVMConstInt(ctx->ac.i32, offset, 0));
4078 } else {
4079 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4080 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4081 }
4082 break;
4083 case nir_deref_type_array:
4084 if (instr->mode == nir_var_mem_global) {
4085 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4086 unsigned stride = glsl_get_explicit_stride(parent->type);
4087
4088 if ((glsl_type_is_matrix(parent->type) &&
4089 glsl_matrix_type_is_row_major(parent->type)) ||
4090 (glsl_type_is_vector(parent->type) && stride == 0))
4091 stride = type_scalar_size_bytes(parent->type);
4092
4093 assert(stride > 0);
4094 LLVMValueRef index = get_src(ctx, instr->arr.index);
4095 if (LLVMTypeOf(index) != ctx->ac.i64)
4096 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4097
4098 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4099
4100 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4101 } else {
4102 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4103 get_src(ctx, instr->arr.index));
4104 }
4105 break;
4106 case nir_deref_type_ptr_as_array:
4107 if (instr->mode == nir_var_mem_global) {
4108 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4109
4110 LLVMValueRef index = get_src(ctx, instr->arr.index);
4111 if (LLVMTypeOf(index) != ctx->ac.i64)
4112 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4113
4114 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4115
4116 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4117 } else {
4118 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4119 get_src(ctx, instr->arr.index));
4120 }
4121 break;
4122 case nir_deref_type_cast: {
4123 result = get_src(ctx, instr->parent);
4124
4125 /* We can't use the structs from LLVM because the shader
4126 * specifies its own offsets. */
4127 LLVMTypeRef pointee_type = ctx->ac.i8;
4128 if (instr->mode == nir_var_mem_shared)
4129 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4130
4131 unsigned address_space;
4132
4133 switch(instr->mode) {
4134 case nir_var_mem_shared:
4135 address_space = AC_ADDR_SPACE_LDS;
4136 break;
4137 case nir_var_mem_global:
4138 address_space = AC_ADDR_SPACE_GLOBAL;
4139 break;
4140 default:
4141 unreachable("Unhandled address space");
4142 }
4143
4144 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4145
4146 if (LLVMTypeOf(result) != type) {
4147 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4148 result = LLVMBuildBitCast(ctx->ac.builder, result,
4149 type, "");
4150 } else {
4151 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4152 type, "");
4153 }
4154 }
4155 break;
4156 }
4157 default:
4158 unreachable("Unhandled deref_instr deref type");
4159 }
4160
4161 ctx->ssa_defs[instr->dest.ssa.index] = result;
4162 }
4163
4164 static void visit_cf_list(struct ac_nir_context *ctx,
4165 struct exec_list *list);
4166
4167 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4168 {
4169 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->ac.builder);
4170 nir_foreach_instr(instr, block)
4171 {
4172 switch (instr->type) {
4173 case nir_instr_type_alu:
4174 visit_alu(ctx, nir_instr_as_alu(instr));
4175 break;
4176 case nir_instr_type_load_const:
4177 visit_load_const(ctx, nir_instr_as_load_const(instr));
4178 break;
4179 case nir_instr_type_intrinsic:
4180 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4181 break;
4182 case nir_instr_type_tex:
4183 visit_tex(ctx, nir_instr_as_tex(instr));
4184 break;
4185 case nir_instr_type_phi:
4186 visit_phi(ctx, nir_instr_as_phi(instr));
4187 break;
4188 case nir_instr_type_ssa_undef:
4189 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4190 break;
4191 case nir_instr_type_jump:
4192 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4193 break;
4194 case nir_instr_type_deref:
4195 visit_deref(ctx, nir_instr_as_deref(instr));
4196 break;
4197 default:
4198 fprintf(stderr, "Unknown NIR instr type: ");
4199 nir_print_instr(instr, stderr);
4200 fprintf(stderr, "\n");
4201 abort();
4202 }
4203 }
4204
4205 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
4206 }
4207
4208 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4209 {
4210 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4211
4212 nir_block *then_block =
4213 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4214
4215 ac_build_uif(&ctx->ac, value, then_block->index);
4216
4217 visit_cf_list(ctx, &if_stmt->then_list);
4218
4219 if (!exec_list_is_empty(&if_stmt->else_list)) {
4220 nir_block *else_block =
4221 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4222
4223 ac_build_else(&ctx->ac, else_block->index);
4224 visit_cf_list(ctx, &if_stmt->else_list);
4225 }
4226
4227 ac_build_endif(&ctx->ac, then_block->index);
4228 }
4229
4230 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4231 {
4232 nir_block *first_loop_block =
4233 (nir_block *) exec_list_get_head(&loop->body);
4234
4235 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4236
4237 visit_cf_list(ctx, &loop->body);
4238
4239 ac_build_endloop(&ctx->ac, first_loop_block->index);
4240 }
4241
4242 static void visit_cf_list(struct ac_nir_context *ctx,
4243 struct exec_list *list)
4244 {
4245 foreach_list_typed(nir_cf_node, node, node, list)
4246 {
4247 switch (node->type) {
4248 case nir_cf_node_block:
4249 visit_block(ctx, nir_cf_node_as_block(node));
4250 break;
4251
4252 case nir_cf_node_if:
4253 visit_if(ctx, nir_cf_node_as_if(node));
4254 break;
4255
4256 case nir_cf_node_loop:
4257 visit_loop(ctx, nir_cf_node_as_loop(node));
4258 break;
4259
4260 default:
4261 assert(0);
4262 }
4263 }
4264 }
4265
4266 void
4267 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4268 struct ac_shader_abi *abi,
4269 struct nir_shader *nir,
4270 struct nir_variable *variable,
4271 gl_shader_stage stage)
4272 {
4273 unsigned output_loc = variable->data.driver_location / 4;
4274 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4275
4276 /* tess ctrl has it's own load/store paths for outputs */
4277 if (stage == MESA_SHADER_TESS_CTRL)
4278 return;
4279
4280 if (stage == MESA_SHADER_VERTEX ||
4281 stage == MESA_SHADER_TESS_EVAL ||
4282 stage == MESA_SHADER_GEOMETRY) {
4283 int idx = variable->data.location + variable->data.index;
4284 if (idx == VARYING_SLOT_CLIP_DIST0) {
4285 int length = nir->info.clip_distance_array_size +
4286 nir->info.cull_distance_array_size;
4287
4288 if (length > 4)
4289 attrib_count = 2;
4290 else
4291 attrib_count = 1;
4292 }
4293 }
4294
4295 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4296 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4297 for (unsigned i = 0; i < attrib_count; ++i) {
4298 for (unsigned chan = 0; chan < 4; chan++) {
4299 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4300 ac_build_alloca_undef(ctx, type, "");
4301 }
4302 }
4303 }
4304
4305 static void
4306 setup_locals(struct ac_nir_context *ctx,
4307 struct nir_function *func)
4308 {
4309 int i, j;
4310 ctx->num_locals = 0;
4311 nir_foreach_variable(variable, &func->impl->locals) {
4312 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4313 variable->data.driver_location = ctx->num_locals * 4;
4314 variable->data.location_frac = 0;
4315 ctx->num_locals += attrib_count;
4316 }
4317 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4318 if (!ctx->locals)
4319 return;
4320
4321 for (i = 0; i < ctx->num_locals; i++) {
4322 for (j = 0; j < 4; j++) {
4323 ctx->locals[i * 4 + j] =
4324 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4325 }
4326 }
4327 }
4328
4329 static void
4330 setup_shared(struct ac_nir_context *ctx,
4331 struct nir_shader *nir)
4332 {
4333 nir_foreach_variable(variable, &nir->shared) {
4334 LLVMValueRef shared =
4335 LLVMAddGlobalInAddressSpace(
4336 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4337 variable->name ? variable->name : "",
4338 AC_ADDR_SPACE_LDS);
4339 _mesa_hash_table_insert(ctx->vars, variable, shared);
4340 }
4341 }
4342
4343 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4344 struct nir_shader *nir)
4345 {
4346 struct ac_nir_context ctx = {};
4347 struct nir_function *func;
4348
4349 ctx.ac = *ac;
4350 ctx.abi = abi;
4351
4352 ctx.stage = nir->info.stage;
4353
4354 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4355
4356 nir_foreach_variable(variable, &nir->outputs)
4357 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4358 ctx.stage);
4359
4360 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4361 _mesa_key_pointer_equal);
4362 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4363 _mesa_key_pointer_equal);
4364 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4365 _mesa_key_pointer_equal);
4366
4367 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4368
4369 nir_index_ssa_defs(func->impl);
4370 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4371
4372 setup_locals(&ctx, func);
4373
4374 if (gl_shader_stage_is_compute(nir->info.stage))
4375 setup_shared(&ctx, nir);
4376
4377 visit_cf_list(&ctx, &func->impl->body);
4378 phi_post_pass(&ctx);
4379
4380 if (!gl_shader_stage_is_compute(nir->info.stage))
4381 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4382 ctx.abi->outputs);
4383
4384 free(ctx.locals);
4385 free(ctx.ssa_defs);
4386 ralloc_free(ctx.defs);
4387 ralloc_free(ctx.phis);
4388 ralloc_free(ctx.vars);
4389 }
4390
4391 void
4392 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4393 {
4394 /* While it would be nice not to have this flag, we are constrained
4395 * by the reality that LLVM 5.0 doesn't have working VGPR indexing
4396 * on GFX9.
4397 */
4398 bool llvm_has_working_vgpr_indexing = chip_class <= GFX8;
4399
4400 /* TODO: Indirect indexing of GS inputs is unimplemented.
4401 *
4402 * TCS and TES load inputs directly from LDS or offchip memory, so
4403 * indirect indexing is trivial.
4404 */
4405 nir_variable_mode indirect_mask = 0;
4406 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4407 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4408 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4409 !llvm_has_working_vgpr_indexing)) {
4410 indirect_mask |= nir_var_shader_in;
4411 }
4412 if (!llvm_has_working_vgpr_indexing &&
4413 nir->info.stage != MESA_SHADER_TESS_CTRL)
4414 indirect_mask |= nir_var_shader_out;
4415
4416 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4417 * smart enough to handle indirects without causing excess spilling
4418 * causing the gpu to hang.
4419 *
4420 * See the following thread for more details of the problem:
4421 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4422 */
4423 indirect_mask |= nir_var_function_temp;
4424
4425 nir_lower_indirect_derefs(nir, indirect_mask);
4426 }
4427
4428 static unsigned
4429 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4430 {
4431 if (intrin->intrinsic != nir_intrinsic_store_deref)
4432 return 0;
4433
4434 nir_variable *var =
4435 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4436
4437 if (var->data.mode != nir_var_shader_out)
4438 return 0;
4439
4440 unsigned writemask = 0;
4441 const int location = var->data.location;
4442 unsigned first_component = var->data.location_frac;
4443 unsigned num_comps = intrin->dest.ssa.num_components;
4444
4445 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4446 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4447 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4448 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4449
4450 return writemask;
4451 }
4452
4453 static void
4454 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4455 unsigned *cond_block_tf_writemask,
4456 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4457 {
4458 switch (cf_node->type) {
4459 case nir_cf_node_block: {
4460 nir_block *block = nir_cf_node_as_block(cf_node);
4461 nir_foreach_instr(instr, block) {
4462 if (instr->type != nir_instr_type_intrinsic)
4463 continue;
4464
4465 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4466 if (intrin->intrinsic == nir_intrinsic_barrier) {
4467
4468 /* If we find a barrier in nested control flow put this in the
4469 * too hard basket. In GLSL this is not possible but it is in
4470 * SPIR-V.
4471 */
4472 if (is_nested_cf) {
4473 *tessfactors_are_def_in_all_invocs = false;
4474 return;
4475 }
4476
4477 /* The following case must be prevented:
4478 * gl_TessLevelInner = ...;
4479 * barrier();
4480 * if (gl_InvocationID == 1)
4481 * gl_TessLevelInner = ...;
4482 *
4483 * If you consider disjoint code segments separated by barriers, each
4484 * such segment that writes tess factor channels should write the same
4485 * channels in all codepaths within that segment.
4486 */
4487 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4488 /* Accumulate the result: */
4489 *tessfactors_are_def_in_all_invocs &=
4490 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4491
4492 /* Analyze the next code segment from scratch. */
4493 *upper_block_tf_writemask = 0;
4494 *cond_block_tf_writemask = 0;
4495 }
4496 } else
4497 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4498 }
4499
4500 break;
4501 }
4502 case nir_cf_node_if: {
4503 unsigned then_tessfactor_writemask = 0;
4504 unsigned else_tessfactor_writemask = 0;
4505
4506 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4507 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4508 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4509 cond_block_tf_writemask,
4510 tessfactors_are_def_in_all_invocs, true);
4511 }
4512
4513 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4514 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4515 cond_block_tf_writemask,
4516 tessfactors_are_def_in_all_invocs, true);
4517 }
4518
4519 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4520 /* If both statements write the same tess factor channels,
4521 * we can say that the upper block writes them too.
4522 */
4523 *upper_block_tf_writemask |= then_tessfactor_writemask &
4524 else_tessfactor_writemask;
4525 *cond_block_tf_writemask |= then_tessfactor_writemask |
4526 else_tessfactor_writemask;
4527 }
4528
4529 break;
4530 }
4531 case nir_cf_node_loop: {
4532 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4533 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4534 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4535 cond_block_tf_writemask,
4536 tessfactors_are_def_in_all_invocs, true);
4537 }
4538
4539 break;
4540 }
4541 default:
4542 unreachable("unknown cf node type");
4543 }
4544 }
4545
4546 bool
4547 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4548 {
4549 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4550
4551 /* The pass works as follows:
4552 * If all codepaths write tess factors, we can say that all
4553 * invocations define tess factors.
4554 *
4555 * Each tess factor channel is tracked separately.
4556 */
4557 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4558 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4559
4560 /* Initial value = true. Here the pass will accumulate results from
4561 * multiple segments surrounded by barriers. If tess factors aren't
4562 * written at all, it's a shader bug and we don't care if this will be
4563 * true.
4564 */
4565 bool tessfactors_are_def_in_all_invocs = true;
4566
4567 nir_foreach_function(function, nir) {
4568 if (function->impl) {
4569 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4570 scan_tess_ctrl(node, &main_block_tf_writemask,
4571 &cond_block_tf_writemask,
4572 &tessfactors_are_def_in_all_invocs,
4573 false);
4574 }
4575 }
4576 }
4577
4578 /* Accumulate the result for the last code segment separated by a
4579 * barrier.
4580 */
4581 if (main_block_tf_writemask || cond_block_tf_writemask) {
4582 tessfactors_are_def_in_all_invocs &=
4583 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4584 }
4585
4586 return tessfactors_are_def_in_all_invocs;
4587 }