2 * Copyright © 2016 Bas Nieuwenhuizen
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #ifndef AC_NIR_TO_LLVM_H
25 #define AC_NIR_TO_LLVM_H
28 #include "llvm-c/Core.h"
29 #include "llvm-c/TargetMachine.h"
30 #include "amd_family.h"
31 #include "../vulkan/radv_descriptor_set.h"
32 #include "ac_shader_info.h"
33 #include "compiler/shader_enums.h"
34 struct ac_shader_binary
;
35 struct ac_shader_config
;
38 struct radv_pipeline_layout
;
40 struct ac_llvm_context
;
43 struct ac_vs_variant_key
{
44 uint32_t instance_rate_inputs
;
47 uint32_t export_prim_id
:1;
50 struct ac_tes_variant_key
{
52 uint32_t export_prim_id
:1;
55 struct ac_tcs_variant_key
{
56 struct ac_vs_variant_key vs_key
;
57 unsigned primitive_mode
;
58 unsigned input_vertices
;
59 uint32_t tes_reads_tess_factors
:1;
62 struct ac_fs_variant_key
{
64 uint8_t log2_ps_iter_samples
;
65 uint8_t log2_num_samples
;
68 uint32_t multisample
: 1;
71 struct ac_shader_variant_key
{
73 struct ac_vs_variant_key vs
;
74 struct ac_fs_variant_key fs
;
75 struct ac_tes_variant_key tes
;
76 struct ac_tcs_variant_key tcs
;
78 bool has_multiview_view_index
;
81 struct ac_nir_compiler_options
{
82 struct radv_pipeline_layout
*layout
;
83 struct ac_shader_variant_key key
;
86 bool clamp_shadow_reference
;
88 enum radeon_family family
;
89 enum chip_class chip_class
;
93 AC_UD_SCRATCH_RING_OFFSETS
= 0,
94 AC_UD_PUSH_CONSTANTS
= 1,
95 AC_UD_INDIRECT_DESCRIPTOR_SETS
= 2,
97 AC_UD_SHADER_START
= 4,
98 AC_UD_VS_VERTEX_BUFFERS
= AC_UD_SHADER_START
,
99 AC_UD_VS_BASE_VERTEX_START_INSTANCE
,
100 AC_UD_VS_LS_TCS_IN_LAYOUT
,
102 AC_UD_PS_SAMPLE_POS_OFFSET
= AC_UD_SHADER_START
,
104 AC_UD_CS_GRID_SIZE
= AC_UD_SHADER_START
,
106 AC_UD_GS_VS_RING_STRIDE_ENTRIES
= AC_UD_VS_MAX_UD
,
108 AC_UD_TCS_OFFCHIP_LAYOUT
= AC_UD_VS_MAX_UD
,
110 AC_UD_TES_OFFCHIP_LAYOUT
= AC_UD_SHADER_START
,
112 AC_UD_MAX_UD
= AC_UD_TCS_MAX_UD
,
115 /* Interpolation locations */
116 #define INTERP_CENTER 0
117 #define INTERP_CENTROID 1
118 #define INTERP_SAMPLE 2
120 static inline unsigned radeon_llvm_reg_index_soa(unsigned index
, unsigned chan
)
122 return (index
* 4) + chan
;
125 void ac_lower_indirect_derefs(struct nir_shader
*nir
, enum chip_class
);
127 void ac_nir_translate(struct ac_llvm_context
*ac
, struct ac_shader_abi
*abi
,
128 struct nir_shader
*nir
);
131 ac_handle_shader_output_decl(struct ac_llvm_context
*ctx
,
132 struct ac_shader_abi
*abi
,
133 struct nir_shader
*nir
,
134 struct nir_variable
*variable
,
135 gl_shader_stage stage
);
137 void ac_emit_barrier(struct ac_llvm_context
*ac
, gl_shader_stage stage
);
139 bool ac_lower_subgroups(struct nir_shader
*shader
);
141 #endif /* AC_NIR_TO_LLVM_H */