radv/ac: add some geom shader info from nir->ac shader.
[mesa.git] / src / amd / common / ac_nir_to_llvm.h
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #pragma once
25
26 #include <stdbool.h>
27 #include "llvm-c/Core.h"
28 #include "llvm-c/TargetMachine.h"
29 #include "amd_family.h"
30
31 struct ac_shader_binary;
32 struct ac_shader_config;
33 struct nir_shader;
34 struct radv_pipeline_layout;
35
36
37 struct ac_vs_variant_key {
38 uint32_t instance_rate_inputs;
39 };
40
41 struct ac_fs_variant_key {
42 uint32_t col_format;
43 uint32_t is_int8;
44 };
45
46 union ac_shader_variant_key {
47 struct ac_vs_variant_key vs;
48 struct ac_fs_variant_key fs;
49 };
50
51 struct ac_nir_compiler_options {
52 struct radv_pipeline_layout *layout;
53 union ac_shader_variant_key key;
54 bool unsafe_math;
55 bool supports_spill;
56 enum radeon_family family;
57 enum chip_class chip_class;
58 };
59
60 struct ac_userdata_info {
61 int8_t sgpr_idx;
62 uint8_t num_sgprs;
63 bool indirect;
64 uint32_t indirect_offset;
65 };
66
67 enum ac_ud_index {
68 AC_UD_SCRATCH = 0,
69 AC_UD_PUSH_CONSTANTS = 1,
70 AC_UD_SHADER_START = 2,
71 AC_UD_VS_VERTEX_BUFFERS = AC_UD_SHADER_START,
72 AC_UD_VS_BASE_VERTEX_START_INSTANCE,
73 AC_UD_VS_MAX_UD,
74 AC_UD_PS_SAMPLE_POS = AC_UD_SHADER_START,
75 AC_UD_PS_MAX_UD,
76 AC_UD_CS_GRID_SIZE = AC_UD_SHADER_START,
77 AC_UD_CS_MAX_UD,
78 AC_UD_MAX_UD = AC_UD_VS_MAX_UD,
79 };
80
81 #define AC_UD_MAX_SETS 4
82
83 struct ac_userdata_locations {
84 struct ac_userdata_info descriptor_sets[AC_UD_MAX_SETS];
85 struct ac_userdata_info shader_data[AC_UD_MAX_UD];
86 };
87
88 struct ac_shader_variant_info {
89 struct ac_userdata_locations user_sgprs_locs;
90 unsigned num_user_sgprs;
91 unsigned num_input_sgprs;
92 unsigned num_input_vgprs;
93 union {
94 struct {
95 unsigned param_exports;
96 unsigned pos_exports;
97 unsigned vgpr_comp_cnt;
98 uint32_t export_mask;
99 bool writes_pointsize;
100 bool writes_layer;
101 bool writes_viewport_index;
102 uint8_t clip_dist_mask;
103 uint8_t cull_dist_mask;
104 } vs;
105 struct {
106 unsigned num_interp;
107 uint32_t input_mask;
108 unsigned output_mask;
109 uint32_t flat_shaded_mask;
110 bool has_pcoord;
111 bool can_discard;
112 bool writes_z;
113 bool writes_stencil;
114 bool early_fragment_test;
115 bool writes_memory;
116 bool force_persample;
117 } fs;
118 struct {
119 unsigned block_size[3];
120 } cs;
121 struct {
122 unsigned vertices_in;
123 unsigned vertices_out;
124 unsigned output_prim;
125 unsigned invocations;
126 } gs;
127 };
128 };
129
130 void ac_compile_nir_shader(LLVMTargetMachineRef tm,
131 struct ac_shader_binary *binary,
132 struct ac_shader_config *config,
133 struct ac_shader_variant_info *shader_info,
134 struct nir_shader *nir,
135 const struct ac_nir_compiler_options *options,
136 bool dump_shader);
137
138