src/amd/common/ac_nir_to_llvm.h

   1 /*
   2  * Copyright © 2016 Bas Nieuwenhuizen
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef AC_NIR_TO_LLVM_H
  25 #define AC_NIR_TO_LLVM_H
  26
  27 #include <stdbool.h>
  28 #include "llvm-c/Core.h"
  29 #include "llvm-c/TargetMachine.h"
  30 #include "amd_family.h"
  31 #include "../vulkan/radv_descriptor_set.h"
  32 #include "ac_shader_info.h"
  33 #include "compiler/shader_enums.h"
  34 struct ac_shader_binary;
  35 struct ac_shader_config;
  36 struct nir_shader;
  37 struct radv_pipeline_layout;
  38
  39 struct ac_llvm_context;
  40 struct ac_shader_abi;
  41
  42 struct ac_vs_variant_key {
  43         uint32_t instance_rate_inputs;
  44         uint32_t as_es:1;
  45         uint32_t as_ls:1;
  46         uint32_t export_prim_id:1;
  47 };
  48
  49 struct ac_tes_variant_key {
  50         uint32_t as_es:1;
  51         uint32_t export_prim_id:1;
  52 };
  53
  54 struct ac_tcs_variant_key {
  55         unsigned primitive_mode;
  56         unsigned input_vertices;
  57 };
  58
  59 struct ac_fs_variant_key {
  60         uint32_t col_format;
  61         uint32_t is_int8;
  62         uint32_t is_int10;
  63 };
  64
  65 union ac_shader_variant_key {
  66         struct ac_vs_variant_key vs;
  67         struct ac_fs_variant_key fs;
  68         struct ac_tes_variant_key tes;
  69         struct ac_tcs_variant_key tcs;
  70 };
  71
  72 struct ac_nir_compiler_options {
  73         struct radv_pipeline_layout *layout;
  74         union ac_shader_variant_key key;
  75         bool unsafe_math;
  76         bool supports_spill;
  77         enum radeon_family family;
  78         enum chip_class chip_class;
  79 };
  80
  81 struct ac_userdata_info {
  82         int8_t sgpr_idx;
  83         uint8_t num_sgprs;
  84         bool indirect;
  85         uint32_t indirect_offset;
  86 };
  87
  88 enum ac_ud_index {
  89         AC_UD_SCRATCH_RING_OFFSETS = 0,
  90         AC_UD_PUSH_CONSTANTS = 1,
  91         AC_UD_INDIRECT_DESCRIPTOR_SETS = 2,
  92         AC_UD_SHADER_START = 3,
  93         AC_UD_VS_VERTEX_BUFFERS = AC_UD_SHADER_START,
  94         AC_UD_VS_BASE_VERTEX_START_INSTANCE,
  95         AC_UD_VS_LS_TCS_IN_LAYOUT,
  96         AC_UD_VS_MAX_UD,
  97         AC_UD_PS_SAMPLE_POS_OFFSET = AC_UD_SHADER_START,
  98         AC_UD_PS_MAX_UD,
  99         AC_UD_CS_GRID_SIZE = AC_UD_SHADER_START,
 100         AC_UD_CS_MAX_UD,
 101         AC_UD_GS_VS_RING_STRIDE_ENTRIES = AC_UD_SHADER_START,
 102         AC_UD_GS_MAX_UD,
 103         AC_UD_TCS_OFFCHIP_LAYOUT = AC_UD_SHADER_START,
 104         AC_UD_TCS_MAX_UD,
 105         AC_UD_TES_OFFCHIP_LAYOUT = AC_UD_SHADER_START,
 106         AC_UD_TES_MAX_UD,
 107         AC_UD_MAX_UD = AC_UD_VS_MAX_UD,
 108 };
 109
 110 /* descriptor index into scratch ring offsets */
 111 #define RING_SCRATCH 0
 112 #define RING_ESGS_VS 1
 113 #define RING_ESGS_GS 2
 114 #define RING_GSVS_VS 3
 115 #define RING_GSVS_GS 4
 116 #define RING_HS_TESS_FACTOR 5
 117 #define RING_HS_TESS_OFFCHIP 6
 118 #define RING_PS_SAMPLE_POSITIONS 7
 119
 120 // Match MAX_SETS from radv_descriptor_set.h
 121 #define AC_UD_MAX_SETS MAX_SETS
 122
 123 struct ac_userdata_locations {
 124         struct ac_userdata_info descriptor_sets[AC_UD_MAX_SETS];
 125         struct ac_userdata_info shader_data[AC_UD_MAX_UD];
 126 };
 127
 128 struct ac_vs_output_info {
 129         uint8_t vs_output_param_offset[VARYING_SLOT_MAX];
 130         uint8_t clip_dist_mask;
 131         uint8_t cull_dist_mask;
 132         uint8_t param_exports;
 133         bool writes_pointsize;
 134         bool writes_layer;
 135         bool writes_viewport_index;
 136         bool export_prim_id;
 137         uint32_t export_mask;
 138         unsigned pos_exports;
 139 };
 140
 141 struct ac_es_output_info {
 142         uint32_t esgs_itemsize;
 143 };
 144
 145 struct ac_shader_variant_info {
 146         struct ac_userdata_locations user_sgprs_locs;
 147         struct ac_shader_info info;
 148         unsigned num_user_sgprs;
 149         unsigned num_input_sgprs;
 150         unsigned num_input_vgprs;
 151         bool need_indirect_descriptor_sets;
 152         union {
 153                 struct {
 154                         struct ac_vs_output_info outinfo;
 155                         struct ac_es_output_info es_info;
 156                         unsigned vgpr_comp_cnt;
 157                         bool as_es;
 158                         bool as_ls;
 159                         uint64_t outputs_written;
 160                 } vs;
 161                 struct {
 162                         unsigned num_interp;
 163                         uint32_t input_mask;
 164                         unsigned output_mask;
 165                         uint32_t flat_shaded_mask;
 166                         bool has_pcoord;
 167                         bool can_discard;
 168                         bool writes_z;
 169                         bool writes_stencil;
 170                         bool writes_sample_mask;
 171                         bool early_fragment_test;
 172                         bool writes_memory;
 173                         bool prim_id_input;
 174                         bool layer_input;
 175                 } fs;
 176                 struct {
 177                         unsigned block_size[3];
 178                 } cs;
 179                 struct {
 180                         unsigned vertices_in;
 181                         unsigned vertices_out;
 182                         unsigned output_prim;
 183                         unsigned invocations;
 184                         unsigned gsvs_vertex_size;
 185                         unsigned max_gsvs_emit_size;
 186                         bool uses_prim_id;
 187                 } gs;
 188                 struct {
 189                         bool uses_prim_id;
 190                         unsigned tcs_vertices_out;
 191                         /* Which outputs are actually written */
 192                         uint64_t outputs_written;
 193                         /* Which patch outputs are actually written */
 194                         uint32_t patch_outputs_written;
 195
 196                 } tcs;
 197                 struct {
 198                         struct ac_vs_output_info outinfo;
 199                         struct ac_es_output_info es_info;
 200                         bool as_es;
 201                         unsigned primitive_mode;
 202                         enum gl_tess_spacing spacing;
 203                         bool ccw;
 204                         bool point_mode;
 205                         bool uses_prim_id;
 206                 } tes;
 207         };
 208 };
 209
 210 void ac_compile_nir_shader(LLVMTargetMachineRef tm,
 211                            struct ac_shader_binary *binary,
 212                            struct ac_shader_config *config,
 213                            struct ac_shader_variant_info *shader_info,
 214                            struct nir_shader *nir,
 215                            const struct ac_nir_compiler_options *options,
 216                            bool dump_shader);
 217
 218 void ac_create_gs_copy_shader(LLVMTargetMachineRef tm,
 219                               struct nir_shader *geom_shader,
 220                               struct ac_shader_binary *binary,
 221                               struct ac_shader_config *config,
 222                               struct ac_shader_variant_info *shader_info,
 223                               const struct ac_nir_compiler_options *options,
 224                               bool dump_shader);
 225
 226 struct nir_to_llvm_context;
 227 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
 228                       struct nir_shader *nir, struct nir_to_llvm_context *nctx);
 229
 230 #endif /* AC_NIR_TO_LLVM_H */