radv/ac: start setting up the geom shader rings (v2)
[mesa.git] / src / amd / common / ac_nir_to_llvm.h
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #pragma once
25
26 #include <stdbool.h>
27 #include "llvm-c/Core.h"
28 #include "llvm-c/TargetMachine.h"
29 #include "amd_family.h"
30
31 struct ac_shader_binary;
32 struct ac_shader_config;
33 struct nir_shader;
34 struct radv_pipeline_layout;
35
36
37 struct ac_vs_variant_key {
38 uint32_t instance_rate_inputs;
39 uint32_t as_es:1;
40 };
41
42 struct ac_fs_variant_key {
43 uint32_t col_format;
44 uint32_t is_int8;
45 };
46
47 union ac_shader_variant_key {
48 struct ac_vs_variant_key vs;
49 struct ac_fs_variant_key fs;
50 };
51
52 struct ac_nir_compiler_options {
53 struct radv_pipeline_layout *layout;
54 union ac_shader_variant_key key;
55 bool unsafe_math;
56 bool supports_spill;
57 enum radeon_family family;
58 enum chip_class chip_class;
59 };
60
61 struct ac_userdata_info {
62 int8_t sgpr_idx;
63 uint8_t num_sgprs;
64 bool indirect;
65 uint32_t indirect_offset;
66 };
67
68 enum ac_ud_index {
69 AC_UD_SCRATCH_RING_OFFSETS = 0,
70 AC_UD_PUSH_CONSTANTS = 1,
71 AC_UD_SHADER_START = 2,
72 AC_UD_VS_VERTEX_BUFFERS = AC_UD_SHADER_START,
73 AC_UD_VS_BASE_VERTEX_START_INSTANCE,
74 AC_UD_VS_MAX_UD,
75 AC_UD_PS_SAMPLE_POS = AC_UD_SHADER_START,
76 AC_UD_PS_MAX_UD,
77 AC_UD_CS_GRID_SIZE = AC_UD_SHADER_START,
78 AC_UD_CS_MAX_UD,
79 AC_UD_GS_VS_RING_STRIDE_ENTRIES = AC_UD_SHADER_START,
80 AC_UD_GS_MAX_UD,
81 AC_UD_MAX_UD = AC_UD_VS_MAX_UD,
82 };
83
84 #define AC_UD_MAX_SETS 4
85
86 struct ac_userdata_locations {
87 struct ac_userdata_info descriptor_sets[AC_UD_MAX_SETS];
88 struct ac_userdata_info shader_data[AC_UD_MAX_UD];
89 };
90
91 struct ac_shader_variant_info {
92 struct ac_userdata_locations user_sgprs_locs;
93 unsigned num_user_sgprs;
94 unsigned num_input_sgprs;
95 unsigned num_input_vgprs;
96 union {
97 struct {
98 unsigned param_exports;
99 unsigned pos_exports;
100 unsigned vgpr_comp_cnt;
101 uint32_t export_mask;
102 bool writes_pointsize;
103 bool writes_layer;
104 bool writes_viewport_index;
105 uint8_t clip_dist_mask;
106 uint8_t cull_dist_mask;
107 } vs;
108 struct {
109 unsigned num_interp;
110 uint32_t input_mask;
111 unsigned output_mask;
112 uint32_t flat_shaded_mask;
113 bool has_pcoord;
114 bool can_discard;
115 bool writes_z;
116 bool writes_stencil;
117 bool early_fragment_test;
118 bool writes_memory;
119 bool force_persample;
120 } fs;
121 struct {
122 unsigned block_size[3];
123 } cs;
124 struct {
125 unsigned vertices_in;
126 unsigned vertices_out;
127 unsigned output_prim;
128 unsigned invocations;
129 } gs;
130 };
131 };
132
133 void ac_compile_nir_shader(LLVMTargetMachineRef tm,
134 struct ac_shader_binary *binary,
135 struct ac_shader_config *config,
136 struct ac_shader_variant_info *shader_info,
137 struct nir_shader *nir,
138 const struct ac_nir_compiler_options *options,
139 bool dump_shader);
140
141