src/amd/common/ac_nir_to_llvm.h

   1 /*
   2  * Copyright © 2016 Bas Nieuwenhuizen
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef AC_NIR_TO_LLVM_H
  25 #define AC_NIR_TO_LLVM_H
  26
  27 #include <stdbool.h>
  28 #include "llvm-c/Core.h"
  29 #include "llvm-c/TargetMachine.h"
  30 #include "amd_family.h"
  31 #include "../vulkan/radv_descriptor_set.h"
  32 #include "ac_shader_info.h"
  33 #include "compiler/shader_enums.h"
  34 struct ac_shader_binary;
  35 struct ac_shader_config;
  36 struct nir_shader;
  37 struct radv_pipeline_layout;
  38
  39 struct ac_llvm_context;
  40 struct ac_shader_abi;
  41
  42 struct ac_vs_variant_key {
  43         uint32_t instance_rate_inputs;
  44         uint32_t as_es:1;
  45         uint32_t as_ls:1;
  46         uint32_t export_prim_id:1;
  47 };
  48
  49 struct ac_tes_variant_key {
  50         uint32_t as_es:1;
  51         uint32_t export_prim_id:1;
  52 };
  53
  54 struct ac_tcs_variant_key {
  55         unsigned primitive_mode;
  56         unsigned input_vertices;
  57 };
  58
  59 struct ac_fs_variant_key {
  60         uint32_t col_format;
  61         uint32_t is_int8;
  62         uint32_t is_int10;
  63         uint32_t multisample : 1;
  64 };
  65
  66 struct ac_shader_variant_key {
  67         union {
  68                 struct ac_vs_variant_key vs;
  69                 struct ac_fs_variant_key fs;
  70                 struct ac_tes_variant_key tes;
  71                 struct ac_tcs_variant_key tcs;
  72         };
  73 };
  74
  75 struct ac_nir_compiler_options {
  76         struct radv_pipeline_layout *layout;
  77         struct ac_shader_variant_key key;
  78         bool unsafe_math;
  79         bool supports_spill;
  80         enum radeon_family family;
  81         enum chip_class chip_class;
  82 };
  83
  84 struct ac_userdata_info {
  85         int8_t sgpr_idx;
  86         uint8_t num_sgprs;
  87         bool indirect;
  88         uint32_t indirect_offset;
  89 };
  90
  91 enum ac_ud_index {
  92         AC_UD_SCRATCH_RING_OFFSETS = 0,
  93         AC_UD_PUSH_CONSTANTS = 1,
  94         AC_UD_INDIRECT_DESCRIPTOR_SETS = 2,
  95         AC_UD_SHADER_START = 3,
  96         AC_UD_VS_VERTEX_BUFFERS = AC_UD_SHADER_START,
  97         AC_UD_VS_BASE_VERTEX_START_INSTANCE,
  98         AC_UD_VS_LS_TCS_IN_LAYOUT,
  99         AC_UD_VS_MAX_UD,
 100         AC_UD_PS_SAMPLE_POS_OFFSET = AC_UD_SHADER_START,
 101         AC_UD_PS_MAX_UD,
 102         AC_UD_CS_GRID_SIZE = AC_UD_SHADER_START,
 103         AC_UD_CS_MAX_UD,
 104         AC_UD_GS_VS_RING_STRIDE_ENTRIES = AC_UD_SHADER_START,
 105         AC_UD_GS_MAX_UD,
 106         AC_UD_TCS_OFFCHIP_LAYOUT = AC_UD_SHADER_START,
 107         AC_UD_TCS_MAX_UD,
 108         AC_UD_TES_OFFCHIP_LAYOUT = AC_UD_SHADER_START,
 109         AC_UD_TES_MAX_UD,
 110         AC_UD_MAX_UD = AC_UD_VS_MAX_UD,
 111 };
 112
 113 /* descriptor index into scratch ring offsets */
 114 #define RING_SCRATCH 0
 115 #define RING_ESGS_VS 1
 116 #define RING_ESGS_GS 2
 117 #define RING_GSVS_VS 3
 118 #define RING_GSVS_GS 4
 119 #define RING_HS_TESS_FACTOR 5
 120 #define RING_HS_TESS_OFFCHIP 6
 121 #define RING_PS_SAMPLE_POSITIONS 7
 122
 123 // Match MAX_SETS from radv_descriptor_set.h
 124 #define AC_UD_MAX_SETS MAX_SETS
 125
 126 struct ac_userdata_locations {
 127         struct ac_userdata_info descriptor_sets[AC_UD_MAX_SETS];
 128         struct ac_userdata_info shader_data[AC_UD_MAX_UD];
 129 };
 130
 131 struct ac_vs_output_info {
 132         uint8_t vs_output_param_offset[VARYING_SLOT_MAX];
 133         uint8_t clip_dist_mask;
 134         uint8_t cull_dist_mask;
 135         uint8_t param_exports;
 136         bool writes_pointsize;
 137         bool writes_layer;
 138         bool writes_viewport_index;
 139         bool export_prim_id;
 140         uint32_t export_mask;
 141         unsigned pos_exports;
 142 };
 143
 144 struct ac_es_output_info {
 145         uint32_t esgs_itemsize;
 146 };
 147
 148 struct ac_shader_variant_info {
 149         struct ac_userdata_locations user_sgprs_locs;
 150         struct ac_shader_info info;
 151         unsigned num_user_sgprs;
 152         unsigned num_input_sgprs;
 153         unsigned num_input_vgprs;
 154         bool need_indirect_descriptor_sets;
 155         union {
 156                 struct {
 157                         struct ac_vs_output_info outinfo;
 158                         struct ac_es_output_info es_info;
 159                         unsigned vgpr_comp_cnt;
 160                         bool as_es;
 161                         bool as_ls;
 162                         uint64_t outputs_written;
 163                 } vs;
 164                 struct {
 165                         unsigned num_interp;
 166                         uint32_t input_mask;
 167                         unsigned output_mask;
 168                         uint32_t flat_shaded_mask;
 169                         bool has_pcoord;
 170                         bool can_discard;
 171                         bool writes_z;
 172                         bool writes_stencil;
 173                         bool writes_sample_mask;
 174                         bool early_fragment_test;
 175                         bool writes_memory;
 176                         bool prim_id_input;
 177                         bool layer_input;
 178                 } fs;
 179                 struct {
 180                         unsigned block_size[3];
 181                 } cs;
 182                 struct {
 183                         unsigned vertices_in;
 184                         unsigned vertices_out;
 185                         unsigned output_prim;
 186                         unsigned invocations;
 187                         unsigned gsvs_vertex_size;
 188                         unsigned max_gsvs_emit_size;
 189                         bool uses_prim_id;
 190                 } gs;
 191                 struct {
 192                         bool uses_prim_id;
 193                         unsigned tcs_vertices_out;
 194                         /* Which outputs are actually written */
 195                         uint64_t outputs_written;
 196                         /* Which patch outputs are actually written */
 197                         uint32_t patch_outputs_written;
 198
 199                 } tcs;
 200                 struct {
 201                         struct ac_vs_output_info outinfo;
 202                         struct ac_es_output_info es_info;
 203                         bool as_es;
 204                         unsigned primitive_mode;
 205                         enum gl_tess_spacing spacing;
 206                         bool ccw;
 207                         bool point_mode;
 208                         bool uses_prim_id;
 209                 } tes;
 210         };
 211 };
 212
 213 void ac_compile_nir_shader(LLVMTargetMachineRef tm,
 214                            struct ac_shader_binary *binary,
 215                            struct ac_shader_config *config,
 216                            struct ac_shader_variant_info *shader_info,
 217                            struct nir_shader *nir,
 218                            const struct ac_nir_compiler_options *options,
 219                            bool dump_shader);
 220
 221 void ac_create_gs_copy_shader(LLVMTargetMachineRef tm,
 222                               struct nir_shader *geom_shader,
 223                               struct ac_shader_binary *binary,
 224                               struct ac_shader_config *config,
 225                               struct ac_shader_variant_info *shader_info,
 226                               const struct ac_nir_compiler_options *options,
 227                               bool dump_shader);
 228
 229 struct nir_to_llvm_context;
 230 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
 231                       struct nir_shader *nir, struct nir_to_llvm_context *nctx);
 232
 233 #endif /* AC_NIR_TO_LLVM_H */