src/amd/common/ac_shader_info.c

   1 /*
   2  * Copyright © 2017 Red Hat
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23 #include "nir/nir.h"
  24 #include "ac_shader_info.h"
  25 #include "ac_nir_to_llvm.h"
  26
  27 static void mark_sampler_desc(const nir_variable *var,
  28                               struct ac_shader_info *info)
  29 {
  30         info->desc_set_used_mask = (1 << var->data.descriptor_set);
  31 }
  32
  33 static void
  34 gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr,
  35                       struct ac_shader_info *info)
  36 {
  37         switch (instr->intrinsic) {
  38         case nir_intrinsic_interp_var_at_sample:
  39                 info->ps.needs_sample_positions = true;
  40                 break;
  41         case nir_intrinsic_load_draw_id:
  42                 info->vs.needs_draw_id = true;
  43                 break;
  44         case nir_intrinsic_load_instance_id:
  45                 info->vs.needs_instance_id = true;
  46                 break;
  47         case nir_intrinsic_load_num_work_groups:
  48                 info->cs.uses_grid_size = true;
  49                 break;
  50         case nir_intrinsic_load_local_invocation_id:
  51         case nir_intrinsic_load_work_group_id: {
  52                 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
  53                 while (mask) {
  54                         unsigned i = u_bit_scan(&mask);
  55
  56                         if (instr->intrinsic == nir_intrinsic_load_work_group_id)
  57                                 info->cs.uses_block_id[i] = true;
  58                         else
  59                                 info->cs.uses_thread_id[i] = true;
  60                 }
  61                 break;
  62         }
  63         case nir_intrinsic_load_local_invocation_index:
  64                 info->cs.uses_local_invocation_idx = true;
  65                 break;
  66         case nir_intrinsic_load_sample_id:
  67                 info->ps.force_persample = true;
  68                 break;
  69         case nir_intrinsic_load_sample_pos:
  70                 info->ps.force_persample = true;
  71                 break;
  72         case nir_intrinsic_load_view_index:
  73                 info->needs_multiview_view_index = true;
  74                 break;
  75         case nir_intrinsic_load_invocation_id:
  76                 info->uses_invocation_id = true;
  77                 break;
  78         case nir_intrinsic_load_primitive_id:
  79                 info->uses_prim_id = true;
  80                 break;
  81         case nir_intrinsic_load_push_constant:
  82                 info->loads_push_constants = true;
  83                 break;
  84         case nir_intrinsic_vulkan_resource_index:
  85                 info->desc_set_used_mask |= (1 << nir_intrinsic_desc_set(instr));
  86                 break;
  87         case nir_intrinsic_image_load:
  88         case nir_intrinsic_image_store:
  89         case nir_intrinsic_image_atomic_add:
  90         case nir_intrinsic_image_atomic_min:
  91         case nir_intrinsic_image_atomic_max:
  92         case nir_intrinsic_image_atomic_and:
  93         case nir_intrinsic_image_atomic_or:
  94         case nir_intrinsic_image_atomic_xor:
  95         case nir_intrinsic_image_atomic_exchange:
  96         case nir_intrinsic_image_atomic_comp_swap:
  97         case nir_intrinsic_image_size: {
  98                 const struct glsl_type *type = instr->variables[0]->var->type;
  99                 if(instr->variables[0]->deref.child)
 100                         type = instr->variables[0]->deref.child->type;
 101
 102                 enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
 103                 if (dim == GLSL_SAMPLER_DIM_SUBPASS ||
 104                     dim == GLSL_SAMPLER_DIM_SUBPASS_MS)
 105                         info->ps.uses_input_attachments = true;
 106                 mark_sampler_desc(instr->variables[0]->var, info);
 107
 108                 if (nir_intrinsic_image_store ||
 109                     nir_intrinsic_image_atomic_add ||
 110                     nir_intrinsic_image_atomic_min ||
 111                     nir_intrinsic_image_atomic_max ||
 112                     nir_intrinsic_image_atomic_and ||
 113                     nir_intrinsic_image_atomic_or ||
 114                     nir_intrinsic_image_atomic_xor ||
 115                     nir_intrinsic_image_atomic_exchange ||
 116                     nir_intrinsic_image_atomic_comp_swap) {
 117                         if (nir->info.stage == MESA_SHADER_FRAGMENT)
 118                                 info->ps.writes_memory = true;
 119                 }
 120                 break;
 121         }
 122         case nir_intrinsic_store_ssbo:
 123         case nir_intrinsic_ssbo_atomic_add:
 124         case nir_intrinsic_ssbo_atomic_imin:
 125         case nir_intrinsic_ssbo_atomic_umin:
 126         case nir_intrinsic_ssbo_atomic_imax:
 127         case nir_intrinsic_ssbo_atomic_umax:
 128         case nir_intrinsic_ssbo_atomic_and:
 129         case nir_intrinsic_ssbo_atomic_or:
 130         case nir_intrinsic_ssbo_atomic_xor:
 131         case nir_intrinsic_ssbo_atomic_exchange:
 132         case nir_intrinsic_ssbo_atomic_comp_swap:
 133                 if (nir->info.stage == MESA_SHADER_FRAGMENT)
 134                         info->ps.writes_memory = true;
 135                 break;
 136         case nir_intrinsic_load_var:
 137                 if (nir->info.stage == MESA_SHADER_VERTEX) {
 138                         nir_deref_var *dvar = instr->variables[0];
 139                         nir_variable *var = dvar->var;
 140
 141                         if (var->data.mode == nir_var_shader_in) {
 142                                 unsigned idx = var->data.location;
 143                                 uint8_t mask =
 144                                         nir_ssa_def_components_read(&instr->dest.ssa);
 145                                 info->vs.input_usage_mask[idx] |= mask;
 146                         }
 147                 }
 148                 break;
 149         default:
 150                 break;
 151         }
 152 }
 153
 154 static void
 155 gather_tex_info(const nir_shader *nir, const nir_tex_instr *instr,
 156                 struct ac_shader_info *info)
 157 {
 158         if (instr->sampler)
 159                 mark_sampler_desc(instr->sampler->var, info);
 160         if (instr->texture)
 161                 mark_sampler_desc(instr->texture->var, info);
 162 }
 163
 164 static void
 165 gather_info_block(const nir_shader *nir, const nir_block *block,
 166                   struct ac_shader_info *info)
 167 {
 168         nir_foreach_instr(instr, block) {
 169                 switch (instr->type) {
 170                 case nir_instr_type_intrinsic:
 171                         gather_intrinsic_info(nir, nir_instr_as_intrinsic(instr), info);
 172                         break;
 173                 case nir_instr_type_tex:
 174                         gather_tex_info(nir, nir_instr_as_tex(instr), info);
 175                         break;
 176                 default:
 177                         break;
 178                 }
 179         }
 180 }
 181
 182 static void
 183 gather_info_input_decl(const nir_shader *nir, const nir_variable *var,
 184                        struct ac_shader_info *info)
 185 {
 186         switch (nir->info.stage) {
 187         case MESA_SHADER_VERTEX:
 188                 info->vs.has_vertex_buffers = true;
 189                 break;
 190         default:
 191                 break;
 192         }
 193 }
 194
 195 static void
 196 gather_info_output_decl_ps(const nir_shader *nir, const nir_variable *var,
 197                            struct ac_shader_info *info)
 198 {
 199         int idx = var->data.location;
 200
 201         switch (idx) {
 202         case FRAG_RESULT_DEPTH:
 203                 info->ps.writes_z = true;
 204                 break;
 205         case FRAG_RESULT_STENCIL:
 206                 info->ps.writes_stencil = true;
 207                 break;
 208         case FRAG_RESULT_SAMPLE_MASK:
 209                 info->ps.writes_sample_mask = true;
 210                 break;
 211         default:
 212                 break;
 213         }
 214 }
 215
 216 static void
 217 gather_info_output_decl(const nir_shader *nir, const nir_variable *var,
 218                         struct ac_shader_info *info)
 219 {
 220         switch (nir->info.stage) {
 221         case MESA_SHADER_FRAGMENT:
 222                 gather_info_output_decl_ps(nir, var, info);
 223                 break;
 224         default:
 225                 break;
 226         }
 227 }
 228
 229 void
 230 ac_nir_shader_info_pass(const struct nir_shader *nir,
 231                         const struct ac_nir_compiler_options *options,
 232                         struct ac_shader_info *info)
 233 {
 234         struct nir_function *func =
 235                 (struct nir_function *)exec_list_get_head_const(&nir->functions);
 236
 237         if (options->layout->dynamic_offset_count)
 238                 info->loads_push_constants = true;
 239
 240         nir_foreach_variable(variable, &nir->inputs)
 241                 gather_info_input_decl(nir, variable, info);
 242
 243         nir_foreach_block(block, func->impl) {
 244                 gather_info_block(nir, block, info);
 245         }
 246
 247         nir_foreach_variable(variable, &nir->outputs)
 248                 gather_info_output_decl(nir, variable, info);
 249 }