src/amd/common/amd_family.h

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #ifndef AMD_FAMILY_H
  25 #define AMD_FAMILY_H
  26
  27 enum radeon_family
  28 {
  29    CHIP_UNKNOWN = 0,
  30    CHIP_R300, /* R3xx-based cores. (GFX2) */
  31    CHIP_R350,
  32    CHIP_RV350,
  33    CHIP_RV370,
  34    CHIP_RV380,
  35    CHIP_RS400,
  36    CHIP_RC410,
  37    CHIP_RS480,
  38    CHIP_R420, /* R4xx-based cores. (GFX2) */
  39    CHIP_R423,
  40    CHIP_R430,
  41    CHIP_R480,
  42    CHIP_R481,
  43    CHIP_RV410,
  44    CHIP_RS600,
  45    CHIP_RS690,
  46    CHIP_RS740,
  47    CHIP_RV515, /* R5xx-based cores. (GFX2) */
  48    CHIP_R520,
  49    CHIP_RV530,
  50    CHIP_R580,
  51    CHIP_RV560,
  52    CHIP_RV570,
  53    CHIP_R600, /* GFX3 (R6xx) */
  54    CHIP_RV610,
  55    CHIP_RV630,
  56    CHIP_RV670,
  57    CHIP_RV620,
  58    CHIP_RV635,
  59    CHIP_RS780,
  60    CHIP_RS880,
  61    CHIP_RV770, /* GFX3 (R7xx) */
  62    CHIP_RV730,
  63    CHIP_RV710,
  64    CHIP_RV740,
  65    CHIP_CEDAR, /* GFX4 (Evergreen) */
  66    CHIP_REDWOOD,
  67    CHIP_JUNIPER,
  68    CHIP_CYPRESS,
  69    CHIP_HEMLOCK,
  70    CHIP_PALM,
  71    CHIP_SUMO,
  72    CHIP_SUMO2,
  73    CHIP_BARTS,
  74    CHIP_TURKS,
  75    CHIP_CAICOS,
  76    CHIP_CAYMAN, /* GFX5 (Northern Islands) */
  77    CHIP_ARUBA,
  78    CHIP_TAHITI, /* GFX6 (Southern Islands) */
  79    CHIP_PITCAIRN,
  80    CHIP_VERDE,
  81    CHIP_OLAND,
  82    CHIP_HAINAN,
  83    CHIP_BONAIRE, /* GFX7 (Sea Islands) */
  84    CHIP_KAVERI,
  85    CHIP_KABINI,
  86    CHIP_HAWAII,
  87    CHIP_TONGA, /* GFX8 (Volcanic Islands & Polaris) */
  88    CHIP_ICELAND,
  89    CHIP_CARRIZO,
  90    CHIP_FIJI,
  91    CHIP_STONEY,
  92    CHIP_POLARIS10,
  93    CHIP_POLARIS11,
  94    CHIP_POLARIS12,
  95    CHIP_VEGAM,
  96    CHIP_VEGA10, /* GFX9 (Vega) */
  97    CHIP_VEGA12,
  98    CHIP_VEGA20,
  99    CHIP_RAVEN,
 100    CHIP_RAVEN2,
 101    CHIP_RENOIR,
 102    CHIP_ARCTURUS,
 103    CHIP_NAVI10,
 104    CHIP_NAVI12,
 105    CHIP_NAVI14,
 106    CHIP_SIENNA_CICHLID,
 107    CHIP_NAVY_FLOUNDER,
 108    CHIP_LAST,
 109 };
 110
 111 enum chip_class
 112 {
 113    CLASS_UNKNOWN = 0,
 114    R300,
 115    R400,
 116    R500,
 117    R600,
 118    R700,
 119    EVERGREEN,
 120    CAYMAN,
 121    GFX6,
 122    GFX7,
 123    GFX8,
 124    GFX9,
 125    GFX10,
 126    GFX10_3,
 127 };
 128
 129 enum ring_type
 130 {
 131    RING_GFX = 0,
 132    RING_COMPUTE,
 133    RING_DMA,
 134    RING_UVD,
 135    RING_VCE,
 136    RING_UVD_ENC,
 137    RING_VCN_DEC,
 138    RING_VCN_ENC,
 139    RING_VCN_JPEG,
 140    NUM_RING_TYPES,
 141 };
 142
 143 #endif