src/amd/common/r600d_common.h

   1 /*
   2  * Copyright 2013 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors: Marek Olšák <maraeo@gmail.com>
  24  */
  25
  26 #ifndef R600D_COMMON_H
  27 #define R600D_COMMON_H
  28
  29 #define R600_CONFIG_REG_OFFSET  0x08000
  30 #define R600_CONTEXT_REG_OFFSET 0x28000
  31 #define SI_SH_REG_OFFSET                     0x0000B000
  32 #define SI_SH_REG_END                        0x0000C000
  33 #define CIK_UCONFIG_REG_OFFSET               0x00030000
  34 #define CIK_UCONFIG_REG_END                  0x00038000
  35
  36 #define PKT_TYPE_S(x)                   (((unsigned)(x) & 0x3) << 30)
  37 #define PKT_COUNT_S(x)                  (((unsigned)(x) & 0x3FFF) << 16)
  38 #define PKT3_IT_OPCODE_S(x)             (((unsigned)(x) & 0xFF) << 8)
  39 #define PKT3_PREDICATE(x)               (((x) >> 0) & 0x1)
  40 #define PKT3(op, count, predicate) (PKT_TYPE_S(3) | PKT_COUNT_S(count) | PKT3_IT_OPCODE_S(op) | PKT3_PREDICATE(predicate))
  41
  42 #define RADEON_CP_PACKET3_COMPUTE_MODE 0x00000002
  43
  44 #define PKT3_NOP                               0x10
  45 #define PKT3_SET_PREDICATION                   0x20
  46 #define PKT3_STRMOUT_BUFFER_UPDATE             0x34
  47 #define         STRMOUT_STORE_BUFFER_FILLED_SIZE        1
  48 #define         STRMOUT_OFFSET_SOURCE(x)        (((unsigned)(x) & 0x3) << 1)
  49 #define                 STRMOUT_OFFSET_FROM_PACKET              0
  50 #define                 STRMOUT_OFFSET_FROM_VGT_FILLED_SIZE     1
  51 #define                 STRMOUT_OFFSET_FROM_MEM                 2
  52 #define                 STRMOUT_OFFSET_NONE                     3
  53 #define         STRMOUT_SELECT_BUFFER(x)        (((unsigned)(x) & 0x3) << 8)
  54 #define PKT3_WAIT_REG_MEM                      0x3C
  55 #define         WAIT_REG_MEM_EQUAL              3
  56 #define         WAIT_REG_MEM_MEM_SPACE(x)       (((unsigned)(x) & 0x3) << 4)
  57 #define PKT3_COPY_DATA                         0x40
  58 #define         COPY_DATA_SRC_SEL(x)            ((x) & 0xf)
  59 #define                 COPY_DATA_REG           0
  60 #define                 COPY_DATA_MEM           1
  61 #define                 COPY_DATA_PERF          4
  62 #define                 COPY_DATA_IMM           5
  63 #define                 COPY_DATA_TIMESTAMP     9
  64 #define         COPY_DATA_DST_SEL(x)            (((unsigned)(x) & 0xf) << 8)
  65 #define                 COPY_DATA_MEM_ASYNC     5
  66 #define         COPY_DATA_COUNT_SEL             (1 << 16)
  67 #define         COPY_DATA_WR_CONFIRM            (1 << 20)
  68 #define PKT3_EVENT_WRITE                       0x46
  69 #define PKT3_EVENT_WRITE_EOP                   0x47
  70 #define         EOP_DATA_SEL(x)                         ((x) << 29)
  71                 /* 0 - discard
  72                  * 1 - send low 32bit data
  73                  * 2 - send 64bit data
  74                  * 3 - send 64bit GPU counter value
  75                  * 4 - send 64bit sys counter value
  76                  */
  77 #define PKT3_RELEASE_MEM                       0x49 /* GFX9+ */
  78 #define PKT3_SET_CONFIG_REG                    0x68
  79 #define PKT3_SET_CONTEXT_REG                   0x69
  80 #define PKT3_STRMOUT_BASE_UPDATE               0x72 /* r700 only */
  81 #define PKT3_SURFACE_BASE_UPDATE               0x73 /* r600 only */
  82 #define         SURFACE_BASE_UPDATE_DEPTH      (1 << 0)
  83 #define         SURFACE_BASE_UPDATE_COLOR(x)   (2 << (x))
  84 #define         SURFACE_BASE_UPDATE_COLOR_NUM(x) (((1 << x) - 1) << 1)
  85 #define         SURFACE_BASE_UPDATE_STRMOUT(x) (0x200 << (x))
  86 #define PKT3_SET_SH_REG                        0x76 /* SI and later */
  87 #define PKT3_SET_UCONFIG_REG                   0x79 /* CIK and later */
  88
  89 #define EVENT_TYPE_SAMPLE_STREAMOUTSTATS1      0x1 /* EG and later */
  90 #define EVENT_TYPE_SAMPLE_STREAMOUTSTATS2      0x2 /* EG and later */
  91 #define EVENT_TYPE_SAMPLE_STREAMOUTSTATS3      0x3 /* EG and later */
  92 #define EVENT_TYPE_PS_PARTIAL_FLUSH            0x10
  93 #define EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT 0x14
  94 #define EVENT_TYPE_ZPASS_DONE                  0x15
  95 #define EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT   0x16
  96 #define EVENT_TYPE_PERFCOUNTER_START            0x17
  97 #define EVENT_TYPE_PERFCOUNTER_STOP             0x18
  98 #define EVENT_TYPE_PIPELINESTAT_START           25
  99 #define EVENT_TYPE_PIPELINESTAT_STOP            26
 100 #define EVENT_TYPE_PERFCOUNTER_SAMPLE           0x1B
 101 #define EVENT_TYPE_SAMPLE_PIPELINESTAT          30
 102 #define EVENT_TYPE_SO_VGTSTREAMOUT_FLUSH        0x1f
 103 #define EVENT_TYPE_SAMPLE_STREAMOUTSTATS        0x20
 104 #define EVENT_TYPE_BOTTOM_OF_PIPE_TS            40
 105 #define EVENT_TYPE_FLUSH_AND_INV_DB_META       0x2c /* supported on r700+ */
 106 #define EVENT_TYPE_FLUSH_AND_INV_CB_META        46 /* supported on r700+ */
 107 #define         EVENT_TYPE(x)                           ((x) << 0)
 108 #define         EVENT_INDEX(x)                          ((x) << 8)
 109                 /* 0 - any non-TS event
 110                  * 1 - ZPASS_DONE
 111                  * 2 - SAMPLE_PIPELINESTAT
 112                  * 3 - SAMPLE_STREAMOUTSTAT*
 113                  * 4 - *S_PARTIAL_FLUSH
 114                  * 5 - TS events
 115                  */
 116
 117 #define PREDICATION_OP_CLEAR 0x0
 118 #define PREDICATION_OP_ZPASS 0x1
 119 #define PREDICATION_OP_PRIMCOUNT 0x2
 120 #define PRED_OP(x) ((x) << 16)
 121 #define PREDICATION_CONTINUE (1 << 31)
 122 #define PREDICATION_HINT_WAIT (0 << 12)
 123 #define PREDICATION_HINT_NOWAIT_DRAW (1 << 12)
 124 #define PREDICATION_DRAW_NOT_VISIBLE (0 << 8)
 125 #define PREDICATION_DRAW_VISIBLE (1 << 8)
 126
 127 /* R600-R700*/
 128 #define R_008490_CP_STRMOUT_CNTL                     0x008490
 129 #define   S_008490_OFFSET_UPDATE_DONE(x)                (((unsigned)(x) & 0x1) << 0)
 130 #define R_028AB0_VGT_STRMOUT_EN                      0x028AB0
 131 #define   S_028AB0_STREAMOUT(x)                        (((unsigned)(x) & 0x1) << 0)
 132 #define   G_028AB0_STREAMOUT(x)                        (((x) >> 0) & 0x1)
 133 #define   C_028AB0_STREAMOUT                           0xFFFFFFFE
 134 #define R_028B20_VGT_STRMOUT_BUFFER_EN               0x028B20
 135 #define   S_028B20_BUFFER_0_EN(x)                      (((unsigned)(x) & 0x1) << 0)
 136 #define   G_028B20_BUFFER_0_EN(x)                      (((x) >> 0) & 0x1)
 137 #define   C_028B20_BUFFER_0_EN                         0xFFFFFFFE
 138 #define   S_028B20_BUFFER_1_EN(x)                      (((unsigned)(x) & 0x1) << 1)
 139 #define   G_028B20_BUFFER_1_EN(x)                      (((x) >> 1) & 0x1)
 140 #define   C_028B20_BUFFER_1_EN                         0xFFFFFFFD
 141 #define   S_028B20_BUFFER_2_EN(x)                      (((unsigned)(x) & 0x1) << 2)
 142 #define   G_028B20_BUFFER_2_EN(x)                      (((x) >> 2) & 0x1)
 143 #define   C_028B20_BUFFER_2_EN                         0xFFFFFFFB
 144 #define   S_028B20_BUFFER_3_EN(x)                      (((unsigned)(x) & 0x1) << 3)
 145 #define   G_028B20_BUFFER_3_EN(x)                      (((x) >> 3) & 0x1)
 146 #define   C_028B20_BUFFER_3_EN                         0xFFFFFFF7
 147 #define R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0                              0x028AD0
 148
 149 #define     V_0280A0_SWAP_STD                          0x00000000
 150 #define     V_0280A0_SWAP_ALT                          0x00000001
 151 #define     V_0280A0_SWAP_STD_REV                      0x00000002
 152 #define     V_0280A0_SWAP_ALT_REV                      0x00000003
 153
 154 /* EG+ */
 155 #define R_0084FC_CP_STRMOUT_CNTL                     0x0084FC
 156 #define   S_0084FC_OFFSET_UPDATE_DONE(x)                (((unsigned)(x) & 0x1) << 0)
 157 #define R_028B94_VGT_STRMOUT_CONFIG                                     0x028B94
 158 #define   S_028B94_STREAMOUT_0_EN(x)                                  (((unsigned)(x) & 0x1) << 0)
 159 #define   G_028B94_STREAMOUT_0_EN(x)                                  (((x) >> 0) & 0x1)
 160 #define   C_028B94_STREAMOUT_0_EN                                     0xFFFFFFFE
 161 #define   S_028B94_STREAMOUT_1_EN(x)                                  (((unsigned)(x) & 0x1) << 1)
 162 #define   G_028B94_STREAMOUT_1_EN(x)                                  (((x) >> 1) & 0x1)
 163 #define   C_028B94_STREAMOUT_1_EN                                     0xFFFFFFFD
 164 #define   S_028B94_STREAMOUT_2_EN(x)                                  (((unsigned)(x) & 0x1) << 2)
 165 #define   G_028B94_STREAMOUT_2_EN(x)                                  (((x) >> 2) & 0x1)
 166 #define   C_028B94_STREAMOUT_2_EN                                     0xFFFFFFFB
 167 #define   S_028B94_STREAMOUT_3_EN(x)                                  (((unsigned)(x) & 0x1) << 3)
 168 #define   G_028B94_STREAMOUT_3_EN(x)                                  (((x) >> 3) & 0x1)
 169 #define   C_028B94_STREAMOUT_3_EN                                     0xFFFFFFF7
 170 #define   S_028B94_RAST_STREAM(x)                                     (((unsigned)(x) & 0x07) << 4)
 171 #define   G_028B94_RAST_STREAM(x)                                     (((x) >> 4) & 0x07)
 172 #define   C_028B94_RAST_STREAM                                        0xFFFFFF8F
 173 #define   S_028B94_RAST_STREAM_MASK(x)                                (((unsigned)(x) & 0x0F) << 8) /* SI+ */
 174 #define   G_028B94_RAST_STREAM_MASK(x)                                (((x) >> 8) & 0x0F)
 175 #define   C_028B94_RAST_STREAM_MASK                                   0xFFFFF0FF
 176 #define   S_028B94_USE_RAST_STREAM_MASK(x)                            (((unsigned)(x) & 0x1) << 31) /* SI+ */
 177 #define   G_028B94_USE_RAST_STREAM_MASK(x)                            (((x) >> 31) & 0x1)
 178 #define   C_028B94_USE_RAST_STREAM_MASK                               0x7FFFFFFF
 179 #define R_028B98_VGT_STRMOUT_BUFFER_CONFIG                              0x028B98
 180 #define   S_028B98_STREAM_0_BUFFER_EN(x)                              (((unsigned)(x) & 0x0F) << 0)
 181 #define   G_028B98_STREAM_0_BUFFER_EN(x)                              (((x) >> 0) & 0x0F)
 182 #define   C_028B98_STREAM_0_BUFFER_EN                                 0xFFFFFFF0
 183 #define   S_028B98_STREAM_1_BUFFER_EN(x)                              (((unsigned)(x) & 0x0F) << 4)
 184 #define   G_028B98_STREAM_1_BUFFER_EN(x)                              (((x) >> 4) & 0x0F)
 185 #define   C_028B98_STREAM_1_BUFFER_EN                                 0xFFFFFF0F
 186 #define   S_028B98_STREAM_2_BUFFER_EN(x)                              (((unsigned)(x) & 0x0F) << 8)
 187 #define   G_028B98_STREAM_2_BUFFER_EN(x)                              (((x) >> 8) & 0x0F)
 188 #define   C_028B98_STREAM_2_BUFFER_EN                                 0xFFFFF0FF
 189 #define   S_028B98_STREAM_3_BUFFER_EN(x)                              (((unsigned)(x) & 0x0F) << 12)
 190 #define   G_028B98_STREAM_3_BUFFER_EN(x)                              (((x) >> 12) & 0x0F)
 191 #define   C_028B98_STREAM_3_BUFFER_EN                                 0xFFFF0FFF
 192
 193 #define EG_R_028A4C_PA_SC_MODE_CNTL_1                0x028A4C
 194 #define   EG_S_028A4C_PS_ITER_SAMPLE(x)                 (((unsigned)(x) & 0x1) << 16)
 195 #define   EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(x)        (((unsigned)(x) & 0x1) << 25)
 196 #define   EG_S_028A4C_FORCE_EOV_REZ_ENABLE(x)           (((unsigned)(x) & 0x1) << 26)
 197
 198 #define CM_R_028804_DB_EQAA                          0x00028804
 199 #define   S_028804_MAX_ANCHOR_SAMPLES(x)                (((unsigned)(x) & 0x07) << 0)
 200 #define   G_028804_MAX_ANCHOR_SAMPLES(x)                (((x) >> 0) & 0x07)
 201 #define   C_028804_MAX_ANCHOR_SAMPLES                   0xFFFFFFF8
 202 #define   S_028804_PS_ITER_SAMPLES(x)                   (((unsigned)(x) & 0x07) << 4)
 203 #define   G_028804_PS_ITER_SAMPLES(x)                   (((x) >> 4) & 0x07)
 204 #define   C_028804_PS_ITER_SAMPLES                      0xFFFFFF8F
 205 #define   S_028804_MASK_EXPORT_NUM_SAMPLES(x)           (((unsigned)(x) & 0x07) << 8)
 206 #define   G_028804_MASK_EXPORT_NUM_SAMPLES(x)           (((x) >> 8) & 0x07)
 207 #define   C_028804_MASK_EXPORT_NUM_SAMPLES              0xFFFFF8FF
 208 #define   S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x)         (((unsigned)(x) & 0x07) << 12)
 209 #define   G_028804_ALPHA_TO_MASK_NUM_SAMPLES(x)         (((x) >> 12) & 0x07)
 210 #define   C_028804_ALPHA_TO_MASK_NUM_SAMPLES            0xFFFF8FFF
 211 #define   S_028804_HIGH_QUALITY_INTERSECTIONS(x)        (((unsigned)(x) & 0x1) << 16)
 212 #define   G_028804_HIGH_QUALITY_INTERSECTIONS(x)        (((x) >> 16) & 0x1)
 213 #define   C_028804_HIGH_QUALITY_INTERSECTIONS           0xFFFEFFFF
 214 #define   S_028804_INCOHERENT_EQAA_READS(x)             (((unsigned)(x) & 0x1) << 17)
 215 #define   G_028804_INCOHERENT_EQAA_READS(x)             (((x) >> 17) & 0x1)
 216 #define   C_028804_INCOHERENT_EQAA_READS                0xFFFDFFFF
 217 #define   S_028804_INTERPOLATE_COMP_Z(x)                (((unsigned)(x) & 0x1) << 18)
 218 #define   G_028804_INTERPOLATE_COMP_Z(x)                (((x) >> 18) & 0x1)
 219 #define   C_028804_INTERPOLATE_COMP_Z                   0xFFFBFFFF
 220 #define   S_028804_INTERPOLATE_SRC_Z(x)                 (((unsigned)(x) & 0x1) << 19)
 221 #define   G_028804_INTERPOLATE_SRC_Z(x)                 (((x) >> 19) & 0x1)
 222 #define   C_028804_INTERPOLATE_SRC_Z                    0xFFF7FFFF
 223 #define   S_028804_STATIC_ANCHOR_ASSOCIATIONS(x)        (((unsigned)(x) & 0x1) << 20)
 224 #define   G_028804_STATIC_ANCHOR_ASSOCIATIONS(x)        (((x) >> 20) & 0x1)
 225 #define   C_028804_STATIC_ANCHOR_ASSOCIATIONS           0xFFEFFFFF
 226 #define   S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x)        (((unsigned)(x) & 0x1) << 21)
 227 #define   G_028804_ALPHA_TO_MASK_EQAA_DISABLE(x)        (((x) >> 21) & 0x1)
 228 #define   C_028804_ALPHA_TO_MASK_EQAA_DISABLE           0xFFDFFFFF
 229 #define   S_028804_OVERRASTERIZATION_AMOUNT(x)          (((unsigned)(x) & 0x07) << 24)
 230 #define   G_028804_OVERRASTERIZATION_AMOUNT(x)          (((x) >> 24) & 0x07)
 231 #define   C_028804_OVERRASTERIZATION_AMOUNT             0xF8FFFFFF
 232 #define   S_028804_ENABLE_POSTZ_OVERRASTERIZATION(x)    (((unsigned)(x) & 0x1) << 27)
 233 #define   G_028804_ENABLE_POSTZ_OVERRASTERIZATION(x)    (((x) >> 27) & 0x1)
 234 #define   C_028804_ENABLE_POSTZ_OVERRASTERIZATION       0xF7FFFFFF
 235 #define CM_R_028BDC_PA_SC_LINE_CNTL                  0x28bdc
 236 #define   S_028BDC_EXPAND_LINE_WIDTH(x)                (((unsigned)(x) & 0x1) << 9)
 237 #define   G_028BDC_EXPAND_LINE_WIDTH(x)                (((x) >> 9) & 0x1)
 238 #define   C_028BDC_EXPAND_LINE_WIDTH                   0xFFFFFDFF
 239 #define   S_028BDC_LAST_PIXEL(x)                       (((unsigned)(x) & 0x1) << 10)
 240 #define   G_028BDC_LAST_PIXEL(x)                       (((x) >> 10) & 0x1)
 241 #define   C_028BDC_LAST_PIXEL                          0xFFFFFBFF
 242 #define   S_028BDC_PERPENDICULAR_ENDCAP_ENA(x)         (((unsigned)(x) & 0x1) << 11)
 243 #define   G_028BDC_PERPENDICULAR_ENDCAP_ENA(x)         (((x) >> 11) & 0x1)
 244 #define   C_028BDC_PERPENDICULAR_ENDCAP_ENA            0xFFFFF7FF
 245 #define   S_028BDC_DX10_DIAMOND_TEST_ENA(x)            (((unsigned)(x) & 0x1) << 12)
 246 #define   G_028BDC_DX10_DIAMOND_TEST_ENA(x)            (((x) >> 12) & 0x1)
 247 #define   C_028BDC_DX10_DIAMOND_TEST_ENA               0xFFFFEFFF
 248 #define CM_R_028BE0_PA_SC_AA_CONFIG                  0x28be0
 249 #define   S_028BE0_MSAA_NUM_SAMPLES(x)                 (((unsigned)(x) & 0x07) << 0)
 250 #define   G_028BE0_MSAA_NUM_SAMPLES(x)                 (((x) >> 0) & 0x07)
 251 #define   C_028BE0_MSAA_NUM_SAMPLES                    0xFFFFFFF8
 252 #define   S_028BE0_AA_MASK_CENTROID_DTMN(x)            (((unsigned)(x) & 0x1) << 4)
 253 #define   G_028BE0_AA_MASK_CENTROID_DTMN(x)            (((x) >> 4) & 0x1)
 254 #define   C_028BE0_AA_MASK_CENTROID_DTMN               0xFFFFFFEF
 255 #define   S_028BE0_MAX_SAMPLE_DIST(x)                  (((unsigned)(x) & 0x0F) << 13)
 256 #define   G_028BE0_MAX_SAMPLE_DIST(x)                  (((x) >> 13) & 0x0F)
 257 #define   C_028BE0_MAX_SAMPLE_DIST                     0xFFFE1FFF
 258 #define   S_028BE0_MSAA_EXPOSED_SAMPLES(x)             (((unsigned)(x) & 0x07) << 20)
 259 #define   G_028BE0_MSAA_EXPOSED_SAMPLES(x)             (((x) >> 20) & 0x07)
 260 #define   C_028BE0_MSAA_EXPOSED_SAMPLES                0xFF8FFFFF
 261 #define   S_028BE0_DETAIL_TO_EXPOSED_MODE(x)           (((unsigned)(x) & 0x03) << 24)
 262 #define   G_028BE0_DETAIL_TO_EXPOSED_MODE(x)           (((x) >> 24) & 0x03)
 263 #define   C_028BE0_DETAIL_TO_EXPOSED_MODE              0xFCFFFFFF
 264 #define CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x28bf8
 265 #define CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x28c08
 266 #define CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x28c18
 267 #define CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x28c28
 268
 269 #define   EG_S_028C70_FAST_CLEAR(x)                       (((unsigned)(x) & 0x1) << 17)
 270 #define   SI_S_028C70_FAST_CLEAR(x)                       (((unsigned)(x) & 0x1) << 13)
 271
 272 /*CIK+*/
 273 #define R_0300FC_CP_STRMOUT_CNTL                     0x0300FC
 274
 275 #define R600_R_028C0C_PA_CL_GB_VERT_CLIP_ADJ         0x028C0C
 276 #define CM_R_028BE8_PA_CL_GB_VERT_CLIP_ADJ           0x28be8
 277 #define R_02843C_PA_CL_VPORT_XSCALE                  0x02843C
 278
 279 #define R_028250_PA_SC_VPORT_SCISSOR_0_TL                               0x028250
 280 #define   S_028250_TL_X(x)                                            (((unsigned)(x) & 0x7FFF) << 0)
 281 #define   G_028250_TL_X(x)                                            (((x) >> 0) & 0x7FFF)
 282 #define   C_028250_TL_X                                               0xFFFF8000
 283 #define   S_028250_TL_Y(x)                                            (((unsigned)(x) & 0x7FFF) << 16)
 284 #define   G_028250_TL_Y(x)                                            (((x) >> 16) & 0x7FFF)
 285 #define   C_028250_TL_Y                                               0x8000FFFF
 286 #define   S_028250_WINDOW_OFFSET_DISABLE(x)                           (((unsigned)(x) & 0x1) << 31)
 287 #define   G_028250_WINDOW_OFFSET_DISABLE(x)                           (((x) >> 31) & 0x1)
 288 #define   C_028250_WINDOW_OFFSET_DISABLE                              0x7FFFFFFF
 289 #define   S_028254_BR_X(x)                                            (((unsigned)(x) & 0x7FFF) << 0)
 290 #define   G_028254_BR_X(x)                                            (((x) >> 0) & 0x7FFF)
 291 #define   C_028254_BR_X                                               0xFFFF8000
 292 #define   S_028254_BR_Y(x)                                            (((unsigned)(x) & 0x7FFF) << 16)
 293 #define   G_028254_BR_Y(x)                                            (((x) >> 16) & 0x7FFF)
 294 #define   C_028254_BR_Y                                               0x8000FFFF
 295 #define R_0282D0_PA_SC_VPORT_ZMIN_0                                     0x0282D0
 296 #define R_0282D4_PA_SC_VPORT_ZMAX_0                                     0x0282D4
 297
 298 #endif