aco: validate instructions reading/writing upper halves/bytes
[mesa.git] / src / amd / compiler / aco_ir.cpp
1 /*
2 * Copyright © 2020 Valve Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24 #include "aco_ir.h"
25
26 namespace aco {
27
28 bool can_use_opsel(chip_class chip, aco_opcode op, int idx, bool high)
29 {
30 /* opsel is only GFX9+ */
31 if ((high || idx == -1) && chip < GFX9)
32 return false;
33
34 switch (op) {
35 case aco_opcode::v_div_fixup_f16:
36 case aco_opcode::v_fma_f16:
37 case aco_opcode::v_mad_f16:
38 case aco_opcode::v_mad_u16:
39 case aco_opcode::v_mad_i16:
40 case aco_opcode::v_med3_f16:
41 case aco_opcode::v_med3_i16:
42 case aco_opcode::v_med3_u16:
43 case aco_opcode::v_min3_f16:
44 case aco_opcode::v_min3_i16:
45 case aco_opcode::v_min3_u16:
46 case aco_opcode::v_max3_f16:
47 case aco_opcode::v_max3_i16:
48 case aco_opcode::v_max3_u16:
49 case aco_opcode::v_max_u16_e64:
50 case aco_opcode::v_max_i16_e64:
51 case aco_opcode::v_min_u16_e64:
52 case aco_opcode::v_min_i16_e64:
53 case aco_opcode::v_add_i16:
54 case aco_opcode::v_sub_i16:
55 case aco_opcode::v_add_u16_e64:
56 case aco_opcode::v_sub_u16_e64:
57 case aco_opcode::v_cvt_pknorm_i16_f16:
58 case aco_opcode::v_cvt_pknorm_u16_f16:
59 case aco_opcode::v_lshlrev_b16_e64:
60 case aco_opcode::v_lshrrev_b16_e64:
61 case aco_opcode::v_ashrrev_i16_e64:
62 case aco_opcode::v_mul_lo_u16_e64:
63 return true;
64 case aco_opcode::v_pack_b32_f16:
65 return idx != -1;
66 case aco_opcode::v_mad_u32_u16:
67 case aco_opcode::v_mad_i32_i16:
68 return idx >= 0 && idx < 2;
69 default:
70 return false;
71 }
72 }
73
74 }