2 * Copyright © 2018 Valve Corporation
3 * Copyright © 2018 Google
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 * Daniel Schürmann (daniel.schuermann@campus.tu-berlin.de)
26 * Bas Nieuwenhuizen (bas@basnieuwenhuizen.nl)
31 #include "util/u_math.h"
36 #include "vulkan/radv_shader.h"
41 void process_live_temps_per_block(Program
*program
, live
& lives
, Block
* block
,
42 std::set
<unsigned>& worklist
, std::vector
<uint16_t>& phi_sgpr_ops
)
44 std::vector
<RegisterDemand
>& register_demand
= lives
.register_demand
[block
->index
];
45 RegisterDemand new_demand
;
47 register_demand
.resize(block
->instructions
.size());
48 block
->register_demand
= RegisterDemand();
50 std::set
<Temp
> live_sgprs
;
51 std::set
<Temp
> live_vgprs
;
53 /* add the live_out_exec to live */
54 bool exec_live
= false;
55 if (block
->live_out_exec
!= Temp()) {
56 live_sgprs
.insert(block
->live_out_exec
);
61 /* split the live-outs from this block into the temporary sets */
62 std::vector
<std::set
<Temp
>>& live_temps
= lives
.live_out
;
63 for (const Temp temp
: live_temps
[block
->index
]) {
64 const bool inserted
= temp
.is_linear()
65 ? live_sgprs
.insert(temp
).second
66 : live_vgprs
.insert(temp
).second
;
71 new_demand
.sgpr
-= phi_sgpr_ops
[block
->index
];
73 /* traverse the instructions backwards */
74 for (int idx
= block
->instructions
.size() -1; idx
>= 0; idx
--)
76 /* substract the 2 sgprs from exec */
78 assert(new_demand
.sgpr
>= 2);
79 register_demand
[idx
] = RegisterDemand(new_demand
.vgpr
, new_demand
.sgpr
- (exec_live
? 2 : 0));
81 Instruction
*insn
= block
->instructions
[idx
].get();
83 for (Definition
& definition
: insn
->definitions
) {
84 if (!definition
.isTemp()) {
88 const Temp temp
= definition
.getTemp();
91 n
= live_sgprs
.erase(temp
);
93 n
= live_vgprs
.erase(temp
);
97 definition
.setKill(false);
99 register_demand
[idx
] += temp
;
100 definition
.setKill(true);
103 if (definition
.isFixed() && definition
.physReg() == exec
)
108 if (insn
->opcode
== aco_opcode::p_phi
||
109 insn
->opcode
== aco_opcode::p_linear_phi
) {
110 /* directly insert into the predecessors live-out set */
111 std::vector
<unsigned>& preds
= insn
->opcode
== aco_opcode::p_phi
112 ? block
->logical_preds
113 : block
->linear_preds
;
114 for (unsigned i
= 0; i
< preds
.size(); ++i
)
116 Operand
&operand
= insn
->operands
[i
];
117 if (!operand
.isTemp()) {
120 /* check if we changed an already processed block */
121 const bool inserted
= live_temps
[preds
[i
]].insert(operand
.getTemp()).second
;
123 operand
.setFirstKill(true);
124 worklist
.insert(preds
[i
]);
125 if (insn
->opcode
== aco_opcode::p_phi
&& operand
.getTemp().type() == RegType::sgpr
)
126 phi_sgpr_ops
[preds
[i
]] += operand
.size();
129 } else if (insn
->opcode
== aco_opcode::p_logical_end
) {
130 new_demand
.sgpr
+= phi_sgpr_ops
[block
->index
];
132 for (unsigned i
= 0; i
< insn
->operands
.size(); ++i
)
134 Operand
& operand
= insn
->operands
[i
];
135 if (!operand
.isTemp()) {
138 const Temp temp
= operand
.getTemp();
139 const bool inserted
= temp
.is_linear()
140 ? live_sgprs
.insert(temp
).second
141 : live_vgprs
.insert(temp
).second
;
143 operand
.setFirstKill(true);
144 for (unsigned j
= i
+ 1; j
< insn
->operands
.size(); ++j
) {
145 if (insn
->operands
[j
].isTemp() && insn
->operands
[j
].tempId() == operand
.tempId()) {
146 insn
->operands
[j
].setFirstKill(false);
147 insn
->operands
[j
].setKill(true);
152 operand
.setKill(false);
155 if (operand
.isFixed() && operand
.physReg() == exec
)
160 block
->register_demand
.update(register_demand
[idx
]);
163 /* now, we have the live-in sets and need to merge them into the live-out sets */
164 for (unsigned pred_idx
: block
->logical_preds
) {
165 for (Temp vgpr
: live_vgprs
) {
166 auto it
= live_temps
[pred_idx
].insert(vgpr
);
168 worklist
.insert(pred_idx
);
172 for (unsigned pred_idx
: block
->linear_preds
) {
173 for (Temp sgpr
: live_sgprs
) {
174 auto it
= live_temps
[pred_idx
].insert(sgpr
);
176 worklist
.insert(pred_idx
);
180 if (!(block
->index
!= 0 || (live_vgprs
.empty() && live_sgprs
.empty()))) {
181 aco_print_program(program
, stderr
);
182 fprintf(stderr
, "These temporaries are never defined or are defined after use:\n");
183 for (Temp vgpr
: live_vgprs
)
184 fprintf(stderr
, "%%%d\n", vgpr
.id());
185 for (Temp sgpr
: live_sgprs
)
186 fprintf(stderr
, "%%%d\n", sgpr
.id());
190 assert(block
->index
!= 0 || new_demand
== RegisterDemand());
192 } /* end namespace */
194 uint16_t get_extra_sgprs(Program
*program
)
196 if (program
->chip_class
>= GFX10
) {
197 assert(!program
->needs_flat_scr
);
198 assert(!program
->needs_xnack_mask
);
200 } else if (program
->chip_class
>= GFX8
) {
201 if (program
->needs_flat_scr
)
203 else if (program
->needs_xnack_mask
)
205 else if (program
->needs_vcc
)
210 assert(!program
->needs_xnack_mask
);
211 if (program
->needs_flat_scr
)
213 else if (program
->needs_vcc
)
220 uint16_t get_sgpr_alloc(Program
*program
, uint16_t addressable_sgprs
)
222 assert(addressable_sgprs
<= program
->sgpr_limit
);
223 uint16_t sgprs
= addressable_sgprs
+ get_extra_sgprs(program
);
224 uint16_t granule
= program
->sgpr_alloc_granule
+ 1;
225 return align(std::max(sgprs
, granule
), granule
);
228 uint16_t get_addr_sgpr_from_waves(Program
*program
, uint16_t max_waves
)
230 uint16_t sgprs
= program
->physical_sgprs
/ max_waves
& ~program
->sgpr_alloc_granule
;
231 sgprs
-= get_extra_sgprs(program
);
232 return std::min(sgprs
, program
->sgpr_limit
);
235 void update_vgpr_sgpr_demand(Program
* program
, const RegisterDemand new_demand
)
237 // TODO: also take shared mem into account
238 const int16_t vgpr_alloc
= std::max
<int16_t>(4, (new_demand
.vgpr
+ 3) & ~3);
239 /* this won't compile, register pressure reduction necessary */
240 if (new_demand
.vgpr
> 256 || new_demand
.sgpr
> program
->sgpr_limit
) {
241 program
->num_waves
= 0;
242 program
->max_reg_demand
= new_demand
;
244 program
->num_waves
= program
->physical_sgprs
/ get_sgpr_alloc(program
, new_demand
.sgpr
);
245 program
->num_waves
= std::min
<uint16_t>(program
->num_waves
, 256 / vgpr_alloc
);
246 program
->num_waves
= std::min
<uint16_t>(program
->num_waves
, 10);
248 program
->max_reg_demand
.vgpr
= int16_t((256 / program
->num_waves
) & ~3);
249 program
->max_reg_demand
.sgpr
= get_addr_sgpr_from_waves(program
, program
->num_waves
);
253 live
live_var_analysis(Program
* program
,
254 const struct radv_nir_compiler_options
*options
)
257 result
.live_out
.resize(program
->blocks
.size());
258 result
.register_demand
.resize(program
->blocks
.size());
259 std::set
<unsigned> worklist
;
260 std::vector
<uint16_t> phi_sgpr_ops(program
->blocks
.size());
261 RegisterDemand new_demand
;
263 /* this implementation assumes that the block idx corresponds to the block's position in program->blocks vector */
264 for (Block
& block
: program
->blocks
)
265 worklist
.insert(block
.index
);
266 while (!worklist
.empty()) {
267 std::set
<unsigned>::reverse_iterator b_it
= worklist
.rbegin();
268 unsigned block_idx
= *b_it
;
269 worklist
.erase(block_idx
);
270 process_live_temps_per_block(program
, result
, &program
->blocks
[block_idx
], worklist
, phi_sgpr_ops
);
271 new_demand
.update(program
->blocks
[block_idx
].register_demand
);
274 /* calculate the program's register demand and number of waves */
275 update_vgpr_sgpr_demand(program
, new_demand
);