src/amd/compiler/aco_opcodes.py

   1 #
   2 # Copyright (c) 2018 Valve Corporation
   3 #
   4 # Permission is hereby granted, free of charge, to any person obtaining a
   5 # copy of this software and associated documentation files (the "Software"),
   6 # to deal in the Software without restriction, including without limitation
   7 # the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 # and/or sell copies of the Software, and to permit persons to whom the
   9 # Software is furnished to do so, subject to the following conditions:
  10 #
  11 # The above copyright notice and this permission notice (including the next
  12 # paragraph) shall be included in all copies or substantial portions of the
  13 # Software.
  14 #
  15 # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16 # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17 # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18 # THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19 # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20 # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21 # IN THE SOFTWARE.
  22 #
  23 # Authors:
  24 #    Daniel Schuermann (daniel.schuermann@campus.tu-berlin.de)
  25
  26
  27 # Class that represents all the information we have about the opcode
  28 # NOTE: this must be kept in sync with aco_op_info
  29
  30 import sys
  31 from enum import Enum
  32
  33 class Format(Enum):
  34    PSEUDO = 0
  35    SOP1 = 1
  36    SOP2 = 2
  37    SOPK = 3
  38    SOPP = 4
  39    SOPC = 5
  40    SMEM = 6
  41    DS = 8
  42    MTBUF = 9
  43    MUBUF = 10
  44    MIMG = 11
  45    EXP = 12
  46    FLAT = 13
  47    GLOBAL = 14
  48    SCRATCH = 15
  49    PSEUDO_BRANCH = 16
  50    PSEUDO_BARRIER = 17
  51    PSEUDO_REDUCTION = 18
  52    VOP1 = 1 << 8
  53    VOP2 = 1 << 9
  54    VOPC = 1 << 10
  55    VOP3A = 1 << 11
  56    VOP3B = 1 << 11
  57    VOP3P = 1 << 12
  58    VINTRP = 1 << 13
  59    DPP = 1 << 14
  60    SDWA = 1 << 15
  61
  62    def get_builder_fields(self):
  63       if self == Format.SOPK:
  64          return [('uint16_t', 'imm', None)]
  65       elif self == Format.SOPP:
  66          return [('uint32_t', 'block', '-1'),
  67                  ('uint32_t', 'imm', '0')]
  68       elif self == Format.SMEM:
  69          return [('bool', 'can_reorder', 'true'),
  70                  ('bool', 'glc', 'false'),
  71                  ('bool', 'dlc', 'false'),
  72                  ('bool', 'nv', 'false')]
  73       elif self == Format.DS:
  74          return [('int16_t', 'offset0', '0'),
  75                  ('int8_t', 'offset1', '0'),
  76                  ('bool', 'gds', 'false')]
  77       elif self == Format.MTBUF:
  78          return [('unsigned', 'dfmt', None),
  79                  ('unsigned', 'nfmt', None),
  80                  ('unsigned', 'img_format', None),
  81                  ('unsigned', 'offset', None),
  82                  ('bool', 'offen', None),
  83                  ('bool', 'idxen', 'false'),
  84                  ('bool', 'disable_wqm', 'false'),
  85                  ('bool', 'glc', 'false'),
  86                  ('bool', 'dlc', 'false'),
  87                  ('bool', 'slc', 'false'),
  88                  ('bool', 'tfe', 'false'),
  89                  ('bool', 'lds', 'false')]
  90       elif self == Format.MUBUF:
  91          return [('unsigned', 'offset', None),
  92                  ('bool', 'offen', None),
  93                  ('bool', 'idxen', 'false'),
  94                  ('bool', 'disable_wqm', 'false'),
  95                  ('bool', 'glc', 'false'),
  96                  ('bool', 'dlc', 'false'),
  97                  ('bool', 'slc', 'false'),
  98                  ('bool', 'tfe', 'false'),
  99                  ('bool', 'lds', 'false')]
 100       elif self == Format.MIMG:
 101          return [('unsigned', 'dmask', '0xF'),
 102                  ('bool', 'da', 'false'),
 103                  ('bool', 'unrm', 'true'),
 104                  ('bool', 'disable_wqm', 'false'),
 105                  ('bool', 'glc', 'false'),
 106                  ('bool', 'dlc', 'false'),
 107                  ('bool', 'slc', 'false'),
 108                  ('bool', 'tfe', 'false'),
 109                  ('bool', 'lwe', 'false'),
 110                  ('bool', 'r128_a16', 'false', 'r128'),
 111                  ('bool', 'd16', 'false')]
 112          return [('unsigned', 'attribute', None),
 113                  ('unsigned', 'component', None)]
 114       elif self == Format.EXP:
 115          return [('unsigned', 'enabled_mask', None),
 116                  ('unsigned', 'dest', None),
 117                  ('bool', 'compr', 'false', 'compressed'),
 118                  ('bool', 'done', 'false'),
 119                  ('bool', 'vm', 'false', 'valid_mask')]
 120       elif self == Format.PSEUDO_BRANCH:
 121          return [('uint32_t', 'target0', '0', 'target[0]'),
 122                  ('uint32_t', 'target1', '0', 'target[1]')]
 123       elif self == Format.PSEUDO_REDUCTION:
 124          return [('ReduceOp', 'op', None, 'reduce_op'),
 125                  ('unsigned', 'cluster_size', '0')]
 126       elif self == Format.VINTRP:
 127          return [('unsigned', 'attribute', None),
 128                  ('unsigned', 'component', None)]
 129       elif self == Format.DPP:
 130          return [('uint16_t', 'dpp_ctrl', None),
 131                  ('uint8_t', 'row_mask', '0xF'),
 132                  ('uint8_t', 'bank_mask', '0xF'),
 133                  ('bool', 'bound_ctrl', 'false')]
 134       elif self in [Format.FLAT, Format.GLOBAL, Format.SCRATCH]:
 135          return [('uint16_t', 'offset', 0),
 136                  ('bool', 'glc', 'false'),
 137                  ('bool', 'slc', 'false'),
 138                  ('bool', 'lds', 'false'),
 139                  ('bool', 'nv', 'false')]
 140       else:
 141          return []
 142
 143    def get_builder_field_names(self):
 144       return [f[1] for f in self.get_builder_fields()]
 145
 146    def get_builder_field_dests(self):
 147       return [(f[3] if len(f) >= 4 else f[1]) for f in self.get_builder_fields()]
 148
 149    def get_builder_field_decls(self):
 150       return [('%s %s=%s' % (f[0], f[1], f[2]) if f[2] != None else '%s %s' % (f[0], f[1])) for f in self.get_builder_fields()]
 151
 152
 153 class Opcode(object):
 154    """Class that represents all the information we have about the opcode
 155    NOTE: this must be kept in sync with aco_op_info
 156    """
 157    def __init__(self, name, opcode_gfx9, opcode_gfx10, format, input_mod, output_mod):
 158       """Parameters:
 159
 160       - name is the name of the opcode (prepend nir_op_ for the enum name)
 161       - all types are strings that get nir_type_ prepended to them
 162       - input_types is a list of types
 163       - algebraic_properties is a space-seperated string, where nir_op_is_ is
 164         prepended before each entry
 165       - const_expr is an expression or series of statements that computes the
 166         constant value of the opcode given the constant values of its inputs.
 167       """
 168       assert isinstance(name, str)
 169       assert isinstance(opcode_gfx9, int)
 170       assert isinstance(opcode_gfx10, int)
 171       assert isinstance(format, Format)
 172       assert isinstance(input_mod, bool)
 173       assert isinstance(output_mod, bool)
 174
 175       self.name = name
 176       self.opcode_gfx9 = opcode_gfx9
 177       self.opcode_gfx10 = opcode_gfx10
 178       self.input_mod = "1" if input_mod else "0"
 179       self.output_mod = "1" if output_mod else "0"
 180       self.format = format
 181
 182
 183 # global dictionary of opcodes
 184 opcodes = {}
 185
 186 # VOPC to GFX6 opcode translation map
 187 VOPC_GFX6 = [0] * 256
 188
 189 def opcode(name, opcode_gfx9 = -1, opcode_gfx10 = -1, format = Format.PSEUDO, input_mod = False, output_mod = False):
 190    assert name not in opcodes
 191    opcodes[name] = Opcode(name, opcode_gfx9, opcode_gfx10, format, input_mod, output_mod)
 192
 193 opcode("exp", 0, 0, format = Format.EXP)
 194 opcode("p_parallelcopy")
 195 opcode("p_startpgm")
 196 opcode("p_phi")
 197 opcode("p_linear_phi")
 198 opcode("p_as_uniform")
 199
 200 opcode("p_create_vector")
 201 opcode("p_extract_vector")
 202 opcode("p_split_vector")
 203
 204 # start/end the parts where we can use exec based instructions
 205 # implicitly
 206 opcode("p_logical_start")
 207 opcode("p_logical_end")
 208
 209 # e.g. subgroupMin() in SPIR-V
 210 opcode("p_reduce", format=Format.PSEUDO_REDUCTION)
 211 # e.g. subgroupInclusiveMin()
 212 opcode("p_inclusive_scan", format=Format.PSEUDO_REDUCTION)
 213 # e.g. subgroupExclusiveMin()
 214 opcode("p_exclusive_scan", format=Format.PSEUDO_REDUCTION)
 215
 216 opcode("p_branch", format=Format.PSEUDO_BRANCH)
 217 opcode("p_cbranch", format=Format.PSEUDO_BRANCH)
 218 opcode("p_cbranch_z", format=Format.PSEUDO_BRANCH)
 219 opcode("p_cbranch_nz", format=Format.PSEUDO_BRANCH)
 220
 221 opcode("p_memory_barrier_all", format=Format.PSEUDO_BARRIER)
 222 opcode("p_memory_barrier_atomic", format=Format.PSEUDO_BARRIER)
 223 opcode("p_memory_barrier_buffer", format=Format.PSEUDO_BARRIER)
 224 opcode("p_memory_barrier_image", format=Format.PSEUDO_BARRIER)
 225 opcode("p_memory_barrier_shared", format=Format.PSEUDO_BARRIER)
 226
 227 opcode("p_spill")
 228 opcode("p_reload")
 229
 230 # start/end linear vgprs
 231 opcode("p_start_linear_vgpr")
 232 opcode("p_end_linear_vgpr")
 233
 234 opcode("p_wqm")
 235 opcode("p_discard_if")
 236 opcode("p_load_helper")
 237 opcode("p_demote_to_helper")
 238 opcode("p_is_helper")
 239
 240 opcode("p_fs_buffer_store_smem", format=Format.SMEM)
 241
 242
 243 # SOP2 instructions: 2 scalar inputs, 1 scalar output (+optional scc)
 244 SOP2 = {
 245   # GFX6, GFX7, GFX8, GFX9, GFX10, name
 246    (0x00, 0x00, 0x00, 0x00, 0x00, "s_add_u32"),
 247    (0x01, 0x01, 0x01, 0x01, 0x01, "s_sub_u32"),
 248    (0x02, 0x02, 0x02, 0x02, 0x02, "s_add_i32"),
 249    (0x03, 0x03, 0x03, 0x03, 0x03, "s_sub_i32"),
 250    (0x04, 0x04, 0x04, 0x04, 0x04, "s_addc_u32"),
 251    (0x05, 0x05, 0x05, 0x05, 0x05, "s_subb_u32"),
 252    (0x06, 0x06, 0x06, 0x06, 0x06, "s_min_i32"),
 253    (0x07, 0x07, 0x07, 0x07, 0x07, "s_min_u32"),
 254    (0x08, 0x08, 0x08, 0x08, 0x08, "s_max_i32"),
 255    (0x09, 0x09, 0x09, 0x09, 0x09, "s_max_u32"),
 256    (0x0a, 0x0a, 0x0a, 0x0a, 0x0a, "s_cselect_b32"),
 257    (0x0b, 0x0b, 0x0b, 0x0b, 0x0b, "s_cselect_b64"),
 258    (0x0e, 0x0e, 0x0c, 0x0c, 0x0e, "s_and_b32"),
 259    (0x0f, 0x0f, 0x0d, 0x0d, 0x0f, "s_and_b64"),
 260    (0x10, 0x10, 0x0e, 0x0e, 0x10, "s_or_b32"),
 261    (0x11, 0x11, 0x0f, 0x0f, 0x11, "s_or_b64"),
 262    (0x12, 0x12, 0x10, 0x10, 0x12, "s_xor_b32"),
 263    (0x13, 0x13, 0x11, 0x11, 0x13, "s_xor_b64"),
 264    (0x14, 0x14, 0x12, 0x12, 0x14, "s_andn2_b32"),
 265    (0x15, 0x15, 0x13, 0x13, 0x15, "s_andn2_b64"),
 266    (0x16, 0x16, 0x14, 0x14, 0x16, "s_orn2_b32"),
 267    (0x17, 0x17, 0x15, 0x15, 0x17, "s_orn2_b64"),
 268    (0x18, 0x18, 0x16, 0x16, 0x18, "s_nand_b32"),
 269    (0x19, 0x19, 0x17, 0x17, 0x19, "s_nand_b64"),
 270    (0x1a, 0x1a, 0x18, 0x18, 0x1a, "s_nor_b32"),
 271    (0x1b, 0x1b, 0x19, 0x19, 0x1b, "s_nor_b64"),
 272    (0x1c, 0x1c, 0x1a, 0x1a, 0x1c, "s_xnor_b32"),
 273    (0x1d, 0x1d, 0x1b, 0x1b, 0x1d, "s_xnor_b64"),
 274    (0x1e, 0x1e, 0x1c, 0x1c, 0x1e, "s_lshl_b32"),
 275    (0x1f, 0x1f, 0x1d, 0x1d, 0x1f, "s_lshl_b64"),
 276    (0x20, 0x20, 0x1e, 0x1e, 0x20, "s_lshr_b32"),
 277    (0x21, 0x21, 0x1f, 0x1f, 0x21, "s_lshr_b64"),
 278    (0x22, 0x22, 0x20, 0x20, 0x22, "s_ashr_i32"),
 279    (0x23, 0x23, 0x21, 0x21, 0x23, "s_ashr_i64"),
 280    (0x24, 0x24, 0x22, 0x22, 0x24, "s_bfm_b32"),
 281    (0x25, 0x25, 0x23, 0x23, 0x25, "s_bfm_b64"),
 282    (0x26, 0x26, 0x24, 0x24, 0x26, "s_mul_i32"),
 283    (0x27, 0x27, 0x25, 0x25, 0x27, "s_bfe_u32"),
 284    (0x28, 0x28, 0x26, 0x26, 0x28, "s_bfe_i32"),
 285    (0x29, 0x29, 0x27, 0x27, 0x29, "s_bfe_u64"),
 286    (0x2a, 0x2a, 0x28, 0x28, 0x2a, "s_bfe_i64"),
 287    (0x2b, 0x2b, 0x29, 0x29,   -1, "s_cbranch_g_fork"),
 288    (0x2c, 0x2c, 0x2a, 0x2a, 0x2c, "s_absdiff_i32"),
 289    (  -1,   -1, 0x2b, 0x2b,   -1, "s_rfe_restore_b64"),
 290    (  -1,   -1,   -1, 0x2e, 0x2e, "s_lshl1_add_u32"),
 291    (  -1,   -1,   -1, 0x2f, 0x2f, "s_lshl2_add_u32"),
 292    (  -1,   -1,   -1, 0x30, 0x30, "s_lshl3_add_u32"),
 293    (  -1,   -1,   -1, 0x31, 0x31, "s_lshl4_add_u32"),
 294    (  -1,   -1,   -1, 0x32, 0x32, "s_pack_ll_b32_b16"),
 295    (  -1,   -1,   -1, 0x33, 0x33, "s_pack_lh_b32_b16"),
 296    (  -1,   -1,   -1, 0x34, 0x34, "s_pack_hh_b32_b16"),
 297    (  -1,   -1,   -1, 0x2c, 0x35, "s_mul_hi_u32"),
 298    (  -1,   -1,   -1, 0x2d, 0x36, "s_mul_hi_i32"),
 299 }
 300 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in SOP2:
 301     opcode(name, gfx9, gfx10, Format.SOP2)
 302
 303
 304 # SOPK instructions: 0 input (+ imm), 1 output + optional scc
 305 SOPK = {
 306   # GFX6, GFX7, GFX8, GFX9, GFX10, name
 307    (0x00, 0x00, 0x00, 0x00, 0x00, "s_movk_i32"),
 308    (  -1,   -1,   -1,   -1, 0x01, "s_version"), # GFX10+
 309    (0x02, 0x02, 0x01, 0x01, 0x02, "s_cmovk_i32"), # GFX8_GFX9
 310    (0x03, 0x03, 0x02, 0x02, 0x03, "s_cmpk_eq_i32"),
 311    (0x04, 0x04, 0x03, 0x03, 0x04, "s_cmpk_lg_i32"),
 312    (0x05, 0x05, 0x04, 0x04, 0x05, "s_cmpk_gt_i32"),
 313    (0x06, 0x06, 0x05, 0x05, 0x06, "s_cmpk_ge_i32"),
 314    (0x07, 0x07, 0x06, 0x06, 0x07, "s_cmpk_lt_i32"),
 315    (0x08, 0x08, 0x07, 0x07, 0x08, "s_cmpk_le_i32"),
 316    (0x09, 0x09, 0x08, 0x08, 0x09, "s_cmpk_eq_u32"),
 317    (0x0a, 0x0a, 0x09, 0x09, 0x0a, "s_cmpk_lg_u32"),
 318    (0x0b, 0x0b, 0x0a, 0x0a, 0x0b, "s_cmpk_gt_u32"),
 319    (0x0c, 0x0c, 0x0b, 0x0b, 0x0c, "s_cmpk_ge_u32"),
 320    (0x0d, 0x0d, 0x0c, 0x0c, 0x0d, "s_cmpk_lt_u32"),
 321    (0x0e, 0x0e, 0x0d, 0x0d, 0x0e, "s_cmpk_le_u32"),
 322    (0x0f, 0x0f, 0x0e, 0x0e, 0x0f, "s_addk_i32"),
 323    (0x10, 0x10, 0x0f, 0x0f, 0x10, "s_mulk_i32"),
 324    (0x11, 0x11, 0x10, 0x10,   -1, "s_cbranch_i_fork"),
 325    (0x12, 0x12, 0x11, 0x11, 0x12, "s_getreg_b32"),
 326    (0x13, 0x13, 0x12, 0x12, 0x13, "s_setreg_b32"),
 327    (0x15, 0x15, 0x14, 0x14, 0x15, "s_setreg_imm32_b32"), # requires 32bit literal
 328    (  -1,   -1, 0x15, 0x15, 0x16, "s_call_b64"),
 329    (  -1,   -1,   -1,   -1, 0x17, "s_waitcnt_vscnt"),
 330    (  -1,   -1,   -1,   -1, 0x18, "s_waitcnt_vmcnt"),
 331    (  -1,   -1,   -1,   -1, 0x19, "s_waitcnt_expcnt"),
 332    (  -1,   -1,   -1,   -1, 0x1a, "s_waitcnt_lgkmcnt"),
 333    (  -1,   -1,   -1,   -1, 0x1b, "s_subvector_loop_begin"),
 334    (  -1,   -1,   -1,   -1, 0x1c, "s_subvector_loop_end"),
 335 }
 336 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in SOPK:
 337    opcode(name, gfx9, gfx10, Format.SOPK)
 338
 339
 340 # SOP1 instructions: 1 input, 1 output (+optional SCC)
 341 SOP1 = {
 342   # GFX6, GFX7, GFX8, GFX9, GFX10, name
 343    (0x03, 0x03, 0x00, 0x00, 0x03, "s_mov_b32"),
 344    (0x04, 0x04, 0x01, 0x01, 0x04, "s_mov_b64"),
 345    (0x05, 0x05, 0x02, 0x02, 0x05, "s_cmov_b32"),
 346    (0x06, 0x06, 0x03, 0x03, 0x06, "s_cmov_b64"),
 347    (0x07, 0x07, 0x04, 0x04, 0x07, "s_not_b32"),
 348    (0x08, 0x08, 0x05, 0x05, 0x08, "s_not_b64"),
 349    (0x09, 0x09, 0x06, 0x06, 0x09, "s_wqm_b32"),
 350    (0x0a, 0x0a, 0x07, 0x07, 0x0a, "s_wqm_b64"),
 351    (0x0b, 0x0b, 0x08, 0x08, 0x0b, "s_brev_b32"),
 352    (0x0c, 0x0c, 0x09, 0x09, 0x0c, "s_brev_b64"),
 353    (0x0d, 0x0d, 0x0a, 0x0a, 0x0d, "s_bcnt0_i32_b32"),
 354    (0x0e, 0x0e, 0x0b, 0x0b, 0x0e, "s_bcnt0_i32_b64"),
 355    (0x0f, 0x0f, 0x0c, 0x0c, 0x0f, "s_bcnt1_i32_b32"),
 356    (0x10, 0x10, 0x0d, 0x0d, 0x10, "s_bcnt1_i32_b64"),
 357    (0x11, 0x11, 0x0e, 0x0e, 0x11, "s_ff0_i32_b32"),
 358    (0x12, 0x12, 0x0f, 0x0f, 0x12, "s_ff0_i32_b64"),
 359    (0x13, 0x13, 0x10, 0x10, 0x13, "s_ff1_i32_b32"),
 360    (0x14, 0x14, 0x11, 0x11, 0x14, "s_ff1_i32_b64"),
 361    (0x15, 0x15, 0x12, 0x12, 0x15, "s_flbit_i32_b32"),
 362    (0x16, 0x16, 0x13, 0x13, 0x16, "s_flbit_i32_b64"),
 363    (0x17, 0x17, 0x14, 0x14, 0x17, "s_flbit_i32"),
 364    (0x18, 0x18, 0x15, 0x15, 0x18, "s_flbit_i32_i64"),
 365    (0x19, 0x19, 0x16, 0x16, 0x19, "s_sext_i32_i8"),
 366    (0x1a, 0x1a, 0x17, 0x17, 0x1a, "s_sext_i32_i16"),
 367    (0x1b, 0x1b, 0x18, 0x18, 0x1b, "s_bitset0_b32"),
 368    (0x1c, 0x1c, 0x19, 0x19, 0x1c, "s_bitset0_b64"),
 369    (0x1d, 0x1d, 0x1a, 0x1a, 0x1d, "s_bitset1_b32"),
 370    (0x1e, 0x1e, 0x1b, 0x1b, 0x1e, "s_bitset1_b64"),
 371    (0x1f, 0x1f, 0x1c, 0x1c, 0x1f, "s_getpc_b64"),
 372    (0x20, 0x20, 0x1d, 0x1d, 0x20, "s_setpc_b64"),
 373    (0x21, 0x21, 0x1e, 0x1e, 0x21, "s_swappc_b64"),
 374    (0x22, 0x22, 0x1f, 0x1f, 0x22, "s_rfe_b64"),
 375    (0x24, 0x24, 0x20, 0x20, 0x24, "s_and_saveexec_b64"),
 376    (0x25, 0x25, 0x21, 0x21, 0x25, "s_or_saveexec_b64"),
 377    (0x26, 0x26, 0x22, 0x22, 0x26, "s_xor_saveexec_b64"),
 378    (0x27, 0x27, 0x23, 0x23, 0x27, "s_andn2_saveexec_b64"),
 379    (0x28, 0x28, 0x24, 0x24, 0x28, "s_orn2_saveexec_b64"),
 380    (0x29, 0x29, 0x25, 0x25, 0x29, "s_nand_saveexec_b64"),
 381    (0x2a, 0x2a, 0x26, 0x26, 0x2a, "s_nor_saveexec_b64"),
 382    (0x2b, 0x2b, 0x27, 0x27, 0x2b, "s_xnor_saveexec_b64"),
 383    (0x2c, 0x2c, 0x28, 0x28, 0x2c, "s_quadmask_b32"),
 384    (0x2d, 0x2d, 0x29, 0x29, 0x2d, "s_quadmask_b64"),
 385    (0x2e, 0x2e, 0x2a, 0x2a, 0x2e, "s_movrels_b32"),
 386    (0x2f, 0x2f, 0x2b, 0x2b, 0x2f, "s_movrels_b64"),
 387    (0x30, 0x30, 0x2c, 0x2c, 0x30, "s_movreld_b32"),
 388    (0x31, 0x31, 0x2d, 0x2d, 0x31, "s_movreld_b64"),
 389    (0x32, 0x32, 0x2e, 0x2e,   -1, "s_cbranch_join"),
 390    (0x34, 0x34, 0x30, 0x30, 0x34, "s_abs_i32"),
 391    (0x35, 0x35,   -1,   -1, 0x35, "s_mov_fed_b32"),
 392    (  -1,   -1, 0x32, 0x32,   -1, "s_set_gpr_idx_idx"),
 393    (  -1,   -1,   -1, 0x33, 0x37, "s_andn1_saveexec_b64"),
 394    (  -1,   -1,   -1, 0x34, 0x38, "s_orn1_saveexec_b64"),
 395    (  -1,   -1,   -1, 0x35, 0x39, "s_andn1_wrexec_b64"),
 396    (  -1,   -1,   -1, 0x36, 0x3a, "s_andn2_wrexec_b64"),
 397    (  -1,   -1,   -1, 0x37, 0x3b, "s_bitreplicate_b64_b32"),
 398    (  -1,   -1,   -1,   -1, 0x3c, "s_and_saveexec_b32"),
 399    (  -1,   -1,   -1,   -1, 0x3d, "s_or_saveexec_b32"),
 400    (  -1,   -1,   -1,   -1, 0x3e, "s_xor_saveexec_b32"),
 401    (  -1,   -1,   -1,   -1, 0x3f, "s_andn2_saveexec_b32"),
 402    (  -1,   -1,   -1,   -1, 0x40, "s_orn2_saveexec_b32"),
 403    (  -1,   -1,   -1,   -1, 0x41, "s_nand_saveexec_b32"),
 404    (  -1,   -1,   -1,   -1, 0x42, "s_nor_saveexec_b32"),
 405    (  -1,   -1,   -1,   -1, 0x43, "s_xnor_saveexec_b32"),
 406    (  -1,   -1,   -1,   -1, 0x44, "s_andn1_saveexec_b32"),
 407    (  -1,   -1,   -1,   -1, 0x45, "s_orn1_saveexec_b32"),
 408    (  -1,   -1,   -1,   -1, 0x46, "s_andn1_wrexec_b32"),
 409    (  -1,   -1,   -1,   -1, 0x47, "s_andn2_wrexec_b32"),
 410    (  -1,   -1,   -1,   -1, 0x49, "s_movrelsd_2_b32"),
 411    # actually a pseudo-instruction. it's lowered to SALU during assembly though, so it's useful to identify it as a SOP1.
 412    (  -1,   -1,   -1,   -1,   -1, "p_constaddr"),
 413 }
 414 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in SOP1:
 415    opcode(name, gfx9, gfx10, Format.SOP1)
 416
 417
 418 # SOPC instructions: 2 inputs and 0 outputs (+SCC)
 419 SOPC = {
 420   # GFX6, GFX7, GFX8, GFX9, GFX10, name
 421    (0x00, 0x00, 0x00, 0x00, 0x00, "s_cmp_eq_i32"),
 422    (0x01, 0x01, 0x01, 0x01, 0x01, "s_cmp_lg_i32"),
 423    (0x02, 0x02, 0x02, 0x02, 0x02, "s_cmp_gt_i32"),
 424    (0x03, 0x03, 0x03, 0x03, 0x03, "s_cmp_ge_i32"),
 425    (0x04, 0x04, 0x04, 0x04, 0x04, "s_cmp_lt_i32"),
 426    (0x05, 0x05, 0x05, 0x05, 0x05, "s_cmp_le_i32"),
 427    (0x06, 0x06, 0x06, 0x06, 0x06, "s_cmp_eq_u32"),
 428    (0x07, 0x07, 0x07, 0x07, 0x07, "s_cmp_lg_u32"),
 429    (0x08, 0x08, 0x08, 0x08, 0x08, "s_cmp_gt_u32"),
 430    (0x09, 0x09, 0x09, 0x09, 0x09, "s_cmp_ge_u32"),
 431    (0x0a, 0x0a, 0x0a, 0x0a, 0x0a, "s_cmp_lt_u32"),
 432    (0x0b, 0x0b, 0x0b, 0x0b, 0x0b, "s_cmp_le_u32"),
 433    (0x0c, 0x0c, 0x0c, 0x0c, 0x0c, "s_bitcmp0_b32"),
 434    (0x0d, 0x0d, 0x0d, 0x0d, 0x0d, "s_bitcmp1_b32"),
 435    (0x0e, 0x0e, 0x0e, 0x0e, 0x0e, "s_bitcmp0_b64"),
 436    (0x0f, 0x0f, 0x0f, 0x0f, 0x0f, "s_bitcmp1_b64"),
 437    (0x10, 0x10, 0x10, 0x10,   -1, "s_setvskip"),
 438    (  -1,   -1, 0x11, 0x11,   -1, "s_set_gpr_idx_on"),
 439    (  -1,   -1, 0x12, 0x12, 0x12, "s_cmp_eq_u64"),
 440    (  -1,   -1, 0x13, 0x13, 0x13, "s_cmp_lg_u64"),
 441 }
 442 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in SOPC:
 443    opcode(name, gfx9, gfx10, Format.SOPC)
 444
 445
 446 # SOPP instructions: 0 inputs (+optional scc/vcc), 0 outputs
 447 SOPP = {
 448   # GFX6, GFX7, GFX8, GFX9, GFX10, name
 449    (0x00, 0x00, 0x00, 0x00, 0x00, "s_nop"),
 450    (0x01, 0x01, 0x01, 0x01, 0x01, "s_endpgm"),
 451    (0x02, 0x02, 0x02, 0x02, 0x02, "s_branch"),
 452    (  -1,   -1, 0x03, 0x03, 0x03, "s_wakeup"),
 453    (0x04, 0x04, 0x04, 0x04, 0x04, "s_cbranch_scc0"),
 454    (0x05, 0x05, 0x05, 0x05, 0x05, "s_cbranch_scc1"),
 455    (0x06, 0x06, 0x06, 0x06, 0x06, "s_cbranch_vccz"),
 456    (0x07, 0x07, 0x07, 0x07, 0x07, "s_cbranch_vccnz"),
 457    (0x08, 0x08, 0x08, 0x08, 0x08, "s_cbranch_execz"),
 458    (0x09, 0x09, 0x09, 0x09, 0x09, "s_cbranch_execnz"),
 459    (0x0a, 0x0a, 0x0a, 0x0a, 0x0a, "s_barrier"),
 460    (  -1, 0x0b, 0x0b, 0x0b, 0x0b, "s_setkill"),
 461    (0x0c, 0x0c, 0x0c, 0x0c, 0x0c, "s_waitcnt"),
 462    (0x0d, 0x0d, 0x0d, 0x0d, 0x0d, "s_sethalt"),
 463    (0x0e, 0x0e, 0x0e, 0x0e, 0x0e, "s_sleep"),
 464    (0x0f, 0x0f, 0x0f, 0x0f, 0x0f, "s_setprio"),
 465    (0x10, 0x10, 0x10, 0x10, 0x10, "s_sendmsg"),
 466    (0x11, 0x11, 0x11, 0x11, 0x11, "s_sendmsghalt"),
 467    (0x12, 0x12, 0x12, 0x12, 0x12, "s_trap"),
 468    (0x13, 0x13, 0x13, 0x13, 0x13, "s_icache_inv"),
 469    (0x14, 0x14, 0x14, 0x14, 0x14, "s_incperflevel"),
 470    (0x15, 0x15, 0x15, 0x15, 0x15, "s_decperflevel"),
 471    (0x16, 0x16, 0x16, 0x16, 0x16, "s_ttracedata"),
 472    (  -1, 0x17, 0x17, 0x17, 0x17, "s_cbranch_cdbgsys"),
 473    (  -1, 0x18, 0x18, 0x18, 0x18, "s_cbranch_cdbguser"),
 474    (  -1, 0x19, 0x19, 0x19, 0x19, "s_cbranch_cdbgsys_or_user"),
 475    (  -1, 0x1a, 0x1a, 0x1a, 0x1a, "s_cbranch_cdbgsys_and_user"),
 476    (  -1,   -1, 0x1b, 0x1b, 0x1b, "s_endpgm_saved"),
 477    (  -1,   -1, 0x1c, 0x1c,   -1, "s_set_gpr_idx_off"),
 478    (  -1,   -1, 0x1d, 0x1d,   -1, "s_set_gpr_idx_mode"),
 479    (  -1,   -1,   -1, 0x1e, 0x1e, "s_endpgm_ordered_ps_done"),
 480    (  -1,   -1,   -1,   -1, 0x1f, "s_code_end"),
 481    (  -1,   -1,   -1,   -1, 0x20, "s_inst_prefetch"),
 482    (  -1,   -1,   -1,   -1, 0x21, "s_clause"),
 483    (  -1,   -1,   -1,   -1, 0x22, "s_wait_idle"),
 484    (  -1,   -1,   -1,   -1, 0x23, "s_waitcnt_depctr"),
 485    (  -1,   -1,   -1,   -1, 0x24, "s_round_mode"),
 486    (  -1,   -1,   -1,   -1, 0x25, "s_denorm_mode"),
 487    (  -1,   -1,   -1,   -1, 0x26, "s_ttracedata_imm"),
 488 }
 489 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in SOPP:
 490    opcode(name, gfx9, gfx10, Format.SOPP)
 491
 492
 493 # SMEM instructions: sbase input (2 sgpr), potentially 2 offset inputs, 1 sdata input/output
 494 SMEM = {
 495   # GFX6, GFX7, GFX8, GFX9, GFX10, name
 496    (0x00, 0x00, 0x00, 0x00, 0x00, "s_load_dword"),
 497    (0x01, 0x01, 0x01, 0x01, 0x01, "s_load_dwordx2"),
 498    (0x02, 0x02, 0x02, 0x02, 0x02, "s_load_dwordx4"),
 499    (0x03, 0x03, 0x03, 0x03, 0x03, "s_load_dwordx8"),
 500    (0x04, 0x04, 0x04, 0x04, 0x04, "s_load_dwordx16"),
 501    (  -1,   -1,   -1, 0x05, 0x05, "s_scratch_load_dword"),
 502    (  -1,   -1,   -1, 0x06, 0x06, "s_scratch_load_dwordx2"),
 503    (  -1,   -1,   -1, 0x07, 0x07, "s_scratch_load_dwordx4"),
 504    (0x08, 0x08, 0x08, 0x08, 0x08, "s_buffer_load_dword"),
 505    (0x09, 0x09, 0x09, 0x09, 0x09, "s_buffer_load_dwordx2"),
 506    (0x0a, 0x0a, 0x0a, 0x0a, 0x0a, "s_buffer_load_dwordx4"),
 507    (0x0b, 0x0b, 0x0b, 0x0b, 0x0b, "s_buffer_load_dwordx8"),
 508    (0x0c, 0x0c, 0x0c, 0x0c, 0x0c, "s_buffer_load_dwordx16"),
 509    (  -1,   -1, 0x10, 0x10, 0x10, "s_store_dword"),
 510    (  -1,   -1, 0x11, 0x11, 0x11, "s_store_dwordx2"),
 511    (  -1,   -1, 0x12, 0x12, 0x12, "s_store_dwordx4"),
 512    (  -1,   -1,   -1, 0x15, 0x15, "s_scratch_store_dword"),
 513    (  -1,   -1,   -1, 0x16, 0x16, "s_scratch_store_dwordx2"),
 514    (  -1,   -1,   -1, 0x17, 0x17, "s_scratch_store_dwordx4"),
 515    (  -1,   -1, 0x18, 0x18, 0x18, "s_buffer_store_dword"),
 516    (  -1,   -1, 0x19, 0x19, 0x19, "s_buffer_store_dwordx2"),
 517    (  -1,   -1, 0x1a, 0x1a, 0x1a, "s_buffer_store_dwordx4"),
 518    (  -1,   -1, 0x1f, 0x1f, 0x1f, "s_gl1_inv"),
 519    (0x1f, 0x1f, 0x20, 0x20, 0x20, "s_dcache_inv"),
 520    (  -1,   -1, 0x21, 0x21, 0x21, "s_dcache_wb"),
 521    (  -1, 0x1d, 0x22, 0x22,   -1, "s_dcache_inv_vol"),
 522    (  -1,   -1, 0x23, 0x23,   -1, "s_dcache_wb_vol"),
 523    (0x1e, 0x1e, 0x24, 0x24, 0x24, "s_memtime"),
 524    (  -1,   -1, 0x25, 0x25, 0x25, "s_memrealtime"),
 525    (  -1,   -1, 0x26, 0x26, 0x26, "s_atc_probe"),
 526    (  -1,   -1, 0x27, 0x27, 0x27, "s_atc_probe_buffer"),
 527    (  -1,   -1,   -1, 0x28, 0x28, "s_dcache_discard"),
 528    (  -1,   -1,   -1, 0x29, 0x29, "s_dcache_discard_x2"),
 529    (  -1,   -1,   -1,   -1, 0x2a, "s_get_waveid_in_workgroup"),
 530    (  -1,   -1,   -1, 0x40, 0x40, "s_buffer_atomic_swap"),
 531    (  -1,   -1,   -1, 0x41, 0x41, "s_buffer_atomic_cmpswap"),
 532    (  -1,   -1,   -1, 0x42, 0x42, "s_buffer_atomic_add"),
 533    (  -1,   -1,   -1, 0x43, 0x43, "s_buffer_atomic_sub"),
 534    (  -1,   -1,   -1, 0x44, 0x44, "s_buffer_atomic_smin"),
 535    (  -1,   -1,   -1, 0x45, 0x45, "s_buffer_atomic_umin"),
 536    (  -1,   -1,   -1, 0x46, 0x46, "s_buffer_atomic_smax"),
 537    (  -1,   -1,   -1, 0x47, 0x47, "s_buffer_atomic_umax"),
 538    (  -1,   -1,   -1, 0x48, 0x48, "s_buffer_atomic_and"),
 539    (  -1,   -1,   -1, 0x49, 0x49, "s_buffer_atomic_or"),
 540    (  -1,   -1,   -1, 0x4a, 0x4a, "s_buffer_atomic_xor"),
 541    (  -1,   -1,   -1, 0x4b, 0x4b, "s_buffer_atomic_inc"),
 542    (  -1,   -1,   -1, 0x4c, 0x4c, "s_buffer_atomic_dec"),
 543    (  -1,   -1,   -1, 0x60, 0x60, "s_buffer_atomic_swap_x2"),
 544    (  -1,   -1,   -1, 0x61, 0x61, "s_buffer_atomic_cmpswap_x2"),
 545    (  -1,   -1,   -1, 0x62, 0x62, "s_buffer_atomic_add_x2"),
 546    (  -1,   -1,   -1, 0x63, 0x63, "s_buffer_atomic_sub_x2"),
 547    (  -1,   -1,   -1, 0x64, 0x64, "s_buffer_atomic_smin_x2"),
 548    (  -1,   -1,   -1, 0x65, 0x65, "s_buffer_atomic_umin_x2"),
 549    (  -1,   -1,   -1, 0x66, 0x66, "s_buffer_atomic_smax_x2"),
 550    (  -1,   -1,   -1, 0x67, 0x67, "s_buffer_atomic_umax_x2"),
 551    (  -1,   -1,   -1, 0x68, 0x68, "s_buffer_atomic_and_x2"),
 552    (  -1,   -1,   -1, 0x69, 0x69, "s_buffer_atomic_or_x2"),
 553    (  -1,   -1,   -1, 0x6a, 0x6a, "s_buffer_atomic_xor_x2"),
 554    (  -1,   -1,   -1, 0x6b, 0x6b, "s_buffer_atomic_inc_x2"),
 555    (  -1,   -1,   -1, 0x6c, 0x6c, "s_buffer_atomic_dec_x2"),
 556    (  -1,   -1,   -1, 0x80, 0x80, "s_atomic_swap"),
 557    (  -1,   -1,   -1, 0x81, 0x81, "s_atomic_cmpswap"),
 558    (  -1,   -1,   -1, 0x82, 0x82, "s_atomic_add"),
 559    (  -1,   -1,   -1, 0x83, 0x83, "s_atomic_sub"),
 560    (  -1,   -1,   -1, 0x84, 0x84, "s_atomic_smin"),
 561    (  -1,   -1,   -1, 0x85, 0x85, "s_atomic_umin"),
 562    (  -1,   -1,   -1, 0x86, 0x86, "s_atomic_smax"),
 563    (  -1,   -1,   -1, 0x87, 0x87, "s_atomic_umax"),
 564    (  -1,   -1,   -1, 0x88, 0x88, "s_atomic_and"),
 565    (  -1,   -1,   -1, 0x89, 0x89, "s_atomic_or"),
 566    (  -1,   -1,   -1, 0x8a, 0x8a, "s_atomic_xor"),
 567    (  -1,   -1,   -1, 0x8b, 0x8b, "s_atomic_inc"),
 568    (  -1,   -1,   -1, 0x8c, 0x8c, "s_atomic_dec"),
 569    (  -1,   -1,   -1, 0xa0, 0xa0, "s_atomic_swap_x2"),
 570    (  -1,   -1,   -1, 0xa1, 0xa1, "s_atomic_cmpswap_x2"),
 571    (  -1,   -1,   -1, 0xa2, 0xa2, "s_atomic_add_x2"),
 572    (  -1,   -1,   -1, 0xa3, 0xa3, "s_atomic_sub_x2"),
 573    (  -1,   -1,   -1, 0xa4, 0xa4, "s_atomic_smin_x2"),
 574    (  -1,   -1,   -1, 0xa5, 0xa5, "s_atomic_umin_x2"),
 575    (  -1,   -1,   -1, 0xa6, 0xa6, "s_atomic_smax_x2"),
 576    (  -1,   -1,   -1, 0xa7, 0xa7, "s_atomic_umax_x2"),
 577    (  -1,   -1,   -1, 0xa8, 0xa8, "s_atomic_and_x2"),
 578    (  -1,   -1,   -1, 0xa9, 0xa9, "s_atomic_or_x2"),
 579    (  -1,   -1,   -1, 0xaa, 0xaa, "s_atomic_xor_x2"),
 580    (  -1,   -1,   -1, 0xab, 0xab, "s_atomic_inc_x2"),
 581    (  -1,   -1,   -1, 0xac, 0xac, "s_atomic_dec_x2"),
 582 }
 583 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in SMEM:
 584    opcode(name, gfx9, gfx10, Format.SMEM)
 585
 586
 587 # VOP2 instructions: 2 inputs, 1 output (+ optional vcc)
 588 # TODO: misses some GFX6_7 opcodes which were shifted to VOP3 in GFX8
 589 VOP2 = {
 590   # GFX6, GFX7, GFX8, GFX9, GFX10, name, input/output modifiers
 591    (0x00, 0x00, 0x00, 0x00, 0x01, "v_cndmask_b32", False),
 592    (0x03, 0x03, 0x01, 0x01, 0x03, "v_add_f32", True),
 593    (0x04, 0x04, 0x02, 0x02, 0x04, "v_sub_f32", True),
 594    (0x05, 0x05, 0x03, 0x03, 0x05, "v_subrev_f32", True),
 595    (0x06, 0x06,   -1,   -1, 0x06, "v_mac_legacy_f32", True),
 596    (0x07, 0x07, 0x04, 0x04, 0x07, "v_mul_legacy_f32", True),
 597    (0x08, 0x08, 0x05, 0x05, 0x08, "v_mul_f32", True),
 598    (0x09, 0x09, 0x06, 0x06, 0x09, "v_mul_i32_i24", False),
 599    (0x0a, 0x0a, 0x07, 0x07, 0x0a, "v_mul_hi_i32_i24", False),
 600    (0x0b, 0x0b, 0x08, 0x08, 0x0b, "v_mul_u32_u24", False),
 601    (0x0c, 0x0c, 0x09, 0x09, 0x0c, "v_mul_hi_u32_u24", False),
 602    (0x0d, 0x0d,   -1,   -1,   -1, "v_min_legacy_f32", True),
 603    (0x0e, 0x0e,   -1,   -1,   -1, "v_max_legacy_f32", True),
 604    (0x0f, 0x0f, 0x0a, 0x0a, 0x0f, "v_min_f32", True),
 605    (0x10, 0x10, 0x0b, 0x0b, 0x10, "v_max_f32", True),
 606    (0x11, 0x11, 0x0c, 0x0c, 0x11, "v_min_i32", False),
 607    (0x12, 0x12, 0x0d, 0x0d, 0x12, "v_max_i32", False),
 608    (0x13, 0x13, 0x0e, 0x0e, 0x13, "v_min_u32", False),
 609    (0x14, 0x14, 0x0f, 0x0f, 0x14, "v_max_u32", False),
 610    (0x15, 0x15,   -1,   -1,   -1, "v_lshr_b32", False),
 611    (0x16, 0x16, 0x10, 0x10, 0x16, "v_lshrrev_b32", False),
 612    (0x17, 0x17,   -1,   -1,   -1, "v_ashr_i32", False),
 613    (0x18, 0x18, 0x11, 0x11, 0x18, "v_ashrrev_i32", False),
 614    (0x19, 0x19,   -1,   -1,   -1, "v_lshl_b32", False),
 615    (0x1a, 0x1a, 0x12, 0x12, 0x1a, "v_lshlrev_b32", False),
 616    (0x1b, 0x1b, 0x13, 0x13, 0x1b, "v_and_b32", False),
 617    (0x1c, 0x1c, 0x14, 0x14, 0x1c, "v_or_b32", False),
 618    (0x1d, 0x1d, 0x15, 0x15, 0x1d, "v_xor_b32", False),
 619    (  -1,   -1,   -1,   -1, 0x1e, "v_xnor_b32", False),
 620    (0x1f, 0x1f, 0x16, 0x16, 0x1f, "v_mac_f32", True),
 621    (0x20, 0x20, 0x17, 0x17, 0x20, "v_madmk_f32", False),
 622    (0x21, 0x21, 0x18, 0x18, 0x21, "v_madak_f32", False),
 623    (0x25, 0x25, 0x19, 0x19,   -1, "v_add_co_u32", False), # VOP3B only in RDNA
 624    (0x26, 0x26, 0x1a, 0x1a,   -1, "v_sub_co_u32", False), # VOP3B only in RDNA
 625    (0x27, 0x27, 0x1b, 0x1b,   -1, "v_subrev_co_u32", False), # VOP3B only in RDNA
 626    (0x28, 0x28, 0x1c, 0x1c, 0x28, "v_addc_co_u32", False), # v_add_co_ci_u32 in RDNA
 627    (0x29, 0x29, 0x1d, 0x1d, 0x29, "v_subb_co_u32", False), # v_sub_co_ci_u32 in RDNA
 628    (0x2a, 0x2a, 0x1e, 0x1e, 0x2a, "v_subbrev_co_u32", False), # v_subrev_co_ci_u32 in RDNA
 629    (  -1,   -1,   -1,   -1, 0x2b, "v_fmac_f32", True),
 630    (  -1,   -1,   -1,   -1, 0x2c, "v_fmamk_f32", True),
 631    (  -1,   -1,   -1,   -1, 0x2d, "v_fmaak_f32", True),
 632    (  -1,   -1, 0x1f, 0x1f, 0x32, "v_add_f16", True),
 633    (  -1,   -1, 0x20, 0x20, 0x33, "v_sub_f16", True),
 634    (  -1,   -1, 0x21, 0x21, 0x34, "v_subrev_f16", True),
 635    (  -1,   -1, 0x22, 0x22, 0x35, "v_mul_f16", True),
 636    (  -1,   -1, 0x23, 0x23,   -1, "v_mac_f16", True),
 637    (  -1,   -1, 0x24, 0x24,   -1, "v_madmk_f16", False),
 638    (  -1,   -1, 0x25, 0x25,   -1, "v_madak_f16", False),
 639    (  -1,   -1, 0x26, 0x26,   -1, "v_add_u16", False),
 640    (  -1,   -1, 0x27, 0x27,   -1, "v_sub_u16", False),
 641    (  -1,   -1, 0x28, 0x28,   -1, "v_subrev_u16", False),
 642    (  -1,   -1, 0x29, 0x29,   -1, "v_mul_lo_u16", False),
 643    (  -1,   -1, 0x2a, 0x2a,   -1, "v_lshlrev_b16", False),
 644    (  -1,   -1, 0x2b, 0x2b,   -1, "v_lshrrev_b16", False),
 645    (  -1,   -1, 0x2c, 0x2c,   -1, "v_ashrrev_b16", False),
 646    (  -1,   -1, 0x2d, 0x2d, 0x39, "v_max_f16", True),
 647    (  -1,   -1, 0x2e, 0x2e, 0x3a, "v_min_f16", True),
 648    (  -1,   -1, 0x2f, 0x2f,   -1, "v_max_u16", False),
 649    (  -1,   -1, 0x30, 0x30,   -1, "v_max_i16", False),
 650    (  -1,   -1, 0x31, 0x31,   -1, "v_min_u16", False),
 651    (  -1,   -1, 0x32, 0x32,   -1, "v_min_i16", False),
 652    (  -1,   -1, 0x33, 0x33, 0x3b, "v_ldexp_f16", False),
 653    (  -1,   -1, 0x34, 0x34, 0x25, "v_add_u32", False), # v_add_nc_u32 in RDNA
 654    (  -1,   -1, 0x35, 0x35, 0x26, "v_sub_u32", False), # v_sub_nc_u32 in RDNA
 655    (  -1,   -1, 0x36, 0x36, 0x27, "v_subrev_u32", False), # v_subrev_nc_u32 in RDNA
 656    (  -1,   -1,   -1,   -1, 0x36, "v_fmac_f16", False),
 657    (  -1,   -1,   -1,   -1, 0x37, "v_fmamk_f16", False),
 658    (  -1,   -1,   -1,   -1, 0x38, "v_fmaak_f16", False),
 659    (  -1,   -1,   -1,   -1, 0x3c, "v_pk_fmac_f16", False),
 660 }
 661 for (gfx6, gfx7, gfx8, gfx9, gfx10, name, modifiers) in VOP2:
 662    opcode(name, gfx9, gfx10, Format.VOP2, modifiers, modifiers)
 663
 664
 665 # VOP1 instructions: instructions with 1 input and 1 output
 666 VOP1 = {
 667   # GFX6, GFX7, GFX8, GFX9, GFX10, name, input_modifiers, output_modifiers
 668    (0x00, 0x00, 0x00, 0x00, 0x00, "v_nop", False, False),
 669    (0x01, 0x01, 0x01, 0x01, 0x01, "v_mov_b32", False, False),
 670    (0x02, 0x02, 0x02, 0x02, 0x02, "v_readfirstlane_b32", False, False),
 671    (0x03, 0x03, 0x03, 0x03, 0x03, "v_cvt_i32_f64", True, False),
 672    (0x04, 0x04, 0x04, 0x04, 0x04, "v_cvt_f64_i32", False, True),
 673    (0x05, 0x05, 0x05, 0x05, 0x05, "v_cvt_f32_i32", False, True),
 674    (0x06, 0x06, 0x06, 0x06, 0x06, "v_cvt_f32_u32", False, True),
 675    (0x07, 0x07, 0x07, 0x07, 0x07, "v_cvt_u32_f32", True, False),
 676    (0x08, 0x08, 0x08, 0x08, 0x08, "v_cvt_i32_f32", True, False),
 677    (0x09, 0x09,   -1,   -1, 0x09, "v_mov_fed_b32", True, False), # LLVM mentions it for GFX8_9
 678    (0x0a, 0x0a, 0x0a, 0x0a, 0x0a, "v_cvt_f16_f32", True, True),
 679    (0x0b, 0x0b, 0x0b, 0x0b, 0x0b, "v_cvt_f32_f16", True, True),
 680    (0x0c, 0x0c, 0x0c, 0x0c, 0x0c, "v_cvt_rpi_i32_f32", True, False),
 681    (0x0d, 0x0d, 0x0d, 0x0d, 0x0d, "v_cvt_flr_i32_f32", True, False),
 682    (0x0e, 0x0e, 0x0e, 0x0e, 0x0e, "v_cvt_off_f32_i4", False, True),
 683    (0x0f, 0x0f, 0x0f, 0x0f, 0x0f, "v_cvt_f32_f64", True, True),
 684    (0x10, 0x10, 0x10, 0x10, 0x10, "v_cvt_f64_f32", True, True),
 685    (0x11, 0x11, 0x11, 0x11, 0x11, "v_cvt_f32_ubyte0", False, True),
 686    (0x12, 0x12, 0x12, 0x12, 0x12, "v_cvt_f32_ubyte1", False, True),
 687    (0x13, 0x13, 0x13, 0x13, 0x13, "v_cvt_f32_ubyte2", False, True),
 688    (0x14, 0x14, 0x14, 0x14, 0x14, "v_cvt_f32_ubyte3", False, True),
 689    (0x15, 0x15, 0x15, 0x15, 0x15, "v_cvt_u32_f64", True, False),
 690    (0x16, 0x16, 0x16, 0x16, 0x16, "v_cvt_f64_u32", False, True),
 691    (  -1, 0x17, 0x17, 0x17, 0x17, "v_trunc_f64", True, True),
 692    (  -1, 0x18, 0x18, 0x18, 0x18, "v_ceil_f64", True, True),
 693    (  -1, 0x19, 0x19, 0x19, 0x19, "v_rndne_f64", True, True),
 694    (  -1, 0x1a, 0x1a, 0x1a, 0x1a, "v_floor_f64", True, True),
 695    (  -1,   -1,   -1,   -1, 0x1b, "v_pipeflush", False, False),
 696    (0x20, 0x20, 0x1b, 0x1b, 0x20, "v_fract_f32", True, True),
 697    (0x21, 0x21, 0x1c, 0x1c, 0x21, "v_trunc_f32", True, True),
 698    (0x22, 0x22, 0x1d, 0x1d, 0x22, "v_ceil_f32", True, True),
 699    (0x23, 0x23, 0x1e, 0x1e, 0x23, "v_rndne_f32", True, True),
 700    (0x24, 0x24, 0x1f, 0x1f, 0x24, "v_floor_f32", True, True),
 701    (0x25, 0x25, 0x20, 0x20, 0x25, "v_exp_f32", True, True),
 702    (0x26, 0x26,   -1,   -1,   -1, "v_log_clamp_f32", True, True),
 703    (0x27, 0x27, 0x21, 0x21, 0x27, "v_log_f32", True, True),
 704    (0x28, 0x28,   -1,   -1,   -1, "v_rcp_clamp_f32", True, True),
 705    (0x29, 0x29,   -1,   -1,   -1, "v_rcp_legacy_f32", True, True),
 706    (0x2a, 0x2a, 0x22, 0x22, 0x2a, "v_rcp_f32", True, True),
 707    (0x2b, 0x2b, 0x23, 0x23, 0x2b, "v_rcp_iflag_f32", True, True),
 708    (0x2c, 0x2c,   -1,   -1,   -1, "v_rsq_clamp_f32", True, True),
 709    (0x2d, 0x2d,   -1,   -1,   -1, "v_rsq_legacy_f32", True, True),
 710    (0x2e, 0x2e, 0x24, 0x24, 0x2e, "v_rsq_f32", True, True),
 711    (0x2f, 0x2f, 0x25, 0x25, 0x2f, "v_rcp_f64", True, True),
 712    (0x30, 0x30,   -1,   -1,   -1, "v_rcp_clamp_f64", True, True),
 713    (0x31, 0x31, 0x26, 0x26, 0x31, "v_rsq_f64", True, True),
 714    (0x32, 0x32,   -1,   -1,   -1, "v_rsq_clamp_f64", True, True),
 715    (0x33, 0x33, 0x27, 0x27, 0x33, "v_sqrt_f32", True, True),
 716    (0x34, 0x34, 0x28, 0x28, 0x34, "v_sqrt_f64", True, True),
 717    (0x35, 0x35, 0x29, 0x29, 0x35, "v_sin_f32", True, True),
 718    (0x36, 0x36, 0x2a, 0x2a, 0x36, "v_cos_f32", True, True),
 719    (0x37, 0x37, 0x2b, 0x2b, 0x37, "v_not_b32", False, False),
 720    (0x38, 0x38, 0x2c, 0x2c, 0x38, "v_bfrev_b32", False, False),
 721    (0x39, 0x39, 0x2d, 0x2d, 0x39, "v_ffbh_u32", False, False),
 722    (0x3a, 0x3a, 0x2e, 0x2e, 0x3a, "v_ffbl_b32", False, False),
 723    (0x3b, 0x3b, 0x2f, 0x2f, 0x3b, "v_ffbh_i32", False, False),
 724    (0x3c, 0x3c, 0x30, 0x30, 0x3c, "v_frexp_exp_i32_f64", True, False),
 725    (0x3d, 0x3d, 0x31, 0x31, 0x3d, "v_frexp_mant_f64", True, False),
 726    (0x3e, 0x3e, 0x32, 0x32, 0x3e, "v_fract_f64", True, True),
 727    (0x3f, 0x3f, 0x33, 0x33, 0x3f, "v_frexp_exp_i32_f32", True, False),
 728    (0x40, 0x40, 0x34, 0x34, 0x40, "v_frexp_mant_f32", True, False),
 729    (0x41, 0x41, 0x35, 0x35, 0x41, "v_clrexcp", False, False),
 730    (0x42, 0x42, 0x36,   -1, 0x42, "v_movreld_b32", False, False),
 731    (0x43, 0x43, 0x37,   -1, 0x43, "v_movrels_b32", False, False),
 732    (0x44, 0x44, 0x38,   -1, 0x44, "v_movrelsd_b32", False, False),
 733    (  -1,   -1,   -1,   -1, 0x48, "v_movrelsd_2_b32", False, False),
 734    (  -1,   -1,   -1, 0x37,   -1, "v_screen_partition_4se_b32", False, False),
 735    (  -1,   -1, 0x39, 0x39, 0x50, "v_cvt_f16_u16", False, True),
 736    (  -1,   -1, 0x3a, 0x3a, 0x51, "v_cvt_f16_i16", False, True),
 737    (  -1,   -1, 0x3b, 0x3b, 0x52, "v_cvt_u16_f16", True, False),
 738    (  -1,   -1, 0x3c, 0x3c, 0x53, "v_cvt_i16_f16", True, False),
 739    (  -1,   -1, 0x3d, 0x3d, 0x54, "v_rcp_f16", True, True),
 740    (  -1,   -1, 0x3e, 0x3e, 0x55, "v_sqrt_f16", True, True),
 741    (  -1,   -1, 0x3f, 0x3f, 0x56, "v_rsq_f16", True, True),
 742    (  -1,   -1, 0x40, 0x40, 0x57, "v_log_f16", True, True),
 743    (  -1,   -1, 0x41, 0x41, 0x58, "v_exp_f16", True, True),
 744    (  -1,   -1, 0x42, 0x42, 0x59, "v_frexp_mant_f16", True, False),
 745    (  -1,   -1, 0x43, 0x43, 0x5a, "v_frexp_exp_i16_f16", True, False),
 746    (  -1,   -1, 0x44, 0x44, 0x5b, "v_floor_f16", True, True),
 747    (  -1,   -1, 0x45, 0x45, 0x5c, "v_ceil_f16", True, True),
 748    (  -1,   -1, 0x46, 0x46, 0x5d, "v_trunc_f16", True, True),
 749    (  -1,   -1, 0x47, 0x47, 0x5e, "v_rndne_f16", True, True),
 750    (  -1,   -1, 0x48, 0x48, 0x5f, "v_fract_f16", True, True),
 751    (  -1,   -1, 0x49, 0x49, 0x60, "v_sin_f16", True, True),
 752    (  -1,   -1, 0x4a, 0x4a, 0x61, "v_cos_f16", True, True),
 753    (  -1, 0x46, 0x4b, 0x4b,   -1, "v_exp_legacy_f32", True, True),
 754    (  -1, 0x45, 0x4c, 0x4c,   -1, "v_log_legacy_f32", True, True),
 755    (  -1,   -1,   -1, 0x4f, 0x62, "v_sat_pk_u8_i16", False, False),
 756    (  -1,   -1,   -1, 0x4d, 0x63, "v_cvt_norm_i16_f16", True, False),
 757    (  -1,   -1,   -1, 0x4e, 0x64, "v_cvt_norm_u16_f16", True, False),
 758    (  -1,   -1,   -1, 0x51, 0x65, "v_swap_b32", False, False),
 759    (  -1,   -1,   -1,   -1, 0x68, "v_swaprel_b32", False, False),
 760 }
 761 for (gfx6, gfx7, gfx8, gfx9, gfx10, name, in_mod, out_mod) in VOP1:
 762    opcode(name, gfx9, gfx10, Format.VOP1, in_mod, out_mod)
 763
 764
 765 # VOPC instructions:
 766
 767 VOPC_CLASS = {
 768    (0x88, 0x88, 0x10, 0x10, 0x88, "v_cmp_class_f32"),
 769    (  -1,   -1, 0x14, 0x14, 0x8f, "v_cmp_class_f16"),
 770    (0x98, 0x98, 0x11, 0x11, 0x98, "v_cmpx_class_f32"),
 771    (  -1,   -1, 0x15, 0x15, 0x9f, "v_cmpx_class_f16"),
 772    (0xa8, 0xa8, 0x12, 0x12, 0xa8, "v_cmp_class_f64"),
 773    (0xb8, 0xb8, 0x13, 0x13, 0xb8, "v_cmpx_class_f64"),
 774 }
 775 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in VOPC_CLASS:
 776     opcode(name, gfx9, gfx10, Format.VOPC, True, False)
 777
 778 COMPF = ["f", "lt", "eq", "le", "gt", "lg", "ge", "o", "u", "nge", "nlg", "ngt", "nle", "neq", "nlt", "tru"]
 779
 780 for i in range(8):
 781    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (-1, -1, 0x20+i, 0x20+i, 0xc8+i, "v_cmp_"+COMPF[i]+"_f16")
 782    opcode(name, gfx9, gfx10, Format.VOPC, True, False)
 783    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (-1, -1, 0x30+i, 0x30+i, 0xd8+i, "v_cmpx_"+COMPF[i]+"_f16")
 784    opcode(name, gfx9, gfx10, Format.VOPC, True, False)
 785    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (-1, -1, 0x28+i, 0x28+i, 0xe8+i, "v_cmp_"+COMPF[i+8]+"_f16")
 786    opcode(name, gfx9, gfx10, Format.VOPC, True, False)
 787    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (-1, -1, 0x38+i, 0x38+i, 0xf8+i, "v_cmpx_"+COMPF[i+8]+"_f16")
 788    opcode(name, gfx9, gfx10, Format.VOPC, True, False)
 789
 790 for i in range(16):
 791    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (0x00+i, 0x00+i, 0x40+i, 0x40+i, 0x00+i, "v_cmp_"+COMPF[i]+"_f32")
 792    opcode(name, gfx9, gfx10, Format.VOPC, True, False)
 793    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (0x10+i, 0x10+i, 0x50+i, 0x50+i, 0x10+i, "v_cmpx_"+COMPF[i]+"_f32")
 794    opcode(name, gfx9, gfx10, Format.VOPC, True, False)
 795    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (0x20+i, 0x20+i, 0x60+i, 0x60+i, 0x20+i, "v_cmp_"+COMPF[i]+"_f64")
 796    opcode(name, gfx9, gfx10, Format.VOPC, True, False)
 797    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (0x30+i, 0x30+i, 0x70+i, 0x70+i, 0x30+i, "v_cmpx_"+COMPF[i]+"_f64")
 798    opcode(name, gfx9, gfx10, Format.VOPC, True, False)
 799    # GFX_6_7
 800    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (0x40+i, 0x40+i, -1, -1, -1, "v_cmps_"+COMPF[i]+"_f32")
 801    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (0x50+i, 0x50+i, -1, -1, -1, "v_cmpsx_"+COMPF[i]+"_f32")
 802    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (0x60+i, 0x60+i, -1, -1, -1, "v_cmps_"+COMPF[i]+"_f64")
 803    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (0x70+i, 0x70+i, -1, -1, -1, "v_cmpsx_"+COMPF[i]+"_f64")
 804
 805 COMPI = ["f", "lt", "eq", "le", "gt", "lg", "ge", "tru"]
 806
 807 # GFX_8_9
 808 for i in [0,7]: # only 0 and 7
 809    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (-1, -1, 0xa0+i, 0xa0+i, -1, "v_cmp_"+COMPI[i]+"_i16")
 810    opcode(name, gfx9, gfx10, Format.VOPC)
 811    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (-1, -1, 0xb0+i, 0xb0+i, -1, "v_cmpx_"+COMPI[i]+"_i16")
 812    opcode(name, gfx9, gfx10, Format.VOPC)
 813    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (-1, -1, 0xa8+i, 0xa8+i, -1, "v_cmp_"+COMPI[i]+"_u16")
 814    opcode(name, gfx9, gfx10, Format.VOPC)
 815    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (-1, -1, 0xb8+i, 0xb8+i, -1, "v_cmpx_"+COMPI[i]+"_u16")
 816    opcode(name, gfx9, gfx10, Format.VOPC)
 817
 818 for i in range(1, 7): # [1..6]
 819    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (-1, -1, 0xa0+i, 0xa0+i, 0x88+i, "v_cmp_"+COMPI[i]+"_i16")
 820    opcode(name, gfx9, gfx10, Format.VOPC)
 821    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (-1, -1, 0xb0+i, 0xb0+i, 0x98+i, "v_cmpx_"+COMPI[i]+"_i16")
 822    opcode(name, gfx9, gfx10, Format.VOPC)
 823    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (-1, -1, 0xa8+i, 0xa8+i, 0xa8+i, "v_cmp_"+COMPI[i]+"_u16")
 824    opcode(name, gfx9, gfx10, Format.VOPC)
 825    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (-1, -1, 0xb8+i, 0xb8+i, 0xb8+i, "v_cmpx_"+COMPI[i]+"_u16")
 826    opcode(name, gfx9, gfx10, Format.VOPC)
 827
 828 for i in range(8):
 829    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (0x80+i, 0x80+i, 0xc0+i, 0xc0+i, 0x80+i, "v_cmp_"+COMPI[i]+"_i32")
 830    opcode(name, gfx9, gfx10, Format.VOPC)
 831    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (0x90+i, 0x90+i, 0xd0+i, 0xd0+i, 0x90+i, "v_cmpx_"+COMPI[i]+"_i32")
 832    opcode(name, gfx9, gfx10, Format.VOPC)
 833    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (0xa0+i, 0xa0+i, 0xe0+i, 0xe0+i, 0xa0+i, "v_cmp_"+COMPI[i]+"_i64")
 834    opcode(name, gfx9, gfx10, Format.VOPC)
 835    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (0xb0+i, 0xb0+i, 0xf0+i, 0xf0+i, 0xb0+i, "v_cmpx_"+COMPI[i]+"_i64")
 836    opcode(name, gfx9, gfx10, Format.VOPC)
 837    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (0xc0+i, 0xc0+i, 0xc8+i, 0xc8+i, 0xc0+i, "v_cmp_"+COMPI[i]+"_u32")
 838    opcode(name, gfx9, gfx10, Format.VOPC)
 839    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (0xd0+i, 0xd0+i, 0xd8+i, 0xd8+i, 0xd0+i, "v_cmpx_"+COMPI[i]+"_u32")
 840    opcode(name, gfx9, gfx10, Format.VOPC)
 841    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (0xe0+i, 0xe0+i, 0xe8+i, 0xe8+i, 0xe0+i, "v_cmp_"+COMPI[i]+"_u64")
 842    opcode(name, gfx9, gfx10, Format.VOPC)
 843    (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (0xf0+i, 0xf0+i, 0xf8+i, 0xf8+i, 0xf0+i, "v_cmpx_"+COMPI[i]+"_u64")
 844    opcode(name, gfx9, gfx10, Format.VOPC)
 845
 846
 847 # VOPP instructions: packed 16bit instructions - 1 or 2 inputs and 1 output
 848 VOPP = {
 849    (0x00, "v_pk_mad_i16"),
 850    (0x01, "v_pk_mul_lo_u16"),
 851    (0x02, "v_pk_add_i16"),
 852    (0x03, "v_pk_sub_i16"),
 853    (0x04, "v_pk_lshlrev_b16"),
 854    (0x05, "v_pk_lshrrev_b16"),
 855    (0x06, "v_pk_ashrrev_i16"),
 856    (0x07, "v_pk_max_i16"),
 857    (0x08, "v_pk_min_i16"),
 858    (0x09, "v_pk_mad_u16"),
 859    (0x0a, "v_pk_add_u16"),
 860    (0x0b, "v_pk_sub_u16"),
 861    (0x0c, "v_pk_max_u16"),
 862    (0x0d, "v_pk_min_u16"),
 863    (0x0e, "v_pk_fma_f16"),
 864    (0x0f, "v_pk_add_f16"),
 865    (0x10, "v_pk_mul_f16"),
 866    (0x11, "v_pk_min_f16"),
 867    (0x12, "v_pk_max_f16"),
 868    (0x20, "v_pk_fma_mix_f32"), # v_mad_mix_f32 in VEGA ISA, v_fma_mix_f32 in RDNA ISA
 869    (0x21, "v_pk_fma_mixlo_f16"), # v_mad_mixlo_f16 in VEGA ISA, v_fma_mixlo_f16 in RDNA ISA
 870    (0x22, "v_pk_fma_mixhi_f16"), # v_mad_mixhi_f16 in VEGA ISA, v_fma_mixhi_f16 in RDNA ISA
 871 }
 872 # note that these are only supported on gfx9+ so we'll need to distinguish between gfx8 and gfx9 here
 873 # (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (-1, -1, -1, code, code, name)
 874 for (code, name) in VOPP:
 875    opcode(name, code, code, Format.VOP3P)
 876
 877
 878 # VINTERP instructions:
 879 VINTRP = {
 880    (0x00, "v_interp_p1_f32"),
 881    (0x01, "v_interp_p2_f32"),
 882    (0x02, "v_interp_mov_f32"),
 883 }
 884 # (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (code, code, code, code, code, name)
 885 for (code, name) in VINTRP:
 886    opcode(name, code, code, Format.VINTRP)
 887
 888 # VOP3 instructions: 3 inputs, 1 output
 889 # VOP3b instructions: have a unique scalar output, e.g. VOP2 with vcc out
 890 VOP3 = {
 891    (0x140, 0x140, 0x1c0, 0x1c0, 0x140, "v_mad_legacy_f32", True, True),
 892    (0x141, 0x141, 0x1c1, 0x1c1, 0x141, "v_mad_f32", True, True),
 893    (0x142, 0x142, 0x1c2, 0x1c2, 0x142, "v_mad_i32_i24", False, False),
 894    (0x143, 0x143, 0x1c3, 0x1c3, 0x143, "v_mad_u32_u24", False, False),
 895    (0x144, 0x144, 0x1c4, 0x1c4, 0x144, "v_cubeid_f32", True, True),
 896    (0x145, 0x145, 0x1c5, 0x1c5, 0x145, "v_cubesc_f32", True, True),
 897    (0x146, 0x146, 0x1c6, 0x1c6, 0x146, "v_cubetc_f32", True, True),
 898    (0x147, 0x147, 0x1c7, 0x1c7, 0x147, "v_cubema_f32", True, True),
 899    (0x148, 0x148, 0x1c8, 0x1c8, 0x148, "v_bfe_u32", False, False),
 900    (0x149, 0x149, 0x1c9, 0x1c9, 0x149, "v_bfe_i32", False, False),
 901    (0x14a, 0x14a, 0x1ca, 0x1ca, 0x14a, "v_bfi_b32", False, False),
 902    (0x14b, 0x14b, 0x1cb, 0x1cb, 0x14b, "v_fma_f32", True, True),
 903    (0x14c, 0x14c, 0x1cc, 0x1cc, 0x14c, "v_fma_f64", True, True),
 904    (0x14d, 0x14d, 0x1cd, 0x1cd, 0x14d, "v_lerp_u8", False, False),
 905    (0x14e, 0x14e, 0x1ce, 0x1ce, 0x14e, "v_alignbit_b32", False, False),
 906    (0x14f, 0x14f, 0x1cf, 0x1cf, 0x14f, "v_alignbyte_b32", False, False),
 907    (0x150, 0x150,    -1,    -1, 0x150, "v_mullit_f32", True, True),
 908    (0x151, 0x151, 0x1d0, 0x1d0, 0x151, "v_min3_f32", True, True),
 909    (0x152, 0x152, 0x1d1, 0x1d1, 0x152, "v_min3_i32", False, False),
 910    (0x153, 0x153, 0x1d2, 0x1d2, 0x153, "v_min3_u32", False, False),
 911    (0x154, 0x154, 0x1d3, 0x1d3, 0x154, "v_max3_f32", True, True),
 912    (0x155, 0x155, 0x1d4, 0x1d4, 0x155, "v_max3_i32", False, False),
 913    (0x156, 0x156, 0x1d5, 0x1d5, 0x156, "v_max3_u32", False, False),
 914    (0x157, 0x157, 0x1d6, 0x1d6, 0x157, "v_med3_f32", True, True),
 915    (0x158, 0x158, 0x1d7, 0x1d7, 0x158, "v_med3_i32", False, False),
 916    (0x159, 0x159, 0x1d8, 0x1d8, 0x159, "v_med3_u32", False, False),
 917    (0x15a, 0x15a, 0x1d9, 0x1d9, 0x15a, "v_sad_u8", False, False),
 918    (0x15b, 0x15b, 0x1da, 0x1da, 0x15b, "v_sad_hi_u8", False, False),
 919    (0x15c, 0x15c, 0x1db, 0x1db, 0x15c, "v_sad_u16", False, False),
 920    (0x15d, 0x15d, 0x1dc, 0x1dc, 0x15d, "v_sad_u32", False, False),
 921    (0x15e, 0x15e, 0x1dd, 0x1dd, 0x15e, "v_cvt_pk_u8_f32", True, False),
 922    (0x15f, 0x15f, 0x1de, 0x1de, 0x15f, "v_div_fixup_f32", True, True),
 923    (0x160, 0x160, 0x1df, 0x1df, 0x160, "v_div_fixup_f64", True, True),
 924    (0x161, 0x161,    -1,    -1,    -1, "v_lshl_b64", False, False),
 925    (0x162, 0x162,    -1,    -1,    -1, "v_lshr_b64", False, False),
 926    (0x163, 0x163,    -1,    -1,    -1, "v_ashr_i64", False, False),
 927    (0x164, 0x164, 0x280, 0x280, 0x164, "v_add_f64", True, True),
 928    (0x165, 0x165, 0x281, 0x281, 0x165, "v_mul_f64", True, True),
 929    (0x166, 0x166, 0x282, 0x282, 0x166, "v_min_f64", True, True),
 930    (0x167, 0x167, 0x283, 0x283, 0x167, "v_max_f64", True, True),
 931    (0x168, 0x168, 0x284, 0x284, 0x168, "v_ldexp_f64", False, True), # src1 can take input modifiers
 932    (0x169, 0x169, 0x285, 0x285, 0x169, "v_mul_lo_u32", False, False),
 933    (0x16a, 0x16a, 0x286, 0x286, 0x16a, "v_mul_hi_u32", False, False),
 934    (0x16b, 0x16b, 0x285, 0x285, 0x16b, "v_mul_lo_i32", False, False), # identical to v_mul_lo_u32
 935    (0x16c, 0x16c, 0x287, 0x287, 0x16c, "v_mul_hi_i32", False, False),
 936    (0x16d, 0x16d, 0x1e0, 0x1e0, 0x16d, "v_div_scale_f32", True, True), # writes to VCC
 937    (0x16e, 0x16e, 0x1e1, 0x1e1, 0x16e, "v_div_scale_f64", True, True), # writes to VCC
 938    (0x16f, 0x16f, 0x1e2, 0x1e2, 0x16f, "v_div_fmas_f32", True, True), # takes VCC input
 939    (0x170, 0x170, 0x1e3, 0x1e3, 0x170, "v_div_fmas_f64", True, True), # takes VCC input
 940    (0x171, 0x171, 0x1e4, 0x1e4, 0x171, "v_msad_u8", False, False),
 941    (0x172, 0x172, 0x1e5, 0x1e5, 0x172, "v_qsad_pk_u16_u8", False, False),
 942    (0x172,    -1,    -1,    -1,    -1, "v_qsad_u8", False, False), # what's the difference?
 943    (0x173, 0x173, 0x1e6, 0x1e6, 0x173, "v_mqsad_pk_u16_u8", False, False),
 944    (0x173,    -1,    -1,    -1,    -1, "v_mqsad_u8", False, False), # what's the difference?
 945    (0x174, 0x174, 0x292, 0x292, 0x174, "v_trig_preop_f64", False, False),
 946    (   -1, 0x175, 0x1e7, 0x1e7, 0x175, "v_mqsad_u32_u8", False, False),
 947    (   -1, 0x176, 0x1e8, 0x1e8, 0x176, "v_mad_u64_u32", False, False),
 948    (   -1, 0x177, 0x1e9, 0x1e9, 0x177, "v_mad_i64_i32", False, False),
 949    (   -1,    -1, 0x1ea, 0x1ea,    -1, "v_mad_legacy_f16", True, True),
 950    (   -1,    -1, 0x1eb, 0x1eb,    -1, "v_mad_legacy_u16", False, False),
 951    (   -1,    -1, 0x1ec, 0x1ec,    -1, "v_mad_legacy_i16", False, False),
 952    (   -1,    -1, 0x1ed, 0x1ed, 0x344, "v_perm_b32", False, False),
 953    (   -1,    -1, 0x1ee, 0x1ee,    -1, "v_fma_legacy_f16", True, True),
 954    (   -1,    -1, 0x1ef, 0x1ef,    -1, "v_div_fixup_legacy_f16", True, True),
 955    (0x12c, 0x12c, 0x1f0, 0x1f0,    -1, "v_cvt_pkaccum_u8_f32", True, False),
 956    (   -1,    -1,    -1, 0x1f1, 0x373, "v_mad_u32_u16", False, False),
 957    (   -1,    -1,    -1, 0x1f2, 0x375, "v_mad_i32_i16", False, False),
 958    (   -1,    -1,    -1, 0x1f3, 0x345, "v_xad_u32", False, False),
 959    (   -1,    -1,    -1, 0x1f4, 0x351, "v_min3_f16", True, True),
 960    (   -1,    -1,    -1, 0x1f5, 0x352, "v_min3_i16", False, False),
 961    (   -1,    -1,    -1, 0x1f6, 0x353, "v_min3_u16", False, False),
 962    (   -1,    -1,    -1, 0x1f7, 0x354, "v_max3_f16", True, True),
 963    (   -1,    -1,    -1, 0x1f8, 0x355, "v_max3_i16", False, False),
 964    (   -1,    -1,    -1, 0x1f9, 0x356, "v_max3_u16", False, False),
 965    (   -1,    -1,    -1, 0x1fa, 0x357, "v_med3_f16", True, True),
 966    (   -1,    -1,    -1, 0x1fb, 0x358, "v_med3_i16", False, False),
 967    (   -1,    -1,    -1, 0x1fc, 0x359, "v_med3_u16", False, False),
 968    (   -1,    -1,    -1, 0x1fd, 0x346, "v_lshl_add_u32", False, False),
 969    (   -1,    -1,    -1, 0x1fe, 0x347, "v_add_lshl_u32", False, False),
 970    (   -1,    -1,    -1, 0x1ff, 0x36d, "v_add3_u32", False, False),
 971    (   -1,    -1,    -1, 0x200, 0x36f, "v_lshl_or_b32", False, False),
 972    (   -1,    -1,    -1, 0x201, 0x371, "v_and_or_b32", False, False),
 973    (   -1,    -1,    -1, 0x202, 0x372, "v_or3_b32", False, False),
 974    (   -1,    -1,    -1, 0x203,    -1, "v_mad_f16", True, True),
 975    (   -1,    -1,    -1, 0x204, 0x340, "v_mad_u16", False, False),
 976    (   -1,    -1,    -1, 0x205, 0x35e, "v_mad_i16", False, False),
 977    (   -1,    -1,    -1, 0x206, 0x34b, "v_fma_f16", True, True),
 978    (   -1,    -1,    -1, 0x207, 0x35f, "v_div_fixup_f16", True, True),
 979    (   -1,    -1, 0x274, 0x274, 0x342, "v_interp_p1ll_f16", True, True),
 980    (   -1,    -1, 0x275, 0x275, 0x343, "v_interp_p1lv_f16", True, True),
 981    (   -1,    -1, 0x276, 0x276,    -1, "v_interp_p2_legacy_f16", True, True),
 982    (   -1,    -1,    -1, 0x277, 0x35a, "v_interp_p2_f16", True, True),
 983    (0x12b, 0x12b, 0x288, 0x288, 0x362, "v_ldexp_f32", False, True),
 984    (0x101, 0x101, 0x289, 0x289, 0x360, "v_readlane_b32", False, False),
 985    (0x102, 0x102, 0x28a, 0x28a, 0x361, "v_writelane_b32", False, False),
 986    (0x122, 0x122, 0x28b, 0x28b, 0x364, "v_bcnt_u32_b32", False, False),
 987    (0x123, 0x123, 0x28c, 0x28c, 0x365, "v_mbcnt_lo_u32_b32", False, False),
 988    (0x124, 0x124, 0x28d, 0x28d, 0x366, "v_mbcnt_hi_u32_b32", False, False),
 989    (   -1,    -1, 0x28f, 0x28f, 0x2ff, "v_lshlrev_b64", False, False),
 990    (   -1,    -1, 0x290, 0x290, 0x300, "v_lshrrev_b64", False, False),
 991    (   -1,    -1, 0x291, 0x291, 0x301, "v_ashrrev_i64", False, False),
 992    (0x11e, 0x11e, 0x293, 0x293, 0x363, "v_bfm_b32", False, False),
 993    (0x12d, 0x12d, 0x294, 0x294, 0x368, "v_cvt_pknorm_i16_f32", True, False),
 994    (0x12e, 0x12e, 0x295, 0x295, 0x369, "v_cvt_pknorm_u16_f32", True, False),
 995    (0x12f, 0x12f, 0x296, 0x296, 0x12f, "v_cvt_pkrtz_f16_f32", True, False), # GFX6_7_10 is VOP2 with opcode 0x02f
 996    (0x130, 0x130, 0x297, 0x297, 0x36a, "v_cvt_pk_u16_u32", False, False),
 997    (0x131, 0x131, 0x298, 0x298, 0x36b, "v_cvt_pk_i16_i32", False, False),
 998    (   -1,    -1,    -1, 0x299, 0x312, "v_cvt_pknorm_i16_f16", True, False),
 999    (   -1,    -1,    -1, 0x29a, 0x313, "v_cvt_pknorm_u16_f16", True, False),
1000    (   -1,    -1,    -1, 0x29c, 0x37f, "v_add_i32", False, False),
1001    (   -1,    -1,    -1, 0x29d, 0x376, "v_sub_i32", False, False),
1002    (   -1,    -1,    -1, 0x29e, 0x30d, "v_add_i16", False, False),
1003    (   -1,    -1,    -1, 0x29f, 0x30e, "v_sub_i16", False, False),
1004    (   -1,    -1,    -1, 0x2a0, 0x311, "v_pack_b32_f16", True, False),
1005    (   -1,    -1,    -1,    -1, 0x178, "v_xor3_b32", False, False),
1006    (   -1,    -1,    -1,    -1, 0x377, "v_permlane16_b32", False, False),
1007    (   -1,    -1,    -1,    -1, 0x378, "v_permlanex16_b32", False, False),
1008    (   -1,    -1,    -1,    -1, 0x30f, "v_add_co_u32_e64", False, False),
1009    (   -1,    -1,    -1,    -1, 0x310, "v_sub_co_u32_e64", False, False),
1010    (   -1,    -1,    -1,    -1, 0x319, "v_subrev_co_u32_e64", False, False),
1011 # TODO: many 16bit instructions moved from VOP2 to VOP3 on GFX10
1012 }
1013 for (gfx6, gfx7, gfx8, gfx9, gfx10, name, in_mod, out_mod) in VOP3:
1014    opcode(name, gfx9, gfx10, Format.VOP3A, in_mod, out_mod)
1015
1016
1017 # DS instructions: 3 inputs (1 addr, 2 data), 1 output
1018 DS = {
1019    (0x00, 0x00, 0x00, 0x00, 0x00, "ds_add_u32"),
1020    (0x01, 0x01, 0x01, 0x01, 0x01, "ds_sub_u32"),
1021    (0x02, 0x02, 0x02, 0x02, 0x02, "ds_rsub_u32"),
1022    (0x03, 0x03, 0x03, 0x03, 0x03, "ds_inc_u32"),
1023    (0x04, 0x04, 0x04, 0x04, 0x04, "ds_dec_u32"),
1024    (0x05, 0x05, 0x05, 0x05, 0x05, "ds_min_i32"),
1025    (0x06, 0x06, 0x06, 0x06, 0x06, "ds_max_i32"),
1026    (0x07, 0x07, 0x07, 0x07, 0x07, "ds_min_u32"),
1027    (0x08, 0x08, 0x08, 0x08, 0x08, "ds_max_u32"),
1028    (0x09, 0x09, 0x09, 0x09, 0x09, "ds_and_b32"),
1029    (0x0a, 0x0a, 0x0a, 0x0a, 0x0a, "ds_or_b32"),
1030    (0x0b, 0x0b, 0x0b, 0x0b, 0x0b, "ds_xor_b32"),
1031    (0x0c, 0x0c, 0x0c, 0x0c, 0x0c, "ds_mskor_b32"),
1032    (0x0d, 0x0d, 0x0d, 0x0d, 0x0d, "ds_write_b32"),
1033    (0x0e, 0x0e, 0x0e, 0x0e, 0x0e, "ds_write2_b32"),
1034    (0x0f, 0x0f, 0x0f, 0x0f, 0x0f, "ds_write2st64_b32"),
1035    (0x10, 0x10, 0x10, 0x10, 0x10, "ds_cmpst_b32"),
1036    (0x11, 0x11, 0x11, 0x11, 0x11, "ds_cmpst_f32"),
1037    (0x12, 0x12, 0x12, 0x12, 0x12, "ds_min_f32"),
1038    (0x13, 0x13, 0x13, 0x13, 0x13, "ds_max_f32"),
1039    (  -1, 0x14, 0x14, 0x14, 0x14, "ds_nop"),
1040    (  -1,   -1, 0x15, 0x15, 0x15, "ds_add_f32"),
1041    (  -1,   -1, 0x1d, 0x1d, 0xb0, "ds_write_addtid_b32"),
1042    (0x1e, 0x1e, 0x1e, 0x1e, 0x1e, "ds_write_b8"),
1043    (0x1f, 0x1f, 0x1f, 0x1f, 0x1f, "ds_write_b16"),
1044    (0x20, 0x20, 0x20, 0x20, 0x20, "ds_add_rtn_u32"),
1045    (0x21, 0x21, 0x21, 0x21, 0x21, "ds_sub_rtn_u32"),
1046    (0x22, 0x22, 0x22, 0x22, 0x22, "ds_rsub_rtn_u32"),
1047    (0x23, 0x23, 0x23, 0x23, 0x23, "ds_inc_rtn_u32"),
1048    (0x24, 0x24, 0x24, 0x24, 0x24, "ds_dec_rtn_u32"),
1049    (0x25, 0x25, 0x25, 0x25, 0x25, "ds_min_rtn_i32"),
1050    (0x26, 0x26, 0x26, 0x26, 0x26, "ds_max_rtn_i32"),
1051    (0x27, 0x27, 0x27, 0x27, 0x27, "ds_min_rtn_u32"),
1052    (0x28, 0x28, 0x28, 0x28, 0x28, "ds_max_rtn_u32"),
1053    (0x29, 0x29, 0x29, 0x29, 0x29, "ds_and_rtn_b32"),
1054    (0x2a, 0x2a, 0x2a, 0x2a, 0x2a, "ds_or_rtn_b32"),
1055    (0x2b, 0x2b, 0x2b, 0x2b, 0x2b, "ds_xor_rtn_b32"),
1056    (0x2c, 0x2c, 0x2c, 0x2c, 0x2c, "ds_mskor_rtn_b32"),
1057    (0x2d, 0x2d, 0x2d, 0x2d, 0x2d, "ds_wrxchg_rtn_b32"),
1058    (0x2e, 0x2e, 0x2e, 0x2e, 0x2e, "ds_wrxchg2_rtn_b32"),
1059    (0x2f, 0x2f, 0x2f, 0x2f, 0x2f, "ds_wrxchg2st64_rtn_b32"),
1060    (0x30, 0x30, 0x30, 0x30, 0x30, "ds_cmpst_rtn_b32"),
1061    (0x31, 0x31, 0x31, 0x31, 0x31, "ds_cmpst_rtn_f32"),
1062    (0x32, 0x32, 0x32, 0x32, 0x32, "ds_min_rtn_f32"),
1063    (0x33, 0x33, 0x33, 0x33, 0x33, "ds_max_rtn_f32"),
1064    (  -1, 0x34, 0x34, 0x34, 0x34, "ds_wrap_rtn_b32"),
1065    (  -1,   -1, 0x35, 0x35, 0x55, "ds_add_rtn_f32"),
1066    (0x36, 0x36, 0x36, 0x36, 0x36, "ds_read_b32"),
1067    (0x37, 0x37, 0x37, 0x37, 0x37, "ds_read2_b32"),
1068    (0x38, 0x38, 0x38, 0x38, 0x38, "ds_read2st64_b32"),
1069    (0x39, 0x39, 0x39, 0x39, 0x39, "ds_read_i8"),
1070    (0x3a, 0x3a, 0x3a, 0x3a, 0x3a, "ds_read_u8"),
1071    (0x3b, 0x3b, 0x3b, 0x3b, 0x3b, "ds_read_i16"),
1072    (0x3c, 0x3c, 0x3c, 0x3c, 0x3c, "ds_read_u16"),
1073    (0x35, 0x35, 0x3d, 0x3d, 0x35, "ds_swizzle_b32"), #data1 & offset, no addr/data2
1074    (  -1,   -1, 0x3e, 0x3e, 0xb2, "ds_permute_b32"),
1075    (  -1,   -1, 0x3f, 0x3f, 0xb3, "ds_bpermute_b32"),
1076    (0x40, 0x40, 0x40, 0x40, 0x40, "ds_add_u64"),
1077    (0x41, 0x41, 0x41, 0x41, 0x41, "ds_sub_u64"),
1078    (0x42, 0x42, 0x42, 0x42, 0x42, "ds_rsub_u64"),
1079    (0x43, 0x43, 0x43, 0x43, 0x43, "ds_inc_u64"),
1080    (0x44, 0x44, 0x44, 0x44, 0x44, "ds_dec_u64"),
1081    (0x45, 0x45, 0x45, 0x45, 0x45, "ds_min_i64"),
1082    (0x46, 0x46, 0x46, 0x46, 0x46, "ds_max_i64"),
1083    (0x47, 0x47, 0x47, 0x47, 0x47, "ds_min_u64"),
1084    (0x48, 0x48, 0x48, 0x48, 0x48, "ds_max_u64"),
1085    (0x49, 0x49, 0x49, 0x49, 0x49, "ds_and_b64"),
1086    (0x4a, 0x4a, 0x4a, 0x4a, 0x4a, "ds_or_b64"),
1087    (0x4b, 0x4b, 0x4b, 0x4b, 0x4b, "ds_xor_b64"),
1088    (0x4c, 0x4c, 0x4c, 0x4c, 0x4c, "ds_mskor_b64"),
1089    (0x4d, 0x4d, 0x4d, 0x4d, 0x4d, "ds_write_b64"),
1090    (0x4e, 0x4e, 0x4e, 0x4e, 0x4e, "ds_write2_b64"),
1091    (0x4f, 0x4f, 0x4f, 0x4f, 0x4f, "ds_write2st64_b64"),
1092    (0x50, 0x50, 0x50, 0x50, 0x50, "ds_cmpst_b64"),
1093    (0x51, 0x51, 0x51, 0x51, 0x51, "ds_cmpst_f64"),
1094    (0x52, 0x52, 0x52, 0x52, 0x52, "ds_min_f64"),
1095    (0x53, 0x53, 0x53, 0x53, 0x53, "ds_max_f64"),
1096    (  -1,   -1, 0x54, 0x54, 0xa0, "ds_write_b8_d16_hi"),
1097    (  -1,   -1, 0x55, 0x55, 0xa1, "ds_write_b16_d16_hi"),
1098    (  -1,   -1, 0x56, 0x56, 0xa2, "ds_read_u8_d16"),
1099    (  -1,   -1, 0x57, 0x57, 0xa3, "ds_read_u8_d16_hi"),
1100    (  -1,   -1, 0x58, 0x58, 0xa4, "ds_read_i8_d16"),
1101    (  -1,   -1, 0x59, 0x59, 0xa5, "ds_read_i8_d16_hi"),
1102    (  -1,   -1, 0x5a, 0x5a, 0xa6, "ds_read_u16_d16"),
1103    (  -1,   -1, 0x5b, 0x5b, 0xa7, "ds_read_u16_d16_hi"),
1104    (0x60, 0x60, 0x60, 0x60, 0x60, "ds_add_rtn_u64"),
1105    (0x61, 0x61, 0x61, 0x61, 0x61, "ds_sub_rtn_u64"),
1106    (0x62, 0x62, 0x62, 0x62, 0x62, "ds_rsub_rtn_u64"),
1107    (0x63, 0x63, 0x63, 0x63, 0x63, "ds_inc_rtn_u64"),
1108    (0x64, 0x64, 0x64, 0x64, 0x64, "ds_dec_rtn_u64"),
1109    (0x65, 0x65, 0x65, 0x65, 0x65, "ds_min_rtn_i64"),
1110    (0x66, 0x66, 0x66, 0x66, 0x66, "ds_max_rtn_i64"),
1111    (0x67, 0x67, 0x67, 0x67, 0x67, "ds_min_rtn_u64"),
1112    (0x68, 0x68, 0x68, 0x68, 0x68, "ds_max_rtn_u64"),
1113    (0x69, 0x69, 0x69, 0x69, 0x69, "ds_and_rtn_b64"),
1114    (0x6a, 0x6a, 0x6a, 0x6a, 0x6a, "ds_or_rtn_b64"),
1115    (0x6b, 0x6b, 0x6b, 0x6b, 0x6b, "ds_xor_rtn_b64"),
1116    (0x6c, 0x6c, 0x6c, 0x6c, 0x6c, "ds_mskor_rtn_b64"),
1117    (0x6d, 0x6d, 0x6d, 0x6d, 0x6d, "ds_wrxchg_rtn_b64"),
1118    (0x6e, 0x6e, 0x6e, 0x6e, 0x6e, "ds_wrxchg2_rtn_b64"),
1119    (0x6f, 0x6f, 0x6f, 0x6f, 0x6f, "ds_wrxchg2st64_rtn_b64"),
1120    (0x70, 0x70, 0x70, 0x70, 0x70, "ds_cmpst_rtn_b64"),
1121    (0x71, 0x71, 0x71, 0x71, 0x71, "ds_cmpst_rtn_f64"),
1122    (0x72, 0x72, 0x72, 0x72, 0x72, "ds_min_rtn_f64"),
1123    (0x73, 0x73, 0x73, 0x73, 0x73, "ds_max_rtn_f64"),
1124    (0x76, 0x76, 0x76, 0x76, 0x76, "ds_read_b64"),
1125    (0x77, 0x77, 0x77, 0x77, 0x77, "ds_read2_b64"),
1126    (0x78, 0x78, 0x78, 0x78, 0x78, "ds_read2st64_b64"),
1127    (  -1, 0x7e, 0x7e, 0x7e, 0x7e, "ds_condxchg32_rtn_b64"),
1128    (0x80, 0x80, 0x80, 0x80, 0x80, "ds_add_src2_u32"),
1129    (0x81, 0x81, 0x81, 0x81, 0x81, "ds_sub_src2_u32"),
1130    (0x82, 0x82, 0x82, 0x82, 0x82, "ds_rsub_src2_u32"),
1131    (0x83, 0x83, 0x83, 0x83, 0x83, "ds_inc_src2_u32"),
1132    (0x84, 0x84, 0x84, 0x84, 0x84, "ds_dec_src2_u32"),
1133    (0x85, 0x85, 0x85, 0x85, 0x85, "ds_min_src2_i32"),
1134    (0x86, 0x86, 0x86, 0x86, 0x86, "ds_max_src2_i32"),
1135    (0x87, 0x87, 0x87, 0x87, 0x87, "ds_min_src2_u32"),
1136    (0x88, 0x88, 0x88, 0x88, 0x88, "ds_max_src2_u32"),
1137    (0x89, 0x89, 0x89, 0x89, 0x89, "ds_and_src2_b32"),
1138    (0x8a, 0x8a, 0x8a, 0x8a, 0x8a, "ds_or_src2_b32"),
1139    (0x8b, 0x8b, 0x8b, 0x8b, 0x8b, "ds_xor_src2_b32"),
1140    (0x8d, 0x8d, 0x8d, 0x8d, 0x8d, "ds_write_src2_b32"),
1141    (0x92, 0x92, 0x92, 0x92, 0x92, "ds_min_src2_f32"),
1142    (0x93, 0x93, 0x93, 0x93, 0x93, "ds_max_src2_f32"),
1143    (  -1,   -1, 0x95, 0x95, 0x95, "ds_add_src2_f32"),
1144    (  -1, 0x18, 0x98, 0x98, 0x18, "ds_gws_sema_release_all"),
1145    (0x19, 0x19, 0x99, 0x99, 0x19, "ds_gws_init"),
1146    (0x1a, 0x1a, 0x9a, 0x9a, 0x1a, "ds_gws_sema_v"),
1147    (0x1b, 0x1b, 0x9b, 0x9b, 0x1b, "ds_gws_sema_br"),
1148    (0x1c, 0x1c, 0x9c, 0x9c, 0x1c, "ds_gws_sema_p"),
1149    (0x1d, 0x1d, 0x9d, 0x9d, 0x1d, "ds_gws_barrier"),
1150    (  -1,   -1, 0xb6, 0xb6, 0xb1, "ds_read_addtid_b32"),
1151    (0x3d, 0x3d, 0xbd, 0xbd, 0x3d, "ds_consume"),
1152    (0x3e, 0x3e, 0xbe, 0xbe, 0x3e, "ds_append"),
1153    (0x3f, 0x3f, 0xbf, 0xbf, 0x3f, "ds_ordered_count"),
1154    (0xc0, 0xc0, 0xc0, 0xc0, 0xc0, "ds_add_src2_u64"),
1155    (0xc1, 0xc1, 0xc1, 0xc1, 0xc1, "ds_sub_src2_u64"),
1156    (0xc2, 0xc2, 0xc2, 0xc2, 0xc2, "ds_rsub_src2_u64"),
1157    (0xc3, 0xc3, 0xc3, 0xc3, 0xc3, "ds_inc_src2_u64"),
1158    (0xc4, 0xc4, 0xc4, 0xc4, 0xc4, "ds_dec_src2_u64"),
1159    (0xc5, 0xc5, 0xc5, 0xc5, 0xc5, "ds_min_src2_i64"),
1160    (0xc6, 0xc6, 0xc6, 0xc6, 0xc6, "ds_max_src2_i64"),
1161    (0xc7, 0xc7, 0xc7, 0xc7, 0xc7, "ds_min_src2_u64"),
1162    (0xc8, 0xc8, 0xc8, 0xc8, 0xc8, "ds_max_src2_u64"),
1163    (0xc9, 0xc9, 0xc9, 0xc9, 0xc9, "ds_and_src2_b64"),
1164    (0xca, 0xca, 0xca, 0xca, 0xca, "ds_or_src2_b64"),
1165    (0xcb, 0xcb, 0xcb, 0xcb, 0xcb, "ds_xor_src2_b64"),
1166    (0xcd, 0xcd, 0xcd, 0xcd, 0xcd, "ds_write_src2_b64"),
1167    (0xd2, 0xd2, 0xd2, 0xd2, 0xd2, "ds_min_src2_f64"),
1168    (0xd3, 0xd3, 0xd3, 0xd3, 0xd3, "ds_max_src2_f64"),
1169    (  -1, 0xde, 0xde, 0xde, 0xde, "ds_write_b96"),
1170    (  -1, 0xdf, 0xdf, 0xdf, 0xdf, "ds_write_b128"),
1171    (  -1, 0xfd, 0xfd,   -1,   -1, "ds_condxchg32_rtn_b128"),
1172    (  -1, 0xfe, 0xfe, 0xfe, 0xfe, "ds_read_b96"),
1173    (  -1, 0xff, 0xff, 0xff, 0xff, "ds_read_b128"),
1174 }
1175 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in DS:
1176     opcode(name, gfx9, gfx10, Format.DS)
1177
1178 # MUBUF instructions:
1179 MUBUF = {
1180    (0x00, 0x00, 0x00, 0x00, 0x00, "buffer_load_format_x"),
1181    (0x01, 0x01, 0x01, 0x01, 0x01, "buffer_load_format_xy"),
1182    (0x02, 0x02, 0x02, 0x02, 0x02, "buffer_load_format_xyz"),
1183    (0x03, 0x03, 0x03, 0x03, 0x03, "buffer_load_format_xyzw"),
1184    (0x04, 0x04, 0x04, 0x04, 0x04, "buffer_store_format_x"),
1185    (0x05, 0x05, 0x05, 0x05, 0x05, "buffer_store_format_xy"),
1186    (0x06, 0x06, 0x06, 0x06, 0x06, "buffer_store_format_xyz"),
1187    (0x07, 0x07, 0x07, 0x07, 0x07, "buffer_store_format_xyzw"),
1188    (  -1,   -1, 0x08, 0x08, 0x80, "buffer_load_format_d16_x"),
1189    (  -1,   -1, 0x09, 0x09, 0x81, "buffer_load_format_d16_xy"),
1190    (  -1,   -1, 0x0a, 0x0a, 0x82, "buffer_load_format_d16_xyz"),
1191    (  -1,   -1, 0x0b, 0x0b, 0x83, "buffer_load_format_d16_xyzw"),
1192    (  -1,   -1, 0x0c, 0x0c, 0x84, "buffer_store_format_d16_x"),
1193    (  -1,   -1, 0x0d, 0x0d, 0x85, "buffer_store_format_d16_xy"),
1194    (  -1,   -1, 0x0e, 0x0e, 0x86, "buffer_store_format_d16_xyz"),
1195    (  -1,   -1, 0x0f, 0x0f, 0x87, "buffer_store_format_d16_xyzw"),
1196    (0x08, 0x08, 0x10, 0x10, 0x08, "buffer_load_ubyte"),
1197    (0x09, 0x09, 0x11, 0x11, 0x09, "buffer_load_sbyte"),
1198    (0x0a, 0x0a, 0x12, 0x12, 0x0a, "buffer_load_ushort"),
1199    (0x0b, 0x0b, 0x13, 0x13, 0x0b, "buffer_load_sshort"),
1200    (0x0c, 0x0c, 0x14, 0x14, 0x0c, "buffer_load_dword"),
1201    (0x0d, 0x0d, 0x15, 0x15, 0x0d, "buffer_load_dwordx2"),
1202    (  -1, 0x0f, 0x16, 0x16, 0x0f, "buffer_load_dwordx3"),
1203    (0x0f, 0x0e, 0x17, 0x17, 0x0e, "buffer_load_dwordx4"),
1204    (0x18, 0x18, 0x18, 0x18, 0x18, "buffer_store_byte"),
1205    (  -1,   -1,   -1, 0x19, 0x19, "buffer_store_byte_d16_hi"),
1206    (0x1a, 0x1a, 0x1a, 0x1a, 0x1a, "buffer_store_short"),
1207    (  -1,   -1,   -1, 0x1b, 0x1b, "buffer_store_short_d16_hi"),
1208    (0x1c, 0x1c, 0x1c, 0x1c, 0x1c, "buffer_store_dword"),
1209    (0x1d, 0x1d, 0x1d, 0x1d, 0x1d, "buffer_store_dwordx2"),
1210    (  -1, 0x1f, 0x1e, 0x1e, 0x1f, "buffer_store_dwordx3"),
1211    (0x1e, 0x1e, 0x1f, 0x1f, 0x1e, "buffer_store_dwordx4"),
1212    (  -1,   -1,   -1, 0x20, 0x20, "buffer_load_ubyte_d16"),
1213    (  -1,   -1,   -1, 0x21, 0x21, "buffer_load_ubyte_d16_hi"),
1214    (  -1,   -1,   -1, 0x22, 0x22, "buffer_load_sbyte_d16"),
1215    (  -1,   -1,   -1, 0x23, 0x23, "buffer_load_sbyte_d16_hi"),
1216    (  -1,   -1,   -1, 0x24, 0x24, "buffer_load_short_d16"),
1217    (  -1,   -1,   -1, 0x25, 0x25, "buffer_load_short_d16_hi"),
1218    (  -1,   -1,   -1, 0x26, 0x26, "buffer_load_format_d16_hi_x"),
1219    (  -1,   -1,   -1, 0x27, 0x27, "buffer_store_format_d16_hi_x"),
1220    (  -1,   -1, 0x3d, 0x3d,   -1, "buffer_store_lds_dword"),
1221    (0x71, 0x71, 0x3e, 0x3e,   -1, "buffer_wbinvl1"),
1222    (0x70, 0x70, 0x3f, 0x3f,   -1, "buffer_wbinvl1_vol"),
1223    (0x30, 0x30, 0x40, 0x40, 0x30, "buffer_atomic_swap"),
1224    (0x31, 0x31, 0x41, 0x41, 0x31, "buffer_atomic_cmpswap"),
1225    (0x32, 0x32, 0x42, 0x42, 0x32, "buffer_atomic_add"),
1226    (0x33, 0x33, 0x43, 0x43, 0x33, "buffer_atomic_sub"),
1227    (0x34,   -1,   -1,   -1,   -1, "buffer_atomic_rsub"),
1228    (0x35, 0x35, 0x44, 0x44, 0x35, "buffer_atomic_smin"),
1229    (0x36, 0x36, 0x45, 0x45, 0x36, "buffer_atomic_umin"),
1230    (0x37, 0x37, 0x46, 0x46, 0x37, "buffer_atomic_smax"),
1231    (0x38, 0x38, 0x47, 0x47, 0x38, "buffer_atomic_umax"),
1232    (0x39, 0x39, 0x48, 0x48, 0x39, "buffer_atomic_and"),
1233    (0x3a, 0x3a, 0x49, 0x49, 0x3a, "buffer_atomic_or"),
1234    (0x3b, 0x3b, 0x4a, 0x4a, 0x3b, "buffer_atomic_xor"),
1235    (0x3c, 0x3c, 0x4b, 0x4b, 0x3c, "buffer_atomic_inc"),
1236    (0x3d, 0x3d, 0x4c, 0x4c, 0x3d, "buffer_atomic_dec"),
1237    (0x3e, 0x3e,   -1,   -1, 0x3e, "buffer_atomic_fcmpswap"),
1238    (0x3f, 0x3f,   -1,   -1, 0x3f, "buffer_atomic_fmin"),
1239    (0x40, 0x40,   -1,   -1, 0x40, "buffer_atomic_fmax"),
1240    (0x50, 0x50, 0x60, 0x60, 0x50, "buffer_atomic_swap_x2"),
1241    (0x51, 0x51, 0x61, 0x61, 0x51, "buffer_atomic_cmpswap_x2"),
1242    (0x52, 0x52, 0x62, 0x62, 0x52, "buffer_atomic_add_x2"),
1243    (0x53, 0x53, 0x63, 0x63, 0x53, "buffer_atomic_sub_x2"),
1244    (0x54,   -1,   -1,   -1,   -1, "buffer_atomic_rsub_x2"),
1245    (0x55, 0x55, 0x64, 0x64, 0x55, "buffer_atomic_smin_x2"),
1246    (0x56, 0x56, 0x65, 0x65, 0x56, "buffer_atomic_umin_x2"),
1247    (0x57, 0x57, 0x66, 0x66, 0x57, "buffer_atomic_smax_x2"),
1248    (0x58, 0x58, 0x67, 0x67, 0x58, "buffer_atomic_umax_x2"),
1249    (0x59, 0x59, 0x68, 0x68, 0x59, "buffer_atomic_and_x2"),
1250    (0x5a, 0x5a, 0x69, 0x69, 0x5a, "buffer_atomic_or_x2"),
1251    (0x5b, 0x5b, 0x6a, 0x6a, 0x5b, "buffer_atomic_xor_x2"),
1252    (0x5c, 0x5c, 0x6b, 0x6b, 0x5c, "buffer_atomic_inc_x2"),
1253    (0x5d, 0x5d, 0x6c, 0x6c, 0x5d, "buffer_atomic_dec_x2"),
1254    (0x5e, 0x5e,   -1,   -1, 0x5e, "buffer_atomic_fcmpswap_x2"),
1255    (0x5f, 0x5f,   -1,   -1, 0x5f, "buffer_atomic_fmin_x2"),
1256    (0x60, 0x60,   -1,   -1, 0x60, "buffer_atomic_fmax_x2"),
1257    (  -1,   -1,   -1,   -1, 0x71, "buffer_gl0_inv"),
1258    (  -1,   -1,   -1,   -1, 0x72, "buffer_gl1_inv"),
1259 }
1260 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in MUBUF:
1261     opcode(name, gfx9, gfx10, Format.MUBUF)
1262
1263 MTBUF = {
1264    (0x00, 0x00, 0x00, 0x00, 0x00, "tbuffer_load_format_x"),
1265    (0x01, 0x01, 0x01, 0x01, 0x01, "tbuffer_load_format_xy"),
1266    (0x02, 0x02, 0x02, 0x02, 0x02, "tbuffer_load_format_xyz"),
1267    (0x03, 0x03, 0x03, 0x03, 0x03, "tbuffer_load_format_xyzw"),
1268    (0x04, 0x04, 0x04, 0x04, 0x04, "tbuffer_store_format_x"),
1269    (0x05, 0x05, 0x05, 0x05, 0x05, "tbuffer_store_format_xy"),
1270    (0x06, 0x06, 0x06, 0x06, 0x06, "tbuffer_store_format_xyz"),
1271    (0x07, 0x07, 0x07, 0x07, 0x07, "tbuffer_store_format_xyzw"),
1272    (  -1,   -1, 0x08, 0x08, 0x08, "tbuffer_load_format_d16_x"),
1273    (  -1,   -1, 0x09, 0x09, 0x09, "tbuffer_load_format_d16_xy"),
1274    (  -1,   -1, 0x0a, 0x0a, 0x0a, "tbuffer_load_format_d16_xyz"),
1275    (  -1,   -1, 0x0b, 0x0b, 0x0b, "tbuffer_load_format_d16_xyzw"),
1276    (  -1,   -1, 0x0c, 0x0c, 0x0c, "tbuffer_store_format_d16_x"),
1277    (  -1,   -1, 0x0d, 0x0d, 0x0d, "tbuffer_store_format_d16_xy"),
1278    (  -1,   -1, 0x0e, 0x0e, 0x0e, "tbuffer_store_format_d16_xyz"),
1279    (  -1,   -1, 0x0f, 0x0f, 0x0f, "tbuffer_store_format_d16_xyzw"),
1280 }
1281 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in MTBUF:
1282     opcode(name, gfx9, gfx10, Format.MTBUF)
1283
1284
1285 IMAGE = {
1286    (0x00, "image_load"),
1287    (0x01, "image_load_mip"),
1288    (0x02, "image_load_pck"),
1289    (0x03, "image_load_pck_sgn"),
1290    (0x04, "image_load_mip_pck"),
1291    (0x05, "image_load_mip_pck_sgn"),
1292    (0x08, "image_store"),
1293    (0x09, "image_store_mip"),
1294    (0x0a, "image_store_pck"),
1295    (0x0b, "image_store_mip_pck"),
1296    (0x0e, "image_get_resinfo"),
1297    (0x60, "image_get_lod"),
1298 }
1299 # (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (code, code, code, code, code, name)
1300 for (code, name) in IMAGE:
1301    opcode(name, code, code, Format.MIMG)
1302
1303 IMAGE_ATOMIC = {
1304    (0x0f, 0x0f, 0x10, "image_atomic_swap"),
1305    (0x10, 0x10, 0x11, "image_atomic_cmpswap"),
1306    (0x11, 0x11, 0x12, "image_atomic_add"),
1307    (0x12, 0x12, 0x13, "image_atomic_sub"),
1308    (0x13,   -1,   -1, "image_atomic_rsub"),
1309    (0x14, 0x14, 0x14, "image_atomic_smin"),
1310    (0x15, 0x15, 0x15, "image_atomic_umin"),
1311    (0x16, 0x16, 0x16, "image_atomic_smax"),
1312    (0x17, 0x17, 0x17, "image_atomic_umax"),
1313    (0x18, 0x18, 0x18, "image_atomic_and"),
1314    (0x19, 0x19, 0x19, "image_atomic_or"),
1315    (0x1a, 0x1a, 0x1a, "image_atomic_xor"),
1316    (0x1b, 0x1b, 0x1b, "image_atomic_inc"),
1317    (0x1c, 0x1c, 0x1c, "image_atomic_dec"),
1318    (0x1d, 0x1d,   -1, "image_atomic_fcmpswap"),
1319    (0x1e, 0x1e,   -1, "image_atomic_fmin"),
1320    (0x1f, 0x1f,   -1, "image_atomic_fmax"),
1321 }
1322 # (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (gfx6, gfx7, gfx89, gfx89, ???, name)
1323 # gfx7 and gfx10 opcodes are the same here
1324 for (gfx6, gfx7, gfx89, name) in IMAGE_ATOMIC:
1325    opcode(name, gfx89, gfx7, Format.MIMG)
1326
1327 IMAGE_SAMPLE = {
1328    (0x20, "image_sample"),
1329    (0x21, "image_sample_cl"),
1330    (0x22, "image_sample_d"),
1331    (0x23, "image_sample_d_cl"),
1332    (0x24, "image_sample_l"),
1333    (0x25, "image_sample_b"),
1334    (0x26, "image_sample_b_cl"),
1335    (0x27, "image_sample_lz"),
1336    (0x28, "image_sample_c"),
1337    (0x29, "image_sample_c_cl"),
1338    (0x2a, "image_sample_c_d"),
1339    (0x2b, "image_sample_c_d_cl"),
1340    (0x2c, "image_sample_c_l"),
1341    (0x2d, "image_sample_c_b"),
1342    (0x2e, "image_sample_c_b_cl"),
1343    (0x2f, "image_sample_c_lz"),
1344    (0x30, "image_sample_o"),
1345    (0x31, "image_sample_cl_o"),
1346    (0x32, "image_sample_d_o"),
1347    (0x33, "image_sample_d_cl_o"),
1348    (0x34, "image_sample_l_o"),
1349    (0x35, "image_sample_b_o"),
1350    (0x36, "image_sample_b_cl_o"),
1351    (0x37, "image_sample_lz_o"),
1352    (0x38, "image_sample_c_o"),
1353    (0x39, "image_sample_c_cl_o"),
1354    (0x3a, "image_sample_c_d_o"),
1355    (0x3b, "image_sample_c_d_cl_o"),
1356    (0x3c, "image_sample_c_l_o"),
1357    (0x3d, "image_sample_c_b_o"),
1358    (0x3e, "image_sample_c_b_cl_o"),
1359    (0x3f, "image_sample_c_lz_o"),
1360    (0x68, "image_sample_cd"),
1361    (0x69, "image_sample_cd_cl"),
1362    (0x6a, "image_sample_c_cd"),
1363    (0x6b, "image_sample_c_cd_cl"),
1364    (0x6c, "image_sample_cd_o"),
1365    (0x6d, "image_sample_cd_cl_o"),
1366    (0x6e, "image_sample_c_cd_o"),
1367    (0x6f, "image_sample_c_cd_cl_o"),
1368 }
1369 # (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (code, code, code, code, code, name)
1370 for (code, name) in IMAGE_SAMPLE:
1371    opcode(name, code, code, Format.MIMG)
1372
1373 IMAGE_GATHER4 = {
1374    (0x40, "image_gather4"),
1375    (0x41, "image_gather4_cl"),
1376    #(0x42, "image_gather4h"), VEGA only?
1377    (0x44, "image_gather4_l"), # following instructions have different opcodes according to ISA sheet.
1378    (0x45, "image_gather4_b"),
1379    (0x46, "image_gather4_b_cl"),
1380    (0x47, "image_gather4_lz"),
1381    (0x48, "image_gather4_c"),
1382    (0x49, "image_gather4_c_cl"), # previous instructions have different opcodes according to ISA sheet.
1383    #(0x4a, "image_gather4h_pck"), VEGA only?
1384    #(0x4b, "image_gather8h_pck"), VGEA only?
1385    (0x4c, "image_gather4_c_l"),
1386    (0x4d, "image_gather4_c_b"),
1387    (0x4e, "image_gather4_c_b_cl"),
1388    (0x4f, "image_gather4_c_lz"),
1389    (0x50, "image_gather4_o"),
1390    (0x51, "image_gather4_cl_o"),
1391    (0x54, "image_gather4_l_o"),
1392    (0x55, "image_gather4_b_o"),
1393    (0x56, "image_gather4_b_cl_o"),
1394    (0x57, "image_gather4_lz_o"),
1395    (0x58, "image_gather4_c_o"),
1396    (0x59, "image_gather4_c_cl_o"),
1397    (0x5c, "image_gather4_c_l_o"),
1398    (0x5d, "image_gather4_c_b_o"),
1399    (0x5e, "image_gather4_c_b_cl_o"),
1400    (0x5f, "image_gather4_c_lz_o"),
1401 }
1402 # (gfx6, gfx7, gfx8, gfx9, gfx10, name) = (code, code, code, code, code, name)
1403 for (code, name) in IMAGE_GATHER4:
1404    opcode(name, code, code, Format.MIMG)
1405
1406
1407 FLAT = {
1408    #GFX7, GFX8_9, GFX10
1409    (0x08, 0x10, 0x08, "flat_load_ubyte"),
1410    (0x09, 0x11, 0x09, "flat_load_sbyte"),
1411    (0x0a, 0x12, 0x0a, "flat_load_ushort"),
1412    (0x0b, 0x13, 0x0b, "flat_load_sshort"),
1413    (0x0c, 0x14, 0x0c, "flat_load_dword"),
1414    (0x0d, 0x15, 0x0d, "flat_load_dwordx2"),
1415    (0x0f, 0x16, 0x0f, "flat_load_dwordx3"),
1416    (0x0e, 0x17, 0x0e, "flat_load_dwordx4"),
1417    (0x18, 0x18, 0x18, "flat_store_byte"),
1418    (  -1, 0x19, 0x19, "flat_store_byte_d16_hi"),
1419    (0x1a, 0x1a, 0x1a, "flat_store_short"),
1420    (  -1, 0x1b, 0x1b, "flat_store_short_d16_hi"),
1421    (0x1c, 0x1c, 0x1c, "flat_store_dword"),
1422    (0x1d, 0x1d, 0x1d, "flat_store_dwordx2"),
1423    (0x1f, 0x1e, 0x1f, "flat_store_dwordx3"),
1424    (0x1e, 0x1f, 0x1e, "flat_store_dwordx4"),
1425    (  -1, 0x20, 0x20, "flat_load_ubyte_d16"),
1426    (  -1, 0x21, 0x21, "flat_load_ubyte_d16_hi"),
1427    (  -1, 0x22, 0x22, "flat_load_sbyte_d16"),
1428    (  -1, 0x23, 0x23, "flat_load_sbyte_d16_hi"),
1429    (  -1, 0x24, 0x24, "flat_load_short_d16"),
1430    (  -1, 0x25, 0x25, "flat_load_short_d16_hi"),
1431    (0x30, 0x40, 0x30, "flat_atomic_swap"),
1432    (0x31, 0x41, 0x31, "flat_atomic_cmpswap"),
1433    (0x32, 0x42, 0x32, "flat_atomic_add"),
1434    (0x33, 0x43, 0x33, "flat_atomic_sub"),
1435    (0x35, 0x44, 0x35, "flat_atomic_smin"),
1436    (0x36, 0x45, 0x36, "flat_atomic_umin"),
1437    (0x37, 0x46, 0x37, "flat_atomic_smax"),
1438    (0x38, 0x47, 0x38, "flat_atomic_umax"),
1439    (0x39, 0x48, 0x39, "flat_atomic_and"),
1440    (0x3a, 0x49, 0x3a, "flat_atomic_or"),
1441    (0x3b, 0x4a, 0x3b, "flat_atomic_xor"),
1442    (0x3c, 0x4b, 0x3c, "flat_atomic_inc"),
1443    (0x3d, 0x4c, 0x3d, "flat_atomic_dec"),
1444    (0x3e,   -1, 0x3e, "flat_atomic_fcmpswap"),
1445    (0x3f,   -1, 0x3f, "flat_atomic_fmin"),
1446    (0x40,   -1, 0x40, "flat_atomic_fmax"),
1447    (0x50, 0x60, 0x50, "flat_atomic_swap_x2"),
1448    (0x51, 0x61, 0x51, "flat_atomic_cmpswap_x2"),
1449    (0x52, 0x62, 0x52, "flat_atomic_add_x2"),
1450    (0x53, 0x63, 0x53, "flat_atomic_sub_x2"),
1451    (0x55, 0x64, 0x54, "flat_atomic_smin_x2"),
1452    (0x56, 0x65, 0x55, "flat_atomic_umin_x2"),
1453    (0x57, 0x66, 0x56, "flat_atomic_smax_x2"),
1454    (0x58, 0x67, 0x58, "flat_atomic_umax_x2"),
1455    (0x59, 0x68, 0x59, "flat_atomic_and_x2"),
1456    (0x5a, 0x69, 0x5a, "flat_atomic_or_x2"),
1457    (0x5b, 0x6a, 0x5b, "flat_atomic_xor_x2"),
1458    (0x5c, 0x6b, 0x5c, "flat_atomic_inc_x2"),
1459    (0x5d, 0x6c, 0x5d, "flat_atomic_dec_x2"),
1460    (0x5e,   -1, 0x5e, "flat_atomic_fcmpswap_x2"),
1461    (0x5f,   -1, 0x5f, "flat_atomic_fmin_x2"),
1462    (0x60,   -1, 0x60, "flat_atomic_fmax_x2"),
1463 }
1464 for (gfx7, gfx8, gfx10, name) in FLAT:
1465     opcode(name, gfx8, gfx10, Format.FLAT)
1466
1467 GLOBAL = {
1468    #GFX8_9, GFX10
1469    (0x10, 0x08, "global_load_ubyte"),
1470    (0x11, 0x09, "global_load_sbyte"),
1471    (0x12, 0x0a, "global_load_ushort"),
1472    (0x13, 0x0b, "global_load_sshort"),
1473    (0x14, 0x0c, "global_load_dword"),
1474    (0x15, 0x0d, "global_load_dwordx2"),
1475    (0x16, 0x0f, "global_load_dwordx3"),
1476    (0x17, 0x0e, "global_load_dwordx4"),
1477    (0x18, 0x18, "global_store_byte"),
1478    (0x19, 0x19, "global_store_byte_d16_hi"),
1479    (0x1a, 0x1a, "global_store_short"),
1480    (0x1b, 0x1b, "global_store_short_d16_hi"),
1481    (0x1c, 0x1c, "global_store_dword"),
1482    (0x1d, 0x1d, "global_store_dwordx2"),
1483    (0x1e, 0x1f, "global_store_dwordx3"),
1484    (0x1f, 0x1e, "global_store_dwordx4"),
1485    (0x20, 0x20, "global_load_ubyte_d16"),
1486    (0x21, 0x21, "global_load_ubyte_d16_hi"),
1487    (0x22, 0x22, "global_load_sbyte_d16"),
1488    (0x23, 0x23, "global_load_sbyte_d16_hi"),
1489    (0x24, 0x24, "global_load_short_d16"),
1490    (0x25, 0x25, "global_load_short_d16_hi"),
1491    (0x40, 0x30, "global_atomic_swap"),
1492    (0x41, 0x31, "global_atomic_cmpswap"),
1493    (0x42, 0x32, "global_atomic_add"),
1494    (0x43, 0x33, "global_atomic_sub"),
1495    (0x44, 0x35, "global_atomic_smin"),
1496    (0x45, 0x36, "global_atomic_umin"),
1497    (0x46, 0x37, "global_atomic_smax"),
1498    (0x47, 0x38, "global_atomic_umax"),
1499    (0x48, 0x39, "global_atomic_and"),
1500    (0x49, 0x3a, "global_atomic_or"),
1501    (0x4a, 0x3b, "global_atomic_xor"),
1502    (0x4b, 0x3c, "global_atomic_inc"),
1503    (0x4c, 0x3d, "global_atomic_dec"),
1504    (  -1, 0x3e, "global_atomic_fcmpswap"),
1505    (  -1, 0x3f, "global_atomic_fmin"),
1506    (  -1, 0x40, "global_atomic_fmax"),
1507    (0x60, 0x50, "global_atomic_swap_x2"),
1508    (0x61, 0x51, "global_atomic_cmpswap_x2"),
1509    (0x62, 0x52, "global_atomic_add_x2"),
1510    (0x63, 0x53, "global_atomic_sub_x2"),
1511    (0x64, 0x54, "global_atomic_smin_x2"),
1512    (0x65, 0x55, "global_atomic_umin_x2"),
1513    (0x66, 0x56, "global_atomic_smax_x2"),
1514    (0x67, 0x58, "global_atomic_umax_x2"),
1515    (0x68, 0x59, "global_atomic_and_x2"),
1516    (0x69, 0x5a, "global_atomic_or_x2"),
1517    (0x6a, 0x5b, "global_atomic_xor_x2"),
1518    (0x6b, 0x5c, "global_atomic_inc_x2"),
1519    (0x6c, 0x5d, "global_atomic_dec_x2"),
1520    (  -1, 0x5e, "global_atomic_fcmpswap_x2"),
1521    (  -1, 0x5f, "global_atomic_fmin_x2"),
1522    (  -1, 0x60, "global_atomic_fmax_x2"),
1523 }
1524 for (gfx8, gfx10, name) in GLOBAL:
1525     opcode(name, gfx8, gfx10, Format.GLOBAL)
1526
1527 SCRATCH = {
1528    #GFX8_9, GFX10
1529    (0x10, 0x08, "scratch_load_ubyte"),
1530    (0x11, 0x09, "scratch_load_sbyte"),
1531    (0x12, 0x0a, "scratch_load_ushort"),
1532    (0x13, 0x0b, "scratch_load_sshort"),
1533    (0x14, 0x0c, "scratch_load_dword"),
1534    (0x15, 0x0d, "scratch_load_dwordx2"),
1535    (0x16, 0x0f, "scratch_load_dwordx3"),
1536    (0x17, 0x0e, "scratch_load_dwordx4"),
1537    (0x18, 0x18, "scratch_store_byte"),
1538    (0x19, 0x19, "scratch_store_byte_d16_hi"),
1539    (0x1a, 0x1a, "scratch_store_short"),
1540    (0x1b, 0x1b, "scratch_store_short_d16_hi"),
1541    (0x1c, 0x1c, "scratch_store_dword"),
1542    (0x1d, 0x1d, "scratch_store_dwordx2"),
1543    (0x1e, 0x1f, "scratch_store_dwordx3"),
1544    (0x1f, 0x1e, "scratch_store_dwordx4"),
1545    (0x20, 0x20, "scratch_load_ubyte_d16"),
1546    (0x21, 0x21, "scratch_load_ubyte_d16_hi"),
1547    (0x22, 0x22, "scratch_load_sbyte_d16"),
1548    (0x23, 0x23, "scratch_load_sbyte_d16_hi"),
1549    (0x24, 0x24, "scratch_load_short_d16"),
1550    (0x25, 0x25, "scratch_load_short_d16_hi"),
1551 }
1552 for (gfx8, gfx10, name) in SCRATCH:
1553     opcode(name, gfx8, gfx10, Format.SCRATCH)
1554
1555 # check for duplicate opcode numbers
1556 for ver in ['gfx9', 'gfx10']:
1557     op_to_name = {}
1558     for op in opcodes.values():
1559         if op.format in [Format.PSEUDO, Format.PSEUDO_BRANCH, Format.PSEUDO_BARRIER, Format.PSEUDO_REDUCTION]:
1560             continue
1561
1562         num = getattr(op, 'opcode_' + ver)
1563         if num == -1:
1564             continue
1565
1566         key = (op.format, num)
1567
1568         if key in op_to_name:
1569             # exceptions
1570             names = set([op_to_name[key], op.name])
1571             if ver in ['gfx8', 'gfx9'] and names == set(['v_mul_lo_i32', 'v_mul_lo_u32']):
1572                 continue
1573
1574             print('%s and %s share the same opcode number (%s)' % (op_to_name[key], op.name, ver))
1575             sys.exit(1)
1576         else:
1577             op_to_name[key] = op.name