src/amd/compiler/aco_opt_value_numbering.cpp

   1 /*
   2  * Copyright © 2018 Valve Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  */
  24
  25 #include <map>
  26 #include <unordered_map>
  27 #include "aco_ir.h"
  28
  29 /*
  30  * Implements the algorithm for dominator-tree value numbering
  31  * from "Value Numbering" by Briggs, Cooper, and Simpson.
  32  */
  33
  34 namespace aco {
  35 namespace {
  36
  37 struct InstrHash {
  38    std::size_t operator()(Instruction* instr) const
  39    {
  40       uint64_t hash = (uint64_t) instr->opcode + (uint64_t) instr->format;
  41       for (unsigned i = 0; i < instr->operands.size(); i++) {
  42          Operand op = instr->operands[i];
  43          uint64_t val = op.isTemp() ? op.tempId() : op.isFixed() ? op.physReg() : op.constantValue();
  44          hash |= val << (i+1) * 8;
  45       }
  46       if (instr->isVOP3()) {
  47          VOP3A_instruction* vop3 = static_cast<VOP3A_instruction*>(instr);
  48          for (unsigned i = 0; i < 3; i++) {
  49             hash ^= vop3->abs[i] << (i*3 + 0);
  50             hash ^= vop3->opsel[i] << (i*3 + 1);
  51             hash ^= vop3->neg[i] << (i*3 + 2);
  52          }
  53          hash ^= (vop3->clamp << 28) * 13;
  54          hash += vop3->omod << 19;
  55       }
  56       switch (instr->format) {
  57       case Format::SMEM:
  58          break;
  59       case Format::VINTRP: {
  60          Interp_instruction* interp = static_cast<Interp_instruction*>(instr);
  61          hash ^= interp->attribute << 13;
  62          hash ^= interp->component << 27;
  63          break;
  64       }
  65       case Format::DS:
  66          break;
  67       default:
  68          break;
  69       }
  70
  71       return hash;
  72    }
  73 };
  74
  75 struct InstrPred {
  76    bool operator()(Instruction* a, Instruction* b) const
  77    {
  78       if (a->format != b->format)
  79          return false;
  80       if (a->opcode != b->opcode)
  81          return false;
  82       if (a->operands.size() != b->operands.size() || a->definitions.size() != b->definitions.size())
  83          return false; /* possible with pseudo-instructions */
  84       for (unsigned i = 0; i < a->operands.size(); i++) {
  85          if (a->operands[i].isConstant()) {
  86             if (!b->operands[i].isConstant())
  87                return false;
  88             if (a->operands[i].constantValue() != b->operands[i].constantValue())
  89                return false;
  90          }
  91          else if (a->operands[i].isTemp()) {
  92             if (!b->operands[i].isTemp())
  93                return false;
  94             if (a->operands[i].tempId() != b->operands[i].tempId())
  95                return false;
  96          }
  97          else if (a->operands[i].isUndefined() ^ b->operands[i].isUndefined())
  98             return false;
  99          if (a->operands[i].isFixed()) {
 100             if (!b->operands[i].isFixed())
 101                return false;
 102             if (a->operands[i].physReg() != b->operands[i].physReg())
 103                return false;
 104             if (a->operands[i].physReg() == exec && a->pass_flags != b->pass_flags)
 105                return false;
 106          }
 107       }
 108       for (unsigned i = 0; i < a->definitions.size(); i++) {
 109          if (a->definitions[i].isTemp()) {
 110             if (!b->definitions[i].isTemp())
 111                return false;
 112             if (a->definitions[i].regClass() != b->definitions[i].regClass())
 113                return false;
 114          }
 115          if (a->definitions[i].isFixed()) {
 116             if (!b->definitions[i].isFixed())
 117                return false;
 118             if (a->definitions[i].physReg() != b->definitions[i].physReg())
 119                return false;
 120             if (a->definitions[i].physReg() == exec)
 121                return false;
 122          }
 123       }
 124
 125       if (a->opcode == aco_opcode::v_readfirstlane_b32)
 126          return a->pass_flags == b->pass_flags;
 127
 128       /* The results of VOPC depend on the exec mask if used for subgroup operations. */
 129       if ((uint32_t) a->format & (uint32_t) Format::VOPC && a->pass_flags != b->pass_flags)
 130          return false;
 131       if (a->format == Format::PSEUDO_BRANCH)
 132          return false;
 133       if (a->isVOP3()) {
 134          VOP3A_instruction* a3 = static_cast<VOP3A_instruction*>(a);
 135          VOP3A_instruction* b3 = static_cast<VOP3A_instruction*>(b);
 136          for (unsigned i = 0; i < 3; i++) {
 137             if (a3->abs[i] != b3->abs[i] ||
 138                 a3->opsel[i] != b3->opsel[i] ||
 139                 a3->neg[i] != b3->neg[i])
 140                return false;
 141          }
 142          return a3->clamp == b3->clamp &&
 143                 a3->omod == b3->omod;
 144       }
 145       if (a->isDPP()) {
 146          DPP_instruction* aDPP = static_cast<DPP_instruction*>(a);
 147          DPP_instruction* bDPP = static_cast<DPP_instruction*>(b);
 148          return aDPP->dpp_ctrl == bDPP->dpp_ctrl &&
 149                 aDPP->bank_mask == bDPP->bank_mask &&
 150                 aDPP->row_mask == bDPP->row_mask &&
 151                 aDPP->bound_ctrl == bDPP->bound_ctrl &&
 152                 aDPP->abs[0] == bDPP->abs[0] &&
 153                 aDPP->abs[1] == bDPP->abs[1] &&
 154                 aDPP->neg[0] == bDPP->neg[0] &&
 155                 aDPP->neg[1] == bDPP->neg[1];
 156       }
 157       switch (a->format) {
 158          case Format::SOPK: {
 159             SOPK_instruction* aK = static_cast<SOPK_instruction*>(a);
 160             SOPK_instruction* bK = static_cast<SOPK_instruction*>(b);
 161             return aK->imm == bK->imm;
 162          }
 163          case Format::SMEM: {
 164             SMEM_instruction* aS = static_cast<SMEM_instruction*>(a);
 165             SMEM_instruction* bS = static_cast<SMEM_instruction*>(b);
 166             return aS->can_reorder && bS->can_reorder &&
 167                    aS->glc == bS->glc && aS->nv == bS->nv;
 168          }
 169          case Format::VINTRP: {
 170             Interp_instruction* aI = static_cast<Interp_instruction*>(a);
 171             Interp_instruction* bI = static_cast<Interp_instruction*>(b);
 172             if (aI->attribute != bI->attribute)
 173                return false;
 174             if (aI->component != bI->component)
 175                return false;
 176             return true;
 177          }
 178          case Format::PSEUDO_REDUCTION: {
 179             Pseudo_reduction_instruction *aR = static_cast<Pseudo_reduction_instruction*>(a);
 180             Pseudo_reduction_instruction *bR = static_cast<Pseudo_reduction_instruction*>(b);
 181             return aR->pass_flags == bR->pass_flags &&
 182                    aR->reduce_op == bR->reduce_op &&
 183                    aR->cluster_size == bR->cluster_size;
 184          }
 185          case Format::MTBUF: {
 186             /* this is fine since they are only used for vertex input fetches */
 187             MTBUF_instruction* aM = static_cast<MTBUF_instruction *>(a);
 188             MTBUF_instruction* bM = static_cast<MTBUF_instruction *>(b);
 189             return aM->can_reorder == bM->can_reorder &&
 190                    aM->barrier == bM->barrier &&
 191                    aM->dfmt == bM->dfmt &&
 192                    aM->nfmt == bM->nfmt &&
 193                    aM->offset == bM->offset &&
 194                    aM->offen == bM->offen &&
 195                    aM->idxen == bM->idxen &&
 196                    aM->glc == bM->glc &&
 197                    aM->slc == bM->slc &&
 198                    aM->tfe == bM->tfe &&
 199                    aM->disable_wqm == bM->disable_wqm;
 200          }
 201          /* we want to optimize these in NIR and don't hassle with load-store dependencies */
 202          case Format::MUBUF:
 203          case Format::FLAT:
 204          case Format::GLOBAL:
 205          case Format::SCRATCH:
 206             return false;
 207          case Format::DS: {
 208             if (a->opcode != aco_opcode::ds_bpermute_b32 &&
 209                 a->opcode != aco_opcode::ds_permute_b32 &&
 210                 a->opcode != aco_opcode::ds_swizzle_b32)
 211                return false;
 212             DS_instruction* aD = static_cast<DS_instruction *>(a);
 213             DS_instruction* bD = static_cast<DS_instruction *>(b);
 214             return aD->pass_flags == bD->pass_flags &&
 215                    aD->gds == bD->gds &&
 216                    aD->offset0 == bD->offset0 &&
 217                    aD->offset1 == bD->offset1;
 218          }
 219          case Format::MIMG: {
 220             MIMG_instruction* aM = static_cast<MIMG_instruction*>(a);
 221             MIMG_instruction* bM = static_cast<MIMG_instruction*>(b);
 222             return aM->can_reorder && bM->can_reorder &&
 223                    aM->barrier == bM->barrier &&
 224                    aM->dmask == bM->dmask &&
 225                    aM->unrm == bM->unrm &&
 226                    aM->glc == bM->glc &&
 227                    aM->slc == bM->slc &&
 228                    aM->tfe == bM->tfe &&
 229                    aM->da == bM->da &&
 230                    aM->lwe == bM->lwe &&
 231                    aM->r128 == bM->r128 &&
 232                    aM->a16 == bM->a16 &&
 233                    aM->d16 == bM->d16 &&
 234                    aM->disable_wqm == bM->disable_wqm;
 235          }
 236          default:
 237             return true;
 238       }
 239    }
 240 };
 241
 242 using expr_set = std::unordered_map<Instruction*, uint32_t, InstrHash, InstrPred>;
 243
 244 struct vn_ctx {
 245    Program* program;
 246    expr_set expr_values;
 247    std::map<uint32_t, Temp> renames;
 248
 249    /* The exec id should be the same on the same level of control flow depth.
 250     * Together with the check for dominator relations, it is safe to assume
 251     * that the same exec_id also means the same execution mask.
 252     * Discards increment the exec_id, so that it won't return to the previous value.
 253     */
 254    uint32_t exec_id = 1;
 255
 256    vn_ctx(Program* program) : program(program) {}
 257 };
 258
 259 bool dominates(vn_ctx& ctx, uint32_t parent, uint32_t child)
 260 {
 261    while (parent < child)
 262       child = ctx.program->blocks[child].logical_idom;
 263
 264    return parent == child;
 265 }
 266
 267 void process_block(vn_ctx& ctx, Block& block)
 268 {
 269    std::vector<aco_ptr<Instruction>> new_instructions;
 270    new_instructions.reserve(block.instructions.size());
 271
 272    for (aco_ptr<Instruction>& instr : block.instructions) {
 273       /* first, rename operands */
 274       for (Operand& op : instr->operands) {
 275          if (!op.isTemp())
 276             continue;
 277          auto it = ctx.renames.find(op.tempId());
 278          if (it != ctx.renames.end())
 279             op.setTemp(it->second);
 280       }
 281
 282       if (instr->definitions.empty() || instr->opcode == aco_opcode::p_phi || instr->opcode == aco_opcode::p_linear_phi) {
 283          new_instructions.emplace_back(std::move(instr));
 284          continue;
 285       }
 286
 287       /* simple copy-propagation through renaming */
 288       if ((instr->opcode == aco_opcode::s_mov_b32 || instr->opcode == aco_opcode::s_mov_b64 || instr->opcode == aco_opcode::v_mov_b32) &&
 289           !instr->definitions[0].isFixed() && instr->operands[0].isTemp() && instr->operands[0].regClass() == instr->definitions[0].regClass() &&
 290           !instr->isDPP() && !((int)instr->format & (int)Format::SDWA)) {
 291          ctx.renames[instr->definitions[0].tempId()] = instr->operands[0].getTemp();
 292       }
 293
 294       if (instr->opcode == aco_opcode::p_discard_if ||
 295           instr->opcode == aco_opcode::p_demote_to_helper)
 296          ctx.exec_id++;
 297
 298       instr->pass_flags = ctx.exec_id;
 299       std::pair<expr_set::iterator, bool> res = ctx.expr_values.emplace(instr.get(), block.index);
 300
 301       /* if there was already an expression with the same value number */
 302       if (!res.second) {
 303          Instruction* orig_instr = res.first->first;
 304          assert(instr->definitions.size() == orig_instr->definitions.size());
 305          /* check if the original instruction dominates the current one */
 306          if (dominates(ctx, res.first->second, block.index)) {
 307             for (unsigned i = 0; i < instr->definitions.size(); i++) {
 308                assert(instr->definitions[i].regClass() == orig_instr->definitions[i].regClass());
 309                ctx.renames[instr->definitions[i].tempId()] = orig_instr->definitions[i].getTemp();
 310             }
 311          } else {
 312             ctx.expr_values.erase(res.first);
 313             ctx.expr_values.emplace(instr.get(), block.index);
 314             new_instructions.emplace_back(std::move(instr));
 315          }
 316       } else {
 317          new_instructions.emplace_back(std::move(instr));
 318       }
 319    }
 320
 321    block.instructions = std::move(new_instructions);
 322 }
 323
 324 void rename_phi_operands(Block& block, std::map<uint32_t, Temp>& renames)
 325 {
 326    for (aco_ptr<Instruction>& phi : block.instructions) {
 327       if (phi->opcode != aco_opcode::p_phi && phi->opcode != aco_opcode::p_linear_phi)
 328          break;
 329
 330       for (Operand& op : phi->operands) {
 331          if (!op.isTemp())
 332             continue;
 333          auto it = renames.find(op.tempId());
 334          if (it != renames.end())
 335             op.setTemp(it->second);
 336       }
 337    }
 338 }
 339 } /* end namespace */
 340
 341
 342 void value_numbering(Program* program)
 343 {
 344    vn_ctx ctx(program);
 345    std::vector<unsigned> loop_headers;
 346
 347    for (Block& block : program->blocks) {
 348       assert(ctx.exec_id > 0);
 349       /* decrement exec_id when leaving nested control flow */
 350       if (block.kind & block_kind_loop_header)
 351          loop_headers.push_back(block.index);
 352       if (block.kind & block_kind_merge) {
 353          ctx.exec_id--;
 354       } else if (block.kind & block_kind_loop_exit) {
 355          ctx.exec_id -= program->blocks[loop_headers.back()].logical_preds.size();
 356          ctx.exec_id -= block.logical_preds.size();
 357          loop_headers.pop_back();
 358       }
 359
 360       if (block.logical_idom != -1)
 361          process_block(ctx, block);
 362       else
 363          rename_phi_operands(block, ctx.renames);
 364
 365       /* increment exec_id when entering nested control flow */
 366       if (block.kind & block_kind_branch ||
 367           block.kind & block_kind_loop_preheader ||
 368           block.kind & block_kind_break ||
 369           block.kind & block_kind_continue)
 370          ctx.exec_id++;
 371       else if (block.kind & block_kind_continue_or_break)
 372          ctx.exec_id += 2;
 373    }
 374
 375    /* rename loop header phi operands */
 376    for (Block& block : program->blocks) {
 377       if (block.kind & block_kind_loop_header)
 378          rename_phi_operands(block, ctx.renames);
 379    }
 380 }
 381
 382 }