2 * Copyright © 2018 Valve Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
26 #include <unordered_set>
31 * Implements the algorithm for dominator-tree value numbering
32 * from "Value Numbering" by Briggs, Cooper, and Simpson.
39 std::size_t operator()(Instruction
* instr
) const
41 uint64_t hash
= (uint64_t) instr
->opcode
+ (uint64_t) instr
->format
;
42 for (unsigned i
= 0; i
< instr
->operands
.size(); i
++) {
43 Operand op
= instr
->operands
[i
];
44 uint64_t val
= op
.isTemp() ? op
.tempId() : op
.isFixed() ? op
.physReg() : op
.constantValue();
45 hash
|= val
<< (i
+1) * 8;
47 if (instr
->isVOP3()) {
48 VOP3A_instruction
* vop3
= static_cast<VOP3A_instruction
*>(instr
);
49 for (unsigned i
= 0; i
< 3; i
++) {
50 hash
^= vop3
->abs
[i
] << (i
*3 + 0);
51 hash
^= vop3
->opsel
[i
] << (i
*3 + 1);
52 hash
^= vop3
->neg
[i
] << (i
*3 + 2);
54 hash
^= (vop3
->clamp
<< 28) * 13;
55 hash
+= vop3
->omod
<< 19;
57 switch (instr
->format
) {
60 case Format::VINTRP
: {
61 Interp_instruction
* interp
= static_cast<Interp_instruction
*>(instr
);
62 hash
^= interp
->attribute
<< 13;
63 hash
^= interp
->component
<< 27;
77 bool operator()(Instruction
* a
, Instruction
* b
) const
79 if (a
->format
!= b
->format
)
81 if (a
->opcode
!= b
->opcode
)
83 if (a
->operands
.size() != b
->operands
.size() || a
->definitions
.size() != b
->definitions
.size())
84 return false; /* possible with pseudo-instructions */
85 /* We can't value number v_readlane_b32 across control flow or discards
86 * because of the possibility of live-range splits.
87 * We can't value number permutes for the same reason as
88 * v_readlane_b32 and because discards affect the result */
89 if (a
->opcode
== aco_opcode::v_readfirstlane_b32
|| a
->opcode
== aco_opcode::v_readlane_b32
||
90 a
->opcode
== aco_opcode::ds_bpermute_b32
|| a
->opcode
== aco_opcode::ds_permute_b32
||
91 a
->opcode
== aco_opcode::ds_swizzle_b32
|| a
->format
== Format::PSEUDO_REDUCTION
) {
92 if (a
->pass_flags
!= b
->pass_flags
)
95 for (unsigned i
= 0; i
< a
->operands
.size(); i
++) {
96 if (a
->operands
[i
].isConstant()) {
97 if (!b
->operands
[i
].isConstant())
99 if (a
->operands
[i
].constantValue() != b
->operands
[i
].constantValue())
102 else if (a
->operands
[i
].isTemp()) {
103 if (!b
->operands
[i
].isTemp())
105 if (a
->operands
[i
].tempId() != b
->operands
[i
].tempId())
108 else if (a
->operands
[i
].isUndefined() ^ b
->operands
[i
].isUndefined())
110 if (a
->operands
[i
].isFixed()) {
111 if (a
->operands
[i
].physReg() == exec
)
113 if (!b
->operands
[i
].isFixed())
115 if (!(a
->operands
[i
].physReg() == b
->operands
[i
].physReg()))
119 for (unsigned i
= 0; i
< a
->definitions
.size(); i
++) {
120 if (a
->definitions
[i
].isTemp()) {
121 if (!b
->definitions
[i
].isTemp())
123 if (a
->definitions
[i
].regClass() != b
->definitions
[i
].regClass())
126 if (a
->definitions
[i
].isFixed()) {
127 if (!b
->definitions
[i
].isFixed())
129 if (!(a
->definitions
[i
].physReg() == b
->definitions
[i
].physReg()))
133 if (a
->format
== Format::PSEUDO_BRANCH
)
136 VOP3A_instruction
* a3
= static_cast<VOP3A_instruction
*>(a
);
137 VOP3A_instruction
* b3
= static_cast<VOP3A_instruction
*>(b
);
138 for (unsigned i
= 0; i
< 3; i
++) {
139 if (a3
->abs
[i
] != b3
->abs
[i
] ||
140 a3
->opsel
[i
] != b3
->opsel
[i
] ||
141 a3
->neg
[i
] != b3
->neg
[i
])
144 return a3
->clamp
== b3
->clamp
&&
145 a3
->omod
== b3
->omod
;
148 DPP_instruction
* aDPP
= static_cast<DPP_instruction
*>(a
);
149 DPP_instruction
* bDPP
= static_cast<DPP_instruction
*>(b
);
150 return aDPP
->dpp_ctrl
== bDPP
->dpp_ctrl
&&
151 aDPP
->bank_mask
== bDPP
->bank_mask
&&
152 aDPP
->row_mask
== bDPP
->row_mask
&&
153 aDPP
->bound_ctrl
== bDPP
->bound_ctrl
&&
154 aDPP
->abs
[0] == bDPP
->abs
[0] &&
155 aDPP
->abs
[1] == bDPP
->abs
[1] &&
156 aDPP
->neg
[0] == bDPP
->neg
[0] &&
157 aDPP
->neg
[1] == bDPP
->neg
[1];
161 /* Since the results depend on the exec mask, these shouldn't
162 * be value numbered (this is especially useful for subgroupBallot()). */
166 SOPK_instruction
* aK
= static_cast<SOPK_instruction
*>(a
);
167 SOPK_instruction
* bK
= static_cast<SOPK_instruction
*>(b
);
168 return aK
->imm
== bK
->imm
;
171 SMEM_instruction
* aS
= static_cast<SMEM_instruction
*>(a
);
172 SMEM_instruction
* bS
= static_cast<SMEM_instruction
*>(b
);
173 return aS
->can_reorder
&& bS
->can_reorder
&&
174 aS
->glc
== bS
->glc
&& aS
->nv
== bS
->nv
;
176 case Format::VINTRP
: {
177 Interp_instruction
* aI
= static_cast<Interp_instruction
*>(a
);
178 Interp_instruction
* bI
= static_cast<Interp_instruction
*>(b
);
179 if (aI
->attribute
!= bI
->attribute
)
181 if (aI
->component
!= bI
->component
)
185 case Format::PSEUDO_REDUCTION
: {
186 Pseudo_reduction_instruction
*aR
= static_cast<Pseudo_reduction_instruction
*>(a
);
187 Pseudo_reduction_instruction
*bR
= static_cast<Pseudo_reduction_instruction
*>(b
);
188 return aR
->reduce_op
== bR
->reduce_op
&& aR
->cluster_size
== bR
->cluster_size
;
190 case Format::MTBUF
: {
191 /* this is fine since they are only used for vertex input fetches */
192 MTBUF_instruction
* aM
= static_cast<MTBUF_instruction
*>(a
);
193 MTBUF_instruction
* bM
= static_cast<MTBUF_instruction
*>(b
);
194 return aM
->dfmt
== bM
->dfmt
&&
195 aM
->nfmt
== bM
->nfmt
&&
196 aM
->offset
== bM
->offset
&&
197 aM
->offen
== bM
->offen
&&
198 aM
->idxen
== bM
->idxen
&&
199 aM
->glc
== bM
->glc
&&
200 aM
->slc
== bM
->slc
&&
201 aM
->tfe
== bM
->tfe
&&
202 aM
->disable_wqm
== bM
->disable_wqm
;
204 /* we want to optimize these in NIR and don't hassle with load-store dependencies */
208 case Format::SCRATCH
:
211 /* we already handle potential issue with permute/swizzle above */
212 DS_instruction
* aD
= static_cast<DS_instruction
*>(a
);
213 DS_instruction
* bD
= static_cast<DS_instruction
*>(b
);
214 if (a
->opcode
!= aco_opcode::ds_bpermute_b32
&&
215 a
->opcode
!= aco_opcode::ds_permute_b32
&&
216 a
->opcode
!= aco_opcode::ds_swizzle_b32
)
218 return aD
->gds
== bD
->gds
&& aD
->offset0
== bD
->offset0
&& aD
->offset1
== bD
->offset1
;
221 MIMG_instruction
* aM
= static_cast<MIMG_instruction
*>(a
);
222 MIMG_instruction
* bM
= static_cast<MIMG_instruction
*>(b
);
223 return aM
->can_reorder
&& bM
->can_reorder
&&
224 aM
->dmask
== bM
->dmask
&&
225 aM
->unrm
== bM
->unrm
&&
226 aM
->glc
== bM
->glc
&&
227 aM
->slc
== bM
->slc
&&
228 aM
->tfe
== bM
->tfe
&&
230 aM
->lwe
== bM
->lwe
&&
231 aM
->r128
== bM
->r128
&&
232 aM
->a16
== bM
->a16
&&
233 aM
->d16
== bM
->d16
&&
234 aM
->disable_wqm
== bM
->disable_wqm
;
243 typedef std::unordered_set
<Instruction
*, InstrHash
, InstrPred
> expr_set
;
245 void process_block(Block
& block
,
246 expr_set
& expr_values
,
247 std::map
<uint32_t, Temp
>& renames
,
251 std::vector
<aco_ptr
<Instruction
>>::iterator it
= block
.instructions
.begin();
252 std::vector
<aco_ptr
<Instruction
>> new_instructions
;
253 new_instructions
.reserve(block
.instructions
.size());
256 while (it
!= block
.instructions
.end()) {
257 aco_ptr
<Instruction
>& instr
= *it
;
258 /* first, rename operands */
259 for (Operand
& op
: instr
->operands
) {
262 auto it
= renames
.find(op
.tempId());
263 if (it
!= renames
.end())
264 op
.setTemp(it
->second
);
267 if (instr
->definitions
.empty() || !run
) {
268 if (instr
->opcode
== aco_opcode::p_logical_start
)
270 else if (instr
->opcode
== aco_opcode::p_logical_end
)
272 else if (instr
->opcode
== aco_opcode::p_phi
|| instr
->opcode
== aco_opcode::p_linear_phi
) {
273 std::pair
<expr_set::iterator
, bool> res
= phi_values
.emplace(instr
.get());
275 Instruction
* orig_phi
= *(res
.first
);
276 renames
.emplace(instr
->definitions
[0].tempId(), orig_phi
->definitions
[0].getTemp()).second
;
281 new_instructions
.emplace_back(std::move(instr
));
286 /* simple copy-propagation through renaming */
287 if ((instr
->opcode
== aco_opcode::s_mov_b32
|| instr
->opcode
== aco_opcode::s_mov_b64
|| instr
->opcode
== aco_opcode::v_mov_b32
) &&
288 !instr
->definitions
[0].isFixed() && instr
->operands
[0].isTemp() && instr
->operands
[0].regClass() == instr
->definitions
[0].regClass() &&
289 !instr
->isDPP() && !((int)instr
->format
& (int)Format::SDWA
)) {
290 renames
[instr
->definitions
[0].tempId()] = instr
->operands
[0].getTemp();
293 if (instr
->opcode
== aco_opcode::p_discard_if
||
294 instr
->opcode
== aco_opcode::p_demote_to_helper
)
297 instr
->pass_flags
= *exec_id
;
299 std::pair
<expr_set::iterator
, bool> res
= expr_values
.emplace(instr
.get());
301 /* if there was already an expression with the same value number */
303 Instruction
* orig_instr
= *(res
.first
);
304 assert(instr
->definitions
.size() == orig_instr
->definitions
.size());
305 for (unsigned i
= 0; i
< instr
->definitions
.size(); i
++) {
306 assert(instr
->definitions
[i
].regClass() == orig_instr
->definitions
[i
].regClass());
307 renames
.emplace(instr
->definitions
[i
].tempId(), orig_instr
->definitions
[i
].getTemp()).second
;
310 new_instructions
.emplace_back(std::move(instr
));
315 block
.instructions
.swap(new_instructions
);
318 void rename_phi_operands(Block
& block
, std::map
<uint32_t, Temp
>& renames
)
320 for (aco_ptr
<Instruction
>& phi
: block
.instructions
) {
321 if (phi
->opcode
!= aco_opcode::p_phi
&& phi
->opcode
!= aco_opcode::p_linear_phi
)
324 for (Operand
& op
: phi
->operands
) {
327 auto it
= renames
.find(op
.tempId());
328 if (it
!= renames
.end())
329 op
.setTemp(it
->second
);
333 } /* end namespace */
336 void value_numbering(Program
* program
)
338 std::vector
<expr_set
> expr_values(program
->blocks
.size());
339 std::map
<uint32_t, Temp
> renames
;
340 uint32_t exec_id
= 0;
342 for (Block
& block
: program
->blocks
) {
343 if (block
.logical_idom
!= -1) {
344 /* initialize expr_values from idom */
345 expr_values
[block
.index
] = expr_values
[block
.logical_idom
];
346 process_block(block
, expr_values
[block
.index
], renames
, &exec_id
);
349 process_block(block
, empty
, renames
, &exec_id
);
354 for (Block
& block
: program
->blocks
)
355 rename_phi_operands(block
, renames
);