src/amd/compiler/aco_print_ir.cpp

   1 #include "aco_ir.h"
   2 #include "aco_builder.h"
   3
   4 #include "sid.h"
   5 #include "ac_shader_util.h"
   6
   7 namespace aco {
   8
   9 static const char *reduce_ops[] = {
  10    [iadd32] = "iadd32",
  11    [iadd64] = "iadd64",
  12    [imul32] = "imul32",
  13    [imul64] = "imul64",
  14    [fadd32] = "fadd32",
  15    [fadd64] = "fadd64",
  16    [fmul32] = "fmul32",
  17    [fmul64] = "fmul64",
  18    [imin32] = "imin32",
  19    [imin64] = "imin64",
  20    [imax32] = "imax32",
  21    [imax64] = "imax64",
  22    [umin32] = "umin32",
  23    [umin64] = "umin64",
  24    [umax32] = "umax32",
  25    [umax64] = "umax64",
  26    [fmin32] = "fmin32",
  27    [fmin64] = "fmin64",
  28    [fmax32] = "fmax32",
  29    [fmax64] = "fmax64",
  30    [iand32] = "iand32",
  31    [iand64] = "iand64",
  32    [ior32] = "ior32",
  33    [ior64] = "ior64",
  34    [ixor32] = "ixor32",
  35    [ixor64] = "ixor64",
  36 };
  37
  38 static void print_reg_class(const RegClass rc, FILE *output)
  39 {
  40    switch (rc) {
  41       case RegClass::s1: fprintf(output, " s1: "); return;
  42       case RegClass::s2: fprintf(output, " s2: "); return;
  43       case RegClass::s3: fprintf(output, " s3: "); return;
  44       case RegClass::s4: fprintf(output, " s4: "); return;
  45       case RegClass::s6: fprintf(output, " s6: "); return;
  46       case RegClass::s8: fprintf(output, " s8: "); return;
  47       case RegClass::s16: fprintf(output, "s16: "); return;
  48       case RegClass::v1: fprintf(output, " v1: "); return;
  49       case RegClass::v2: fprintf(output, " v2: "); return;
  50       case RegClass::v3: fprintf(output, " v3: "); return;
  51       case RegClass::v4: fprintf(output, " v4: "); return;
  52       case RegClass::v5: fprintf(output, " v5: "); return;
  53       case RegClass::v6: fprintf(output, " v6: "); return;
  54       case RegClass::v7: fprintf(output, " v7: "); return;
  55       case RegClass::v8: fprintf(output, " v8: "); return;
  56       case RegClass::v1_linear: fprintf(output, " v1: "); return;
  57       case RegClass::v2_linear: fprintf(output, " v2: "); return;
  58    }
  59 }
  60
  61 void print_physReg(unsigned reg, unsigned size, FILE *output)
  62 {
  63    if (reg == 124) {
  64       fprintf(output, ":m0");
  65    } else if (reg == 106) {
  66       fprintf(output, ":vcc");
  67    } else if (reg == 253) {
  68       fprintf(output, ":scc");
  69    } else if (reg == 126) {
  70       fprintf(output, ":exec");
  71    } else {
  72       bool is_vgpr = reg / 256;
  73       reg = reg % 256;
  74       fprintf(output, ":%c[%d", is_vgpr ? 'v' : 's', reg);
  75       if (size > 1)
  76          fprintf(output, "-%d]", reg + size -1);
  77       else
  78          fprintf(output, "]");
  79    }
  80 }
  81
  82 static void print_constant(uint8_t reg, FILE *output)
  83 {
  84    if (reg >= 128 && reg <= 192) {
  85       fprintf(output, "%d", reg - 128);
  86       return;
  87    } else if (reg >= 192 && reg <= 208) {
  88       fprintf(output, "%d", 192 - reg);
  89       return;
  90    }
  91
  92    switch (reg) {
  93    case 240:
  94       fprintf(output, "0.5");
  95       break;
  96    case 241:
  97       fprintf(output, "-0.5");
  98       break;
  99    case 242:
 100       fprintf(output, "1.0");
 101       break;
 102    case 243:
 103       fprintf(output, "-1.0");
 104       break;
 105    case 244:
 106       fprintf(output, "2.0");
 107       break;
 108    case 245:
 109       fprintf(output, "-2.0");
 110       break;
 111    case 246:
 112       fprintf(output, "4.0");
 113       break;
 114    case 247:
 115       fprintf(output, "-4.0");
 116       break;
 117    case 248:
 118       fprintf(output, "1/(2*PI)");
 119       break;
 120    }
 121 }
 122
 123 static void print_operand(const Operand *operand, FILE *output)
 124 {
 125    if (operand->isLiteral()) {
 126       fprintf(output, "0x%x", operand->constantValue());
 127    } else if (operand->isConstant()) {
 128       print_constant(operand->physReg().reg, output);
 129    } else if (operand->isUndefined()) {
 130       print_reg_class(operand->regClass(), output);
 131       fprintf(output, "undef");
 132    } else {
 133       fprintf(output, "%%%d", operand->tempId());
 134
 135       if (operand->isFixed())
 136          print_physReg(operand->physReg(), operand->size(), output);
 137    }
 138 }
 139
 140 static void print_definition(const Definition *definition, FILE *output)
 141 {
 142    print_reg_class(definition->regClass(), output);
 143    fprintf(output, "%%%d", definition->tempId());
 144
 145    if (definition->isFixed())
 146       print_physReg(definition->physReg(), definition->size(), output);
 147 }
 148
 149 static void print_barrier_reorder(bool can_reorder, barrier_interaction barrier, FILE *output)
 150 {
 151    if (can_reorder)
 152       fprintf(output, " reorder");
 153
 154    if (barrier & barrier_buffer)
 155       fprintf(output, " buffer");
 156    if (barrier & barrier_image)
 157       fprintf(output, " image");
 158    if (barrier & barrier_atomic)
 159       fprintf(output, " atomic");
 160    if (barrier & barrier_shared)
 161       fprintf(output, " shared");
 162 }
 163
 164 static void print_instr_format_specific(struct Instruction *instr, FILE *output)
 165 {
 166    switch (instr->format) {
 167    case Format::SOPK: {
 168       SOPK_instruction* sopk = static_cast<SOPK_instruction*>(instr);
 169       fprintf(output, " imm:%d", sopk->imm & 0x8000 ? (sopk->imm - 65536) : sopk->imm);
 170       break;
 171    }
 172    case Format::SOPP: {
 173       SOPP_instruction* sopp = static_cast<SOPP_instruction*>(instr);
 174       uint16_t imm = sopp->imm;
 175       switch (instr->opcode) {
 176       case aco_opcode::s_waitcnt: {
 177          /* we usually should check the chip class for vmcnt/lgkm, but
 178           * insert_waitcnt() should fill it in regardless. */
 179          unsigned vmcnt = (imm & 0xF) | ((imm & (0x3 << 14)) >> 10);
 180          if (vmcnt != 63) fprintf(output, " vmcnt(%d)", vmcnt);
 181          if (((imm >> 4) & 0x7) < 0x7) fprintf(output, " expcnt(%d)", (imm >> 4) & 0x7);
 182          if (((imm >> 8) & 0x3F) < 0x3F) fprintf(output, " lgkmcnt(%d)", (imm >> 8) & 0x3F);
 183          break;
 184       }
 185       case aco_opcode::s_endpgm:
 186       case aco_opcode::s_endpgm_saved:
 187       case aco_opcode::s_endpgm_ordered_ps_done:
 188       case aco_opcode::s_wakeup:
 189       case aco_opcode::s_barrier:
 190       case aco_opcode::s_icache_inv:
 191       case aco_opcode::s_ttracedata:
 192       case aco_opcode::s_set_gpr_idx_off: {
 193          break;
 194       }
 195       case aco_opcode::s_sendmsg: {
 196          unsigned id = imm & sendmsg_id_mask;
 197          switch (id) {
 198          case sendmsg_none:
 199             fprintf(output, " sendmsg(MSG_NONE)");
 200             break;
 201          case _sendmsg_gs:
 202             fprintf(output, " sendmsg(gs%s%s, %u)",
 203                     imm & 0x10 ? ", cut" : "", imm & 0x20 ? ", emit" : "", imm >> 8);
 204             break;
 205          case _sendmsg_gs_done:
 206             fprintf(output, " sendmsg(gs_done%s%s, %u)",
 207                     imm & 0x10 ? ", cut" : "", imm & 0x20 ? ", emit" : "", imm >> 8);
 208             break;
 209          case sendmsg_save_wave:
 210             fprintf(output, " sendmsg(save_wave)");
 211             break;
 212          case sendmsg_stall_wave_gen:
 213             fprintf(output, " sendmsg(stall_wave_gen)");
 214             break;
 215          case sendmsg_halt_waves:
 216             fprintf(output, " sendmsg(halt_waves)");
 217             break;
 218          case sendmsg_ordered_ps_done:
 219             fprintf(output, " sendmsg(ordered_ps_done)");
 220             break;
 221          case sendmsg_early_prim_dealloc:
 222             fprintf(output, " sendmsg(early_prim_dealloc)");
 223             break;
 224          case sendmsg_gs_alloc_req:
 225             fprintf(output, " sendmsg(gs_alloc_req)");
 226             break;
 227          }
 228          break;
 229       }
 230       default: {
 231          if (imm)
 232             fprintf(output, " imm:%u", imm);
 233          break;
 234       }
 235       }
 236       if (sopp->block != -1)
 237          fprintf(output, " block:BB%d", sopp->block);
 238       break;
 239    }
 240    case Format::SMEM: {
 241       SMEM_instruction* smem = static_cast<SMEM_instruction*>(instr);
 242       if (smem->glc)
 243          fprintf(output, " glc");
 244       if (smem->dlc)
 245          fprintf(output, " dlc");
 246       if (smem->nv)
 247          fprintf(output, " nv");
 248       print_barrier_reorder(smem->can_reorder, smem->barrier, output);
 249       break;
 250    }
 251    case Format::VINTRP: {
 252       Interp_instruction* vintrp = static_cast<Interp_instruction*>(instr);
 253       fprintf(output, " attr%d.%c", vintrp->attribute, "xyzw"[vintrp->component]);
 254       break;
 255    }
 256    case Format::DS: {
 257       DS_instruction* ds = static_cast<DS_instruction*>(instr);
 258       if (ds->offset0)
 259          fprintf(output, " offset0:%u", ds->offset0);
 260       if (ds->offset1)
 261          fprintf(output, " offset1:%u", ds->offset1);
 262       if (ds->gds)
 263          fprintf(output, " gds");
 264       break;
 265    }
 266    case Format::MUBUF: {
 267       MUBUF_instruction* mubuf = static_cast<MUBUF_instruction*>(instr);
 268       if (mubuf->offset)
 269          fprintf(output, " offset:%u", mubuf->offset);
 270       if (mubuf->offen)
 271          fprintf(output, " offen");
 272       if (mubuf->idxen)
 273          fprintf(output, " idxen");
 274       if (mubuf->addr64)
 275          fprintf(output, " addr64");
 276       if (mubuf->glc)
 277          fprintf(output, " glc");
 278       if (mubuf->dlc)
 279          fprintf(output, " dlc");
 280       if (mubuf->slc)
 281          fprintf(output, " slc");
 282       if (mubuf->tfe)
 283          fprintf(output, " tfe");
 284       if (mubuf->lds)
 285          fprintf(output, " lds");
 286       if (mubuf->disable_wqm)
 287          fprintf(output, " disable_wqm");
 288       print_barrier_reorder(mubuf->can_reorder, mubuf->barrier, output);
 289       break;
 290    }
 291    case Format::MIMG: {
 292       MIMG_instruction* mimg = static_cast<MIMG_instruction*>(instr);
 293       unsigned identity_dmask = !instr->definitions.empty() ?
 294                                 (1 << instr->definitions[0].size()) - 1 :
 295                                 0xf;
 296       if ((mimg->dmask & identity_dmask) != identity_dmask)
 297          fprintf(output, " dmask:%s%s%s%s",
 298                  mimg->dmask & 0x1 ? "x" : "",
 299                  mimg->dmask & 0x2 ? "y" : "",
 300                  mimg->dmask & 0x4 ? "z" : "",
 301                  mimg->dmask & 0x8 ? "w" : "");
 302       switch (mimg->dim) {
 303       case ac_image_1d:
 304          fprintf(output, " 1d");
 305          break;
 306       case ac_image_2d:
 307          fprintf(output, " 2d");
 308          break;
 309       case ac_image_3d:
 310          fprintf(output, " 3d");
 311          break;
 312       case ac_image_cube:
 313          fprintf(output, " cube");
 314          break;
 315       case ac_image_1darray:
 316          fprintf(output, " 1darray");
 317          break;
 318       case ac_image_2darray:
 319          fprintf(output, " 2darray");
 320          break;
 321       case ac_image_2dmsaa:
 322          fprintf(output, " 2dmsaa");
 323          break;
 324       case ac_image_2darraymsaa:
 325          fprintf(output, " 2darraymsaa");
 326          break;
 327       }
 328       if (mimg->unrm)
 329          fprintf(output, " unrm");
 330       if (mimg->glc)
 331          fprintf(output, " glc");
 332       if (mimg->dlc)
 333          fprintf(output, " dlc");
 334       if (mimg->slc)
 335          fprintf(output, " slc");
 336       if (mimg->tfe)
 337          fprintf(output, " tfe");
 338       if (mimg->da)
 339          fprintf(output, " da");
 340       if (mimg->lwe)
 341          fprintf(output, " lwe");
 342       if (mimg->r128 || mimg->a16)
 343          fprintf(output, " r128/a16");
 344       if (mimg->d16)
 345          fprintf(output, " d16");
 346       if (mimg->disable_wqm)
 347          fprintf(output, " disable_wqm");
 348       print_barrier_reorder(mimg->can_reorder, mimg->barrier, output);
 349       break;
 350    }
 351    case Format::EXP: {
 352       Export_instruction* exp = static_cast<Export_instruction*>(instr);
 353       unsigned identity_mask = exp->compressed ? 0x5 : 0xf;
 354       if ((exp->enabled_mask & identity_mask) != identity_mask)
 355          fprintf(output, " en:%c%c%c%c",
 356                  exp->enabled_mask & 0x1 ? 'r' : '*',
 357                  exp->enabled_mask & 0x2 ? 'g' : '*',
 358                  exp->enabled_mask & 0x4 ? 'b' : '*',
 359                  exp->enabled_mask & 0x8 ? 'a' : '*');
 360       if (exp->compressed)
 361          fprintf(output, " compr");
 362       if (exp->done)
 363          fprintf(output, " done");
 364       if (exp->valid_mask)
 365          fprintf(output, " vm");
 366
 367       if (exp->dest <= V_008DFC_SQ_EXP_MRT + 7)
 368          fprintf(output, " mrt%d", exp->dest - V_008DFC_SQ_EXP_MRT);
 369       else if (exp->dest == V_008DFC_SQ_EXP_MRTZ)
 370          fprintf(output, " mrtz");
 371       else if (exp->dest == V_008DFC_SQ_EXP_NULL)
 372          fprintf(output, " null");
 373       else if (exp->dest >= V_008DFC_SQ_EXP_POS && exp->dest <= V_008DFC_SQ_EXP_POS + 3)
 374          fprintf(output, " pos%d", exp->dest - V_008DFC_SQ_EXP_POS);
 375       else if (exp->dest >= V_008DFC_SQ_EXP_PARAM && exp->dest <= V_008DFC_SQ_EXP_PARAM + 31)
 376          fprintf(output, " param%d", exp->dest - V_008DFC_SQ_EXP_PARAM);
 377       break;
 378    }
 379    case Format::PSEUDO_BRANCH: {
 380       Pseudo_branch_instruction* branch = static_cast<Pseudo_branch_instruction*>(instr);
 381       /* Note: BB0 cannot be a branch target */
 382       if (branch->target[0] != 0)
 383          fprintf(output, " BB%d", branch->target[0]);
 384       if (branch->target[1] != 0)
 385          fprintf(output, ", BB%d", branch->target[1]);
 386       break;
 387    }
 388    case Format::PSEUDO_REDUCTION: {
 389       Pseudo_reduction_instruction* reduce = static_cast<Pseudo_reduction_instruction*>(instr);
 390       fprintf(output, " op:%s", reduce_ops[reduce->reduce_op]);
 391       if (reduce->cluster_size)
 392          fprintf(output, " cluster_size:%u", reduce->cluster_size);
 393       break;
 394    }
 395    case Format::FLAT:
 396    case Format::GLOBAL:
 397    case Format::SCRATCH: {
 398       FLAT_instruction* flat = static_cast<FLAT_instruction*>(instr);
 399       if (flat->offset)
 400          fprintf(output, " offset:%u", flat->offset);
 401       if (flat->glc)
 402          fprintf(output, " glc");
 403       if (flat->dlc)
 404          fprintf(output, " dlc");
 405       if (flat->slc)
 406          fprintf(output, " slc");
 407       if (flat->lds)
 408          fprintf(output, " lds");
 409       if (flat->nv)
 410          fprintf(output, " nv");
 411       if (flat->disable_wqm)
 412          fprintf(output, " disable_wqm");
 413       print_barrier_reorder(flat->can_reorder, flat->barrier, output);
 414       break;
 415    }
 416    case Format::MTBUF: {
 417       MTBUF_instruction* mtbuf = static_cast<MTBUF_instruction*>(instr);
 418       fprintf(output, " dfmt:");
 419       switch (mtbuf->dfmt) {
 420       case V_008F0C_BUF_DATA_FORMAT_8: fprintf(output, "8"); break;
 421       case V_008F0C_BUF_DATA_FORMAT_16: fprintf(output, "16"); break;
 422       case V_008F0C_BUF_DATA_FORMAT_8_8: fprintf(output, "8_8"); break;
 423       case V_008F0C_BUF_DATA_FORMAT_32: fprintf(output, "32"); break;
 424       case V_008F0C_BUF_DATA_FORMAT_16_16: fprintf(output, "16_16"); break;
 425       case V_008F0C_BUF_DATA_FORMAT_10_11_11: fprintf(output, "10_11_11"); break;
 426       case V_008F0C_BUF_DATA_FORMAT_11_11_10: fprintf(output, "11_11_10"); break;
 427       case V_008F0C_BUF_DATA_FORMAT_10_10_10_2: fprintf(output, "10_10_10_2"); break;
 428       case V_008F0C_BUF_DATA_FORMAT_2_10_10_10: fprintf(output, "2_10_10_10"); break;
 429       case V_008F0C_BUF_DATA_FORMAT_8_8_8_8: fprintf(output, "8_8_8_8"); break;
 430       case V_008F0C_BUF_DATA_FORMAT_32_32: fprintf(output, "32_32"); break;
 431       case V_008F0C_BUF_DATA_FORMAT_16_16_16_16: fprintf(output, "16_16_16_16"); break;
 432       case V_008F0C_BUF_DATA_FORMAT_32_32_32: fprintf(output, "32_32_32"); break;
 433       case V_008F0C_BUF_DATA_FORMAT_32_32_32_32: fprintf(output, "32_32_32_32"); break;
 434       case V_008F0C_BUF_DATA_FORMAT_RESERVED_15: fprintf(output, "reserved15"); break;
 435       }
 436       fprintf(output, " nfmt:");
 437       switch (mtbuf->nfmt) {
 438       case V_008F0C_BUF_NUM_FORMAT_UNORM: fprintf(output, "unorm"); break;
 439       case V_008F0C_BUF_NUM_FORMAT_SNORM: fprintf(output, "snorm"); break;
 440       case V_008F0C_BUF_NUM_FORMAT_USCALED: fprintf(output, "uscaled"); break;
 441       case V_008F0C_BUF_NUM_FORMAT_SSCALED: fprintf(output, "sscaled"); break;
 442       case V_008F0C_BUF_NUM_FORMAT_UINT: fprintf(output, "uint"); break;
 443       case V_008F0C_BUF_NUM_FORMAT_SINT: fprintf(output, "sint"); break;
 444       case V_008F0C_BUF_NUM_FORMAT_SNORM_OGL: fprintf(output, "snorm"); break;
 445       case V_008F0C_BUF_NUM_FORMAT_FLOAT: fprintf(output, "float"); break;
 446       }
 447       if (mtbuf->offset)
 448          fprintf(output, " offset:%u", mtbuf->offset);
 449       if (mtbuf->offen)
 450          fprintf(output, " offen");
 451       if (mtbuf->idxen)
 452          fprintf(output, " idxen");
 453       if (mtbuf->glc)
 454          fprintf(output, " glc");
 455       if (mtbuf->dlc)
 456          fprintf(output, " dlc");
 457       if (mtbuf->slc)
 458          fprintf(output, " slc");
 459       if (mtbuf->tfe)
 460          fprintf(output, " tfe");
 461       if (mtbuf->disable_wqm)
 462          fprintf(output, " disable_wqm");
 463       print_barrier_reorder(mtbuf->can_reorder, mtbuf->barrier, output);
 464       break;
 465    }
 466    default: {
 467       break;
 468    }
 469    }
 470    if (instr->isVOP3()) {
 471       VOP3A_instruction* vop3 = static_cast<VOP3A_instruction*>(instr);
 472       switch (vop3->omod) {
 473       case 1:
 474          fprintf(output, " *2");
 475          break;
 476       case 2:
 477          fprintf(output, " *4");
 478          break;
 479       case 3:
 480          fprintf(output, " *0.5");
 481          break;
 482       }
 483       if (vop3->clamp)
 484          fprintf(output, " clamp");
 485    } else if (instr->isDPP()) {
 486       DPP_instruction* dpp = static_cast<DPP_instruction*>(instr);
 487       if (dpp->dpp_ctrl <= 0xff) {
 488          fprintf(output, " quad_perm:[%d,%d,%d,%d]",
 489                  dpp->dpp_ctrl & 0x3, (dpp->dpp_ctrl >> 2) & 0x3,
 490                  (dpp->dpp_ctrl >> 4) & 0x3, (dpp->dpp_ctrl >> 6) & 0x3);
 491       } else if (dpp->dpp_ctrl >= 0x101 && dpp->dpp_ctrl <= 0x10f) {
 492          fprintf(output, " row_shl:%d", dpp->dpp_ctrl & 0xf);
 493       } else if (dpp->dpp_ctrl >= 0x111 && dpp->dpp_ctrl <= 0x11f) {
 494          fprintf(output, " row_shr:%d", dpp->dpp_ctrl & 0xf);
 495       } else if (dpp->dpp_ctrl >= 0x121 && dpp->dpp_ctrl <= 0x12f) {
 496          fprintf(output, " row_ror:%d", dpp->dpp_ctrl & 0xf);
 497       } else if (dpp->dpp_ctrl == dpp_wf_sl1) {
 498          fprintf(output, " wave_shl:1");
 499       } else if (dpp->dpp_ctrl == dpp_wf_rl1) {
 500          fprintf(output, " wave_rol:1");
 501       } else if (dpp->dpp_ctrl == dpp_wf_sr1) {
 502          fprintf(output, " wave_shr:1");
 503       } else if (dpp->dpp_ctrl == dpp_wf_rr1) {
 504          fprintf(output, " wave_ror:1");
 505       } else if (dpp->dpp_ctrl == dpp_row_mirror) {
 506          fprintf(output, " row_mirror");
 507       } else if (dpp->dpp_ctrl == dpp_row_half_mirror) {
 508          fprintf(output, " row_half_mirror");
 509       } else if (dpp->dpp_ctrl == dpp_row_bcast15) {
 510          fprintf(output, " row_bcast:15");
 511       } else if (dpp->dpp_ctrl == dpp_row_bcast31) {
 512          fprintf(output, " row_bcast:31");
 513       } else {
 514          fprintf(output, " dpp_ctrl:0x%.3x", dpp->dpp_ctrl);
 515       }
 516       if (dpp->row_mask != 0xf)
 517          fprintf(output, " row_mask:0x%.1x", dpp->row_mask);
 518       if (dpp->bank_mask != 0xf)
 519          fprintf(output, " bank_mask:0x%.1x", dpp->bank_mask);
 520       if (dpp->bound_ctrl)
 521          fprintf(output, " bound_ctrl:1");
 522    } else if ((int)instr->format & (int)Format::SDWA) {
 523       fprintf(output, " (printing unimplemented)");
 524    }
 525 }
 526
 527 void aco_print_instr(struct Instruction *instr, FILE *output)
 528 {
 529    if (!instr->definitions.empty()) {
 530       for (unsigned i = 0; i < instr->definitions.size(); ++i) {
 531          print_definition(&instr->definitions[i], output);
 532          if (i + 1 != instr->definitions.size())
 533             fprintf(output, ", ");
 534       }
 535       fprintf(output, " = ");
 536    }
 537    fprintf(output, "%s", instr_info.name[(int)instr->opcode]);
 538    if (instr->operands.size()) {
 539       bool abs[instr->operands.size()];
 540       bool neg[instr->operands.size()];
 541       if ((int)instr->format & (int)Format::VOP3A) {
 542          VOP3A_instruction* vop3 = static_cast<VOP3A_instruction*>(instr);
 543          for (unsigned i = 0; i < instr->operands.size(); ++i) {
 544             abs[i] = vop3->abs[i];
 545             neg[i] = vop3->neg[i];
 546          }
 547       } else if (instr->isDPP()) {
 548          DPP_instruction* dpp = static_cast<DPP_instruction*>(instr);
 549          assert(instr->operands.size() <= 2);
 550          for (unsigned i = 0; i < instr->operands.size(); ++i) {
 551             abs[i] = dpp->abs[i];
 552             neg[i] = dpp->neg[i];
 553          }
 554       } else {
 555          for (unsigned i = 0; i < instr->operands.size(); ++i) {
 556             abs[i] = false;
 557             neg[i] = false;
 558          }
 559       }
 560       for (unsigned i = 0; i < instr->operands.size(); ++i) {
 561          if (i)
 562             fprintf(output, ", ");
 563          else
 564             fprintf(output, " ");
 565
 566          if (neg[i])
 567             fprintf(output, "-");
 568          if (abs[i])
 569             fprintf(output, "|");
 570          print_operand(&instr->operands[i], output);
 571          if (abs[i])
 572             fprintf(output, "|");
 573        }
 574    }
 575    print_instr_format_specific(instr, output);
 576 }
 577
 578 static void print_block_kind(uint16_t kind, FILE *output)
 579 {
 580    if (kind & block_kind_uniform)
 581       fprintf(output, "uniform, ");
 582    if (kind & block_kind_top_level)
 583       fprintf(output, "top-level, ");
 584    if (kind & block_kind_loop_preheader)
 585       fprintf(output, "loop-preheader, ");
 586    if (kind & block_kind_loop_header)
 587       fprintf(output, "loop-header, ");
 588    if (kind & block_kind_loop_exit)
 589       fprintf(output, "loop-exit, ");
 590    if (kind & block_kind_continue)
 591       fprintf(output, "continue, ");
 592    if (kind & block_kind_break)
 593       fprintf(output, "break, ");
 594    if (kind & block_kind_continue_or_break)
 595       fprintf(output, "continue_or_break, ");
 596    if (kind & block_kind_discard)
 597       fprintf(output, "discard, ");
 598    if (kind & block_kind_branch)
 599       fprintf(output, "branch, ");
 600    if (kind & block_kind_merge)
 601       fprintf(output, "merge, ");
 602    if (kind & block_kind_invert)
 603       fprintf(output, "invert, ");
 604    if (kind & block_kind_uses_discard_if)
 605       fprintf(output, "discard_if, ");
 606    if (kind & block_kind_needs_lowering)
 607       fprintf(output, "needs_lowering, ");
 608    if (kind & block_kind_uses_demote)
 609       fprintf(output, "uses_demote, ");
 610 }
 611
 612 void aco_print_block(const struct Block* block, FILE *output)
 613 {
 614    fprintf(output, "BB%d\n", block->index);
 615    fprintf(output, "/* logical preds: ");
 616    for (unsigned pred : block->logical_preds)
 617       fprintf(output, "BB%d, ", pred);
 618    fprintf(output, "/ linear preds: ");
 619    for (unsigned pred : block->linear_preds)
 620       fprintf(output, "BB%d, ", pred);
 621    fprintf(output, "/ kind: ");
 622    print_block_kind(block->kind, output);
 623    fprintf(output, "*/\n");
 624    for (auto const& instr : block->instructions) {
 625       fprintf(output, "\t");
 626       aco_print_instr(instr.get(), output);
 627       fprintf(output, "\n");
 628    }
 629 }
 630
 631 void aco_print_program(Program *program, FILE *output)
 632 {
 633    for (Block const& block : program->blocks)
 634       aco_print_block(&block, output);
 635
 636    if (program->constant_data.size()) {
 637       fprintf(output, "\n/* constant data */\n");
 638       for (unsigned i = 0; i < program->constant_data.size(); i += 32) {
 639          fprintf(output, "[%06d] ", i);
 640          unsigned line_size = std::min<size_t>(program->constant_data.size() - i, 32);
 641          for (unsigned j = 0; j < line_size; j += 4) {
 642             unsigned size = std::min<size_t>(program->constant_data.size() - (i + j), 4);
 643             uint32_t v = 0;
 644             memcpy(&v, &program->constant_data[i + j], size);
 645             fprintf(output, " %08x", v);
 646          }
 647          fprintf(output, "\n");
 648       }
 649    }
 650
 651    fprintf(output, "\n");
 652 }
 653
 654 }