src/amd/compiler/aco_print_ir.cpp

   1 #include "aco_ir.h"
   2 #include "aco_builder.h"
   3
   4 #include "sid.h"
   5 #include "ac_shader_util.h"
   6
   7 namespace aco {
   8
   9 static const char *reduce_ops[] = {
  10    [iadd32] = "iadd32",
  11    [iadd64] = "iadd64",
  12    [imul32] = "imul32",
  13    [imul64] = "imul64",
  14    [fadd32] = "fadd32",
  15    [fadd64] = "fadd64",
  16    [fmul32] = "fmul32",
  17    [fmul64] = "fmul64",
  18    [imin32] = "imin32",
  19    [imin64] = "imin64",
  20    [imax32] = "imax32",
  21    [imax64] = "imax64",
  22    [umin32] = "umin32",
  23    [umin64] = "umin64",
  24    [umax32] = "umax32",
  25    [umax64] = "umax64",
  26    [fmin32] = "fmin32",
  27    [fmin64] = "fmin64",
  28    [fmax32] = "fmax32",
  29    [fmax64] = "fmax64",
  30    [iand32] = "iand32",
  31    [iand64] = "iand64",
  32    [ior32] = "ior32",
  33    [ior64] = "ior64",
  34    [ixor32] = "ixor32",
  35    [ixor64] = "ixor64",
  36 };
  37
  38 static void print_reg_class(const RegClass rc, FILE *output)
  39 {
  40    switch (rc) {
  41       case RegClass::s1: fprintf(output, " s1: "); return;
  42       case RegClass::s2: fprintf(output, " s2: "); return;
  43       case RegClass::s3: fprintf(output, " s3: "); return;
  44       case RegClass::s4: fprintf(output, " s4: "); return;
  45       case RegClass::s6: fprintf(output, " s6: "); return;
  46       case RegClass::s8: fprintf(output, " s8: "); return;
  47       case RegClass::s16: fprintf(output, "s16: "); return;
  48       case RegClass::v1: fprintf(output, " v1: "); return;
  49       case RegClass::v2: fprintf(output, " v2: "); return;
  50       case RegClass::v3: fprintf(output, " v3: "); return;
  51       case RegClass::v4: fprintf(output, " v4: "); return;
  52       case RegClass::v5: fprintf(output, " v5: "); return;
  53       case RegClass::v6: fprintf(output, " v6: "); return;
  54       case RegClass::v7: fprintf(output, " v7: "); return;
  55       case RegClass::v8: fprintf(output, " v8: "); return;
  56       case RegClass::v1_linear: fprintf(output, " v1: "); return;
  57       case RegClass::v2_linear: fprintf(output, " v2: "); return;
  58    }
  59 }
  60
  61 void print_physReg(unsigned reg, unsigned size, FILE *output)
  62 {
  63    if (reg == 124) {
  64       fprintf(output, ":m0");
  65    } else if (reg == 106) {
  66       fprintf(output, ":vcc");
  67    } else if (reg == 253) {
  68       fprintf(output, ":scc");
  69    } else if (reg == 126) {
  70       fprintf(output, ":exec");
  71    } else {
  72       bool is_vgpr = reg / 256;
  73       reg = reg % 256;
  74       fprintf(output, ":%c[%d", is_vgpr ? 'v' : 's', reg);
  75       if (size > 1)
  76          fprintf(output, "-%d]", reg + size -1);
  77       else
  78          fprintf(output, "]");
  79    }
  80 }
  81
  82 static void print_constant(uint8_t reg, FILE *output)
  83 {
  84    if (reg >= 128 && reg <= 192) {
  85       fprintf(output, "%d", reg - 128);
  86       return;
  87    } else if (reg >= 192 && reg <= 208) {
  88       fprintf(output, "%d", 192 - reg);
  89       return;
  90    }
  91
  92    switch (reg) {
  93    case 240:
  94       fprintf(output, "0.5");
  95       break;
  96    case 241:
  97       fprintf(output, "-0.5");
  98       break;
  99    case 242:
 100       fprintf(output, "1.0");
 101       break;
 102    case 243:
 103       fprintf(output, "-1.0");
 104       break;
 105    case 244:
 106       fprintf(output, "2.0");
 107       break;
 108    case 245:
 109       fprintf(output, "-2.0");
 110       break;
 111    case 246:
 112       fprintf(output, "4.0");
 113       break;
 114    case 247:
 115       fprintf(output, "-4.0");
 116       break;
 117    case 248:
 118       fprintf(output, "1/(2*PI)");
 119       break;
 120    }
 121 }
 122
 123 static void print_operand(const Operand *operand, FILE *output)
 124 {
 125    if (operand->isLiteral()) {
 126       fprintf(output, "0x%x", operand->constantValue());
 127    } else if (operand->isConstant()) {
 128       print_constant(operand->physReg().reg, output);
 129    } else if (operand->isUndefined()) {
 130       print_reg_class(operand->regClass(), output);
 131       fprintf(output, "undef");
 132    } else {
 133       fprintf(output, "%%%d", operand->tempId());
 134
 135       if (operand->isFixed())
 136          print_physReg(operand->physReg(), operand->size(), output);
 137    }
 138 }
 139
 140 static void print_definition(const Definition *definition, FILE *output)
 141 {
 142    print_reg_class(definition->regClass(), output);
 143    fprintf(output, "%%%d", definition->tempId());
 144
 145    if (definition->isFixed())
 146       print_physReg(definition->physReg(), definition->size(), output);
 147 }
 148
 149 static void print_barrier_reorder(bool can_reorder, barrier_interaction barrier, FILE *output)
 150 {
 151    if (can_reorder)
 152       fprintf(output, " reorder");
 153
 154    if (barrier & barrier_buffer)
 155       fprintf(output, " buffer");
 156    if (barrier & barrier_image)
 157       fprintf(output, " image");
 158    if (barrier & barrier_atomic)
 159       fprintf(output, " atomic");
 160    if (barrier & barrier_shared)
 161       fprintf(output, " shared");
 162 }
 163
 164 static void print_instr_format_specific(struct Instruction *instr, FILE *output)
 165 {
 166    switch (instr->format) {
 167    case Format::SOPK: {
 168       SOPK_instruction* sopk = static_cast<SOPK_instruction*>(instr);
 169       fprintf(output, " imm:%d", sopk->imm & 0x8000 ? (sopk->imm - 65536) : sopk->imm);
 170       break;
 171    }
 172    case Format::SOPP: {
 173       SOPP_instruction* sopp = static_cast<SOPP_instruction*>(instr);
 174       uint16_t imm = sopp->imm;
 175       switch (instr->opcode) {
 176       case aco_opcode::s_waitcnt: {
 177          /* we usually should check the chip class for vmcnt/lgkm, but
 178           * insert_waitcnt() should fill it in regardless. */
 179          unsigned vmcnt = (imm & 0xF) | ((imm & (0x3 << 14)) >> 10);
 180          if (vmcnt != 63) fprintf(output, " vmcnt(%d)", vmcnt);
 181          if (((imm >> 4) & 0x7) < 0x7) fprintf(output, " expcnt(%d)", (imm >> 4) & 0x7);
 182          if (((imm >> 8) & 0x3F) < 0x3F) fprintf(output, " lgkmcnt(%d)", (imm >> 8) & 0x3F);
 183          break;
 184       }
 185       case aco_opcode::s_endpgm:
 186       case aco_opcode::s_endpgm_saved:
 187       case aco_opcode::s_endpgm_ordered_ps_done:
 188       case aco_opcode::s_wakeup:
 189       case aco_opcode::s_barrier:
 190       case aco_opcode::s_icache_inv:
 191       case aco_opcode::s_ttracedata:
 192       case aco_opcode::s_set_gpr_idx_off: {
 193          break;
 194       }
 195       default: {
 196          if (imm)
 197             fprintf(output, " imm:%u", imm);
 198          break;
 199       }
 200       }
 201       if (sopp->block != -1)
 202          fprintf(output, " block:BB%d", sopp->block);
 203       break;
 204    }
 205    case Format::SMEM: {
 206       SMEM_instruction* smem = static_cast<SMEM_instruction*>(instr);
 207       if (smem->glc)
 208          fprintf(output, " glc");
 209       if (smem->dlc)
 210          fprintf(output, " dlc");
 211       if (smem->nv)
 212          fprintf(output, " nv");
 213       print_barrier_reorder(smem->can_reorder, smem->barrier, output);
 214       break;
 215    }
 216    case Format::VINTRP: {
 217       Interp_instruction* vintrp = static_cast<Interp_instruction*>(instr);
 218       fprintf(output, " attr%d.%c", vintrp->attribute, "xyzw"[vintrp->component]);
 219       break;
 220    }
 221    case Format::DS: {
 222       DS_instruction* ds = static_cast<DS_instruction*>(instr);
 223       if (ds->offset0)
 224          fprintf(output, " offset0:%u", ds->offset0);
 225       if (ds->offset1)
 226          fprintf(output, " offset1:%u", ds->offset1);
 227       if (ds->gds)
 228          fprintf(output, " gds");
 229       break;
 230    }
 231    case Format::MUBUF: {
 232       MUBUF_instruction* mubuf = static_cast<MUBUF_instruction*>(instr);
 233       if (mubuf->offset)
 234          fprintf(output, " offset:%u", mubuf->offset);
 235       if (mubuf->offen)
 236          fprintf(output, " offen");
 237       if (mubuf->idxen)
 238          fprintf(output, " idxen");
 239       if (mubuf->addr64)
 240          fprintf(output, " addr64");
 241       if (mubuf->glc)
 242          fprintf(output, " glc");
 243       if (mubuf->dlc)
 244          fprintf(output, " dlc");
 245       if (mubuf->slc)
 246          fprintf(output, " slc");
 247       if (mubuf->tfe)
 248          fprintf(output, " tfe");
 249       if (mubuf->lds)
 250          fprintf(output, " lds");
 251       if (mubuf->disable_wqm)
 252          fprintf(output, " disable_wqm");
 253       print_barrier_reorder(mubuf->can_reorder, mubuf->barrier, output);
 254       break;
 255    }
 256    case Format::MIMG: {
 257       MIMG_instruction* mimg = static_cast<MIMG_instruction*>(instr);
 258       unsigned identity_dmask = !instr->definitions.empty() ?
 259                                 (1 << instr->definitions[0].size()) - 1 :
 260                                 0xf;
 261       if ((mimg->dmask & identity_dmask) != identity_dmask)
 262          fprintf(output, " dmask:%s%s%s%s",
 263                  mimg->dmask & 0x1 ? "x" : "",
 264                  mimg->dmask & 0x2 ? "y" : "",
 265                  mimg->dmask & 0x4 ? "z" : "",
 266                  mimg->dmask & 0x8 ? "w" : "");
 267       switch (mimg->dim) {
 268       case ac_image_1d:
 269          fprintf(output, " 1d");
 270          break;
 271       case ac_image_2d:
 272          fprintf(output, " 2d");
 273          break;
 274       case ac_image_3d:
 275          fprintf(output, " 3d");
 276          break;
 277       case ac_image_cube:
 278          fprintf(output, " cube");
 279          break;
 280       case ac_image_1darray:
 281          fprintf(output, " 1darray");
 282          break;
 283       case ac_image_2darray:
 284          fprintf(output, " 2darray");
 285          break;
 286       case ac_image_2dmsaa:
 287          fprintf(output, " 2dmsaa");
 288          break;
 289       case ac_image_2darraymsaa:
 290          fprintf(output, " 2darraymsaa");
 291          break;
 292       }
 293       if (mimg->unrm)
 294          fprintf(output, " unrm");
 295       if (mimg->glc)
 296          fprintf(output, " glc");
 297       if (mimg->dlc)
 298          fprintf(output, " dlc");
 299       if (mimg->slc)
 300          fprintf(output, " slc");
 301       if (mimg->tfe)
 302          fprintf(output, " tfe");
 303       if (mimg->da)
 304          fprintf(output, " da");
 305       if (mimg->lwe)
 306          fprintf(output, " lwe");
 307       if (mimg->r128 || mimg->a16)
 308          fprintf(output, " r128/a16");
 309       if (mimg->d16)
 310          fprintf(output, " d16");
 311       if (mimg->disable_wqm)
 312          fprintf(output, " disable_wqm");
 313       print_barrier_reorder(mimg->can_reorder, mimg->barrier, output);
 314       break;
 315    }
 316    case Format::EXP: {
 317       Export_instruction* exp = static_cast<Export_instruction*>(instr);
 318       unsigned identity_mask = exp->compressed ? 0x5 : 0xf;
 319       if ((exp->enabled_mask & identity_mask) != identity_mask)
 320          fprintf(output, " en:%c%c%c%c",
 321                  exp->enabled_mask & 0x1 ? 'r' : '*',
 322                  exp->enabled_mask & 0x2 ? 'g' : '*',
 323                  exp->enabled_mask & 0x4 ? 'b' : '*',
 324                  exp->enabled_mask & 0x8 ? 'a' : '*');
 325       if (exp->compressed)
 326          fprintf(output, " compr");
 327       if (exp->done)
 328          fprintf(output, " done");
 329       if (exp->valid_mask)
 330          fprintf(output, " vm");
 331
 332       if (exp->dest <= V_008DFC_SQ_EXP_MRT + 7)
 333          fprintf(output, " mrt%d", exp->dest - V_008DFC_SQ_EXP_MRT);
 334       else if (exp->dest == V_008DFC_SQ_EXP_MRTZ)
 335          fprintf(output, " mrtz");
 336       else if (exp->dest == V_008DFC_SQ_EXP_NULL)
 337          fprintf(output, " null");
 338       else if (exp->dest >= V_008DFC_SQ_EXP_POS && exp->dest <= V_008DFC_SQ_EXP_POS + 3)
 339          fprintf(output, " pos%d", exp->dest - V_008DFC_SQ_EXP_POS);
 340       else if (exp->dest >= V_008DFC_SQ_EXP_PARAM && exp->dest <= V_008DFC_SQ_EXP_PARAM + 31)
 341          fprintf(output, " param%d", exp->dest - V_008DFC_SQ_EXP_PARAM);
 342       break;
 343    }
 344    case Format::PSEUDO_BRANCH: {
 345       Pseudo_branch_instruction* branch = static_cast<Pseudo_branch_instruction*>(instr);
 346       /* Note: BB0 cannot be a branch target */
 347       if (branch->target[0] != 0)
 348          fprintf(output, " BB%d", branch->target[0]);
 349       if (branch->target[1] != 0)
 350          fprintf(output, ", BB%d", branch->target[1]);
 351       break;
 352    }
 353    case Format::PSEUDO_REDUCTION: {
 354       Pseudo_reduction_instruction* reduce = static_cast<Pseudo_reduction_instruction*>(instr);
 355       fprintf(output, " op:%s", reduce_ops[reduce->reduce_op]);
 356       if (reduce->cluster_size)
 357          fprintf(output, " cluster_size:%u", reduce->cluster_size);
 358       break;
 359    }
 360    case Format::FLAT:
 361    case Format::GLOBAL:
 362    case Format::SCRATCH: {
 363       FLAT_instruction* flat = static_cast<FLAT_instruction*>(instr);
 364       if (flat->offset)
 365          fprintf(output, " offset:%u", flat->offset);
 366       if (flat->glc)
 367          fprintf(output, " glc");
 368       if (flat->dlc)
 369          fprintf(output, " dlc");
 370       if (flat->slc)
 371          fprintf(output, " slc");
 372       if (flat->lds)
 373          fprintf(output, " lds");
 374       if (flat->nv)
 375          fprintf(output, " nv");
 376       if (flat->disable_wqm)
 377          fprintf(output, " disable_wqm");
 378       print_barrier_reorder(flat->can_reorder, flat->barrier, output);
 379       break;
 380    }
 381    case Format::MTBUF: {
 382       MTBUF_instruction* mtbuf = static_cast<MTBUF_instruction*>(instr);
 383       fprintf(output, " dfmt:");
 384       switch (mtbuf->dfmt) {
 385       case V_008F0C_BUF_DATA_FORMAT_8: fprintf(output, "8"); break;
 386       case V_008F0C_BUF_DATA_FORMAT_16: fprintf(output, "16"); break;
 387       case V_008F0C_BUF_DATA_FORMAT_8_8: fprintf(output, "8_8"); break;
 388       case V_008F0C_BUF_DATA_FORMAT_32: fprintf(output, "32"); break;
 389       case V_008F0C_BUF_DATA_FORMAT_16_16: fprintf(output, "16_16"); break;
 390       case V_008F0C_BUF_DATA_FORMAT_10_11_11: fprintf(output, "10_11_11"); break;
 391       case V_008F0C_BUF_DATA_FORMAT_11_11_10: fprintf(output, "11_11_10"); break;
 392       case V_008F0C_BUF_DATA_FORMAT_10_10_10_2: fprintf(output, "10_10_10_2"); break;
 393       case V_008F0C_BUF_DATA_FORMAT_2_10_10_10: fprintf(output, "2_10_10_10"); break;
 394       case V_008F0C_BUF_DATA_FORMAT_8_8_8_8: fprintf(output, "8_8_8_8"); break;
 395       case V_008F0C_BUF_DATA_FORMAT_32_32: fprintf(output, "32_32"); break;
 396       case V_008F0C_BUF_DATA_FORMAT_16_16_16_16: fprintf(output, "16_16_16_16"); break;
 397       case V_008F0C_BUF_DATA_FORMAT_32_32_32: fprintf(output, "32_32_32"); break;
 398       case V_008F0C_BUF_DATA_FORMAT_32_32_32_32: fprintf(output, "32_32_32_32"); break;
 399       case V_008F0C_BUF_DATA_FORMAT_RESERVED_15: fprintf(output, "reserved15"); break;
 400       }
 401       fprintf(output, " nfmt:");
 402       switch (mtbuf->nfmt) {
 403       case V_008F0C_BUF_NUM_FORMAT_UNORM: fprintf(output, "unorm"); break;
 404       case V_008F0C_BUF_NUM_FORMAT_SNORM: fprintf(output, "snorm"); break;
 405       case V_008F0C_BUF_NUM_FORMAT_USCALED: fprintf(output, "uscaled"); break;
 406       case V_008F0C_BUF_NUM_FORMAT_SSCALED: fprintf(output, "sscaled"); break;
 407       case V_008F0C_BUF_NUM_FORMAT_UINT: fprintf(output, "uint"); break;
 408       case V_008F0C_BUF_NUM_FORMAT_SINT: fprintf(output, "sint"); break;
 409       case V_008F0C_BUF_NUM_FORMAT_SNORM_OGL: fprintf(output, "snorm"); break;
 410       case V_008F0C_BUF_NUM_FORMAT_FLOAT: fprintf(output, "float"); break;
 411       }
 412       if (mtbuf->offset)
 413          fprintf(output, " offset:%u", mtbuf->offset);
 414       if (mtbuf->offen)
 415          fprintf(output, " offen");
 416       if (mtbuf->idxen)
 417          fprintf(output, " idxen");
 418       if (mtbuf->glc)
 419          fprintf(output, " glc");
 420       if (mtbuf->dlc)
 421          fprintf(output, " dlc");
 422       if (mtbuf->slc)
 423          fprintf(output, " slc");
 424       if (mtbuf->tfe)
 425          fprintf(output, " tfe");
 426       if (mtbuf->disable_wqm)
 427          fprintf(output, " disable_wqm");
 428       print_barrier_reorder(mtbuf->can_reorder, mtbuf->barrier, output);
 429       break;
 430    }
 431    default: {
 432       break;
 433    }
 434    }
 435    if (instr->isVOP3()) {
 436       VOP3A_instruction* vop3 = static_cast<VOP3A_instruction*>(instr);
 437       switch (vop3->omod) {
 438       case 1:
 439          fprintf(output, " *2");
 440          break;
 441       case 2:
 442          fprintf(output, " *4");
 443          break;
 444       case 3:
 445          fprintf(output, " *0.5");
 446          break;
 447       }
 448       if (vop3->clamp)
 449          fprintf(output, " clamp");
 450    } else if (instr->isDPP()) {
 451       DPP_instruction* dpp = static_cast<DPP_instruction*>(instr);
 452       if (dpp->dpp_ctrl <= 0xff) {
 453          fprintf(output, " quad_perm:[%d,%d,%d,%d]",
 454                  dpp->dpp_ctrl & 0x3, (dpp->dpp_ctrl >> 2) & 0x3,
 455                  (dpp->dpp_ctrl >> 4) & 0x3, (dpp->dpp_ctrl >> 6) & 0x3);
 456       } else if (dpp->dpp_ctrl >= 0x101 && dpp->dpp_ctrl <= 0x10f) {
 457          fprintf(output, " row_shl:%d", dpp->dpp_ctrl & 0xf);
 458       } else if (dpp->dpp_ctrl >= 0x111 && dpp->dpp_ctrl <= 0x11f) {
 459          fprintf(output, " row_shr:%d", dpp->dpp_ctrl & 0xf);
 460       } else if (dpp->dpp_ctrl >= 0x121 && dpp->dpp_ctrl <= 0x12f) {
 461          fprintf(output, " row_ror:%d", dpp->dpp_ctrl & 0xf);
 462       } else if (dpp->dpp_ctrl == dpp_wf_sl1) {
 463          fprintf(output, " wave_shl:1");
 464       } else if (dpp->dpp_ctrl == dpp_wf_rl1) {
 465          fprintf(output, " wave_rol:1");
 466       } else if (dpp->dpp_ctrl == dpp_wf_sr1) {
 467          fprintf(output, " wave_shr:1");
 468       } else if (dpp->dpp_ctrl == dpp_wf_rr1) {
 469          fprintf(output, " wave_ror:1");
 470       } else if (dpp->dpp_ctrl == dpp_row_mirror) {
 471          fprintf(output, " row_mirror");
 472       } else if (dpp->dpp_ctrl == dpp_row_half_mirror) {
 473          fprintf(output, " row_half_mirror");
 474       } else if (dpp->dpp_ctrl == dpp_row_bcast15) {
 475          fprintf(output, " row_bcast:15");
 476       } else if (dpp->dpp_ctrl == dpp_row_bcast31) {
 477          fprintf(output, " row_bcast:31");
 478       } else {
 479          fprintf(output, " dpp_ctrl:0x%.3x", dpp->dpp_ctrl);
 480       }
 481       if (dpp->row_mask != 0xf)
 482          fprintf(output, " row_mask:0x%.1x", dpp->row_mask);
 483       if (dpp->bank_mask != 0xf)
 484          fprintf(output, " bank_mask:0x%.1x", dpp->bank_mask);
 485       if (dpp->bound_ctrl)
 486          fprintf(output, " bound_ctrl:1");
 487    } else if ((int)instr->format & (int)Format::SDWA) {
 488       fprintf(output, " (printing unimplemented)");
 489    }
 490 }
 491
 492 void aco_print_instr(struct Instruction *instr, FILE *output)
 493 {
 494    if (!instr->definitions.empty()) {
 495       for (unsigned i = 0; i < instr->definitions.size(); ++i) {
 496          print_definition(&instr->definitions[i], output);
 497          if (i + 1 != instr->definitions.size())
 498             fprintf(output, ", ");
 499       }
 500       fprintf(output, " = ");
 501    }
 502    fprintf(output, "%s", instr_info.name[(int)instr->opcode]);
 503    if (instr->operands.size()) {
 504       bool abs[instr->operands.size()];
 505       bool neg[instr->operands.size()];
 506       if ((int)instr->format & (int)Format::VOP3A) {
 507          VOP3A_instruction* vop3 = static_cast<VOP3A_instruction*>(instr);
 508          for (unsigned i = 0; i < instr->operands.size(); ++i) {
 509             abs[i] = vop3->abs[i];
 510             neg[i] = vop3->neg[i];
 511          }
 512       } else if (instr->isDPP()) {
 513          DPP_instruction* dpp = static_cast<DPP_instruction*>(instr);
 514          assert(instr->operands.size() <= 2);
 515          for (unsigned i = 0; i < instr->operands.size(); ++i) {
 516             abs[i] = dpp->abs[i];
 517             neg[i] = dpp->neg[i];
 518          }
 519       } else {
 520          for (unsigned i = 0; i < instr->operands.size(); ++i) {
 521             abs[i] = false;
 522             neg[i] = false;
 523          }
 524       }
 525       for (unsigned i = 0; i < instr->operands.size(); ++i) {
 526          if (i)
 527             fprintf(output, ", ");
 528          else
 529             fprintf(output, " ");
 530
 531          if (neg[i])
 532             fprintf(output, "-");
 533          if (abs[i])
 534             fprintf(output, "|");
 535          print_operand(&instr->operands[i], output);
 536          if (abs[i])
 537             fprintf(output, "|");
 538        }
 539    }
 540    print_instr_format_specific(instr, output);
 541 }
 542
 543 static void print_block_kind(uint16_t kind, FILE *output)
 544 {
 545    if (kind & block_kind_uniform)
 546       fprintf(output, "uniform, ");
 547    if (kind & block_kind_top_level)
 548       fprintf(output, "top-level, ");
 549    if (kind & block_kind_loop_preheader)
 550       fprintf(output, "loop-preheader, ");
 551    if (kind & block_kind_loop_header)
 552       fprintf(output, "loop-header, ");
 553    if (kind & block_kind_loop_exit)
 554       fprintf(output, "loop-exit, ");
 555    if (kind & block_kind_continue)
 556       fprintf(output, "continue, ");
 557    if (kind & block_kind_break)
 558       fprintf(output, "break, ");
 559    if (kind & block_kind_continue_or_break)
 560       fprintf(output, "continue_or_break, ");
 561    if (kind & block_kind_discard)
 562       fprintf(output, "discard, ");
 563    if (kind & block_kind_branch)
 564       fprintf(output, "branch, ");
 565    if (kind & block_kind_merge)
 566       fprintf(output, "merge, ");
 567    if (kind & block_kind_invert)
 568       fprintf(output, "invert, ");
 569    if (kind & block_kind_uses_discard_if)
 570       fprintf(output, "discard_if, ");
 571    if (kind & block_kind_needs_lowering)
 572       fprintf(output, "needs_lowering, ");
 573    if (kind & block_kind_uses_demote)
 574       fprintf(output, "uses_demote, ");
 575 }
 576
 577 void aco_print_block(const struct Block* block, FILE *output)
 578 {
 579    fprintf(output, "BB%d\n", block->index);
 580    fprintf(output, "/* logical preds: ");
 581    for (unsigned pred : block->logical_preds)
 582       fprintf(output, "BB%d, ", pred);
 583    fprintf(output, "/ linear preds: ");
 584    for (unsigned pred : block->linear_preds)
 585       fprintf(output, "BB%d, ", pred);
 586    fprintf(output, "/ kind: ");
 587    print_block_kind(block->kind, output);
 588    fprintf(output, "*/\n");
 589    for (auto const& instr : block->instructions) {
 590       fprintf(output, "\t");
 591       aco_print_instr(instr.get(), output);
 592       fprintf(output, "\n");
 593    }
 594 }
 595
 596 void aco_print_program(Program *program, FILE *output)
 597 {
 598    for (Block const& block : program->blocks)
 599       aco_print_block(&block, output);
 600
 601    if (program->constant_data.size()) {
 602       fprintf(output, "\n/* constant data */\n");
 603       for (unsigned i = 0; i < program->constant_data.size(); i += 32) {
 604          fprintf(output, "[%06d] ", i);
 605          unsigned line_size = std::min<size_t>(program->constant_data.size() - i, 32);
 606          for (unsigned j = 0; j < line_size; j += 4) {
 607             unsigned size = std::min<size_t>(program->constant_data.size() - (i + j), 4);
 608             uint32_t v = 0;
 609             memcpy(&v, &program->constant_data[i + j], size);
 610             fprintf(output, " %08x", v);
 611          }
 612          fprintf(output, "\n");
 613       }
 614    }
 615
 616    fprintf(output, "\n");
 617 }
 618
 619 }