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ac/nir: fix shader clock with subgroup scope
[mesa.git] / src / amd / llvm / ac_llvm_build.c
1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
19 *
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
22 * of the Software.
23 *
24 */
25 /* based on pieces from si_pipe.c and radeon_llvm_emit.c */
26 #include "ac_llvm_build.h"
27
28 #include <llvm-c/Core.h>
29 #include <llvm/Config/llvm-config.h>
30
31 #include "c11/threads.h"
32
33 #include <assert.h>
34 #include <stdio.h>
35
36 #include "ac_llvm_util.h"
37 #include "ac_shader_util.h"
38 #include "ac_exp_param.h"
39 #include "util/bitscan.h"
40 #include "util/macros.h"
41 #include "util/u_atomic.h"
42 #include "util/u_math.h"
43 #include "sid.h"
44
45 #include "shader_enums.h"
46
47 #define AC_LLVM_INITIAL_CF_DEPTH 4
48
49 /* Data for if/else/endif and bgnloop/endloop control flow structures.
50 */
51 struct ac_llvm_flow {
52 /* Loop exit or next part of if/else/endif. */
53 LLVMBasicBlockRef next_block;
54 LLVMBasicBlockRef loop_entry_block;
55 };
56
57 /* Initialize module-independent parts of the context.
58 *
59 * The caller is responsible for initializing ctx::module and ctx::builder.
60 */
61 void
62 ac_llvm_context_init(struct ac_llvm_context *ctx,
63 struct ac_llvm_compiler *compiler,
64 enum chip_class chip_class, enum radeon_family family,
65 enum ac_float_mode float_mode, unsigned wave_size,
66 unsigned ballot_mask_bits)
67 {
68 ctx->context = LLVMContextCreate();
69
70 ctx->chip_class = chip_class;
71 ctx->family = family;
72 ctx->wave_size = wave_size;
73 ctx->ballot_mask_bits = ballot_mask_bits;
74 ctx->float_mode = float_mode;
75 ctx->module = ac_create_module(wave_size == 32 ? compiler->tm_wave32
76 : compiler->tm,
77 ctx->context);
78 ctx->builder = ac_create_builder(ctx->context, float_mode);
79
80 ctx->voidt = LLVMVoidTypeInContext(ctx->context);
81 ctx->i1 = LLVMInt1TypeInContext(ctx->context);
82 ctx->i8 = LLVMInt8TypeInContext(ctx->context);
83 ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
84 ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
85 ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
86 ctx->i128 = LLVMIntTypeInContext(ctx->context, 128);
87 ctx->intptr = ctx->i32;
88 ctx->f16 = LLVMHalfTypeInContext(ctx->context);
89 ctx->f32 = LLVMFloatTypeInContext(ctx->context);
90 ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
91 ctx->v2i16 = LLVMVectorType(ctx->i16, 2);
92 ctx->v2i32 = LLVMVectorType(ctx->i32, 2);
93 ctx->v3i32 = LLVMVectorType(ctx->i32, 3);
94 ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
95 ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
96 ctx->v3f32 = LLVMVectorType(ctx->f32, 3);
97 ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
98 ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
99 ctx->iN_wavemask = LLVMIntTypeInContext(ctx->context, ctx->wave_size);
100 ctx->iN_ballotmask = LLVMIntTypeInContext(ctx->context, ballot_mask_bits);
101
102 ctx->i8_0 = LLVMConstInt(ctx->i8, 0, false);
103 ctx->i8_1 = LLVMConstInt(ctx->i8, 1, false);
104 ctx->i16_0 = LLVMConstInt(ctx->i16, 0, false);
105 ctx->i16_1 = LLVMConstInt(ctx->i16, 1, false);
106 ctx->i32_0 = LLVMConstInt(ctx->i32, 0, false);
107 ctx->i32_1 = LLVMConstInt(ctx->i32, 1, false);
108 ctx->i64_0 = LLVMConstInt(ctx->i64, 0, false);
109 ctx->i64_1 = LLVMConstInt(ctx->i64, 1, false);
110 ctx->i128_0 = LLVMConstInt(ctx->i128, 0, false);
111 ctx->i128_1 = LLVMConstInt(ctx->i128, 1, false);
112 ctx->f16_0 = LLVMConstReal(ctx->f16, 0.0);
113 ctx->f16_1 = LLVMConstReal(ctx->f16, 1.0);
114 ctx->f32_0 = LLVMConstReal(ctx->f32, 0.0);
115 ctx->f32_1 = LLVMConstReal(ctx->f32, 1.0);
116 ctx->f64_0 = LLVMConstReal(ctx->f64, 0.0);
117 ctx->f64_1 = LLVMConstReal(ctx->f64, 1.0);
118
119 ctx->i1false = LLVMConstInt(ctx->i1, 0, false);
120 ctx->i1true = LLVMConstInt(ctx->i1, 1, false);
121
122 ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
123 "range", 5);
124
125 ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context,
126 "invariant.load", 14);
127
128 ctx->uniform_md_kind = LLVMGetMDKindIDInContext(ctx->context,
129 "amdgpu.uniform", 14);
130
131 ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
132 ctx->flow = calloc(1, sizeof(*ctx->flow));
133 }
134
135 void
136 ac_llvm_context_dispose(struct ac_llvm_context *ctx)
137 {
138 free(ctx->flow->stack);
139 free(ctx->flow);
140 ctx->flow = NULL;
141 }
142
143 int
144 ac_get_llvm_num_components(LLVMValueRef value)
145 {
146 LLVMTypeRef type = LLVMTypeOf(value);
147 unsigned num_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
148 ? LLVMGetVectorSize(type)
149 : 1;
150 return num_components;
151 }
152
153 LLVMValueRef
154 ac_llvm_extract_elem(struct ac_llvm_context *ac,
155 LLVMValueRef value,
156 int index)
157 {
158 if (LLVMGetTypeKind(LLVMTypeOf(value)) != LLVMVectorTypeKind) {
159 assert(index == 0);
160 return value;
161 }
162
163 return LLVMBuildExtractElement(ac->builder, value,
164 LLVMConstInt(ac->i32, index, false), "");
165 }
166
167 int
168 ac_get_elem_bits(struct ac_llvm_context *ctx, LLVMTypeRef type)
169 {
170 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
171 type = LLVMGetElementType(type);
172
173 if (LLVMGetTypeKind(type) == LLVMIntegerTypeKind)
174 return LLVMGetIntTypeWidth(type);
175
176 if (LLVMGetTypeKind(type) == LLVMPointerTypeKind) {
177 if (LLVMGetPointerAddressSpace(type) == AC_ADDR_SPACE_LDS)
178 return 32;
179 }
180
181 if (type == ctx->f16)
182 return 16;
183 if (type == ctx->f32)
184 return 32;
185 if (type == ctx->f64)
186 return 64;
187
188 unreachable("Unhandled type kind in get_elem_bits");
189 }
190
191 unsigned
192 ac_get_type_size(LLVMTypeRef type)
193 {
194 LLVMTypeKind kind = LLVMGetTypeKind(type);
195
196 switch (kind) {
197 case LLVMIntegerTypeKind:
198 return LLVMGetIntTypeWidth(type) / 8;
199 case LLVMHalfTypeKind:
200 return 2;
201 case LLVMFloatTypeKind:
202 return 4;
203 case LLVMDoubleTypeKind:
204 return 8;
205 case LLVMPointerTypeKind:
206 if (LLVMGetPointerAddressSpace(type) == AC_ADDR_SPACE_CONST_32BIT)
207 return 4;
208 return 8;
209 case LLVMVectorTypeKind:
210 return LLVMGetVectorSize(type) *
211 ac_get_type_size(LLVMGetElementType(type));
212 case LLVMArrayTypeKind:
213 return LLVMGetArrayLength(type) *
214 ac_get_type_size(LLVMGetElementType(type));
215 default:
216 assert(0);
217 return 0;
218 }
219 }
220
221 static LLVMTypeRef to_integer_type_scalar(struct ac_llvm_context *ctx, LLVMTypeRef t)
222 {
223 if (t == ctx->i8)
224 return ctx->i8;
225 else if (t == ctx->f16 || t == ctx->i16)
226 return ctx->i16;
227 else if (t == ctx->f32 || t == ctx->i32)
228 return ctx->i32;
229 else if (t == ctx->f64 || t == ctx->i64)
230 return ctx->i64;
231 else
232 unreachable("Unhandled integer size");
233 }
234
235 LLVMTypeRef
236 ac_to_integer_type(struct ac_llvm_context *ctx, LLVMTypeRef t)
237 {
238 if (LLVMGetTypeKind(t) == LLVMVectorTypeKind) {
239 LLVMTypeRef elem_type = LLVMGetElementType(t);
240 return LLVMVectorType(to_integer_type_scalar(ctx, elem_type),
241 LLVMGetVectorSize(t));
242 }
243 if (LLVMGetTypeKind(t) == LLVMPointerTypeKind) {
244 switch (LLVMGetPointerAddressSpace(t)) {
245 case AC_ADDR_SPACE_GLOBAL:
246 return ctx->i64;
247 case AC_ADDR_SPACE_CONST_32BIT:
248 case AC_ADDR_SPACE_LDS:
249 return ctx->i32;
250 default:
251 unreachable("unhandled address space");
252 }
253 }
254 return to_integer_type_scalar(ctx, t);
255 }
256
257 LLVMValueRef
258 ac_to_integer(struct ac_llvm_context *ctx, LLVMValueRef v)
259 {
260 LLVMTypeRef type = LLVMTypeOf(v);
261 if (LLVMGetTypeKind(type) == LLVMPointerTypeKind) {
262 return LLVMBuildPtrToInt(ctx->builder, v, ac_to_integer_type(ctx, type), "");
263 }
264 return LLVMBuildBitCast(ctx->builder, v, ac_to_integer_type(ctx, type), "");
265 }
266
267 LLVMValueRef
268 ac_to_integer_or_pointer(struct ac_llvm_context *ctx, LLVMValueRef v)
269 {
270 LLVMTypeRef type = LLVMTypeOf(v);
271 if (LLVMGetTypeKind(type) == LLVMPointerTypeKind)
272 return v;
273 return ac_to_integer(ctx, v);
274 }
275
276 static LLVMTypeRef to_float_type_scalar(struct ac_llvm_context *ctx, LLVMTypeRef t)
277 {
278 if (t == ctx->i8)
279 return ctx->i8;
280 else if (t == ctx->i16 || t == ctx->f16)
281 return ctx->f16;
282 else if (t == ctx->i32 || t == ctx->f32)
283 return ctx->f32;
284 else if (t == ctx->i64 || t == ctx->f64)
285 return ctx->f64;
286 else
287 unreachable("Unhandled float size");
288 }
289
290 LLVMTypeRef
291 ac_to_float_type(struct ac_llvm_context *ctx, LLVMTypeRef t)
292 {
293 if (LLVMGetTypeKind(t) == LLVMVectorTypeKind) {
294 LLVMTypeRef elem_type = LLVMGetElementType(t);
295 return LLVMVectorType(to_float_type_scalar(ctx, elem_type),
296 LLVMGetVectorSize(t));
297 }
298 return to_float_type_scalar(ctx, t);
299 }
300
301 LLVMValueRef
302 ac_to_float(struct ac_llvm_context *ctx, LLVMValueRef v)
303 {
304 LLVMTypeRef type = LLVMTypeOf(v);
305 return LLVMBuildBitCast(ctx->builder, v, ac_to_float_type(ctx, type), "");
306 }
307
308
309 LLVMValueRef
310 ac_build_intrinsic(struct ac_llvm_context *ctx, const char *name,
311 LLVMTypeRef return_type, LLVMValueRef *params,
312 unsigned param_count, unsigned attrib_mask)
313 {
314 LLVMValueRef function, call;
315 bool set_callsite_attrs = !(attrib_mask & AC_FUNC_ATTR_LEGACY);
316
317 function = LLVMGetNamedFunction(ctx->module, name);
318 if (!function) {
319 LLVMTypeRef param_types[32], function_type;
320 unsigned i;
321
322 assert(param_count <= 32);
323
324 for (i = 0; i < param_count; ++i) {
325 assert(params[i]);
326 param_types[i] = LLVMTypeOf(params[i]);
327 }
328 function_type =
329 LLVMFunctionType(return_type, param_types, param_count, 0);
330 function = LLVMAddFunction(ctx->module, name, function_type);
331
332 LLVMSetFunctionCallConv(function, LLVMCCallConv);
333 LLVMSetLinkage(function, LLVMExternalLinkage);
334
335 if (!set_callsite_attrs)
336 ac_add_func_attributes(ctx->context, function, attrib_mask);
337 }
338
339 call = LLVMBuildCall(ctx->builder, function, params, param_count, "");
340 if (set_callsite_attrs)
341 ac_add_func_attributes(ctx->context, call, attrib_mask);
342 return call;
343 }
344
345 /**
346 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
347 * intrinsic names).
348 */
349 void ac_build_type_name_for_intr(LLVMTypeRef type, char *buf, unsigned bufsize)
350 {
351 LLVMTypeRef elem_type = type;
352
353 assert(bufsize >= 8);
354
355 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
356 int ret = snprintf(buf, bufsize, "v%u",
357 LLVMGetVectorSize(type));
358 if (ret < 0) {
359 char *type_name = LLVMPrintTypeToString(type);
360 fprintf(stderr, "Error building type name for: %s\n",
361 type_name);
362 LLVMDisposeMessage(type_name);
363 return;
364 }
365 elem_type = LLVMGetElementType(type);
366 buf += ret;
367 bufsize -= ret;
368 }
369 switch (LLVMGetTypeKind(elem_type)) {
370 default: break;
371 case LLVMIntegerTypeKind:
372 snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type));
373 break;
374 case LLVMHalfTypeKind:
375 snprintf(buf, bufsize, "f16");
376 break;
377 case LLVMFloatTypeKind:
378 snprintf(buf, bufsize, "f32");
379 break;
380 case LLVMDoubleTypeKind:
381 snprintf(buf, bufsize, "f64");
382 break;
383 }
384 }
385
386 /**
387 * Helper function that builds an LLVM IR PHI node and immediately adds
388 * incoming edges.
389 */
390 LLVMValueRef
391 ac_build_phi(struct ac_llvm_context *ctx, LLVMTypeRef type,
392 unsigned count_incoming, LLVMValueRef *values,
393 LLVMBasicBlockRef *blocks)
394 {
395 LLVMValueRef phi = LLVMBuildPhi(ctx->builder, type, "");
396 LLVMAddIncoming(phi, values, blocks, count_incoming);
397 return phi;
398 }
399
400 void ac_build_s_barrier(struct ac_llvm_context *ctx)
401 {
402 ac_build_intrinsic(ctx, "llvm.amdgcn.s.barrier", ctx->voidt, NULL,
403 0, AC_FUNC_ATTR_CONVERGENT);
404 }
405
406 /* Prevent optimizations (at least of memory accesses) across the current
407 * point in the program by emitting empty inline assembly that is marked as
408 * having side effects.
409 *
410 * Optionally, a value can be passed through the inline assembly to prevent
411 * LLVM from hoisting calls to ReadNone functions.
412 */
413 void
414 ac_build_optimization_barrier(struct ac_llvm_context *ctx,
415 LLVMValueRef *pvgpr)
416 {
417 static int counter = 0;
418
419 LLVMBuilderRef builder = ctx->builder;
420 char code[16];
421
422 snprintf(code, sizeof(code), "; %d", p_atomic_inc_return(&counter));
423
424 if (!pvgpr) {
425 LLVMTypeRef ftype = LLVMFunctionType(ctx->voidt, NULL, 0, false);
426 LLVMValueRef inlineasm = LLVMConstInlineAsm(ftype, code, "", true, false);
427 LLVMBuildCall(builder, inlineasm, NULL, 0, "");
428 } else {
429 LLVMTypeRef ftype = LLVMFunctionType(ctx->i32, &ctx->i32, 1, false);
430 LLVMValueRef inlineasm = LLVMConstInlineAsm(ftype, code, "=v,0", true, false);
431 LLVMTypeRef type = LLVMTypeOf(*pvgpr);
432 unsigned bitsize = ac_get_elem_bits(ctx, type);
433 LLVMValueRef vgpr = *pvgpr;
434 LLVMTypeRef vgpr_type;
435 unsigned vgpr_size;
436 LLVMValueRef vgpr0;
437
438 if (bitsize < 32)
439 vgpr = LLVMBuildZExt(ctx->builder, vgpr, ctx->i32, "");
440
441 vgpr_type = LLVMTypeOf(vgpr);
442 vgpr_size = ac_get_type_size(vgpr_type);
443
444 assert(vgpr_size % 4 == 0);
445
446 vgpr = LLVMBuildBitCast(builder, vgpr, LLVMVectorType(ctx->i32, vgpr_size / 4), "");
447 vgpr0 = LLVMBuildExtractElement(builder, vgpr, ctx->i32_0, "");
448 vgpr0 = LLVMBuildCall(builder, inlineasm, &vgpr0, 1, "");
449 vgpr = LLVMBuildInsertElement(builder, vgpr, vgpr0, ctx->i32_0, "");
450 vgpr = LLVMBuildBitCast(builder, vgpr, vgpr_type, "");
451
452 if (bitsize < 32)
453 vgpr = LLVMBuildTrunc(builder, vgpr, type, "");
454
455 *pvgpr = vgpr;
456 }
457 }
458
459 LLVMValueRef
460 ac_build_shader_clock(struct ac_llvm_context *ctx)
461 {
462 LLVMValueRef tmp = ac_build_intrinsic(ctx, "llvm.amdgcn.s.memtime", ctx->i64, NULL, 0, 0);
463 return LLVMBuildBitCast(ctx->builder, tmp, ctx->v2i32, "");
464 }
465
466 LLVMValueRef
467 ac_build_ballot(struct ac_llvm_context *ctx,
468 LLVMValueRef value)
469 {
470 const char *name;
471
472 if (LLVM_VERSION_MAJOR >= 9) {
473 if (ctx->wave_size == 64)
474 name = "llvm.amdgcn.icmp.i64.i32";
475 else
476 name = "llvm.amdgcn.icmp.i32.i32";
477 } else {
478 name = "llvm.amdgcn.icmp.i32";
479 }
480 LLVMValueRef args[3] = {
481 value,
482 ctx->i32_0,
483 LLVMConstInt(ctx->i32, LLVMIntNE, 0)
484 };
485
486 /* We currently have no other way to prevent LLVM from lifting the icmp
487 * calls to a dominating basic block.
488 */
489 ac_build_optimization_barrier(ctx, &args[0]);
490
491 args[0] = ac_to_integer(ctx, args[0]);
492
493 return ac_build_intrinsic(ctx, name, ctx->iN_wavemask, args, 3,
494 AC_FUNC_ATTR_NOUNWIND |
495 AC_FUNC_ATTR_READNONE |
496 AC_FUNC_ATTR_CONVERGENT);
497 }
498
499 LLVMValueRef ac_get_i1_sgpr_mask(struct ac_llvm_context *ctx,
500 LLVMValueRef value)
501 {
502 const char *name;
503
504 if (LLVM_VERSION_MAJOR >= 9) {
505 if (ctx->wave_size == 64)
506 name = "llvm.amdgcn.icmp.i64.i1";
507 else
508 name = "llvm.amdgcn.icmp.i32.i1";
509 } else {
510 name = "llvm.amdgcn.icmp.i1";
511 }
512 LLVMValueRef args[3] = {
513 value,
514 ctx->i1false,
515 LLVMConstInt(ctx->i32, LLVMIntNE, 0),
516 };
517
518 return ac_build_intrinsic(ctx, name, ctx->iN_wavemask, args, 3,
519 AC_FUNC_ATTR_NOUNWIND |
520 AC_FUNC_ATTR_READNONE |
521 AC_FUNC_ATTR_CONVERGENT);
522 }
523
524 LLVMValueRef
525 ac_build_vote_all(struct ac_llvm_context *ctx, LLVMValueRef value)
526 {
527 LLVMValueRef active_set = ac_build_ballot(ctx, ctx->i32_1);
528 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
529 return LLVMBuildICmp(ctx->builder, LLVMIntEQ, vote_set, active_set, "");
530 }
531
532 LLVMValueRef
533 ac_build_vote_any(struct ac_llvm_context *ctx, LLVMValueRef value)
534 {
535 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
536 return LLVMBuildICmp(ctx->builder, LLVMIntNE, vote_set,
537 LLVMConstInt(ctx->iN_wavemask, 0, 0), "");
538 }
539
540 LLVMValueRef
541 ac_build_vote_eq(struct ac_llvm_context *ctx, LLVMValueRef value)
542 {
543 LLVMValueRef active_set = ac_build_ballot(ctx, ctx->i32_1);
544 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
545
546 LLVMValueRef all = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
547 vote_set, active_set, "");
548 LLVMValueRef none = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
549 vote_set,
550 LLVMConstInt(ctx->iN_wavemask, 0, 0), "");
551 return LLVMBuildOr(ctx->builder, all, none, "");
552 }
553
554 LLVMValueRef
555 ac_build_varying_gather_values(struct ac_llvm_context *ctx, LLVMValueRef *values,
556 unsigned value_count, unsigned component)
557 {
558 LLVMValueRef vec = NULL;
559
560 if (value_count == 1) {
561 return values[component];
562 } else if (!value_count)
563 unreachable("value_count is 0");
564
565 for (unsigned i = component; i < value_count + component; i++) {
566 LLVMValueRef value = values[i];
567
568 if (i == component)
569 vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
570 LLVMValueRef index = LLVMConstInt(ctx->i32, i - component, false);
571 vec = LLVMBuildInsertElement(ctx->builder, vec, value, index, "");
572 }
573 return vec;
574 }
575
576 LLVMValueRef
577 ac_build_gather_values_extended(struct ac_llvm_context *ctx,
578 LLVMValueRef *values,
579 unsigned value_count,
580 unsigned value_stride,
581 bool load,
582 bool always_vector)
583 {
584 LLVMBuilderRef builder = ctx->builder;
585 LLVMValueRef vec = NULL;
586 unsigned i;
587
588 if (value_count == 1 && !always_vector) {
589 if (load)
590 return LLVMBuildLoad(builder, values[0], "");
591 return values[0];
592 } else if (!value_count)
593 unreachable("value_count is 0");
594
595 for (i = 0; i < value_count; i++) {
596 LLVMValueRef value = values[i * value_stride];
597 if (load)
598 value = LLVMBuildLoad(builder, value, "");
599
600 if (!i)
601 vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
602 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
603 vec = LLVMBuildInsertElement(builder, vec, value, index, "");
604 }
605 return vec;
606 }
607
608 LLVMValueRef
609 ac_build_gather_values(struct ac_llvm_context *ctx,
610 LLVMValueRef *values,
611 unsigned value_count)
612 {
613 return ac_build_gather_values_extended(ctx, values, value_count, 1, false, false);
614 }
615
616 /* Expand a scalar or vector to <dst_channels x type> by filling the remaining
617 * channels with undef. Extract at most src_channels components from the input.
618 */
619 static LLVMValueRef
620 ac_build_expand(struct ac_llvm_context *ctx,
621 LLVMValueRef value,
622 unsigned src_channels,
623 unsigned dst_channels)
624 {
625 LLVMTypeRef elemtype;
626 LLVMValueRef chan[dst_channels];
627
628 if (LLVMGetTypeKind(LLVMTypeOf(value)) == LLVMVectorTypeKind) {
629 unsigned vec_size = LLVMGetVectorSize(LLVMTypeOf(value));
630
631 if (src_channels == dst_channels && vec_size == dst_channels)
632 return value;
633
634 src_channels = MIN2(src_channels, vec_size);
635
636 for (unsigned i = 0; i < src_channels; i++)
637 chan[i] = ac_llvm_extract_elem(ctx, value, i);
638
639 elemtype = LLVMGetElementType(LLVMTypeOf(value));
640 } else {
641 if (src_channels) {
642 assert(src_channels == 1);
643 chan[0] = value;
644 }
645 elemtype = LLVMTypeOf(value);
646 }
647
648 for (unsigned i = src_channels; i < dst_channels; i++)
649 chan[i] = LLVMGetUndef(elemtype);
650
651 return ac_build_gather_values(ctx, chan, dst_channels);
652 }
653
654 /* Extract components [start, start + channels) from a vector.
655 */
656 LLVMValueRef
657 ac_extract_components(struct ac_llvm_context *ctx,
658 LLVMValueRef value,
659 unsigned start,
660 unsigned channels)
661 {
662 LLVMValueRef chan[channels];
663
664 for (unsigned i = 0; i < channels; i++)
665 chan[i] = ac_llvm_extract_elem(ctx, value, i + start);
666
667 return ac_build_gather_values(ctx, chan, channels);
668 }
669
670 /* Expand a scalar or vector to <4 x type> by filling the remaining channels
671 * with undef. Extract at most num_channels components from the input.
672 */
673 LLVMValueRef ac_build_expand_to_vec4(struct ac_llvm_context *ctx,
674 LLVMValueRef value,
675 unsigned num_channels)
676 {
677 return ac_build_expand(ctx, value, num_channels, 4);
678 }
679
680 LLVMValueRef ac_build_round(struct ac_llvm_context *ctx, LLVMValueRef value)
681 {
682 unsigned type_size = ac_get_type_size(LLVMTypeOf(value));
683 const char *name;
684
685 if (type_size == 2)
686 name = "llvm.rint.f16";
687 else if (type_size == 4)
688 name = "llvm.rint.f32";
689 else
690 name = "llvm.rint.f64";
691
692 return ac_build_intrinsic(ctx, name, LLVMTypeOf(value), &value, 1,
693 AC_FUNC_ATTR_READNONE);
694 }
695
696 LLVMValueRef
697 ac_build_fdiv(struct ac_llvm_context *ctx,
698 LLVMValueRef num,
699 LLVMValueRef den)
700 {
701 unsigned type_size = ac_get_type_size(LLVMTypeOf(den));
702 const char *name;
703
704 if (type_size == 2)
705 name = "llvm.amdgcn.rcp.f16";
706 else if (type_size == 4)
707 name = "llvm.amdgcn.rcp.f32";
708 else
709 name = "llvm.amdgcn.rcp.f64";
710
711 LLVMValueRef rcp = ac_build_intrinsic(ctx, name, LLVMTypeOf(den),
712 &den, 1, AC_FUNC_ATTR_READNONE);
713
714 return LLVMBuildFMul(ctx->builder, num, rcp, "");
715 }
716
717 /* See fast_idiv_by_const.h. */
718 /* Set: increment = util_fast_udiv_info::increment ? multiplier : 0; */
719 LLVMValueRef ac_build_fast_udiv(struct ac_llvm_context *ctx,
720 LLVMValueRef num,
721 LLVMValueRef multiplier,
722 LLVMValueRef pre_shift,
723 LLVMValueRef post_shift,
724 LLVMValueRef increment)
725 {
726 LLVMBuilderRef builder = ctx->builder;
727
728 num = LLVMBuildLShr(builder, num, pre_shift, "");
729 num = LLVMBuildMul(builder,
730 LLVMBuildZExt(builder, num, ctx->i64, ""),
731 LLVMBuildZExt(builder, multiplier, ctx->i64, ""), "");
732 num = LLVMBuildAdd(builder, num,
733 LLVMBuildZExt(builder, increment, ctx->i64, ""), "");
734 num = LLVMBuildLShr(builder, num, LLVMConstInt(ctx->i64, 32, 0), "");
735 num = LLVMBuildTrunc(builder, num, ctx->i32, "");
736 return LLVMBuildLShr(builder, num, post_shift, "");
737 }
738
739 /* See fast_idiv_by_const.h. */
740 /* If num != UINT_MAX, this more efficient version can be used. */
741 /* Set: increment = util_fast_udiv_info::increment; */
742 LLVMValueRef ac_build_fast_udiv_nuw(struct ac_llvm_context *ctx,
743 LLVMValueRef num,
744 LLVMValueRef multiplier,
745 LLVMValueRef pre_shift,
746 LLVMValueRef post_shift,
747 LLVMValueRef increment)
748 {
749 LLVMBuilderRef builder = ctx->builder;
750
751 num = LLVMBuildLShr(builder, num, pre_shift, "");
752 num = LLVMBuildNUWAdd(builder, num, increment, "");
753 num = LLVMBuildMul(builder,
754 LLVMBuildZExt(builder, num, ctx->i64, ""),
755 LLVMBuildZExt(builder, multiplier, ctx->i64, ""), "");
756 num = LLVMBuildLShr(builder, num, LLVMConstInt(ctx->i64, 32, 0), "");
757 num = LLVMBuildTrunc(builder, num, ctx->i32, "");
758 return LLVMBuildLShr(builder, num, post_shift, "");
759 }
760
761 /* See fast_idiv_by_const.h. */
762 /* Both operands must fit in 31 bits and the divisor must not be 1. */
763 LLVMValueRef ac_build_fast_udiv_u31_d_not_one(struct ac_llvm_context *ctx,
764 LLVMValueRef num,
765 LLVMValueRef multiplier,
766 LLVMValueRef post_shift)
767 {
768 LLVMBuilderRef builder = ctx->builder;
769
770 num = LLVMBuildMul(builder,
771 LLVMBuildZExt(builder, num, ctx->i64, ""),
772 LLVMBuildZExt(builder, multiplier, ctx->i64, ""), "");
773 num = LLVMBuildLShr(builder, num, LLVMConstInt(ctx->i64, 32, 0), "");
774 num = LLVMBuildTrunc(builder, num, ctx->i32, "");
775 return LLVMBuildLShr(builder, num, post_shift, "");
776 }
777
778 /* Coordinates for cube map selection. sc, tc, and ma are as in Table 8.27
779 * of the OpenGL 4.5 (Compatibility Profile) specification, except ma is
780 * already multiplied by two. id is the cube face number.
781 */
782 struct cube_selection_coords {
783 LLVMValueRef stc[2];
784 LLVMValueRef ma;
785 LLVMValueRef id;
786 };
787
788 static void
789 build_cube_intrinsic(struct ac_llvm_context *ctx,
790 LLVMValueRef in[3],
791 struct cube_selection_coords *out)
792 {
793 LLVMTypeRef f32 = ctx->f32;
794
795 out->stc[1] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubetc",
796 f32, in, 3, AC_FUNC_ATTR_READNONE);
797 out->stc[0] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubesc",
798 f32, in, 3, AC_FUNC_ATTR_READNONE);
799 out->ma = ac_build_intrinsic(ctx, "llvm.amdgcn.cubema",
800 f32, in, 3, AC_FUNC_ATTR_READNONE);
801 out->id = ac_build_intrinsic(ctx, "llvm.amdgcn.cubeid",
802 f32, in, 3, AC_FUNC_ATTR_READNONE);
803 }
804
805 /**
806 * Build a manual selection sequence for cube face sc/tc coordinates and
807 * major axis vector (multiplied by 2 for consistency) for the given
808 * vec3 \p coords, for the face implied by \p selcoords.
809 *
810 * For the major axis, we always adjust the sign to be in the direction of
811 * selcoords.ma; i.e., a positive out_ma means that coords is pointed towards
812 * the selcoords major axis.
813 */
814 static void build_cube_select(struct ac_llvm_context *ctx,
815 const struct cube_selection_coords *selcoords,
816 const LLVMValueRef *coords,
817 LLVMValueRef *out_st,
818 LLVMValueRef *out_ma)
819 {
820 LLVMBuilderRef builder = ctx->builder;
821 LLVMTypeRef f32 = LLVMTypeOf(coords[0]);
822 LLVMValueRef is_ma_positive;
823 LLVMValueRef sgn_ma;
824 LLVMValueRef is_ma_z, is_not_ma_z;
825 LLVMValueRef is_ma_y;
826 LLVMValueRef is_ma_x;
827 LLVMValueRef sgn;
828 LLVMValueRef tmp;
829
830 is_ma_positive = LLVMBuildFCmp(builder, LLVMRealUGE,
831 selcoords->ma, LLVMConstReal(f32, 0.0), "");
832 sgn_ma = LLVMBuildSelect(builder, is_ma_positive,
833 LLVMConstReal(f32, 1.0), LLVMConstReal(f32, -1.0), "");
834
835 is_ma_z = LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 4.0), "");
836 is_not_ma_z = LLVMBuildNot(builder, is_ma_z, "");
837 is_ma_y = LLVMBuildAnd(builder, is_not_ma_z,
838 LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 2.0), ""), "");
839 is_ma_x = LLVMBuildAnd(builder, is_not_ma_z, LLVMBuildNot(builder, is_ma_y, ""), "");
840
841 /* Select sc */
842 tmp = LLVMBuildSelect(builder, is_ma_x, coords[2], coords[0], "");
843 sgn = LLVMBuildSelect(builder, is_ma_y, LLVMConstReal(f32, 1.0),
844 LLVMBuildSelect(builder, is_ma_z, sgn_ma,
845 LLVMBuildFNeg(builder, sgn_ma, ""), ""), "");
846 out_st[0] = LLVMBuildFMul(builder, tmp, sgn, "");
847
848 /* Select tc */
849 tmp = LLVMBuildSelect(builder, is_ma_y, coords[2], coords[1], "");
850 sgn = LLVMBuildSelect(builder, is_ma_y, sgn_ma,
851 LLVMConstReal(f32, -1.0), "");
852 out_st[1] = LLVMBuildFMul(builder, tmp, sgn, "");
853
854 /* Select ma */
855 tmp = LLVMBuildSelect(builder, is_ma_z, coords[2],
856 LLVMBuildSelect(builder, is_ma_y, coords[1], coords[0], ""), "");
857 tmp = ac_build_intrinsic(ctx, "llvm.fabs.f32",
858 ctx->f32, &tmp, 1, AC_FUNC_ATTR_READNONE);
859 *out_ma = LLVMBuildFMul(builder, tmp, LLVMConstReal(f32, 2.0), "");
860 }
861
862 void
863 ac_prepare_cube_coords(struct ac_llvm_context *ctx,
864 bool is_deriv, bool is_array, bool is_lod,
865 LLVMValueRef *coords_arg,
866 LLVMValueRef *derivs_arg)
867 {
868
869 LLVMBuilderRef builder = ctx->builder;
870 struct cube_selection_coords selcoords;
871 LLVMValueRef coords[3];
872 LLVMValueRef invma;
873
874 if (is_array && !is_lod) {
875 LLVMValueRef tmp = ac_build_round(ctx, coords_arg[3]);
876
877 /* Section 8.9 (Texture Functions) of the GLSL 4.50 spec says:
878 *
879 * "For Array forms, the array layer used will be
880 *
881 * max(0, min(d−1, floor(layer+0.5)))
882 *
883 * where d is the depth of the texture array and layer
884 * comes from the component indicated in the tables below.
885 * Workaroudn for an issue where the layer is taken from a
886 * helper invocation which happens to fall on a different
887 * layer due to extrapolation."
888 *
889 * GFX8 and earlier attempt to implement this in hardware by
890 * clamping the value of coords[2] = (8 * layer) + face.
891 * Unfortunately, this means that the we end up with the wrong
892 * face when clamping occurs.
893 *
894 * Clamp the layer earlier to work around the issue.
895 */
896 if (ctx->chip_class <= GFX8) {
897 LLVMValueRef ge0;
898 ge0 = LLVMBuildFCmp(builder, LLVMRealOGE, tmp, ctx->f32_0, "");
899 tmp = LLVMBuildSelect(builder, ge0, tmp, ctx->f32_0, "");
900 }
901
902 coords_arg[3] = tmp;
903 }
904
905 build_cube_intrinsic(ctx, coords_arg, &selcoords);
906
907 invma = ac_build_intrinsic(ctx, "llvm.fabs.f32",
908 ctx->f32, &selcoords.ma, 1, AC_FUNC_ATTR_READNONE);
909 invma = ac_build_fdiv(ctx, LLVMConstReal(ctx->f32, 1.0), invma);
910
911 for (int i = 0; i < 2; ++i)
912 coords[i] = LLVMBuildFMul(builder, selcoords.stc[i], invma, "");
913
914 coords[2] = selcoords.id;
915
916 if (is_deriv && derivs_arg) {
917 LLVMValueRef derivs[4];
918 int axis;
919
920 /* Convert cube derivatives to 2D derivatives. */
921 for (axis = 0; axis < 2; axis++) {
922 LLVMValueRef deriv_st[2];
923 LLVMValueRef deriv_ma;
924
925 /* Transform the derivative alongside the texture
926 * coordinate. Mathematically, the correct formula is
927 * as follows. Assume we're projecting onto the +Z face
928 * and denote by dx/dh the derivative of the (original)
929 * X texture coordinate with respect to horizontal
930 * window coordinates. The projection onto the +Z face
931 * plane is:
932 *
933 * f(x,z) = x/z
934 *
935 * Then df/dh = df/dx * dx/dh + df/dz * dz/dh
936 * = 1/z * dx/dh - x/z * 1/z * dz/dh.
937 *
938 * This motivatives the implementation below.
939 *
940 * Whether this actually gives the expected results for
941 * apps that might feed in derivatives obtained via
942 * finite differences is anyone's guess. The OpenGL spec
943 * seems awfully quiet about how textureGrad for cube
944 * maps should be handled.
945 */
946 build_cube_select(ctx, &selcoords, &derivs_arg[axis * 3],
947 deriv_st, &deriv_ma);
948
949 deriv_ma = LLVMBuildFMul(builder, deriv_ma, invma, "");
950
951 for (int i = 0; i < 2; ++i)
952 derivs[axis * 2 + i] =
953 LLVMBuildFSub(builder,
954 LLVMBuildFMul(builder, deriv_st[i], invma, ""),
955 LLVMBuildFMul(builder, deriv_ma, coords[i], ""), "");
956 }
957
958 memcpy(derivs_arg, derivs, sizeof(derivs));
959 }
960
961 /* Shift the texture coordinate. This must be applied after the
962 * derivative calculation.
963 */
964 for (int i = 0; i < 2; ++i)
965 coords[i] = LLVMBuildFAdd(builder, coords[i], LLVMConstReal(ctx->f32, 1.5), "");
966
967 if (is_array) {
968 /* for cube arrays coord.z = coord.w(array_index) * 8 + face */
969 /* coords_arg.w component - array_index for cube arrays */
970 coords[2] = ac_build_fmad(ctx, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), coords[2]);
971 }
972
973 memcpy(coords_arg, coords, sizeof(coords));
974 }
975
976
977 LLVMValueRef
978 ac_build_fs_interp(struct ac_llvm_context *ctx,
979 LLVMValueRef llvm_chan,
980 LLVMValueRef attr_number,
981 LLVMValueRef params,
982 LLVMValueRef i,
983 LLVMValueRef j)
984 {
985 LLVMValueRef args[5];
986 LLVMValueRef p1;
987
988 args[0] = i;
989 args[1] = llvm_chan;
990 args[2] = attr_number;
991 args[3] = params;
992
993 p1 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p1",
994 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
995
996 args[0] = p1;
997 args[1] = j;
998 args[2] = llvm_chan;
999 args[3] = attr_number;
1000 args[4] = params;
1001
1002 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p2",
1003 ctx->f32, args, 5, AC_FUNC_ATTR_READNONE);
1004 }
1005
1006 LLVMValueRef
1007 ac_build_fs_interp_f16(struct ac_llvm_context *ctx,
1008 LLVMValueRef llvm_chan,
1009 LLVMValueRef attr_number,
1010 LLVMValueRef params,
1011 LLVMValueRef i,
1012 LLVMValueRef j)
1013 {
1014 LLVMValueRef args[6];
1015 LLVMValueRef p1;
1016
1017 args[0] = i;
1018 args[1] = llvm_chan;
1019 args[2] = attr_number;
1020 args[3] = ctx->i1false;
1021 args[4] = params;
1022
1023 p1 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p1.f16",
1024 ctx->f32, args, 5, AC_FUNC_ATTR_READNONE);
1025
1026 args[0] = p1;
1027 args[1] = j;
1028 args[2] = llvm_chan;
1029 args[3] = attr_number;
1030 args[4] = ctx->i1false;
1031 args[5] = params;
1032
1033 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p2.f16",
1034 ctx->f16, args, 6, AC_FUNC_ATTR_READNONE);
1035 }
1036
1037 LLVMValueRef
1038 ac_build_fs_interp_mov(struct ac_llvm_context *ctx,
1039 LLVMValueRef parameter,
1040 LLVMValueRef llvm_chan,
1041 LLVMValueRef attr_number,
1042 LLVMValueRef params)
1043 {
1044 LLVMValueRef args[4];
1045
1046 args[0] = parameter;
1047 args[1] = llvm_chan;
1048 args[2] = attr_number;
1049 args[3] = params;
1050
1051 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.mov",
1052 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
1053 }
1054
1055 LLVMValueRef
1056 ac_build_gep_ptr(struct ac_llvm_context *ctx,
1057 LLVMValueRef base_ptr,
1058 LLVMValueRef index)
1059 {
1060 return LLVMBuildGEP(ctx->builder, base_ptr, &index, 1, "");
1061 }
1062
1063 LLVMValueRef
1064 ac_build_gep0(struct ac_llvm_context *ctx,
1065 LLVMValueRef base_ptr,
1066 LLVMValueRef index)
1067 {
1068 LLVMValueRef indices[2] = {
1069 ctx->i32_0,
1070 index,
1071 };
1072 return LLVMBuildGEP(ctx->builder, base_ptr, indices, 2, "");
1073 }
1074
1075 LLVMValueRef ac_build_pointer_add(struct ac_llvm_context *ctx, LLVMValueRef ptr,
1076 LLVMValueRef index)
1077 {
1078 return LLVMBuildPointerCast(ctx->builder,
1079 LLVMBuildGEP(ctx->builder, ptr, &index, 1, ""),
1080 LLVMTypeOf(ptr), "");
1081 }
1082
1083 void
1084 ac_build_indexed_store(struct ac_llvm_context *ctx,
1085 LLVMValueRef base_ptr, LLVMValueRef index,
1086 LLVMValueRef value)
1087 {
1088 LLVMBuildStore(ctx->builder, value,
1089 ac_build_gep0(ctx, base_ptr, index));
1090 }
1091
1092 /**
1093 * Build an LLVM bytecode indexed load using LLVMBuildGEP + LLVMBuildLoad.
1094 * It's equivalent to doing a load from &base_ptr[index].
1095 *
1096 * \param base_ptr Where the array starts.
1097 * \param index The element index into the array.
1098 * \param uniform Whether the base_ptr and index can be assumed to be
1099 * dynamically uniform (i.e. load to an SGPR)
1100 * \param invariant Whether the load is invariant (no other opcodes affect it)
1101 * \param no_unsigned_wraparound
1102 * For all possible re-associations and re-distributions of an expression
1103 * "base_ptr + index * elemsize" into "addr + offset" (excluding GEPs
1104 * without inbounds in base_ptr), this parameter is true if "addr + offset"
1105 * does not result in an unsigned integer wraparound. This is used for
1106 * optimal code generation of 32-bit pointer arithmetic.
1107 *
1108 * For example, a 32-bit immediate offset that causes a 32-bit unsigned
1109 * integer wraparound can't be an imm offset in s_load_dword, because
1110 * the instruction performs "addr + offset" in 64 bits.
1111 *
1112 * Expected usage for bindless textures by chaining GEPs:
1113 * // possible unsigned wraparound, don't use InBounds:
1114 * ptr1 = LLVMBuildGEP(base_ptr, index);
1115 * image = load(ptr1); // becomes "s_load ptr1, 0"
1116 *
1117 * ptr2 = LLVMBuildInBoundsGEP(ptr1, 32 / elemsize);
1118 * sampler = load(ptr2); // becomes "s_load ptr1, 32" thanks to InBounds
1119 */
1120 static LLVMValueRef
1121 ac_build_load_custom(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
1122 LLVMValueRef index, bool uniform, bool invariant,
1123 bool no_unsigned_wraparound)
1124 {
1125 LLVMValueRef pointer, result;
1126
1127 if (no_unsigned_wraparound &&
1128 LLVMGetPointerAddressSpace(LLVMTypeOf(base_ptr)) == AC_ADDR_SPACE_CONST_32BIT)
1129 pointer = LLVMBuildInBoundsGEP(ctx->builder, base_ptr, &index, 1, "");
1130 else
1131 pointer = LLVMBuildGEP(ctx->builder, base_ptr, &index, 1, "");
1132
1133 if (uniform)
1134 LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
1135 result = LLVMBuildLoad(ctx->builder, pointer, "");
1136 if (invariant)
1137 LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
1138 return result;
1139 }
1140
1141 LLVMValueRef ac_build_load(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
1142 LLVMValueRef index)
1143 {
1144 return ac_build_load_custom(ctx, base_ptr, index, false, false, false);
1145 }
1146
1147 LLVMValueRef ac_build_load_invariant(struct ac_llvm_context *ctx,
1148 LLVMValueRef base_ptr, LLVMValueRef index)
1149 {
1150 return ac_build_load_custom(ctx, base_ptr, index, false, true, false);
1151 }
1152
1153 /* This assumes that there is no unsigned integer wraparound during the address
1154 * computation, excluding all GEPs within base_ptr. */
1155 LLVMValueRef ac_build_load_to_sgpr(struct ac_llvm_context *ctx,
1156 LLVMValueRef base_ptr, LLVMValueRef index)
1157 {
1158 return ac_build_load_custom(ctx, base_ptr, index, true, true, true);
1159 }
1160
1161 /* See ac_build_load_custom() documentation. */
1162 LLVMValueRef ac_build_load_to_sgpr_uint_wraparound(struct ac_llvm_context *ctx,
1163 LLVMValueRef base_ptr, LLVMValueRef index)
1164 {
1165 return ac_build_load_custom(ctx, base_ptr, index, true, true, false);
1166 }
1167
1168 static unsigned get_load_cache_policy(struct ac_llvm_context *ctx,
1169 unsigned cache_policy)
1170 {
1171 return cache_policy |
1172 (ctx->chip_class >= GFX10 && cache_policy & ac_glc ? ac_dlc : 0);
1173 }
1174
1175 static void
1176 ac_build_buffer_store_common(struct ac_llvm_context *ctx,
1177 LLVMValueRef rsrc,
1178 LLVMValueRef data,
1179 LLVMValueRef vindex,
1180 LLVMValueRef voffset,
1181 LLVMValueRef soffset,
1182 unsigned num_channels,
1183 LLVMTypeRef return_channel_type,
1184 unsigned cache_policy,
1185 bool use_format,
1186 bool structurized)
1187 {
1188 LLVMValueRef args[6];
1189 int idx = 0;
1190 args[idx++] = data;
1191 args[idx++] = LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, "");
1192 if (structurized)
1193 args[idx++] = vindex ? vindex : ctx->i32_0;
1194 args[idx++] = voffset ? voffset : ctx->i32_0;
1195 args[idx++] = soffset ? soffset : ctx->i32_0;
1196 args[idx++] = LLVMConstInt(ctx->i32, cache_policy, 0);
1197 unsigned func = !ac_has_vec3_support(ctx->chip_class, use_format) && num_channels == 3 ? 4 : num_channels;
1198 const char *indexing_kind = structurized ? "struct" : "raw";
1199 char name[256], type_name[8];
1200
1201 LLVMTypeRef type = func > 1 ? LLVMVectorType(return_channel_type, func) : return_channel_type;
1202 ac_build_type_name_for_intr(type, type_name, sizeof(type_name));
1203
1204 if (use_format) {
1205 snprintf(name, sizeof(name), "llvm.amdgcn.%s.buffer.store.format.%s",
1206 indexing_kind, type_name);
1207 } else {
1208 snprintf(name, sizeof(name), "llvm.amdgcn.%s.buffer.store.%s",
1209 indexing_kind, type_name);
1210 }
1211
1212 ac_build_intrinsic(ctx, name, ctx->voidt, args, idx,
1213 AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY);
1214 }
1215
1216 void
1217 ac_build_buffer_store_format(struct ac_llvm_context *ctx,
1218 LLVMValueRef rsrc,
1219 LLVMValueRef data,
1220 LLVMValueRef vindex,
1221 LLVMValueRef voffset,
1222 unsigned num_channels,
1223 unsigned cache_policy)
1224 {
1225 ac_build_buffer_store_common(ctx, rsrc, data, vindex,
1226 voffset, NULL, num_channels,
1227 ctx->f32, cache_policy,
1228 true, true);
1229 }
1230
1231 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by num_channels=1..4.
1232 * The type of vdata must be one of i32 (num_channels=1), v2i32 (num_channels=2),
1233 * or v4i32 (num_channels=3,4).
1234 */
1235 void
1236 ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
1237 LLVMValueRef rsrc,
1238 LLVMValueRef vdata,
1239 unsigned num_channels,
1240 LLVMValueRef voffset,
1241 LLVMValueRef soffset,
1242 unsigned inst_offset,
1243 unsigned cache_policy)
1244 {
1245 /* Split 3 channel stores, because only LLVM 9+ support 3-channel
1246 * intrinsics. */
1247 if (num_channels == 3 && !ac_has_vec3_support(ctx->chip_class, false)) {
1248 LLVMValueRef v[3], v01;
1249
1250 for (int i = 0; i < 3; i++) {
1251 v[i] = LLVMBuildExtractElement(ctx->builder, vdata,
1252 LLVMConstInt(ctx->i32, i, 0), "");
1253 }
1254 v01 = ac_build_gather_values(ctx, v, 2);
1255
1256 ac_build_buffer_store_dword(ctx, rsrc, v01, 2, voffset,
1257 soffset, inst_offset, cache_policy);
1258 ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, voffset,
1259 soffset, inst_offset + 8,
1260 cache_policy);
1261 return;
1262 }
1263
1264 /* SWIZZLE_ENABLE requires that soffset isn't folded into voffset
1265 * (voffset is swizzled, but soffset isn't swizzled).
1266 * llvm.amdgcn.buffer.store doesn't have a separate soffset parameter.
1267 */
1268 if (!(cache_policy & ac_swizzled)) {
1269 LLVMValueRef offset = soffset;
1270
1271 if (inst_offset)
1272 offset = LLVMBuildAdd(ctx->builder, offset,
1273 LLVMConstInt(ctx->i32, inst_offset, 0), "");
1274
1275 ac_build_buffer_store_common(ctx, rsrc, ac_to_float(ctx, vdata),
1276 ctx->i32_0, voffset, offset,
1277 num_channels, ctx->f32,
1278 cache_policy, false, false);
1279 return;
1280 }
1281
1282 static const unsigned dfmts[] = {
1283 V_008F0C_BUF_DATA_FORMAT_32,
1284 V_008F0C_BUF_DATA_FORMAT_32_32,
1285 V_008F0C_BUF_DATA_FORMAT_32_32_32,
1286 V_008F0C_BUF_DATA_FORMAT_32_32_32_32
1287 };
1288 unsigned dfmt = dfmts[num_channels - 1];
1289 unsigned nfmt = V_008F0C_BUF_NUM_FORMAT_UINT;
1290 LLVMValueRef immoffset = LLVMConstInt(ctx->i32, inst_offset, 0);
1291
1292 ac_build_raw_tbuffer_store(ctx, rsrc, vdata, voffset, soffset,
1293 immoffset, num_channels, dfmt, nfmt, cache_policy);
1294 }
1295
1296 static LLVMValueRef
1297 ac_build_buffer_load_common(struct ac_llvm_context *ctx,
1298 LLVMValueRef rsrc,
1299 LLVMValueRef vindex,
1300 LLVMValueRef voffset,
1301 LLVMValueRef soffset,
1302 unsigned num_channels,
1303 LLVMTypeRef channel_type,
1304 unsigned cache_policy,
1305 bool can_speculate,
1306 bool use_format,
1307 bool structurized)
1308 {
1309 LLVMValueRef args[5];
1310 int idx = 0;
1311 args[idx++] = LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, "");
1312 if (structurized)
1313 args[idx++] = vindex ? vindex : ctx->i32_0;
1314 args[idx++] = voffset ? voffset : ctx->i32_0;
1315 args[idx++] = soffset ? soffset : ctx->i32_0;
1316 args[idx++] = LLVMConstInt(ctx->i32, get_load_cache_policy(ctx, cache_policy), 0);
1317 unsigned func = !ac_has_vec3_support(ctx->chip_class, use_format) && num_channels == 3 ? 4 : num_channels;
1318 const char *indexing_kind = structurized ? "struct" : "raw";
1319 char name[256], type_name[8];
1320
1321 LLVMTypeRef type = func > 1 ? LLVMVectorType(channel_type, func) : channel_type;
1322 ac_build_type_name_for_intr(type, type_name, sizeof(type_name));
1323
1324 if (use_format) {
1325 snprintf(name, sizeof(name), "llvm.amdgcn.%s.buffer.load.format.%s",
1326 indexing_kind, type_name);
1327 } else {
1328 snprintf(name, sizeof(name), "llvm.amdgcn.%s.buffer.load.%s",
1329 indexing_kind, type_name);
1330 }
1331
1332 return ac_build_intrinsic(ctx, name, type, args, idx,
1333 ac_get_load_intr_attribs(can_speculate));
1334 }
1335
1336 LLVMValueRef
1337 ac_build_buffer_load(struct ac_llvm_context *ctx,
1338 LLVMValueRef rsrc,
1339 int num_channels,
1340 LLVMValueRef vindex,
1341 LLVMValueRef voffset,
1342 LLVMValueRef soffset,
1343 unsigned inst_offset,
1344 unsigned cache_policy,
1345 bool can_speculate,
1346 bool allow_smem)
1347 {
1348 LLVMValueRef offset = LLVMConstInt(ctx->i32, inst_offset, 0);
1349 if (voffset)
1350 offset = LLVMBuildAdd(ctx->builder, offset, voffset, "");
1351 if (soffset)
1352 offset = LLVMBuildAdd(ctx->builder, offset, soffset, "");
1353
1354 if (allow_smem && !(cache_policy & ac_slc) &&
1355 (!(cache_policy & ac_glc) || ctx->chip_class >= GFX8)) {
1356 assert(vindex == NULL);
1357
1358 LLVMValueRef result[8];
1359
1360 for (int i = 0; i < num_channels; i++) {
1361 if (i) {
1362 offset = LLVMBuildAdd(ctx->builder, offset,
1363 LLVMConstInt(ctx->i32, 4, 0), "");
1364 }
1365 LLVMValueRef args[3] = {
1366 rsrc,
1367 offset,
1368 LLVMConstInt(ctx->i32, get_load_cache_policy(ctx, cache_policy), 0),
1369 };
1370 result[i] = ac_build_intrinsic(ctx,
1371 "llvm.amdgcn.s.buffer.load.f32",
1372 ctx->f32, args, 3,
1373 AC_FUNC_ATTR_READNONE);
1374 }
1375 if (num_channels == 1)
1376 return result[0];
1377
1378 if (num_channels == 3 && !ac_has_vec3_support(ctx->chip_class, false))
1379 result[num_channels++] = LLVMGetUndef(ctx->f32);
1380 return ac_build_gather_values(ctx, result, num_channels);
1381 }
1382
1383 return ac_build_buffer_load_common(ctx, rsrc, vindex,
1384 offset, ctx->i32_0,
1385 num_channels, ctx->f32,
1386 cache_policy,
1387 can_speculate, false, false);
1388 }
1389
1390 LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
1391 LLVMValueRef rsrc,
1392 LLVMValueRef vindex,
1393 LLVMValueRef voffset,
1394 unsigned num_channels,
1395 unsigned cache_policy,
1396 bool can_speculate)
1397 {
1398 return ac_build_buffer_load_common(ctx, rsrc, vindex, voffset,
1399 ctx->i32_0, num_channels, ctx->f32,
1400 cache_policy, can_speculate,
1401 true, true);
1402 }
1403
1404 static LLVMValueRef
1405 ac_build_tbuffer_load(struct ac_llvm_context *ctx,
1406 LLVMValueRef rsrc,
1407 LLVMValueRef vindex,
1408 LLVMValueRef voffset,
1409 LLVMValueRef soffset,
1410 LLVMValueRef immoffset,
1411 unsigned num_channels,
1412 unsigned dfmt,
1413 unsigned nfmt,
1414 unsigned cache_policy,
1415 bool can_speculate,
1416 bool structurized)
1417 {
1418 voffset = LLVMBuildAdd(ctx->builder, voffset, immoffset, "");
1419
1420 LLVMValueRef args[6];
1421 int idx = 0;
1422 args[idx++] = LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, "");
1423 if (structurized)
1424 args[idx++] = vindex ? vindex : ctx->i32_0;
1425 args[idx++] = voffset ? voffset : ctx->i32_0;
1426 args[idx++] = soffset ? soffset : ctx->i32_0;
1427 args[idx++] = LLVMConstInt(ctx->i32, ac_get_tbuffer_format(ctx->chip_class, dfmt, nfmt), 0);
1428 args[idx++] = LLVMConstInt(ctx->i32, get_load_cache_policy(ctx, cache_policy), 0);
1429 unsigned func = !ac_has_vec3_support(ctx->chip_class, true) && num_channels == 3 ? 4 : num_channels;
1430 const char *indexing_kind = structurized ? "struct" : "raw";
1431 char name[256], type_name[8];
1432
1433 LLVMTypeRef type = func > 1 ? LLVMVectorType(ctx->i32, func) : ctx->i32;
1434 ac_build_type_name_for_intr(type, type_name, sizeof(type_name));
1435
1436 snprintf(name, sizeof(name), "llvm.amdgcn.%s.tbuffer.load.%s",
1437 indexing_kind, type_name);
1438
1439 return ac_build_intrinsic(ctx, name, type, args, idx,
1440 ac_get_load_intr_attribs(can_speculate));
1441 }
1442
1443 LLVMValueRef
1444 ac_build_struct_tbuffer_load(struct ac_llvm_context *ctx,
1445 LLVMValueRef rsrc,
1446 LLVMValueRef vindex,
1447 LLVMValueRef voffset,
1448 LLVMValueRef soffset,
1449 LLVMValueRef immoffset,
1450 unsigned num_channels,
1451 unsigned dfmt,
1452 unsigned nfmt,
1453 unsigned cache_policy,
1454 bool can_speculate)
1455 {
1456 return ac_build_tbuffer_load(ctx, rsrc, vindex, voffset, soffset,
1457 immoffset, num_channels, dfmt, nfmt,
1458 cache_policy, can_speculate, true);
1459 }
1460
1461 LLVMValueRef
1462 ac_build_raw_tbuffer_load(struct ac_llvm_context *ctx,
1463 LLVMValueRef rsrc,
1464 LLVMValueRef voffset,
1465 LLVMValueRef soffset,
1466 LLVMValueRef immoffset,
1467 unsigned num_channels,
1468 unsigned dfmt,
1469 unsigned nfmt,
1470 unsigned cache_policy,
1471 bool can_speculate)
1472 {
1473 return ac_build_tbuffer_load(ctx, rsrc, NULL, voffset, soffset,
1474 immoffset, num_channels, dfmt, nfmt,
1475 cache_policy, can_speculate, false);
1476 }
1477
1478 LLVMValueRef
1479 ac_build_tbuffer_load_short(struct ac_llvm_context *ctx,
1480 LLVMValueRef rsrc,
1481 LLVMValueRef voffset,
1482 LLVMValueRef soffset,
1483 LLVMValueRef immoffset,
1484 unsigned cache_policy)
1485 {
1486 LLVMValueRef res;
1487
1488 if (LLVM_VERSION_MAJOR >= 9) {
1489 voffset = LLVMBuildAdd(ctx->builder, voffset, immoffset, "");
1490
1491 /* LLVM 9+ supports i8/i16 with struct/raw intrinsics. */
1492 res = ac_build_buffer_load_common(ctx, rsrc, NULL,
1493 voffset, soffset,
1494 1, ctx->i16, cache_policy,
1495 false, false, false);
1496 } else {
1497 unsigned dfmt = V_008F0C_BUF_DATA_FORMAT_16;
1498 unsigned nfmt = V_008F0C_BUF_NUM_FORMAT_UINT;
1499
1500 res = ac_build_raw_tbuffer_load(ctx, rsrc, voffset, soffset,
1501 immoffset, 1, dfmt, nfmt, cache_policy,
1502 false);
1503
1504 res = LLVMBuildTrunc(ctx->builder, res, ctx->i16, "");
1505 }
1506
1507 return res;
1508 }
1509
1510 LLVMValueRef
1511 ac_build_tbuffer_load_byte(struct ac_llvm_context *ctx,
1512 LLVMValueRef rsrc,
1513 LLVMValueRef voffset,
1514 LLVMValueRef soffset,
1515 LLVMValueRef immoffset,
1516 unsigned cache_policy)
1517 {
1518 LLVMValueRef res;
1519
1520 if (LLVM_VERSION_MAJOR >= 9) {
1521 voffset = LLVMBuildAdd(ctx->builder, voffset, immoffset, "");
1522
1523 /* LLVM 9+ supports i8/i16 with struct/raw intrinsics. */
1524 res = ac_build_buffer_load_common(ctx, rsrc, NULL,
1525 voffset, soffset,
1526 1, ctx->i8, cache_policy,
1527 false, false, false);
1528 } else {
1529 unsigned dfmt = V_008F0C_BUF_DATA_FORMAT_8;
1530 unsigned nfmt = V_008F0C_BUF_NUM_FORMAT_UINT;
1531
1532 res = ac_build_raw_tbuffer_load(ctx, rsrc, voffset, soffset,
1533 immoffset, 1, dfmt, nfmt, cache_policy,
1534 false);
1535
1536 res = LLVMBuildTrunc(ctx->builder, res, ctx->i8, "");
1537 }
1538
1539 return res;
1540 }
1541
1542 /**
1543 * Convert an 11- or 10-bit unsigned floating point number to an f32.
1544 *
1545 * The input exponent is expected to be biased analogous to IEEE-754, i.e. by
1546 * 2^(exp_bits-1) - 1 (as defined in OpenGL and other graphics APIs).
1547 */
1548 static LLVMValueRef
1549 ac_ufN_to_float(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned exp_bits, unsigned mant_bits)
1550 {
1551 assert(LLVMTypeOf(src) == ctx->i32);
1552
1553 LLVMValueRef tmp;
1554 LLVMValueRef mantissa;
1555 mantissa = LLVMBuildAnd(ctx->builder, src, LLVMConstInt(ctx->i32, (1 << mant_bits) - 1, false), "");
1556
1557 /* Converting normal numbers is just a shift + correcting the exponent bias */
1558 unsigned normal_shift = 23 - mant_bits;
1559 unsigned bias_shift = 127 - ((1 << (exp_bits - 1)) - 1);
1560 LLVMValueRef shifted, normal;
1561
1562 shifted = LLVMBuildShl(ctx->builder, src, LLVMConstInt(ctx->i32, normal_shift, false), "");
1563 normal = LLVMBuildAdd(ctx->builder, shifted, LLVMConstInt(ctx->i32, bias_shift << 23, false), "");
1564
1565 /* Converting nan/inf numbers is the same, but with a different exponent update */
1566 LLVMValueRef naninf;
1567 naninf = LLVMBuildOr(ctx->builder, normal, LLVMConstInt(ctx->i32, 0xff << 23, false), "");
1568
1569 /* Converting denormals is the complex case: determine the leading zeros of the
1570 * mantissa to obtain the correct shift for the mantissa and exponent correction.
1571 */
1572 LLVMValueRef denormal;
1573 LLVMValueRef params[2] = {
1574 mantissa,
1575 ctx->i1true, /* result can be undef when arg is 0 */
1576 };
1577 LLVMValueRef ctlz = ac_build_intrinsic(ctx, "llvm.ctlz.i32", ctx->i32,
1578 params, 2, AC_FUNC_ATTR_READNONE);
1579
1580 /* Shift such that the leading 1 ends up as the LSB of the exponent field. */
1581 tmp = LLVMBuildSub(ctx->builder, ctlz, LLVMConstInt(ctx->i32, 8, false), "");
1582 denormal = LLVMBuildShl(ctx->builder, mantissa, tmp, "");
1583
1584 unsigned denormal_exp = bias_shift + (32 - mant_bits) - 1;
1585 tmp = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, denormal_exp, false), ctlz, "");
1586 tmp = LLVMBuildShl(ctx->builder, tmp, LLVMConstInt(ctx->i32, 23, false), "");
1587 denormal = LLVMBuildAdd(ctx->builder, denormal, tmp, "");
1588
1589 /* Select the final result. */
1590 LLVMValueRef result;
1591
1592 tmp = LLVMBuildICmp(ctx->builder, LLVMIntUGE, src,
1593 LLVMConstInt(ctx->i32, ((1 << exp_bits) - 1) << mant_bits, false), "");
1594 result = LLVMBuildSelect(ctx->builder, tmp, naninf, normal, "");
1595
1596 tmp = LLVMBuildICmp(ctx->builder, LLVMIntUGE, src,
1597 LLVMConstInt(ctx->i32, 1 << mant_bits, false), "");
1598 result = LLVMBuildSelect(ctx->builder, tmp, result, denormal, "");
1599
1600 tmp = LLVMBuildICmp(ctx->builder, LLVMIntNE, src, ctx->i32_0, "");
1601 result = LLVMBuildSelect(ctx->builder, tmp, result, ctx->i32_0, "");
1602
1603 return ac_to_float(ctx, result);
1604 }
1605
1606 /**
1607 * Generate a fully general open coded buffer format fetch with all required
1608 * fixups suitable for vertex fetch, using non-format buffer loads.
1609 *
1610 * Some combinations of argument values have special interpretations:
1611 * - size = 8 bytes, format = fixed indicates PIPE_FORMAT_R11G11B10_FLOAT
1612 * - size = 8 bytes, format != {float,fixed} indicates a 2_10_10_10 data format
1613 *
1614 * \param log_size log(size of channel in bytes)
1615 * \param num_channels number of channels (1 to 4)
1616 * \param format AC_FETCH_FORMAT_xxx value
1617 * \param reverse whether XYZ channels are reversed
1618 * \param known_aligned whether the source is known to be aligned to hardware's
1619 * effective element size for loading the given format
1620 * (note: this means dword alignment for 8_8_8_8, 16_16, etc.)
1621 * \param rsrc buffer resource descriptor
1622 * \return the resulting vector of floats or integers bitcast to <4 x i32>
1623 */
1624 LLVMValueRef
1625 ac_build_opencoded_load_format(struct ac_llvm_context *ctx,
1626 unsigned log_size,
1627 unsigned num_channels,
1628 unsigned format,
1629 bool reverse,
1630 bool known_aligned,
1631 LLVMValueRef rsrc,
1632 LLVMValueRef vindex,
1633 LLVMValueRef voffset,
1634 LLVMValueRef soffset,
1635 unsigned cache_policy,
1636 bool can_speculate)
1637 {
1638 LLVMValueRef tmp;
1639 unsigned load_log_size = log_size;
1640 unsigned load_num_channels = num_channels;
1641 if (log_size == 3) {
1642 load_log_size = 2;
1643 if (format == AC_FETCH_FORMAT_FLOAT) {
1644 load_num_channels = 2 * num_channels;
1645 } else {
1646 load_num_channels = 1; /* 10_11_11 or 2_10_10_10 */
1647 }
1648 }
1649
1650 int log_recombine = 0;
1651 if (ctx->chip_class == GFX6 && !known_aligned) {
1652 /* Avoid alignment restrictions by loading one byte at a time. */
1653 load_num_channels <<= load_log_size;
1654 log_recombine = load_log_size;
1655 load_log_size = 0;
1656 } else if (load_num_channels == 2 || load_num_channels == 4) {
1657 log_recombine = -util_logbase2(load_num_channels);
1658 load_num_channels = 1;
1659 load_log_size += -log_recombine;
1660 }
1661
1662 assert(load_log_size >= 2 || LLVM_VERSION_MAJOR >= 9);
1663
1664 LLVMValueRef loads[32]; /* up to 32 bytes */
1665 for (unsigned i = 0; i < load_num_channels; ++i) {
1666 tmp = LLVMBuildAdd(ctx->builder, soffset,
1667 LLVMConstInt(ctx->i32, i << load_log_size, false), "");
1668 LLVMTypeRef channel_type = load_log_size == 0 ? ctx->i8 :
1669 load_log_size == 1 ? ctx->i16 : ctx->i32;
1670 unsigned num_channels = 1 << (MAX2(load_log_size, 2) - 2);
1671 loads[i] = ac_build_buffer_load_common(
1672 ctx, rsrc, vindex, voffset, tmp,
1673 num_channels, channel_type, cache_policy,
1674 can_speculate, false, true);
1675 if (load_log_size >= 2)
1676 loads[i] = ac_to_integer(ctx, loads[i]);
1677 }
1678
1679 if (log_recombine > 0) {
1680 /* Recombine bytes if necessary (GFX6 only) */
1681 LLVMTypeRef dst_type = log_recombine == 2 ? ctx->i32 : ctx->i16;
1682
1683 for (unsigned src = 0, dst = 0; src < load_num_channels; ++dst) {
1684 LLVMValueRef accum = NULL;
1685 for (unsigned i = 0; i < (1 << log_recombine); ++i, ++src) {
1686 tmp = LLVMBuildZExt(ctx->builder, loads[src], dst_type, "");
1687 if (i == 0) {
1688 accum = tmp;
1689 } else {
1690 tmp = LLVMBuildShl(ctx->builder, tmp,
1691 LLVMConstInt(dst_type, 8 * i, false), "");
1692 accum = LLVMBuildOr(ctx->builder, accum, tmp, "");
1693 }
1694 }
1695 loads[dst] = accum;
1696 }
1697 } else if (log_recombine < 0) {
1698 /* Split vectors of dwords */
1699 if (load_log_size > 2) {
1700 assert(load_num_channels == 1);
1701 LLVMValueRef loaded = loads[0];
1702 unsigned log_split = load_log_size - 2;
1703 log_recombine += log_split;
1704 load_num_channels = 1 << log_split;
1705 load_log_size = 2;
1706 for (unsigned i = 0; i < load_num_channels; ++i) {
1707 tmp = LLVMConstInt(ctx->i32, i, false);
1708 loads[i] = LLVMBuildExtractElement(ctx->builder, loaded, tmp, "");
1709 }
1710 }
1711
1712 /* Further split dwords and shorts if required */
1713 if (log_recombine < 0) {
1714 for (unsigned src = load_num_channels,
1715 dst = load_num_channels << -log_recombine;
1716 src > 0; --src) {
1717 unsigned dst_bits = 1 << (3 + load_log_size + log_recombine);
1718 LLVMTypeRef dst_type = LLVMIntTypeInContext(ctx->context, dst_bits);
1719 LLVMValueRef loaded = loads[src - 1];
1720 LLVMTypeRef loaded_type = LLVMTypeOf(loaded);
1721 for (unsigned i = 1 << -log_recombine; i > 0; --i, --dst) {
1722 tmp = LLVMConstInt(loaded_type, dst_bits * (i - 1), false);
1723 tmp = LLVMBuildLShr(ctx->builder, loaded, tmp, "");
1724 loads[dst - 1] = LLVMBuildTrunc(ctx->builder, tmp, dst_type, "");
1725 }
1726 }
1727 }
1728 }
1729
1730 if (log_size == 3) {
1731 if (format == AC_FETCH_FORMAT_FLOAT) {
1732 for (unsigned i = 0; i < num_channels; ++i) {
1733 tmp = ac_build_gather_values(ctx, &loads[2 * i], 2);
1734 loads[i] = LLVMBuildBitCast(ctx->builder, tmp, ctx->f64, "");
1735 }
1736 } else if (format == AC_FETCH_FORMAT_FIXED) {
1737 /* 10_11_11_FLOAT */
1738 LLVMValueRef data = loads[0];
1739 LLVMValueRef i32_2047 = LLVMConstInt(ctx->i32, 2047, false);
1740 LLVMValueRef r = LLVMBuildAnd(ctx->builder, data, i32_2047, "");
1741 tmp = LLVMBuildLShr(ctx->builder, data, LLVMConstInt(ctx->i32, 11, false), "");
1742 LLVMValueRef g = LLVMBuildAnd(ctx->builder, tmp, i32_2047, "");
1743 LLVMValueRef b = LLVMBuildLShr(ctx->builder, data, LLVMConstInt(ctx->i32, 22, false), "");
1744
1745 loads[0] = ac_to_integer(ctx, ac_ufN_to_float(ctx, r, 5, 6));
1746 loads[1] = ac_to_integer(ctx, ac_ufN_to_float(ctx, g, 5, 6));
1747 loads[2] = ac_to_integer(ctx, ac_ufN_to_float(ctx, b, 5, 5));
1748
1749 num_channels = 3;
1750 log_size = 2;
1751 format = AC_FETCH_FORMAT_FLOAT;
1752 } else {
1753 /* 2_10_10_10 data formats */
1754 LLVMValueRef data = loads[0];
1755 LLVMTypeRef i10 = LLVMIntTypeInContext(ctx->context, 10);
1756 LLVMTypeRef i2 = LLVMIntTypeInContext(ctx->context, 2);
1757 loads[0] = LLVMBuildTrunc(ctx->builder, data, i10, "");
1758 tmp = LLVMBuildLShr(ctx->builder, data, LLVMConstInt(ctx->i32, 10, false), "");
1759 loads[1] = LLVMBuildTrunc(ctx->builder, tmp, i10, "");
1760 tmp = LLVMBuildLShr(ctx->builder, data, LLVMConstInt(ctx->i32, 20, false), "");
1761 loads[2] = LLVMBuildTrunc(ctx->builder, tmp, i10, "");
1762 tmp = LLVMBuildLShr(ctx->builder, data, LLVMConstInt(ctx->i32, 30, false), "");
1763 loads[3] = LLVMBuildTrunc(ctx->builder, tmp, i2, "");
1764
1765 num_channels = 4;
1766 }
1767 }
1768
1769 if (format == AC_FETCH_FORMAT_FLOAT) {
1770 if (log_size != 2) {
1771 for (unsigned chan = 0; chan < num_channels; ++chan) {
1772 tmp = ac_to_float(ctx, loads[chan]);
1773 if (log_size == 3)
1774 tmp = LLVMBuildFPTrunc(ctx->builder, tmp, ctx->f32, "");
1775 else if (log_size == 1)
1776 tmp = LLVMBuildFPExt(ctx->builder, tmp, ctx->f32, "");
1777 loads[chan] = ac_to_integer(ctx, tmp);
1778 }
1779 }
1780 } else if (format == AC_FETCH_FORMAT_UINT) {
1781 if (log_size != 2) {
1782 for (unsigned chan = 0; chan < num_channels; ++chan)
1783 loads[chan] = LLVMBuildZExt(ctx->builder, loads[chan], ctx->i32, "");
1784 }
1785 } else if (format == AC_FETCH_FORMAT_SINT) {
1786 if (log_size != 2) {
1787 for (unsigned chan = 0; chan < num_channels; ++chan)
1788 loads[chan] = LLVMBuildSExt(ctx->builder, loads[chan], ctx->i32, "");
1789 }
1790 } else {
1791 bool unsign = format == AC_FETCH_FORMAT_UNORM ||
1792 format == AC_FETCH_FORMAT_USCALED ||
1793 format == AC_FETCH_FORMAT_UINT;
1794
1795 for (unsigned chan = 0; chan < num_channels; ++chan) {
1796 if (unsign) {
1797 tmp = LLVMBuildUIToFP(ctx->builder, loads[chan], ctx->f32, "");
1798 } else {
1799 tmp = LLVMBuildSIToFP(ctx->builder, loads[chan], ctx->f32, "");
1800 }
1801
1802 LLVMValueRef scale = NULL;
1803 if (format == AC_FETCH_FORMAT_FIXED) {
1804 assert(log_size == 2);
1805 scale = LLVMConstReal(ctx->f32, 1.0 / 0x10000);
1806 } else if (format == AC_FETCH_FORMAT_UNORM) {
1807 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(loads[chan]));
1808 scale = LLVMConstReal(ctx->f32, 1.0 / (((uint64_t)1 << bits) - 1));
1809 } else if (format == AC_FETCH_FORMAT_SNORM) {
1810 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(loads[chan]));
1811 scale = LLVMConstReal(ctx->f32, 1.0 / (((uint64_t)1 << (bits - 1)) - 1));
1812 }
1813 if (scale)
1814 tmp = LLVMBuildFMul(ctx->builder, tmp, scale, "");
1815
1816 if (format == AC_FETCH_FORMAT_SNORM) {
1817 /* Clamp to [-1, 1] */
1818 LLVMValueRef neg_one = LLVMConstReal(ctx->f32, -1.0);
1819 LLVMValueRef clamp =
1820 LLVMBuildFCmp(ctx->builder, LLVMRealULT, tmp, neg_one, "");
1821 tmp = LLVMBuildSelect(ctx->builder, clamp, neg_one, tmp, "");
1822 }
1823
1824 loads[chan] = ac_to_integer(ctx, tmp);
1825 }
1826 }
1827
1828 while (num_channels < 4) {
1829 if (format == AC_FETCH_FORMAT_UINT || format == AC_FETCH_FORMAT_SINT) {
1830 loads[num_channels] = num_channels == 3 ? ctx->i32_1 : ctx->i32_0;
1831 } else {
1832 loads[num_channels] = ac_to_integer(ctx, num_channels == 3 ? ctx->f32_1 : ctx->f32_0);
1833 }
1834 num_channels++;
1835 }
1836
1837 if (reverse) {
1838 tmp = loads[0];
1839 loads[0] = loads[2];
1840 loads[2] = tmp;
1841 }
1842
1843 return ac_build_gather_values(ctx, loads, 4);
1844 }
1845
1846 static void
1847 ac_build_tbuffer_store(struct ac_llvm_context *ctx,
1848 LLVMValueRef rsrc,
1849 LLVMValueRef vdata,
1850 LLVMValueRef vindex,
1851 LLVMValueRef voffset,
1852 LLVMValueRef soffset,
1853 LLVMValueRef immoffset,
1854 unsigned num_channels,
1855 unsigned dfmt,
1856 unsigned nfmt,
1857 unsigned cache_policy,
1858 bool structurized)
1859 {
1860 voffset = LLVMBuildAdd(ctx->builder, voffset ? voffset : ctx->i32_0,
1861 immoffset, "");
1862
1863 LLVMValueRef args[7];
1864 int idx = 0;
1865 args[idx++] = vdata;
1866 args[idx++] = LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, "");
1867 if (structurized)
1868 args[idx++] = vindex ? vindex : ctx->i32_0;
1869 args[idx++] = voffset ? voffset : ctx->i32_0;
1870 args[idx++] = soffset ? soffset : ctx->i32_0;
1871 args[idx++] = LLVMConstInt(ctx->i32, ac_get_tbuffer_format(ctx->chip_class, dfmt, nfmt), 0);
1872 args[idx++] = LLVMConstInt(ctx->i32, cache_policy, 0);
1873 unsigned func = !ac_has_vec3_support(ctx->chip_class, true) && num_channels == 3 ? 4 : num_channels;
1874 const char *indexing_kind = structurized ? "struct" : "raw";
1875 char name[256], type_name[8];
1876
1877 LLVMTypeRef type = func > 1 ? LLVMVectorType(ctx->i32, func) : ctx->i32;
1878 ac_build_type_name_for_intr(type, type_name, sizeof(type_name));
1879
1880 snprintf(name, sizeof(name), "llvm.amdgcn.%s.tbuffer.store.%s",
1881 indexing_kind, type_name);
1882
1883 ac_build_intrinsic(ctx, name, ctx->voidt, args, idx,
1884 AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY);
1885 }
1886
1887 void
1888 ac_build_struct_tbuffer_store(struct ac_llvm_context *ctx,
1889 LLVMValueRef rsrc,
1890 LLVMValueRef vdata,
1891 LLVMValueRef vindex,
1892 LLVMValueRef voffset,
1893 LLVMValueRef soffset,
1894 LLVMValueRef immoffset,
1895 unsigned num_channels,
1896 unsigned dfmt,
1897 unsigned nfmt,
1898 unsigned cache_policy)
1899 {
1900 ac_build_tbuffer_store(ctx, rsrc, vdata, vindex, voffset, soffset,
1901 immoffset, num_channels, dfmt, nfmt, cache_policy,
1902 true);
1903 }
1904
1905 void
1906 ac_build_raw_tbuffer_store(struct ac_llvm_context *ctx,
1907 LLVMValueRef rsrc,
1908 LLVMValueRef vdata,
1909 LLVMValueRef voffset,
1910 LLVMValueRef soffset,
1911 LLVMValueRef immoffset,
1912 unsigned num_channels,
1913 unsigned dfmt,
1914 unsigned nfmt,
1915 unsigned cache_policy)
1916 {
1917 ac_build_tbuffer_store(ctx, rsrc, vdata, NULL, voffset, soffset,
1918 immoffset, num_channels, dfmt, nfmt, cache_policy,
1919 false);
1920 }
1921
1922 void
1923 ac_build_tbuffer_store_short(struct ac_llvm_context *ctx,
1924 LLVMValueRef rsrc,
1925 LLVMValueRef vdata,
1926 LLVMValueRef voffset,
1927 LLVMValueRef soffset,
1928 unsigned cache_policy)
1929 {
1930 vdata = LLVMBuildBitCast(ctx->builder, vdata, ctx->i16, "");
1931
1932 if (LLVM_VERSION_MAJOR >= 9) {
1933 /* LLVM 9+ supports i8/i16 with struct/raw intrinsics. */
1934 ac_build_buffer_store_common(ctx, rsrc, vdata, NULL,
1935 voffset, soffset, 1,
1936 ctx->i16, cache_policy,
1937 false, false);
1938 } else {
1939 unsigned dfmt = V_008F0C_BUF_DATA_FORMAT_16;
1940 unsigned nfmt = V_008F0C_BUF_NUM_FORMAT_UINT;
1941
1942 vdata = LLVMBuildZExt(ctx->builder, vdata, ctx->i32, "");
1943
1944 ac_build_raw_tbuffer_store(ctx, rsrc, vdata, voffset, soffset,
1945 ctx->i32_0, 1, dfmt, nfmt, cache_policy);
1946 }
1947 }
1948
1949 void
1950 ac_build_tbuffer_store_byte(struct ac_llvm_context *ctx,
1951 LLVMValueRef rsrc,
1952 LLVMValueRef vdata,
1953 LLVMValueRef voffset,
1954 LLVMValueRef soffset,
1955 unsigned cache_policy)
1956 {
1957 vdata = LLVMBuildBitCast(ctx->builder, vdata, ctx->i8, "");
1958
1959 if (LLVM_VERSION_MAJOR >= 9) {
1960 /* LLVM 9+ supports i8/i16 with struct/raw intrinsics. */
1961 ac_build_buffer_store_common(ctx, rsrc, vdata, NULL,
1962 voffset, soffset, 1,
1963 ctx->i8, cache_policy,
1964 false, false);
1965 } else {
1966 unsigned dfmt = V_008F0C_BUF_DATA_FORMAT_8;
1967 unsigned nfmt = V_008F0C_BUF_NUM_FORMAT_UINT;
1968
1969 vdata = LLVMBuildZExt(ctx->builder, vdata, ctx->i32, "");
1970
1971 ac_build_raw_tbuffer_store(ctx, rsrc, vdata, voffset, soffset,
1972 ctx->i32_0, 1, dfmt, nfmt, cache_policy);
1973 }
1974 }
1975 /**
1976 * Set range metadata on an instruction. This can only be used on load and
1977 * call instructions. If you know an instruction can only produce the values
1978 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
1979 * \p lo is the minimum value inclusive.
1980 * \p hi is the maximum value exclusive.
1981 */
1982 static void set_range_metadata(struct ac_llvm_context *ctx,
1983 LLVMValueRef value, unsigned lo, unsigned hi)
1984 {
1985 LLVMValueRef range_md, md_args[2];
1986 LLVMTypeRef type = LLVMTypeOf(value);
1987 LLVMContextRef context = LLVMGetTypeContext(type);
1988
1989 md_args[0] = LLVMConstInt(type, lo, false);
1990 md_args[1] = LLVMConstInt(type, hi, false);
1991 range_md = LLVMMDNodeInContext(context, md_args, 2);
1992 LLVMSetMetadata(value, ctx->range_md_kind, range_md);
1993 }
1994
1995 LLVMValueRef
1996 ac_get_thread_id(struct ac_llvm_context *ctx)
1997 {
1998 LLVMValueRef tid;
1999
2000 LLVMValueRef tid_args[2];
2001 tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
2002 tid_args[1] = ctx->i32_0;
2003 tid_args[1] = ac_build_intrinsic(ctx,
2004 "llvm.amdgcn.mbcnt.lo", ctx->i32,
2005 tid_args, 2, AC_FUNC_ATTR_READNONE);
2006
2007 if (ctx->wave_size == 32) {
2008 tid = tid_args[1];
2009 } else {
2010 tid = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi",
2011 ctx->i32, tid_args,
2012 2, AC_FUNC_ATTR_READNONE);
2013 }
2014 set_range_metadata(ctx, tid, 0, ctx->wave_size);
2015 return tid;
2016 }
2017
2018 /*
2019 * AMD GCN implements derivatives using the local data store (LDS)
2020 * All writes to the LDS happen in all executing threads at
2021 * the same time. TID is the Thread ID for the current
2022 * thread and is a value between 0 and 63, representing
2023 * the thread's position in the wavefront.
2024 *
2025 * For the pixel shader threads are grouped into quads of four pixels.
2026 * The TIDs of the pixels of a quad are:
2027 *
2028 * +------+------+
2029 * |4n + 0|4n + 1|
2030 * +------+------+
2031 * |4n + 2|4n + 3|
2032 * +------+------+
2033 *
2034 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
2035 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
2036 * the current pixel's column, and masking with 0xfffffffe yields the TID
2037 * of the left pixel of the current pixel's row.
2038 *
2039 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
2040 * adding 2 yields the TID of the pixel below the top pixel.
2041 */
2042 LLVMValueRef
2043 ac_build_ddxy(struct ac_llvm_context *ctx,
2044 uint32_t mask,
2045 int idx,
2046 LLVMValueRef val)
2047 {
2048 unsigned tl_lanes[4], trbl_lanes[4];
2049 char name[32], type[8];
2050 LLVMValueRef tl, trbl;
2051 LLVMTypeRef result_type;
2052 LLVMValueRef result;
2053
2054 result_type = ac_to_float_type(ctx, LLVMTypeOf(val));
2055
2056 if (result_type == ctx->f16)
2057 val = LLVMBuildZExt(ctx->builder, val, ctx->i32, "");
2058
2059 for (unsigned i = 0; i < 4; ++i) {
2060 tl_lanes[i] = i & mask;
2061 trbl_lanes[i] = (i & mask) + idx;
2062 }
2063
2064 tl = ac_build_quad_swizzle(ctx, val,
2065 tl_lanes[0], tl_lanes[1],
2066 tl_lanes[2], tl_lanes[3]);
2067 trbl = ac_build_quad_swizzle(ctx, val,
2068 trbl_lanes[0], trbl_lanes[1],
2069 trbl_lanes[2], trbl_lanes[3]);
2070
2071 if (result_type == ctx->f16) {
2072 tl = LLVMBuildTrunc(ctx->builder, tl, ctx->i16, "");
2073 trbl = LLVMBuildTrunc(ctx->builder, trbl, ctx->i16, "");
2074 }
2075
2076 tl = LLVMBuildBitCast(ctx->builder, tl, result_type, "");
2077 trbl = LLVMBuildBitCast(ctx->builder, trbl, result_type, "");
2078 result = LLVMBuildFSub(ctx->builder, trbl, tl, "");
2079
2080 ac_build_type_name_for_intr(result_type, type, sizeof(type));
2081 snprintf(name, sizeof(name), "llvm.amdgcn.wqm.%s", type);
2082
2083 return ac_build_intrinsic(ctx, name, result_type, &result, 1, 0);
2084 }
2085
2086 void
2087 ac_build_sendmsg(struct ac_llvm_context *ctx,
2088 uint32_t msg,
2089 LLVMValueRef wave_id)
2090 {
2091 LLVMValueRef args[2];
2092 args[0] = LLVMConstInt(ctx->i32, msg, false);
2093 args[1] = wave_id;
2094 ac_build_intrinsic(ctx, "llvm.amdgcn.s.sendmsg", ctx->voidt, args, 2, 0);
2095 }
2096
2097 LLVMValueRef
2098 ac_build_imsb(struct ac_llvm_context *ctx,
2099 LLVMValueRef arg,
2100 LLVMTypeRef dst_type)
2101 {
2102 LLVMValueRef msb = ac_build_intrinsic(ctx, "llvm.amdgcn.sffbh.i32",
2103 dst_type, &arg, 1,
2104 AC_FUNC_ATTR_READNONE);
2105
2106 /* The HW returns the last bit index from MSB, but NIR/TGSI wants
2107 * the index from LSB. Invert it by doing "31 - msb". */
2108 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
2109 msb, "");
2110
2111 LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
2112 LLVMValueRef cond = LLVMBuildOr(ctx->builder,
2113 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
2114 arg, ctx->i32_0, ""),
2115 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
2116 arg, all_ones, ""), "");
2117
2118 return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
2119 }
2120
2121 LLVMValueRef
2122 ac_build_umsb(struct ac_llvm_context *ctx,
2123 LLVMValueRef arg,
2124 LLVMTypeRef dst_type)
2125 {
2126 const char *intrin_name;
2127 LLVMTypeRef type;
2128 LLVMValueRef highest_bit;
2129 LLVMValueRef zero;
2130 unsigned bitsize;
2131
2132 bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(arg));
2133 switch (bitsize) {
2134 case 64:
2135 intrin_name = "llvm.ctlz.i64";
2136 type = ctx->i64;
2137 highest_bit = LLVMConstInt(ctx->i64, 63, false);
2138 zero = ctx->i64_0;
2139 break;
2140 case 32:
2141 intrin_name = "llvm.ctlz.i32";
2142 type = ctx->i32;
2143 highest_bit = LLVMConstInt(ctx->i32, 31, false);
2144 zero = ctx->i32_0;
2145 break;
2146 case 16:
2147 intrin_name = "llvm.ctlz.i16";
2148 type = ctx->i16;
2149 highest_bit = LLVMConstInt(ctx->i16, 15, false);
2150 zero = ctx->i16_0;
2151 break;
2152 case 8:
2153 intrin_name = "llvm.ctlz.i8";
2154 type = ctx->i8;
2155 highest_bit = LLVMConstInt(ctx->i8, 7, false);
2156 zero = ctx->i8_0;
2157 break;
2158 default:
2159 unreachable(!"invalid bitsize");
2160 break;
2161 }
2162
2163 LLVMValueRef params[2] = {
2164 arg,
2165 ctx->i1true,
2166 };
2167
2168 LLVMValueRef msb = ac_build_intrinsic(ctx, intrin_name, type,
2169 params, 2,
2170 AC_FUNC_ATTR_READNONE);
2171
2172 /* The HW returns the last bit index from MSB, but TGSI/NIR wants
2173 * the index from LSB. Invert it by doing "31 - msb". */
2174 msb = LLVMBuildSub(ctx->builder, highest_bit, msb, "");
2175
2176 if (bitsize == 64) {
2177 msb = LLVMBuildTrunc(ctx->builder, msb, ctx->i32, "");
2178 } else if (bitsize < 32) {
2179 msb = LLVMBuildSExt(ctx->builder, msb, ctx->i32, "");
2180 }
2181
2182 /* check for zero */
2183 return LLVMBuildSelect(ctx->builder,
2184 LLVMBuildICmp(ctx->builder, LLVMIntEQ, arg, zero, ""),
2185 LLVMConstInt(ctx->i32, -1, true), msb, "");
2186 }
2187
2188 LLVMValueRef ac_build_fmin(struct ac_llvm_context *ctx, LLVMValueRef a,
2189 LLVMValueRef b)
2190 {
2191 char name[64];
2192 snprintf(name, sizeof(name), "llvm.minnum.f%d", ac_get_elem_bits(ctx, LLVMTypeOf(a)));
2193 LLVMValueRef args[2] = {a, b};
2194 return ac_build_intrinsic(ctx, name, LLVMTypeOf(a), args, 2,
2195 AC_FUNC_ATTR_READNONE);
2196 }
2197
2198 LLVMValueRef ac_build_fmax(struct ac_llvm_context *ctx, LLVMValueRef a,
2199 LLVMValueRef b)
2200 {
2201 char name[64];
2202 snprintf(name, sizeof(name), "llvm.maxnum.f%d", ac_get_elem_bits(ctx, LLVMTypeOf(a)));
2203 LLVMValueRef args[2] = {a, b};
2204 return ac_build_intrinsic(ctx, name, LLVMTypeOf(a), args, 2,
2205 AC_FUNC_ATTR_READNONE);
2206 }
2207
2208 LLVMValueRef ac_build_imin(struct ac_llvm_context *ctx, LLVMValueRef a,
2209 LLVMValueRef b)
2210 {
2211 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntSLE, a, b, "");
2212 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
2213 }
2214
2215 LLVMValueRef ac_build_imax(struct ac_llvm_context *ctx, LLVMValueRef a,
2216 LLVMValueRef b)
2217 {
2218 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, a, b, "");
2219 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
2220 }
2221
2222 LLVMValueRef ac_build_umin(struct ac_llvm_context *ctx, LLVMValueRef a,
2223 LLVMValueRef b)
2224 {
2225 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntULE, a, b, "");
2226 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
2227 }
2228
2229 LLVMValueRef ac_build_umax(struct ac_llvm_context *ctx, LLVMValueRef a,
2230 LLVMValueRef b)
2231 {
2232 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntUGE, a, b, "");
2233 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
2234 }
2235
2236 LLVMValueRef ac_build_clamp(struct ac_llvm_context *ctx, LLVMValueRef value)
2237 {
2238 LLVMTypeRef t = LLVMTypeOf(value);
2239 return ac_build_fmin(ctx, ac_build_fmax(ctx, value, LLVMConstReal(t, 0.0)),
2240 LLVMConstReal(t, 1.0));
2241 }
2242
2243 void ac_build_export(struct ac_llvm_context *ctx, struct ac_export_args *a)
2244 {
2245 LLVMValueRef args[9];
2246
2247 args[0] = LLVMConstInt(ctx->i32, a->target, 0);
2248 args[1] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
2249
2250 if (a->compr) {
2251 LLVMTypeRef i16 = LLVMInt16TypeInContext(ctx->context);
2252 LLVMTypeRef v2i16 = LLVMVectorType(i16, 2);
2253
2254 args[2] = LLVMBuildBitCast(ctx->builder, a->out[0],
2255 v2i16, "");
2256 args[3] = LLVMBuildBitCast(ctx->builder, a->out[1],
2257 v2i16, "");
2258 args[4] = LLVMConstInt(ctx->i1, a->done, 0);
2259 args[5] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
2260
2261 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.compr.v2i16",
2262 ctx->voidt, args, 6, 0);
2263 } else {
2264 args[2] = a->out[0];
2265 args[3] = a->out[1];
2266 args[4] = a->out[2];
2267 args[5] = a->out[3];
2268 args[6] = LLVMConstInt(ctx->i1, a->done, 0);
2269 args[7] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
2270
2271 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.f32",
2272 ctx->voidt, args, 8, 0);
2273 }
2274 }
2275
2276 void ac_build_export_null(struct ac_llvm_context *ctx)
2277 {
2278 struct ac_export_args args;
2279
2280 args.enabled_channels = 0x0; /* enabled channels */
2281 args.valid_mask = 1; /* whether the EXEC mask is valid */
2282 args.done = 1; /* DONE bit */
2283 args.target = V_008DFC_SQ_EXP_NULL;
2284 args.compr = 0; /* COMPR flag (0 = 32-bit export) */
2285 args.out[0] = LLVMGetUndef(ctx->f32); /* R */
2286 args.out[1] = LLVMGetUndef(ctx->f32); /* G */
2287 args.out[2] = LLVMGetUndef(ctx->f32); /* B */
2288 args.out[3] = LLVMGetUndef(ctx->f32); /* A */
2289
2290 ac_build_export(ctx, &args);
2291 }
2292
2293 static unsigned ac_num_coords(enum ac_image_dim dim)
2294 {
2295 switch (dim) {
2296 case ac_image_1d:
2297 return 1;
2298 case ac_image_2d:
2299 case ac_image_1darray:
2300 return 2;
2301 case ac_image_3d:
2302 case ac_image_cube:
2303 case ac_image_2darray:
2304 case ac_image_2dmsaa:
2305 return 3;
2306 case ac_image_2darraymsaa:
2307 return 4;
2308 default:
2309 unreachable("ac_num_coords: bad dim");
2310 }
2311 }
2312
2313 static unsigned ac_num_derivs(enum ac_image_dim dim)
2314 {
2315 switch (dim) {
2316 case ac_image_1d:
2317 case ac_image_1darray:
2318 return 2;
2319 case ac_image_2d:
2320 case ac_image_2darray:
2321 case ac_image_cube:
2322 return 4;
2323 case ac_image_3d:
2324 return 6;
2325 case ac_image_2dmsaa:
2326 case ac_image_2darraymsaa:
2327 default:
2328 unreachable("derivatives not supported");
2329 }
2330 }
2331
2332 static const char *get_atomic_name(enum ac_atomic_op op)
2333 {
2334 switch (op) {
2335 case ac_atomic_swap: return "swap";
2336 case ac_atomic_add: return "add";
2337 case ac_atomic_sub: return "sub";
2338 case ac_atomic_smin: return "smin";
2339 case ac_atomic_umin: return "umin";
2340 case ac_atomic_smax: return "smax";
2341 case ac_atomic_umax: return "umax";
2342 case ac_atomic_and: return "and";
2343 case ac_atomic_or: return "or";
2344 case ac_atomic_xor: return "xor";
2345 case ac_atomic_inc_wrap: return "inc";
2346 case ac_atomic_dec_wrap: return "dec";
2347 }
2348 unreachable("bad atomic op");
2349 }
2350
2351 LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,
2352 struct ac_image_args *a)
2353 {
2354 const char *overload[3] = { "", "", "" };
2355 unsigned num_overloads = 0;
2356 LLVMValueRef args[18];
2357 unsigned num_args = 0;
2358 enum ac_image_dim dim = a->dim;
2359
2360 assert(!a->lod || a->lod == ctx->i32_0 || a->lod == ctx->f32_0 ||
2361 !a->level_zero);
2362 assert((a->opcode != ac_image_get_resinfo && a->opcode != ac_image_load_mip &&
2363 a->opcode != ac_image_store_mip) ||
2364 a->lod);
2365 assert(a->opcode == ac_image_sample || a->opcode == ac_image_gather4 ||
2366 (!a->compare && !a->offset));
2367 assert((a->opcode == ac_image_sample || a->opcode == ac_image_gather4 ||
2368 a->opcode == ac_image_get_lod) ||
2369 !a->bias);
2370 assert((a->bias ? 1 : 0) +
2371 (a->lod ? 1 : 0) +
2372 (a->level_zero ? 1 : 0) +
2373 (a->derivs[0] ? 1 : 0) <= 1);
2374 assert((a->min_lod ? 1 : 0) +
2375 (a->lod ? 1 : 0) +
2376 (a->level_zero ? 1 : 0) <= 1);
2377
2378 if (a->opcode == ac_image_get_lod) {
2379 switch (dim) {
2380 case ac_image_1darray:
2381 dim = ac_image_1d;
2382 break;
2383 case ac_image_2darray:
2384 case ac_image_cube:
2385 dim = ac_image_2d;
2386 break;
2387 default:
2388 break;
2389 }
2390 }
2391
2392 bool sample = a->opcode == ac_image_sample ||
2393 a->opcode == ac_image_gather4 ||
2394 a->opcode == ac_image_get_lod;
2395 bool atomic = a->opcode == ac_image_atomic ||
2396 a->opcode == ac_image_atomic_cmpswap;
2397 bool load = a->opcode == ac_image_sample ||
2398 a->opcode == ac_image_gather4 ||
2399 a->opcode == ac_image_load ||
2400 a->opcode == ac_image_load_mip;
2401 LLVMTypeRef coord_type = sample ? ctx->f32 : ctx->i32;
2402
2403 if (atomic || a->opcode == ac_image_store || a->opcode == ac_image_store_mip) {
2404 args[num_args++] = a->data[0];
2405 if (a->opcode == ac_image_atomic_cmpswap)
2406 args[num_args++] = a->data[1];
2407 }
2408
2409 if (!atomic)
2410 args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, false);
2411
2412 if (a->offset)
2413 args[num_args++] = ac_to_integer(ctx, a->offset);
2414 if (a->bias) {
2415 args[num_args++] = ac_to_float(ctx, a->bias);
2416 overload[num_overloads++] = ".f32";
2417 }
2418 if (a->compare)
2419 args[num_args++] = ac_to_float(ctx, a->compare);
2420 if (a->derivs[0]) {
2421 unsigned count = ac_num_derivs(dim);
2422 for (unsigned i = 0; i < count; ++i)
2423 args[num_args++] = ac_to_float(ctx, a->derivs[i]);
2424 overload[num_overloads++] = ".f32";
2425 }
2426 unsigned num_coords =
2427 a->opcode != ac_image_get_resinfo ? ac_num_coords(dim) : 0;
2428 for (unsigned i = 0; i < num_coords; ++i)
2429 args[num_args++] = LLVMBuildBitCast(ctx->builder, a->coords[i], coord_type, "");
2430 if (a->lod)
2431 args[num_args++] = LLVMBuildBitCast(ctx->builder, a->lod, coord_type, "");
2432 if (a->min_lod)
2433 args[num_args++] = LLVMBuildBitCast(ctx->builder, a->min_lod, coord_type, "");
2434
2435 overload[num_overloads++] = sample ? ".f32" : ".i32";
2436
2437 args[num_args++] = a->resource;
2438 if (sample) {
2439 args[num_args++] = a->sampler;
2440 args[num_args++] = LLVMConstInt(ctx->i1, a->unorm, false);
2441 }
2442
2443 args[num_args++] = ctx->i32_0; /* texfailctrl */
2444 args[num_args++] = LLVMConstInt(ctx->i32,
2445 load ? get_load_cache_policy(ctx, a->cache_policy) :
2446 a->cache_policy, false);
2447
2448 const char *name;
2449 const char *atomic_subop = "";
2450 switch (a->opcode) {
2451 case ac_image_sample: name = "sample"; break;
2452 case ac_image_gather4: name = "gather4"; break;
2453 case ac_image_load: name = "load"; break;
2454 case ac_image_load_mip: name = "load.mip"; break;
2455 case ac_image_store: name = "store"; break;
2456 case ac_image_store_mip: name = "store.mip"; break;
2457 case ac_image_atomic:
2458 name = "atomic.";
2459 atomic_subop = get_atomic_name(a->atomic);
2460 break;
2461 case ac_image_atomic_cmpswap:
2462 name = "atomic.";
2463 atomic_subop = "cmpswap";
2464 break;
2465 case ac_image_get_lod: name = "getlod"; break;
2466 case ac_image_get_resinfo: name = "getresinfo"; break;
2467 default: unreachable("invalid image opcode");
2468 }
2469
2470 const char *dimname;
2471 switch (dim) {
2472 case ac_image_1d: dimname = "1d"; break;
2473 case ac_image_2d: dimname = "2d"; break;
2474 case ac_image_3d: dimname = "3d"; break;
2475 case ac_image_cube: dimname = "cube"; break;
2476 case ac_image_1darray: dimname = "1darray"; break;
2477 case ac_image_2darray: dimname = "2darray"; break;
2478 case ac_image_2dmsaa: dimname = "2dmsaa"; break;
2479 case ac_image_2darraymsaa: dimname = "2darraymsaa"; break;
2480 default: unreachable("invalid dim");
2481 }
2482
2483 bool lod_suffix =
2484 a->lod && (a->opcode == ac_image_sample || a->opcode == ac_image_gather4);
2485 char intr_name[96];
2486 snprintf(intr_name, sizeof(intr_name),
2487 "llvm.amdgcn.image.%s%s" /* base name */
2488 "%s%s%s%s" /* sample/gather modifiers */
2489 ".%s.%s%s%s%s", /* dimension and type overloads */
2490 name, atomic_subop,
2491 a->compare ? ".c" : "",
2492 a->bias ? ".b" :
2493 lod_suffix ? ".l" :
2494 a->derivs[0] ? ".d" :
2495 a->level_zero ? ".lz" : "",
2496 a->min_lod ? ".cl" : "",
2497 a->offset ? ".o" : "",
2498 dimname,
2499 atomic ? "i32" : "v4f32",
2500 overload[0], overload[1], overload[2]);
2501
2502 LLVMTypeRef retty;
2503 if (atomic)
2504 retty = ctx->i32;
2505 else if (a->opcode == ac_image_store || a->opcode == ac_image_store_mip)
2506 retty = ctx->voidt;
2507 else
2508 retty = ctx->v4f32;
2509
2510 LLVMValueRef result =
2511 ac_build_intrinsic(ctx, intr_name, retty, args, num_args,
2512 a->attributes);
2513 if (!sample && retty == ctx->v4f32) {
2514 result = LLVMBuildBitCast(ctx->builder, result,
2515 ctx->v4i32, "");
2516 }
2517 return result;
2518 }
2519
2520 LLVMValueRef ac_build_image_get_sample_count(struct ac_llvm_context *ctx,
2521 LLVMValueRef rsrc)
2522 {
2523 LLVMValueRef samples;
2524
2525 /* Read the samples from the descriptor directly.
2526 * Hardware doesn't have any instruction for this.
2527 */
2528 samples = LLVMBuildExtractElement(ctx->builder, rsrc,
2529 LLVMConstInt(ctx->i32, 3, 0), "");
2530 samples = LLVMBuildLShr(ctx->builder, samples,
2531 LLVMConstInt(ctx->i32, 16, 0), "");
2532 samples = LLVMBuildAnd(ctx->builder, samples,
2533 LLVMConstInt(ctx->i32, 0xf, 0), "");
2534 samples = LLVMBuildShl(ctx->builder, ctx->i32_1,
2535 samples, "");
2536 return samples;
2537 }
2538
2539 LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
2540 LLVMValueRef args[2])
2541 {
2542 LLVMTypeRef v2f16 =
2543 LLVMVectorType(LLVMHalfTypeInContext(ctx->context), 2);
2544
2545 return ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz", v2f16,
2546 args, 2, AC_FUNC_ATTR_READNONE);
2547 }
2548
2549 LLVMValueRef ac_build_cvt_pknorm_i16(struct ac_llvm_context *ctx,
2550 LLVMValueRef args[2])
2551 {
2552 LLVMValueRef res =
2553 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pknorm.i16",
2554 ctx->v2i16, args, 2,
2555 AC_FUNC_ATTR_READNONE);
2556 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
2557 }
2558
2559 LLVMValueRef ac_build_cvt_pknorm_u16(struct ac_llvm_context *ctx,
2560 LLVMValueRef args[2])
2561 {
2562 LLVMValueRef res =
2563 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pknorm.u16",
2564 ctx->v2i16, args, 2,
2565 AC_FUNC_ATTR_READNONE);
2566 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
2567 }
2568
2569 /* The 8-bit and 10-bit clamping is for HW workarounds. */
2570 LLVMValueRef ac_build_cvt_pk_i16(struct ac_llvm_context *ctx,
2571 LLVMValueRef args[2], unsigned bits, bool hi)
2572 {
2573 assert(bits == 8 || bits == 10 || bits == 16);
2574
2575 LLVMValueRef max_rgb = LLVMConstInt(ctx->i32,
2576 bits == 8 ? 127 : bits == 10 ? 511 : 32767, 0);
2577 LLVMValueRef min_rgb = LLVMConstInt(ctx->i32,
2578 bits == 8 ? -128 : bits == 10 ? -512 : -32768, 0);
2579 LLVMValueRef max_alpha =
2580 bits != 10 ? max_rgb : ctx->i32_1;
2581 LLVMValueRef min_alpha =
2582 bits != 10 ? min_rgb : LLVMConstInt(ctx->i32, -2, 0);
2583
2584 /* Clamp. */
2585 if (bits != 16) {
2586 for (int i = 0; i < 2; i++) {
2587 bool alpha = hi && i == 1;
2588 args[i] = ac_build_imin(ctx, args[i],
2589 alpha ? max_alpha : max_rgb);
2590 args[i] = ac_build_imax(ctx, args[i],
2591 alpha ? min_alpha : min_rgb);
2592 }
2593 }
2594
2595 LLVMValueRef res =
2596 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pk.i16",
2597 ctx->v2i16, args, 2,
2598 AC_FUNC_ATTR_READNONE);
2599 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
2600 }
2601
2602 /* The 8-bit and 10-bit clamping is for HW workarounds. */
2603 LLVMValueRef ac_build_cvt_pk_u16(struct ac_llvm_context *ctx,
2604 LLVMValueRef args[2], unsigned bits, bool hi)
2605 {
2606 assert(bits == 8 || bits == 10 || bits == 16);
2607
2608 LLVMValueRef max_rgb = LLVMConstInt(ctx->i32,
2609 bits == 8 ? 255 : bits == 10 ? 1023 : 65535, 0);
2610 LLVMValueRef max_alpha =
2611 bits != 10 ? max_rgb : LLVMConstInt(ctx->i32, 3, 0);
2612
2613 /* Clamp. */
2614 if (bits != 16) {
2615 for (int i = 0; i < 2; i++) {
2616 bool alpha = hi && i == 1;
2617 args[i] = ac_build_umin(ctx, args[i],
2618 alpha ? max_alpha : max_rgb);
2619 }
2620 }
2621
2622 LLVMValueRef res =
2623 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pk.u16",
2624 ctx->v2i16, args, 2,
2625 AC_FUNC_ATTR_READNONE);
2626 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
2627 }
2628
2629 LLVMValueRef ac_build_wqm_vote(struct ac_llvm_context *ctx, LLVMValueRef i1)
2630 {
2631 return ac_build_intrinsic(ctx, "llvm.amdgcn.wqm.vote", ctx->i1,
2632 &i1, 1, AC_FUNC_ATTR_READNONE);
2633 }
2634
2635 void ac_build_kill_if_false(struct ac_llvm_context *ctx, LLVMValueRef i1)
2636 {
2637 ac_build_intrinsic(ctx, "llvm.amdgcn.kill", ctx->voidt,
2638 &i1, 1, 0);
2639 }
2640
2641 LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
2642 LLVMValueRef offset, LLVMValueRef width,
2643 bool is_signed)
2644 {
2645 LLVMValueRef args[] = {
2646 input,
2647 offset,
2648 width,
2649 };
2650
2651 return ac_build_intrinsic(ctx, is_signed ? "llvm.amdgcn.sbfe.i32" :
2652 "llvm.amdgcn.ubfe.i32",
2653 ctx->i32, args, 3, AC_FUNC_ATTR_READNONE);
2654
2655 }
2656
2657 LLVMValueRef ac_build_imad(struct ac_llvm_context *ctx, LLVMValueRef s0,
2658 LLVMValueRef s1, LLVMValueRef s2)
2659 {
2660 return LLVMBuildAdd(ctx->builder,
2661 LLVMBuildMul(ctx->builder, s0, s1, ""), s2, "");
2662 }
2663
2664 LLVMValueRef ac_build_fmad(struct ac_llvm_context *ctx, LLVMValueRef s0,
2665 LLVMValueRef s1, LLVMValueRef s2)
2666 {
2667 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
2668 if (ctx->chip_class >= GFX10) {
2669 return ac_build_intrinsic(ctx, "llvm.fma.f32", ctx->f32,
2670 (LLVMValueRef []) {s0, s1, s2}, 3,
2671 AC_FUNC_ATTR_READNONE);
2672 }
2673
2674 return LLVMBuildFAdd(ctx->builder,
2675 LLVMBuildFMul(ctx->builder, s0, s1, ""), s2, "");
2676 }
2677
2678 void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned wait_flags)
2679 {
2680 if (!wait_flags)
2681 return;
2682
2683 unsigned lgkmcnt = 63;
2684 unsigned vmcnt = ctx->chip_class >= GFX9 ? 63 : 15;
2685 unsigned vscnt = 63;
2686
2687 if (wait_flags & AC_WAIT_LGKM)
2688 lgkmcnt = 0;
2689 if (wait_flags & AC_WAIT_VLOAD)
2690 vmcnt = 0;
2691
2692 if (wait_flags & AC_WAIT_VSTORE) {
2693 if (ctx->chip_class >= GFX10)
2694 vscnt = 0;
2695 else
2696 vmcnt = 0;
2697 }
2698
2699 /* There is no intrinsic for vscnt(0), so use a fence. */
2700 if ((wait_flags & AC_WAIT_LGKM &&
2701 wait_flags & AC_WAIT_VLOAD &&
2702 wait_flags & AC_WAIT_VSTORE) ||
2703 vscnt == 0) {
2704 LLVMBuildFence(ctx->builder, LLVMAtomicOrderingRelease, false, "");
2705 return;
2706 }
2707
2708 unsigned simm16 = (lgkmcnt << 8) |
2709 (7 << 4) | /* expcnt */
2710 (vmcnt & 0xf) |
2711 ((vmcnt >> 4) << 14);
2712
2713 LLVMValueRef args[1] = {
2714 LLVMConstInt(ctx->i32, simm16, false),
2715 };
2716 ac_build_intrinsic(ctx, "llvm.amdgcn.s.waitcnt",
2717 ctx->voidt, args, 1, 0);
2718 }
2719
2720 LLVMValueRef ac_build_fmed3(struct ac_llvm_context *ctx, LLVMValueRef src0,
2721 LLVMValueRef src1, LLVMValueRef src2,
2722 unsigned bitsize)
2723 {
2724 LLVMValueRef result;
2725
2726 if (bitsize == 64 || (bitsize == 16 && ctx->chip_class <= GFX8)) {
2727 /* Lower 64-bit fmed because LLVM doesn't expose an intrinsic,
2728 * or lower 16-bit fmed because it's only supported on GFX9+.
2729 */
2730 LLVMValueRef min1, min2, max1;
2731
2732 min1 = ac_build_fmin(ctx, src0, src1);
2733 max1 = ac_build_fmax(ctx, src0, src1);
2734 min2 = ac_build_fmin(ctx, max1, src2);
2735
2736 result = ac_build_fmax(ctx, min2, min1);
2737 } else {
2738 LLVMTypeRef type;
2739 char *intr;
2740
2741 if (bitsize == 16) {
2742 intr = "llvm.amdgcn.fmed3.f16";
2743 type = ctx->f16;
2744 } else {
2745 assert(bitsize == 32);
2746 intr = "llvm.amdgcn.fmed3.f32";
2747 type = ctx->f32;
2748 }
2749
2750 LLVMValueRef params[] = {
2751 src0,
2752 src1,
2753 src2,
2754 };
2755
2756 result = ac_build_intrinsic(ctx, intr, type, params, 3,
2757 AC_FUNC_ATTR_READNONE);
2758 }
2759
2760 if (ctx->chip_class < GFX9 && bitsize == 32) {
2761 /* Only pre-GFX9 chips do not flush denorms. */
2762 result = ac_build_canonicalize(ctx, result, bitsize);
2763 }
2764
2765 return result;
2766 }
2767
2768 LLVMValueRef ac_build_fract(struct ac_llvm_context *ctx, LLVMValueRef src0,
2769 unsigned bitsize)
2770 {
2771 LLVMTypeRef type;
2772 char *intr;
2773
2774 if (bitsize == 16) {
2775 intr = "llvm.amdgcn.fract.f16";
2776 type = ctx->f16;
2777 } else if (bitsize == 32) {
2778 intr = "llvm.amdgcn.fract.f32";
2779 type = ctx->f32;
2780 } else {
2781 intr = "llvm.amdgcn.fract.f64";
2782 type = ctx->f64;
2783 }
2784
2785 LLVMValueRef params[] = {
2786 src0,
2787 };
2788 return ac_build_intrinsic(ctx, intr, type, params, 1,
2789 AC_FUNC_ATTR_READNONE);
2790 }
2791
2792 LLVMValueRef ac_build_isign(struct ac_llvm_context *ctx, LLVMValueRef src0,
2793 unsigned bitsize)
2794 {
2795 LLVMTypeRef type = LLVMIntTypeInContext(ctx->context, bitsize);
2796 LLVMValueRef zero = LLVMConstInt(type, 0, false);
2797 LLVMValueRef one = LLVMConstInt(type, 1, false);
2798
2799 LLVMValueRef cmp, val;
2800 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, src0, zero, "");
2801 val = LLVMBuildSelect(ctx->builder, cmp, one, src0, "");
2802 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGE, val, zero, "");
2803 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstInt(type, -1, true), "");
2804 return val;
2805 }
2806
2807 LLVMValueRef ac_build_fsign(struct ac_llvm_context *ctx, LLVMValueRef src0,
2808 unsigned bitsize)
2809 {
2810 LLVMValueRef cmp, val, zero, one;
2811 LLVMTypeRef type;
2812
2813 if (bitsize == 16) {
2814 type = ctx->f16;
2815 zero = ctx->f16_0;
2816 one = ctx->f16_1;
2817 } else if (bitsize == 32) {
2818 type = ctx->f32;
2819 zero = ctx->f32_0;
2820 one = ctx->f32_1;
2821 } else {
2822 type = ctx->f64;
2823 zero = ctx->f64_0;
2824 one = ctx->f64_1;
2825 }
2826
2827 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGT, src0, zero, "");
2828 val = LLVMBuildSelect(ctx->builder, cmp, one, src0, "");
2829 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGE, val, zero, "");
2830 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstReal(type, -1.0), "");
2831 return val;
2832 }
2833
2834 LLVMValueRef ac_build_bit_count(struct ac_llvm_context *ctx, LLVMValueRef src0)
2835 {
2836 LLVMValueRef result;
2837 unsigned bitsize;
2838
2839 bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(src0));
2840
2841 switch (bitsize) {
2842 case 128:
2843 result = ac_build_intrinsic(ctx, "llvm.ctpop.i128", ctx->i128,
2844 (LLVMValueRef []) { src0 }, 1,
2845 AC_FUNC_ATTR_READNONE);
2846 result = LLVMBuildTrunc(ctx->builder, result, ctx->i32, "");
2847 break;
2848 case 64:
2849 result = ac_build_intrinsic(ctx, "llvm.ctpop.i64", ctx->i64,
2850 (LLVMValueRef []) { src0 }, 1,
2851 AC_FUNC_ATTR_READNONE);
2852
2853 result = LLVMBuildTrunc(ctx->builder, result, ctx->i32, "");
2854 break;
2855 case 32:
2856 result = ac_build_intrinsic(ctx, "llvm.ctpop.i32", ctx->i32,
2857 (LLVMValueRef []) { src0 }, 1,
2858 AC_FUNC_ATTR_READNONE);
2859 break;
2860 case 16:
2861 result = ac_build_intrinsic(ctx, "llvm.ctpop.i16", ctx->i16,
2862 (LLVMValueRef []) { src0 }, 1,
2863 AC_FUNC_ATTR_READNONE);
2864
2865 result = LLVMBuildZExt(ctx->builder, result, ctx->i32, "");
2866 break;
2867 case 8:
2868 result = ac_build_intrinsic(ctx, "llvm.ctpop.i8", ctx->i8,
2869 (LLVMValueRef []) { src0 }, 1,
2870 AC_FUNC_ATTR_READNONE);
2871
2872 result = LLVMBuildZExt(ctx->builder, result, ctx->i32, "");
2873 break;
2874 default:
2875 unreachable(!"invalid bitsize");
2876 break;
2877 }
2878
2879 return result;
2880 }
2881
2882 LLVMValueRef ac_build_bitfield_reverse(struct ac_llvm_context *ctx,
2883 LLVMValueRef src0)
2884 {
2885 LLVMValueRef result;
2886 unsigned bitsize;
2887
2888 bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(src0));
2889
2890 switch (bitsize) {
2891 case 64:
2892 result = ac_build_intrinsic(ctx, "llvm.bitreverse.i64", ctx->i64,
2893 (LLVMValueRef []) { src0 }, 1,
2894 AC_FUNC_ATTR_READNONE);
2895
2896 result = LLVMBuildTrunc(ctx->builder, result, ctx->i32, "");
2897 break;
2898 case 32:
2899 result = ac_build_intrinsic(ctx, "llvm.bitreverse.i32", ctx->i32,
2900 (LLVMValueRef []) { src0 }, 1,
2901 AC_FUNC_ATTR_READNONE);
2902 break;
2903 case 16:
2904 result = ac_build_intrinsic(ctx, "llvm.bitreverse.i16", ctx->i16,
2905 (LLVMValueRef []) { src0 }, 1,
2906 AC_FUNC_ATTR_READNONE);
2907
2908 result = LLVMBuildZExt(ctx->builder, result, ctx->i32, "");
2909 break;
2910 case 8:
2911 result = ac_build_intrinsic(ctx, "llvm.bitreverse.i8", ctx->i8,
2912 (LLVMValueRef []) { src0 }, 1,
2913 AC_FUNC_ATTR_READNONE);
2914
2915 result = LLVMBuildZExt(ctx->builder, result, ctx->i32, "");
2916 break;
2917 default:
2918 unreachable(!"invalid bitsize");
2919 break;
2920 }
2921
2922 return result;
2923 }
2924
2925 #define AC_EXP_TARGET 0
2926 #define AC_EXP_ENABLED_CHANNELS 1
2927 #define AC_EXP_OUT0 2
2928
2929 enum ac_ir_type {
2930 AC_IR_UNDEF,
2931 AC_IR_CONST,
2932 AC_IR_VALUE,
2933 };
2934
2935 struct ac_vs_exp_chan
2936 {
2937 LLVMValueRef value;
2938 float const_float;
2939 enum ac_ir_type type;
2940 };
2941
2942 struct ac_vs_exp_inst {
2943 unsigned offset;
2944 LLVMValueRef inst;
2945 struct ac_vs_exp_chan chan[4];
2946 };
2947
2948 struct ac_vs_exports {
2949 unsigned num;
2950 struct ac_vs_exp_inst exp[VARYING_SLOT_MAX];
2951 };
2952
2953 /* Return true if the PARAM export has been eliminated. */
2954 static bool ac_eliminate_const_output(uint8_t *vs_output_param_offset,
2955 uint32_t num_outputs,
2956 struct ac_vs_exp_inst *exp)
2957 {
2958 unsigned i, default_val; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */
2959 bool is_zero[4] = {}, is_one[4] = {};
2960
2961 for (i = 0; i < 4; i++) {
2962 /* It's a constant expression. Undef outputs are eliminated too. */
2963 if (exp->chan[i].type == AC_IR_UNDEF) {
2964 is_zero[i] = true;
2965 is_one[i] = true;
2966 } else if (exp->chan[i].type == AC_IR_CONST) {
2967 if (exp->chan[i].const_float == 0)
2968 is_zero[i] = true;
2969 else if (exp->chan[i].const_float == 1)
2970 is_one[i] = true;
2971 else
2972 return false; /* other constant */
2973 } else
2974 return false;
2975 }
2976
2977 /* Only certain combinations of 0 and 1 can be eliminated. */
2978 if (is_zero[0] && is_zero[1] && is_zero[2])
2979 default_val = is_zero[3] ? 0 : 1;
2980 else if (is_one[0] && is_one[1] && is_one[2])
2981 default_val = is_zero[3] ? 2 : 3;
2982 else
2983 return false;
2984
2985 /* The PARAM export can be represented as DEFAULT_VAL. Kill it. */
2986 LLVMInstructionEraseFromParent(exp->inst);
2987
2988 /* Change OFFSET to DEFAULT_VAL. */
2989 for (i = 0; i < num_outputs; i++) {
2990 if (vs_output_param_offset[i] == exp->offset) {
2991 vs_output_param_offset[i] =
2992 AC_EXP_PARAM_DEFAULT_VAL_0000 + default_val;
2993 break;
2994 }
2995 }
2996 return true;
2997 }
2998
2999 static bool ac_eliminate_duplicated_output(struct ac_llvm_context *ctx,
3000 uint8_t *vs_output_param_offset,
3001 uint32_t num_outputs,
3002 struct ac_vs_exports *processed,
3003 struct ac_vs_exp_inst *exp)
3004 {
3005 unsigned p, copy_back_channels = 0;
3006
3007 /* See if the output is already in the list of processed outputs.
3008 * The LLVMValueRef comparison relies on SSA.
3009 */
3010 for (p = 0; p < processed->num; p++) {
3011 bool different = false;
3012
3013 for (unsigned j = 0; j < 4; j++) {
3014 struct ac_vs_exp_chan *c1 = &processed->exp[p].chan[j];
3015 struct ac_vs_exp_chan *c2 = &exp->chan[j];
3016
3017 /* Treat undef as a match. */
3018 if (c2->type == AC_IR_UNDEF)
3019 continue;
3020
3021 /* If c1 is undef but c2 isn't, we can copy c2 to c1
3022 * and consider the instruction duplicated.
3023 */
3024 if (c1->type == AC_IR_UNDEF) {
3025 copy_back_channels |= 1 << j;
3026 continue;
3027 }
3028
3029 /* Test whether the channels are not equal. */
3030 if (c1->type != c2->type ||
3031 (c1->type == AC_IR_CONST &&
3032 c1->const_float != c2->const_float) ||
3033 (c1->type == AC_IR_VALUE &&
3034 c1->value != c2->value)) {
3035 different = true;
3036 break;
3037 }
3038 }
3039 if (!different)
3040 break;
3041
3042 copy_back_channels = 0;
3043 }
3044 if (p == processed->num)
3045 return false;
3046
3047 /* If a match was found, but the matching export has undef where the new
3048 * one has a normal value, copy the normal value to the undef channel.
3049 */
3050 struct ac_vs_exp_inst *match = &processed->exp[p];
3051
3052 /* Get current enabled channels mask. */
3053 LLVMValueRef arg = LLVMGetOperand(match->inst, AC_EXP_ENABLED_CHANNELS);
3054 unsigned enabled_channels = LLVMConstIntGetZExtValue(arg);
3055
3056 while (copy_back_channels) {
3057 unsigned chan = u_bit_scan(&copy_back_channels);
3058
3059 assert(match->chan[chan].type == AC_IR_UNDEF);
3060 LLVMSetOperand(match->inst, AC_EXP_OUT0 + chan,
3061 exp->chan[chan].value);
3062 match->chan[chan] = exp->chan[chan];
3063
3064 /* Update number of enabled channels because the original mask
3065 * is not always 0xf.
3066 */
3067 enabled_channels |= (1 << chan);
3068 LLVMSetOperand(match->inst, AC_EXP_ENABLED_CHANNELS,
3069 LLVMConstInt(ctx->i32, enabled_channels, 0));
3070 }
3071
3072 /* The PARAM export is duplicated. Kill it. */
3073 LLVMInstructionEraseFromParent(exp->inst);
3074
3075 /* Change OFFSET to the matching export. */
3076 for (unsigned i = 0; i < num_outputs; i++) {
3077 if (vs_output_param_offset[i] == exp->offset) {
3078 vs_output_param_offset[i] = match->offset;
3079 break;
3080 }
3081 }
3082 return true;
3083 }
3084
3085 void ac_optimize_vs_outputs(struct ac_llvm_context *ctx,
3086 LLVMValueRef main_fn,
3087 uint8_t *vs_output_param_offset,
3088 uint32_t num_outputs,
3089 uint32_t skip_output_mask,
3090 uint8_t *num_param_exports)
3091 {
3092 LLVMBasicBlockRef bb;
3093 bool removed_any = false;
3094 struct ac_vs_exports exports;
3095
3096 exports.num = 0;
3097
3098 /* Process all LLVM instructions. */
3099 bb = LLVMGetFirstBasicBlock(main_fn);
3100 while (bb) {
3101 LLVMValueRef inst = LLVMGetFirstInstruction(bb);
3102
3103 while (inst) {
3104 LLVMValueRef cur = inst;
3105 inst = LLVMGetNextInstruction(inst);
3106 struct ac_vs_exp_inst exp;
3107
3108 if (LLVMGetInstructionOpcode(cur) != LLVMCall)
3109 continue;
3110
3111 LLVMValueRef callee = ac_llvm_get_called_value(cur);
3112
3113 if (!ac_llvm_is_function(callee))
3114 continue;
3115
3116 const char *name = LLVMGetValueName(callee);
3117 unsigned num_args = LLVMCountParams(callee);
3118
3119 /* Check if this is an export instruction. */
3120 if ((num_args != 9 && num_args != 8) ||
3121 (strcmp(name, "llvm.SI.export") &&
3122 strcmp(name, "llvm.amdgcn.exp.f32")))
3123 continue;
3124
3125 LLVMValueRef arg = LLVMGetOperand(cur, AC_EXP_TARGET);
3126 unsigned target = LLVMConstIntGetZExtValue(arg);
3127
3128 if (target < V_008DFC_SQ_EXP_PARAM)
3129 continue;
3130
3131 target -= V_008DFC_SQ_EXP_PARAM;
3132
3133 /* Parse the instruction. */
3134 memset(&exp, 0, sizeof(exp));
3135 exp.offset = target;
3136 exp.inst = cur;
3137
3138 for (unsigned i = 0; i < 4; i++) {
3139 LLVMValueRef v = LLVMGetOperand(cur, AC_EXP_OUT0 + i);
3140
3141 exp.chan[i].value = v;
3142
3143 if (LLVMIsUndef(v)) {
3144 exp.chan[i].type = AC_IR_UNDEF;
3145 } else if (LLVMIsAConstantFP(v)) {
3146 LLVMBool loses_info;
3147 exp.chan[i].type = AC_IR_CONST;
3148 exp.chan[i].const_float =
3149 LLVMConstRealGetDouble(v, &loses_info);
3150 } else {
3151 exp.chan[i].type = AC_IR_VALUE;
3152 }
3153 }
3154
3155 /* Eliminate constant and duplicated PARAM exports. */
3156 if (!((1u << target) & skip_output_mask) &&
3157 (ac_eliminate_const_output(vs_output_param_offset,
3158 num_outputs, &exp) ||
3159 ac_eliminate_duplicated_output(ctx,
3160 vs_output_param_offset,
3161 num_outputs, &exports,
3162 &exp))) {
3163 removed_any = true;
3164 } else {
3165 exports.exp[exports.num++] = exp;
3166 }
3167 }
3168 bb = LLVMGetNextBasicBlock(bb);
3169 }
3170
3171 /* Remove holes in export memory due to removed PARAM exports.
3172 * This is done by renumbering all PARAM exports.
3173 */
3174 if (removed_any) {
3175 uint8_t old_offset[VARYING_SLOT_MAX];
3176 unsigned out, i;
3177
3178 /* Make a copy of the offsets. We need the old version while
3179 * we are modifying some of them. */
3180 memcpy(old_offset, vs_output_param_offset,
3181 sizeof(old_offset));
3182
3183 for (i = 0; i < exports.num; i++) {
3184 unsigned offset = exports.exp[i].offset;
3185
3186 /* Update vs_output_param_offset. Multiple outputs can
3187 * have the same offset.
3188 */
3189 for (out = 0; out < num_outputs; out++) {
3190 if (old_offset[out] == offset)
3191 vs_output_param_offset[out] = i;
3192 }
3193
3194 /* Change the PARAM offset in the instruction. */
3195 LLVMSetOperand(exports.exp[i].inst, AC_EXP_TARGET,
3196 LLVMConstInt(ctx->i32,
3197 V_008DFC_SQ_EXP_PARAM + i, 0));
3198 }
3199 *num_param_exports = exports.num;
3200 }
3201 }
3202
3203 void ac_init_exec_full_mask(struct ac_llvm_context *ctx)
3204 {
3205 LLVMValueRef full_mask = LLVMConstInt(ctx->i64, ~0ull, 0);
3206 ac_build_intrinsic(ctx,
3207 "llvm.amdgcn.init.exec", ctx->voidt,
3208 &full_mask, 1, AC_FUNC_ATTR_CONVERGENT);
3209 }
3210
3211 void ac_declare_lds_as_pointer(struct ac_llvm_context *ctx)
3212 {
3213 unsigned lds_size = ctx->chip_class >= GFX7 ? 65536 : 32768;
3214 ctx->lds = LLVMBuildIntToPtr(ctx->builder, ctx->i32_0,
3215 LLVMPointerType(LLVMArrayType(ctx->i32, lds_size / 4), AC_ADDR_SPACE_LDS),
3216 "lds");
3217 }
3218
3219 LLVMValueRef ac_lds_load(struct ac_llvm_context *ctx,
3220 LLVMValueRef dw_addr)
3221 {
3222 return LLVMBuildLoad(ctx->builder, ac_build_gep0(ctx, ctx->lds, dw_addr), "");
3223 }
3224
3225 void ac_lds_store(struct ac_llvm_context *ctx,
3226 LLVMValueRef dw_addr,
3227 LLVMValueRef value)
3228 {
3229 value = ac_to_integer(ctx, value);
3230 ac_build_indexed_store(ctx, ctx->lds,
3231 dw_addr, value);
3232 }
3233
3234 LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
3235 LLVMTypeRef dst_type,
3236 LLVMValueRef src0)
3237 {
3238 unsigned src0_bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(src0));
3239 const char *intrin_name;
3240 LLVMTypeRef type;
3241 LLVMValueRef zero;
3242
3243 switch (src0_bitsize) {
3244 case 64:
3245 intrin_name = "llvm.cttz.i64";
3246 type = ctx->i64;
3247 zero = ctx->i64_0;
3248 break;
3249 case 32:
3250 intrin_name = "llvm.cttz.i32";
3251 type = ctx->i32;
3252 zero = ctx->i32_0;
3253 break;
3254 case 16:
3255 intrin_name = "llvm.cttz.i16";
3256 type = ctx->i16;
3257 zero = ctx->i16_0;
3258 break;
3259 case 8:
3260 intrin_name = "llvm.cttz.i8";
3261 type = ctx->i8;
3262 zero = ctx->i8_0;
3263 break;
3264 default:
3265 unreachable(!"invalid bitsize");
3266 }
3267
3268 LLVMValueRef params[2] = {
3269 src0,
3270
3271 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
3272 * add special code to check for x=0. The reason is that
3273 * the LLVM behavior for x=0 is different from what we
3274 * need here. However, LLVM also assumes that ffs(x) is
3275 * in [0, 31], but GLSL expects that ffs(0) = -1, so
3276 * a conditional assignment to handle 0 is still required.
3277 *
3278 * The hardware already implements the correct behavior.
3279 */
3280 ctx->i1true,
3281 };
3282
3283 LLVMValueRef lsb = ac_build_intrinsic(ctx, intrin_name, type,
3284 params, 2,
3285 AC_FUNC_ATTR_READNONE);
3286
3287 if (src0_bitsize == 64) {
3288 lsb = LLVMBuildTrunc(ctx->builder, lsb, ctx->i32, "");
3289 } else if (src0_bitsize < 32) {
3290 lsb = LLVMBuildSExt(ctx->builder, lsb, ctx->i32, "");
3291 }
3292
3293 /* TODO: We need an intrinsic to skip this conditional. */
3294 /* Check for zero: */
3295 return LLVMBuildSelect(ctx->builder, LLVMBuildICmp(ctx->builder,
3296 LLVMIntEQ, src0,
3297 zero, ""),
3298 LLVMConstInt(ctx->i32, -1, 0), lsb, "");
3299 }
3300
3301 LLVMTypeRef ac_array_in_const_addr_space(LLVMTypeRef elem_type)
3302 {
3303 return LLVMPointerType(elem_type, AC_ADDR_SPACE_CONST);
3304 }
3305
3306 LLVMTypeRef ac_array_in_const32_addr_space(LLVMTypeRef elem_type)
3307 {
3308 return LLVMPointerType(elem_type, AC_ADDR_SPACE_CONST_32BIT);
3309 }
3310
3311 static struct ac_llvm_flow *
3312 get_current_flow(struct ac_llvm_context *ctx)
3313 {
3314 if (ctx->flow->depth > 0)
3315 return &ctx->flow->stack[ctx->flow->depth - 1];
3316 return NULL;
3317 }
3318
3319 static struct ac_llvm_flow *
3320 get_innermost_loop(struct ac_llvm_context *ctx)
3321 {
3322 for (unsigned i = ctx->flow->depth; i > 0; --i) {
3323 if (ctx->flow->stack[i - 1].loop_entry_block)
3324 return &ctx->flow->stack[i - 1];
3325 }
3326 return NULL;
3327 }
3328
3329 static struct ac_llvm_flow *
3330 push_flow(struct ac_llvm_context *ctx)
3331 {
3332 struct ac_llvm_flow *flow;
3333
3334 if (ctx->flow->depth >= ctx->flow->depth_max) {
3335 unsigned new_max = MAX2(ctx->flow->depth << 1,
3336 AC_LLVM_INITIAL_CF_DEPTH);
3337
3338 ctx->flow->stack = realloc(ctx->flow->stack, new_max * sizeof(*ctx->flow->stack));
3339 ctx->flow->depth_max = new_max;
3340 }
3341
3342 flow = &ctx->flow->stack[ctx->flow->depth];
3343 ctx->flow->depth++;
3344
3345 flow->next_block = NULL;
3346 flow->loop_entry_block = NULL;
3347 return flow;
3348 }
3349
3350 static void set_basicblock_name(LLVMBasicBlockRef bb, const char *base,
3351 int label_id)
3352 {
3353 char buf[32];
3354 snprintf(buf, sizeof(buf), "%s%d", base, label_id);
3355 LLVMSetValueName(LLVMBasicBlockAsValue(bb), buf);
3356 }
3357
3358 /* Append a basic block at the level of the parent flow.
3359 */
3360 static LLVMBasicBlockRef append_basic_block(struct ac_llvm_context *ctx,
3361 const char *name)
3362 {
3363 assert(ctx->flow->depth >= 1);
3364
3365 if (ctx->flow->depth >= 2) {
3366 struct ac_llvm_flow *flow = &ctx->flow->stack[ctx->flow->depth - 2];
3367
3368 return LLVMInsertBasicBlockInContext(ctx->context,
3369 flow->next_block, name);
3370 }
3371
3372 LLVMValueRef main_fn =
3373 LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx->builder));
3374 return LLVMAppendBasicBlockInContext(ctx->context, main_fn, name);
3375 }
3376
3377 /* Emit a branch to the given default target for the current block if
3378 * applicable -- that is, if the current block does not already contain a
3379 * branch from a break or continue.
3380 */
3381 static void emit_default_branch(LLVMBuilderRef builder,
3382 LLVMBasicBlockRef target)
3383 {
3384 if (!LLVMGetBasicBlockTerminator(LLVMGetInsertBlock(builder)))
3385 LLVMBuildBr(builder, target);
3386 }
3387
3388 void ac_build_bgnloop(struct ac_llvm_context *ctx, int label_id)
3389 {
3390 struct ac_llvm_flow *flow = push_flow(ctx);
3391 flow->loop_entry_block = append_basic_block(ctx, "LOOP");
3392 flow->next_block = append_basic_block(ctx, "ENDLOOP");
3393 set_basicblock_name(flow->loop_entry_block, "loop", label_id);
3394 LLVMBuildBr(ctx->builder, flow->loop_entry_block);
3395 LLVMPositionBuilderAtEnd(ctx->builder, flow->loop_entry_block);
3396 }
3397
3398 void ac_build_break(struct ac_llvm_context *ctx)
3399 {
3400 struct ac_llvm_flow *flow = get_innermost_loop(ctx);
3401 LLVMBuildBr(ctx->builder, flow->next_block);
3402 }
3403
3404 void ac_build_continue(struct ac_llvm_context *ctx)
3405 {
3406 struct ac_llvm_flow *flow = get_innermost_loop(ctx);
3407 LLVMBuildBr(ctx->builder, flow->loop_entry_block);
3408 }
3409
3410 void ac_build_else(struct ac_llvm_context *ctx, int label_id)
3411 {
3412 struct ac_llvm_flow *current_branch = get_current_flow(ctx);
3413 LLVMBasicBlockRef endif_block;
3414
3415 assert(!current_branch->loop_entry_block);
3416
3417 endif_block = append_basic_block(ctx, "ENDIF");
3418 emit_default_branch(ctx->builder, endif_block);
3419
3420 LLVMPositionBuilderAtEnd(ctx->builder, current_branch->next_block);
3421 set_basicblock_name(current_branch->next_block, "else", label_id);
3422
3423 current_branch->next_block = endif_block;
3424 }
3425
3426 void ac_build_endif(struct ac_llvm_context *ctx, int label_id)
3427 {
3428 struct ac_llvm_flow *current_branch = get_current_flow(ctx);
3429
3430 assert(!current_branch->loop_entry_block);
3431
3432 emit_default_branch(ctx->builder, current_branch->next_block);
3433 LLVMPositionBuilderAtEnd(ctx->builder, current_branch->next_block);
3434 set_basicblock_name(current_branch->next_block, "endif", label_id);
3435
3436 ctx->flow->depth--;
3437 }
3438
3439 void ac_build_endloop(struct ac_llvm_context *ctx, int label_id)
3440 {
3441 struct ac_llvm_flow *current_loop = get_current_flow(ctx);
3442
3443 assert(current_loop->loop_entry_block);
3444
3445 emit_default_branch(ctx->builder, current_loop->loop_entry_block);
3446
3447 LLVMPositionBuilderAtEnd(ctx->builder, current_loop->next_block);
3448 set_basicblock_name(current_loop->next_block, "endloop", label_id);
3449 ctx->flow->depth--;
3450 }
3451
3452 void ac_build_ifcc(struct ac_llvm_context *ctx, LLVMValueRef cond, int label_id)
3453 {
3454 struct ac_llvm_flow *flow = push_flow(ctx);
3455 LLVMBasicBlockRef if_block;
3456
3457 if_block = append_basic_block(ctx, "IF");
3458 flow->next_block = append_basic_block(ctx, "ELSE");
3459 set_basicblock_name(if_block, "if", label_id);
3460 LLVMBuildCondBr(ctx->builder, cond, if_block, flow->next_block);
3461 LLVMPositionBuilderAtEnd(ctx->builder, if_block);
3462 }
3463
3464 void ac_build_if(struct ac_llvm_context *ctx, LLVMValueRef value,
3465 int label_id)
3466 {
3467 LLVMValueRef cond = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
3468 value, ctx->f32_0, "");
3469 ac_build_ifcc(ctx, cond, label_id);
3470 }
3471
3472 void ac_build_uif(struct ac_llvm_context *ctx, LLVMValueRef value,
3473 int label_id)
3474 {
3475 LLVMValueRef cond = LLVMBuildICmp(ctx->builder, LLVMIntNE,
3476 ac_to_integer(ctx, value),
3477 ctx->i32_0, "");
3478 ac_build_ifcc(ctx, cond, label_id);
3479 }
3480
3481 LLVMValueRef ac_build_alloca_undef(struct ac_llvm_context *ac, LLVMTypeRef type,
3482 const char *name)
3483 {
3484 LLVMBuilderRef builder = ac->builder;
3485 LLVMBasicBlockRef current_block = LLVMGetInsertBlock(builder);
3486 LLVMValueRef function = LLVMGetBasicBlockParent(current_block);
3487 LLVMBasicBlockRef first_block = LLVMGetEntryBasicBlock(function);
3488 LLVMValueRef first_instr = LLVMGetFirstInstruction(first_block);
3489 LLVMBuilderRef first_builder = LLVMCreateBuilderInContext(ac->context);
3490 LLVMValueRef res;
3491
3492 if (first_instr) {
3493 LLVMPositionBuilderBefore(first_builder, first_instr);
3494 } else {
3495 LLVMPositionBuilderAtEnd(first_builder, first_block);
3496 }
3497
3498 res = LLVMBuildAlloca(first_builder, type, name);
3499 LLVMDisposeBuilder(first_builder);
3500 return res;
3501 }
3502
3503 LLVMValueRef ac_build_alloca(struct ac_llvm_context *ac,
3504 LLVMTypeRef type, const char *name)
3505 {
3506 LLVMValueRef ptr = ac_build_alloca_undef(ac, type, name);
3507 LLVMBuildStore(ac->builder, LLVMConstNull(type), ptr);
3508 return ptr;
3509 }
3510
3511 LLVMValueRef ac_cast_ptr(struct ac_llvm_context *ctx, LLVMValueRef ptr,
3512 LLVMTypeRef type)
3513 {
3514 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3515 return LLVMBuildBitCast(ctx->builder, ptr,
3516 LLVMPointerType(type, addr_space), "");
3517 }
3518
3519 LLVMValueRef ac_trim_vector(struct ac_llvm_context *ctx, LLVMValueRef value,
3520 unsigned count)
3521 {
3522 unsigned num_components = ac_get_llvm_num_components(value);
3523 if (count == num_components)
3524 return value;
3525
3526 LLVMValueRef masks[MAX2(count, 2)];
3527 masks[0] = ctx->i32_0;
3528 masks[1] = ctx->i32_1;
3529 for (unsigned i = 2; i < count; i++)
3530 masks[i] = LLVMConstInt(ctx->i32, i, false);
3531
3532 if (count == 1)
3533 return LLVMBuildExtractElement(ctx->builder, value, masks[0],
3534 "");
3535
3536 LLVMValueRef swizzle = LLVMConstVector(masks, count);
3537 return LLVMBuildShuffleVector(ctx->builder, value, value, swizzle, "");
3538 }
3539
3540 LLVMValueRef ac_unpack_param(struct ac_llvm_context *ctx, LLVMValueRef param,
3541 unsigned rshift, unsigned bitwidth)
3542 {
3543 LLVMValueRef value = param;
3544 if (rshift)
3545 value = LLVMBuildLShr(ctx->builder, value,
3546 LLVMConstInt(ctx->i32, rshift, false), "");
3547
3548 if (rshift + bitwidth < 32) {
3549 unsigned mask = (1 << bitwidth) - 1;
3550 value = LLVMBuildAnd(ctx->builder, value,
3551 LLVMConstInt(ctx->i32, mask, false), "");
3552 }
3553 return value;
3554 }
3555
3556 /* Adjust the sample index according to FMASK.
3557 *
3558 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3559 * which is the identity mapping. Each nibble says which physical sample
3560 * should be fetched to get that sample.
3561 *
3562 * For example, 0x11111100 means there are only 2 samples stored and
3563 * the second sample covers 3/4 of the pixel. When reading samples 0
3564 * and 1, return physical sample 0 (determined by the first two 0s
3565 * in FMASK), otherwise return physical sample 1.
3566 *
3567 * The sample index should be adjusted as follows:
3568 * addr[sample_index] = (fmask >> (addr[sample_index] * 4)) & 0xF;
3569 */
3570 void ac_apply_fmask_to_sample(struct ac_llvm_context *ac, LLVMValueRef fmask,
3571 LLVMValueRef *addr, bool is_array_tex)
3572 {
3573 struct ac_image_args fmask_load = {};
3574 fmask_load.opcode = ac_image_load;
3575 fmask_load.resource = fmask;
3576 fmask_load.dmask = 0xf;
3577 fmask_load.dim = is_array_tex ? ac_image_2darray : ac_image_2d;
3578 fmask_load.attributes = AC_FUNC_ATTR_READNONE;
3579
3580 fmask_load.coords[0] = addr[0];
3581 fmask_load.coords[1] = addr[1];
3582 if (is_array_tex)
3583 fmask_load.coords[2] = addr[2];
3584
3585 LLVMValueRef fmask_value = ac_build_image_opcode(ac, &fmask_load);
3586 fmask_value = LLVMBuildExtractElement(ac->builder, fmask_value,
3587 ac->i32_0, "");
3588
3589 /* Apply the formula. */
3590 unsigned sample_chan = is_array_tex ? 3 : 2;
3591 LLVMValueRef final_sample;
3592 final_sample = LLVMBuildMul(ac->builder, addr[sample_chan],
3593 LLVMConstInt(ac->i32, 4, 0), "");
3594 final_sample = LLVMBuildLShr(ac->builder, fmask_value, final_sample, "");
3595 /* Mask the sample index by 0x7, because 0x8 means an unknown value
3596 * with EQAA, so those will map to 0. */
3597 final_sample = LLVMBuildAnd(ac->builder, final_sample,
3598 LLVMConstInt(ac->i32, 0x7, 0), "");
3599
3600 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3601 * resource descriptor is 0 (invalid).
3602 */
3603 LLVMValueRef tmp;
3604 tmp = LLVMBuildBitCast(ac->builder, fmask, ac->v8i32, "");
3605 tmp = LLVMBuildExtractElement(ac->builder, tmp, ac->i32_1, "");
3606 tmp = LLVMBuildICmp(ac->builder, LLVMIntNE, tmp, ac->i32_0, "");
3607
3608 /* Replace the MSAA sample index. */
3609 addr[sample_chan] = LLVMBuildSelect(ac->builder, tmp, final_sample,
3610 addr[sample_chan], "");
3611 }
3612
3613 static LLVMValueRef
3614 _ac_build_readlane(struct ac_llvm_context *ctx, LLVMValueRef src,
3615 LLVMValueRef lane, bool with_opt_barrier)
3616 {
3617 LLVMTypeRef type = LLVMTypeOf(src);
3618 LLVMValueRef result;
3619
3620 if (with_opt_barrier)
3621 ac_build_optimization_barrier(ctx, &src);
3622
3623 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3624 if (lane)
3625 lane = LLVMBuildZExt(ctx->builder, lane, ctx->i32, "");
3626
3627 result = ac_build_intrinsic(ctx,
3628 lane == NULL ? "llvm.amdgcn.readfirstlane" : "llvm.amdgcn.readlane",
3629 ctx->i32, (LLVMValueRef []) { src, lane },
3630 lane == NULL ? 1 : 2,
3631 AC_FUNC_ATTR_READNONE |
3632 AC_FUNC_ATTR_CONVERGENT);
3633
3634 return LLVMBuildTrunc(ctx->builder, result, type, "");
3635 }
3636
3637 static LLVMValueRef
3638 ac_build_readlane_common(struct ac_llvm_context *ctx,
3639 LLVMValueRef src, LLVMValueRef lane,
3640 bool with_opt_barrier)
3641 {
3642 LLVMTypeRef src_type = LLVMTypeOf(src);
3643 src = ac_to_integer(ctx, src);
3644 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(src));
3645 LLVMValueRef ret;
3646
3647 if (bits > 32) {
3648 assert(bits % 32 == 0);
3649 LLVMTypeRef vec_type = LLVMVectorType(ctx->i32, bits / 32);
3650 LLVMValueRef src_vector =
3651 LLVMBuildBitCast(ctx->builder, src, vec_type, "");
3652 ret = LLVMGetUndef(vec_type);
3653 for (unsigned i = 0; i < bits / 32; i++) {
3654 LLVMValueRef ret_comp;
3655
3656 src = LLVMBuildExtractElement(ctx->builder, src_vector,
3657 LLVMConstInt(ctx->i32, i, 0), "");
3658
3659 ret_comp = _ac_build_readlane(ctx, src, lane,
3660 with_opt_barrier);
3661
3662 ret = LLVMBuildInsertElement(ctx->builder, ret, ret_comp,
3663 LLVMConstInt(ctx->i32, i, 0), "");
3664 }
3665 } else {
3666 ret = _ac_build_readlane(ctx, src, lane, with_opt_barrier);
3667 }
3668
3669 if (LLVMGetTypeKind(src_type) == LLVMPointerTypeKind)
3670 return LLVMBuildIntToPtr(ctx->builder, ret, src_type, "");
3671 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
3672 }
3673
3674 /**
3675 * Builds the "llvm.amdgcn.readlane" or "llvm.amdgcn.readfirstlane" intrinsic.
3676 *
3677 * The optimization barrier is not needed if the value is the same in all lanes
3678 * or if this is called in the outermost block.
3679 *
3680 * @param ctx
3681 * @param src
3682 * @param lane - id of the lane or NULL for the first active lane
3683 * @return value of the lane
3684 */
3685 LLVMValueRef ac_build_readlane_no_opt_barrier(struct ac_llvm_context *ctx,
3686 LLVMValueRef src, LLVMValueRef lane)
3687 {
3688 return ac_build_readlane_common(ctx, src, lane, false);
3689 }
3690
3691
3692 LLVMValueRef
3693 ac_build_readlane(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef lane)
3694 {
3695 return ac_build_readlane_common(ctx, src, lane, true);
3696 }
3697
3698 LLVMValueRef
3699 ac_build_writelane(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef value, LLVMValueRef lane)
3700 {
3701 return ac_build_intrinsic(ctx, "llvm.amdgcn.writelane", ctx->i32,
3702 (LLVMValueRef []) {value, lane, src}, 3,
3703 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_CONVERGENT);
3704 }
3705
3706 LLVMValueRef
3707 ac_build_mbcnt(struct ac_llvm_context *ctx, LLVMValueRef mask)
3708 {
3709 if (ctx->wave_size == 32) {
3710 return ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.lo", ctx->i32,
3711 (LLVMValueRef []) { mask, ctx->i32_0 },
3712 2, AC_FUNC_ATTR_READNONE);
3713 }
3714 LLVMValueRef mask_vec = LLVMBuildBitCast(ctx->builder, mask,
3715 LLVMVectorType(ctx->i32, 2),
3716 "");
3717 LLVMValueRef mask_lo = LLVMBuildExtractElement(ctx->builder, mask_vec,
3718 ctx->i32_0, "");
3719 LLVMValueRef mask_hi = LLVMBuildExtractElement(ctx->builder, mask_vec,
3720 ctx->i32_1, "");
3721 LLVMValueRef val =
3722 ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.lo", ctx->i32,
3723 (LLVMValueRef []) { mask_lo, ctx->i32_0 },
3724 2, AC_FUNC_ATTR_READNONE);
3725 val = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi", ctx->i32,
3726 (LLVMValueRef []) { mask_hi, val },
3727 2, AC_FUNC_ATTR_READNONE);
3728 return val;
3729 }
3730
3731 enum dpp_ctrl {
3732 _dpp_quad_perm = 0x000,
3733 _dpp_row_sl = 0x100,
3734 _dpp_row_sr = 0x110,
3735 _dpp_row_rr = 0x120,
3736 dpp_wf_sl1 = 0x130,
3737 dpp_wf_rl1 = 0x134,
3738 dpp_wf_sr1 = 0x138,
3739 dpp_wf_rr1 = 0x13C,
3740 dpp_row_mirror = 0x140,
3741 dpp_row_half_mirror = 0x141,
3742 dpp_row_bcast15 = 0x142,
3743 dpp_row_bcast31 = 0x143
3744 };
3745
3746 static inline enum dpp_ctrl
3747 dpp_quad_perm(unsigned lane0, unsigned lane1, unsigned lane2, unsigned lane3)
3748 {
3749 assert(lane0 < 4 && lane1 < 4 && lane2 < 4 && lane3 < 4);
3750 return _dpp_quad_perm | lane0 | (lane1 << 2) | (lane2 << 4) | (lane3 << 6);
3751 }
3752
3753 static inline enum dpp_ctrl
3754 dpp_row_sl(unsigned amount)
3755 {
3756 assert(amount > 0 && amount < 16);
3757 return _dpp_row_sl | amount;
3758 }
3759
3760 static inline enum dpp_ctrl
3761 dpp_row_sr(unsigned amount)
3762 {
3763 assert(amount > 0 && amount < 16);
3764 return _dpp_row_sr | amount;
3765 }
3766
3767 static LLVMValueRef
3768 _ac_build_dpp(struct ac_llvm_context *ctx, LLVMValueRef old, LLVMValueRef src,
3769 enum dpp_ctrl dpp_ctrl, unsigned row_mask, unsigned bank_mask,
3770 bool bound_ctrl)
3771 {
3772 LLVMTypeRef type = LLVMTypeOf(src);
3773 LLVMValueRef res;
3774
3775 old = LLVMBuildZExt(ctx->builder, old, ctx->i32, "");
3776 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3777
3778 res = ac_build_intrinsic(ctx, "llvm.amdgcn.update.dpp.i32", ctx->i32,
3779 (LLVMValueRef[]) {
3780 old, src,
3781 LLVMConstInt(ctx->i32, dpp_ctrl, 0),
3782 LLVMConstInt(ctx->i32, row_mask, 0),
3783 LLVMConstInt(ctx->i32, bank_mask, 0),
3784 LLVMConstInt(ctx->i1, bound_ctrl, 0) },
3785 6, AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_CONVERGENT);
3786
3787 return LLVMBuildTrunc(ctx->builder, res, type, "");
3788 }
3789
3790 static LLVMValueRef
3791 ac_build_dpp(struct ac_llvm_context *ctx, LLVMValueRef old, LLVMValueRef src,
3792 enum dpp_ctrl dpp_ctrl, unsigned row_mask, unsigned bank_mask,
3793 bool bound_ctrl)
3794 {
3795 LLVMTypeRef src_type = LLVMTypeOf(src);
3796 src = ac_to_integer(ctx, src);
3797 old = ac_to_integer(ctx, old);
3798 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(src));
3799 LLVMValueRef ret;
3800 if (bits > 32) {
3801 assert(bits % 32 == 0);
3802 LLVMTypeRef vec_type = LLVMVectorType(ctx->i32, bits / 32);
3803 LLVMValueRef src_vector =
3804 LLVMBuildBitCast(ctx->builder, src, vec_type, "");
3805 LLVMValueRef old_vector =
3806 LLVMBuildBitCast(ctx->builder, old, vec_type, "");
3807 ret = LLVMGetUndef(vec_type);
3808 for (unsigned i = 0; i < bits / 32; i++) {
3809 src = LLVMBuildExtractElement(ctx->builder, src_vector,
3810 LLVMConstInt(ctx->i32, i,
3811 0), "");
3812 old = LLVMBuildExtractElement(ctx->builder, old_vector,
3813 LLVMConstInt(ctx->i32, i,
3814 0), "");
3815 LLVMValueRef ret_comp = _ac_build_dpp(ctx, old, src,
3816 dpp_ctrl,
3817 row_mask,
3818 bank_mask,
3819 bound_ctrl);
3820 ret = LLVMBuildInsertElement(ctx->builder, ret,
3821 ret_comp,
3822 LLVMConstInt(ctx->i32, i,
3823 0), "");
3824 }
3825 } else {
3826 ret = _ac_build_dpp(ctx, old, src, dpp_ctrl, row_mask,
3827 bank_mask, bound_ctrl);
3828 }
3829 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
3830 }
3831
3832 static LLVMValueRef
3833 _ac_build_permlane16(struct ac_llvm_context *ctx, LLVMValueRef src, uint64_t sel,
3834 bool exchange_rows, bool bound_ctrl)
3835 {
3836 LLVMTypeRef type = LLVMTypeOf(src);
3837 LLVMValueRef result;
3838
3839 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3840
3841 LLVMValueRef args[6] = {
3842 src,
3843 src,
3844 LLVMConstInt(ctx->i32, sel, false),
3845 LLVMConstInt(ctx->i32, sel >> 32, false),
3846 ctx->i1true, /* fi */
3847 bound_ctrl ? ctx->i1true : ctx->i1false,
3848 };
3849
3850 result = ac_build_intrinsic(ctx, exchange_rows ? "llvm.amdgcn.permlanex16"
3851 : "llvm.amdgcn.permlane16",
3852 ctx->i32, args, 6,
3853 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_CONVERGENT);
3854
3855 return LLVMBuildTrunc(ctx->builder, result, type, "");
3856 }
3857
3858 static LLVMValueRef
3859 ac_build_permlane16(struct ac_llvm_context *ctx, LLVMValueRef src, uint64_t sel,
3860 bool exchange_rows, bool bound_ctrl)
3861 {
3862 LLVMTypeRef src_type = LLVMTypeOf(src);
3863 src = ac_to_integer(ctx, src);
3864 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(src));
3865 LLVMValueRef ret;
3866 if (bits > 32) {
3867 assert(bits % 32 == 0);
3868 LLVMTypeRef vec_type = LLVMVectorType(ctx->i32, bits / 32);
3869 LLVMValueRef src_vector =
3870 LLVMBuildBitCast(ctx->builder, src, vec_type, "");
3871 ret = LLVMGetUndef(vec_type);
3872 for (unsigned i = 0; i < bits / 32; i++) {
3873 src = LLVMBuildExtractElement(ctx->builder, src_vector,
3874 LLVMConstInt(ctx->i32, i,
3875 0), "");
3876 LLVMValueRef ret_comp =
3877 _ac_build_permlane16(ctx, src, sel,
3878 exchange_rows,
3879 bound_ctrl);
3880 ret = LLVMBuildInsertElement(ctx->builder, ret,
3881 ret_comp,
3882 LLVMConstInt(ctx->i32, i,
3883 0), "");
3884 }
3885 } else {
3886 ret = _ac_build_permlane16(ctx, src, sel, exchange_rows,
3887 bound_ctrl);
3888 }
3889 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
3890 }
3891
3892 static inline unsigned
3893 ds_pattern_bitmode(unsigned and_mask, unsigned or_mask, unsigned xor_mask)
3894 {
3895 assert(and_mask < 32 && or_mask < 32 && xor_mask < 32);
3896 return and_mask | (or_mask << 5) | (xor_mask << 10);
3897 }
3898
3899 static LLVMValueRef
3900 _ac_build_ds_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned mask)
3901 {
3902 LLVMTypeRef src_type = LLVMTypeOf(src);
3903 LLVMValueRef ret;
3904
3905 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3906
3907 ret = ac_build_intrinsic(ctx, "llvm.amdgcn.ds.swizzle", ctx->i32,
3908 (LLVMValueRef []) {
3909 src, LLVMConstInt(ctx->i32, mask, 0) },
3910 2, AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_CONVERGENT);
3911
3912 return LLVMBuildTrunc(ctx->builder, ret, src_type, "");
3913 }
3914
3915 LLVMValueRef
3916 ac_build_ds_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned mask)
3917 {
3918 LLVMTypeRef src_type = LLVMTypeOf(src);
3919 src = ac_to_integer(ctx, src);
3920 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(src));
3921 LLVMValueRef ret;
3922 if (bits > 32) {
3923 assert(bits % 32 == 0);
3924 LLVMTypeRef vec_type = LLVMVectorType(ctx->i32, bits / 32);
3925 LLVMValueRef src_vector =
3926 LLVMBuildBitCast(ctx->builder, src, vec_type, "");
3927 ret = LLVMGetUndef(vec_type);
3928 for (unsigned i = 0; i < bits / 32; i++) {
3929 src = LLVMBuildExtractElement(ctx->builder, src_vector,
3930 LLVMConstInt(ctx->i32, i,
3931 0), "");
3932 LLVMValueRef ret_comp = _ac_build_ds_swizzle(ctx, src,
3933 mask);
3934 ret = LLVMBuildInsertElement(ctx->builder, ret,
3935 ret_comp,
3936 LLVMConstInt(ctx->i32, i,
3937 0), "");
3938 }
3939 } else {
3940 ret = _ac_build_ds_swizzle(ctx, src, mask);
3941 }
3942 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
3943 }
3944
3945 static LLVMValueRef
3946 ac_build_wwm(struct ac_llvm_context *ctx, LLVMValueRef src)
3947 {
3948 LLVMTypeRef src_type = LLVMTypeOf(src);
3949 unsigned bitsize = ac_get_elem_bits(ctx, src_type);
3950 char name[32], type[8];
3951 LLVMValueRef ret;
3952
3953 src = ac_to_integer(ctx, src);
3954
3955 if (bitsize < 32)
3956 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3957
3958 ac_build_type_name_for_intr(LLVMTypeOf(src), type, sizeof(type));
3959 snprintf(name, sizeof(name), "llvm.amdgcn.wwm.%s", type);
3960 ret = ac_build_intrinsic(ctx, name, LLVMTypeOf(src),
3961 (LLVMValueRef []) { src }, 1,
3962 AC_FUNC_ATTR_READNONE);
3963
3964 if (bitsize < 32)
3965 ret = LLVMBuildTrunc(ctx->builder, ret,
3966 ac_to_integer_type(ctx, src_type), "");
3967
3968 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
3969 }
3970
3971 static LLVMValueRef
3972 ac_build_set_inactive(struct ac_llvm_context *ctx, LLVMValueRef src,
3973 LLVMValueRef inactive)
3974 {
3975 char name[33], type[8];
3976 LLVMTypeRef src_type = LLVMTypeOf(src);
3977 unsigned bitsize = ac_get_elem_bits(ctx, src_type);
3978 src = ac_to_integer(ctx, src);
3979 inactive = ac_to_integer(ctx, inactive);
3980
3981 if (bitsize < 32) {
3982 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3983 inactive = LLVMBuildZExt(ctx->builder, inactive, ctx->i32, "");
3984 }
3985
3986 ac_build_type_name_for_intr(LLVMTypeOf(src), type, sizeof(type));
3987 snprintf(name, sizeof(name), "llvm.amdgcn.set.inactive.%s", type);
3988 LLVMValueRef ret =
3989 ac_build_intrinsic(ctx, name,
3990 LLVMTypeOf(src), (LLVMValueRef []) {
3991 src, inactive }, 2,
3992 AC_FUNC_ATTR_READNONE |
3993 AC_FUNC_ATTR_CONVERGENT);
3994 if (bitsize < 32)
3995 ret = LLVMBuildTrunc(ctx->builder, ret, src_type, "");
3996
3997 return ret;
3998 }
3999
4000 static LLVMValueRef
4001 get_reduction_identity(struct ac_llvm_context *ctx, nir_op op, unsigned type_size)
4002 {
4003 if (type_size == 1) {
4004 switch (op) {
4005 case nir_op_iadd: return ctx->i8_0;
4006 case nir_op_imul: return ctx->i8_1;
4007 case nir_op_imin: return LLVMConstInt(ctx->i8, INT8_MAX, 0);
4008 case nir_op_umin: return LLVMConstInt(ctx->i8, UINT8_MAX, 0);
4009 case nir_op_imax: return LLVMConstInt(ctx->i8, INT8_MIN, 0);
4010 case nir_op_umax: return ctx->i8_0;
4011 case nir_op_iand: return LLVMConstInt(ctx->i8, -1, 0);
4012 case nir_op_ior: return ctx->i8_0;
4013 case nir_op_ixor: return ctx->i8_0;
4014 default:
4015 unreachable("bad reduction intrinsic");
4016 }
4017 } else if (type_size == 2) {
4018 switch (op) {
4019 case nir_op_iadd: return ctx->i16_0;
4020 case nir_op_fadd: return ctx->f16_0;
4021 case nir_op_imul: return ctx->i16_1;
4022 case nir_op_fmul: return ctx->f16_1;
4023 case nir_op_imin: return LLVMConstInt(ctx->i16, INT16_MAX, 0);
4024 case nir_op_umin: return LLVMConstInt(ctx->i16, UINT16_MAX, 0);
4025 case nir_op_fmin: return LLVMConstReal(ctx->f16, INFINITY);
4026 case nir_op_imax: return LLVMConstInt(ctx->i16, INT16_MIN, 0);
4027 case nir_op_umax: return ctx->i16_0;
4028 case nir_op_fmax: return LLVMConstReal(ctx->f16, -INFINITY);
4029 case nir_op_iand: return LLVMConstInt(ctx->i16, -1, 0);
4030 case nir_op_ior: return ctx->i16_0;
4031 case nir_op_ixor: return ctx->i16_0;
4032 default:
4033 unreachable("bad reduction intrinsic");
4034 }
4035 } else if (type_size == 4) {
4036 switch (op) {
4037 case nir_op_iadd: return ctx->i32_0;
4038 case nir_op_fadd: return ctx->f32_0;
4039 case nir_op_imul: return ctx->i32_1;
4040 case nir_op_fmul: return ctx->f32_1;
4041 case nir_op_imin: return LLVMConstInt(ctx->i32, INT32_MAX, 0);
4042 case nir_op_umin: return LLVMConstInt(ctx->i32, UINT32_MAX, 0);
4043 case nir_op_fmin: return LLVMConstReal(ctx->f32, INFINITY);
4044 case nir_op_imax: return LLVMConstInt(ctx->i32, INT32_MIN, 0);
4045 case nir_op_umax: return ctx->i32_0;
4046 case nir_op_fmax: return LLVMConstReal(ctx->f32, -INFINITY);
4047 case nir_op_iand: return LLVMConstInt(ctx->i32, -1, 0);
4048 case nir_op_ior: return ctx->i32_0;
4049 case nir_op_ixor: return ctx->i32_0;
4050 default:
4051 unreachable("bad reduction intrinsic");
4052 }
4053 } else { /* type_size == 64bit */
4054 switch (op) {
4055 case nir_op_iadd: return ctx->i64_0;
4056 case nir_op_fadd: return ctx->f64_0;
4057 case nir_op_imul: return ctx->i64_1;
4058 case nir_op_fmul: return ctx->f64_1;
4059 case nir_op_imin: return LLVMConstInt(ctx->i64, INT64_MAX, 0);
4060 case nir_op_umin: return LLVMConstInt(ctx->i64, UINT64_MAX, 0);
4061 case nir_op_fmin: return LLVMConstReal(ctx->f64, INFINITY);
4062 case nir_op_imax: return LLVMConstInt(ctx->i64, INT64_MIN, 0);
4063 case nir_op_umax: return ctx->i64_0;
4064 case nir_op_fmax: return LLVMConstReal(ctx->f64, -INFINITY);
4065 case nir_op_iand: return LLVMConstInt(ctx->i64, -1, 0);
4066 case nir_op_ior: return ctx->i64_0;
4067 case nir_op_ixor: return ctx->i64_0;
4068 default:
4069 unreachable("bad reduction intrinsic");
4070 }
4071 }
4072 }
4073
4074 static LLVMValueRef
4075 ac_build_alu_op(struct ac_llvm_context *ctx, LLVMValueRef lhs, LLVMValueRef rhs, nir_op op)
4076 {
4077 bool _64bit = ac_get_type_size(LLVMTypeOf(lhs)) == 8;
4078 bool _32bit = ac_get_type_size(LLVMTypeOf(lhs)) == 4;
4079 switch (op) {
4080 case nir_op_iadd: return LLVMBuildAdd(ctx->builder, lhs, rhs, "");
4081 case nir_op_fadd: return LLVMBuildFAdd(ctx->builder, lhs, rhs, "");
4082 case nir_op_imul: return LLVMBuildMul(ctx->builder, lhs, rhs, "");
4083 case nir_op_fmul: return LLVMBuildFMul(ctx->builder, lhs, rhs, "");
4084 case nir_op_imin: return LLVMBuildSelect(ctx->builder,
4085 LLVMBuildICmp(ctx->builder, LLVMIntSLT, lhs, rhs, ""),
4086 lhs, rhs, "");
4087 case nir_op_umin: return LLVMBuildSelect(ctx->builder,
4088 LLVMBuildICmp(ctx->builder, LLVMIntULT, lhs, rhs, ""),
4089 lhs, rhs, "");
4090 case nir_op_fmin: return ac_build_intrinsic(ctx,
4091 _64bit ? "llvm.minnum.f64" : _32bit ? "llvm.minnum.f32" : "llvm.minnum.f16",
4092 _64bit ? ctx->f64 : _32bit ? ctx->f32 : ctx->f16,
4093 (LLVMValueRef[]){lhs, rhs}, 2, AC_FUNC_ATTR_READNONE);
4094 case nir_op_imax: return LLVMBuildSelect(ctx->builder,
4095 LLVMBuildICmp(ctx->builder, LLVMIntSGT, lhs, rhs, ""),
4096 lhs, rhs, "");
4097 case nir_op_umax: return LLVMBuildSelect(ctx->builder,
4098 LLVMBuildICmp(ctx->builder, LLVMIntUGT, lhs, rhs, ""),
4099 lhs, rhs, "");
4100 case nir_op_fmax: return ac_build_intrinsic(ctx,
4101 _64bit ? "llvm.maxnum.f64" : _32bit ? "llvm.maxnum.f32" : "llvm.maxnum.f16",
4102 _64bit ? ctx->f64 : _32bit ? ctx->f32 : ctx->f16,
4103 (LLVMValueRef[]){lhs, rhs}, 2, AC_FUNC_ATTR_READNONE);
4104 case nir_op_iand: return LLVMBuildAnd(ctx->builder, lhs, rhs, "");
4105 case nir_op_ior: return LLVMBuildOr(ctx->builder, lhs, rhs, "");
4106 case nir_op_ixor: return LLVMBuildXor(ctx->builder, lhs, rhs, "");
4107 default:
4108 unreachable("bad reduction intrinsic");
4109 }
4110 }
4111
4112 /**
4113 * \param src The value to shift.
4114 * \param identity The value to use the first lane.
4115 * \param maxprefix specifies that the result only needs to be correct for a
4116 * prefix of this many threads
4117 * \return src, shifted 1 lane up, and identity shifted into lane 0.
4118 */
4119 static LLVMValueRef
4120 ac_wavefront_shift_right_1(struct ac_llvm_context *ctx, LLVMValueRef src,
4121 LLVMValueRef identity, unsigned maxprefix)
4122 {
4123 if (ctx->chip_class >= GFX10) {
4124 /* wavefront shift_right by 1 on GFX10 (emulate dpp_wf_sr1) */
4125 LLVMValueRef active, tmp1, tmp2;
4126 LLVMValueRef tid = ac_get_thread_id(ctx);
4127
4128 tmp1 = ac_build_dpp(ctx, identity, src, dpp_row_sr(1), 0xf, 0xf, false);
4129
4130 tmp2 = ac_build_permlane16(ctx, src, (uint64_t)~0, true, false);
4131
4132 if (maxprefix > 32) {
4133 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tid,
4134 LLVMConstInt(ctx->i32, 32, false), "");
4135
4136 tmp2 = LLVMBuildSelect(ctx->builder, active,
4137 ac_build_readlane(ctx, src,
4138 LLVMConstInt(ctx->i32, 31, false)),
4139 tmp2, "");
4140
4141 active = LLVMBuildOr(ctx->builder, active,
4142 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
4143 LLVMBuildAnd(ctx->builder, tid,
4144 LLVMConstInt(ctx->i32, 0x1f, false), ""),
4145 LLVMConstInt(ctx->i32, 0x10, false), ""), "");
4146 return LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4147 } else if (maxprefix > 16) {
4148 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tid,
4149 LLVMConstInt(ctx->i32, 16, false), "");
4150
4151 return LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4152 }
4153 } else if (ctx->chip_class >= GFX8) {
4154 return ac_build_dpp(ctx, identity, src, dpp_wf_sr1, 0xf, 0xf, false);
4155 }
4156
4157 /* wavefront shift_right by 1 on SI/CI */
4158 LLVMValueRef active, tmp1, tmp2;
4159 LLVMValueRef tid = ac_get_thread_id(ctx);
4160 tmp1 = ac_build_ds_swizzle(ctx, src, (1 << 15) | dpp_quad_perm(0, 0, 1, 2));
4161 tmp2 = ac_build_ds_swizzle(ctx, src, ds_pattern_bitmode(0x18, 0x03, 0x00));
4162 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
4163 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 0x7, 0), ""),
4164 LLVMConstInt(ctx->i32, 0x4, 0), "");
4165 tmp1 = LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4166 tmp2 = ac_build_ds_swizzle(ctx, src, ds_pattern_bitmode(0x10, 0x07, 0x00));
4167 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
4168 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 0xf, 0), ""),
4169 LLVMConstInt(ctx->i32, 0x8, 0), "");
4170 tmp1 = LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4171 tmp2 = ac_build_ds_swizzle(ctx, src, ds_pattern_bitmode(0x00, 0x0f, 0x00));
4172 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
4173 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 0x1f, 0), ""),
4174 LLVMConstInt(ctx->i32, 0x10, 0), "");
4175 tmp1 = LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4176 tmp2 = ac_build_readlane(ctx, src, LLVMConstInt(ctx->i32, 31, 0));
4177 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tid, LLVMConstInt(ctx->i32, 32, 0), "");
4178 tmp1 = LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4179 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tid, LLVMConstInt(ctx->i32, 0, 0), "");
4180 return LLVMBuildSelect(ctx->builder, active, identity, tmp1, "");
4181 }
4182
4183 /**
4184 * \param maxprefix specifies that the result only needs to be correct for a
4185 * prefix of this many threads
4186 */
4187 static LLVMValueRef
4188 ac_build_scan(struct ac_llvm_context *ctx, nir_op op, LLVMValueRef src, LLVMValueRef identity,
4189 unsigned maxprefix, bool inclusive)
4190 {
4191 LLVMValueRef result, tmp;
4192
4193 if (!inclusive)
4194 src = ac_wavefront_shift_right_1(ctx, src, identity, maxprefix);
4195
4196 result = src;
4197
4198 if (ctx->chip_class <= GFX7) {
4199 assert(maxprefix == 64);
4200 LLVMValueRef tid = ac_get_thread_id(ctx);
4201 LLVMValueRef active;
4202 tmp = ac_build_ds_swizzle(ctx, src, ds_pattern_bitmode(0x1e, 0x00, 0x00));
4203 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4204 LLVMBuildAnd(ctx->builder, tid, ctx->i32_1, ""),
4205 ctx->i32_0, "");
4206 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4207 result = ac_build_alu_op(ctx, result, tmp, op);
4208 tmp = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x1c, 0x01, 0x00));
4209 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4210 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 2, 0), ""),
4211 ctx->i32_0, "");
4212 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4213 result = ac_build_alu_op(ctx, result, tmp, op);
4214 tmp = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x18, 0x03, 0x00));
4215 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4216 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 4, 0), ""),
4217 ctx->i32_0, "");
4218 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4219 result = ac_build_alu_op(ctx, result, tmp, op);
4220 tmp = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x10, 0x07, 0x00));
4221 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4222 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 8, 0), ""),
4223 ctx->i32_0, "");
4224 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4225 result = ac_build_alu_op(ctx, result, tmp, op);
4226 tmp = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x00, 0x0f, 0x00));
4227 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4228 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 16, 0), ""),
4229 ctx->i32_0, "");
4230 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4231 result = ac_build_alu_op(ctx, result, tmp, op);
4232 tmp = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 31, 0));
4233 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4234 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 32, 0), ""),
4235 ctx->i32_0, "");
4236 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4237 result = ac_build_alu_op(ctx, result, tmp, op);
4238 return result;
4239 }
4240
4241 if (maxprefix <= 1)
4242 return result;
4243 tmp = ac_build_dpp(ctx, identity, src, dpp_row_sr(1), 0xf, 0xf, false);
4244 result = ac_build_alu_op(ctx, result, tmp, op);
4245 if (maxprefix <= 2)
4246 return result;
4247 tmp = ac_build_dpp(ctx, identity, src, dpp_row_sr(2), 0xf, 0xf, false);
4248 result = ac_build_alu_op(ctx, result, tmp, op);
4249 if (maxprefix <= 3)
4250 return result;
4251 tmp = ac_build_dpp(ctx, identity, src, dpp_row_sr(3), 0xf, 0xf, false);
4252 result = ac_build_alu_op(ctx, result, tmp, op);
4253 if (maxprefix <= 4)
4254 return result;
4255 tmp = ac_build_dpp(ctx, identity, result, dpp_row_sr(4), 0xf, 0xe, false);
4256 result = ac_build_alu_op(ctx, result, tmp, op);
4257 if (maxprefix <= 8)
4258 return result;
4259 tmp = ac_build_dpp(ctx, identity, result, dpp_row_sr(8), 0xf, 0xc, false);
4260 result = ac_build_alu_op(ctx, result, tmp, op);
4261 if (maxprefix <= 16)
4262 return result;
4263
4264 if (ctx->chip_class >= GFX10) {
4265 LLVMValueRef tid = ac_get_thread_id(ctx);
4266 LLVMValueRef active;
4267
4268 tmp = ac_build_permlane16(ctx, result, ~(uint64_t)0, true, false);
4269
4270 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4271 LLVMBuildAnd(ctx->builder, tid,
4272 LLVMConstInt(ctx->i32, 16, false), ""),
4273 ctx->i32_0, "");
4274
4275 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4276
4277 result = ac_build_alu_op(ctx, result, tmp, op);
4278
4279 if (maxprefix <= 32)
4280 return result;
4281
4282 tmp = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 31, false));
4283
4284 active = LLVMBuildICmp(ctx->builder, LLVMIntUGE, tid,
4285 LLVMConstInt(ctx->i32, 32, false), "");
4286
4287 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4288
4289 result = ac_build_alu_op(ctx, result, tmp, op);
4290 return result;
4291 }
4292
4293 tmp = ac_build_dpp(ctx, identity, result, dpp_row_bcast15, 0xa, 0xf, false);
4294 result = ac_build_alu_op(ctx, result, tmp, op);
4295 if (maxprefix <= 32)
4296 return result;
4297 tmp = ac_build_dpp(ctx, identity, result, dpp_row_bcast31, 0xc, 0xf, false);
4298 result = ac_build_alu_op(ctx, result, tmp, op);
4299 return result;
4300 }
4301
4302 LLVMValueRef
4303 ac_build_inclusive_scan(struct ac_llvm_context *ctx, LLVMValueRef src, nir_op op)
4304 {
4305 LLVMValueRef result;
4306
4307 if (LLVMTypeOf(src) == ctx->i1 && op == nir_op_iadd) {
4308 LLVMBuilderRef builder = ctx->builder;
4309 src = LLVMBuildZExt(builder, src, ctx->i32, "");
4310 result = ac_build_ballot(ctx, src);
4311 result = ac_build_mbcnt(ctx, result);
4312 result = LLVMBuildAdd(builder, result, src, "");
4313 return result;
4314 }
4315
4316 ac_build_optimization_barrier(ctx, &src);
4317
4318 LLVMValueRef identity =
4319 get_reduction_identity(ctx, op, ac_get_type_size(LLVMTypeOf(src)));
4320 result = LLVMBuildBitCast(ctx->builder, ac_build_set_inactive(ctx, src, identity),
4321 LLVMTypeOf(identity), "");
4322 result = ac_build_scan(ctx, op, result, identity, ctx->wave_size, true);
4323
4324 return ac_build_wwm(ctx, result);
4325 }
4326
4327 LLVMValueRef
4328 ac_build_exclusive_scan(struct ac_llvm_context *ctx, LLVMValueRef src, nir_op op)
4329 {
4330 LLVMValueRef result;
4331
4332 if (LLVMTypeOf(src) == ctx->i1 && op == nir_op_iadd) {
4333 LLVMBuilderRef builder = ctx->builder;
4334 src = LLVMBuildZExt(builder, src, ctx->i32, "");
4335 result = ac_build_ballot(ctx, src);
4336 result = ac_build_mbcnt(ctx, result);
4337 return result;
4338 }
4339
4340 ac_build_optimization_barrier(ctx, &src);
4341
4342 LLVMValueRef identity =
4343 get_reduction_identity(ctx, op, ac_get_type_size(LLVMTypeOf(src)));
4344 result = LLVMBuildBitCast(ctx->builder, ac_build_set_inactive(ctx, src, identity),
4345 LLVMTypeOf(identity), "");
4346 result = ac_build_scan(ctx, op, result, identity, ctx->wave_size, false);
4347
4348 return ac_build_wwm(ctx, result);
4349 }
4350
4351 LLVMValueRef
4352 ac_build_reduce(struct ac_llvm_context *ctx, LLVMValueRef src, nir_op op, unsigned cluster_size)
4353 {
4354 if (cluster_size == 1) return src;
4355 ac_build_optimization_barrier(ctx, &src);
4356 LLVMValueRef result, swap;
4357 LLVMValueRef identity = get_reduction_identity(ctx, op,
4358 ac_get_type_size(LLVMTypeOf(src)));
4359 result = LLVMBuildBitCast(ctx->builder,
4360 ac_build_set_inactive(ctx, src, identity),
4361 LLVMTypeOf(identity), "");
4362 swap = ac_build_quad_swizzle(ctx, result, 1, 0, 3, 2);
4363 result = ac_build_alu_op(ctx, result, swap, op);
4364 if (cluster_size == 2) return ac_build_wwm(ctx, result);
4365
4366 swap = ac_build_quad_swizzle(ctx, result, 2, 3, 0, 1);
4367 result = ac_build_alu_op(ctx, result, swap, op);
4368 if (cluster_size == 4) return ac_build_wwm(ctx, result);
4369
4370 if (ctx->chip_class >= GFX8)
4371 swap = ac_build_dpp(ctx, identity, result, dpp_row_half_mirror, 0xf, 0xf, false);
4372 else
4373 swap = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x1f, 0, 0x04));
4374 result = ac_build_alu_op(ctx, result, swap, op);
4375 if (cluster_size == 8) return ac_build_wwm(ctx, result);
4376
4377 if (ctx->chip_class >= GFX8)
4378 swap = ac_build_dpp(ctx, identity, result, dpp_row_mirror, 0xf, 0xf, false);
4379 else
4380 swap = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x1f, 0, 0x08));
4381 result = ac_build_alu_op(ctx, result, swap, op);
4382 if (cluster_size == 16) return ac_build_wwm(ctx, result);
4383
4384 if (ctx->chip_class >= GFX10)
4385 swap = ac_build_permlane16(ctx, result, 0, true, false);
4386 else if (ctx->chip_class >= GFX8 && cluster_size != 32)
4387 swap = ac_build_dpp(ctx, identity, result, dpp_row_bcast15, 0xa, 0xf, false);
4388 else
4389 swap = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x1f, 0, 0x10));
4390 result = ac_build_alu_op(ctx, result, swap, op);
4391 if (cluster_size == 32) return ac_build_wwm(ctx, result);
4392
4393 if (ctx->chip_class >= GFX8) {
4394 if (ctx->wave_size == 64) {
4395 if (ctx->chip_class >= GFX10)
4396 swap = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 31, false));
4397 else
4398 swap = ac_build_dpp(ctx, identity, result, dpp_row_bcast31, 0xc, 0xf, false);
4399 result = ac_build_alu_op(ctx, result, swap, op);
4400 result = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 63, 0));
4401 }
4402
4403 return ac_build_wwm(ctx, result);
4404 } else {
4405 swap = ac_build_readlane(ctx, result, ctx->i32_0);
4406 result = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 32, 0));
4407 result = ac_build_alu_op(ctx, result, swap, op);
4408 return ac_build_wwm(ctx, result);
4409 }
4410 }
4411
4412 /**
4413 * "Top half" of a scan that reduces per-wave values across an entire
4414 * workgroup.
4415 *
4416 * The source value must be present in the highest lane of the wave, and the
4417 * highest lane must be live.
4418 */
4419 void
4420 ac_build_wg_wavescan_top(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4421 {
4422 if (ws->maxwaves <= 1)
4423 return;
4424
4425 const LLVMValueRef last_lane = LLVMConstInt(ctx->i32, ctx->wave_size - 1, false);
4426 LLVMBuilderRef builder = ctx->builder;
4427 LLVMValueRef tid = ac_get_thread_id(ctx);
4428 LLVMValueRef tmp;
4429
4430 tmp = LLVMBuildICmp(builder, LLVMIntEQ, tid, last_lane, "");
4431 ac_build_ifcc(ctx, tmp, 1000);
4432 LLVMBuildStore(builder, ws->src, LLVMBuildGEP(builder, ws->scratch, &ws->waveidx, 1, ""));
4433 ac_build_endif(ctx, 1000);
4434 }
4435
4436 /**
4437 * "Bottom half" of a scan that reduces per-wave values across an entire
4438 * workgroup.
4439 *
4440 * The caller must place a barrier between the top and bottom halves.
4441 */
4442 void
4443 ac_build_wg_wavescan_bottom(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4444 {
4445 const LLVMTypeRef type = LLVMTypeOf(ws->src);
4446 const LLVMValueRef identity =
4447 get_reduction_identity(ctx, ws->op, ac_get_type_size(type));
4448
4449 if (ws->maxwaves <= 1) {
4450 ws->result_reduce = ws->src;
4451 ws->result_inclusive = ws->src;
4452 ws->result_exclusive = identity;
4453 return;
4454 }
4455 assert(ws->maxwaves <= 32);
4456
4457 LLVMBuilderRef builder = ctx->builder;
4458 LLVMValueRef tid = ac_get_thread_id(ctx);
4459 LLVMBasicBlockRef bbs[2];
4460 LLVMValueRef phivalues_scan[2];
4461 LLVMValueRef tmp, tmp2;
4462
4463 bbs[0] = LLVMGetInsertBlock(builder);
4464 phivalues_scan[0] = LLVMGetUndef(type);
4465
4466 if (ws->enable_reduce)
4467 tmp = LLVMBuildICmp(builder, LLVMIntULT, tid, ws->numwaves, "");
4468 else if (ws->enable_inclusive)
4469 tmp = LLVMBuildICmp(builder, LLVMIntULE, tid, ws->waveidx, "");
4470 else
4471 tmp = LLVMBuildICmp(builder, LLVMIntULT, tid, ws->waveidx, "");
4472 ac_build_ifcc(ctx, tmp, 1001);
4473 {
4474 tmp = LLVMBuildLoad(builder, LLVMBuildGEP(builder, ws->scratch, &tid, 1, ""), "");
4475
4476 ac_build_optimization_barrier(ctx, &tmp);
4477
4478 bbs[1] = LLVMGetInsertBlock(builder);
4479 phivalues_scan[1] = ac_build_scan(ctx, ws->op, tmp, identity, ws->maxwaves, true);
4480 }
4481 ac_build_endif(ctx, 1001);
4482
4483 const LLVMValueRef scan = ac_build_phi(ctx, type, 2, phivalues_scan, bbs);
4484
4485 if (ws->enable_reduce) {
4486 tmp = LLVMBuildSub(builder, ws->numwaves, ctx->i32_1, "");
4487 ws->result_reduce = ac_build_readlane(ctx, scan, tmp);
4488 }
4489 if (ws->enable_inclusive)
4490 ws->result_inclusive = ac_build_readlane(ctx, scan, ws->waveidx);
4491 if (ws->enable_exclusive) {
4492 tmp = LLVMBuildSub(builder, ws->waveidx, ctx->i32_1, "");
4493 tmp = ac_build_readlane(ctx, scan, tmp);
4494 tmp2 = LLVMBuildICmp(builder, LLVMIntEQ, ws->waveidx, ctx->i32_0, "");
4495 ws->result_exclusive = LLVMBuildSelect(builder, tmp2, identity, tmp, "");
4496 }
4497 }
4498
4499 /**
4500 * Inclusive scan of a per-wave value across an entire workgroup.
4501 *
4502 * This implies an s_barrier instruction.
4503 *
4504 * Unlike ac_build_inclusive_scan, the caller \em must ensure that all threads
4505 * of the workgroup are live. (This requirement cannot easily be relaxed in a
4506 * useful manner because of the barrier in the algorithm.)
4507 */
4508 void
4509 ac_build_wg_wavescan(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4510 {
4511 ac_build_wg_wavescan_top(ctx, ws);
4512 ac_build_s_barrier(ctx);
4513 ac_build_wg_wavescan_bottom(ctx, ws);
4514 }
4515
4516 /**
4517 * "Top half" of a scan that reduces per-thread values across an entire
4518 * workgroup.
4519 *
4520 * All lanes must be active when this code runs.
4521 */
4522 void
4523 ac_build_wg_scan_top(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4524 {
4525 if (ws->enable_exclusive) {
4526 ws->extra = ac_build_exclusive_scan(ctx, ws->src, ws->op);
4527 if (LLVMTypeOf(ws->src) == ctx->i1 && ws->op == nir_op_iadd)
4528 ws->src = LLVMBuildZExt(ctx->builder, ws->src, ctx->i32, "");
4529 ws->src = ac_build_alu_op(ctx, ws->extra, ws->src, ws->op);
4530 } else {
4531 ws->src = ac_build_inclusive_scan(ctx, ws->src, ws->op);
4532 }
4533
4534 bool enable_inclusive = ws->enable_inclusive;
4535 bool enable_exclusive = ws->enable_exclusive;
4536 ws->enable_inclusive = false;
4537 ws->enable_exclusive = ws->enable_exclusive || enable_inclusive;
4538 ac_build_wg_wavescan_top(ctx, ws);
4539 ws->enable_inclusive = enable_inclusive;
4540 ws->enable_exclusive = enable_exclusive;
4541 }
4542
4543 /**
4544 * "Bottom half" of a scan that reduces per-thread values across an entire
4545 * workgroup.
4546 *
4547 * The caller must place a barrier between the top and bottom halves.
4548 */
4549 void
4550 ac_build_wg_scan_bottom(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4551 {
4552 bool enable_inclusive = ws->enable_inclusive;
4553 bool enable_exclusive = ws->enable_exclusive;
4554 ws->enable_inclusive = false;
4555 ws->enable_exclusive = ws->enable_exclusive || enable_inclusive;
4556 ac_build_wg_wavescan_bottom(ctx, ws);
4557 ws->enable_inclusive = enable_inclusive;
4558 ws->enable_exclusive = enable_exclusive;
4559
4560 /* ws->result_reduce is already the correct value */
4561 if (ws->enable_inclusive)
4562 ws->result_inclusive = ac_build_alu_op(ctx, ws->result_inclusive, ws->src, ws->op);
4563 if (ws->enable_exclusive)
4564 ws->result_exclusive = ac_build_alu_op(ctx, ws->result_exclusive, ws->extra, ws->op);
4565 }
4566
4567 /**
4568 * A scan that reduces per-thread values across an entire workgroup.
4569 *
4570 * The caller must ensure that all lanes are active when this code runs
4571 * (WWM is insufficient!), because there is an implied barrier.
4572 */
4573 void
4574 ac_build_wg_scan(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4575 {
4576 ac_build_wg_scan_top(ctx, ws);
4577 ac_build_s_barrier(ctx);
4578 ac_build_wg_scan_bottom(ctx, ws);
4579 }
4580
4581 LLVMValueRef
4582 ac_build_quad_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src,
4583 unsigned lane0, unsigned lane1, unsigned lane2, unsigned lane3)
4584 {
4585 unsigned mask = dpp_quad_perm(lane0, lane1, lane2, lane3);
4586 if (ctx->chip_class >= GFX8) {
4587 return ac_build_dpp(ctx, src, src, mask, 0xf, 0xf, false);
4588 } else {
4589 return ac_build_ds_swizzle(ctx, src, (1 << 15) | mask);
4590 }
4591 }
4592
4593 LLVMValueRef
4594 ac_build_shuffle(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef index)
4595 {
4596 LLVMTypeRef type = LLVMTypeOf(src);
4597 LLVMValueRef result;
4598
4599 index = LLVMBuildMul(ctx->builder, index, LLVMConstInt(ctx->i32, 4, 0), "");
4600 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
4601
4602 result = ac_build_intrinsic(ctx, "llvm.amdgcn.ds.bpermute", ctx->i32,
4603 (LLVMValueRef []) {index, src}, 2,
4604 AC_FUNC_ATTR_READNONE |
4605 AC_FUNC_ATTR_CONVERGENT);
4606 return LLVMBuildTrunc(ctx->builder, result, type, "");
4607 }
4608
4609 LLVMValueRef
4610 ac_build_frexp_exp(struct ac_llvm_context *ctx, LLVMValueRef src0,
4611 unsigned bitsize)
4612 {
4613 LLVMTypeRef type;
4614 char *intr;
4615
4616 if (bitsize == 16) {
4617 intr = "llvm.amdgcn.frexp.exp.i16.f16";
4618 type = ctx->i16;
4619 } else if (bitsize == 32) {
4620 intr = "llvm.amdgcn.frexp.exp.i32.f32";
4621 type = ctx->i32;
4622 } else {
4623 intr = "llvm.amdgcn.frexp.exp.i32.f64";
4624 type = ctx->i32;
4625 }
4626
4627 LLVMValueRef params[] = {
4628 src0,
4629 };
4630 return ac_build_intrinsic(ctx, intr, type, params, 1,
4631 AC_FUNC_ATTR_READNONE);
4632 }
4633 LLVMValueRef
4634 ac_build_frexp_mant(struct ac_llvm_context *ctx, LLVMValueRef src0,
4635 unsigned bitsize)
4636 {
4637 LLVMTypeRef type;
4638 char *intr;
4639
4640 if (bitsize == 16) {
4641 intr = "llvm.amdgcn.frexp.mant.f16";
4642 type = ctx->f16;
4643 } else if (bitsize == 32) {
4644 intr = "llvm.amdgcn.frexp.mant.f32";
4645 type = ctx->f32;
4646 } else {
4647 intr = "llvm.amdgcn.frexp.mant.f64";
4648 type = ctx->f64;
4649 }
4650
4651 LLVMValueRef params[] = {
4652 src0,
4653 };
4654 return ac_build_intrinsic(ctx, intr, type, params, 1,
4655 AC_FUNC_ATTR_READNONE);
4656 }
4657
4658 LLVMValueRef
4659 ac_build_canonicalize(struct ac_llvm_context *ctx, LLVMValueRef src0,
4660 unsigned bitsize)
4661 {
4662 LLVMTypeRef type;
4663 char *intr;
4664
4665 if (bitsize == 16) {
4666 intr = "llvm.canonicalize.f16";
4667 type = ctx->f16;
4668 } else if (bitsize == 32) {
4669 intr = "llvm.canonicalize.f32";
4670 type = ctx->f32;
4671 } else {
4672 intr = "llvm.canonicalize.f64";
4673 type = ctx->f64;
4674 }
4675
4676 LLVMValueRef params[] = {
4677 src0,
4678 };
4679 return ac_build_intrinsic(ctx, intr, type, params, 1,
4680 AC_FUNC_ATTR_READNONE);
4681 }
4682
4683 /*
4684 * this takes an I,J coordinate pair,
4685 * and works out the X and Y derivatives.
4686 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
4687 */
4688 LLVMValueRef
4689 ac_build_ddxy_interp(struct ac_llvm_context *ctx, LLVMValueRef interp_ij)
4690 {
4691 LLVMValueRef result[4], a;
4692 unsigned i;
4693
4694 for (i = 0; i < 2; i++) {
4695 a = LLVMBuildExtractElement(ctx->builder, interp_ij,
4696 LLVMConstInt(ctx->i32, i, false), "");
4697 result[i] = ac_build_ddxy(ctx, AC_TID_MASK_TOP_LEFT, 1, a);
4698 result[2+i] = ac_build_ddxy(ctx, AC_TID_MASK_TOP_LEFT, 2, a);
4699 }
4700 return ac_build_gather_values(ctx, result, 4);
4701 }
4702
4703 LLVMValueRef
4704 ac_build_load_helper_invocation(struct ac_llvm_context *ctx)
4705 {
4706 LLVMValueRef result = ac_build_intrinsic(ctx, "llvm.amdgcn.ps.live",
4707 ctx->i1, NULL, 0,
4708 AC_FUNC_ATTR_READNONE);
4709 result = LLVMBuildNot(ctx->builder, result, "");
4710 return LLVMBuildSExt(ctx->builder, result, ctx->i32, "");
4711 }
4712
4713 LLVMValueRef
4714 ac_build_is_helper_invocation(struct ac_llvm_context *ctx)
4715 {
4716 if (!ctx->postponed_kill)
4717 return ac_build_load_helper_invocation(ctx);
4718
4719 /* !(exact && postponed) */
4720 LLVMValueRef exact = ac_build_intrinsic(ctx, "llvm.amdgcn.ps.live",
4721 ctx->i1, NULL, 0,
4722 AC_FUNC_ATTR_READNONE);
4723
4724 LLVMValueRef postponed = LLVMBuildLoad(ctx->builder, ctx->postponed_kill, "");
4725 LLVMValueRef result = LLVMBuildAnd(ctx->builder, exact, postponed, "");
4726
4727 return LLVMBuildSelect(ctx->builder, result, ctx->i32_0,
4728 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false), "");
4729 }
4730
4731 LLVMValueRef ac_build_call(struct ac_llvm_context *ctx, LLVMValueRef func,
4732 LLVMValueRef *args, unsigned num_args)
4733 {
4734 LLVMValueRef ret = LLVMBuildCall(ctx->builder, func, args, num_args, "");
4735 LLVMSetInstructionCallConv(ret, LLVMGetFunctionCallConv(func));
4736 return ret;
4737 }
4738
4739 void
4740 ac_export_mrt_z(struct ac_llvm_context *ctx, LLVMValueRef depth,
4741 LLVMValueRef stencil, LLVMValueRef samplemask,
4742 struct ac_export_args *args)
4743 {
4744 unsigned mask = 0;
4745 unsigned format = ac_get_spi_shader_z_format(depth != NULL,
4746 stencil != NULL,
4747 samplemask != NULL);
4748
4749 assert(depth || stencil || samplemask);
4750
4751 memset(args, 0, sizeof(*args));
4752
4753 args->valid_mask = 1; /* whether the EXEC mask is valid */
4754 args->done = 1; /* DONE bit */
4755
4756 /* Specify the target we are exporting */
4757 args->target = V_008DFC_SQ_EXP_MRTZ;
4758
4759 args->compr = 0; /* COMP flag */
4760 args->out[0] = LLVMGetUndef(ctx->f32); /* R, depth */
4761 args->out[1] = LLVMGetUndef(ctx->f32); /* G, stencil test val[0:7], stencil op val[8:15] */
4762 args->out[2] = LLVMGetUndef(ctx->f32); /* B, sample mask */
4763 args->out[3] = LLVMGetUndef(ctx->f32); /* A, alpha to mask */
4764
4765 if (format == V_028710_SPI_SHADER_UINT16_ABGR) {
4766 assert(!depth);
4767 args->compr = 1; /* COMPR flag */
4768
4769 if (stencil) {
4770 /* Stencil should be in X[23:16]. */
4771 stencil = ac_to_integer(ctx, stencil);
4772 stencil = LLVMBuildShl(ctx->builder, stencil,
4773 LLVMConstInt(ctx->i32, 16, 0), "");
4774 args->out[0] = ac_to_float(ctx, stencil);
4775 mask |= 0x3;
4776 }
4777 if (samplemask) {
4778 /* SampleMask should be in Y[15:0]. */
4779 args->out[1] = samplemask;
4780 mask |= 0xc;
4781 }
4782 } else {
4783 if (depth) {
4784 args->out[0] = depth;
4785 mask |= 0x1;
4786 }
4787 if (stencil) {
4788 args->out[1] = stencil;
4789 mask |= 0x2;
4790 }
4791 if (samplemask) {
4792 args->out[2] = samplemask;
4793 mask |= 0x4;
4794 }
4795 }
4796
4797 /* GFX6 (except OLAND and HAINAN) has a bug that it only looks
4798 * at the X writemask component. */
4799 if (ctx->chip_class == GFX6 &&
4800 ctx->family != CHIP_OLAND &&
4801 ctx->family != CHIP_HAINAN)
4802 mask |= 0x1;
4803
4804 /* Specify which components to enable */
4805 args->enabled_channels = mask;
4806 }
4807
4808 /* Send GS Alloc Req message from the first wave of the group to SPI.
4809 * Message payload is:
4810 * - bits 0..10: vertices in group
4811 * - bits 12..22: primitives in group
4812 */
4813 void ac_build_sendmsg_gs_alloc_req(struct ac_llvm_context *ctx, LLVMValueRef wave_id,
4814 LLVMValueRef vtx_cnt, LLVMValueRef prim_cnt)
4815 {
4816 LLVMBuilderRef builder = ctx->builder;
4817 LLVMValueRef tmp;
4818 bool export_dummy_prim = false;
4819
4820 /* HW workaround for a GPU hang with 100% culling.
4821 * We always have to export at least 1 primitive.
4822 * Export a degenerate triangle using vertex 0 for all 3 vertices.
4823 */
4824 if (prim_cnt == ctx->i32_0 && ctx->chip_class == GFX10) {
4825 assert(vtx_cnt == ctx->i32_0);
4826 prim_cnt = ctx->i32_1;
4827 vtx_cnt = ctx->i32_1;
4828 export_dummy_prim = true;
4829 }
4830
4831 ac_build_ifcc(ctx, LLVMBuildICmp(builder, LLVMIntEQ, wave_id, ctx->i32_0, ""), 5020);
4832
4833 tmp = LLVMBuildShl(builder, prim_cnt, LLVMConstInt(ctx->i32, 12, false),"");
4834 tmp = LLVMBuildOr(builder, tmp, vtx_cnt, "");
4835 ac_build_sendmsg(ctx, AC_SENDMSG_GS_ALLOC_REQ, tmp);
4836
4837 if (export_dummy_prim) {
4838 struct ac_ngg_prim prim = {};
4839 /* The vertex indices are 0,0,0. */
4840 prim.passthrough = ctx->i32_0;
4841
4842 struct ac_export_args pos = {};
4843 pos.out[0] = pos.out[1] = pos.out[2] = pos.out[3] = ctx->f32_0;
4844 pos.target = V_008DFC_SQ_EXP_POS;
4845 pos.enabled_channels = 0xf;
4846 pos.done = true;
4847
4848 ac_build_ifcc(ctx, LLVMBuildICmp(builder, LLVMIntEQ, ac_get_thread_id(ctx),
4849 ctx->i32_0, ""), 5021);
4850 ac_build_export_prim(ctx, &prim);
4851 ac_build_export(ctx, &pos);
4852 ac_build_endif(ctx, 5021);
4853 }
4854
4855 ac_build_endif(ctx, 5020);
4856 }
4857
4858 LLVMValueRef ac_pack_prim_export(struct ac_llvm_context *ctx,
4859 const struct ac_ngg_prim *prim)
4860 {
4861 /* The prim export format is:
4862 * - bits 0..8: index 0
4863 * - bit 9: edge flag 0
4864 * - bits 10..18: index 1
4865 * - bit 19: edge flag 1
4866 * - bits 20..28: index 2
4867 * - bit 29: edge flag 2
4868 * - bit 31: null primitive (skip)
4869 */
4870 LLVMBuilderRef builder = ctx->builder;
4871 LLVMValueRef tmp = LLVMBuildZExt(builder, prim->isnull, ctx->i32, "");
4872 LLVMValueRef result = LLVMBuildShl(builder, tmp, LLVMConstInt(ctx->i32, 31, false), "");
4873
4874 for (unsigned i = 0; i < prim->num_vertices; ++i) {
4875 tmp = LLVMBuildShl(builder, prim->index[i],
4876 LLVMConstInt(ctx->i32, 10 * i, false), "");
4877 result = LLVMBuildOr(builder, result, tmp, "");
4878 tmp = LLVMBuildZExt(builder, prim->edgeflag[i], ctx->i32, "");
4879 tmp = LLVMBuildShl(builder, tmp,
4880 LLVMConstInt(ctx->i32, 10 * i + 9, false), "");
4881 result = LLVMBuildOr(builder, result, tmp, "");
4882 }
4883 return result;
4884 }
4885
4886 void ac_build_export_prim(struct ac_llvm_context *ctx,
4887 const struct ac_ngg_prim *prim)
4888 {
4889 struct ac_export_args args;
4890
4891 if (prim->passthrough) {
4892 args.out[0] = prim->passthrough;
4893 } else {
4894 args.out[0] = ac_pack_prim_export(ctx, prim);
4895 }
4896
4897 args.out[0] = LLVMBuildBitCast(ctx->builder, args.out[0], ctx->f32, "");
4898 args.out[1] = LLVMGetUndef(ctx->f32);
4899 args.out[2] = LLVMGetUndef(ctx->f32);
4900 args.out[3] = LLVMGetUndef(ctx->f32);
4901
4902 args.target = V_008DFC_SQ_EXP_PRIM;
4903 args.enabled_channels = 1;
4904 args.done = true;
4905 args.valid_mask = false;
4906 args.compr = false;
4907
4908 ac_build_export(ctx, &args);
4909 }
4910
4911 static LLVMTypeRef
4912 arg_llvm_type(enum ac_arg_type type, unsigned size, struct ac_llvm_context *ctx)
4913 {
4914 if (type == AC_ARG_FLOAT) {
4915 return size == 1 ? ctx->f32 : LLVMVectorType(ctx->f32, size);
4916 } else if (type == AC_ARG_INT) {
4917 return size == 1 ? ctx->i32 : LLVMVectorType(ctx->i32, size);
4918 } else {
4919 LLVMTypeRef ptr_type;
4920 switch (type) {
4921 case AC_ARG_CONST_PTR:
4922 ptr_type = ctx->i8;
4923 break;
4924 case AC_ARG_CONST_FLOAT_PTR:
4925 ptr_type = ctx->f32;
4926 break;
4927 case AC_ARG_CONST_PTR_PTR:
4928 ptr_type = ac_array_in_const32_addr_space(ctx->i8);
4929 break;
4930 case AC_ARG_CONST_DESC_PTR:
4931 ptr_type = ctx->v4i32;
4932 break;
4933 case AC_ARG_CONST_IMAGE_PTR:
4934 ptr_type = ctx->v8i32;
4935 break;
4936 default:
4937 unreachable("unknown arg type");
4938 }
4939 if (size == 1) {
4940 return ac_array_in_const32_addr_space(ptr_type);
4941 } else {
4942 assert(size == 2);
4943 return ac_array_in_const_addr_space(ptr_type);
4944 }
4945 }
4946 }
4947
4948 LLVMValueRef
4949 ac_build_main(const struct ac_shader_args *args,
4950 struct ac_llvm_context *ctx,
4951 enum ac_llvm_calling_convention convention,
4952 const char *name, LLVMTypeRef ret_type,
4953 LLVMModuleRef module)
4954 {
4955 LLVMTypeRef arg_types[AC_MAX_ARGS];
4956
4957 for (unsigned i = 0; i < args->arg_count; i++) {
4958 arg_types[i] = arg_llvm_type(args->args[i].type,
4959 args->args[i].size, ctx);
4960 }
4961
4962 LLVMTypeRef main_function_type =
4963 LLVMFunctionType(ret_type, arg_types, args->arg_count, 0);
4964
4965 LLVMValueRef main_function =
4966 LLVMAddFunction(module, name, main_function_type);
4967 LLVMBasicBlockRef main_function_body =
4968 LLVMAppendBasicBlockInContext(ctx->context, main_function, "main_body");
4969 LLVMPositionBuilderAtEnd(ctx->builder, main_function_body);
4970
4971 LLVMSetFunctionCallConv(main_function, convention);
4972 for (unsigned i = 0; i < args->arg_count; ++i) {
4973 LLVMValueRef P = LLVMGetParam(main_function, i);
4974
4975 if (args->args[i].file != AC_ARG_SGPR)
4976 continue;
4977
4978 ac_add_function_attr(ctx->context, main_function, i + 1, AC_FUNC_ATTR_INREG);
4979
4980 if (LLVMGetTypeKind(LLVMTypeOf(P)) == LLVMPointerTypeKind) {
4981 ac_add_function_attr(ctx->context, main_function, i + 1, AC_FUNC_ATTR_NOALIAS);
4982 ac_add_attr_dereferenceable(P, UINT64_MAX);
4983 }
4984 }
4985
4986 ctx->main_function = main_function;
4987
4988 if (LLVM_VERSION_MAJOR >= 11) {
4989 /* Enable denormals for FP16 and FP64: */
4990 LLVMAddTargetDependentFunctionAttr(main_function, "denormal-fp-math",
4991 "ieee,ieee");
4992 /* Disable denormals for FP32: */
4993 LLVMAddTargetDependentFunctionAttr(main_function, "denormal-fp-math-f32",
4994 "preserve-sign,preserve-sign");
4995 }
4996 return main_function;
4997 }
4998
4999 void ac_build_s_endpgm(struct ac_llvm_context *ctx)
5000 {
5001 LLVMTypeRef calltype = LLVMFunctionType(ctx->voidt, NULL, 0, false);
5002 LLVMValueRef code = LLVMConstInlineAsm(calltype, "s_endpgm", "", true, false);
5003 LLVMBuildCall(ctx->builder, code, NULL, 0, "");
5004 }
5005
5006 LLVMValueRef ac_prefix_bitcount(struct ac_llvm_context *ctx,
5007 LLVMValueRef mask, LLVMValueRef index)
5008 {
5009 LLVMBuilderRef builder = ctx->builder;
5010 LLVMTypeRef type = LLVMTypeOf(mask);
5011
5012 LLVMValueRef bit = LLVMBuildShl(builder, LLVMConstInt(type, 1, 0),
5013 LLVMBuildZExt(builder, index, type, ""), "");
5014 LLVMValueRef prefix_bits = LLVMBuildSub(builder, bit, LLVMConstInt(type, 1, 0), "");
5015 LLVMValueRef prefix_mask = LLVMBuildAnd(builder, mask, prefix_bits, "");
5016 return ac_build_bit_count(ctx, prefix_mask);
5017 }
5018
5019 /* Compute the prefix sum of the "mask" bit array with 128 elements (bits). */
5020 LLVMValueRef ac_prefix_bitcount_2x64(struct ac_llvm_context *ctx,
5021 LLVMValueRef mask[2], LLVMValueRef index)
5022 {
5023 LLVMBuilderRef builder = ctx->builder;
5024 #if 0
5025 /* Reference version using i128. */
5026 LLVMValueRef input_mask =
5027 LLVMBuildBitCast(builder, ac_build_gather_values(ctx, mask, 2), ctx->i128, "");
5028
5029 return ac_prefix_bitcount(ctx, input_mask, index);
5030 #else
5031 /* Optimized version using 2 64-bit masks. */
5032 LLVMValueRef is_hi, is_0, c64, c128, all_bits;
5033 LLVMValueRef prefix_mask[2], shift[2], mask_bcnt0, prefix_bcnt[2];
5034
5035 /* Compute the 128-bit prefix mask. */
5036 c64 = LLVMConstInt(ctx->i32, 64, 0);
5037 c128 = LLVMConstInt(ctx->i32, 128, 0);
5038 all_bits = LLVMConstInt(ctx->i64, UINT64_MAX, 0);
5039 /* The first index that can have non-zero high bits in the prefix mask is 65. */
5040 is_hi = LLVMBuildICmp(builder, LLVMIntUGT, index, c64, "");
5041 is_0 = LLVMBuildICmp(builder, LLVMIntEQ, index, ctx->i32_0, "");
5042 mask_bcnt0 = ac_build_bit_count(ctx, mask[0]);
5043
5044 for (unsigned i = 0; i < 2; i++) {
5045 shift[i] = LLVMBuildSub(builder, i ? c128 : c64, index, "");
5046 /* For i==0, index==0, the right shift by 64 doesn't give the desired result,
5047 * so we handle it by the is_0 select.
5048 * For i==1, index==64, same story, so we handle it by the last is_hi select.
5049 * For i==0, index==64, we shift by 0, which is what we want.
5050 */
5051 prefix_mask[i] = LLVMBuildLShr(builder, all_bits,
5052 LLVMBuildZExt(builder, shift[i], ctx->i64, ""), "");
5053 prefix_mask[i] = LLVMBuildAnd(builder, mask[i], prefix_mask[i], "");
5054 prefix_bcnt[i] = ac_build_bit_count(ctx, prefix_mask[i]);
5055 }
5056
5057 prefix_bcnt[0] = LLVMBuildSelect(builder, is_0, ctx->i32_0, prefix_bcnt[0], "");
5058 prefix_bcnt[0] = LLVMBuildSelect(builder, is_hi, mask_bcnt0, prefix_bcnt[0], "");
5059 prefix_bcnt[1] = LLVMBuildSelect(builder, is_hi, prefix_bcnt[1], ctx->i32_0, "");
5060
5061 return LLVMBuildAdd(builder, prefix_bcnt[0], prefix_bcnt[1], "");
5062 #endif
5063 }
5064
5065 /**
5066 * Convert triangle strip indices to triangle indices. This is used to decompose
5067 * triangle strips into triangles.
5068 */
5069 void ac_build_triangle_strip_indices_to_triangle(struct ac_llvm_context *ctx,
5070 LLVMValueRef is_odd,
5071 LLVMValueRef flatshade_first,
5072 LLVMValueRef index[3])
5073 {
5074 LLVMBuilderRef builder = ctx->builder;
5075 LLVMValueRef out[3];
5076
5077 /* We need to change the vertex order for odd triangles to get correct
5078 * front/back facing by swapping 2 vertex indices, but we also have to
5079 * keep the provoking vertex in the same place.
5080 *
5081 * If the first vertex is provoking, swap index 1 and 2.
5082 * If the last vertex is provoking, swap index 0 and 1.
5083 */
5084 out[0] = LLVMBuildSelect(builder, flatshade_first,
5085 index[0],
5086 LLVMBuildSelect(builder, is_odd,
5087 index[1], index[0], ""), "");
5088 out[1] = LLVMBuildSelect(builder, flatshade_first,
5089 LLVMBuildSelect(builder, is_odd,
5090 index[2], index[1], ""),
5091 LLVMBuildSelect(builder, is_odd,
5092 index[0], index[1], ""), "");
5093 out[2] = LLVMBuildSelect(builder, flatshade_first,
5094 LLVMBuildSelect(builder, is_odd,
5095 index[1], index[2], ""),
5096 index[2], "");
5097 memcpy(index, out, sizeof(out));
5098 }