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ac/llvm: remove the -1 hack from ac_atomic_inc_wrap
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54 struct hash_table *verified_interp;
55
56 LLVMValueRef main_function;
57 LLVMBasicBlockRef continue_block;
58 LLVMBasicBlockRef break_block;
59
60 int num_locals;
61 LLVMValueRef *locals;
62 };
63
64 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
65 nir_deref_instr *deref_instr,
66 const nir_instr *instr,
67 bool image);
68
69 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
70 nir_deref_instr *deref_instr,
71 enum ac_descriptor_type desc_type,
72 const nir_instr *instr,
73 LLVMValueRef index,
74 bool image, bool write);
75
76 static void
77 build_store_values_extended(struct ac_llvm_context *ac,
78 LLVMValueRef *values,
79 unsigned value_count,
80 unsigned value_stride,
81 LLVMValueRef vec)
82 {
83 LLVMBuilderRef builder = ac->builder;
84 unsigned i;
85
86 for (i = 0; i < value_count; i++) {
87 LLVMValueRef ptr = values[i * value_stride];
88 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
89 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
90 LLVMBuildStore(builder, value, ptr);
91 }
92 }
93
94 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
95 const nir_ssa_def *def)
96 {
97 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
98 if (def->num_components > 1) {
99 type = LLVMVectorType(type, def->num_components);
100 }
101 return type;
102 }
103
104 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
105 {
106 assert(src.is_ssa);
107 return nir->ssa_defs[src.ssa->index];
108 }
109
110 static LLVMValueRef
111 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
112 {
113 LLVMValueRef ptr = get_src(ctx, src);
114 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
115 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
116
117 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
118
119 return LLVMBuildBitCast(ctx->ac.builder, ptr,
120 LLVMPointerType(type, addr_space), "");
121 }
122
123 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
124 const struct nir_block *b)
125 {
126 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
127 return (LLVMBasicBlockRef)entry->data;
128 }
129
130 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
131 nir_alu_src src,
132 unsigned num_components)
133 {
134 LLVMValueRef value = get_src(ctx, src.src);
135 bool need_swizzle = false;
136
137 assert(value);
138 unsigned src_components = ac_get_llvm_num_components(value);
139 for (unsigned i = 0; i < num_components; ++i) {
140 assert(src.swizzle[i] < src_components);
141 if (src.swizzle[i] != i)
142 need_swizzle = true;
143 }
144
145 if (need_swizzle || num_components != src_components) {
146 LLVMValueRef masks[] = {
147 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
150 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
151
152 if (src_components > 1 && num_components == 1) {
153 value = LLVMBuildExtractElement(ctx->ac.builder, value,
154 masks[0], "");
155 } else if (src_components == 1 && num_components > 1) {
156 LLVMValueRef values[] = {value, value, value, value};
157 value = ac_build_gather_values(&ctx->ac, values, num_components);
158 } else {
159 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
160 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
161 swizzle, "");
162 }
163 }
164 assert(!src.negate);
165 assert(!src.abs);
166 return value;
167 }
168
169 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
170 LLVMIntPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMTypeRef src0_type = LLVMTypeOf(src0);
174 LLVMTypeRef src1_type = LLVMTypeOf(src1);
175
176 if (LLVMGetTypeKind(src0_type) == LLVMPointerTypeKind &&
177 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
178 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src0_type, "");
179 } else if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
180 LLVMGetTypeKind(src0_type) != LLVMPointerTypeKind) {
181 src0 = LLVMBuildIntToPtr(ctx->builder, src0, src1_type, "");
182 }
183
184 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
185 return LLVMBuildSelect(ctx->builder, result,
186 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
187 ctx->i32_0, "");
188 }
189
190 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
191 LLVMRealPredicate pred, LLVMValueRef src0,
192 LLVMValueRef src1)
193 {
194 LLVMValueRef result;
195 src0 = ac_to_float(ctx, src0);
196 src1 = ac_to_float(ctx, src1);
197 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
198 return LLVMBuildSelect(ctx->builder, result,
199 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
200 ctx->i32_0, "");
201 }
202
203 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
204 const char *intrin,
205 LLVMTypeRef result_type,
206 LLVMValueRef src0)
207 {
208 char name[64], type[64];
209 LLVMValueRef params[] = {
210 ac_to_float(ctx, src0),
211 };
212
213 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
214 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
215 assert(length < sizeof(name));
216 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
217 }
218
219 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
220 const char *intrin,
221 LLVMTypeRef result_type,
222 LLVMValueRef src0, LLVMValueRef src1)
223 {
224 char name[64], type[64];
225 LLVMValueRef params[] = {
226 ac_to_float(ctx, src0),
227 ac_to_float(ctx, src1),
228 };
229
230 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
231 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
232 assert(length < sizeof(name));
233 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
234 }
235
236 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
237 const char *intrin,
238 LLVMTypeRef result_type,
239 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
240 {
241 char name[64], type[64];
242 LLVMValueRef params[] = {
243 ac_to_float(ctx, src0),
244 ac_to_float(ctx, src1),
245 ac_to_float(ctx, src2),
246 };
247
248 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
249 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
250 assert(length < sizeof(name));
251 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
252 }
253
254 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
255 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
256 {
257 LLVMTypeRef src1_type = LLVMTypeOf(src1);
258 LLVMTypeRef src2_type = LLVMTypeOf(src2);
259
260 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
261
262 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
263 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
264 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
265 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
266 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
267 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
268 }
269
270 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
271 ctx->i32_0, "");
272 return LLVMBuildSelect(ctx->builder, v,
273 ac_to_integer_or_pointer(ctx, src1),
274 ac_to_integer_or_pointer(ctx, src2), "");
275 }
276
277 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
278 LLVMValueRef src0)
279 {
280 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
281 }
282
283 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
284 const char *intrin,
285 LLVMValueRef src0, LLVMValueRef src1)
286 {
287 LLVMTypeRef ret_type;
288 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
289 LLVMValueRef res;
290 LLVMValueRef params[] = { src0, src1 };
291 ret_type = LLVMStructTypeInContext(ctx->context, types,
292 2, true);
293
294 res = ac_build_intrinsic(ctx, intrin, ret_type,
295 params, 2, AC_FUNC_ATTR_READNONE);
296
297 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
298 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
299 return res;
300 }
301
302 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
303 LLVMValueRef src0,
304 unsigned bitsize)
305 {
306 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
307 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
308 "");
309 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
310
311 switch (bitsize) {
312 case 16:
313 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
314 case 32:
315 return result;
316 case 64:
317 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
318 default:
319 unreachable("Unsupported bit size.");
320 }
321 }
322
323 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
324 LLVMValueRef src0)
325 {
326 src0 = ac_to_float(ctx, src0);
327 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
328 return LLVMBuildSExt(ctx->builder,
329 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
330 ctx->i32, "");
331 }
332
333 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
334 LLVMValueRef src0,
335 unsigned bitsize)
336 {
337 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
338
339 switch (bitsize) {
340 case 8:
341 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
342 case 16:
343 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
344 case 32:
345 return result;
346 case 64:
347 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
348 default:
349 unreachable("Unsupported bit size.");
350 }
351 }
352
353 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
354 LLVMValueRef src0)
355 {
356 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
357 return LLVMBuildSExt(ctx->builder,
358 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
359 ctx->i32, "");
360 }
361
362 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
363 LLVMValueRef src0)
364 {
365 LLVMValueRef result;
366 LLVMValueRef cond = NULL;
367
368 src0 = ac_to_float(ctx, src0);
369 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
370
371 if (ctx->chip_class >= GFX8) {
372 LLVMValueRef args[2];
373 /* Check if the result is a denormal - and flush to 0 if so. */
374 args[0] = result;
375 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
376 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
377 }
378
379 /* need to convert back up to f32 */
380 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
381
382 if (ctx->chip_class >= GFX8)
383 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
384 else {
385 /* for GFX6-GFX7 */
386 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
387 * so compare the result and flush to 0 if it's smaller.
388 */
389 LLVMValueRef temp, cond2;
390 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
391 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
392 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
393 temp, "");
394 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
395 temp, ctx->f32_0, "");
396 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
397 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
398 }
399 return result;
400 }
401
402 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
403 LLVMValueRef src0, LLVMValueRef src1)
404 {
405 LLVMValueRef dst64, result;
406 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
407 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
408
409 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
410 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
411 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
412 return result;
413 }
414
415 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
416 LLVMValueRef src0, LLVMValueRef src1)
417 {
418 LLVMValueRef dst64, result;
419 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
420 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
421
422 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
423 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
424 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
425 return result;
426 }
427
428 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
429 LLVMValueRef bits, LLVMValueRef offset)
430 {
431 /* mask = ((1 << bits) - 1) << offset */
432 return LLVMBuildShl(ctx->builder,
433 LLVMBuildSub(ctx->builder,
434 LLVMBuildShl(ctx->builder,
435 ctx->i32_1,
436 bits, ""),
437 ctx->i32_1, ""),
438 offset, "");
439 }
440
441 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
442 LLVMValueRef mask, LLVMValueRef insert,
443 LLVMValueRef base)
444 {
445 /* Calculate:
446 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
447 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
448 */
449 return LLVMBuildXor(ctx->builder, base,
450 LLVMBuildAnd(ctx->builder, mask,
451 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
452 }
453
454 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
455 LLVMValueRef src0,
456 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
457 LLVMValueRef args[2]))
458 {
459 LLVMValueRef comp[2];
460
461 src0 = ac_to_float(ctx, src0);
462 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
463 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
464
465 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
466 }
467
468 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
469 LLVMValueRef src0)
470 {
471 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
472 LLVMValueRef temps[2], val;
473 int i;
474
475 for (i = 0; i < 2; i++) {
476 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
477 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
478 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
479 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
480 }
481 return ac_build_gather_values(ctx, temps, 2);
482 }
483
484 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
485 nir_op op,
486 LLVMValueRef src0)
487 {
488 unsigned mask;
489 int idx;
490 LLVMValueRef result;
491
492 if (op == nir_op_fddx_fine)
493 mask = AC_TID_MASK_LEFT;
494 else if (op == nir_op_fddy_fine)
495 mask = AC_TID_MASK_TOP;
496 else
497 mask = AC_TID_MASK_TOP_LEFT;
498
499 /* for DDX we want to next X pixel, DDY next Y pixel. */
500 if (op == nir_op_fddx_fine ||
501 op == nir_op_fddx_coarse ||
502 op == nir_op_fddx)
503 idx = 1;
504 else
505 idx = 2;
506
507 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
508 return result;
509 }
510
511 struct waterfall_context {
512 LLVMBasicBlockRef phi_bb[2];
513 bool use_waterfall;
514 };
515
516 /* To deal with divergent descriptors we can create a loop that handles all
517 * lanes with the same descriptor on a given iteration (henceforth a
518 * waterfall loop).
519 *
520 * These helper create the begin and end of the loop leaving the caller
521 * to implement the body.
522 *
523 * params:
524 * - ctx is the usal nir context
525 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
526 * - value is the possibly divergent value for which we built the loop
527 * - divergent is whether value is actually divergent. If false we just pass
528 * things through.
529 */
530 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
531 struct waterfall_context *wctx,
532 LLVMValueRef value, bool divergent)
533 {
534 /* If the app claims the value is divergent but it is constant we can
535 * end up with a dynamic index of NULL. */
536 if (!value)
537 divergent = false;
538
539 wctx->use_waterfall = divergent;
540 if (!divergent)
541 return value;
542
543 ac_build_bgnloop(&ctx->ac, 6000);
544
545 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
546
547 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
548 scalar_value, "uniform_active");
549
550 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
551 ac_build_ifcc(&ctx->ac, active, 6001);
552
553 return scalar_value;
554 }
555
556 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
557 struct waterfall_context *wctx,
558 LLVMValueRef value)
559 {
560 LLVMValueRef ret = NULL;
561 LLVMValueRef phi_src[2];
562 LLVMValueRef cc_phi_src[2] = {
563 LLVMConstInt(ctx->ac.i32, 0, false),
564 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
565 };
566
567 if (!wctx->use_waterfall)
568 return value;
569
570 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
571
572 ac_build_endif(&ctx->ac, 6001);
573
574 if (value) {
575 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
576 phi_src[1] = value;
577
578 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
579 }
580
581 /*
582 * By using the optimization barrier on the exit decision, we decouple
583 * the operations from the break, and hence avoid LLVM hoisting the
584 * opteration into the break block.
585 */
586 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
587 ac_build_optimization_barrier(&ctx->ac, &cc);
588
589 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
590 ac_build_ifcc(&ctx->ac, active, 6002);
591 ac_build_break(&ctx->ac);
592 ac_build_endif(&ctx->ac, 6002);
593
594 ac_build_endloop(&ctx->ac, 6000);
595 return ret;
596 }
597
598 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
599 {
600 LLVMValueRef src[4], result = NULL;
601 unsigned num_components = instr->dest.dest.ssa.num_components;
602 unsigned src_components;
603 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
604 bool saved_inexact = false;
605
606 if (instr->exact)
607 saved_inexact = ac_disable_inexact_math(ctx->ac.builder);
608
609 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
610 switch (instr->op) {
611 case nir_op_vec2:
612 case nir_op_vec3:
613 case nir_op_vec4:
614 src_components = 1;
615 break;
616 case nir_op_pack_half_2x16:
617 case nir_op_pack_snorm_2x16:
618 case nir_op_pack_unorm_2x16:
619 src_components = 2;
620 break;
621 case nir_op_unpack_half_2x16:
622 src_components = 1;
623 break;
624 case nir_op_cube_face_coord:
625 case nir_op_cube_face_index:
626 src_components = 3;
627 break;
628 default:
629 src_components = num_components;
630 break;
631 }
632 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
633 src[i] = get_alu_src(ctx, instr->src[i], src_components);
634
635 switch (instr->op) {
636 case nir_op_mov:
637 result = src[0];
638 break;
639 case nir_op_fneg:
640 src[0] = ac_to_float(&ctx->ac, src[0]);
641 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
642 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
643 /* fneg will be optimized by backend compiler with sign
644 * bit removed via XOR. This is probably a LLVM bug.
645 */
646 result = ac_build_canonicalize(&ctx->ac, result,
647 instr->dest.dest.ssa.bit_size);
648 }
649 break;
650 case nir_op_ineg:
651 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
652 break;
653 case nir_op_inot:
654 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
655 break;
656 case nir_op_iadd:
657 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
658 break;
659 case nir_op_fadd:
660 src[0] = ac_to_float(&ctx->ac, src[0]);
661 src[1] = ac_to_float(&ctx->ac, src[1]);
662 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
663 break;
664 case nir_op_fsub:
665 src[0] = ac_to_float(&ctx->ac, src[0]);
666 src[1] = ac_to_float(&ctx->ac, src[1]);
667 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
668 break;
669 case nir_op_isub:
670 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
671 break;
672 case nir_op_imul:
673 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
674 break;
675 case nir_op_imod:
676 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
677 break;
678 case nir_op_umod:
679 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
680 break;
681 case nir_op_fmod:
682 /* lower_fmod only lower 16-bit and 32-bit fmod */
683 assert(instr->dest.dest.ssa.bit_size == 64);
684 src[0] = ac_to_float(&ctx->ac, src[0]);
685 src[1] = ac_to_float(&ctx->ac, src[1]);
686 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
687 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
688 ac_to_float_type(&ctx->ac, def_type), result);
689 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
690 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
691 break;
692 case nir_op_irem:
693 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
694 break;
695 case nir_op_idiv:
696 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
697 break;
698 case nir_op_udiv:
699 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
700 break;
701 case nir_op_fmul:
702 src[0] = ac_to_float(&ctx->ac, src[0]);
703 src[1] = ac_to_float(&ctx->ac, src[1]);
704 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
705 break;
706 case nir_op_frcp:
707 /* For doubles, we need precise division to pass GLCTS. */
708 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL &&
709 ac_get_type_size(def_type) == 8) {
710 result = LLVMBuildFDiv(ctx->ac.builder, ctx->ac.f64_1,
711 ac_to_float(&ctx->ac, src[0]), "");
712 } else {
713 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rcp",
714 ac_to_float_type(&ctx->ac, def_type), src[0]);
715 }
716 break;
717 case nir_op_iand:
718 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
719 break;
720 case nir_op_ior:
721 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
722 break;
723 case nir_op_ixor:
724 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
725 break;
726 case nir_op_ishl:
727 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
728 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
729 LLVMTypeOf(src[0]), "");
730 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
731 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
732 LLVMTypeOf(src[0]), "");
733 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
734 break;
735 case nir_op_ishr:
736 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
737 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
738 LLVMTypeOf(src[0]), "");
739 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
740 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
741 LLVMTypeOf(src[0]), "");
742 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
743 break;
744 case nir_op_ushr:
745 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
746 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
747 LLVMTypeOf(src[0]), "");
748 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
749 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
750 LLVMTypeOf(src[0]), "");
751 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
752 break;
753 case nir_op_ilt32:
754 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
755 break;
756 case nir_op_ine32:
757 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
758 break;
759 case nir_op_ieq32:
760 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
761 break;
762 case nir_op_ige32:
763 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
764 break;
765 case nir_op_ult32:
766 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
767 break;
768 case nir_op_uge32:
769 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
770 break;
771 case nir_op_feq32:
772 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
773 break;
774 case nir_op_fne32:
775 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
776 break;
777 case nir_op_flt32:
778 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
779 break;
780 case nir_op_fge32:
781 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
782 break;
783 case nir_op_fabs:
784 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
785 ac_to_float_type(&ctx->ac, def_type), src[0]);
786 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
787 /* fabs will be optimized by backend compiler with sign
788 * bit removed via AND.
789 */
790 result = ac_build_canonicalize(&ctx->ac, result,
791 instr->dest.dest.ssa.bit_size);
792 }
793 break;
794 case nir_op_iabs:
795 result = emit_iabs(&ctx->ac, src[0]);
796 break;
797 case nir_op_imax:
798 result = ac_build_imax(&ctx->ac, src[0], src[1]);
799 break;
800 case nir_op_imin:
801 result = ac_build_imin(&ctx->ac, src[0], src[1]);
802 break;
803 case nir_op_umax:
804 result = ac_build_umax(&ctx->ac, src[0], src[1]);
805 break;
806 case nir_op_umin:
807 result = ac_build_umin(&ctx->ac, src[0], src[1]);
808 break;
809 case nir_op_isign:
810 result = ac_build_isign(&ctx->ac, src[0],
811 instr->dest.dest.ssa.bit_size);
812 break;
813 case nir_op_fsign:
814 src[0] = ac_to_float(&ctx->ac, src[0]);
815 result = ac_build_fsign(&ctx->ac, src[0],
816 instr->dest.dest.ssa.bit_size);
817 break;
818 case nir_op_ffloor:
819 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
820 ac_to_float_type(&ctx->ac, def_type), src[0]);
821 break;
822 case nir_op_ftrunc:
823 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
824 ac_to_float_type(&ctx->ac, def_type), src[0]);
825 break;
826 case nir_op_fceil:
827 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
828 ac_to_float_type(&ctx->ac, def_type), src[0]);
829 break;
830 case nir_op_fround_even:
831 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
832 ac_to_float_type(&ctx->ac, def_type),src[0]);
833 break;
834 case nir_op_ffract:
835 src[0] = ac_to_float(&ctx->ac, src[0]);
836 result = ac_build_fract(&ctx->ac, src[0],
837 instr->dest.dest.ssa.bit_size);
838 break;
839 case nir_op_fsin:
840 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
841 ac_to_float_type(&ctx->ac, def_type), src[0]);
842 break;
843 case nir_op_fcos:
844 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
845 ac_to_float_type(&ctx->ac, def_type), src[0]);
846 break;
847 case nir_op_fsqrt:
848 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
849 ac_to_float_type(&ctx->ac, def_type), src[0]);
850 break;
851 case nir_op_fexp2:
852 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
853 ac_to_float_type(&ctx->ac, def_type), src[0]);
854 break;
855 case nir_op_flog2:
856 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
857 ac_to_float_type(&ctx->ac, def_type), src[0]);
858 break;
859 case nir_op_frsq:
860 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rsq",
861 ac_to_float_type(&ctx->ac, def_type), src[0]);
862 break;
863 case nir_op_frexp_exp:
864 src[0] = ac_to_float(&ctx->ac, src[0]);
865 result = ac_build_frexp_exp(&ctx->ac, src[0],
866 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
867 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
868 result = LLVMBuildSExt(ctx->ac.builder, result,
869 ctx->ac.i32, "");
870 break;
871 case nir_op_frexp_sig:
872 src[0] = ac_to_float(&ctx->ac, src[0]);
873 result = ac_build_frexp_mant(&ctx->ac, src[0],
874 instr->dest.dest.ssa.bit_size);
875 break;
876 case nir_op_fpow:
877 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
878 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
879 break;
880 case nir_op_fmax:
881 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
882 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
883 if (ctx->ac.chip_class < GFX9 &&
884 instr->dest.dest.ssa.bit_size == 32) {
885 /* Only pre-GFX9 chips do not flush denorms. */
886 result = ac_build_canonicalize(&ctx->ac, result,
887 instr->dest.dest.ssa.bit_size);
888 }
889 break;
890 case nir_op_fmin:
891 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
892 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
893 if (ctx->ac.chip_class < GFX9 &&
894 instr->dest.dest.ssa.bit_size == 32) {
895 /* Only pre-GFX9 chips do not flush denorms. */
896 result = ac_build_canonicalize(&ctx->ac, result,
897 instr->dest.dest.ssa.bit_size);
898 }
899 break;
900 case nir_op_ffma:
901 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
902 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
903 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
904 break;
905 case nir_op_ldexp:
906 src[0] = ac_to_float(&ctx->ac, src[0]);
907 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
908 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
909 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
910 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
911 else
912 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
913 break;
914 case nir_op_bfm:
915 result = emit_bfm(&ctx->ac, src[0], src[1]);
916 break;
917 case nir_op_bitfield_select:
918 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
919 break;
920 case nir_op_ubfe:
921 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
922 break;
923 case nir_op_ibfe:
924 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
925 break;
926 case nir_op_bitfield_reverse:
927 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
928 break;
929 case nir_op_bit_count:
930 result = ac_build_bit_count(&ctx->ac, src[0]);
931 break;
932 case nir_op_vec2:
933 case nir_op_vec3:
934 case nir_op_vec4:
935 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
936 src[i] = ac_to_integer(&ctx->ac, src[i]);
937 result = ac_build_gather_values(&ctx->ac, src, num_components);
938 break;
939 case nir_op_f2i8:
940 case nir_op_f2i16:
941 case nir_op_f2i32:
942 case nir_op_f2i64:
943 src[0] = ac_to_float(&ctx->ac, src[0]);
944 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
945 break;
946 case nir_op_f2u8:
947 case nir_op_f2u16:
948 case nir_op_f2u32:
949 case nir_op_f2u64:
950 src[0] = ac_to_float(&ctx->ac, src[0]);
951 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
952 break;
953 case nir_op_i2f16:
954 case nir_op_i2f32:
955 case nir_op_i2f64:
956 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
957 break;
958 case nir_op_u2f16:
959 case nir_op_u2f32:
960 case nir_op_u2f64:
961 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
962 break;
963 case nir_op_f2f16_rtz:
964 case nir_op_f2f16:
965 case nir_op_f2fmp:
966 src[0] = ac_to_float(&ctx->ac, src[0]);
967
968 /* For OpenGL, we want fast packing with v_cvt_pkrtz_f16, but if we use it,
969 * all f32->f16 conversions have to round towards zero, because both scalar
970 * and vec2 down-conversions have to round equally.
971 */
972 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL ||
973 instr->op == nir_op_f2f16_rtz) {
974 src[0] = ac_to_float(&ctx->ac, src[0]);
975
976 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
977 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
978
979 /* Fast path conversion. This only works if NIR is vectorized
980 * to vec2 16.
981 */
982 if (LLVMTypeOf(src[0]) == ctx->ac.v2f32) {
983 LLVMValueRef args[] = {
984 ac_llvm_extract_elem(&ctx->ac, src[0], 0),
985 ac_llvm_extract_elem(&ctx->ac, src[0], 1),
986 };
987 result = ac_build_cvt_pkrtz_f16(&ctx->ac, args);
988 break;
989 }
990
991 assert(ac_get_llvm_num_components(src[0]) == 1);
992 LLVMValueRef param[2] = { src[0], LLVMGetUndef(ctx->ac.f32) };
993 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
994 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
995 } else {
996 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
997 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
998 else
999 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1000 }
1001 break;
1002 case nir_op_f2f16_rtne:
1003 case nir_op_f2f32:
1004 case nir_op_f2f64:
1005 src[0] = ac_to_float(&ctx->ac, src[0]);
1006 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1007 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1008 else
1009 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1010 break;
1011 case nir_op_u2u8:
1012 case nir_op_u2u16:
1013 case nir_op_u2ump:
1014 case nir_op_u2u32:
1015 case nir_op_u2u64:
1016 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1017 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
1018 else
1019 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1020 break;
1021 case nir_op_i2i8:
1022 case nir_op_i2i16:
1023 case nir_op_i2imp:
1024 case nir_op_i2i32:
1025 case nir_op_i2i64:
1026 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1027 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
1028 else
1029 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1030 break;
1031 case nir_op_b32csel:
1032 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
1033 break;
1034 case nir_op_find_lsb:
1035 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
1036 break;
1037 case nir_op_ufind_msb:
1038 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
1039 break;
1040 case nir_op_ifind_msb:
1041 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
1042 break;
1043 case nir_op_uadd_carry:
1044 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1045 break;
1046 case nir_op_usub_borrow:
1047 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
1048 break;
1049 case nir_op_b2f16:
1050 case nir_op_b2f32:
1051 case nir_op_b2f64:
1052 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1053 break;
1054 case nir_op_f2b32:
1055 result = emit_f2b(&ctx->ac, src[0]);
1056 break;
1057 case nir_op_b2i8:
1058 case nir_op_b2i16:
1059 case nir_op_b2i32:
1060 case nir_op_b2i64:
1061 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1062 break;
1063 case nir_op_i2b32:
1064 result = emit_i2b(&ctx->ac, src[0]);
1065 break;
1066 case nir_op_fquantize2f16:
1067 result = emit_f2f16(&ctx->ac, src[0]);
1068 break;
1069 case nir_op_umul_high:
1070 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1071 break;
1072 case nir_op_imul_high:
1073 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1074 break;
1075 case nir_op_pack_half_2x16:
1076 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1077 break;
1078 case nir_op_pack_snorm_2x16:
1079 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1080 break;
1081 case nir_op_pack_unorm_2x16:
1082 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1083 break;
1084 case nir_op_unpack_half_2x16:
1085 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1086 break;
1087 case nir_op_fddx:
1088 case nir_op_fddy:
1089 case nir_op_fddx_fine:
1090 case nir_op_fddy_fine:
1091 case nir_op_fddx_coarse:
1092 case nir_op_fddy_coarse:
1093 result = emit_ddxy(ctx, instr->op, src[0]);
1094 break;
1095
1096 case nir_op_unpack_64_2x32_split_x: {
1097 assert(ac_get_llvm_num_components(src[0]) == 1);
1098 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1099 ctx->ac.v2i32,
1100 "");
1101 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1102 ctx->ac.i32_0, "");
1103 break;
1104 }
1105
1106 case nir_op_unpack_64_2x32_split_y: {
1107 assert(ac_get_llvm_num_components(src[0]) == 1);
1108 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1109 ctx->ac.v2i32,
1110 "");
1111 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1112 ctx->ac.i32_1, "");
1113 break;
1114 }
1115
1116 case nir_op_pack_64_2x32_split: {
1117 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1118 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1119 break;
1120 }
1121
1122 case nir_op_pack_32_2x16_split: {
1123 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1124 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1125 break;
1126 }
1127
1128 case nir_op_unpack_32_2x16_split_x: {
1129 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1130 ctx->ac.v2i16,
1131 "");
1132 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1133 ctx->ac.i32_0, "");
1134 break;
1135 }
1136
1137 case nir_op_unpack_32_2x16_split_y: {
1138 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1139 ctx->ac.v2i16,
1140 "");
1141 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1142 ctx->ac.i32_1, "");
1143 break;
1144 }
1145
1146 case nir_op_cube_face_coord: {
1147 src[0] = ac_to_float(&ctx->ac, src[0]);
1148 LLVMValueRef results[2];
1149 LLVMValueRef in[3];
1150 for (unsigned chan = 0; chan < 3; chan++)
1151 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1152 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1153 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1154 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1155 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1156 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1157 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1158 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1159 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1160 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1161 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1162 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1163 result = ac_build_gather_values(&ctx->ac, results, 2);
1164 break;
1165 }
1166
1167 case nir_op_cube_face_index: {
1168 src[0] = ac_to_float(&ctx->ac, src[0]);
1169 LLVMValueRef in[3];
1170 for (unsigned chan = 0; chan < 3; chan++)
1171 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1172 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1173 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1174 break;
1175 }
1176
1177 case nir_op_fmin3:
1178 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1179 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1180 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1181 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1182 break;
1183 case nir_op_umin3:
1184 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1185 result = ac_build_umin(&ctx->ac, result, src[2]);
1186 break;
1187 case nir_op_imin3:
1188 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1189 result = ac_build_imin(&ctx->ac, result, src[2]);
1190 break;
1191 case nir_op_fmax3:
1192 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1193 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1194 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1195 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1196 break;
1197 case nir_op_umax3:
1198 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1199 result = ac_build_umax(&ctx->ac, result, src[2]);
1200 break;
1201 case nir_op_imax3:
1202 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1203 result = ac_build_imax(&ctx->ac, result, src[2]);
1204 break;
1205 case nir_op_fmed3: {
1206 src[0] = ac_to_float(&ctx->ac, src[0]);
1207 src[1] = ac_to_float(&ctx->ac, src[1]);
1208 src[2] = ac_to_float(&ctx->ac, src[2]);
1209 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1210 instr->dest.dest.ssa.bit_size);
1211 break;
1212 }
1213 case nir_op_imed3: {
1214 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1215 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1216 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1217 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1218 break;
1219 }
1220 case nir_op_umed3: {
1221 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1222 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1223 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1224 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1225 break;
1226 }
1227
1228 default:
1229 fprintf(stderr, "Unknown NIR alu instr: ");
1230 nir_print_instr(&instr->instr, stderr);
1231 fprintf(stderr, "\n");
1232 abort();
1233 }
1234
1235 if (result) {
1236 assert(instr->dest.dest.is_ssa);
1237 result = ac_to_integer_or_pointer(&ctx->ac, result);
1238 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1239 }
1240
1241 if (instr->exact)
1242 ac_restore_inexact_math(ctx->ac.builder, saved_inexact);
1243 }
1244
1245 static void visit_load_const(struct ac_nir_context *ctx,
1246 const nir_load_const_instr *instr)
1247 {
1248 LLVMValueRef values[4], value = NULL;
1249 LLVMTypeRef element_type =
1250 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1251
1252 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1253 switch (instr->def.bit_size) {
1254 case 8:
1255 values[i] = LLVMConstInt(element_type,
1256 instr->value[i].u8, false);
1257 break;
1258 case 16:
1259 values[i] = LLVMConstInt(element_type,
1260 instr->value[i].u16, false);
1261 break;
1262 case 32:
1263 values[i] = LLVMConstInt(element_type,
1264 instr->value[i].u32, false);
1265 break;
1266 case 64:
1267 values[i] = LLVMConstInt(element_type,
1268 instr->value[i].u64, false);
1269 break;
1270 default:
1271 fprintf(stderr,
1272 "unsupported nir load_const bit_size: %d\n",
1273 instr->def.bit_size);
1274 abort();
1275 }
1276 }
1277 if (instr->def.num_components > 1) {
1278 value = LLVMConstVector(values, instr->def.num_components);
1279 } else
1280 value = values[0];
1281
1282 ctx->ssa_defs[instr->def.index] = value;
1283 }
1284
1285 static LLVMValueRef
1286 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1287 {
1288 LLVMValueRef size =
1289 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1290 LLVMConstInt(ctx->ac.i32, 2, false), "");
1291
1292 /* GFX8 only */
1293 if (ctx->ac.chip_class == GFX8 && in_elements) {
1294 /* On GFX8, the descriptor contains the size in bytes,
1295 * but TXQ must return the size in elements.
1296 * The stride is always non-zero for resources using TXQ.
1297 */
1298 LLVMValueRef stride =
1299 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1300 ctx->ac.i32_1, "");
1301 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1302 LLVMConstInt(ctx->ac.i32, 16, false), "");
1303 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1304 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1305
1306 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1307 }
1308 return size;
1309 }
1310
1311 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1312 * incorrectly forces nearest filtering if the texture format is integer.
1313 * The only effect it has on Gather4, which always returns 4 texels for
1314 * bilinear filtering, is that the final coordinates are off by 0.5 of
1315 * the texel size.
1316 *
1317 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1318 * or (0.5 / size) from the normalized coordinates.
1319 *
1320 * However, cube textures with 8_8_8_8 data formats require a different
1321 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1322 * precision in 32-bit data formats, so it needs to be applied dynamically at
1323 * runtime. In this case, return an i1 value that indicates whether the
1324 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1325 */
1326 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1327 nir_variable *var,
1328 struct ac_image_args *args,
1329 const nir_tex_instr *instr)
1330 {
1331 const struct glsl_type *type = glsl_without_array(var->type);
1332 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1333 LLVMValueRef wa_8888 = NULL;
1334 LLVMValueRef half_texel[2];
1335 LLVMValueRef result;
1336
1337 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1338
1339 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1340 LLVMValueRef formats;
1341 LLVMValueRef data_format;
1342 LLVMValueRef wa_formats;
1343
1344 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1345
1346 data_format = LLVMBuildLShr(ctx->builder, formats,
1347 LLVMConstInt(ctx->i32, 20, false), "");
1348 data_format = LLVMBuildAnd(ctx->builder, data_format,
1349 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1350 wa_8888 = LLVMBuildICmp(
1351 ctx->builder, LLVMIntEQ, data_format,
1352 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1353 "");
1354
1355 uint32_t wa_num_format =
1356 stype == GLSL_TYPE_UINT ?
1357 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1358 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1359 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1360 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1361 "");
1362 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1363 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1364
1365 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1366 args->resource = LLVMBuildInsertElement(
1367 ctx->builder, args->resource, formats, ctx->i32_1, "");
1368 }
1369
1370 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1371 assert(!wa_8888);
1372 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1373 } else {
1374 struct ac_image_args resinfo = {};
1375 LLVMBasicBlockRef bbs[2];
1376
1377 LLVMValueRef unnorm = NULL;
1378 LLVMValueRef default_offset = ctx->f32_0;
1379 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1380 !instr->is_array) {
1381 /* In vulkan, whether the sampler uses unnormalized
1382 * coordinates or not is a dynamic property of the
1383 * sampler. Hence, to figure out whether or not we
1384 * need to divide by the texture size, we need to test
1385 * the sampler at runtime. This tests the bit set by
1386 * radv_init_sampler().
1387 */
1388 LLVMValueRef sampler0 =
1389 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1390 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1391 LLVMConstInt(ctx->i32, 15, false), "");
1392 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1393 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1394 default_offset = LLVMConstReal(ctx->f32, -0.5);
1395 }
1396
1397 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1398 if (wa_8888 || unnorm) {
1399 assert(!(wa_8888 && unnorm));
1400 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1401 /* Skip the texture size query entirely if we don't need it. */
1402 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1403 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1404 }
1405
1406 /* Query the texture size. */
1407 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1408 resinfo.opcode = ac_image_get_resinfo;
1409 resinfo.dmask = 0xf;
1410 resinfo.lod = ctx->i32_0;
1411 resinfo.resource = args->resource;
1412 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1413 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1414
1415 /* Compute -0.5 / size. */
1416 for (unsigned c = 0; c < 2; c++) {
1417 half_texel[c] =
1418 LLVMBuildExtractElement(ctx->builder, size,
1419 LLVMConstInt(ctx->i32, c, 0), "");
1420 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1421 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1422 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1423 LLVMConstReal(ctx->f32, -0.5), "");
1424 }
1425
1426 if (wa_8888 || unnorm) {
1427 ac_build_endif(ctx, 2000);
1428
1429 for (unsigned c = 0; c < 2; c++) {
1430 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1431 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1432 values, bbs);
1433 }
1434 }
1435 }
1436
1437 for (unsigned c = 0; c < 2; c++) {
1438 LLVMValueRef tmp;
1439 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1440 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1441 }
1442
1443 args->attributes = AC_FUNC_ATTR_READNONE;
1444 result = ac_build_image_opcode(ctx, args);
1445
1446 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1447 LLVMValueRef tmp, tmp2;
1448
1449 /* if the cube workaround is in place, f2i the result. */
1450 for (unsigned c = 0; c < 4; c++) {
1451 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1452 if (stype == GLSL_TYPE_UINT)
1453 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1454 else
1455 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1456 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1457 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1458 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1459 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1460 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1461 }
1462 }
1463 return result;
1464 }
1465
1466 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1467 {
1468 nir_deref_instr *texture_deref_instr = NULL;
1469
1470 for (unsigned i = 0; i < instr->num_srcs; i++) {
1471 switch (instr->src[i].src_type) {
1472 case nir_tex_src_texture_deref:
1473 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1474 break;
1475 default:
1476 break;
1477 }
1478 }
1479 return texture_deref_instr;
1480 }
1481
1482 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1483 const nir_tex_instr *instr,
1484 struct ac_image_args *args)
1485 {
1486 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1487 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1488
1489 assert(instr->dest.is_ssa);
1490 return ac_build_buffer_load_format(&ctx->ac,
1491 args->resource,
1492 args->coords[0],
1493 ctx->ac.i32_0,
1494 util_last_bit(mask),
1495 0, true,
1496 instr->dest.ssa.bit_size == 16);
1497 }
1498
1499 args->opcode = ac_image_sample;
1500
1501 switch (instr->op) {
1502 case nir_texop_txf:
1503 case nir_texop_txf_ms:
1504 case nir_texop_samples_identical:
1505 args->opcode = args->level_zero ||
1506 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1507 ac_image_load : ac_image_load_mip;
1508 args->level_zero = false;
1509 break;
1510 case nir_texop_txs:
1511 case nir_texop_query_levels:
1512 args->opcode = ac_image_get_resinfo;
1513 if (!args->lod)
1514 args->lod = ctx->ac.i32_0;
1515 args->level_zero = false;
1516 break;
1517 case nir_texop_tex:
1518 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1519 assert(!args->lod);
1520 args->level_zero = true;
1521 }
1522 break;
1523 case nir_texop_tg4:
1524 args->opcode = ac_image_gather4;
1525 if (!args->lod && !args->bias)
1526 args->level_zero = true;
1527 break;
1528 case nir_texop_lod:
1529 args->opcode = ac_image_get_lod;
1530 break;
1531 case nir_texop_fragment_fetch:
1532 case nir_texop_fragment_mask_fetch:
1533 args->opcode = ac_image_load;
1534 args->level_zero = false;
1535 break;
1536 default:
1537 break;
1538 }
1539
1540 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1541 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1542 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1543 const struct glsl_type *type = glsl_without_array(var->type);
1544 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1545 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1546 return lower_gather4_integer(&ctx->ac, var, args, instr);
1547 }
1548 }
1549
1550 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1551 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1552 if ((args->dim == ac_image_2darray ||
1553 args->dim == ac_image_2d) && !args->coords[1]) {
1554 args->coords[1] = ctx->ac.i32_0;
1555 }
1556 }
1557
1558 args->attributes = AC_FUNC_ATTR_READNONE;
1559 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1560 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1561 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1562 /* Prevent texture instructions with implicit derivatives from being
1563 * sinked into branches. */
1564 switch (instr->op) {
1565 case nir_texop_tex:
1566 case nir_texop_txb:
1567 case nir_texop_lod:
1568 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1569 break;
1570 default:
1571 break;
1572 }
1573 }
1574
1575 return ac_build_image_opcode(&ctx->ac, args);
1576 }
1577
1578 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1579 nir_intrinsic_instr *instr)
1580 {
1581 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1582 LLVMValueRef index = get_src(ctx, instr->src[1]);
1583
1584 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1585 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1586 return result;
1587 }
1588
1589 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1590 nir_intrinsic_instr *instr)
1591 {
1592 LLVMValueRef ptr, addr;
1593 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1594 unsigned index = nir_intrinsic_base(instr);
1595
1596 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1597 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1598
1599 /* Load constant values from user SGPRS when possible, otherwise
1600 * fallback to the default path that loads directly from memory.
1601 */
1602 if (LLVMIsConstant(src0) &&
1603 instr->dest.ssa.bit_size == 32) {
1604 unsigned count = instr->dest.ssa.num_components;
1605 unsigned offset = index;
1606
1607 offset += LLVMConstIntGetZExtValue(src0);
1608 offset /= 4;
1609
1610 offset -= ctx->args->base_inline_push_consts;
1611
1612 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1613 if (offset + count <= num_inline_push_consts) {
1614 LLVMValueRef push_constants[num_inline_push_consts];
1615 for (unsigned i = 0; i < num_inline_push_consts; i++)
1616 push_constants[i] = ac_get_arg(&ctx->ac,
1617 ctx->args->inline_push_consts[i]);
1618 return ac_build_gather_values(&ctx->ac,
1619 push_constants + offset,
1620 count);
1621 }
1622 }
1623
1624 ptr = LLVMBuildGEP(ctx->ac.builder,
1625 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1626
1627 if (instr->dest.ssa.bit_size == 8) {
1628 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1629 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i8, 4 * load_dwords);
1630 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1631 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1632
1633 LLVMValueRef params[3];
1634 if (load_dwords > 1) {
1635 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.v2i32, "");
1636 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1637 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1638 } else {
1639 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1640 params[0] = ctx->ac.i32_0;
1641 params[1] = res;
1642 }
1643 params[2] = addr;
1644 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1645
1646 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1647 if (instr->dest.ssa.num_components > 1)
1648 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i8, instr->dest.ssa.num_components), "");
1649 return res;
1650 } else if (instr->dest.ssa.bit_size == 16) {
1651 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1652 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i16, 2 * load_dwords);
1653 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1654 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1655 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1656 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1657 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1658 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1659 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1660 LLVMConstInt(ctx->ac.i32, 4, false)};
1661 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1662 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1663 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1664 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1665 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1666 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1667 }
1668
1669 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1670
1671 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1672 }
1673
1674 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1675 const nir_intrinsic_instr *instr)
1676 {
1677 LLVMValueRef index = get_src(ctx, instr->src[0]);
1678
1679 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1680 }
1681
1682 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1683 {
1684 uint32_t new_mask = 0;
1685 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1686 if (mask & (1u << i))
1687 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1688 return new_mask;
1689 }
1690
1691 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1692 unsigned start, unsigned count)
1693 {
1694 LLVMValueRef mask[] = {
1695 ctx->i32_0, ctx->i32_1,
1696 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1697
1698 unsigned src_elements = ac_get_llvm_num_components(src);
1699
1700 if (count == src_elements) {
1701 assert(start == 0);
1702 return src;
1703 } else if (count == 1) {
1704 assert(start < src_elements);
1705 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1706 } else {
1707 assert(start + count <= src_elements);
1708 assert(count <= 4);
1709 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1710 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1711 }
1712 }
1713
1714 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1715 enum gl_access_qualifier access,
1716 bool may_store_unaligned,
1717 bool writeonly_memory)
1718 {
1719 unsigned cache_policy = 0;
1720
1721 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1722 * store opcodes not aligned to a dword are affected. The only way to
1723 * get unaligned stores is through shader images.
1724 */
1725 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1726 /* If this is write-only, don't keep data in L1 to prevent
1727 * evicting L1 cache lines that may be needed by other
1728 * instructions.
1729 */
1730 writeonly_memory ||
1731 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1732 cache_policy |= ac_glc;
1733 }
1734
1735 if (access & ACCESS_STREAM_CACHE_POLICY)
1736 cache_policy |= ac_slc | ac_glc;
1737
1738 return cache_policy;
1739 }
1740
1741 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1742 struct waterfall_context *wctx,
1743 const nir_intrinsic_instr *instr,
1744 nir_src src)
1745 {
1746 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1747 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1748 }
1749
1750 static void visit_store_ssbo(struct ac_nir_context *ctx,
1751 nir_intrinsic_instr *instr)
1752 {
1753 if (ctx->ac.postponed_kill) {
1754 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1755 ctx->ac.postponed_kill, "");
1756 ac_build_ifcc(&ctx->ac, cond, 7000);
1757 }
1758
1759 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1760 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1761 unsigned writemask = nir_intrinsic_write_mask(instr);
1762 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1763 bool writeonly_memory = access & ACCESS_NON_READABLE;
1764 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1765
1766 struct waterfall_context wctx;
1767 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1768
1769 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1770 LLVMValueRef base_data = src_data;
1771 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1772 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1773
1774 while (writemask) {
1775 int start, count;
1776 LLVMValueRef data, offset;
1777 LLVMTypeRef data_type;
1778
1779 u_bit_scan_consecutive_range(&writemask, &start, &count);
1780
1781 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1782 * writes into a 2-element and a 1-element write. */
1783 if (count == 3 &&
1784 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1785 writemask |= 1 << (start + 2);
1786 count = 2;
1787 }
1788 int num_bytes = count * elem_size_bytes; /* count in bytes */
1789
1790 /* we can only store 4 DWords at the same time.
1791 * can only happen for 64 Bit vectors. */
1792 if (num_bytes > 16) {
1793 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1794 count = 2;
1795 num_bytes = 16;
1796 }
1797
1798 /* check alignment of 16 Bit stores */
1799 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1800 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1801 count = 1;
1802 num_bytes = 2;
1803 }
1804
1805 /* Due to alignment issues, split stores of 8-bit/16-bit
1806 * vectors.
1807 */
1808 if (ctx->ac.chip_class == GFX6 && count > 1 && elem_size_bytes < 4) {
1809 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1810 count = 1;
1811 num_bytes = elem_size_bytes;
1812 }
1813
1814 data = extract_vector_range(&ctx->ac, base_data, start, count);
1815
1816 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1817 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1818
1819 if (num_bytes == 1) {
1820 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1821 offset, ctx->ac.i32_0,
1822 cache_policy);
1823 } else if (num_bytes == 2) {
1824 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1825 offset, ctx->ac.i32_0,
1826 cache_policy);
1827 } else {
1828 int num_channels = num_bytes / 4;
1829
1830 switch (num_bytes) {
1831 case 16: /* v4f32 */
1832 data_type = ctx->ac.v4f32;
1833 break;
1834 case 12: /* v3f32 */
1835 data_type = ctx->ac.v3f32;
1836 break;
1837 case 8: /* v2f32 */
1838 data_type = ctx->ac.v2f32;
1839 break;
1840 case 4: /* f32 */
1841 data_type = ctx->ac.f32;
1842 break;
1843 default:
1844 unreachable("Malformed vector store.");
1845 }
1846 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1847
1848 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1849 num_channels, offset,
1850 ctx->ac.i32_0, 0,
1851 cache_policy);
1852 }
1853 }
1854
1855 exit_waterfall(ctx, &wctx, NULL);
1856
1857 if (ctx->ac.postponed_kill)
1858 ac_build_endif(&ctx->ac, 7000);
1859 }
1860
1861 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1862 LLVMValueRef descriptor,
1863 LLVMValueRef offset,
1864 LLVMValueRef compare,
1865 LLVMValueRef exchange)
1866 {
1867 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1868 if (ctx->abi->robust_buffer_access) {
1869 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1870
1871 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1872 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1873
1874 ac_build_ifcc(&ctx->ac, cond, -1);
1875
1876 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1877 }
1878
1879 LLVMValueRef ptr_parts[2] = {
1880 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1881 LLVMBuildAnd(ctx->ac.builder,
1882 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1883 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1884 };
1885
1886 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1887 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1888
1889 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1890
1891 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1892 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1893 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1894 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1895
1896 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1897 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1898
1899 if (ctx->abi->robust_buffer_access) {
1900 ac_build_endif(&ctx->ac, -1);
1901
1902 LLVMBasicBlockRef incoming_blocks[2] = {
1903 start_block,
1904 then_block,
1905 };
1906
1907 LLVMValueRef incoming_values[2] = {
1908 LLVMConstInt(ctx->ac.i64, 0, 0),
1909 result,
1910 };
1911 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1912 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1913 return ret;
1914 } else {
1915 return result;
1916 }
1917 }
1918
1919 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1920 nir_intrinsic_instr *instr)
1921 {
1922 if (ctx->ac.postponed_kill) {
1923 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1924 ctx->ac.postponed_kill, "");
1925 ac_build_ifcc(&ctx->ac, cond, 7001);
1926 }
1927
1928 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1929 const char *op;
1930 char name[64], type[8];
1931 LLVMValueRef params[6], descriptor;
1932 LLVMValueRef result;
1933 int arg_count = 0;
1934
1935 struct waterfall_context wctx;
1936 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1937
1938 switch (instr->intrinsic) {
1939 case nir_intrinsic_ssbo_atomic_add:
1940 op = "add";
1941 break;
1942 case nir_intrinsic_ssbo_atomic_imin:
1943 op = "smin";
1944 break;
1945 case nir_intrinsic_ssbo_atomic_umin:
1946 op = "umin";
1947 break;
1948 case nir_intrinsic_ssbo_atomic_imax:
1949 op = "smax";
1950 break;
1951 case nir_intrinsic_ssbo_atomic_umax:
1952 op = "umax";
1953 break;
1954 case nir_intrinsic_ssbo_atomic_and:
1955 op = "and";
1956 break;
1957 case nir_intrinsic_ssbo_atomic_or:
1958 op = "or";
1959 break;
1960 case nir_intrinsic_ssbo_atomic_xor:
1961 op = "xor";
1962 break;
1963 case nir_intrinsic_ssbo_atomic_exchange:
1964 op = "swap";
1965 break;
1966 case nir_intrinsic_ssbo_atomic_comp_swap:
1967 op = "cmpswap";
1968 break;
1969 default:
1970 abort();
1971 }
1972
1973 descriptor = ctx->abi->load_ssbo(ctx->abi,
1974 rsrc_base,
1975 true);
1976
1977 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1978 return_type == ctx->ac.i64) {
1979 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1980 get_src(ctx, instr->src[1]),
1981 get_src(ctx, instr->src[2]),
1982 get_src(ctx, instr->src[3]));
1983 } else {
1984 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1985 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1986 }
1987 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1988 params[arg_count++] = descriptor;
1989
1990 if (LLVM_VERSION_MAJOR >= 9) {
1991 /* XXX: The new raw/struct atomic intrinsics are buggy with
1992 * LLVM 8, see r358579.
1993 */
1994 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1995 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1996 params[arg_count++] = ctx->ac.i32_0; /* slc */
1997
1998 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1999 snprintf(name, sizeof(name),
2000 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
2001 } else {
2002 params[arg_count++] = ctx->ac.i32_0; /* vindex */
2003 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
2004 params[arg_count++] = ctx->ac.i1false; /* slc */
2005
2006 assert(return_type == ctx->ac.i32);
2007 snprintf(name, sizeof(name),
2008 "llvm.amdgcn.buffer.atomic.%s", op);
2009 }
2010
2011 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
2012 arg_count, 0);
2013 }
2014
2015 result = exit_waterfall(ctx, &wctx, result);
2016 if (ctx->ac.postponed_kill)
2017 ac_build_endif(&ctx->ac, 7001);
2018 return result;
2019 }
2020
2021 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
2022 nir_intrinsic_instr *instr)
2023 {
2024 struct waterfall_context wctx;
2025 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
2026
2027 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
2028 int num_components = instr->num_components;
2029 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2030 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
2031
2032 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2033 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
2034 LLVMValueRef vindex = ctx->ac.i32_0;
2035
2036 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
2037 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
2038
2039 LLVMValueRef results[4];
2040 for (int i = 0; i < num_components;) {
2041 int num_elems = num_components - i;
2042 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
2043 num_elems = 1;
2044 if (num_elems * elem_size_bytes > 16)
2045 num_elems = 16 / elem_size_bytes;
2046 int load_bytes = num_elems * elem_size_bytes;
2047
2048 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
2049
2050 LLVMValueRef ret;
2051
2052 if (load_bytes == 1) {
2053 ret = ac_build_tbuffer_load_byte(&ctx->ac,
2054 rsrc,
2055 offset,
2056 ctx->ac.i32_0,
2057 immoffset,
2058 cache_policy);
2059 } else if (load_bytes == 2) {
2060 ret = ac_build_tbuffer_load_short(&ctx->ac,
2061 rsrc,
2062 offset,
2063 ctx->ac.i32_0,
2064 immoffset,
2065 cache_policy);
2066 } else {
2067 int num_channels = util_next_power_of_two(load_bytes) / 4;
2068 bool can_speculate = access & ACCESS_CAN_REORDER;
2069
2070 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2071 vindex, offset, immoffset, 0,
2072 cache_policy, can_speculate, false);
2073 }
2074
2075 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2076 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2077 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2078
2079 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2080 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2081
2082 for (unsigned j = 0; j < num_elems; j++) {
2083 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2084 }
2085 i += num_elems;
2086 }
2087
2088 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2089 return exit_waterfall(ctx, &wctx, ret);
2090 }
2091
2092 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2093 struct waterfall_context *wctx,
2094 const nir_intrinsic_instr *instr)
2095 {
2096 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2097 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2098 }
2099
2100 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2101 nir_intrinsic_instr *instr)
2102 {
2103 struct waterfall_context wctx;
2104 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2105
2106 LLVMValueRef ret;
2107 LLVMValueRef rsrc = rsrc_base;
2108 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2109 int num_components = instr->num_components;
2110
2111 if (ctx->abi->load_ubo)
2112 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2113
2114 if (instr->dest.ssa.bit_size == 64)
2115 num_components *= 2;
2116
2117 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2118 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2119 LLVMValueRef results[num_components];
2120 for (unsigned i = 0; i < num_components; ++i) {
2121 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2122 load_bytes * i, 0);
2123
2124 if (load_bytes == 1) {
2125 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2126 rsrc,
2127 offset,
2128 ctx->ac.i32_0,
2129 immoffset,
2130 0);
2131 } else {
2132 assert(load_bytes == 2);
2133 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2134 rsrc,
2135 offset,
2136 ctx->ac.i32_0,
2137 immoffset,
2138 0);
2139 }
2140 }
2141 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2142 } else {
2143 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2144 NULL, 0, 0, true, true);
2145
2146 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2147 }
2148
2149 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2150 get_def_type(ctx, &instr->dest.ssa), "");
2151
2152 return exit_waterfall(ctx, &wctx, ret);
2153 }
2154
2155 static void
2156 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2157 bool vs_in, unsigned *vertex_index_out,
2158 LLVMValueRef *vertex_index_ref,
2159 unsigned *const_out, LLVMValueRef *indir_out)
2160 {
2161 nir_variable *var = nir_deref_instr_get_variable(instr);
2162 nir_deref_path path;
2163 unsigned idx_lvl = 1;
2164
2165 nir_deref_path_init(&path, instr, NULL);
2166
2167 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2168 if (vertex_index_ref) {
2169 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2170 if (vertex_index_out)
2171 *vertex_index_out = 0;
2172 } else {
2173 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2174 }
2175 ++idx_lvl;
2176 }
2177
2178 uint32_t const_offset = 0;
2179 LLVMValueRef offset = NULL;
2180
2181 if (var->data.compact) {
2182 assert(instr->deref_type == nir_deref_type_array);
2183 const_offset = nir_src_as_uint(instr->arr.index);
2184 goto out;
2185 }
2186
2187 for (; path.path[idx_lvl]; ++idx_lvl) {
2188 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2189 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2190 unsigned index = path.path[idx_lvl]->strct.index;
2191
2192 for (unsigned i = 0; i < index; i++) {
2193 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2194 const_offset += glsl_count_attribute_slots(ft, vs_in);
2195 }
2196 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2197 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2198 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2199 const_offset += size *
2200 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2201 } else {
2202 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2203 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2204 if (offset)
2205 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2206 else
2207 offset = array_off;
2208 }
2209 } else
2210 unreachable("Uhandled deref type in get_deref_instr_offset");
2211 }
2212
2213 out:
2214 nir_deref_path_finish(&path);
2215
2216 if (const_offset && offset)
2217 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2218 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2219 "");
2220
2221 *const_out = const_offset;
2222 *indir_out = offset;
2223 }
2224
2225 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2226 nir_intrinsic_instr *instr,
2227 bool load_inputs)
2228 {
2229 LLVMValueRef result;
2230 LLVMValueRef vertex_index = NULL;
2231 LLVMValueRef indir_index = NULL;
2232 unsigned const_index = 0;
2233
2234 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2235
2236 unsigned location = var->data.location;
2237 unsigned driver_location = var->data.driver_location;
2238 const bool is_patch = var->data.patch ||
2239 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2240 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2241 const bool is_compact = var->data.compact;
2242
2243 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2244 false, NULL, is_patch ? NULL : &vertex_index,
2245 &const_index, &indir_index);
2246
2247 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2248
2249 LLVMTypeRef src_component_type;
2250 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2251 src_component_type = LLVMGetElementType(dest_type);
2252 else
2253 src_component_type = dest_type;
2254
2255 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2256 vertex_index, indir_index,
2257 const_index, location, driver_location,
2258 var->data.location_frac,
2259 instr->num_components,
2260 is_patch, is_compact, load_inputs);
2261 if (instr->dest.ssa.bit_size == 16) {
2262 result = ac_to_integer(&ctx->ac, result);
2263 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2264 }
2265 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2266 }
2267
2268 static unsigned
2269 type_scalar_size_bytes(const struct glsl_type *type)
2270 {
2271 assert(glsl_type_is_vector_or_scalar(type) ||
2272 glsl_type_is_matrix(type));
2273 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2274 }
2275
2276 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2277 nir_intrinsic_instr *instr)
2278 {
2279 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2280 nir_variable *var = nir_deref_instr_get_variable(deref);
2281
2282 LLVMValueRef values[8];
2283 int idx = 0;
2284 int ve = instr->dest.ssa.num_components;
2285 unsigned comp = 0;
2286 LLVMValueRef indir_index;
2287 LLVMValueRef ret;
2288 unsigned const_index;
2289 unsigned stride = 4;
2290 int mode = deref->mode;
2291
2292 if (var) {
2293 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2294 var->data.mode == nir_var_shader_in;
2295 idx = var->data.driver_location;
2296 comp = var->data.location_frac;
2297 mode = var->data.mode;
2298
2299 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2300 &const_index, &indir_index);
2301
2302 if (var->data.compact) {
2303 stride = 1;
2304 const_index += comp;
2305 comp = 0;
2306 }
2307 }
2308
2309 if (instr->dest.ssa.bit_size == 64 &&
2310 (deref->mode == nir_var_shader_in ||
2311 deref->mode == nir_var_shader_out ||
2312 deref->mode == nir_var_function_temp))
2313 ve *= 2;
2314
2315 switch (mode) {
2316 case nir_var_shader_in:
2317 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2318 ctx->stage == MESA_SHADER_TESS_EVAL) {
2319 return load_tess_varyings(ctx, instr, true);
2320 }
2321
2322 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2323 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2324 LLVMValueRef indir_index;
2325 unsigned const_index, vertex_index;
2326 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2327 &const_index, &indir_index);
2328 assert(indir_index == NULL);
2329
2330 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2331 var->data.driver_location,
2332 var->data.location_frac,
2333 instr->num_components, vertex_index, const_index, type);
2334 }
2335
2336 for (unsigned chan = comp; chan < ve + comp; chan++) {
2337 if (indir_index) {
2338 unsigned count = glsl_count_attribute_slots(
2339 var->type,
2340 ctx->stage == MESA_SHADER_VERTEX);
2341 count -= chan / 4;
2342 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2343 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2344 stride, false, true);
2345
2346 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2347 tmp_vec,
2348 indir_index, "");
2349 } else
2350 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2351 }
2352 break;
2353 case nir_var_function_temp:
2354 for (unsigned chan = 0; chan < ve; chan++) {
2355 if (indir_index) {
2356 unsigned count = glsl_count_attribute_slots(
2357 var->type, false);
2358 count -= chan / 4;
2359 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2360 &ctx->ac, ctx->locals + idx + chan, count,
2361 stride, true, true);
2362
2363 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2364 tmp_vec,
2365 indir_index, "");
2366 } else {
2367 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2368 }
2369 }
2370 break;
2371 case nir_var_shader_out:
2372 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2373 return load_tess_varyings(ctx, instr, false);
2374 }
2375
2376 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2377 var->data.fb_fetch_output &&
2378 ctx->abi->emit_fbfetch)
2379 return ctx->abi->emit_fbfetch(ctx->abi);
2380
2381 for (unsigned chan = comp; chan < ve + comp; chan++) {
2382 if (indir_index) {
2383 unsigned count = glsl_count_attribute_slots(
2384 var->type, false);
2385 count -= chan / 4;
2386 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2387 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2388 stride, true, true);
2389
2390 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2391 tmp_vec,
2392 indir_index, "");
2393 } else {
2394 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2395 ctx->abi->outputs[idx + chan + const_index * stride],
2396 "");
2397 }
2398 }
2399 break;
2400 case nir_var_mem_global: {
2401 LLVMValueRef address = get_src(ctx, instr->src[0]);
2402 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2403 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2404 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2405 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2406 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, result_type) / 8;
2407 bool split_loads = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2408
2409 if (stride != natural_stride || split_loads) {
2410 if (LLVMGetTypeKind(result_type) == LLVMVectorTypeKind)
2411 result_type = LLVMGetElementType(result_type);
2412
2413 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2414 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2415 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2416
2417 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2418 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2419 values[i] = LLVMBuildLoad(ctx->ac.builder,
2420 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2421 }
2422 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2423 } else {
2424 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2425 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2426 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2427 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2428 return val;
2429 }
2430 }
2431 default:
2432 unreachable("unhandle variable mode");
2433 }
2434 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2435 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2436 }
2437
2438 static void
2439 visit_store_var(struct ac_nir_context *ctx,
2440 nir_intrinsic_instr *instr)
2441 {
2442 if (ctx->ac.postponed_kill) {
2443 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2444 ctx->ac.postponed_kill, "");
2445 ac_build_ifcc(&ctx->ac, cond, 7002);
2446 }
2447
2448 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2449 nir_variable *var = nir_deref_instr_get_variable(deref);
2450
2451 LLVMValueRef temp_ptr, value;
2452 int idx = 0;
2453 unsigned comp = 0;
2454 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2455 int writemask = instr->const_index[0];
2456 LLVMValueRef indir_index;
2457 unsigned const_index;
2458
2459 if (var) {
2460 get_deref_offset(ctx, deref, false,
2461 NULL, NULL, &const_index, &indir_index);
2462 idx = var->data.driver_location;
2463 comp = var->data.location_frac;
2464
2465 if (var->data.compact) {
2466 const_index += comp;
2467 comp = 0;
2468 }
2469 }
2470
2471 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2472 (deref->mode == nir_var_shader_out ||
2473 deref->mode == nir_var_function_temp)) {
2474
2475 src = LLVMBuildBitCast(ctx->ac.builder, src,
2476 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2477 "");
2478
2479 writemask = widen_mask(writemask, 2);
2480 }
2481
2482 writemask = writemask << comp;
2483
2484 switch (deref->mode) {
2485 case nir_var_shader_out:
2486
2487 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2488 LLVMValueRef vertex_index = NULL;
2489 LLVMValueRef indir_index = NULL;
2490 unsigned const_index = 0;
2491 const bool is_patch = var->data.patch ||
2492 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2493 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2494
2495 get_deref_offset(ctx, deref, false, NULL,
2496 is_patch ? NULL : &vertex_index,
2497 &const_index, &indir_index);
2498
2499 ctx->abi->store_tcs_outputs(ctx->abi, var,
2500 vertex_index, indir_index,
2501 const_index, src, writemask);
2502 break;
2503 }
2504
2505 for (unsigned chan = 0; chan < 8; chan++) {
2506 int stride = 4;
2507 if (!(writemask & (1 << chan)))
2508 continue;
2509
2510 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2511
2512 if (var->data.compact)
2513 stride = 1;
2514 if (indir_index) {
2515 unsigned count = glsl_count_attribute_slots(
2516 var->type, false);
2517 count -= chan / 4;
2518 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2519 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2520 stride, true, true);
2521
2522 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2523 value, indir_index, "");
2524 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2525 count, stride, tmp_vec);
2526
2527 } else {
2528 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2529
2530 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2531 }
2532 }
2533 break;
2534 case nir_var_function_temp:
2535 for (unsigned chan = 0; chan < 8; chan++) {
2536 if (!(writemask & (1 << chan)))
2537 continue;
2538
2539 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2540 if (indir_index) {
2541 unsigned count = glsl_count_attribute_slots(
2542 var->type, false);
2543 count -= chan / 4;
2544 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2545 &ctx->ac, ctx->locals + idx + chan, count,
2546 4, true, true);
2547
2548 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2549 value, indir_index, "");
2550 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2551 count, 4, tmp_vec);
2552 } else {
2553 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2554
2555 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2556 }
2557 }
2558 break;
2559
2560 case nir_var_mem_global: {
2561 int writemask = instr->const_index[0];
2562 LLVMValueRef address = get_src(ctx, instr->src[0]);
2563 LLVMValueRef val = get_src(ctx, instr->src[1]);
2564
2565 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2566 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2567 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2568 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(val)) / 8;
2569 bool split_stores = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2570
2571 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2572 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2573 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2574
2575 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2576 stride == natural_stride && !split_stores) {
2577 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2578 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2579 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2580
2581 val = LLVMBuildBitCast(ctx->ac.builder, val,
2582 LLVMGetElementType(LLVMTypeOf(address)), "");
2583 LLVMBuildStore(ctx->ac.builder, val, address);
2584 } else {
2585 LLVMTypeRef val_type = LLVMTypeOf(val);
2586 if (LLVMGetTypeKind(LLVMTypeOf(val)) == LLVMVectorTypeKind)
2587 val_type = LLVMGetElementType(val_type);
2588
2589 LLVMTypeRef ptr_type = LLVMPointerType(val_type,
2590 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2591 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2592 for (unsigned chan = 0; chan < 4; chan++) {
2593 if (!(writemask & (1 << chan)))
2594 continue;
2595
2596 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2597
2598 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2599 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2600 chan);
2601 src = LLVMBuildBitCast(ctx->ac.builder, src,
2602 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2603 LLVMBuildStore(ctx->ac.builder, src, ptr);
2604 }
2605 }
2606 break;
2607 }
2608 default:
2609 abort();
2610 break;
2611 }
2612
2613 if (ctx->ac.postponed_kill)
2614 ac_build_endif(&ctx->ac, 7002);
2615 }
2616
2617 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2618 {
2619 switch (dim) {
2620 case GLSL_SAMPLER_DIM_BUF:
2621 return 1;
2622 case GLSL_SAMPLER_DIM_1D:
2623 return array ? 2 : 1;
2624 case GLSL_SAMPLER_DIM_2D:
2625 return array ? 3 : 2;
2626 case GLSL_SAMPLER_DIM_MS:
2627 return array ? 4 : 3;
2628 case GLSL_SAMPLER_DIM_3D:
2629 case GLSL_SAMPLER_DIM_CUBE:
2630 return 3;
2631 case GLSL_SAMPLER_DIM_RECT:
2632 case GLSL_SAMPLER_DIM_SUBPASS:
2633 return 2;
2634 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2635 return 3;
2636 default:
2637 break;
2638 }
2639 return 0;
2640 }
2641
2642 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2643 LLVMValueRef coord_x, LLVMValueRef coord_y,
2644 LLVMValueRef coord_z,
2645 LLVMValueRef sample_index,
2646 LLVMValueRef fmask_desc_ptr)
2647 {
2648 unsigned sample_chan = coord_z ? 3 : 2;
2649 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2650 addr[sample_chan] = sample_index;
2651
2652 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2653 return addr[sample_chan];
2654 }
2655
2656 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2657 {
2658 assert(instr->src[0].is_ssa);
2659 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2660 }
2661
2662 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2663 const nir_intrinsic_instr *instr,
2664 LLVMValueRef dynamic_index,
2665 enum ac_descriptor_type desc_type,
2666 bool write)
2667 {
2668 nir_deref_instr *deref_instr =
2669 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2670 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2671
2672 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2673 }
2674
2675 static void get_image_coords(struct ac_nir_context *ctx,
2676 const nir_intrinsic_instr *instr,
2677 LLVMValueRef dynamic_desc_index,
2678 struct ac_image_args *args,
2679 enum glsl_sampler_dim dim,
2680 bool is_array)
2681 {
2682 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2683 LLVMValueRef masks[] = {
2684 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2685 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2686 };
2687 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2688
2689 int count;
2690 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2691 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2692 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2693 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2694 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2695 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2696 count = image_type_to_components_count(dim, is_array);
2697
2698 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2699 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2700 LLVMValueRef fmask_load_address[3];
2701
2702 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2703 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2704 if (is_array)
2705 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2706 else
2707 fmask_load_address[2] = NULL;
2708
2709 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2710 fmask_load_address[0],
2711 fmask_load_address[1],
2712 fmask_load_address[2],
2713 sample_index,
2714 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2715 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2716 }
2717 if (count == 1 && !gfx9_1d) {
2718 if (instr->src[1].ssa->num_components)
2719 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2720 else
2721 args->coords[0] = src0;
2722 } else {
2723 int chan;
2724 if (is_ms)
2725 count--;
2726 for (chan = 0; chan < count; ++chan) {
2727 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2728 }
2729
2730 if (gfx9_1d) {
2731 if (is_array) {
2732 args->coords[2] = args->coords[1];
2733 args->coords[1] = ctx->ac.i32_0;
2734 } else
2735 args->coords[1] = ctx->ac.i32_0;
2736 count++;
2737 }
2738 if (ctx->ac.chip_class == GFX9 &&
2739 dim == GLSL_SAMPLER_DIM_2D &&
2740 !is_array) {
2741 /* The hw can't bind a slice of a 3D image as a 2D
2742 * image, because it ignores BASE_ARRAY if the target
2743 * is 3D. The workaround is to read BASE_ARRAY and set
2744 * it as the 3rd address operand for all 2D images.
2745 */
2746 LLVMValueRef first_layer, const5, mask;
2747
2748 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2749 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2750 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2751 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2752
2753 args->coords[count] = first_layer;
2754 count++;
2755 }
2756
2757
2758 if (is_ms) {
2759 args->coords[count] = sample_index;
2760 count++;
2761 }
2762 }
2763 }
2764
2765 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2766 const nir_intrinsic_instr *instr,
2767 LLVMValueRef dynamic_index,
2768 bool write, bool atomic)
2769 {
2770 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2771 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2772 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2773 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2774 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2775
2776 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2777 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2778 elem_count, stride, "");
2779
2780 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2781 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2782 }
2783 return rsrc;
2784 }
2785
2786 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2787 struct waterfall_context *wctx,
2788 const nir_intrinsic_instr *instr)
2789 {
2790 nir_deref_instr *deref_instr = NULL;
2791
2792 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref)
2793 deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2794
2795 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2796 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2797 }
2798
2799 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2800 const nir_intrinsic_instr *instr,
2801 bool bindless)
2802 {
2803 LLVMValueRef res;
2804
2805 enum glsl_sampler_dim dim;
2806 enum gl_access_qualifier access;
2807 bool is_array;
2808 if (bindless) {
2809 dim = nir_intrinsic_image_dim(instr);
2810 access = nir_intrinsic_access(instr);
2811 is_array = nir_intrinsic_image_array(instr);
2812 } else {
2813 const nir_deref_instr *image_deref = get_image_deref(instr);
2814 const struct glsl_type *type = image_deref->type;
2815 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2816 dim = glsl_get_sampler_dim(type);
2817 access = var->data.access;
2818 is_array = glsl_sampler_type_is_array(type);
2819 }
2820
2821 struct waterfall_context wctx;
2822 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2823
2824 struct ac_image_args args = {};
2825
2826 args.cache_policy = get_cache_policy(ctx, access, false, false);
2827
2828 if (dim == GLSL_SAMPLER_DIM_BUF) {
2829 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2830 unsigned num_channels = util_last_bit(mask);
2831 LLVMValueRef rsrc, vindex;
2832
2833 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2834 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2835 ctx->ac.i32_0, "");
2836
2837 assert(instr->dest.is_ssa);
2838 bool can_speculate = access & ACCESS_CAN_REORDER;
2839 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2840 ctx->ac.i32_0, num_channels,
2841 args.cache_policy,
2842 can_speculate,
2843 instr->dest.ssa.bit_size == 16);
2844 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2845
2846 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2847 res = ac_to_integer(&ctx->ac, res);
2848 } else {
2849 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2850
2851 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2852 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2853 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2854 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2855 if (!level_zero)
2856 args.lod = get_src(ctx, instr->src[3]);
2857 args.dmask = 15;
2858 args.attributes = AC_FUNC_ATTR_READONLY;
2859
2860 assert(instr->dest.is_ssa);
2861 args.d16 = instr->dest.ssa.bit_size == 16;
2862
2863 res = ac_build_image_opcode(&ctx->ac, &args);
2864 }
2865 return exit_waterfall(ctx, &wctx, res);
2866 }
2867
2868 static void visit_image_store(struct ac_nir_context *ctx,
2869 const nir_intrinsic_instr *instr,
2870 bool bindless)
2871 {
2872 if (ctx->ac.postponed_kill) {
2873 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2874 ctx->ac.postponed_kill, "");
2875 ac_build_ifcc(&ctx->ac, cond, 7003);
2876 }
2877
2878 enum glsl_sampler_dim dim;
2879 enum gl_access_qualifier access;
2880 bool is_array;
2881
2882 if (bindless) {
2883 dim = nir_intrinsic_image_dim(instr);
2884 access = nir_intrinsic_access(instr);
2885 is_array = nir_intrinsic_image_array(instr);
2886 } else {
2887 const nir_deref_instr *image_deref = get_image_deref(instr);
2888 const struct glsl_type *type = image_deref->type;
2889 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2890 dim = glsl_get_sampler_dim(type);
2891 access = var->data.access;
2892 is_array = glsl_sampler_type_is_array(type);
2893 }
2894
2895 struct waterfall_context wctx;
2896 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2897
2898 bool writeonly_memory = access & ACCESS_NON_READABLE;
2899 struct ac_image_args args = {};
2900
2901 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2902
2903 if (dim == GLSL_SAMPLER_DIM_BUF) {
2904 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2905 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2906 unsigned src_channels = ac_get_llvm_num_components(src);
2907 LLVMValueRef vindex;
2908
2909 if (src_channels == 3)
2910 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2911
2912 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2913 get_src(ctx, instr->src[1]),
2914 ctx->ac.i32_0, "");
2915
2916 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2917 ctx->ac.i32_0, args.cache_policy);
2918 } else {
2919 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2920
2921 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2922 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2923 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2924 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2925 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2926 if (!level_zero)
2927 args.lod = get_src(ctx, instr->src[4]);
2928 args.dmask = 15;
2929 args.d16 = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(args.data[0])) == 16;
2930
2931 ac_build_image_opcode(&ctx->ac, &args);
2932 }
2933
2934 exit_waterfall(ctx, &wctx, NULL);
2935 if (ctx->ac.postponed_kill)
2936 ac_build_endif(&ctx->ac, 7003);
2937 }
2938
2939 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2940 const nir_intrinsic_instr *instr,
2941 bool bindless)
2942 {
2943 if (ctx->ac.postponed_kill) {
2944 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2945 ctx->ac.postponed_kill, "");
2946 ac_build_ifcc(&ctx->ac, cond, 7004);
2947 }
2948
2949 LLVMValueRef params[7];
2950 int param_count = 0;
2951
2952 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2953 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2954 const char *atomic_name;
2955 char intrinsic_name[64];
2956 enum ac_atomic_op atomic_subop;
2957 ASSERTED int length;
2958
2959 enum glsl_sampler_dim dim;
2960 bool is_array;
2961 if (bindless) {
2962 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2963 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2964 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2965 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2966 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2967 assert(format == GL_R32UI || format == GL_R32I);
2968 }
2969 dim = nir_intrinsic_image_dim(instr);
2970 is_array = nir_intrinsic_image_array(instr);
2971 } else {
2972 const struct glsl_type *type = get_image_deref(instr)->type;
2973 dim = glsl_get_sampler_dim(type);
2974 is_array = glsl_sampler_type_is_array(type);
2975 }
2976
2977 struct waterfall_context wctx;
2978 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2979
2980 switch (instr->intrinsic) {
2981 case nir_intrinsic_bindless_image_atomic_add:
2982 case nir_intrinsic_image_deref_atomic_add:
2983 atomic_name = "add";
2984 atomic_subop = ac_atomic_add;
2985 break;
2986 case nir_intrinsic_bindless_image_atomic_imin:
2987 case nir_intrinsic_image_deref_atomic_imin:
2988 atomic_name = "smin";
2989 atomic_subop = ac_atomic_smin;
2990 break;
2991 case nir_intrinsic_bindless_image_atomic_umin:
2992 case nir_intrinsic_image_deref_atomic_umin:
2993 atomic_name = "umin";
2994 atomic_subop = ac_atomic_umin;
2995 break;
2996 case nir_intrinsic_bindless_image_atomic_imax:
2997 case nir_intrinsic_image_deref_atomic_imax:
2998 atomic_name = "smax";
2999 atomic_subop = ac_atomic_smax;
3000 break;
3001 case nir_intrinsic_bindless_image_atomic_umax:
3002 case nir_intrinsic_image_deref_atomic_umax:
3003 atomic_name = "umax";
3004 atomic_subop = ac_atomic_umax;
3005 break;
3006 case nir_intrinsic_bindless_image_atomic_and:
3007 case nir_intrinsic_image_deref_atomic_and:
3008 atomic_name = "and";
3009 atomic_subop = ac_atomic_and;
3010 break;
3011 case nir_intrinsic_bindless_image_atomic_or:
3012 case nir_intrinsic_image_deref_atomic_or:
3013 atomic_name = "or";
3014 atomic_subop = ac_atomic_or;
3015 break;
3016 case nir_intrinsic_bindless_image_atomic_xor:
3017 case nir_intrinsic_image_deref_atomic_xor:
3018 atomic_name = "xor";
3019 atomic_subop = ac_atomic_xor;
3020 break;
3021 case nir_intrinsic_bindless_image_atomic_exchange:
3022 case nir_intrinsic_image_deref_atomic_exchange:
3023 atomic_name = "swap";
3024 atomic_subop = ac_atomic_swap;
3025 break;
3026 case nir_intrinsic_bindless_image_atomic_comp_swap:
3027 case nir_intrinsic_image_deref_atomic_comp_swap:
3028 atomic_name = "cmpswap";
3029 atomic_subop = 0; /* not used */
3030 break;
3031 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3032 case nir_intrinsic_image_deref_atomic_inc_wrap: {
3033 atomic_name = "inc";
3034 atomic_subop = ac_atomic_inc_wrap;
3035 break;
3036 }
3037 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3038 case nir_intrinsic_image_deref_atomic_dec_wrap:
3039 atomic_name = "dec";
3040 atomic_subop = ac_atomic_dec_wrap;
3041 break;
3042 default:
3043 abort();
3044 }
3045
3046 if (cmpswap)
3047 params[param_count++] = get_src(ctx, instr->src[4]);
3048 params[param_count++] = get_src(ctx, instr->src[3]);
3049
3050 LLVMValueRef result;
3051 if (dim == GLSL_SAMPLER_DIM_BUF) {
3052 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
3053 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
3054 ctx->ac.i32_0, ""); /* vindex */
3055 params[param_count++] = ctx->ac.i32_0; /* voffset */
3056 if (LLVM_VERSION_MAJOR >= 9) {
3057 /* XXX: The new raw/struct atomic intrinsics are buggy
3058 * with LLVM 8, see r358579.
3059 */
3060 params[param_count++] = ctx->ac.i32_0; /* soffset */
3061 params[param_count++] = ctx->ac.i32_0; /* slc */
3062
3063 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3064 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
3065 } else {
3066 params[param_count++] = ctx->ac.i1false; /* slc */
3067
3068 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3069 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
3070 }
3071
3072 assert(length < sizeof(intrinsic_name));
3073 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
3074 params, param_count, 0);
3075 } else {
3076 struct ac_image_args args = {};
3077 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
3078 args.atomic = atomic_subop;
3079 args.data[0] = params[0];
3080 if (cmpswap)
3081 args.data[1] = params[1];
3082 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3083 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3084 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3085
3086 result = ac_build_image_opcode(&ctx->ac, &args);
3087 }
3088
3089 result = exit_waterfall(ctx, &wctx, result);
3090 if (ctx->ac.postponed_kill)
3091 ac_build_endif(&ctx->ac, 7004);
3092 return result;
3093 }
3094
3095 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3096 nir_intrinsic_instr *instr)
3097 {
3098 struct waterfall_context wctx;
3099 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3100 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3101
3102 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3103
3104 return exit_waterfall(ctx, &wctx, ret);
3105 }
3106
3107 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3108 const nir_intrinsic_instr *instr,
3109 bool bindless)
3110 {
3111 LLVMValueRef res;
3112
3113 enum glsl_sampler_dim dim;
3114 bool is_array;
3115 if (bindless) {
3116 dim = nir_intrinsic_image_dim(instr);
3117 is_array = nir_intrinsic_image_array(instr);
3118 } else {
3119 const struct glsl_type *type = get_image_deref(instr)->type;
3120 dim = glsl_get_sampler_dim(type);
3121 is_array = glsl_sampler_type_is_array(type);
3122 }
3123
3124 struct waterfall_context wctx;
3125 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3126
3127 if (dim == GLSL_SAMPLER_DIM_BUF) {
3128 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3129 } else {
3130
3131 struct ac_image_args args = { 0 };
3132
3133 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3134 args.dmask = 0xf;
3135 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3136 args.opcode = ac_image_get_resinfo;
3137 args.lod = ctx->ac.i32_0;
3138 args.attributes = AC_FUNC_ATTR_READNONE;
3139
3140 res = ac_build_image_opcode(&ctx->ac, &args);
3141
3142 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3143
3144 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3145 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3146 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3147 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3148 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3149 }
3150
3151 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3152 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3153 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3154 ctx->ac.i32_1, "");
3155 }
3156 }
3157 return exit_waterfall(ctx, &wctx, res);
3158 }
3159
3160 static void emit_membar(struct ac_llvm_context *ac,
3161 const nir_intrinsic_instr *instr)
3162 {
3163 unsigned wait_flags = 0;
3164
3165 switch (instr->intrinsic) {
3166 case nir_intrinsic_memory_barrier:
3167 case nir_intrinsic_group_memory_barrier:
3168 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3169 break;
3170 case nir_intrinsic_memory_barrier_buffer:
3171 case nir_intrinsic_memory_barrier_image:
3172 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3173 break;
3174 case nir_intrinsic_memory_barrier_shared:
3175 wait_flags = AC_WAIT_LGKM;
3176 break;
3177 default:
3178 break;
3179 }
3180
3181 ac_build_waitcnt(ac, wait_flags);
3182 }
3183
3184 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3185 {
3186 /* GFX6 only (thanks to a hw bug workaround):
3187 * The real barrier instruction isn’t needed, because an entire patch
3188 * always fits into a single wave.
3189 */
3190 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3191 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3192 return;
3193 }
3194 ac_build_s_barrier(ac);
3195 }
3196
3197 static void emit_discard(struct ac_nir_context *ctx,
3198 const nir_intrinsic_instr *instr)
3199 {
3200 LLVMValueRef cond;
3201
3202 if (instr->intrinsic == nir_intrinsic_discard_if) {
3203 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3204 get_src(ctx, instr->src[0]),
3205 ctx->ac.i32_0, "");
3206 } else {
3207 assert(instr->intrinsic == nir_intrinsic_discard);
3208 cond = ctx->ac.i1false;
3209 }
3210
3211 ac_build_kill_if_false(&ctx->ac, cond);
3212 }
3213
3214 static void emit_demote(struct ac_nir_context *ctx,
3215 const nir_intrinsic_instr *instr)
3216 {
3217 LLVMValueRef cond;
3218
3219 if (instr->intrinsic == nir_intrinsic_demote_if) {
3220 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3221 get_src(ctx, instr->src[0]),
3222 ctx->ac.i32_0, "");
3223 } else {
3224 assert(instr->intrinsic == nir_intrinsic_demote);
3225 cond = ctx->ac.i1false;
3226 }
3227
3228 /* Kill immediately while maintaining WQM. */
3229 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3230
3231 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3232 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3233 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3234 return;
3235 }
3236
3237 static LLVMValueRef
3238 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3239 {
3240 LLVMValueRef result;
3241 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3242 result = LLVMBuildAnd(ctx->ac.builder,
3243 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3244 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3245
3246 if (ctx->ac.wave_size == 32)
3247 result = LLVMBuildLShr(ctx->ac.builder, result,
3248 LLVMConstInt(ctx->ac.i32, 1, false), "");
3249
3250 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3251 }
3252
3253 static LLVMValueRef
3254 visit_load_subgroup_id(struct ac_nir_context *ctx)
3255 {
3256 if (ctx->stage == MESA_SHADER_COMPUTE) {
3257 LLVMValueRef result;
3258 result = LLVMBuildAnd(ctx->ac.builder,
3259 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3260 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3261 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3262 } else {
3263 return LLVMConstInt(ctx->ac.i32, 0, false);
3264 }
3265 }
3266
3267 static LLVMValueRef
3268 visit_load_num_subgroups(struct ac_nir_context *ctx)
3269 {
3270 if (ctx->stage == MESA_SHADER_COMPUTE) {
3271 return LLVMBuildAnd(ctx->ac.builder,
3272 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3273 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3274 } else {
3275 return LLVMConstInt(ctx->ac.i32, 1, false);
3276 }
3277 }
3278
3279 static LLVMValueRef
3280 visit_first_invocation(struct ac_nir_context *ctx)
3281 {
3282 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3283 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3284
3285 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3286 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3287 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3288 ctx->ac.iN_wavemask, args, 2,
3289 AC_FUNC_ATTR_NOUNWIND |
3290 AC_FUNC_ATTR_READNONE);
3291
3292 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3293 }
3294
3295 static LLVMValueRef
3296 visit_load_shared(struct ac_nir_context *ctx,
3297 const nir_intrinsic_instr *instr)
3298 {
3299 LLVMValueRef values[4], derived_ptr, index, ret;
3300
3301 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3302 instr->dest.ssa.bit_size);
3303
3304 for (int chan = 0; chan < instr->num_components; chan++) {
3305 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3306 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3307 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3308 }
3309
3310 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3311 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3312 }
3313
3314 static void
3315 visit_store_shared(struct ac_nir_context *ctx,
3316 const nir_intrinsic_instr *instr)
3317 {
3318 LLVMValueRef derived_ptr, data,index;
3319 LLVMBuilderRef builder = ctx->ac.builder;
3320
3321 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3322 instr->src[0].ssa->bit_size);
3323 LLVMValueRef src = get_src(ctx, instr->src[0]);
3324
3325 int writemask = nir_intrinsic_write_mask(instr);
3326 for (int chan = 0; chan < 4; chan++) {
3327 if (!(writemask & (1 << chan))) {
3328 continue;
3329 }
3330 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3331 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3332 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3333 LLVMBuildStore(builder, data, derived_ptr);
3334 }
3335 }
3336
3337 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3338 const nir_intrinsic_instr *instr,
3339 LLVMValueRef ptr, int src_idx)
3340 {
3341 if (ctx->ac.postponed_kill) {
3342 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3343 ctx->ac.postponed_kill, "");
3344 ac_build_ifcc(&ctx->ac, cond, 7005);
3345 }
3346
3347 LLVMValueRef result;
3348 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3349
3350 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3351
3352 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3353 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3354 if (deref->mode == nir_var_mem_global) {
3355 /* use "singlethread" sync scope to implement relaxed ordering */
3356 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3357
3358 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3359 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3360 }
3361 }
3362
3363 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3364 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3365 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3366 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3367 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3368 } else {
3369 LLVMAtomicRMWBinOp op;
3370 switch (instr->intrinsic) {
3371 case nir_intrinsic_shared_atomic_add:
3372 case nir_intrinsic_deref_atomic_add:
3373 op = LLVMAtomicRMWBinOpAdd;
3374 break;
3375 case nir_intrinsic_shared_atomic_umin:
3376 case nir_intrinsic_deref_atomic_umin:
3377 op = LLVMAtomicRMWBinOpUMin;
3378 break;
3379 case nir_intrinsic_shared_atomic_umax:
3380 case nir_intrinsic_deref_atomic_umax:
3381 op = LLVMAtomicRMWBinOpUMax;
3382 break;
3383 case nir_intrinsic_shared_atomic_imin:
3384 case nir_intrinsic_deref_atomic_imin:
3385 op = LLVMAtomicRMWBinOpMin;
3386 break;
3387 case nir_intrinsic_shared_atomic_imax:
3388 case nir_intrinsic_deref_atomic_imax:
3389 op = LLVMAtomicRMWBinOpMax;
3390 break;
3391 case nir_intrinsic_shared_atomic_and:
3392 case nir_intrinsic_deref_atomic_and:
3393 op = LLVMAtomicRMWBinOpAnd;
3394 break;
3395 case nir_intrinsic_shared_atomic_or:
3396 case nir_intrinsic_deref_atomic_or:
3397 op = LLVMAtomicRMWBinOpOr;
3398 break;
3399 case nir_intrinsic_shared_atomic_xor:
3400 case nir_intrinsic_deref_atomic_xor:
3401 op = LLVMAtomicRMWBinOpXor;
3402 break;
3403 case nir_intrinsic_shared_atomic_exchange:
3404 case nir_intrinsic_deref_atomic_exchange:
3405 op = LLVMAtomicRMWBinOpXchg;
3406 break;
3407 default:
3408 return NULL;
3409 }
3410
3411 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3412 }
3413
3414 if (ctx->ac.postponed_kill)
3415 ac_build_endif(&ctx->ac, 7005);
3416 return result;
3417 }
3418
3419 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3420 {
3421 LLVMValueRef values[2];
3422 LLVMValueRef pos[2];
3423
3424 pos[0] = ac_to_float(&ctx->ac,
3425 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3426 pos[1] = ac_to_float(&ctx->ac,
3427 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3428
3429 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3430 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3431 return ac_build_gather_values(&ctx->ac, values, 2);
3432 }
3433
3434 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3435 enum glsl_interp_mode interp, unsigned location)
3436 {
3437 switch (interp) {
3438 case INTERP_MODE_FLAT:
3439 default:
3440 return NULL;
3441 case INTERP_MODE_SMOOTH:
3442 case INTERP_MODE_NONE:
3443 if (location == INTERP_CENTER)
3444 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3445 else if (location == INTERP_CENTROID)
3446 return ctx->abi->persp_centroid;
3447 else if (location == INTERP_SAMPLE)
3448 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3449 break;
3450 case INTERP_MODE_NOPERSPECTIVE:
3451 if (location == INTERP_CENTER)
3452 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3453 else if (location == INTERP_CENTROID)
3454 return ctx->abi->linear_centroid;
3455 else if (location == INTERP_SAMPLE)
3456 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3457 break;
3458 }
3459 return NULL;
3460 }
3461
3462 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3463 unsigned mode)
3464 {
3465 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3466 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3467 }
3468
3469 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3470 unsigned mode,
3471 LLVMValueRef offset)
3472 {
3473 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3474 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3475 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3476
3477 LLVMValueRef ij_out[2];
3478 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3479
3480 /*
3481 * take the I then J parameters, and the DDX/Y for it, and
3482 * calculate the IJ inputs for the interpolator.
3483 * temp1 = ddx * offset/sample.x + I;
3484 * interp_param.I = ddy * offset/sample.y + temp1;
3485 * temp1 = ddx * offset/sample.x + J;
3486 * interp_param.J = ddy * offset/sample.y + temp1;
3487 */
3488 for (unsigned i = 0; i < 2; i++) {
3489 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3490 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3491 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3492 ddxy_out, ix_ll, "");
3493 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3494 ddxy_out, iy_ll, "");
3495 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3496 interp_param, ix_ll, "");
3497 LLVMValueRef temp1, temp2;
3498
3499 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3500 ctx->ac.f32, "");
3501
3502 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3503 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3504
3505 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3506 temp2, ctx->ac.i32, "");
3507 }
3508 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3509 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3510 }
3511
3512 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3513 unsigned mode)
3514 {
3515 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3516 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3517 }
3518
3519 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3520 unsigned mode,
3521 LLVMValueRef sample_id)
3522 {
3523 if (ctx->abi->interp_at_sample_force_center)
3524 return barycentric_center(ctx, mode);
3525
3526 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3527
3528 /* fetch sample ID */
3529 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3530
3531 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3532 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3533 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3534 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3535 LLVMValueRef coords[] = { src_c0, src_c1 };
3536 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3537
3538 return barycentric_offset(ctx, mode, offset);
3539 }
3540
3541
3542 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3543 unsigned mode)
3544 {
3545 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3546 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3547 }
3548
3549 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3550 {
3551 return LLVMBuildBitCast(ctx->ac.builder,
3552 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3553 ctx->ac.v3i32, "");
3554 }
3555
3556 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3557 LLVMValueRef interp_param,
3558 unsigned index, unsigned comp_start,
3559 unsigned num_components,
3560 unsigned bitsize)
3561 {
3562 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3563 LLVMValueRef interp_param_f;
3564
3565 interp_param_f = LLVMBuildBitCast(ctx->ac.builder,
3566 interp_param, ctx->ac.v2f32, "");
3567 LLVMValueRef i = LLVMBuildExtractElement(
3568 ctx->ac.builder, interp_param_f, ctx->ac.i32_0, "");
3569 LLVMValueRef j = LLVMBuildExtractElement(
3570 ctx->ac.builder, interp_param_f, ctx->ac.i32_1, "");
3571
3572 /* Workaround for issue 2647: kill threads with infinite interpolation coeffs */
3573 if (ctx->verified_interp &&
3574 !_mesa_hash_table_search(ctx->verified_interp, interp_param)) {
3575 LLVMValueRef args[2];
3576 args[0] = i;
3577 args[1] = LLVMConstInt(ctx->ac.i32, S_NAN | Q_NAN | N_INFINITY | P_INFINITY, false);
3578 LLVMValueRef cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f32", ctx->ac.i1,
3579 args, 2, AC_FUNC_ATTR_READNONE);
3580 ac_build_kill_if_false(&ctx->ac, LLVMBuildNot(ctx->ac.builder, cond, ""));
3581 _mesa_hash_table_insert(ctx->verified_interp, interp_param, interp_param);
3582 }
3583
3584 LLVMValueRef values[4];
3585 assert(bitsize == 16 || bitsize == 32);
3586 for (unsigned comp = 0; comp < num_components; comp++) {
3587 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3588 if (bitsize == 16) {
3589 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3590 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3591 } else {
3592 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3593 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3594 }
3595 }
3596
3597 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3598 }
3599
3600 static LLVMValueRef load_input(struct ac_nir_context *ctx,
3601 nir_intrinsic_instr *instr)
3602 {
3603 unsigned offset_idx = instr->intrinsic == nir_intrinsic_load_input ? 0 : 1;
3604
3605 /* We only lower inputs for fragment shaders ATM */
3606 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[offset_idx]);
3607 assert(offset);
3608 assert(offset[0].i32 == 0);
3609
3610 unsigned component = nir_intrinsic_component(instr);
3611 unsigned index = nir_intrinsic_base(instr);
3612 unsigned vertex_id = 2; /* P0 */
3613
3614 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3615 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3616
3617 switch (src0[0].i32) {
3618 case 0:
3619 vertex_id = 2;
3620 break;
3621 case 1:
3622 vertex_id = 0;
3623 break;
3624 case 2:
3625 vertex_id = 1;
3626 break;
3627 default:
3628 unreachable("Invalid vertex index");
3629 }
3630 }
3631
3632 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3633 LLVMValueRef values[8];
3634
3635 /* Each component of a 64-bit value takes up two GL-level channels. */
3636 unsigned num_components = instr->dest.ssa.num_components;
3637 unsigned bit_size = instr->dest.ssa.bit_size;
3638 unsigned channels =
3639 bit_size == 64 ? num_components * 2 : num_components;
3640
3641 for (unsigned chan = 0; chan < channels; chan++) {
3642 if (component + chan > 4)
3643 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3644 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3645 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3646 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3647 llvm_chan,
3648 attr_number,
3649 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3650 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3651 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3652 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3653 }
3654
3655 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3656 if (bit_size == 64) {
3657 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3658 LLVMVectorType(ctx->ac.i64, num_components);
3659 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3660 }
3661 return result;
3662 }
3663
3664 static void visit_intrinsic(struct ac_nir_context *ctx,
3665 nir_intrinsic_instr *instr)
3666 {
3667 LLVMValueRef result = NULL;
3668
3669 switch (instr->intrinsic) {
3670 case nir_intrinsic_ballot:
3671 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3672 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3673 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3674 break;
3675 case nir_intrinsic_read_invocation:
3676 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3677 get_src(ctx, instr->src[1]));
3678 break;
3679 case nir_intrinsic_read_first_invocation:
3680 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3681 break;
3682 case nir_intrinsic_load_subgroup_invocation:
3683 result = ac_get_thread_id(&ctx->ac);
3684 break;
3685 case nir_intrinsic_load_work_group_id: {
3686 LLVMValueRef values[3];
3687
3688 for (int i = 0; i < 3; i++) {
3689 values[i] = ctx->args->workgroup_ids[i].used ?
3690 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3691 }
3692
3693 result = ac_build_gather_values(&ctx->ac, values, 3);
3694 break;
3695 }
3696 case nir_intrinsic_load_base_vertex:
3697 case nir_intrinsic_load_first_vertex:
3698 result = ctx->abi->load_base_vertex(ctx->abi);
3699 break;
3700 case nir_intrinsic_load_local_group_size:
3701 result = ctx->abi->load_local_group_size(ctx->abi);
3702 break;
3703 case nir_intrinsic_load_vertex_id:
3704 result = LLVMBuildAdd(ctx->ac.builder,
3705 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3706 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3707 break;
3708 case nir_intrinsic_load_vertex_id_zero_base: {
3709 result = ctx->abi->vertex_id;
3710 break;
3711 }
3712 case nir_intrinsic_load_local_invocation_id: {
3713 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3714 break;
3715 }
3716 case nir_intrinsic_load_base_instance:
3717 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3718 break;
3719 case nir_intrinsic_load_draw_id:
3720 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3721 break;
3722 case nir_intrinsic_load_view_index:
3723 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3724 break;
3725 case nir_intrinsic_load_invocation_id:
3726 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3727 result = ac_unpack_param(&ctx->ac,
3728 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3729 8, 5);
3730 } else {
3731 if (ctx->ac.chip_class >= GFX10) {
3732 result = LLVMBuildAnd(ctx->ac.builder,
3733 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3734 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3735 } else {
3736 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3737 }
3738 }
3739 break;
3740 case nir_intrinsic_load_primitive_id:
3741 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3742 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3743 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3744 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3745 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3746 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3747 } else
3748 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3749 break;
3750 case nir_intrinsic_load_sample_id:
3751 result = ac_unpack_param(&ctx->ac,
3752 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3753 8, 4);
3754 break;
3755 case nir_intrinsic_load_sample_pos:
3756 result = load_sample_pos(ctx);
3757 break;
3758 case nir_intrinsic_load_sample_mask_in:
3759 result = ctx->abi->load_sample_mask_in(ctx->abi);
3760 break;
3761 case nir_intrinsic_load_frag_coord: {
3762 LLVMValueRef values[4] = {
3763 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3764 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3765 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3766 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3767 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3768 };
3769 result = ac_to_integer(&ctx->ac,
3770 ac_build_gather_values(&ctx->ac, values, 4));
3771 break;
3772 }
3773 case nir_intrinsic_load_layer_id:
3774 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3775 break;
3776 case nir_intrinsic_load_front_face:
3777 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3778 break;
3779 case nir_intrinsic_load_helper_invocation:
3780 result = ac_build_load_helper_invocation(&ctx->ac);
3781 break;
3782 case nir_intrinsic_is_helper_invocation:
3783 result = ac_build_is_helper_invocation(&ctx->ac);
3784 break;
3785 case nir_intrinsic_load_color0:
3786 result = ctx->abi->color0;
3787 break;
3788 case nir_intrinsic_load_color1:
3789 result = ctx->abi->color1;
3790 break;
3791 case nir_intrinsic_load_user_data_amd:
3792 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3793 result = ctx->abi->user_data;
3794 break;
3795 case nir_intrinsic_load_instance_id:
3796 result = ctx->abi->instance_id;
3797 break;
3798 case nir_intrinsic_load_num_work_groups:
3799 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3800 break;
3801 case nir_intrinsic_load_local_invocation_index:
3802 result = visit_load_local_invocation_index(ctx);
3803 break;
3804 case nir_intrinsic_load_subgroup_id:
3805 result = visit_load_subgroup_id(ctx);
3806 break;
3807 case nir_intrinsic_load_num_subgroups:
3808 result = visit_load_num_subgroups(ctx);
3809 break;
3810 case nir_intrinsic_first_invocation:
3811 result = visit_first_invocation(ctx);
3812 break;
3813 case nir_intrinsic_load_push_constant:
3814 result = visit_load_push_constant(ctx, instr);
3815 break;
3816 case nir_intrinsic_vulkan_resource_index: {
3817 LLVMValueRef index = get_src(ctx, instr->src[0]);
3818 unsigned desc_set = nir_intrinsic_desc_set(instr);
3819 unsigned binding = nir_intrinsic_binding(instr);
3820
3821 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3822 binding);
3823 break;
3824 }
3825 case nir_intrinsic_vulkan_resource_reindex:
3826 result = visit_vulkan_resource_reindex(ctx, instr);
3827 break;
3828 case nir_intrinsic_store_ssbo:
3829 visit_store_ssbo(ctx, instr);
3830 break;
3831 case nir_intrinsic_load_ssbo:
3832 result = visit_load_buffer(ctx, instr);
3833 break;
3834 case nir_intrinsic_ssbo_atomic_add:
3835 case nir_intrinsic_ssbo_atomic_imin:
3836 case nir_intrinsic_ssbo_atomic_umin:
3837 case nir_intrinsic_ssbo_atomic_imax:
3838 case nir_intrinsic_ssbo_atomic_umax:
3839 case nir_intrinsic_ssbo_atomic_and:
3840 case nir_intrinsic_ssbo_atomic_or:
3841 case nir_intrinsic_ssbo_atomic_xor:
3842 case nir_intrinsic_ssbo_atomic_exchange:
3843 case nir_intrinsic_ssbo_atomic_comp_swap:
3844 result = visit_atomic_ssbo(ctx, instr);
3845 break;
3846 case nir_intrinsic_load_ubo:
3847 result = visit_load_ubo_buffer(ctx, instr);
3848 break;
3849 case nir_intrinsic_get_buffer_size:
3850 result = visit_get_buffer_size(ctx, instr);
3851 break;
3852 case nir_intrinsic_load_deref:
3853 result = visit_load_var(ctx, instr);
3854 break;
3855 case nir_intrinsic_store_deref:
3856 visit_store_var(ctx, instr);
3857 break;
3858 case nir_intrinsic_load_shared:
3859 result = visit_load_shared(ctx, instr);
3860 break;
3861 case nir_intrinsic_store_shared:
3862 visit_store_shared(ctx, instr);
3863 break;
3864 case nir_intrinsic_bindless_image_samples:
3865 case nir_intrinsic_image_deref_samples:
3866 result = visit_image_samples(ctx, instr);
3867 break;
3868 case nir_intrinsic_bindless_image_load:
3869 result = visit_image_load(ctx, instr, true);
3870 break;
3871 case nir_intrinsic_image_deref_load:
3872 result = visit_image_load(ctx, instr, false);
3873 break;
3874 case nir_intrinsic_bindless_image_store:
3875 visit_image_store(ctx, instr, true);
3876 break;
3877 case nir_intrinsic_image_deref_store:
3878 visit_image_store(ctx, instr, false);
3879 break;
3880 case nir_intrinsic_bindless_image_atomic_add:
3881 case nir_intrinsic_bindless_image_atomic_imin:
3882 case nir_intrinsic_bindless_image_atomic_umin:
3883 case nir_intrinsic_bindless_image_atomic_imax:
3884 case nir_intrinsic_bindless_image_atomic_umax:
3885 case nir_intrinsic_bindless_image_atomic_and:
3886 case nir_intrinsic_bindless_image_atomic_or:
3887 case nir_intrinsic_bindless_image_atomic_xor:
3888 case nir_intrinsic_bindless_image_atomic_exchange:
3889 case nir_intrinsic_bindless_image_atomic_comp_swap:
3890 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3891 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3892 result = visit_image_atomic(ctx, instr, true);
3893 break;
3894 case nir_intrinsic_image_deref_atomic_add:
3895 case nir_intrinsic_image_deref_atomic_imin:
3896 case nir_intrinsic_image_deref_atomic_umin:
3897 case nir_intrinsic_image_deref_atomic_imax:
3898 case nir_intrinsic_image_deref_atomic_umax:
3899 case nir_intrinsic_image_deref_atomic_and:
3900 case nir_intrinsic_image_deref_atomic_or:
3901 case nir_intrinsic_image_deref_atomic_xor:
3902 case nir_intrinsic_image_deref_atomic_exchange:
3903 case nir_intrinsic_image_deref_atomic_comp_swap:
3904 case nir_intrinsic_image_deref_atomic_inc_wrap:
3905 case nir_intrinsic_image_deref_atomic_dec_wrap:
3906 result = visit_image_atomic(ctx, instr, false);
3907 break;
3908 case nir_intrinsic_bindless_image_size:
3909 result = visit_image_size(ctx, instr, true);
3910 break;
3911 case nir_intrinsic_image_deref_size:
3912 result = visit_image_size(ctx, instr, false);
3913 break;
3914 case nir_intrinsic_shader_clock:
3915 result = ac_build_shader_clock(&ctx->ac,
3916 nir_intrinsic_memory_scope(instr));
3917 break;
3918 case nir_intrinsic_discard:
3919 case nir_intrinsic_discard_if:
3920 emit_discard(ctx, instr);
3921 break;
3922 case nir_intrinsic_demote:
3923 case nir_intrinsic_demote_if:
3924 emit_demote(ctx, instr);
3925 break;
3926 case nir_intrinsic_memory_barrier:
3927 case nir_intrinsic_group_memory_barrier:
3928 case nir_intrinsic_memory_barrier_buffer:
3929 case nir_intrinsic_memory_barrier_image:
3930 case nir_intrinsic_memory_barrier_shared:
3931 emit_membar(&ctx->ac, instr);
3932 break;
3933 case nir_intrinsic_memory_barrier_tcs_patch:
3934 break;
3935 case nir_intrinsic_control_barrier:
3936 ac_emit_barrier(&ctx->ac, ctx->stage);
3937 break;
3938 case nir_intrinsic_shared_atomic_add:
3939 case nir_intrinsic_shared_atomic_imin:
3940 case nir_intrinsic_shared_atomic_umin:
3941 case nir_intrinsic_shared_atomic_imax:
3942 case nir_intrinsic_shared_atomic_umax:
3943 case nir_intrinsic_shared_atomic_and:
3944 case nir_intrinsic_shared_atomic_or:
3945 case nir_intrinsic_shared_atomic_xor:
3946 case nir_intrinsic_shared_atomic_exchange:
3947 case nir_intrinsic_shared_atomic_comp_swap: {
3948 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3949 instr->src[1].ssa->bit_size);
3950 result = visit_var_atomic(ctx, instr, ptr, 1);
3951 break;
3952 }
3953 case nir_intrinsic_deref_atomic_add:
3954 case nir_intrinsic_deref_atomic_imin:
3955 case nir_intrinsic_deref_atomic_umin:
3956 case nir_intrinsic_deref_atomic_imax:
3957 case nir_intrinsic_deref_atomic_umax:
3958 case nir_intrinsic_deref_atomic_and:
3959 case nir_intrinsic_deref_atomic_or:
3960 case nir_intrinsic_deref_atomic_xor:
3961 case nir_intrinsic_deref_atomic_exchange:
3962 case nir_intrinsic_deref_atomic_comp_swap: {
3963 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3964 result = visit_var_atomic(ctx, instr, ptr, 1);
3965 break;
3966 }
3967 case nir_intrinsic_load_barycentric_pixel:
3968 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3969 break;
3970 case nir_intrinsic_load_barycentric_centroid:
3971 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3972 break;
3973 case nir_intrinsic_load_barycentric_sample:
3974 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3975 break;
3976 case nir_intrinsic_load_barycentric_model:
3977 result = barycentric_model(ctx);
3978 break;
3979 case nir_intrinsic_load_barycentric_at_offset: {
3980 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3981 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3982 break;
3983 }
3984 case nir_intrinsic_load_barycentric_at_sample: {
3985 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3986 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3987 break;
3988 }
3989 case nir_intrinsic_load_interpolated_input: {
3990 /* We assume any indirect loads have been lowered away */
3991 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3992 assert(offset);
3993 assert(offset[0].i32 == 0);
3994
3995 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3996 unsigned index = nir_intrinsic_base(instr);
3997 unsigned component = nir_intrinsic_component(instr);
3998 result = load_interpolated_input(ctx, interp_param, index,
3999 component,
4000 instr->dest.ssa.num_components,
4001 instr->dest.ssa.bit_size);
4002 break;
4003 }
4004 case nir_intrinsic_load_input:
4005 case nir_intrinsic_load_input_vertex:
4006 result = load_input(ctx, instr);
4007 break;
4008 case nir_intrinsic_emit_vertex:
4009 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
4010 break;
4011 case nir_intrinsic_emit_vertex_with_counter: {
4012 unsigned stream = nir_intrinsic_stream_id(instr);
4013 LLVMValueRef next_vertex = get_src(ctx, instr->src[0]);
4014 ctx->abi->emit_vertex_with_counter(ctx->abi, stream,
4015 next_vertex,
4016 ctx->abi->outputs);
4017 break;
4018 }
4019 case nir_intrinsic_end_primitive:
4020 case nir_intrinsic_end_primitive_with_counter:
4021 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
4022 break;
4023 case nir_intrinsic_load_tess_coord:
4024 result = ctx->abi->load_tess_coord(ctx->abi);
4025 break;
4026 case nir_intrinsic_load_tess_level_outer:
4027 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
4028 break;
4029 case nir_intrinsic_load_tess_level_inner:
4030 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
4031 break;
4032 case nir_intrinsic_load_tess_level_outer_default:
4033 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
4034 break;
4035 case nir_intrinsic_load_tess_level_inner_default:
4036 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
4037 break;
4038 case nir_intrinsic_load_patch_vertices_in:
4039 result = ctx->abi->load_patch_vertices_in(ctx->abi);
4040 break;
4041 case nir_intrinsic_vote_all: {
4042 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
4043 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4044 break;
4045 }
4046 case nir_intrinsic_vote_any: {
4047 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
4048 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4049 break;
4050 }
4051 case nir_intrinsic_shuffle:
4052 if (ctx->ac.chip_class == GFX8 ||
4053 ctx->ac.chip_class == GFX9 ||
4054 (ctx->ac.chip_class >= GFX10 && ctx->ac.wave_size == 32)) {
4055 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
4056 get_src(ctx, instr->src[1]));
4057 } else {
4058 LLVMValueRef src = get_src(ctx, instr->src[0]);
4059 LLVMValueRef index = get_src(ctx, instr->src[1]);
4060 LLVMTypeRef type = LLVMTypeOf(src);
4061 struct waterfall_context wctx;
4062 LLVMValueRef index_val;
4063
4064 index_val = enter_waterfall(ctx, &wctx, index, true);
4065
4066 src = LLVMBuildZExt(ctx->ac.builder, src,
4067 ctx->ac.i32, "");
4068
4069 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.readlane",
4070 ctx->ac.i32,
4071 (LLVMValueRef []) { src, index_val }, 2,
4072 AC_FUNC_ATTR_READNONE |
4073 AC_FUNC_ATTR_CONVERGENT);
4074
4075 result = LLVMBuildTrunc(ctx->ac.builder, result, type, "");
4076
4077 result = exit_waterfall(ctx, &wctx, result);
4078 }
4079 break;
4080 case nir_intrinsic_reduce:
4081 result = ac_build_reduce(&ctx->ac,
4082 get_src(ctx, instr->src[0]),
4083 instr->const_index[0],
4084 instr->const_index[1]);
4085 break;
4086 case nir_intrinsic_inclusive_scan:
4087 result = ac_build_inclusive_scan(&ctx->ac,
4088 get_src(ctx, instr->src[0]),
4089 instr->const_index[0]);
4090 break;
4091 case nir_intrinsic_exclusive_scan:
4092 result = ac_build_exclusive_scan(&ctx->ac,
4093 get_src(ctx, instr->src[0]),
4094 instr->const_index[0]);
4095 break;
4096 case nir_intrinsic_quad_broadcast: {
4097 unsigned lane = nir_src_as_uint(instr->src[1]);
4098 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4099 lane, lane, lane, lane);
4100 break;
4101 }
4102 case nir_intrinsic_quad_swap_horizontal:
4103 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
4104 break;
4105 case nir_intrinsic_quad_swap_vertical:
4106 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
4107 break;
4108 case nir_intrinsic_quad_swap_diagonal:
4109 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
4110 break;
4111 case nir_intrinsic_quad_swizzle_amd: {
4112 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4113 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4114 mask & 0x3, (mask >> 2) & 0x3,
4115 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
4116 break;
4117 }
4118 case nir_intrinsic_masked_swizzle_amd: {
4119 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4120 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
4121 break;
4122 }
4123 case nir_intrinsic_write_invocation_amd:
4124 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
4125 get_src(ctx, instr->src[1]),
4126 get_src(ctx, instr->src[2]));
4127 break;
4128 case nir_intrinsic_mbcnt_amd:
4129 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4130 break;
4131 case nir_intrinsic_load_scratch: {
4132 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4133 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4134 offset);
4135 LLVMTypeRef comp_type =
4136 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4137 LLVMTypeRef vec_type =
4138 instr->dest.ssa.num_components == 1 ? comp_type :
4139 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4140 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4141 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4142 LLVMPointerType(vec_type, addr_space), "");
4143 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4144 break;
4145 }
4146 case nir_intrinsic_store_scratch: {
4147 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4148 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4149 offset);
4150 LLVMTypeRef comp_type =
4151 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4152 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4153 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4154 LLVMPointerType(comp_type, addr_space), "");
4155 LLVMValueRef src = get_src(ctx, instr->src[0]);
4156 unsigned wrmask = nir_intrinsic_write_mask(instr);
4157 while (wrmask) {
4158 int start, count;
4159 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4160
4161 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4162 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4163 LLVMTypeRef vec_type =
4164 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4165 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4166 offset_ptr,
4167 LLVMPointerType(vec_type, addr_space),
4168 "");
4169 LLVMValueRef offset_src =
4170 ac_extract_components(&ctx->ac, src, start, count);
4171 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4172 }
4173 break;
4174 }
4175 case nir_intrinsic_load_constant: {
4176 unsigned base = nir_intrinsic_base(instr);
4177 unsigned range = nir_intrinsic_range(instr);
4178
4179 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4180 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4181 LLVMConstInt(ctx->ac.i32, base, false), "");
4182
4183 /* Clamp the offset to avoid out-of-bound access because global
4184 * instructions can't handle them.
4185 */
4186 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4187 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4188 offset, size, "");
4189 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4190
4191 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4192 offset);
4193 LLVMTypeRef comp_type =
4194 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4195 LLVMTypeRef vec_type =
4196 instr->dest.ssa.num_components == 1 ? comp_type :
4197 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4198 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4199 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4200 LLVMPointerType(vec_type, addr_space), "");
4201 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4202 break;
4203 }
4204 default:
4205 fprintf(stderr, "Unknown intrinsic: ");
4206 nir_print_instr(&instr->instr, stderr);
4207 fprintf(stderr, "\n");
4208 break;
4209 }
4210 if (result) {
4211 ctx->ssa_defs[instr->dest.ssa.index] = result;
4212 }
4213 }
4214
4215 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4216 unsigned base_index,
4217 unsigned constant_index,
4218 LLVMValueRef dynamic_index)
4219 {
4220 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4221 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4222 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4223
4224 /* Bindless uniforms are 64bit so multiple index by 8 */
4225 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4226 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4227
4228 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4229
4230 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4231 NULL, 0, 0, true, true);
4232
4233 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4234 }
4235
4236 struct sampler_desc_address {
4237 unsigned descriptor_set;
4238 unsigned base_index; /* binding in vulkan */
4239 unsigned constant_index;
4240 LLVMValueRef dynamic_index;
4241 bool image;
4242 bool bindless;
4243 };
4244
4245 static struct sampler_desc_address
4246 get_sampler_desc_internal(struct ac_nir_context *ctx,
4247 nir_deref_instr *deref_instr,
4248 const nir_instr *instr,
4249 bool image)
4250 {
4251 LLVMValueRef index = NULL;
4252 unsigned constant_index = 0;
4253 unsigned descriptor_set;
4254 unsigned base_index;
4255 bool bindless = false;
4256
4257 if (!deref_instr) {
4258 descriptor_set = 0;
4259 if (image) {
4260 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4261 base_index = 0;
4262 bindless = true;
4263 index = get_src(ctx, img_instr->src[0]);
4264 } else {
4265 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4266 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4267 nir_tex_src_sampler_handle);
4268 if (sampSrcIdx != -1) {
4269 base_index = 0;
4270 bindless = true;
4271 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4272 } else {
4273 assert(tex_instr && !image);
4274 base_index = tex_instr->sampler_index;
4275 }
4276 }
4277 } else {
4278 while(deref_instr->deref_type != nir_deref_type_var) {
4279 if (deref_instr->deref_type == nir_deref_type_array) {
4280 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4281 if (!array_size)
4282 array_size = 1;
4283
4284 if (nir_src_is_const(deref_instr->arr.index)) {
4285 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4286 } else {
4287 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4288
4289 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4290 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4291
4292 if (!index)
4293 index = indirect;
4294 else
4295 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4296 }
4297
4298 deref_instr = nir_src_as_deref(deref_instr->parent);
4299 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4300 unsigned sidx = deref_instr->strct.index;
4301 deref_instr = nir_src_as_deref(deref_instr->parent);
4302 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4303 } else {
4304 unreachable("Unsupported deref type");
4305 }
4306 }
4307 descriptor_set = deref_instr->var->data.descriptor_set;
4308
4309 if (deref_instr->var->data.bindless) {
4310 /* For now just assert on unhandled variable types */
4311 assert(deref_instr->var->data.mode == nir_var_uniform);
4312
4313 base_index = deref_instr->var->data.driver_location;
4314 bindless = true;
4315
4316 index = index ? index : ctx->ac.i32_0;
4317 index = get_bindless_index_from_uniform(ctx, base_index,
4318 constant_index, index);
4319 } else
4320 base_index = deref_instr->var->data.binding;
4321 }
4322 return (struct sampler_desc_address) {
4323 .descriptor_set = descriptor_set,
4324 .base_index = base_index,
4325 .constant_index = constant_index,
4326 .dynamic_index = index,
4327 .image = image,
4328 .bindless = bindless,
4329 };
4330 }
4331
4332 /* Extract any possibly divergent index into a separate value that can be fed
4333 * into get_sampler_desc with the same arguments. */
4334 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4335 nir_deref_instr *deref_instr,
4336 const nir_instr *instr,
4337 bool image)
4338 {
4339 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4340 return addr.dynamic_index;
4341 }
4342
4343 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4344 nir_deref_instr *deref_instr,
4345 enum ac_descriptor_type desc_type,
4346 const nir_instr *instr,
4347 LLVMValueRef index,
4348 bool image, bool write)
4349 {
4350 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4351 return ctx->abi->load_sampler_desc(ctx->abi,
4352 addr.descriptor_set,
4353 addr.base_index,
4354 addr.constant_index, index,
4355 desc_type, addr.image, write, addr.bindless);
4356 }
4357
4358 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4359 *
4360 * GFX6-GFX7:
4361 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4362 * filtering manually. The driver sets img7 to a mask clearing
4363 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4364 * s_and_b32 samp0, samp0, img7
4365 *
4366 * GFX8:
4367 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4368 */
4369 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4370 LLVMValueRef res, LLVMValueRef samp)
4371 {
4372 LLVMBuilderRef builder = ctx->ac.builder;
4373 LLVMValueRef img7, samp0;
4374
4375 if (ctx->ac.chip_class >= GFX8)
4376 return samp;
4377
4378 img7 = LLVMBuildExtractElement(builder, res,
4379 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4380 samp0 = LLVMBuildExtractElement(builder, samp,
4381 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4382 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4383 return LLVMBuildInsertElement(builder, samp, samp0,
4384 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4385 }
4386
4387 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4388 nir_tex_instr *instr,
4389 struct waterfall_context *wctx,
4390 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4391 LLVMValueRef *fmask_ptr)
4392 {
4393 nir_deref_instr *texture_deref_instr = NULL;
4394 nir_deref_instr *sampler_deref_instr = NULL;
4395 int plane = -1;
4396
4397 for (unsigned i = 0; i < instr->num_srcs; i++) {
4398 switch (instr->src[i].src_type) {
4399 case nir_tex_src_texture_deref:
4400 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4401 break;
4402 case nir_tex_src_sampler_deref:
4403 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4404 break;
4405 case nir_tex_src_plane:
4406 plane = nir_src_as_int(instr->src[i].src);
4407 break;
4408 default:
4409 break;
4410 }
4411 }
4412
4413 LLVMValueRef texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr,
4414 &instr->instr, false);
4415 if (!sampler_deref_instr)
4416 sampler_deref_instr = texture_deref_instr;
4417
4418 LLVMValueRef sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr,
4419 &instr->instr, false);
4420 if (instr->texture_non_uniform)
4421 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, true);
4422
4423 if (instr->sampler_non_uniform)
4424 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, true);
4425
4426 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4427
4428 if (plane >= 0) {
4429 assert(instr->op != nir_texop_txf_ms &&
4430 instr->op != nir_texop_samples_identical);
4431 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4432
4433 main_descriptor = AC_DESC_PLANE_0 + plane;
4434 }
4435
4436 if (instr->op == nir_texop_fragment_mask_fetch) {
4437 /* The fragment mask is fetched from the compressed
4438 * multisampled surface.
4439 */
4440 main_descriptor = AC_DESC_FMASK;
4441 }
4442
4443 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4444 texture_dynamic_index, false, false);
4445
4446 if (samp_ptr) {
4447 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4448 sampler_dynamic_index, false, false);
4449 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4450 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4451 }
4452 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4453 instr->op == nir_texop_samples_identical))
4454 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4455 &instr->instr, texture_dynamic_index, false, false);
4456 }
4457
4458 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4459 LLVMValueRef coord)
4460 {
4461 coord = ac_to_float(ctx, coord);
4462 coord = ac_build_round(ctx, coord);
4463 coord = ac_to_integer(ctx, coord);
4464 return coord;
4465 }
4466
4467 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4468 {
4469 LLVMValueRef result = NULL;
4470 struct ac_image_args args = { 0 };
4471 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4472 LLVMValueRef ddx = NULL, ddy = NULL;
4473 unsigned offset_src = 0;
4474 struct waterfall_context wctx[2] = {{{0}}};
4475
4476 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4477
4478 for (unsigned i = 0; i < instr->num_srcs; i++) {
4479 switch (instr->src[i].src_type) {
4480 case nir_tex_src_coord: {
4481 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4482 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4483 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4484 break;
4485 }
4486 case nir_tex_src_projector:
4487 break;
4488 case nir_tex_src_comparator:
4489 if (instr->is_shadow) {
4490 args.compare = get_src(ctx, instr->src[i].src);
4491 args.compare = ac_to_float(&ctx->ac, args.compare);
4492 }
4493 break;
4494 case nir_tex_src_offset:
4495 args.offset = get_src(ctx, instr->src[i].src);
4496 offset_src = i;
4497 break;
4498 case nir_tex_src_bias:
4499 args.bias = get_src(ctx, instr->src[i].src);
4500 break;
4501 case nir_tex_src_lod: {
4502 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4503 args.level_zero = true;
4504 else
4505 args.lod = get_src(ctx, instr->src[i].src);
4506 break;
4507 }
4508 case nir_tex_src_ms_index:
4509 sample_index = get_src(ctx, instr->src[i].src);
4510 break;
4511 case nir_tex_src_ms_mcs:
4512 break;
4513 case nir_tex_src_ddx:
4514 ddx = get_src(ctx, instr->src[i].src);
4515 break;
4516 case nir_tex_src_ddy:
4517 ddy = get_src(ctx, instr->src[i].src);
4518 break;
4519 case nir_tex_src_min_lod:
4520 args.min_lod = get_src(ctx, instr->src[i].src);
4521 break;
4522 case nir_tex_src_texture_offset:
4523 case nir_tex_src_sampler_offset:
4524 case nir_tex_src_plane:
4525 default:
4526 break;
4527 }
4528 }
4529
4530 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4531 result = get_buffer_size(ctx, args.resource, true);
4532 goto write_result;
4533 }
4534
4535 if (instr->op == nir_texop_texture_samples) {
4536 LLVMValueRef res, samples, is_msaa;
4537 LLVMValueRef default_sample;
4538
4539 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4540 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4541 LLVMConstInt(ctx->ac.i32, 3, false), "");
4542 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4543 LLVMConstInt(ctx->ac.i32, 28, false), "");
4544 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4545 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4546 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4547 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4548
4549 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4550 LLVMConstInt(ctx->ac.i32, 16, false), "");
4551 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4552 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4553 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4554 samples, "");
4555
4556 if (ctx->abi->robust_buffer_access) {
4557 LLVMValueRef dword1, is_null_descriptor;
4558
4559 /* Extract the second dword of the descriptor, if it's
4560 * all zero, then it's a null descriptor.
4561 */
4562 dword1 = LLVMBuildExtractElement(ctx->ac.builder, res,
4563 LLVMConstInt(ctx->ac.i32, 1, false), "");
4564 is_null_descriptor =
4565 LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, dword1,
4566 LLVMConstInt(ctx->ac.i32, 0, false), "");
4567 default_sample =
4568 LLVMBuildSelect(ctx->ac.builder, is_null_descriptor,
4569 ctx->ac.i32_0, ctx->ac.i32_1, "");
4570 } else {
4571 default_sample = ctx->ac.i32_1;
4572 }
4573
4574 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4575 default_sample, "");
4576 result = samples;
4577 goto write_result;
4578 }
4579
4580 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4581 LLVMValueRef offset[3], pack;
4582 for (unsigned chan = 0; chan < 3; ++chan)
4583 offset[chan] = ctx->ac.i32_0;
4584
4585 unsigned num_components = ac_get_llvm_num_components(args.offset);
4586 for (unsigned chan = 0; chan < num_components; chan++) {
4587 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4588 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4589 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4590 if (chan)
4591 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4592 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4593 }
4594 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4595 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4596 args.offset = pack;
4597 }
4598
4599 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4600 * OpenGL 4.5 spec says:
4601 *
4602 * "If the texture’s internal format indicates a fixed-point
4603 * depth texture, then D_t and D_ref are clamped to the
4604 * range [0, 1]; otherwise no clamping is performed."
4605 *
4606 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4607 * so the depth comparison value isn't clamped for Z16 and
4608 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4609 * an explicitly clamped 32-bit float format.
4610 */
4611 if (args.compare &&
4612 ctx->ac.chip_class >= GFX8 &&
4613 ctx->ac.chip_class <= GFX9 &&
4614 ctx->abi->clamp_shadow_reference) {
4615 LLVMValueRef upgraded, clamped;
4616
4617 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4618 LLVMConstInt(ctx->ac.i32, 3, false), "");
4619 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4620 LLVMConstInt(ctx->ac.i32, 29, false), "");
4621 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4622 clamped = ac_build_clamp(&ctx->ac, args.compare);
4623 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4624 args.compare, "");
4625 }
4626
4627 /* pack derivatives */
4628 if (ddx || ddy) {
4629 int num_src_deriv_channels, num_dest_deriv_channels;
4630 switch (instr->sampler_dim) {
4631 case GLSL_SAMPLER_DIM_3D:
4632 case GLSL_SAMPLER_DIM_CUBE:
4633 num_src_deriv_channels = 3;
4634 num_dest_deriv_channels = 3;
4635 break;
4636 case GLSL_SAMPLER_DIM_2D:
4637 default:
4638 num_src_deriv_channels = 2;
4639 num_dest_deriv_channels = 2;
4640 break;
4641 case GLSL_SAMPLER_DIM_1D:
4642 num_src_deriv_channels = 1;
4643 if (ctx->ac.chip_class == GFX9) {
4644 num_dest_deriv_channels = 2;
4645 } else {
4646 num_dest_deriv_channels = 1;
4647 }
4648 break;
4649 }
4650
4651 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4652 args.derivs[i] = ac_to_float(&ctx->ac,
4653 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4654 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4655 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4656 }
4657 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4658 args.derivs[i] = ctx->ac.f32_0;
4659 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4660 }
4661 }
4662
4663 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4664 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4665 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4666 if (instr->coord_components == 3)
4667 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4668 ac_prepare_cube_coords(&ctx->ac,
4669 instr->op == nir_texop_txd, instr->is_array,
4670 instr->op == nir_texop_lod, args.coords, args.derivs);
4671 }
4672
4673 /* Texture coordinates fixups */
4674 if (instr->coord_components > 1 &&
4675 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4676 instr->is_array &&
4677 instr->op != nir_texop_txf) {
4678 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4679 }
4680
4681 if (instr->coord_components > 2 &&
4682 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4683 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4684 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4685 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4686 instr->is_array &&
4687 instr->op != nir_texop_txf &&
4688 instr->op != nir_texop_txf_ms &&
4689 instr->op != nir_texop_fragment_fetch &&
4690 instr->op != nir_texop_fragment_mask_fetch) {
4691 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4692 }
4693
4694 if (ctx->ac.chip_class == GFX9 &&
4695 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4696 instr->op != nir_texop_lod) {
4697 LLVMValueRef filler;
4698 if (instr->op == nir_texop_txf)
4699 filler = ctx->ac.i32_0;
4700 else
4701 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4702
4703 if (instr->is_array)
4704 args.coords[2] = args.coords[1];
4705 args.coords[1] = filler;
4706 }
4707
4708 /* Pack sample index */
4709 if (sample_index && (instr->op == nir_texop_txf_ms ||
4710 instr->op == nir_texop_fragment_fetch))
4711 args.coords[instr->coord_components] = sample_index;
4712
4713 if (instr->op == nir_texop_samples_identical) {
4714 struct ac_image_args txf_args = { 0 };
4715 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4716
4717 txf_args.dmask = 0xf;
4718 txf_args.resource = fmask_ptr;
4719 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4720 result = build_tex_intrinsic(ctx, instr, &txf_args);
4721
4722 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4723 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4724 goto write_result;
4725 }
4726
4727 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4728 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4729 instr->op != nir_texop_txs &&
4730 instr->op != nir_texop_fragment_fetch &&
4731 instr->op != nir_texop_fragment_mask_fetch) {
4732 unsigned sample_chan = instr->is_array ? 3 : 2;
4733 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4734 &ctx->ac, args.coords[0], args.coords[1],
4735 instr->is_array ? args.coords[2] : NULL,
4736 args.coords[sample_chan], fmask_ptr);
4737 }
4738
4739 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4740 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4741 num_offsets = MIN2(num_offsets, instr->coord_components);
4742 for (unsigned i = 0; i < num_offsets; ++i) {
4743 args.coords[i] = LLVMBuildAdd(
4744 ctx->ac.builder, args.coords[i],
4745 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4746 }
4747 args.offset = NULL;
4748 }
4749
4750 /* DMASK was repurposed for GATHER4. 4 components are always
4751 * returned and DMASK works like a swizzle - it selects
4752 * the component to fetch. The only valid DMASK values are
4753 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4754 * (red,red,red,red) etc.) The ISA document doesn't mention
4755 * this.
4756 */
4757 args.dmask = 0xf;
4758 if (instr->op == nir_texop_tg4) {
4759 if (instr->is_shadow)
4760 args.dmask = 1;
4761 else
4762 args.dmask = 1 << instr->component;
4763 }
4764
4765 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4766 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4767 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4768 }
4769
4770 /* Adjust the number of coordinates because we only need (x,y) for 2D
4771 * multisampled images and (x,y,layer) for 2D multisampled layered
4772 * images or for multisampled input attachments.
4773 */
4774 if (instr->op == nir_texop_fragment_mask_fetch) {
4775 if (args.dim == ac_image_2dmsaa) {
4776 args.dim = ac_image_2d;
4777 } else {
4778 assert(args.dim == ac_image_2darraymsaa);
4779 args.dim = ac_image_2darray;
4780 }
4781 }
4782
4783 assert(instr->dest.is_ssa);
4784 args.d16 = instr->dest.ssa.bit_size == 16;
4785
4786 result = build_tex_intrinsic(ctx, instr, &args);
4787
4788 if (instr->op == nir_texop_query_levels)
4789 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4790 else if (instr->is_shadow && instr->is_new_style_shadow &&
4791 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4792 instr->op != nir_texop_tg4)
4793 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4794 else if (instr->op == nir_texop_txs &&
4795 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4796 instr->is_array) {
4797 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4798 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4799 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4800 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4801 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4802 } else if (ctx->ac.chip_class == GFX9 &&
4803 instr->op == nir_texop_txs &&
4804 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4805 instr->is_array) {
4806 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4807 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4808 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4809 ctx->ac.i32_1, "");
4810 } else if (instr->dest.ssa.num_components != 4)
4811 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4812
4813 write_result:
4814 if (result) {
4815 assert(instr->dest.is_ssa);
4816 result = ac_to_integer(&ctx->ac, result);
4817
4818 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4819 result = exit_waterfall(ctx, wctx + i, result);
4820 }
4821
4822 ctx->ssa_defs[instr->dest.ssa.index] = result;
4823 }
4824 }
4825
4826 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4827 {
4828 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4829 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4830
4831 ctx->ssa_defs[instr->dest.ssa.index] = result;
4832 _mesa_hash_table_insert(ctx->phis, instr, result);
4833 }
4834
4835 static void visit_post_phi(struct ac_nir_context *ctx,
4836 nir_phi_instr *instr,
4837 LLVMValueRef llvm_phi)
4838 {
4839 nir_foreach_phi_src(src, instr) {
4840 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4841 LLVMValueRef llvm_src = get_src(ctx, src->src);
4842
4843 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4844 }
4845 }
4846
4847 static void phi_post_pass(struct ac_nir_context *ctx)
4848 {
4849 hash_table_foreach(ctx->phis, entry) {
4850 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4851 (LLVMValueRef)entry->data);
4852 }
4853 }
4854
4855
4856 static bool is_def_used_in_an_export(const nir_ssa_def* def) {
4857 nir_foreach_use(use_src, def) {
4858 if (use_src->parent_instr->type == nir_instr_type_intrinsic) {
4859 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(use_src->parent_instr);
4860 if (instr->intrinsic == nir_intrinsic_store_deref)
4861 return true;
4862 } else if (use_src->parent_instr->type == nir_instr_type_alu) {
4863 nir_alu_instr *instr = nir_instr_as_alu(use_src->parent_instr);
4864 if (instr->op == nir_op_vec4 &&
4865 is_def_used_in_an_export(&instr->dest.dest.ssa)) {
4866 return true;
4867 }
4868 }
4869 }
4870 return false;
4871 }
4872
4873 static void visit_ssa_undef(struct ac_nir_context *ctx,
4874 const nir_ssa_undef_instr *instr)
4875 {
4876 unsigned num_components = instr->def.num_components;
4877 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4878
4879 if (!ctx->abi->convert_undef_to_zero || is_def_used_in_an_export(&instr->def)) {
4880 LLVMValueRef undef;
4881
4882 if (num_components == 1)
4883 undef = LLVMGetUndef(type);
4884 else {
4885 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4886 }
4887 ctx->ssa_defs[instr->def.index] = undef;
4888 } else {
4889 LLVMValueRef zero = LLVMConstInt(type, 0, false);
4890 if (num_components > 1) {
4891 zero = ac_build_gather_values_extended(
4892 &ctx->ac, &zero, 4, 0, false, false);
4893 }
4894 ctx->ssa_defs[instr->def.index] = zero;
4895 }
4896 }
4897
4898 static void visit_jump(struct ac_llvm_context *ctx,
4899 const nir_jump_instr *instr)
4900 {
4901 switch (instr->type) {
4902 case nir_jump_break:
4903 ac_build_break(ctx);
4904 break;
4905 case nir_jump_continue:
4906 ac_build_continue(ctx);
4907 break;
4908 default:
4909 fprintf(stderr, "Unknown NIR jump instr: ");
4910 nir_print_instr(&instr->instr, stderr);
4911 fprintf(stderr, "\n");
4912 abort();
4913 }
4914 }
4915
4916 static LLVMTypeRef
4917 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4918 enum glsl_base_type type)
4919 {
4920 switch (type) {
4921 case GLSL_TYPE_INT:
4922 case GLSL_TYPE_UINT:
4923 case GLSL_TYPE_BOOL:
4924 case GLSL_TYPE_SUBROUTINE:
4925 return ac->i32;
4926 case GLSL_TYPE_INT8:
4927 case GLSL_TYPE_UINT8:
4928 return ac->i8;
4929 case GLSL_TYPE_INT16:
4930 case GLSL_TYPE_UINT16:
4931 return ac->i16;
4932 case GLSL_TYPE_FLOAT:
4933 return ac->f32;
4934 case GLSL_TYPE_FLOAT16:
4935 return ac->f16;
4936 case GLSL_TYPE_INT64:
4937 case GLSL_TYPE_UINT64:
4938 return ac->i64;
4939 case GLSL_TYPE_DOUBLE:
4940 return ac->f64;
4941 default:
4942 unreachable("unknown GLSL type");
4943 }
4944 }
4945
4946 static LLVMTypeRef
4947 glsl_to_llvm_type(struct ac_llvm_context *ac,
4948 const struct glsl_type *type)
4949 {
4950 if (glsl_type_is_scalar(type)) {
4951 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4952 }
4953
4954 if (glsl_type_is_vector(type)) {
4955 return LLVMVectorType(
4956 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4957 glsl_get_vector_elements(type));
4958 }
4959
4960 if (glsl_type_is_matrix(type)) {
4961 return LLVMArrayType(
4962 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4963 glsl_get_matrix_columns(type));
4964 }
4965
4966 if (glsl_type_is_array(type)) {
4967 return LLVMArrayType(
4968 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4969 glsl_get_length(type));
4970 }
4971
4972 assert(glsl_type_is_struct_or_ifc(type));
4973
4974 LLVMTypeRef member_types[glsl_get_length(type)];
4975
4976 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4977 member_types[i] =
4978 glsl_to_llvm_type(ac,
4979 glsl_get_struct_field(type, i));
4980 }
4981
4982 return LLVMStructTypeInContext(ac->context, member_types,
4983 glsl_get_length(type), false);
4984 }
4985
4986 static void visit_deref(struct ac_nir_context *ctx,
4987 nir_deref_instr *instr)
4988 {
4989 if (instr->mode != nir_var_mem_shared &&
4990 instr->mode != nir_var_mem_global)
4991 return;
4992
4993 LLVMValueRef result = NULL;
4994 switch(instr->deref_type) {
4995 case nir_deref_type_var: {
4996 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4997 result = entry->data;
4998 break;
4999 }
5000 case nir_deref_type_struct:
5001 if (instr->mode == nir_var_mem_global) {
5002 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5003 uint64_t offset = glsl_get_struct_field_offset(parent->type,
5004 instr->strct.index);
5005 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5006 LLVMConstInt(ctx->ac.i32, offset, 0));
5007 } else {
5008 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5009 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
5010 }
5011 break;
5012 case nir_deref_type_array:
5013 if (instr->mode == nir_var_mem_global) {
5014 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5015 unsigned stride = glsl_get_explicit_stride(parent->type);
5016
5017 if ((glsl_type_is_matrix(parent->type) &&
5018 glsl_matrix_type_is_row_major(parent->type)) ||
5019 (glsl_type_is_vector(parent->type) && stride == 0))
5020 stride = type_scalar_size_bytes(parent->type);
5021
5022 assert(stride > 0);
5023 LLVMValueRef index = get_src(ctx, instr->arr.index);
5024 if (LLVMTypeOf(index) != ctx->ac.i64)
5025 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5026
5027 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5028
5029 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5030 } else {
5031 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5032 get_src(ctx, instr->arr.index));
5033 }
5034 break;
5035 case nir_deref_type_ptr_as_array:
5036 if (instr->mode == nir_var_mem_global) {
5037 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
5038
5039 LLVMValueRef index = get_src(ctx, instr->arr.index);
5040 if (LLVMTypeOf(index) != ctx->ac.i64)
5041 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5042
5043 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5044
5045 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5046 } else {
5047 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5048 get_src(ctx, instr->arr.index));
5049 }
5050 break;
5051 case nir_deref_type_cast: {
5052 result = get_src(ctx, instr->parent);
5053
5054 /* We can't use the structs from LLVM because the shader
5055 * specifies its own offsets. */
5056 LLVMTypeRef pointee_type = ctx->ac.i8;
5057 if (instr->mode == nir_var_mem_shared)
5058 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
5059
5060 unsigned address_space;
5061
5062 switch(instr->mode) {
5063 case nir_var_mem_shared:
5064 address_space = AC_ADDR_SPACE_LDS;
5065 break;
5066 case nir_var_mem_global:
5067 address_space = AC_ADDR_SPACE_GLOBAL;
5068 break;
5069 default:
5070 unreachable("Unhandled address space");
5071 }
5072
5073 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
5074
5075 if (LLVMTypeOf(result) != type) {
5076 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
5077 result = LLVMBuildBitCast(ctx->ac.builder, result,
5078 type, "");
5079 } else {
5080 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
5081 type, "");
5082 }
5083 }
5084 break;
5085 }
5086 default:
5087 unreachable("Unhandled deref_instr deref type");
5088 }
5089
5090 ctx->ssa_defs[instr->dest.ssa.index] = result;
5091 }
5092
5093 static void visit_cf_list(struct ac_nir_context *ctx,
5094 struct exec_list *list);
5095
5096 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
5097 {
5098 nir_foreach_instr(instr, block)
5099 {
5100 switch (instr->type) {
5101 case nir_instr_type_alu:
5102 visit_alu(ctx, nir_instr_as_alu(instr));
5103 break;
5104 case nir_instr_type_load_const:
5105 visit_load_const(ctx, nir_instr_as_load_const(instr));
5106 break;
5107 case nir_instr_type_intrinsic:
5108 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
5109 break;
5110 case nir_instr_type_tex:
5111 visit_tex(ctx, nir_instr_as_tex(instr));
5112 break;
5113 case nir_instr_type_phi:
5114 visit_phi(ctx, nir_instr_as_phi(instr));
5115 break;
5116 case nir_instr_type_ssa_undef:
5117 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
5118 break;
5119 case nir_instr_type_jump:
5120 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
5121 break;
5122 case nir_instr_type_deref:
5123 visit_deref(ctx, nir_instr_as_deref(instr));
5124 break;
5125 default:
5126 fprintf(stderr, "Unknown NIR instr type: ");
5127 nir_print_instr(instr, stderr);
5128 fprintf(stderr, "\n");
5129 abort();
5130 }
5131 }
5132
5133 _mesa_hash_table_insert(ctx->defs, block,
5134 LLVMGetInsertBlock(ctx->ac.builder));
5135 }
5136
5137 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
5138 {
5139 LLVMValueRef value = get_src(ctx, if_stmt->condition);
5140
5141 nir_block *then_block =
5142 (nir_block *) exec_list_get_head(&if_stmt->then_list);
5143
5144 ac_build_uif(&ctx->ac, value, then_block->index);
5145
5146 visit_cf_list(ctx, &if_stmt->then_list);
5147
5148 if (!exec_list_is_empty(&if_stmt->else_list)) {
5149 nir_block *else_block =
5150 (nir_block *) exec_list_get_head(&if_stmt->else_list);
5151
5152 ac_build_else(&ctx->ac, else_block->index);
5153 visit_cf_list(ctx, &if_stmt->else_list);
5154 }
5155
5156 ac_build_endif(&ctx->ac, then_block->index);
5157 }
5158
5159 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
5160 {
5161 nir_block *first_loop_block =
5162 (nir_block *) exec_list_get_head(&loop->body);
5163
5164 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
5165
5166 visit_cf_list(ctx, &loop->body);
5167
5168 ac_build_endloop(&ctx->ac, first_loop_block->index);
5169 }
5170
5171 static void visit_cf_list(struct ac_nir_context *ctx,
5172 struct exec_list *list)
5173 {
5174 foreach_list_typed(nir_cf_node, node, node, list)
5175 {
5176 switch (node->type) {
5177 case nir_cf_node_block:
5178 visit_block(ctx, nir_cf_node_as_block(node));
5179 break;
5180
5181 case nir_cf_node_if:
5182 visit_if(ctx, nir_cf_node_as_if(node));
5183 break;
5184
5185 case nir_cf_node_loop:
5186 visit_loop(ctx, nir_cf_node_as_loop(node));
5187 break;
5188
5189 default:
5190 assert(0);
5191 }
5192 }
5193 }
5194
5195 void
5196 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5197 struct ac_shader_abi *abi,
5198 struct nir_shader *nir,
5199 struct nir_variable *variable,
5200 gl_shader_stage stage)
5201 {
5202 unsigned output_loc = variable->data.driver_location / 4;
5203 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5204
5205 /* tess ctrl has it's own load/store paths for outputs */
5206 if (stage == MESA_SHADER_TESS_CTRL)
5207 return;
5208
5209 if (stage == MESA_SHADER_VERTEX ||
5210 stage == MESA_SHADER_TESS_EVAL ||
5211 stage == MESA_SHADER_GEOMETRY) {
5212 int idx = variable->data.location + variable->data.index;
5213 if (idx == VARYING_SLOT_CLIP_DIST0) {
5214 int length = nir->info.clip_distance_array_size +
5215 nir->info.cull_distance_array_size;
5216
5217 if (length > 4)
5218 attrib_count = 2;
5219 else
5220 attrib_count = 1;
5221 }
5222 }
5223
5224 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5225 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5226 for (unsigned i = 0; i < attrib_count; ++i) {
5227 for (unsigned chan = 0; chan < 4; chan++) {
5228 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5229 ac_build_alloca_undef(ctx, type, "");
5230 }
5231 }
5232 }
5233
5234 static void
5235 setup_locals(struct ac_nir_context *ctx,
5236 struct nir_function *func)
5237 {
5238 int i, j;
5239 ctx->num_locals = 0;
5240 nir_foreach_variable(variable, &func->impl->locals) {
5241 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5242 variable->data.driver_location = ctx->num_locals * 4;
5243 variable->data.location_frac = 0;
5244 ctx->num_locals += attrib_count;
5245 }
5246 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5247 if (!ctx->locals)
5248 return;
5249
5250 for (i = 0; i < ctx->num_locals; i++) {
5251 for (j = 0; j < 4; j++) {
5252 ctx->locals[i * 4 + j] =
5253 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5254 }
5255 }
5256 }
5257
5258 static void
5259 setup_scratch(struct ac_nir_context *ctx,
5260 struct nir_shader *shader)
5261 {
5262 if (shader->scratch_size == 0)
5263 return;
5264
5265 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5266 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5267 "scratch");
5268 }
5269
5270 static void
5271 setup_constant_data(struct ac_nir_context *ctx,
5272 struct nir_shader *shader)
5273 {
5274 if (!shader->constant_data)
5275 return;
5276
5277 LLVMValueRef data =
5278 LLVMConstStringInContext(ctx->ac.context,
5279 shader->constant_data,
5280 shader->constant_data_size,
5281 true);
5282 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5283
5284 /* We want to put the constant data in the CONST address space so that
5285 * we can use scalar loads. However, LLVM versions before 10 put these
5286 * variables in the same section as the code, which is unacceptable
5287 * for RadeonSI as it needs to relocate all the data sections after
5288 * the code sections. See https://reviews.llvm.org/D65813.
5289 */
5290 unsigned address_space =
5291 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5292
5293 LLVMValueRef global =
5294 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5295 "const_data",
5296 address_space);
5297
5298 LLVMSetInitializer(global, data);
5299 LLVMSetGlobalConstant(global, true);
5300 LLVMSetVisibility(global, LLVMHiddenVisibility);
5301 ctx->constant_data = global;
5302 }
5303
5304 static void
5305 setup_shared(struct ac_nir_context *ctx,
5306 struct nir_shader *nir)
5307 {
5308 if (ctx->ac.lds)
5309 return;
5310
5311 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5312 nir->info.cs.shared_size);
5313
5314 LLVMValueRef lds =
5315 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5316 "compute_lds",
5317 AC_ADDR_SPACE_LDS);
5318 LLVMSetAlignment(lds, 64 * 1024);
5319
5320 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5321 LLVMPointerType(ctx->ac.i8,
5322 AC_ADDR_SPACE_LDS), "");
5323 }
5324
5325 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5326 const struct ac_shader_args *args, struct nir_shader *nir)
5327 {
5328 struct ac_nir_context ctx = {};
5329 struct nir_function *func;
5330
5331 ctx.ac = *ac;
5332 ctx.abi = abi;
5333 ctx.args = args;
5334
5335 ctx.stage = nir->info.stage;
5336 ctx.info = &nir->info;
5337
5338 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5339
5340 nir_foreach_variable(variable, &nir->outputs)
5341 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5342 ctx.stage);
5343
5344 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5345 _mesa_key_pointer_equal);
5346 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5347 _mesa_key_pointer_equal);
5348 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5349 _mesa_key_pointer_equal);
5350
5351 if (ctx.abi->kill_ps_if_inf_interp)
5352 ctx.verified_interp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5353 _mesa_key_pointer_equal);
5354
5355 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5356
5357 nir_index_ssa_defs(func->impl);
5358 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5359
5360 setup_locals(&ctx, func);
5361 setup_scratch(&ctx, nir);
5362 setup_constant_data(&ctx, nir);
5363
5364 if (gl_shader_stage_is_compute(nir->info.stage))
5365 setup_shared(&ctx, nir);
5366
5367 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5368 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5369 /* true = don't kill. */
5370 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5371 }
5372
5373 visit_cf_list(&ctx, &func->impl->body);
5374 phi_post_pass(&ctx);
5375
5376 if (ctx.ac.postponed_kill)
5377 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5378 ctx.ac.postponed_kill, ""));
5379
5380 if (!gl_shader_stage_is_compute(nir->info.stage))
5381 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5382 ctx.abi->outputs);
5383
5384 free(ctx.locals);
5385 free(ctx.ssa_defs);
5386 ralloc_free(ctx.defs);
5387 ralloc_free(ctx.phis);
5388 ralloc_free(ctx.vars);
5389 if (ctx.abi->kill_ps_if_inf_interp)
5390 ralloc_free(ctx.verified_interp);
5391 }
5392
5393 bool
5394 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5395 {
5396 bool progress = false;
5397
5398 /* Lower large variables to scratch first so that we won't bloat the
5399 * shader by generating large if ladders for them. We later lower
5400 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5401 */
5402 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5403 nir_var_function_temp,
5404 256,
5405 glsl_get_natural_size_align_bytes);
5406
5407 /* While it would be nice not to have this flag, we are constrained
5408 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5409 */
5410 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5411
5412 /* TODO: Indirect indexing of GS inputs is unimplemented.
5413 *
5414 * TCS and TES load inputs directly from LDS or offchip memory, so
5415 * indirect indexing is trivial.
5416 */
5417 nir_variable_mode indirect_mask = 0;
5418 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5419 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5420 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5421 !llvm_has_working_vgpr_indexing)) {
5422 indirect_mask |= nir_var_shader_in;
5423 }
5424 if (!llvm_has_working_vgpr_indexing &&
5425 nir->info.stage != MESA_SHADER_TESS_CTRL)
5426 indirect_mask |= nir_var_shader_out;
5427
5428 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5429 * smart enough to handle indirects without causing excess spilling
5430 * causing the gpu to hang.
5431 *
5432 * See the following thread for more details of the problem:
5433 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5434 */
5435 indirect_mask |= nir_var_function_temp;
5436
5437 progress |= nir_lower_indirect_derefs(nir, indirect_mask);
5438 return progress;
5439 }
5440
5441 static unsigned
5442 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5443 {
5444 if (intrin->intrinsic != nir_intrinsic_store_deref)
5445 return 0;
5446
5447 nir_variable *var =
5448 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
5449
5450 if (var->data.mode != nir_var_shader_out)
5451 return 0;
5452
5453 unsigned writemask = 0;
5454 const int location = var->data.location;
5455 unsigned first_component = var->data.location_frac;
5456 unsigned num_comps = intrin->dest.ssa.num_components;
5457
5458 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5459 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
5460 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5461 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
5462
5463 return writemask;
5464 }
5465
5466 static void
5467 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5468 unsigned *cond_block_tf_writemask,
5469 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5470 {
5471 switch (cf_node->type) {
5472 case nir_cf_node_block: {
5473 nir_block *block = nir_cf_node_as_block(cf_node);
5474 nir_foreach_instr(instr, block) {
5475 if (instr->type != nir_instr_type_intrinsic)
5476 continue;
5477
5478 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5479 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5480
5481 /* If we find a barrier in nested control flow put this in the
5482 * too hard basket. In GLSL this is not possible but it is in
5483 * SPIR-V.
5484 */
5485 if (is_nested_cf) {
5486 *tessfactors_are_def_in_all_invocs = false;
5487 return;
5488 }
5489
5490 /* The following case must be prevented:
5491 * gl_TessLevelInner = ...;
5492 * barrier();
5493 * if (gl_InvocationID == 1)
5494 * gl_TessLevelInner = ...;
5495 *
5496 * If you consider disjoint code segments separated by barriers, each
5497 * such segment that writes tess factor channels should write the same
5498 * channels in all codepaths within that segment.
5499 */
5500 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5501 /* Accumulate the result: */
5502 *tessfactors_are_def_in_all_invocs &=
5503 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5504
5505 /* Analyze the next code segment from scratch. */
5506 *upper_block_tf_writemask = 0;
5507 *cond_block_tf_writemask = 0;
5508 }
5509 } else
5510 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5511 }
5512
5513 break;
5514 }
5515 case nir_cf_node_if: {
5516 unsigned then_tessfactor_writemask = 0;
5517 unsigned else_tessfactor_writemask = 0;
5518
5519 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5520 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5521 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5522 cond_block_tf_writemask,
5523 tessfactors_are_def_in_all_invocs, true);
5524 }
5525
5526 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5527 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5528 cond_block_tf_writemask,
5529 tessfactors_are_def_in_all_invocs, true);
5530 }
5531
5532 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5533 /* If both statements write the same tess factor channels,
5534 * we can say that the upper block writes them too.
5535 */
5536 *upper_block_tf_writemask |= then_tessfactor_writemask &
5537 else_tessfactor_writemask;
5538 *cond_block_tf_writemask |= then_tessfactor_writemask |
5539 else_tessfactor_writemask;
5540 }
5541
5542 break;
5543 }
5544 case nir_cf_node_loop: {
5545 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5546 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5547 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5548 cond_block_tf_writemask,
5549 tessfactors_are_def_in_all_invocs, true);
5550 }
5551
5552 break;
5553 }
5554 default:
5555 unreachable("unknown cf node type");
5556 }
5557 }
5558
5559 bool
5560 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5561 {
5562 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5563
5564 /* The pass works as follows:
5565 * If all codepaths write tess factors, we can say that all
5566 * invocations define tess factors.
5567 *
5568 * Each tess factor channel is tracked separately.
5569 */
5570 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5571 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5572
5573 /* Initial value = true. Here the pass will accumulate results from
5574 * multiple segments surrounded by barriers. If tess factors aren't
5575 * written at all, it's a shader bug and we don't care if this will be
5576 * true.
5577 */
5578 bool tessfactors_are_def_in_all_invocs = true;
5579
5580 nir_foreach_function(function, nir) {
5581 if (function->impl) {
5582 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5583 scan_tess_ctrl(node, &main_block_tf_writemask,
5584 &cond_block_tf_writemask,
5585 &tessfactors_are_def_in_all_invocs,
5586 false);
5587 }
5588 }
5589 }
5590
5591 /* Accumulate the result for the last code segment separated by a
5592 * barrier.
5593 */
5594 if (main_block_tf_writemask || cond_block_tf_writemask) {
5595 tessfactors_are_def_in_all_invocs &=
5596 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5597 }
5598
5599 return tessfactors_are_def_in_all_invocs;
5600 }