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[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41
42 gl_shader_stage stage;
43 shader_info *info;
44
45 LLVMValueRef *ssa_defs;
46
47 LLVMValueRef scratch;
48 LLVMValueRef constant_data;
49
50 struct hash_table *defs;
51 struct hash_table *phis;
52 struct hash_table *vars;
53
54 LLVMValueRef main_function;
55 LLVMBasicBlockRef continue_block;
56 LLVMBasicBlockRef break_block;
57
58 int num_locals;
59 LLVMValueRef *locals;
60 };
61
62 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
63 nir_deref_instr *deref_instr,
64 enum ac_descriptor_type desc_type,
65 const nir_instr *instr,
66 bool image, bool write);
67
68 static void
69 build_store_values_extended(struct ac_llvm_context *ac,
70 LLVMValueRef *values,
71 unsigned value_count,
72 unsigned value_stride,
73 LLVMValueRef vec)
74 {
75 LLVMBuilderRef builder = ac->builder;
76 unsigned i;
77
78 for (i = 0; i < value_count; i++) {
79 LLVMValueRef ptr = values[i * value_stride];
80 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
81 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
82 LLVMBuildStore(builder, value, ptr);
83 }
84 }
85
86 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
87 const nir_ssa_def *def)
88 {
89 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
90 if (def->num_components > 1) {
91 type = LLVMVectorType(type, def->num_components);
92 }
93 return type;
94 }
95
96 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
97 {
98 assert(src.is_ssa);
99 return nir->ssa_defs[src.ssa->index];
100 }
101
102 static LLVMValueRef
103 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
104 {
105 LLVMValueRef ptr = get_src(ctx, src);
106 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
107 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
108
109 return LLVMBuildBitCast(ctx->ac.builder, ptr,
110 LLVMPointerType(ctx->ac.i32, addr_space), "");
111 }
112
113 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
114 const struct nir_block *b)
115 {
116 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
117 return (LLVMBasicBlockRef)entry->data;
118 }
119
120 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
121 nir_alu_src src,
122 unsigned num_components)
123 {
124 LLVMValueRef value = get_src(ctx, src.src);
125 bool need_swizzle = false;
126
127 assert(value);
128 unsigned src_components = ac_get_llvm_num_components(value);
129 for (unsigned i = 0; i < num_components; ++i) {
130 assert(src.swizzle[i] < src_components);
131 if (src.swizzle[i] != i)
132 need_swizzle = true;
133 }
134
135 if (need_swizzle || num_components != src_components) {
136 LLVMValueRef masks[] = {
137 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
138 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
139 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
140 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
141
142 if (src_components > 1 && num_components == 1) {
143 value = LLVMBuildExtractElement(ctx->ac.builder, value,
144 masks[0], "");
145 } else if (src_components == 1 && num_components > 1) {
146 LLVMValueRef values[] = {value, value, value, value};
147 value = ac_build_gather_values(&ctx->ac, values, num_components);
148 } else {
149 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
150 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
151 swizzle, "");
152 }
153 }
154 assert(!src.negate);
155 assert(!src.abs);
156 return value;
157 }
158
159 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
160 LLVMIntPredicate pred, LLVMValueRef src0,
161 LLVMValueRef src1)
162 {
163 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
164 return LLVMBuildSelect(ctx->builder, result,
165 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
166 ctx->i32_0, "");
167 }
168
169 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
170 LLVMRealPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMValueRef result;
174 src0 = ac_to_float(ctx, src0);
175 src1 = ac_to_float(ctx, src1);
176 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
177 return LLVMBuildSelect(ctx->builder, result,
178 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
179 ctx->i32_0, "");
180 }
181
182 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
183 const char *intrin,
184 LLVMTypeRef result_type,
185 LLVMValueRef src0)
186 {
187 char name[64];
188 LLVMValueRef params[] = {
189 ac_to_float(ctx, src0),
190 };
191
192 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
193 ac_get_elem_bits(ctx, result_type));
194 assert(length < sizeof(name));
195 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
196 }
197
198 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
199 const char *intrin,
200 LLVMTypeRef result_type,
201 LLVMValueRef src0, LLVMValueRef src1)
202 {
203 char name[64];
204 LLVMValueRef params[] = {
205 ac_to_float(ctx, src0),
206 ac_to_float(ctx, src1),
207 };
208
209 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
210 ac_get_elem_bits(ctx, result_type));
211 assert(length < sizeof(name));
212 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
213 }
214
215 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
216 const char *intrin,
217 LLVMTypeRef result_type,
218 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
219 {
220 char name[64];
221 LLVMValueRef params[] = {
222 ac_to_float(ctx, src0),
223 ac_to_float(ctx, src1),
224 ac_to_float(ctx, src2),
225 };
226
227 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
228 ac_get_elem_bits(ctx, result_type));
229 assert(length < sizeof(name));
230 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
231 }
232
233 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
234 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
235 {
236 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
237
238 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
239 ctx->i32_0, "");
240 return LLVMBuildSelect(ctx->builder, v,
241 ac_to_integer_or_pointer(ctx, src1),
242 ac_to_integer_or_pointer(ctx, src2), "");
243 }
244
245 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
246 LLVMValueRef src0)
247 {
248 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
249 }
250
251 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
252 const char *intrin,
253 LLVMValueRef src0, LLVMValueRef src1)
254 {
255 LLVMTypeRef ret_type;
256 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
257 LLVMValueRef res;
258 LLVMValueRef params[] = { src0, src1 };
259 ret_type = LLVMStructTypeInContext(ctx->context, types,
260 2, true);
261
262 res = ac_build_intrinsic(ctx, intrin, ret_type,
263 params, 2, AC_FUNC_ATTR_READNONE);
264
265 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
266 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
267 return res;
268 }
269
270 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
271 LLVMValueRef src0,
272 unsigned bitsize)
273 {
274 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
275 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
276 "");
277 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
278
279 switch (bitsize) {
280 case 16:
281 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
282 case 32:
283 return result;
284 case 64:
285 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
286 default:
287 unreachable("Unsupported bit size.");
288 }
289 }
290
291 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
292 LLVMValueRef src0)
293 {
294 src0 = ac_to_float(ctx, src0);
295 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
296 return LLVMBuildSExt(ctx->builder,
297 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
298 ctx->i32, "");
299 }
300
301 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
302 LLVMValueRef src0,
303 unsigned bitsize)
304 {
305 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
306
307 switch (bitsize) {
308 case 8:
309 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
310 case 16:
311 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
312 case 32:
313 return result;
314 case 64:
315 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
316 default:
317 unreachable("Unsupported bit size.");
318 }
319 }
320
321 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
322 LLVMValueRef src0)
323 {
324 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
325 return LLVMBuildSExt(ctx->builder,
326 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
327 ctx->i32, "");
328 }
329
330 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
331 LLVMValueRef src0)
332 {
333 LLVMValueRef result;
334 LLVMValueRef cond = NULL;
335
336 src0 = ac_to_float(ctx, src0);
337 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
338
339 if (ctx->chip_class >= GFX8) {
340 LLVMValueRef args[2];
341 /* Check if the result is a denormal - and flush to 0 if so. */
342 args[0] = result;
343 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
344 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
345 }
346
347 /* need to convert back up to f32 */
348 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
349
350 if (ctx->chip_class >= GFX8)
351 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
352 else {
353 /* for GFX6-GFX7 */
354 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
355 * so compare the result and flush to 0 if it's smaller.
356 */
357 LLVMValueRef temp, cond2;
358 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
359 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
360 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
361 temp, "");
362 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
363 temp, ctx->f32_0, "");
364 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
365 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
366 }
367 return result;
368 }
369
370 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
371 LLVMValueRef src0, LLVMValueRef src1)
372 {
373 LLVMValueRef dst64, result;
374 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
375 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
376
377 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
378 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
379 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
380 return result;
381 }
382
383 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
384 LLVMValueRef src0, LLVMValueRef src1)
385 {
386 LLVMValueRef dst64, result;
387 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
388 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
389
390 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
391 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
392 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
393 return result;
394 }
395
396 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
397 LLVMValueRef bits, LLVMValueRef offset)
398 {
399 /* mask = ((1 << bits) - 1) << offset */
400 return LLVMBuildShl(ctx->builder,
401 LLVMBuildSub(ctx->builder,
402 LLVMBuildShl(ctx->builder,
403 ctx->i32_1,
404 bits, ""),
405 ctx->i32_1, ""),
406 offset, "");
407 }
408
409 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
410 LLVMValueRef mask, LLVMValueRef insert,
411 LLVMValueRef base)
412 {
413 /* Calculate:
414 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
415 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
416 */
417 return LLVMBuildXor(ctx->builder, base,
418 LLVMBuildAnd(ctx->builder, mask,
419 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
420 }
421
422 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
423 LLVMValueRef src0,
424 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
425 LLVMValueRef args[2]))
426 {
427 LLVMValueRef comp[2];
428
429 src0 = ac_to_float(ctx, src0);
430 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
431 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
432
433 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
434 }
435
436 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
437 LLVMValueRef src0)
438 {
439 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
440 LLVMValueRef temps[2], val;
441 int i;
442
443 for (i = 0; i < 2; i++) {
444 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
445 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
446 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
447 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
448 }
449 return ac_build_gather_values(ctx, temps, 2);
450 }
451
452 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
453 nir_op op,
454 LLVMValueRef src0)
455 {
456 unsigned mask;
457 int idx;
458 LLVMValueRef result;
459
460 if (op == nir_op_fddx_fine)
461 mask = AC_TID_MASK_LEFT;
462 else if (op == nir_op_fddy_fine)
463 mask = AC_TID_MASK_TOP;
464 else
465 mask = AC_TID_MASK_TOP_LEFT;
466
467 /* for DDX we want to next X pixel, DDY next Y pixel. */
468 if (op == nir_op_fddx_fine ||
469 op == nir_op_fddx_coarse ||
470 op == nir_op_fddx)
471 idx = 1;
472 else
473 idx = 2;
474
475 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
476 return result;
477 }
478
479 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
480 {
481 LLVMValueRef src[4], result = NULL;
482 unsigned num_components = instr->dest.dest.ssa.num_components;
483 unsigned src_components;
484 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
485
486 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
487 switch (instr->op) {
488 case nir_op_vec2:
489 case nir_op_vec3:
490 case nir_op_vec4:
491 src_components = 1;
492 break;
493 case nir_op_pack_half_2x16:
494 case nir_op_pack_snorm_2x16:
495 case nir_op_pack_unorm_2x16:
496 src_components = 2;
497 break;
498 case nir_op_unpack_half_2x16:
499 src_components = 1;
500 break;
501 case nir_op_cube_face_coord:
502 case nir_op_cube_face_index:
503 src_components = 3;
504 break;
505 default:
506 src_components = num_components;
507 break;
508 }
509 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
510 src[i] = get_alu_src(ctx, instr->src[i], src_components);
511
512 switch (instr->op) {
513 case nir_op_mov:
514 result = src[0];
515 break;
516 case nir_op_fneg:
517 src[0] = ac_to_float(&ctx->ac, src[0]);
518 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
519 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
520 /* fneg will be optimized by backend compiler with sign
521 * bit removed via XOR. This is probably a LLVM bug.
522 */
523 result = ac_build_canonicalize(&ctx->ac, result,
524 instr->dest.dest.ssa.bit_size);
525 }
526 break;
527 case nir_op_ineg:
528 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
529 break;
530 case nir_op_inot:
531 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
532 break;
533 case nir_op_iadd:
534 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
535 break;
536 case nir_op_fadd:
537 src[0] = ac_to_float(&ctx->ac, src[0]);
538 src[1] = ac_to_float(&ctx->ac, src[1]);
539 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
540 break;
541 case nir_op_fsub:
542 src[0] = ac_to_float(&ctx->ac, src[0]);
543 src[1] = ac_to_float(&ctx->ac, src[1]);
544 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
545 break;
546 case nir_op_isub:
547 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
548 break;
549 case nir_op_imul:
550 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
551 break;
552 case nir_op_imod:
553 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
554 break;
555 case nir_op_umod:
556 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
557 break;
558 case nir_op_fmod:
559 /* lower_fmod only lower 16-bit and 32-bit fmod */
560 assert(instr->dest.dest.ssa.bit_size == 64);
561 src[0] = ac_to_float(&ctx->ac, src[0]);
562 src[1] = ac_to_float(&ctx->ac, src[1]);
563 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
564 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
565 ac_to_float_type(&ctx->ac, def_type), result);
566 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
567 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
568 break;
569 case nir_op_irem:
570 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
571 break;
572 case nir_op_idiv:
573 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
574 break;
575 case nir_op_udiv:
576 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
577 break;
578 case nir_op_fmul:
579 src[0] = ac_to_float(&ctx->ac, src[0]);
580 src[1] = ac_to_float(&ctx->ac, src[1]);
581 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
582 break;
583 case nir_op_frcp:
584 src[0] = ac_to_float(&ctx->ac, src[0]);
585 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
586 break;
587 case nir_op_iand:
588 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
589 break;
590 case nir_op_ior:
591 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
592 break;
593 case nir_op_ixor:
594 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
595 break;
596 case nir_op_ishl:
597 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
598 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
599 LLVMTypeOf(src[0]), "");
600 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
601 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
602 LLVMTypeOf(src[0]), "");
603 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
604 break;
605 case nir_op_ishr:
606 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
607 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
608 LLVMTypeOf(src[0]), "");
609 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
610 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
611 LLVMTypeOf(src[0]), "");
612 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
613 break;
614 case nir_op_ushr:
615 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
616 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
617 LLVMTypeOf(src[0]), "");
618 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
619 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
620 LLVMTypeOf(src[0]), "");
621 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
622 break;
623 case nir_op_ilt32:
624 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
625 break;
626 case nir_op_ine32:
627 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
628 break;
629 case nir_op_ieq32:
630 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
631 break;
632 case nir_op_ige32:
633 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
634 break;
635 case nir_op_ult32:
636 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
637 break;
638 case nir_op_uge32:
639 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
640 break;
641 case nir_op_feq32:
642 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
643 break;
644 case nir_op_fne32:
645 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
646 break;
647 case nir_op_flt32:
648 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
649 break;
650 case nir_op_fge32:
651 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
652 break;
653 case nir_op_fabs:
654 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
655 ac_to_float_type(&ctx->ac, def_type), src[0]);
656 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
657 /* fabs will be optimized by backend compiler with sign
658 * bit removed via AND.
659 */
660 result = ac_build_canonicalize(&ctx->ac, result,
661 instr->dest.dest.ssa.bit_size);
662 }
663 break;
664 case nir_op_iabs:
665 result = emit_iabs(&ctx->ac, src[0]);
666 break;
667 case nir_op_imax:
668 result = ac_build_imax(&ctx->ac, src[0], src[1]);
669 break;
670 case nir_op_imin:
671 result = ac_build_imin(&ctx->ac, src[0], src[1]);
672 break;
673 case nir_op_umax:
674 result = ac_build_umax(&ctx->ac, src[0], src[1]);
675 break;
676 case nir_op_umin:
677 result = ac_build_umin(&ctx->ac, src[0], src[1]);
678 break;
679 case nir_op_isign:
680 result = ac_build_isign(&ctx->ac, src[0],
681 instr->dest.dest.ssa.bit_size);
682 break;
683 case nir_op_fsign:
684 src[0] = ac_to_float(&ctx->ac, src[0]);
685 result = ac_build_fsign(&ctx->ac, src[0],
686 instr->dest.dest.ssa.bit_size);
687 break;
688 case nir_op_ffloor:
689 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
690 ac_to_float_type(&ctx->ac, def_type), src[0]);
691 break;
692 case nir_op_ftrunc:
693 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
694 ac_to_float_type(&ctx->ac, def_type), src[0]);
695 break;
696 case nir_op_fceil:
697 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
698 ac_to_float_type(&ctx->ac, def_type), src[0]);
699 break;
700 case nir_op_fround_even:
701 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
702 ac_to_float_type(&ctx->ac, def_type),src[0]);
703 break;
704 case nir_op_ffract:
705 src[0] = ac_to_float(&ctx->ac, src[0]);
706 result = ac_build_fract(&ctx->ac, src[0],
707 instr->dest.dest.ssa.bit_size);
708 break;
709 case nir_op_fsin:
710 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
711 ac_to_float_type(&ctx->ac, def_type), src[0]);
712 break;
713 case nir_op_fcos:
714 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
715 ac_to_float_type(&ctx->ac, def_type), src[0]);
716 break;
717 case nir_op_fsqrt:
718 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
719 ac_to_float_type(&ctx->ac, def_type), src[0]);
720 break;
721 case nir_op_fexp2:
722 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
723 ac_to_float_type(&ctx->ac, def_type), src[0]);
724 break;
725 case nir_op_flog2:
726 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
727 ac_to_float_type(&ctx->ac, def_type), src[0]);
728 break;
729 case nir_op_frsq:
730 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
731 ac_to_float_type(&ctx->ac, def_type), src[0]);
732 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
733 break;
734 case nir_op_frexp_exp:
735 src[0] = ac_to_float(&ctx->ac, src[0]);
736 result = ac_build_frexp_exp(&ctx->ac, src[0],
737 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
738 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
739 result = LLVMBuildSExt(ctx->ac.builder, result,
740 ctx->ac.i32, "");
741 break;
742 case nir_op_frexp_sig:
743 src[0] = ac_to_float(&ctx->ac, src[0]);
744 result = ac_build_frexp_mant(&ctx->ac, src[0],
745 instr->dest.dest.ssa.bit_size);
746 break;
747 case nir_op_fpow:
748 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
749 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
750 break;
751 case nir_op_fmax:
752 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
753 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
754 if (ctx->ac.chip_class < GFX9 &&
755 instr->dest.dest.ssa.bit_size == 32) {
756 /* Only pre-GFX9 chips do not flush denorms. */
757 result = ac_build_canonicalize(&ctx->ac, result,
758 instr->dest.dest.ssa.bit_size);
759 }
760 break;
761 case nir_op_fmin:
762 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
763 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
764 if (ctx->ac.chip_class < GFX9 &&
765 instr->dest.dest.ssa.bit_size == 32) {
766 /* Only pre-GFX9 chips do not flush denorms. */
767 result = ac_build_canonicalize(&ctx->ac, result,
768 instr->dest.dest.ssa.bit_size);
769 }
770 break;
771 case nir_op_ffma:
772 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
773 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
774 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
775 break;
776 case nir_op_ldexp:
777 src[0] = ac_to_float(&ctx->ac, src[0]);
778 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
779 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
780 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
781 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
782 else
783 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
784 break;
785 case nir_op_bfm:
786 result = emit_bfm(&ctx->ac, src[0], src[1]);
787 break;
788 case nir_op_bitfield_select:
789 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
790 break;
791 case nir_op_ubfe:
792 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
793 break;
794 case nir_op_ibfe:
795 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
796 break;
797 case nir_op_bitfield_reverse:
798 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
799 break;
800 case nir_op_bit_count:
801 result = ac_build_bit_count(&ctx->ac, src[0]);
802 break;
803 case nir_op_vec2:
804 case nir_op_vec3:
805 case nir_op_vec4:
806 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
807 src[i] = ac_to_integer(&ctx->ac, src[i]);
808 result = ac_build_gather_values(&ctx->ac, src, num_components);
809 break;
810 case nir_op_f2i8:
811 case nir_op_f2i16:
812 case nir_op_f2i32:
813 case nir_op_f2i64:
814 src[0] = ac_to_float(&ctx->ac, src[0]);
815 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
816 break;
817 case nir_op_f2u8:
818 case nir_op_f2u16:
819 case nir_op_f2u32:
820 case nir_op_f2u64:
821 src[0] = ac_to_float(&ctx->ac, src[0]);
822 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
823 break;
824 case nir_op_i2f16:
825 case nir_op_i2f32:
826 case nir_op_i2f64:
827 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
828 break;
829 case nir_op_u2f16:
830 case nir_op_u2f32:
831 case nir_op_u2f64:
832 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
833 break;
834 case nir_op_f2f16_rtz:
835 src[0] = ac_to_float(&ctx->ac, src[0]);
836 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
837 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
838 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
839 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
840 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
841 break;
842 case nir_op_f2f16_rtne:
843 case nir_op_f2f16:
844 case nir_op_f2f32:
845 case nir_op_f2f64:
846 src[0] = ac_to_float(&ctx->ac, src[0]);
847 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
848 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
849 else
850 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
851 break;
852 case nir_op_u2u8:
853 case nir_op_u2u16:
854 case nir_op_u2u32:
855 case nir_op_u2u64:
856 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
857 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
858 else
859 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
860 break;
861 case nir_op_i2i8:
862 case nir_op_i2i16:
863 case nir_op_i2i32:
864 case nir_op_i2i64:
865 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
866 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
867 else
868 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
869 break;
870 case nir_op_b32csel:
871 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
872 break;
873 case nir_op_find_lsb:
874 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
875 break;
876 case nir_op_ufind_msb:
877 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
878 break;
879 case nir_op_ifind_msb:
880 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
881 break;
882 case nir_op_uadd_carry:
883 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
884 break;
885 case nir_op_usub_borrow:
886 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
887 break;
888 case nir_op_b2f16:
889 case nir_op_b2f32:
890 case nir_op_b2f64:
891 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
892 break;
893 case nir_op_f2b32:
894 result = emit_f2b(&ctx->ac, src[0]);
895 break;
896 case nir_op_b2i8:
897 case nir_op_b2i16:
898 case nir_op_b2i32:
899 case nir_op_b2i64:
900 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
901 break;
902 case nir_op_i2b32:
903 result = emit_i2b(&ctx->ac, src[0]);
904 break;
905 case nir_op_fquantize2f16:
906 result = emit_f2f16(&ctx->ac, src[0]);
907 break;
908 case nir_op_umul_high:
909 result = emit_umul_high(&ctx->ac, src[0], src[1]);
910 break;
911 case nir_op_imul_high:
912 result = emit_imul_high(&ctx->ac, src[0], src[1]);
913 break;
914 case nir_op_pack_half_2x16:
915 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
916 break;
917 case nir_op_pack_snorm_2x16:
918 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
919 break;
920 case nir_op_pack_unorm_2x16:
921 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
922 break;
923 case nir_op_unpack_half_2x16:
924 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
925 break;
926 case nir_op_fddx:
927 case nir_op_fddy:
928 case nir_op_fddx_fine:
929 case nir_op_fddy_fine:
930 case nir_op_fddx_coarse:
931 case nir_op_fddy_coarse:
932 result = emit_ddxy(ctx, instr->op, src[0]);
933 break;
934
935 case nir_op_unpack_64_2x32_split_x: {
936 assert(ac_get_llvm_num_components(src[0]) == 1);
937 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
938 ctx->ac.v2i32,
939 "");
940 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
941 ctx->ac.i32_0, "");
942 break;
943 }
944
945 case nir_op_unpack_64_2x32_split_y: {
946 assert(ac_get_llvm_num_components(src[0]) == 1);
947 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
948 ctx->ac.v2i32,
949 "");
950 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
951 ctx->ac.i32_1, "");
952 break;
953 }
954
955 case nir_op_pack_64_2x32_split: {
956 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
957 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
958 break;
959 }
960
961 case nir_op_pack_32_2x16_split: {
962 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
963 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
964 break;
965 }
966
967 case nir_op_unpack_32_2x16_split_x: {
968 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
969 ctx->ac.v2i16,
970 "");
971 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
972 ctx->ac.i32_0, "");
973 break;
974 }
975
976 case nir_op_unpack_32_2x16_split_y: {
977 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
978 ctx->ac.v2i16,
979 "");
980 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
981 ctx->ac.i32_1, "");
982 break;
983 }
984
985 case nir_op_cube_face_coord: {
986 src[0] = ac_to_float(&ctx->ac, src[0]);
987 LLVMValueRef results[2];
988 LLVMValueRef in[3];
989 for (unsigned chan = 0; chan < 3; chan++)
990 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
991 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
992 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
993 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
994 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
995 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
996 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
997 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
998 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
999 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1000 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1001 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1002 result = ac_build_gather_values(&ctx->ac, results, 2);
1003 break;
1004 }
1005
1006 case nir_op_cube_face_index: {
1007 src[0] = ac_to_float(&ctx->ac, src[0]);
1008 LLVMValueRef in[3];
1009 for (unsigned chan = 0; chan < 3; chan++)
1010 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1011 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1012 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1013 break;
1014 }
1015
1016 case nir_op_fmin3:
1017 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1018 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1019 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1020 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1021 break;
1022 case nir_op_umin3:
1023 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1024 result = ac_build_umin(&ctx->ac, result, src[2]);
1025 break;
1026 case nir_op_imin3:
1027 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1028 result = ac_build_imin(&ctx->ac, result, src[2]);
1029 break;
1030 case nir_op_fmax3:
1031 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1032 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1033 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1034 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1035 break;
1036 case nir_op_umax3:
1037 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1038 result = ac_build_umax(&ctx->ac, result, src[2]);
1039 break;
1040 case nir_op_imax3:
1041 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1042 result = ac_build_imax(&ctx->ac, result, src[2]);
1043 break;
1044 case nir_op_fmed3: {
1045 src[0] = ac_to_float(&ctx->ac, src[0]);
1046 src[1] = ac_to_float(&ctx->ac, src[1]);
1047 src[2] = ac_to_float(&ctx->ac, src[2]);
1048 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1049 instr->dest.dest.ssa.bit_size);
1050 break;
1051 }
1052 case nir_op_imed3: {
1053 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1054 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1055 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1056 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1057 break;
1058 }
1059 case nir_op_umed3: {
1060 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1061 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1062 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1063 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1064 break;
1065 }
1066
1067 default:
1068 fprintf(stderr, "Unknown NIR alu instr: ");
1069 nir_print_instr(&instr->instr, stderr);
1070 fprintf(stderr, "\n");
1071 abort();
1072 }
1073
1074 if (result) {
1075 assert(instr->dest.dest.is_ssa);
1076 result = ac_to_integer_or_pointer(&ctx->ac, result);
1077 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1078 }
1079 }
1080
1081 static void visit_load_const(struct ac_nir_context *ctx,
1082 const nir_load_const_instr *instr)
1083 {
1084 LLVMValueRef values[4], value = NULL;
1085 LLVMTypeRef element_type =
1086 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1087
1088 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1089 switch (instr->def.bit_size) {
1090 case 8:
1091 values[i] = LLVMConstInt(element_type,
1092 instr->value[i].u8, false);
1093 break;
1094 case 16:
1095 values[i] = LLVMConstInt(element_type,
1096 instr->value[i].u16, false);
1097 break;
1098 case 32:
1099 values[i] = LLVMConstInt(element_type,
1100 instr->value[i].u32, false);
1101 break;
1102 case 64:
1103 values[i] = LLVMConstInt(element_type,
1104 instr->value[i].u64, false);
1105 break;
1106 default:
1107 fprintf(stderr,
1108 "unsupported nir load_const bit_size: %d\n",
1109 instr->def.bit_size);
1110 abort();
1111 }
1112 }
1113 if (instr->def.num_components > 1) {
1114 value = LLVMConstVector(values, instr->def.num_components);
1115 } else
1116 value = values[0];
1117
1118 ctx->ssa_defs[instr->def.index] = value;
1119 }
1120
1121 static LLVMValueRef
1122 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1123 {
1124 LLVMValueRef size =
1125 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1126 LLVMConstInt(ctx->ac.i32, 2, false), "");
1127
1128 /* GFX8 only */
1129 if (ctx->ac.chip_class == GFX8 && in_elements) {
1130 /* On GFX8, the descriptor contains the size in bytes,
1131 * but TXQ must return the size in elements.
1132 * The stride is always non-zero for resources using TXQ.
1133 */
1134 LLVMValueRef stride =
1135 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1136 ctx->ac.i32_1, "");
1137 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1138 LLVMConstInt(ctx->ac.i32, 16, false), "");
1139 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1140 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1141
1142 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1143 }
1144 return size;
1145 }
1146
1147 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1148 * incorrectly forces nearest filtering if the texture format is integer.
1149 * The only effect it has on Gather4, which always returns 4 texels for
1150 * bilinear filtering, is that the final coordinates are off by 0.5 of
1151 * the texel size.
1152 *
1153 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1154 * or (0.5 / size) from the normalized coordinates.
1155 *
1156 * However, cube textures with 8_8_8_8 data formats require a different
1157 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1158 * precision in 32-bit data formats, so it needs to be applied dynamically at
1159 * runtime. In this case, return an i1 value that indicates whether the
1160 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1161 */
1162 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1163 nir_variable *var,
1164 struct ac_image_args *args,
1165 const nir_tex_instr *instr)
1166 {
1167 const struct glsl_type *type = glsl_without_array(var->type);
1168 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1169 LLVMValueRef wa_8888 = NULL;
1170 LLVMValueRef half_texel[2];
1171 LLVMValueRef result;
1172
1173 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1174
1175 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1176 LLVMValueRef formats;
1177 LLVMValueRef data_format;
1178 LLVMValueRef wa_formats;
1179
1180 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1181
1182 data_format = LLVMBuildLShr(ctx->builder, formats,
1183 LLVMConstInt(ctx->i32, 20, false), "");
1184 data_format = LLVMBuildAnd(ctx->builder, data_format,
1185 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1186 wa_8888 = LLVMBuildICmp(
1187 ctx->builder, LLVMIntEQ, data_format,
1188 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1189 "");
1190
1191 uint32_t wa_num_format =
1192 stype == GLSL_TYPE_UINT ?
1193 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1194 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1195 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1196 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1197 "");
1198 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1199 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1200
1201 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1202 args->resource = LLVMBuildInsertElement(
1203 ctx->builder, args->resource, formats, ctx->i32_1, "");
1204 }
1205
1206 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1207 assert(!wa_8888);
1208 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1209 } else {
1210 struct ac_image_args resinfo = {};
1211 LLVMBasicBlockRef bbs[2];
1212
1213 LLVMValueRef unnorm = NULL;
1214 LLVMValueRef default_offset = ctx->f32_0;
1215 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1216 !instr->is_array) {
1217 /* In vulkan, whether the sampler uses unnormalized
1218 * coordinates or not is a dynamic property of the
1219 * sampler. Hence, to figure out whether or not we
1220 * need to divide by the texture size, we need to test
1221 * the sampler at runtime. This tests the bit set by
1222 * radv_init_sampler().
1223 */
1224 LLVMValueRef sampler0 =
1225 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1226 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1227 LLVMConstInt(ctx->i32, 15, false), "");
1228 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1229 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1230 default_offset = LLVMConstReal(ctx->f32, -0.5);
1231 }
1232
1233 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1234 if (wa_8888 || unnorm) {
1235 assert(!(wa_8888 && unnorm));
1236 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1237 /* Skip the texture size query entirely if we don't need it. */
1238 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1239 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1240 }
1241
1242 /* Query the texture size. */
1243 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1244 resinfo.opcode = ac_image_get_resinfo;
1245 resinfo.dmask = 0xf;
1246 resinfo.lod = ctx->i32_0;
1247 resinfo.resource = args->resource;
1248 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1249 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1250
1251 /* Compute -0.5 / size. */
1252 for (unsigned c = 0; c < 2; c++) {
1253 half_texel[c] =
1254 LLVMBuildExtractElement(ctx->builder, size,
1255 LLVMConstInt(ctx->i32, c, 0), "");
1256 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1257 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1258 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1259 LLVMConstReal(ctx->f32, -0.5), "");
1260 }
1261
1262 if (wa_8888 || unnorm) {
1263 ac_build_endif(ctx, 2000);
1264
1265 for (unsigned c = 0; c < 2; c++) {
1266 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1267 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1268 values, bbs);
1269 }
1270 }
1271 }
1272
1273 for (unsigned c = 0; c < 2; c++) {
1274 LLVMValueRef tmp;
1275 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1276 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1277 }
1278
1279 args->attributes = AC_FUNC_ATTR_READNONE;
1280 result = ac_build_image_opcode(ctx, args);
1281
1282 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1283 LLVMValueRef tmp, tmp2;
1284
1285 /* if the cube workaround is in place, f2i the result. */
1286 for (unsigned c = 0; c < 4; c++) {
1287 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1288 if (stype == GLSL_TYPE_UINT)
1289 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1290 else
1291 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1292 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1293 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1294 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1295 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1296 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1297 }
1298 }
1299 return result;
1300 }
1301
1302 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1303 {
1304 nir_deref_instr *texture_deref_instr = NULL;
1305
1306 for (unsigned i = 0; i < instr->num_srcs; i++) {
1307 switch (instr->src[i].src_type) {
1308 case nir_tex_src_texture_deref:
1309 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1310 break;
1311 default:
1312 break;
1313 }
1314 }
1315 return texture_deref_instr;
1316 }
1317
1318 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1319 const nir_tex_instr *instr,
1320 struct ac_image_args *args)
1321 {
1322 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1323 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1324
1325 return ac_build_buffer_load_format(&ctx->ac,
1326 args->resource,
1327 args->coords[0],
1328 ctx->ac.i32_0,
1329 util_last_bit(mask),
1330 0, true);
1331 }
1332
1333 args->opcode = ac_image_sample;
1334
1335 switch (instr->op) {
1336 case nir_texop_txf:
1337 case nir_texop_txf_ms:
1338 case nir_texop_samples_identical:
1339 args->opcode = args->level_zero ||
1340 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1341 ac_image_load : ac_image_load_mip;
1342 args->level_zero = false;
1343 break;
1344 case nir_texop_txs:
1345 case nir_texop_query_levels:
1346 args->opcode = ac_image_get_resinfo;
1347 if (!args->lod)
1348 args->lod = ctx->ac.i32_0;
1349 args->level_zero = false;
1350 break;
1351 case nir_texop_tex:
1352 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1353 assert(!args->lod);
1354 args->level_zero = true;
1355 }
1356 break;
1357 case nir_texop_tg4:
1358 args->opcode = ac_image_gather4;
1359 args->level_zero = true;
1360 break;
1361 case nir_texop_lod:
1362 args->opcode = ac_image_get_lod;
1363 break;
1364 default:
1365 break;
1366 }
1367
1368 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1369 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1370 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1371 const struct glsl_type *type = glsl_without_array(var->type);
1372 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1373 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1374 return lower_gather4_integer(&ctx->ac, var, args, instr);
1375 }
1376 }
1377
1378 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1379 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1380 if ((args->dim == ac_image_2darray ||
1381 args->dim == ac_image_2d) && !args->coords[1]) {
1382 args->coords[1] = ctx->ac.i32_0;
1383 }
1384 }
1385
1386 args->attributes = AC_FUNC_ATTR_READNONE;
1387 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1388 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1389 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1390 /* Prevent texture instructions with implicit derivatives from being
1391 * sinked into branches. */
1392 switch (instr->op) {
1393 case nir_texop_tex:
1394 case nir_texop_txb:
1395 case nir_texop_lod:
1396 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1397 break;
1398 default:
1399 break;
1400 }
1401 }
1402
1403 return ac_build_image_opcode(&ctx->ac, args);
1404 }
1405
1406 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1407 nir_intrinsic_instr *instr)
1408 {
1409 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1410 LLVMValueRef index = get_src(ctx, instr->src[1]);
1411
1412 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1413 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1414 return result;
1415 }
1416
1417 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1418 nir_intrinsic_instr *instr)
1419 {
1420 LLVMValueRef ptr, addr;
1421 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1422 unsigned index = nir_intrinsic_base(instr);
1423
1424 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1425 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1426
1427 /* Load constant values from user SGPRS when possible, otherwise
1428 * fallback to the default path that loads directly from memory.
1429 */
1430 if (LLVMIsConstant(src0) &&
1431 instr->dest.ssa.bit_size == 32) {
1432 unsigned count = instr->dest.ssa.num_components;
1433 unsigned offset = index;
1434
1435 offset += LLVMConstIntGetZExtValue(src0);
1436 offset /= 4;
1437
1438 offset -= ctx->abi->base_inline_push_consts;
1439
1440 if (offset + count <= ctx->abi->num_inline_push_consts) {
1441 return ac_build_gather_values(&ctx->ac,
1442 ctx->abi->inline_push_consts + offset,
1443 count);
1444 }
1445 }
1446
1447 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1448
1449 if (instr->dest.ssa.bit_size == 8) {
1450 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1451 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1452 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1453 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1454
1455 LLVMValueRef params[3];
1456 if (load_dwords > 1) {
1457 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1458 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1459 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1460 } else {
1461 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1462 params[0] = ctx->ac.i32_0;
1463 params[1] = res;
1464 }
1465 params[2] = addr;
1466 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1467
1468 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1469 if (instr->dest.ssa.num_components > 1)
1470 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1471 return res;
1472 } else if (instr->dest.ssa.bit_size == 16) {
1473 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1474 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1475 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1476 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1477 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1478 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1479 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1480 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1481 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1482 LLVMConstInt(ctx->ac.i32, 4, false)};
1483 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1484 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1485 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1486 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1487 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1488 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1489 }
1490
1491 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1492
1493 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1494 }
1495
1496 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1497 const nir_intrinsic_instr *instr)
1498 {
1499 LLVMValueRef index = get_src(ctx, instr->src[0]);
1500
1501 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1502 }
1503
1504 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1505 {
1506 uint32_t new_mask = 0;
1507 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1508 if (mask & (1u << i))
1509 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1510 return new_mask;
1511 }
1512
1513 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1514 unsigned start, unsigned count)
1515 {
1516 LLVMValueRef mask[] = {
1517 ctx->i32_0, ctx->i32_1,
1518 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1519
1520 unsigned src_elements = ac_get_llvm_num_components(src);
1521
1522 if (count == src_elements) {
1523 assert(start == 0);
1524 return src;
1525 } else if (count == 1) {
1526 assert(start < src_elements);
1527 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1528 } else {
1529 assert(start + count <= src_elements);
1530 assert(count <= 4);
1531 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1532 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1533 }
1534 }
1535
1536 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1537 enum gl_access_qualifier access,
1538 bool may_store_unaligned,
1539 bool writeonly_memory)
1540 {
1541 unsigned cache_policy = 0;
1542
1543 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1544 * store opcodes not aligned to a dword are affected. The only way to
1545 * get unaligned stores is through shader images.
1546 */
1547 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1548 /* If this is write-only, don't keep data in L1 to prevent
1549 * evicting L1 cache lines that may be needed by other
1550 * instructions.
1551 */
1552 writeonly_memory ||
1553 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1554 cache_policy |= ac_glc;
1555 }
1556
1557 if (access & ACCESS_STREAM_CACHE_POLICY)
1558 cache_policy |= ac_slc;
1559
1560 return cache_policy;
1561 }
1562
1563 static void visit_store_ssbo(struct ac_nir_context *ctx,
1564 nir_intrinsic_instr *instr)
1565 {
1566 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1567 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1568 unsigned writemask = nir_intrinsic_write_mask(instr);
1569 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1570 bool writeonly_memory = access & ACCESS_NON_READABLE;
1571 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1572
1573 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1574 get_src(ctx, instr->src[1]), true);
1575 LLVMValueRef base_data = src_data;
1576 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1577 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1578
1579 while (writemask) {
1580 int start, count;
1581 LLVMValueRef data, offset;
1582 LLVMTypeRef data_type;
1583
1584 u_bit_scan_consecutive_range(&writemask, &start, &count);
1585
1586 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1587 * writes into a 2-element and a 1-element write. */
1588 if (count == 3 &&
1589 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1590 writemask |= 1 << (start + 2);
1591 count = 2;
1592 }
1593 int num_bytes = count * elem_size_bytes; /* count in bytes */
1594
1595 /* we can only store 4 DWords at the same time.
1596 * can only happen for 64 Bit vectors. */
1597 if (num_bytes > 16) {
1598 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1599 count = 2;
1600 num_bytes = 16;
1601 }
1602
1603 /* check alignment of 16 Bit stores */
1604 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1605 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1606 count = 1;
1607 num_bytes = 2;
1608 }
1609 data = extract_vector_range(&ctx->ac, base_data, start, count);
1610
1611 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1612 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1613
1614 if (num_bytes == 1) {
1615 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1616 offset, ctx->ac.i32_0,
1617 cache_policy);
1618 } else if (num_bytes == 2) {
1619 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1620 offset, ctx->ac.i32_0,
1621 cache_policy);
1622 } else {
1623 int num_channels = num_bytes / 4;
1624
1625 switch (num_bytes) {
1626 case 16: /* v4f32 */
1627 data_type = ctx->ac.v4f32;
1628 break;
1629 case 12: /* v3f32 */
1630 data_type = ctx->ac.v3f32;
1631 break;
1632 case 8: /* v2f32 */
1633 data_type = ctx->ac.v2f32;
1634 break;
1635 case 4: /* f32 */
1636 data_type = ctx->ac.f32;
1637 break;
1638 default:
1639 unreachable("Malformed vector store.");
1640 }
1641 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1642
1643 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1644 num_channels, offset,
1645 ctx->ac.i32_0, 0,
1646 cache_policy, false);
1647 }
1648 }
1649 }
1650
1651 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1652 LLVMValueRef descriptor,
1653 LLVMValueRef offset,
1654 LLVMValueRef compare,
1655 LLVMValueRef exchange)
1656 {
1657 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1658 if (ctx->abi->robust_buffer_access) {
1659 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1660
1661 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1662 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1663
1664 ac_build_ifcc(&ctx->ac, cond, -1);
1665
1666 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1667 }
1668
1669 LLVMValueRef ptr_parts[2] = {
1670 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1671 LLVMBuildAnd(ctx->ac.builder,
1672 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1673 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1674 };
1675
1676 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1677 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1678
1679 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1680
1681 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1682 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1683 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1684 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1685
1686 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1687 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1688
1689 if (ctx->abi->robust_buffer_access) {
1690 ac_build_endif(&ctx->ac, -1);
1691
1692 LLVMBasicBlockRef incoming_blocks[2] = {
1693 start_block,
1694 then_block,
1695 };
1696
1697 LLVMValueRef incoming_values[2] = {
1698 LLVMConstInt(ctx->ac.i64, 0, 0),
1699 result,
1700 };
1701 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1702 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1703 return ret;
1704 } else {
1705 return result;
1706 }
1707 }
1708
1709 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1710 const nir_intrinsic_instr *instr)
1711 {
1712 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1713 const char *op;
1714 char name[64], type[8];
1715 LLVMValueRef params[6], descriptor;
1716 int arg_count = 0;
1717
1718 switch (instr->intrinsic) {
1719 case nir_intrinsic_ssbo_atomic_add:
1720 op = "add";
1721 break;
1722 case nir_intrinsic_ssbo_atomic_imin:
1723 op = "smin";
1724 break;
1725 case nir_intrinsic_ssbo_atomic_umin:
1726 op = "umin";
1727 break;
1728 case nir_intrinsic_ssbo_atomic_imax:
1729 op = "smax";
1730 break;
1731 case nir_intrinsic_ssbo_atomic_umax:
1732 op = "umax";
1733 break;
1734 case nir_intrinsic_ssbo_atomic_and:
1735 op = "and";
1736 break;
1737 case nir_intrinsic_ssbo_atomic_or:
1738 op = "or";
1739 break;
1740 case nir_intrinsic_ssbo_atomic_xor:
1741 op = "xor";
1742 break;
1743 case nir_intrinsic_ssbo_atomic_exchange:
1744 op = "swap";
1745 break;
1746 case nir_intrinsic_ssbo_atomic_comp_swap:
1747 op = "cmpswap";
1748 break;
1749 default:
1750 abort();
1751 }
1752
1753 descriptor = ctx->abi->load_ssbo(ctx->abi,
1754 get_src(ctx, instr->src[0]),
1755 true);
1756
1757 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1758 return_type == ctx->ac.i64) {
1759 return emit_ssbo_comp_swap_64(ctx, descriptor,
1760 get_src(ctx, instr->src[1]),
1761 get_src(ctx, instr->src[2]),
1762 get_src(ctx, instr->src[3]));
1763 }
1764 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1765 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1766 }
1767 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1768 params[arg_count++] = descriptor;
1769
1770 if (LLVM_VERSION_MAJOR >= 9) {
1771 /* XXX: The new raw/struct atomic intrinsics are buggy with
1772 * LLVM 8, see r358579.
1773 */
1774 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1775 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1776 params[arg_count++] = ctx->ac.i32_0; /* slc */
1777
1778 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1779 snprintf(name, sizeof(name),
1780 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1781 } else {
1782 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1783 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1784 params[arg_count++] = ctx->ac.i1false; /* slc */
1785
1786 assert(return_type == ctx->ac.i32);
1787 snprintf(name, sizeof(name),
1788 "llvm.amdgcn.buffer.atomic.%s", op);
1789 }
1790
1791 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1792 arg_count, 0);
1793 }
1794
1795 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1796 const nir_intrinsic_instr *instr)
1797 {
1798 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1799 int num_components = instr->num_components;
1800 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1801 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1802
1803 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1804 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1805 get_src(ctx, instr->src[0]), false);
1806 LLVMValueRef vindex = ctx->ac.i32_0;
1807
1808 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1809 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1810
1811 LLVMValueRef results[4];
1812 for (int i = 0; i < num_components;) {
1813 int num_elems = num_components - i;
1814 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1815 num_elems = 1;
1816 if (num_elems * elem_size_bytes > 16)
1817 num_elems = 16 / elem_size_bytes;
1818 int load_bytes = num_elems * elem_size_bytes;
1819
1820 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1821
1822 LLVMValueRef ret;
1823
1824 if (load_bytes == 1) {
1825 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1826 rsrc,
1827 offset,
1828 ctx->ac.i32_0,
1829 immoffset,
1830 cache_policy);
1831 } else if (load_bytes == 2) {
1832 ret = ac_build_tbuffer_load_short(&ctx->ac,
1833 rsrc,
1834 offset,
1835 ctx->ac.i32_0,
1836 immoffset,
1837 cache_policy);
1838 } else {
1839 int num_channels = util_next_power_of_two(load_bytes) / 4;
1840 bool can_speculate = access & ACCESS_CAN_REORDER;
1841
1842 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1843 vindex, offset, immoffset, 0,
1844 cache_policy, can_speculate, false);
1845 }
1846
1847 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1848 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1849 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1850
1851 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1852 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1853
1854 for (unsigned j = 0; j < num_elems; j++) {
1855 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1856 }
1857 i += num_elems;
1858 }
1859
1860 return ac_build_gather_values(&ctx->ac, results, num_components);
1861 }
1862
1863 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1864 const nir_intrinsic_instr *instr)
1865 {
1866 LLVMValueRef ret;
1867 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1868 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1869 int num_components = instr->num_components;
1870
1871 if (ctx->abi->load_ubo)
1872 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1873
1874 if (instr->dest.ssa.bit_size == 64)
1875 num_components *= 2;
1876
1877 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1878 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1879 LLVMValueRef results[num_components];
1880 for (unsigned i = 0; i < num_components; ++i) {
1881 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1882 load_bytes * i, 0);
1883
1884 if (load_bytes == 1) {
1885 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1886 rsrc,
1887 offset,
1888 ctx->ac.i32_0,
1889 immoffset,
1890 0);
1891 } else {
1892 assert(load_bytes == 2);
1893 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1894 rsrc,
1895 offset,
1896 ctx->ac.i32_0,
1897 immoffset,
1898 0);
1899 }
1900 }
1901 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1902 } else {
1903 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1904 NULL, 0, 0, true, true);
1905
1906 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1907 }
1908
1909 return LLVMBuildBitCast(ctx->ac.builder, ret,
1910 get_def_type(ctx, &instr->dest.ssa), "");
1911 }
1912
1913 static void
1914 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1915 bool vs_in, unsigned *vertex_index_out,
1916 LLVMValueRef *vertex_index_ref,
1917 unsigned *const_out, LLVMValueRef *indir_out)
1918 {
1919 nir_variable *var = nir_deref_instr_get_variable(instr);
1920 nir_deref_path path;
1921 unsigned idx_lvl = 1;
1922
1923 nir_deref_path_init(&path, instr, NULL);
1924
1925 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1926 if (vertex_index_ref) {
1927 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1928 if (vertex_index_out)
1929 *vertex_index_out = 0;
1930 } else {
1931 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1932 }
1933 ++idx_lvl;
1934 }
1935
1936 uint32_t const_offset = 0;
1937 LLVMValueRef offset = NULL;
1938
1939 if (var->data.compact) {
1940 assert(instr->deref_type == nir_deref_type_array);
1941 const_offset = nir_src_as_uint(instr->arr.index);
1942 goto out;
1943 }
1944
1945 for (; path.path[idx_lvl]; ++idx_lvl) {
1946 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1947 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1948 unsigned index = path.path[idx_lvl]->strct.index;
1949
1950 for (unsigned i = 0; i < index; i++) {
1951 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1952 const_offset += glsl_count_attribute_slots(ft, vs_in);
1953 }
1954 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1955 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1956 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
1957 const_offset += size *
1958 nir_src_as_uint(path.path[idx_lvl]->arr.index);
1959 } else {
1960 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1961 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1962 if (offset)
1963 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1964 else
1965 offset = array_off;
1966 }
1967 } else
1968 unreachable("Uhandled deref type in get_deref_instr_offset");
1969 }
1970
1971 out:
1972 nir_deref_path_finish(&path);
1973
1974 if (const_offset && offset)
1975 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1976 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1977 "");
1978
1979 *const_out = const_offset;
1980 *indir_out = offset;
1981 }
1982
1983 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1984 nir_intrinsic_instr *instr,
1985 bool load_inputs)
1986 {
1987 LLVMValueRef result;
1988 LLVMValueRef vertex_index = NULL;
1989 LLVMValueRef indir_index = NULL;
1990 unsigned const_index = 0;
1991
1992 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1993
1994 unsigned location = var->data.location;
1995 unsigned driver_location = var->data.driver_location;
1996 const bool is_patch = var->data.patch;
1997 const bool is_compact = var->data.compact;
1998
1999 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2000 false, NULL, is_patch ? NULL : &vertex_index,
2001 &const_index, &indir_index);
2002
2003 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2004
2005 LLVMTypeRef src_component_type;
2006 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2007 src_component_type = LLVMGetElementType(dest_type);
2008 else
2009 src_component_type = dest_type;
2010
2011 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2012 vertex_index, indir_index,
2013 const_index, location, driver_location,
2014 var->data.location_frac,
2015 instr->num_components,
2016 is_patch, is_compact, load_inputs);
2017 if (instr->dest.ssa.bit_size == 16) {
2018 result = ac_to_integer(&ctx->ac, result);
2019 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2020 }
2021 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2022 }
2023
2024 static unsigned
2025 type_scalar_size_bytes(const struct glsl_type *type)
2026 {
2027 assert(glsl_type_is_vector_or_scalar(type) ||
2028 glsl_type_is_matrix(type));
2029 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2030 }
2031
2032 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2033 nir_intrinsic_instr *instr)
2034 {
2035 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2036 nir_variable *var = nir_deref_instr_get_variable(deref);
2037
2038 LLVMValueRef values[8];
2039 int idx = 0;
2040 int ve = instr->dest.ssa.num_components;
2041 unsigned comp = 0;
2042 LLVMValueRef indir_index;
2043 LLVMValueRef ret;
2044 unsigned const_index;
2045 unsigned stride = 4;
2046 int mode = deref->mode;
2047
2048 if (var) {
2049 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2050 var->data.mode == nir_var_shader_in;
2051 idx = var->data.driver_location;
2052 comp = var->data.location_frac;
2053 mode = var->data.mode;
2054
2055 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2056 &const_index, &indir_index);
2057
2058 if (var->data.compact) {
2059 stride = 1;
2060 const_index += comp;
2061 comp = 0;
2062 }
2063 }
2064
2065 if (instr->dest.ssa.bit_size == 64 &&
2066 (deref->mode == nir_var_shader_in ||
2067 deref->mode == nir_var_shader_out ||
2068 deref->mode == nir_var_function_temp))
2069 ve *= 2;
2070
2071 switch (mode) {
2072 case nir_var_shader_in:
2073 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2074 ctx->stage == MESA_SHADER_TESS_EVAL) {
2075 return load_tess_varyings(ctx, instr, true);
2076 }
2077
2078 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2079 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2080 LLVMValueRef indir_index;
2081 unsigned const_index, vertex_index;
2082 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2083 &const_index, &indir_index);
2084 assert(indir_index == NULL);
2085
2086 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2087 var->data.driver_location,
2088 var->data.location_frac,
2089 instr->num_components, vertex_index, const_index, type);
2090 }
2091
2092 for (unsigned chan = comp; chan < ve + comp; chan++) {
2093 if (indir_index) {
2094 unsigned count = glsl_count_attribute_slots(
2095 var->type,
2096 ctx->stage == MESA_SHADER_VERTEX);
2097 count -= chan / 4;
2098 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2099 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2100 stride, false, true);
2101
2102 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2103 tmp_vec,
2104 indir_index, "");
2105 } else
2106 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2107 }
2108 break;
2109 case nir_var_function_temp:
2110 for (unsigned chan = 0; chan < ve; chan++) {
2111 if (indir_index) {
2112 unsigned count = glsl_count_attribute_slots(
2113 var->type, false);
2114 count -= chan / 4;
2115 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2116 &ctx->ac, ctx->locals + idx + chan, count,
2117 stride, true, true);
2118
2119 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2120 tmp_vec,
2121 indir_index, "");
2122 } else {
2123 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2124 }
2125 }
2126 break;
2127 case nir_var_mem_shared: {
2128 LLVMValueRef address = get_src(ctx, instr->src[0]);
2129 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2130 return LLVMBuildBitCast(ctx->ac.builder, val,
2131 get_def_type(ctx, &instr->dest.ssa),
2132 "");
2133 }
2134 case nir_var_shader_out:
2135 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2136 return load_tess_varyings(ctx, instr, false);
2137 }
2138
2139 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2140 var->data.fb_fetch_output &&
2141 ctx->abi->emit_fbfetch)
2142 return ctx->abi->emit_fbfetch(ctx->abi);
2143
2144 for (unsigned chan = comp; chan < ve + comp; chan++) {
2145 if (indir_index) {
2146 unsigned count = glsl_count_attribute_slots(
2147 var->type, false);
2148 count -= chan / 4;
2149 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2150 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2151 stride, true, true);
2152
2153 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2154 tmp_vec,
2155 indir_index, "");
2156 } else {
2157 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2158 ctx->abi->outputs[idx + chan + const_index * stride],
2159 "");
2160 }
2161 }
2162 break;
2163 case nir_var_mem_global: {
2164 LLVMValueRef address = get_src(ctx, instr->src[0]);
2165 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2166 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2167 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2168
2169 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2170 if (stride != natural_stride) {
2171 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2172 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2173 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2174
2175 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2176 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2177 values[i] = LLVMBuildLoad(ctx->ac.builder,
2178 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2179 }
2180 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2181 } else {
2182 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2183 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2184 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2185 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2186 return val;
2187 }
2188 }
2189 default:
2190 unreachable("unhandle variable mode");
2191 }
2192 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2193 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2194 }
2195
2196 static void
2197 visit_store_var(struct ac_nir_context *ctx,
2198 nir_intrinsic_instr *instr)
2199 {
2200 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2201 nir_variable *var = nir_deref_instr_get_variable(deref);
2202
2203 LLVMValueRef temp_ptr, value;
2204 int idx = 0;
2205 unsigned comp = 0;
2206 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2207 int writemask = instr->const_index[0];
2208 LLVMValueRef indir_index;
2209 unsigned const_index;
2210
2211 if (var) {
2212 get_deref_offset(ctx, deref, false,
2213 NULL, NULL, &const_index, &indir_index);
2214 idx = var->data.driver_location;
2215 comp = var->data.location_frac;
2216
2217 if (var->data.compact) {
2218 const_index += comp;
2219 comp = 0;
2220 }
2221 }
2222
2223 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2224 (deref->mode == nir_var_shader_out ||
2225 deref->mode == nir_var_function_temp)) {
2226
2227 src = LLVMBuildBitCast(ctx->ac.builder, src,
2228 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2229 "");
2230
2231 writemask = widen_mask(writemask, 2);
2232 }
2233
2234 writemask = writemask << comp;
2235
2236 switch (deref->mode) {
2237 case nir_var_shader_out:
2238
2239 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2240 LLVMValueRef vertex_index = NULL;
2241 LLVMValueRef indir_index = NULL;
2242 unsigned const_index = 0;
2243 const bool is_patch = var->data.patch;
2244
2245 get_deref_offset(ctx, deref, false, NULL,
2246 is_patch ? NULL : &vertex_index,
2247 &const_index, &indir_index);
2248
2249 ctx->abi->store_tcs_outputs(ctx->abi, var,
2250 vertex_index, indir_index,
2251 const_index, src, writemask);
2252 return;
2253 }
2254
2255 for (unsigned chan = 0; chan < 8; chan++) {
2256 int stride = 4;
2257 if (!(writemask & (1 << chan)))
2258 continue;
2259
2260 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2261
2262 if (var->data.compact)
2263 stride = 1;
2264 if (indir_index) {
2265 unsigned count = glsl_count_attribute_slots(
2266 var->type, false);
2267 count -= chan / 4;
2268 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2269 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2270 stride, true, true);
2271
2272 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2273 value, indir_index, "");
2274 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2275 count, stride, tmp_vec);
2276
2277 } else {
2278 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2279
2280 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2281 }
2282 }
2283 break;
2284 case nir_var_function_temp:
2285 for (unsigned chan = 0; chan < 8; chan++) {
2286 if (!(writemask & (1 << chan)))
2287 continue;
2288
2289 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2290 if (indir_index) {
2291 unsigned count = glsl_count_attribute_slots(
2292 var->type, false);
2293 count -= chan / 4;
2294 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2295 &ctx->ac, ctx->locals + idx + chan, count,
2296 4, true, true);
2297
2298 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2299 value, indir_index, "");
2300 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2301 count, 4, tmp_vec);
2302 } else {
2303 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2304
2305 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2306 }
2307 }
2308 break;
2309
2310 case nir_var_mem_global:
2311 case nir_var_mem_shared: {
2312 int writemask = instr->const_index[0];
2313 LLVMValueRef address = get_src(ctx, instr->src[0]);
2314 LLVMValueRef val = get_src(ctx, instr->src[1]);
2315
2316 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2317 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2318 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2319
2320 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2321 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2322 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2323
2324 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2325 stride == natural_stride) {
2326 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2327 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2328 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2329
2330 val = LLVMBuildBitCast(ctx->ac.builder, val,
2331 LLVMGetElementType(LLVMTypeOf(address)), "");
2332 LLVMBuildStore(ctx->ac.builder, val, address);
2333 } else {
2334 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2335 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2336 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2337 for (unsigned chan = 0; chan < 4; chan++) {
2338 if (!(writemask & (1 << chan)))
2339 continue;
2340
2341 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2342
2343 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2344 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2345 chan);
2346 src = LLVMBuildBitCast(ctx->ac.builder, src,
2347 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2348 LLVMBuildStore(ctx->ac.builder, src, ptr);
2349 }
2350 }
2351 break;
2352 }
2353 default:
2354 abort();
2355 break;
2356 }
2357 }
2358
2359 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2360 {
2361 switch (dim) {
2362 case GLSL_SAMPLER_DIM_BUF:
2363 return 1;
2364 case GLSL_SAMPLER_DIM_1D:
2365 return array ? 2 : 1;
2366 case GLSL_SAMPLER_DIM_2D:
2367 return array ? 3 : 2;
2368 case GLSL_SAMPLER_DIM_MS:
2369 return array ? 4 : 3;
2370 case GLSL_SAMPLER_DIM_3D:
2371 case GLSL_SAMPLER_DIM_CUBE:
2372 return 3;
2373 case GLSL_SAMPLER_DIM_RECT:
2374 case GLSL_SAMPLER_DIM_SUBPASS:
2375 return 2;
2376 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2377 return 3;
2378 default:
2379 break;
2380 }
2381 return 0;
2382 }
2383
2384 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2385 LLVMValueRef coord_x, LLVMValueRef coord_y,
2386 LLVMValueRef coord_z,
2387 LLVMValueRef sample_index,
2388 LLVMValueRef fmask_desc_ptr)
2389 {
2390 unsigned sample_chan = coord_z ? 3 : 2;
2391 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2392 addr[sample_chan] = sample_index;
2393
2394 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2395 return addr[sample_chan];
2396 }
2397
2398 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2399 {
2400 assert(instr->src[0].is_ssa);
2401 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2402 }
2403
2404 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2405 const nir_intrinsic_instr *instr,
2406 enum ac_descriptor_type desc_type,
2407 bool write)
2408 {
2409 nir_deref_instr *deref_instr =
2410 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2411 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2412
2413 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2414 }
2415
2416 static void get_image_coords(struct ac_nir_context *ctx,
2417 const nir_intrinsic_instr *instr,
2418 struct ac_image_args *args,
2419 enum glsl_sampler_dim dim,
2420 bool is_array)
2421 {
2422 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2423 LLVMValueRef masks[] = {
2424 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2425 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2426 };
2427 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2428
2429 int count;
2430 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2431 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2432 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2433 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2434 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2435 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2436 count = image_type_to_components_count(dim, is_array);
2437
2438 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2439 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2440 LLVMValueRef fmask_load_address[3];
2441
2442 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2443 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2444 if (is_array)
2445 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2446 else
2447 fmask_load_address[2] = NULL;
2448
2449 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2450 fmask_load_address[0],
2451 fmask_load_address[1],
2452 fmask_load_address[2],
2453 sample_index,
2454 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2455 AC_DESC_FMASK, &instr->instr, true, false));
2456 }
2457 if (count == 1 && !gfx9_1d) {
2458 if (instr->src[1].ssa->num_components)
2459 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2460 else
2461 args->coords[0] = src0;
2462 } else {
2463 int chan;
2464 if (is_ms)
2465 count--;
2466 for (chan = 0; chan < count; ++chan) {
2467 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2468 }
2469
2470 if (gfx9_1d) {
2471 if (is_array) {
2472 args->coords[2] = args->coords[1];
2473 args->coords[1] = ctx->ac.i32_0;
2474 } else
2475 args->coords[1] = ctx->ac.i32_0;
2476 count++;
2477 }
2478 if (ctx->ac.chip_class == GFX9 &&
2479 dim == GLSL_SAMPLER_DIM_2D &&
2480 !is_array) {
2481 /* The hw can't bind a slice of a 3D image as a 2D
2482 * image, because it ignores BASE_ARRAY if the target
2483 * is 3D. The workaround is to read BASE_ARRAY and set
2484 * it as the 3rd address operand for all 2D images.
2485 */
2486 LLVMValueRef first_layer, const5, mask;
2487
2488 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2489 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2490 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2491 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2492
2493 args->coords[count] = first_layer;
2494 count++;
2495 }
2496
2497
2498 if (is_ms) {
2499 args->coords[count] = sample_index;
2500 count++;
2501 }
2502 }
2503 }
2504
2505 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2506 const nir_intrinsic_instr *instr,
2507 bool write, bool atomic)
2508 {
2509 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2510 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2511 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2512 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2513 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2514
2515 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2516 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2517 elem_count, stride, "");
2518
2519 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2520 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2521 }
2522 return rsrc;
2523 }
2524
2525 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2526 const nir_intrinsic_instr *instr,
2527 bool bindless)
2528 {
2529 LLVMValueRef res;
2530
2531 enum glsl_sampler_dim dim;
2532 enum gl_access_qualifier access;
2533 bool is_array;
2534 if (bindless) {
2535 dim = nir_intrinsic_image_dim(instr);
2536 access = nir_intrinsic_access(instr);
2537 is_array = nir_intrinsic_image_array(instr);
2538 } else {
2539 const nir_deref_instr *image_deref = get_image_deref(instr);
2540 const struct glsl_type *type = image_deref->type;
2541 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2542 dim = glsl_get_sampler_dim(type);
2543 access = var->data.access;
2544 is_array = glsl_sampler_type_is_array(type);
2545 }
2546
2547 struct ac_image_args args = {};
2548
2549 args.cache_policy = get_cache_policy(ctx, access, false, false);
2550
2551 if (dim == GLSL_SAMPLER_DIM_BUF) {
2552 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2553 unsigned num_channels = util_last_bit(mask);
2554 LLVMValueRef rsrc, vindex;
2555
2556 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2557 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2558 ctx->ac.i32_0, "");
2559
2560 bool can_speculate = access & ACCESS_CAN_REORDER;
2561 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2562 ctx->ac.i32_0, num_channels,
2563 args.cache_policy,
2564 can_speculate);
2565 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2566
2567 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2568 res = ac_to_integer(&ctx->ac, res);
2569 } else {
2570 args.opcode = ac_image_load;
2571 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2572 get_image_coords(ctx, instr, &args, dim, is_array);
2573 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2574 args.dmask = 15;
2575 args.attributes = AC_FUNC_ATTR_READONLY;
2576
2577 res = ac_build_image_opcode(&ctx->ac, &args);
2578 }
2579 return res;
2580 }
2581
2582 static void visit_image_store(struct ac_nir_context *ctx,
2583 nir_intrinsic_instr *instr,
2584 bool bindless)
2585 {
2586
2587
2588 enum glsl_sampler_dim dim;
2589 enum gl_access_qualifier access;
2590 bool is_array;
2591 if (bindless) {
2592 dim = nir_intrinsic_image_dim(instr);
2593 access = nir_intrinsic_access(instr);
2594 is_array = nir_intrinsic_image_array(instr);
2595 } else {
2596 const nir_deref_instr *image_deref = get_image_deref(instr);
2597 const struct glsl_type *type = image_deref->type;
2598 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2599 dim = glsl_get_sampler_dim(type);
2600 access = var->data.access;
2601 is_array = glsl_sampler_type_is_array(type);
2602 }
2603
2604 bool writeonly_memory = access & ACCESS_NON_READABLE;
2605 struct ac_image_args args = {};
2606
2607 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2608
2609 if (dim == GLSL_SAMPLER_DIM_BUF) {
2610 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2611 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2612 unsigned src_channels = ac_get_llvm_num_components(src);
2613 LLVMValueRef vindex;
2614
2615 if (src_channels == 3)
2616 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2617
2618 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2619 get_src(ctx, instr->src[1]),
2620 ctx->ac.i32_0, "");
2621
2622 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2623 ctx->ac.i32_0, src_channels,
2624 args.cache_policy);
2625 } else {
2626 args.opcode = ac_image_store;
2627 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2628 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2629 get_image_coords(ctx, instr, &args, dim, is_array);
2630 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2631 args.dmask = 15;
2632
2633 ac_build_image_opcode(&ctx->ac, &args);
2634 }
2635
2636 }
2637
2638 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2639 const nir_intrinsic_instr *instr,
2640 bool bindless)
2641 {
2642 LLVMValueRef params[7];
2643 int param_count = 0;
2644
2645 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2646 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2647 const char *atomic_name;
2648 char intrinsic_name[64];
2649 enum ac_atomic_op atomic_subop;
2650 ASSERTED int length;
2651
2652 enum glsl_sampler_dim dim;
2653 bool is_array;
2654 if (bindless) {
2655 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2656 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2657 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2658 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2659 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2660 assert(format == GL_R32UI || format == GL_R32I);
2661 }
2662 dim = nir_intrinsic_image_dim(instr);
2663 is_array = nir_intrinsic_image_array(instr);
2664 } else {
2665 const struct glsl_type *type = get_image_deref(instr)->type;
2666 dim = glsl_get_sampler_dim(type);
2667 is_array = glsl_sampler_type_is_array(type);
2668 }
2669
2670 switch (instr->intrinsic) {
2671 case nir_intrinsic_bindless_image_atomic_add:
2672 case nir_intrinsic_image_deref_atomic_add:
2673 atomic_name = "add";
2674 atomic_subop = ac_atomic_add;
2675 break;
2676 case nir_intrinsic_bindless_image_atomic_imin:
2677 case nir_intrinsic_image_deref_atomic_imin:
2678 atomic_name = "smin";
2679 atomic_subop = ac_atomic_smin;
2680 break;
2681 case nir_intrinsic_bindless_image_atomic_umin:
2682 case nir_intrinsic_image_deref_atomic_umin:
2683 atomic_name = "umin";
2684 atomic_subop = ac_atomic_umin;
2685 break;
2686 case nir_intrinsic_bindless_image_atomic_imax:
2687 case nir_intrinsic_image_deref_atomic_imax:
2688 atomic_name = "smax";
2689 atomic_subop = ac_atomic_smax;
2690 break;
2691 case nir_intrinsic_bindless_image_atomic_umax:
2692 case nir_intrinsic_image_deref_atomic_umax:
2693 atomic_name = "umax";
2694 atomic_subop = ac_atomic_umax;
2695 break;
2696 case nir_intrinsic_bindless_image_atomic_and:
2697 case nir_intrinsic_image_deref_atomic_and:
2698 atomic_name = "and";
2699 atomic_subop = ac_atomic_and;
2700 break;
2701 case nir_intrinsic_bindless_image_atomic_or:
2702 case nir_intrinsic_image_deref_atomic_or:
2703 atomic_name = "or";
2704 atomic_subop = ac_atomic_or;
2705 break;
2706 case nir_intrinsic_bindless_image_atomic_xor:
2707 case nir_intrinsic_image_deref_atomic_xor:
2708 atomic_name = "xor";
2709 atomic_subop = ac_atomic_xor;
2710 break;
2711 case nir_intrinsic_bindless_image_atomic_exchange:
2712 case nir_intrinsic_image_deref_atomic_exchange:
2713 atomic_name = "swap";
2714 atomic_subop = ac_atomic_swap;
2715 break;
2716 case nir_intrinsic_bindless_image_atomic_comp_swap:
2717 case nir_intrinsic_image_deref_atomic_comp_swap:
2718 atomic_name = "cmpswap";
2719 atomic_subop = 0; /* not used */
2720 break;
2721 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2722 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2723 atomic_name = "inc";
2724 atomic_subop = ac_atomic_inc_wrap;
2725 /* ATOMIC_INC instruction does:
2726 * value = (value + 1) % (data + 1)
2727 * but we want:
2728 * value = (value + 1) % data
2729 * So replace 'data' by 'data - 1'.
2730 */
2731 ctx->ssa_defs[instr->src[3].ssa->index] =
2732 LLVMBuildSub(ctx->ac.builder,
2733 ctx->ssa_defs[instr->src[3].ssa->index],
2734 ctx->ac.i32_1, "");
2735 break;
2736 }
2737 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2738 case nir_intrinsic_image_deref_atomic_dec_wrap:
2739 atomic_name = "dec";
2740 atomic_subop = ac_atomic_dec_wrap;
2741 break;
2742 default:
2743 abort();
2744 }
2745
2746 if (cmpswap)
2747 params[param_count++] = get_src(ctx, instr->src[4]);
2748 params[param_count++] = get_src(ctx, instr->src[3]);
2749
2750 if (dim == GLSL_SAMPLER_DIM_BUF) {
2751 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2752 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2753 ctx->ac.i32_0, ""); /* vindex */
2754 params[param_count++] = ctx->ac.i32_0; /* voffset */
2755 if (LLVM_VERSION_MAJOR >= 9) {
2756 /* XXX: The new raw/struct atomic intrinsics are buggy
2757 * with LLVM 8, see r358579.
2758 */
2759 params[param_count++] = ctx->ac.i32_0; /* soffset */
2760 params[param_count++] = ctx->ac.i32_0; /* slc */
2761
2762 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2763 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2764 } else {
2765 params[param_count++] = ctx->ac.i1false; /* slc */
2766
2767 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2768 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2769 }
2770
2771 assert(length < sizeof(intrinsic_name));
2772 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2773 params, param_count, 0);
2774 } else {
2775 struct ac_image_args args = {};
2776 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2777 args.atomic = atomic_subop;
2778 args.data[0] = params[0];
2779 if (cmpswap)
2780 args.data[1] = params[1];
2781 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2782 get_image_coords(ctx, instr, &args, dim, is_array);
2783 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2784
2785 return ac_build_image_opcode(&ctx->ac, &args);
2786 }
2787 }
2788
2789 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2790 const nir_intrinsic_instr *instr)
2791 {
2792 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2793
2794 return ac_build_image_get_sample_count(&ctx->ac, rsrc);
2795 }
2796
2797 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2798 const nir_intrinsic_instr *instr,
2799 bool bindless)
2800 {
2801 LLVMValueRef res;
2802
2803 enum glsl_sampler_dim dim;
2804 bool is_array;
2805 if (bindless) {
2806 dim = nir_intrinsic_image_dim(instr);
2807 is_array = nir_intrinsic_image_array(instr);
2808 } else {
2809 const struct glsl_type *type = get_image_deref(instr)->type;
2810 dim = glsl_get_sampler_dim(type);
2811 is_array = glsl_sampler_type_is_array(type);
2812 }
2813
2814 if (dim == GLSL_SAMPLER_DIM_BUF)
2815 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2816
2817 struct ac_image_args args = { 0 };
2818
2819 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2820 args.dmask = 0xf;
2821 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2822 args.opcode = ac_image_get_resinfo;
2823 args.lod = ctx->ac.i32_0;
2824 args.attributes = AC_FUNC_ATTR_READNONE;
2825
2826 res = ac_build_image_opcode(&ctx->ac, &args);
2827
2828 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2829
2830 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2831 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2832 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2833 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2834 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2835 }
2836 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2837 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2838 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2839 ctx->ac.i32_1, "");
2840
2841 }
2842 return res;
2843 }
2844
2845 static void emit_membar(struct ac_llvm_context *ac,
2846 const nir_intrinsic_instr *instr)
2847 {
2848 unsigned wait_flags = 0;
2849
2850 switch (instr->intrinsic) {
2851 case nir_intrinsic_memory_barrier:
2852 case nir_intrinsic_group_memory_barrier:
2853 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2854 break;
2855 case nir_intrinsic_memory_barrier_atomic_counter:
2856 case nir_intrinsic_memory_barrier_buffer:
2857 case nir_intrinsic_memory_barrier_image:
2858 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2859 break;
2860 case nir_intrinsic_memory_barrier_shared:
2861 wait_flags = AC_WAIT_LGKM;
2862 break;
2863 default:
2864 break;
2865 }
2866
2867 ac_build_waitcnt(ac, wait_flags);
2868 }
2869
2870 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2871 {
2872 /* GFX6 only (thanks to a hw bug workaround):
2873 * The real barrier instruction isn’t needed, because an entire patch
2874 * always fits into a single wave.
2875 */
2876 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2877 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2878 return;
2879 }
2880 ac_build_s_barrier(ac);
2881 }
2882
2883 static void emit_discard(struct ac_nir_context *ctx,
2884 const nir_intrinsic_instr *instr)
2885 {
2886 LLVMValueRef cond;
2887
2888 if (instr->intrinsic == nir_intrinsic_discard_if) {
2889 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2890 get_src(ctx, instr->src[0]),
2891 ctx->ac.i32_0, "");
2892 } else {
2893 assert(instr->intrinsic == nir_intrinsic_discard);
2894 cond = ctx->ac.i1false;
2895 }
2896
2897 ctx->abi->emit_kill(ctx->abi, cond);
2898 }
2899
2900 static LLVMValueRef
2901 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2902 {
2903 LLVMValueRef result;
2904 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2905 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2906 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2907
2908 if (ctx->ac.wave_size == 32)
2909 result = LLVMBuildLShr(ctx->ac.builder, result,
2910 LLVMConstInt(ctx->ac.i32, 1, false), "");
2911
2912 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2913 }
2914
2915 static LLVMValueRef
2916 visit_load_subgroup_id(struct ac_nir_context *ctx)
2917 {
2918 if (ctx->stage == MESA_SHADER_COMPUTE) {
2919 LLVMValueRef result;
2920 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2921 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2922 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2923 } else {
2924 return LLVMConstInt(ctx->ac.i32, 0, false);
2925 }
2926 }
2927
2928 static LLVMValueRef
2929 visit_load_num_subgroups(struct ac_nir_context *ctx)
2930 {
2931 if (ctx->stage == MESA_SHADER_COMPUTE) {
2932 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2933 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2934 } else {
2935 return LLVMConstInt(ctx->ac.i32, 1, false);
2936 }
2937 }
2938
2939 static LLVMValueRef
2940 visit_first_invocation(struct ac_nir_context *ctx)
2941 {
2942 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2943 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
2944
2945 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2946 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2947 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
2948 ctx->ac.iN_wavemask, args, 2,
2949 AC_FUNC_ATTR_NOUNWIND |
2950 AC_FUNC_ATTR_READNONE);
2951
2952 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2953 }
2954
2955 static LLVMValueRef
2956 visit_load_shared(struct ac_nir_context *ctx,
2957 const nir_intrinsic_instr *instr)
2958 {
2959 LLVMValueRef values[4], derived_ptr, index, ret;
2960
2961 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2962
2963 for (int chan = 0; chan < instr->num_components; chan++) {
2964 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2965 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2966 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2967 }
2968
2969 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2970 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2971 }
2972
2973 static void
2974 visit_store_shared(struct ac_nir_context *ctx,
2975 const nir_intrinsic_instr *instr)
2976 {
2977 LLVMValueRef derived_ptr, data,index;
2978 LLVMBuilderRef builder = ctx->ac.builder;
2979
2980 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2981 LLVMValueRef src = get_src(ctx, instr->src[0]);
2982
2983 int writemask = nir_intrinsic_write_mask(instr);
2984 for (int chan = 0; chan < 4; chan++) {
2985 if (!(writemask & (1 << chan))) {
2986 continue;
2987 }
2988 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2989 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2990 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2991 LLVMBuildStore(builder, data, derived_ptr);
2992 }
2993 }
2994
2995 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2996 const nir_intrinsic_instr *instr,
2997 LLVMValueRef ptr, int src_idx)
2998 {
2999 LLVMValueRef result;
3000 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3001
3002 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3003
3004 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3005 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3006 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3007 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3008 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3009 } else {
3010 LLVMAtomicRMWBinOp op;
3011 switch (instr->intrinsic) {
3012 case nir_intrinsic_shared_atomic_add:
3013 case nir_intrinsic_deref_atomic_add:
3014 op = LLVMAtomicRMWBinOpAdd;
3015 break;
3016 case nir_intrinsic_shared_atomic_umin:
3017 case nir_intrinsic_deref_atomic_umin:
3018 op = LLVMAtomicRMWBinOpUMin;
3019 break;
3020 case nir_intrinsic_shared_atomic_umax:
3021 case nir_intrinsic_deref_atomic_umax:
3022 op = LLVMAtomicRMWBinOpUMax;
3023 break;
3024 case nir_intrinsic_shared_atomic_imin:
3025 case nir_intrinsic_deref_atomic_imin:
3026 op = LLVMAtomicRMWBinOpMin;
3027 break;
3028 case nir_intrinsic_shared_atomic_imax:
3029 case nir_intrinsic_deref_atomic_imax:
3030 op = LLVMAtomicRMWBinOpMax;
3031 break;
3032 case nir_intrinsic_shared_atomic_and:
3033 case nir_intrinsic_deref_atomic_and:
3034 op = LLVMAtomicRMWBinOpAnd;
3035 break;
3036 case nir_intrinsic_shared_atomic_or:
3037 case nir_intrinsic_deref_atomic_or:
3038 op = LLVMAtomicRMWBinOpOr;
3039 break;
3040 case nir_intrinsic_shared_atomic_xor:
3041 case nir_intrinsic_deref_atomic_xor:
3042 op = LLVMAtomicRMWBinOpXor;
3043 break;
3044 case nir_intrinsic_shared_atomic_exchange:
3045 case nir_intrinsic_deref_atomic_exchange:
3046 op = LLVMAtomicRMWBinOpXchg;
3047 break;
3048 default:
3049 return NULL;
3050 }
3051
3052 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3053 }
3054 return result;
3055 }
3056
3057 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3058 {
3059 LLVMValueRef values[2];
3060 LLVMValueRef pos[2];
3061
3062 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
3063 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
3064
3065 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3066 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3067 return ac_build_gather_values(&ctx->ac, values, 2);
3068 }
3069
3070 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3071 enum glsl_interp_mode interp, unsigned location)
3072 {
3073 switch (interp) {
3074 case INTERP_MODE_FLAT:
3075 default:
3076 return NULL;
3077 case INTERP_MODE_SMOOTH:
3078 case INTERP_MODE_NONE:
3079 if (location == INTERP_CENTER)
3080 return ctx->abi->persp_center;
3081 else if (location == INTERP_CENTROID)
3082 return ctx->abi->persp_centroid;
3083 else if (location == INTERP_SAMPLE)
3084 return ctx->abi->persp_sample;
3085 break;
3086 case INTERP_MODE_NOPERSPECTIVE:
3087 if (location == INTERP_CENTER)
3088 return ctx->abi->linear_center;
3089 else if (location == INTERP_CENTROID)
3090 return ctx->abi->linear_centroid;
3091 else if (location == INTERP_SAMPLE)
3092 return ctx->abi->linear_sample;
3093 break;
3094 }
3095 return NULL;
3096 }
3097
3098 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3099 unsigned mode)
3100 {
3101 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3102 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3103 }
3104
3105 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3106 unsigned mode,
3107 LLVMValueRef offset)
3108 {
3109 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3110 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3111 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3112
3113 LLVMValueRef ij_out[2];
3114 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3115
3116 /*
3117 * take the I then J parameters, and the DDX/Y for it, and
3118 * calculate the IJ inputs for the interpolator.
3119 * temp1 = ddx * offset/sample.x + I;
3120 * interp_param.I = ddy * offset/sample.y + temp1;
3121 * temp1 = ddx * offset/sample.x + J;
3122 * interp_param.J = ddy * offset/sample.y + temp1;
3123 */
3124 for (unsigned i = 0; i < 2; i++) {
3125 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3126 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3127 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3128 ddxy_out, ix_ll, "");
3129 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3130 ddxy_out, iy_ll, "");
3131 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3132 interp_param, ix_ll, "");
3133 LLVMValueRef temp1, temp2;
3134
3135 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3136 ctx->ac.f32, "");
3137
3138 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3139 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3140
3141 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3142 temp2, ctx->ac.i32, "");
3143 }
3144 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3145 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3146 }
3147
3148 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3149 unsigned mode)
3150 {
3151 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3152 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3153 }
3154
3155 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3156 unsigned mode,
3157 LLVMValueRef sample_id)
3158 {
3159 if (ctx->abi->interp_at_sample_force_center)
3160 return barycentric_center(ctx, mode);
3161
3162 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3163
3164 /* fetch sample ID */
3165 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3166
3167 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3168 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3169 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3170 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3171 LLVMValueRef coords[] = { src_c0, src_c1 };
3172 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3173
3174 return barycentric_offset(ctx, mode, offset);
3175 }
3176
3177
3178 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3179 unsigned mode)
3180 {
3181 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3182 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3183 }
3184
3185 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3186 LLVMValueRef interp_param,
3187 unsigned index, unsigned comp_start,
3188 unsigned num_components,
3189 unsigned bitsize)
3190 {
3191 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3192
3193 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3194 interp_param, ctx->ac.v2f32, "");
3195 LLVMValueRef i = LLVMBuildExtractElement(
3196 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3197 LLVMValueRef j = LLVMBuildExtractElement(
3198 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3199
3200 LLVMValueRef values[4];
3201 assert(bitsize == 16 || bitsize == 32);
3202 for (unsigned comp = 0; comp < num_components; comp++) {
3203 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3204 if (bitsize == 16) {
3205 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3206 ctx->abi->prim_mask, i, j);
3207 } else {
3208 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3209 ctx->abi->prim_mask, i, j);
3210 }
3211 }
3212
3213 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3214 }
3215
3216 static LLVMValueRef load_flat_input(struct ac_nir_context *ctx,
3217 unsigned index, unsigned comp_start,
3218 unsigned num_components,
3219 unsigned bit_size)
3220 {
3221 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3222
3223 LLVMValueRef values[8];
3224
3225 /* Each component of a 64-bit value takes up two GL-level channels. */
3226 unsigned channels =
3227 bit_size == 64 ? num_components * 2 : num_components;
3228
3229 for (unsigned chan = 0; chan < channels; chan++) {
3230 if (comp_start + chan > 4)
3231 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3232 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (comp_start + chan) % 4, false);
3233 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3234 LLVMConstInt(ctx->ac.i32, 2, false),
3235 llvm_chan,
3236 attr_number,
3237 ctx->abi->prim_mask);
3238 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3239 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3240 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3241 }
3242
3243 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3244 if (bit_size == 64) {
3245 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3246 LLVMVectorType(ctx->ac.i64, num_components);
3247 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3248 }
3249 return result;
3250 }
3251
3252 static void visit_intrinsic(struct ac_nir_context *ctx,
3253 nir_intrinsic_instr *instr)
3254 {
3255 LLVMValueRef result = NULL;
3256
3257 switch (instr->intrinsic) {
3258 case nir_intrinsic_ballot:
3259 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3260 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3261 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3262 break;
3263 case nir_intrinsic_read_invocation:
3264 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3265 get_src(ctx, instr->src[1]));
3266 break;
3267 case nir_intrinsic_read_first_invocation:
3268 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3269 break;
3270 case nir_intrinsic_load_subgroup_invocation:
3271 result = ac_get_thread_id(&ctx->ac);
3272 break;
3273 case nir_intrinsic_load_work_group_id: {
3274 LLVMValueRef values[3];
3275
3276 for (int i = 0; i < 3; i++) {
3277 values[i] = ctx->abi->workgroup_ids[i] ?
3278 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3279 }
3280
3281 result = ac_build_gather_values(&ctx->ac, values, 3);
3282 break;
3283 }
3284 case nir_intrinsic_load_base_vertex:
3285 case nir_intrinsic_load_first_vertex:
3286 result = ctx->abi->load_base_vertex(ctx->abi);
3287 break;
3288 case nir_intrinsic_load_local_group_size:
3289 result = ctx->abi->load_local_group_size(ctx->abi);
3290 break;
3291 case nir_intrinsic_load_vertex_id:
3292 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3293 ctx->abi->base_vertex, "");
3294 break;
3295 case nir_intrinsic_load_vertex_id_zero_base: {
3296 result = ctx->abi->vertex_id;
3297 break;
3298 }
3299 case nir_intrinsic_load_local_invocation_id: {
3300 result = ctx->abi->local_invocation_ids;
3301 break;
3302 }
3303 case nir_intrinsic_load_base_instance:
3304 result = ctx->abi->start_instance;
3305 break;
3306 case nir_intrinsic_load_draw_id:
3307 result = ctx->abi->draw_id;
3308 break;
3309 case nir_intrinsic_load_view_index:
3310 result = ctx->abi->view_index;
3311 break;
3312 case nir_intrinsic_load_invocation_id:
3313 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3314 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3315 } else {
3316 if (ctx->ac.chip_class >= GFX10) {
3317 result = LLVMBuildAnd(ctx->ac.builder,
3318 ctx->abi->gs_invocation_id,
3319 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3320 } else {
3321 result = ctx->abi->gs_invocation_id;
3322 }
3323 }
3324 break;
3325 case nir_intrinsic_load_primitive_id:
3326 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3327 result = ctx->abi->gs_prim_id;
3328 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3329 result = ctx->abi->tcs_patch_id;
3330 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3331 result = ctx->abi->tes_patch_id;
3332 } else
3333 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3334 break;
3335 case nir_intrinsic_load_sample_id:
3336 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3337 break;
3338 case nir_intrinsic_load_sample_pos:
3339 result = load_sample_pos(ctx);
3340 break;
3341 case nir_intrinsic_load_sample_mask_in:
3342 result = ctx->abi->load_sample_mask_in(ctx->abi);
3343 break;
3344 case nir_intrinsic_load_frag_coord: {
3345 LLVMValueRef values[4] = {
3346 ctx->abi->frag_pos[0],
3347 ctx->abi->frag_pos[1],
3348 ctx->abi->frag_pos[2],
3349 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3350 };
3351 result = ac_to_integer(&ctx->ac,
3352 ac_build_gather_values(&ctx->ac, values, 4));
3353 break;
3354 }
3355 case nir_intrinsic_load_layer_id:
3356 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3357 break;
3358 case nir_intrinsic_load_front_face:
3359 result = ctx->abi->front_face;
3360 break;
3361 case nir_intrinsic_load_helper_invocation:
3362 result = ac_build_load_helper_invocation(&ctx->ac);
3363 break;
3364 case nir_intrinsic_load_color0:
3365 result = ctx->abi->color0;
3366 break;
3367 case nir_intrinsic_load_color1:
3368 result = ctx->abi->color1;
3369 break;
3370 case nir_intrinsic_load_user_data_amd:
3371 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3372 result = ctx->abi->user_data;
3373 break;
3374 case nir_intrinsic_load_instance_id:
3375 result = ctx->abi->instance_id;
3376 break;
3377 case nir_intrinsic_load_num_work_groups:
3378 result = ctx->abi->num_work_groups;
3379 break;
3380 case nir_intrinsic_load_local_invocation_index:
3381 result = visit_load_local_invocation_index(ctx);
3382 break;
3383 case nir_intrinsic_load_subgroup_id:
3384 result = visit_load_subgroup_id(ctx);
3385 break;
3386 case nir_intrinsic_load_num_subgroups:
3387 result = visit_load_num_subgroups(ctx);
3388 break;
3389 case nir_intrinsic_first_invocation:
3390 result = visit_first_invocation(ctx);
3391 break;
3392 case nir_intrinsic_load_push_constant:
3393 result = visit_load_push_constant(ctx, instr);
3394 break;
3395 case nir_intrinsic_vulkan_resource_index: {
3396 LLVMValueRef index = get_src(ctx, instr->src[0]);
3397 unsigned desc_set = nir_intrinsic_desc_set(instr);
3398 unsigned binding = nir_intrinsic_binding(instr);
3399
3400 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3401 binding);
3402 break;
3403 }
3404 case nir_intrinsic_vulkan_resource_reindex:
3405 result = visit_vulkan_resource_reindex(ctx, instr);
3406 break;
3407 case nir_intrinsic_store_ssbo:
3408 visit_store_ssbo(ctx, instr);
3409 break;
3410 case nir_intrinsic_load_ssbo:
3411 result = visit_load_buffer(ctx, instr);
3412 break;
3413 case nir_intrinsic_ssbo_atomic_add:
3414 case nir_intrinsic_ssbo_atomic_imin:
3415 case nir_intrinsic_ssbo_atomic_umin:
3416 case nir_intrinsic_ssbo_atomic_imax:
3417 case nir_intrinsic_ssbo_atomic_umax:
3418 case nir_intrinsic_ssbo_atomic_and:
3419 case nir_intrinsic_ssbo_atomic_or:
3420 case nir_intrinsic_ssbo_atomic_xor:
3421 case nir_intrinsic_ssbo_atomic_exchange:
3422 case nir_intrinsic_ssbo_atomic_comp_swap:
3423 result = visit_atomic_ssbo(ctx, instr);
3424 break;
3425 case nir_intrinsic_load_ubo:
3426 result = visit_load_ubo_buffer(ctx, instr);
3427 break;
3428 case nir_intrinsic_get_buffer_size:
3429 result = visit_get_buffer_size(ctx, instr);
3430 break;
3431 case nir_intrinsic_load_deref:
3432 result = visit_load_var(ctx, instr);
3433 break;
3434 case nir_intrinsic_store_deref:
3435 visit_store_var(ctx, instr);
3436 break;
3437 case nir_intrinsic_load_shared:
3438 result = visit_load_shared(ctx, instr);
3439 break;
3440 case nir_intrinsic_store_shared:
3441 visit_store_shared(ctx, instr);
3442 break;
3443 case nir_intrinsic_bindless_image_samples:
3444 case nir_intrinsic_image_deref_samples:
3445 result = visit_image_samples(ctx, instr);
3446 break;
3447 case nir_intrinsic_bindless_image_load:
3448 result = visit_image_load(ctx, instr, true);
3449 break;
3450 case nir_intrinsic_image_deref_load:
3451 result = visit_image_load(ctx, instr, false);
3452 break;
3453 case nir_intrinsic_bindless_image_store:
3454 visit_image_store(ctx, instr, true);
3455 break;
3456 case nir_intrinsic_image_deref_store:
3457 visit_image_store(ctx, instr, false);
3458 break;
3459 case nir_intrinsic_bindless_image_atomic_add:
3460 case nir_intrinsic_bindless_image_atomic_imin:
3461 case nir_intrinsic_bindless_image_atomic_umin:
3462 case nir_intrinsic_bindless_image_atomic_imax:
3463 case nir_intrinsic_bindless_image_atomic_umax:
3464 case nir_intrinsic_bindless_image_atomic_and:
3465 case nir_intrinsic_bindless_image_atomic_or:
3466 case nir_intrinsic_bindless_image_atomic_xor:
3467 case nir_intrinsic_bindless_image_atomic_exchange:
3468 case nir_intrinsic_bindless_image_atomic_comp_swap:
3469 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3470 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3471 result = visit_image_atomic(ctx, instr, true);
3472 break;
3473 case nir_intrinsic_image_deref_atomic_add:
3474 case nir_intrinsic_image_deref_atomic_imin:
3475 case nir_intrinsic_image_deref_atomic_umin:
3476 case nir_intrinsic_image_deref_atomic_imax:
3477 case nir_intrinsic_image_deref_atomic_umax:
3478 case nir_intrinsic_image_deref_atomic_and:
3479 case nir_intrinsic_image_deref_atomic_or:
3480 case nir_intrinsic_image_deref_atomic_xor:
3481 case nir_intrinsic_image_deref_atomic_exchange:
3482 case nir_intrinsic_image_deref_atomic_comp_swap:
3483 case nir_intrinsic_image_deref_atomic_inc_wrap:
3484 case nir_intrinsic_image_deref_atomic_dec_wrap:
3485 result = visit_image_atomic(ctx, instr, false);
3486 break;
3487 case nir_intrinsic_bindless_image_size:
3488 result = visit_image_size(ctx, instr, true);
3489 break;
3490 case nir_intrinsic_image_deref_size:
3491 result = visit_image_size(ctx, instr, false);
3492 break;
3493 case nir_intrinsic_shader_clock:
3494 result = ac_build_shader_clock(&ctx->ac);
3495 break;
3496 case nir_intrinsic_discard:
3497 case nir_intrinsic_discard_if:
3498 emit_discard(ctx, instr);
3499 break;
3500 case nir_intrinsic_memory_barrier:
3501 case nir_intrinsic_group_memory_barrier:
3502 case nir_intrinsic_memory_barrier_atomic_counter:
3503 case nir_intrinsic_memory_barrier_buffer:
3504 case nir_intrinsic_memory_barrier_image:
3505 case nir_intrinsic_memory_barrier_shared:
3506 emit_membar(&ctx->ac, instr);
3507 break;
3508 case nir_intrinsic_barrier:
3509 ac_emit_barrier(&ctx->ac, ctx->stage);
3510 break;
3511 case nir_intrinsic_shared_atomic_add:
3512 case nir_intrinsic_shared_atomic_imin:
3513 case nir_intrinsic_shared_atomic_umin:
3514 case nir_intrinsic_shared_atomic_imax:
3515 case nir_intrinsic_shared_atomic_umax:
3516 case nir_intrinsic_shared_atomic_and:
3517 case nir_intrinsic_shared_atomic_or:
3518 case nir_intrinsic_shared_atomic_xor:
3519 case nir_intrinsic_shared_atomic_exchange:
3520 case nir_intrinsic_shared_atomic_comp_swap: {
3521 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3522 result = visit_var_atomic(ctx, instr, ptr, 1);
3523 break;
3524 }
3525 case nir_intrinsic_deref_atomic_add:
3526 case nir_intrinsic_deref_atomic_imin:
3527 case nir_intrinsic_deref_atomic_umin:
3528 case nir_intrinsic_deref_atomic_imax:
3529 case nir_intrinsic_deref_atomic_umax:
3530 case nir_intrinsic_deref_atomic_and:
3531 case nir_intrinsic_deref_atomic_or:
3532 case nir_intrinsic_deref_atomic_xor:
3533 case nir_intrinsic_deref_atomic_exchange:
3534 case nir_intrinsic_deref_atomic_comp_swap: {
3535 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3536 result = visit_var_atomic(ctx, instr, ptr, 1);
3537 break;
3538 }
3539 case nir_intrinsic_load_barycentric_pixel:
3540 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3541 break;
3542 case nir_intrinsic_load_barycentric_centroid:
3543 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3544 break;
3545 case nir_intrinsic_load_barycentric_sample:
3546 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3547 break;
3548 case nir_intrinsic_load_barycentric_at_offset: {
3549 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3550 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3551 break;
3552 }
3553 case nir_intrinsic_load_barycentric_at_sample: {
3554 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3555 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3556 break;
3557 }
3558 case nir_intrinsic_load_interpolated_input: {
3559 /* We assume any indirect loads have been lowered away */
3560 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3561 assert(offset);
3562 assert(offset[0].i32 == 0);
3563
3564 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3565 unsigned index = nir_intrinsic_base(instr);
3566 unsigned component = nir_intrinsic_component(instr);
3567 result = load_interpolated_input(ctx, interp_param, index,
3568 component,
3569 instr->dest.ssa.num_components,
3570 instr->dest.ssa.bit_size);
3571 break;
3572 }
3573 case nir_intrinsic_load_input: {
3574 /* We only lower inputs for fragment shaders ATM */
3575 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[0]);
3576 assert(offset);
3577 assert(offset[0].i32 == 0);
3578
3579 unsigned index = nir_intrinsic_base(instr);
3580 unsigned component = nir_intrinsic_component(instr);
3581 result = load_flat_input(ctx, index, component,
3582 instr->dest.ssa.num_components,
3583 instr->dest.ssa.bit_size);
3584 break;
3585 }
3586 case nir_intrinsic_emit_vertex:
3587 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3588 break;
3589 case nir_intrinsic_end_primitive:
3590 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3591 break;
3592 case nir_intrinsic_load_tess_coord:
3593 result = ctx->abi->load_tess_coord(ctx->abi);
3594 break;
3595 case nir_intrinsic_load_tess_level_outer:
3596 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
3597 break;
3598 case nir_intrinsic_load_tess_level_inner:
3599 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
3600 break;
3601 case nir_intrinsic_load_tess_level_outer_default:
3602 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
3603 break;
3604 case nir_intrinsic_load_tess_level_inner_default:
3605 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
3606 break;
3607 case nir_intrinsic_load_patch_vertices_in:
3608 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3609 break;
3610 case nir_intrinsic_vote_all: {
3611 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3612 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3613 break;
3614 }
3615 case nir_intrinsic_vote_any: {
3616 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3617 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3618 break;
3619 }
3620 case nir_intrinsic_shuffle:
3621 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3622 get_src(ctx, instr->src[1]));
3623 break;
3624 case nir_intrinsic_reduce:
3625 result = ac_build_reduce(&ctx->ac,
3626 get_src(ctx, instr->src[0]),
3627 instr->const_index[0],
3628 instr->const_index[1]);
3629 break;
3630 case nir_intrinsic_inclusive_scan:
3631 result = ac_build_inclusive_scan(&ctx->ac,
3632 get_src(ctx, instr->src[0]),
3633 instr->const_index[0]);
3634 break;
3635 case nir_intrinsic_exclusive_scan:
3636 result = ac_build_exclusive_scan(&ctx->ac,
3637 get_src(ctx, instr->src[0]),
3638 instr->const_index[0]);
3639 break;
3640 case nir_intrinsic_quad_broadcast: {
3641 unsigned lane = nir_src_as_uint(instr->src[1]);
3642 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3643 lane, lane, lane, lane);
3644 break;
3645 }
3646 case nir_intrinsic_quad_swap_horizontal:
3647 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3648 break;
3649 case nir_intrinsic_quad_swap_vertical:
3650 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3651 break;
3652 case nir_intrinsic_quad_swap_diagonal:
3653 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3654 break;
3655 case nir_intrinsic_quad_swizzle_amd: {
3656 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3657 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3658 mask & 0x3, (mask >> 2) & 0x3,
3659 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3660 break;
3661 }
3662 case nir_intrinsic_masked_swizzle_amd: {
3663 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3664 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3665 break;
3666 }
3667 case nir_intrinsic_write_invocation_amd:
3668 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3669 get_src(ctx, instr->src[1]),
3670 get_src(ctx, instr->src[2]));
3671 break;
3672 case nir_intrinsic_mbcnt_amd:
3673 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3674 break;
3675 case nir_intrinsic_load_scratch: {
3676 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3677 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3678 offset);
3679 LLVMTypeRef comp_type =
3680 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3681 LLVMTypeRef vec_type =
3682 instr->dest.ssa.num_components == 1 ? comp_type :
3683 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3684 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3685 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3686 LLVMPointerType(vec_type, addr_space), "");
3687 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3688 break;
3689 }
3690 case nir_intrinsic_store_scratch: {
3691 LLVMValueRef offset = get_src(ctx, instr->src[1]);
3692 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3693 offset);
3694 LLVMTypeRef comp_type =
3695 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
3696 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3697 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3698 LLVMPointerType(comp_type, addr_space), "");
3699 LLVMValueRef src = get_src(ctx, instr->src[0]);
3700 unsigned wrmask = nir_intrinsic_write_mask(instr);
3701 while (wrmask) {
3702 int start, count;
3703 u_bit_scan_consecutive_range(&wrmask, &start, &count);
3704
3705 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
3706 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
3707 LLVMTypeRef vec_type =
3708 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
3709 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
3710 offset_ptr,
3711 LLVMPointerType(vec_type, addr_space),
3712 "");
3713 LLVMValueRef offset_src =
3714 ac_extract_components(&ctx->ac, src, start, count);
3715 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
3716 }
3717 break;
3718 }
3719 case nir_intrinsic_load_constant: {
3720 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3721 LLVMValueRef base = LLVMConstInt(ctx->ac.i32,
3722 nir_intrinsic_base(instr),
3723 false);
3724 offset = LLVMBuildAdd(ctx->ac.builder, offset, base, "");
3725 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
3726 offset);
3727 LLVMTypeRef comp_type =
3728 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3729 LLVMTypeRef vec_type =
3730 instr->dest.ssa.num_components == 1 ? comp_type :
3731 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3732 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3733 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3734 LLVMPointerType(vec_type, addr_space), "");
3735 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3736 break;
3737 }
3738 default:
3739 fprintf(stderr, "Unknown intrinsic: ");
3740 nir_print_instr(&instr->instr, stderr);
3741 fprintf(stderr, "\n");
3742 break;
3743 }
3744 if (result) {
3745 ctx->ssa_defs[instr->dest.ssa.index] = result;
3746 }
3747 }
3748
3749 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3750 unsigned base_index,
3751 unsigned constant_index,
3752 LLVMValueRef dynamic_index)
3753 {
3754 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3755 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3756 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3757
3758 /* Bindless uniforms are 64bit so multiple index by 8 */
3759 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3760 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3761
3762 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3763
3764 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3765 NULL, 0, 0, true, true);
3766
3767 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3768 }
3769
3770 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3771 nir_deref_instr *deref_instr,
3772 enum ac_descriptor_type desc_type,
3773 const nir_instr *instr,
3774 bool image, bool write)
3775 {
3776 LLVMValueRef index = NULL;
3777 unsigned constant_index = 0;
3778 unsigned descriptor_set;
3779 unsigned base_index;
3780 bool bindless = false;
3781
3782 if (!deref_instr) {
3783 descriptor_set = 0;
3784 if (image) {
3785 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3786 base_index = 0;
3787 bindless = true;
3788 index = get_src(ctx, img_instr->src[0]);
3789 } else {
3790 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3791 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3792 nir_tex_src_sampler_handle);
3793 if (sampSrcIdx != -1) {
3794 base_index = 0;
3795 bindless = true;
3796 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3797 } else {
3798 assert(tex_instr && !image);
3799 base_index = tex_instr->sampler_index;
3800 }
3801 }
3802 } else {
3803 while(deref_instr->deref_type != nir_deref_type_var) {
3804 if (deref_instr->deref_type == nir_deref_type_array) {
3805 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3806 if (!array_size)
3807 array_size = 1;
3808
3809 if (nir_src_is_const(deref_instr->arr.index)) {
3810 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3811 } else {
3812 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3813
3814 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3815 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3816
3817 if (!index)
3818 index = indirect;
3819 else
3820 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3821 }
3822
3823 deref_instr = nir_src_as_deref(deref_instr->parent);
3824 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3825 unsigned sidx = deref_instr->strct.index;
3826 deref_instr = nir_src_as_deref(deref_instr->parent);
3827 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3828 } else {
3829 unreachable("Unsupported deref type");
3830 }
3831 }
3832 descriptor_set = deref_instr->var->data.descriptor_set;
3833
3834 if (deref_instr->var->data.bindless) {
3835 /* For now just assert on unhandled variable types */
3836 assert(deref_instr->var->data.mode == nir_var_uniform);
3837
3838 base_index = deref_instr->var->data.driver_location;
3839 bindless = true;
3840
3841 index = index ? index : ctx->ac.i32_0;
3842 index = get_bindless_index_from_uniform(ctx, base_index,
3843 constant_index, index);
3844 } else
3845 base_index = deref_instr->var->data.binding;
3846 }
3847
3848 return ctx->abi->load_sampler_desc(ctx->abi,
3849 descriptor_set,
3850 base_index,
3851 constant_index, index,
3852 desc_type, image, write, bindless);
3853 }
3854
3855 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3856 *
3857 * GFX6-GFX7:
3858 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3859 * filtering manually. The driver sets img7 to a mask clearing
3860 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3861 * s_and_b32 samp0, samp0, img7
3862 *
3863 * GFX8:
3864 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3865 */
3866 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3867 LLVMValueRef res, LLVMValueRef samp)
3868 {
3869 LLVMBuilderRef builder = ctx->ac.builder;
3870 LLVMValueRef img7, samp0;
3871
3872 if (ctx->ac.chip_class >= GFX8)
3873 return samp;
3874
3875 img7 = LLVMBuildExtractElement(builder, res,
3876 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3877 samp0 = LLVMBuildExtractElement(builder, samp,
3878 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3879 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3880 return LLVMBuildInsertElement(builder, samp, samp0,
3881 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3882 }
3883
3884 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3885 nir_tex_instr *instr,
3886 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3887 LLVMValueRef *fmask_ptr)
3888 {
3889 nir_deref_instr *texture_deref_instr = NULL;
3890 nir_deref_instr *sampler_deref_instr = NULL;
3891 int plane = -1;
3892
3893 for (unsigned i = 0; i < instr->num_srcs; i++) {
3894 switch (instr->src[i].src_type) {
3895 case nir_tex_src_texture_deref:
3896 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3897 break;
3898 case nir_tex_src_sampler_deref:
3899 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3900 break;
3901 case nir_tex_src_plane:
3902 plane = nir_src_as_int(instr->src[i].src);
3903 break;
3904 default:
3905 break;
3906 }
3907 }
3908
3909 if (!sampler_deref_instr)
3910 sampler_deref_instr = texture_deref_instr;
3911
3912 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3913
3914 if (plane >= 0) {
3915 assert(instr->op != nir_texop_txf_ms &&
3916 instr->op != nir_texop_samples_identical);
3917 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3918
3919 main_descriptor = AC_DESC_PLANE_0 + plane;
3920 }
3921
3922 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3923
3924 if (samp_ptr) {
3925 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3926 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3927 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3928 }
3929 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3930 instr->op == nir_texop_samples_identical))
3931 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3932 }
3933
3934 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3935 LLVMValueRef coord)
3936 {
3937 coord = ac_to_float(ctx, coord);
3938 coord = ac_build_round(ctx, coord);
3939 coord = ac_to_integer(ctx, coord);
3940 return coord;
3941 }
3942
3943 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3944 {
3945 LLVMValueRef result = NULL;
3946 struct ac_image_args args = { 0 };
3947 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3948 LLVMValueRef ddx = NULL, ddy = NULL;
3949 unsigned offset_src = 0;
3950
3951 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3952
3953 for (unsigned i = 0; i < instr->num_srcs; i++) {
3954 switch (instr->src[i].src_type) {
3955 case nir_tex_src_coord: {
3956 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3957 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3958 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3959 break;
3960 }
3961 case nir_tex_src_projector:
3962 break;
3963 case nir_tex_src_comparator:
3964 if (instr->is_shadow) {
3965 args.compare = get_src(ctx, instr->src[i].src);
3966 args.compare = ac_to_float(&ctx->ac, args.compare);
3967 }
3968 break;
3969 case nir_tex_src_offset:
3970 args.offset = get_src(ctx, instr->src[i].src);
3971 offset_src = i;
3972 break;
3973 case nir_tex_src_bias:
3974 if (instr->op == nir_texop_txb)
3975 args.bias = get_src(ctx, instr->src[i].src);
3976 break;
3977 case nir_tex_src_lod: {
3978 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
3979 args.level_zero = true;
3980 else
3981 args.lod = get_src(ctx, instr->src[i].src);
3982 break;
3983 }
3984 case nir_tex_src_ms_index:
3985 sample_index = get_src(ctx, instr->src[i].src);
3986 break;
3987 case nir_tex_src_ms_mcs:
3988 break;
3989 case nir_tex_src_ddx:
3990 ddx = get_src(ctx, instr->src[i].src);
3991 break;
3992 case nir_tex_src_ddy:
3993 ddy = get_src(ctx, instr->src[i].src);
3994 break;
3995 case nir_tex_src_texture_offset:
3996 case nir_tex_src_sampler_offset:
3997 case nir_tex_src_plane:
3998 default:
3999 break;
4000 }
4001 }
4002
4003 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4004 result = get_buffer_size(ctx, args.resource, true);
4005 goto write_result;
4006 }
4007
4008 if (instr->op == nir_texop_texture_samples) {
4009 LLVMValueRef res, samples, is_msaa;
4010 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4011 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4012 LLVMConstInt(ctx->ac.i32, 3, false), "");
4013 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4014 LLVMConstInt(ctx->ac.i32, 28, false), "");
4015 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4016 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4017 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4018 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4019
4020 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4021 LLVMConstInt(ctx->ac.i32, 16, false), "");
4022 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4023 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4024 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4025 samples, "");
4026 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4027 ctx->ac.i32_1, "");
4028 result = samples;
4029 goto write_result;
4030 }
4031
4032 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4033 LLVMValueRef offset[3], pack;
4034 for (unsigned chan = 0; chan < 3; ++chan)
4035 offset[chan] = ctx->ac.i32_0;
4036
4037 unsigned num_components = ac_get_llvm_num_components(args.offset);
4038 for (unsigned chan = 0; chan < num_components; chan++) {
4039 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4040 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4041 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4042 if (chan)
4043 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4044 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4045 }
4046 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4047 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4048 args.offset = pack;
4049 }
4050
4051 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4052 * OpenGL 4.5 spec says:
4053 *
4054 * "If the texture’s internal format indicates a fixed-point
4055 * depth texture, then D_t and D_ref are clamped to the
4056 * range [0, 1]; otherwise no clamping is performed."
4057 *
4058 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4059 * so the depth comparison value isn't clamped for Z16 and
4060 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4061 * an explicitly clamped 32-bit float format.
4062 */
4063 if (args.compare &&
4064 ctx->ac.chip_class >= GFX8 &&
4065 ctx->ac.chip_class <= GFX9 &&
4066 ctx->abi->clamp_shadow_reference) {
4067 LLVMValueRef upgraded, clamped;
4068
4069 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4070 LLVMConstInt(ctx->ac.i32, 3, false), "");
4071 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4072 LLVMConstInt(ctx->ac.i32, 29, false), "");
4073 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4074 clamped = ac_build_clamp(&ctx->ac, args.compare);
4075 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4076 args.compare, "");
4077 }
4078
4079 /* pack derivatives */
4080 if (ddx || ddy) {
4081 int num_src_deriv_channels, num_dest_deriv_channels;
4082 switch (instr->sampler_dim) {
4083 case GLSL_SAMPLER_DIM_3D:
4084 case GLSL_SAMPLER_DIM_CUBE:
4085 num_src_deriv_channels = 3;
4086 num_dest_deriv_channels = 3;
4087 break;
4088 case GLSL_SAMPLER_DIM_2D:
4089 default:
4090 num_src_deriv_channels = 2;
4091 num_dest_deriv_channels = 2;
4092 break;
4093 case GLSL_SAMPLER_DIM_1D:
4094 num_src_deriv_channels = 1;
4095 if (ctx->ac.chip_class == GFX9) {
4096 num_dest_deriv_channels = 2;
4097 } else {
4098 num_dest_deriv_channels = 1;
4099 }
4100 break;
4101 }
4102
4103 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4104 args.derivs[i] = ac_to_float(&ctx->ac,
4105 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4106 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4107 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4108 }
4109 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4110 args.derivs[i] = ctx->ac.f32_0;
4111 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4112 }
4113 }
4114
4115 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4116 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4117 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4118 if (instr->coord_components == 3)
4119 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4120 ac_prepare_cube_coords(&ctx->ac,
4121 instr->op == nir_texop_txd, instr->is_array,
4122 instr->op == nir_texop_lod, args.coords, args.derivs);
4123 }
4124
4125 /* Texture coordinates fixups */
4126 if (instr->coord_components > 1 &&
4127 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4128 instr->is_array &&
4129 instr->op != nir_texop_txf) {
4130 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4131 }
4132
4133 if (instr->coord_components > 2 &&
4134 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4135 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4136 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4137 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4138 instr->is_array &&
4139 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4140 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4141 }
4142
4143 if (ctx->ac.chip_class == GFX9 &&
4144 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4145 instr->op != nir_texop_lod) {
4146 LLVMValueRef filler;
4147 if (instr->op == nir_texop_txf)
4148 filler = ctx->ac.i32_0;
4149 else
4150 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4151
4152 if (instr->is_array)
4153 args.coords[2] = args.coords[1];
4154 args.coords[1] = filler;
4155 }
4156
4157 /* Pack sample index */
4158 if (instr->op == nir_texop_txf_ms && sample_index)
4159 args.coords[instr->coord_components] = sample_index;
4160
4161 if (instr->op == nir_texop_samples_identical) {
4162 struct ac_image_args txf_args = { 0 };
4163 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4164
4165 txf_args.dmask = 0xf;
4166 txf_args.resource = fmask_ptr;
4167 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4168 result = build_tex_intrinsic(ctx, instr, &txf_args);
4169
4170 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4171 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4172 goto write_result;
4173 }
4174
4175 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4176 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4177 instr->op != nir_texop_txs) {
4178 unsigned sample_chan = instr->is_array ? 3 : 2;
4179 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4180 &ctx->ac, args.coords[0], args.coords[1],
4181 instr->is_array ? args.coords[2] : NULL,
4182 args.coords[sample_chan], fmask_ptr);
4183 }
4184
4185 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4186 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4187 num_offsets = MIN2(num_offsets, instr->coord_components);
4188 for (unsigned i = 0; i < num_offsets; ++i) {
4189 args.coords[i] = LLVMBuildAdd(
4190 ctx->ac.builder, args.coords[i],
4191 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4192 }
4193 args.offset = NULL;
4194 }
4195
4196 /* DMASK was repurposed for GATHER4. 4 components are always
4197 * returned and DMASK works like a swizzle - it selects
4198 * the component to fetch. The only valid DMASK values are
4199 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4200 * (red,red,red,red) etc.) The ISA document doesn't mention
4201 * this.
4202 */
4203 args.dmask = 0xf;
4204 if (instr->op == nir_texop_tg4) {
4205 if (instr->is_shadow)
4206 args.dmask = 1;
4207 else
4208 args.dmask = 1 << instr->component;
4209 }
4210
4211 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4212 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4213 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4214 }
4215 result = build_tex_intrinsic(ctx, instr, &args);
4216
4217 if (instr->op == nir_texop_query_levels)
4218 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4219 else if (instr->is_shadow && instr->is_new_style_shadow &&
4220 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4221 instr->op != nir_texop_tg4)
4222 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4223 else if (instr->op == nir_texop_txs &&
4224 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4225 instr->is_array) {
4226 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4227 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4228 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4229 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4230 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4231 } else if (ctx->ac.chip_class == GFX9 &&
4232 instr->op == nir_texop_txs &&
4233 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4234 instr->is_array) {
4235 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4236 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4237 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4238 ctx->ac.i32_1, "");
4239 } else if (instr->dest.ssa.num_components != 4)
4240 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4241
4242 write_result:
4243 if (result) {
4244 assert(instr->dest.is_ssa);
4245 result = ac_to_integer(&ctx->ac, result);
4246 ctx->ssa_defs[instr->dest.ssa.index] = result;
4247 }
4248 }
4249
4250
4251 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4252 {
4253 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4254 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4255
4256 ctx->ssa_defs[instr->dest.ssa.index] = result;
4257 _mesa_hash_table_insert(ctx->phis, instr, result);
4258 }
4259
4260 static void visit_post_phi(struct ac_nir_context *ctx,
4261 nir_phi_instr *instr,
4262 LLVMValueRef llvm_phi)
4263 {
4264 nir_foreach_phi_src(src, instr) {
4265 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4266 LLVMValueRef llvm_src = get_src(ctx, src->src);
4267
4268 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4269 }
4270 }
4271
4272 static void phi_post_pass(struct ac_nir_context *ctx)
4273 {
4274 hash_table_foreach(ctx->phis, entry) {
4275 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4276 (LLVMValueRef)entry->data);
4277 }
4278 }
4279
4280
4281 static void visit_ssa_undef(struct ac_nir_context *ctx,
4282 const nir_ssa_undef_instr *instr)
4283 {
4284 unsigned num_components = instr->def.num_components;
4285 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4286 LLVMValueRef undef;
4287
4288 if (num_components == 1)
4289 undef = LLVMGetUndef(type);
4290 else {
4291 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4292 }
4293 ctx->ssa_defs[instr->def.index] = undef;
4294 }
4295
4296 static void visit_jump(struct ac_llvm_context *ctx,
4297 const nir_jump_instr *instr)
4298 {
4299 switch (instr->type) {
4300 case nir_jump_break:
4301 ac_build_break(ctx);
4302 break;
4303 case nir_jump_continue:
4304 ac_build_continue(ctx);
4305 break;
4306 default:
4307 fprintf(stderr, "Unknown NIR jump instr: ");
4308 nir_print_instr(&instr->instr, stderr);
4309 fprintf(stderr, "\n");
4310 abort();
4311 }
4312 }
4313
4314 static LLVMTypeRef
4315 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4316 enum glsl_base_type type)
4317 {
4318 switch (type) {
4319 case GLSL_TYPE_INT:
4320 case GLSL_TYPE_UINT:
4321 case GLSL_TYPE_BOOL:
4322 case GLSL_TYPE_SUBROUTINE:
4323 return ac->i32;
4324 case GLSL_TYPE_INT8:
4325 case GLSL_TYPE_UINT8:
4326 return ac->i8;
4327 case GLSL_TYPE_INT16:
4328 case GLSL_TYPE_UINT16:
4329 return ac->i16;
4330 case GLSL_TYPE_FLOAT:
4331 return ac->f32;
4332 case GLSL_TYPE_FLOAT16:
4333 return ac->f16;
4334 case GLSL_TYPE_INT64:
4335 case GLSL_TYPE_UINT64:
4336 return ac->i64;
4337 case GLSL_TYPE_DOUBLE:
4338 return ac->f64;
4339 default:
4340 unreachable("unknown GLSL type");
4341 }
4342 }
4343
4344 static LLVMTypeRef
4345 glsl_to_llvm_type(struct ac_llvm_context *ac,
4346 const struct glsl_type *type)
4347 {
4348 if (glsl_type_is_scalar(type)) {
4349 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4350 }
4351
4352 if (glsl_type_is_vector(type)) {
4353 return LLVMVectorType(
4354 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4355 glsl_get_vector_elements(type));
4356 }
4357
4358 if (glsl_type_is_matrix(type)) {
4359 return LLVMArrayType(
4360 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4361 glsl_get_matrix_columns(type));
4362 }
4363
4364 if (glsl_type_is_array(type)) {
4365 return LLVMArrayType(
4366 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4367 glsl_get_length(type));
4368 }
4369
4370 assert(glsl_type_is_struct_or_ifc(type));
4371
4372 LLVMTypeRef member_types[glsl_get_length(type)];
4373
4374 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4375 member_types[i] =
4376 glsl_to_llvm_type(ac,
4377 glsl_get_struct_field(type, i));
4378 }
4379
4380 return LLVMStructTypeInContext(ac->context, member_types,
4381 glsl_get_length(type), false);
4382 }
4383
4384 static void visit_deref(struct ac_nir_context *ctx,
4385 nir_deref_instr *instr)
4386 {
4387 if (instr->mode != nir_var_mem_shared &&
4388 instr->mode != nir_var_mem_global)
4389 return;
4390
4391 LLVMValueRef result = NULL;
4392 switch(instr->deref_type) {
4393 case nir_deref_type_var: {
4394 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4395 result = entry->data;
4396 break;
4397 }
4398 case nir_deref_type_struct:
4399 if (instr->mode == nir_var_mem_global) {
4400 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4401 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4402 instr->strct.index);
4403 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4404 LLVMConstInt(ctx->ac.i32, offset, 0));
4405 } else {
4406 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4407 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4408 }
4409 break;
4410 case nir_deref_type_array:
4411 if (instr->mode == nir_var_mem_global) {
4412 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4413 unsigned stride = glsl_get_explicit_stride(parent->type);
4414
4415 if ((glsl_type_is_matrix(parent->type) &&
4416 glsl_matrix_type_is_row_major(parent->type)) ||
4417 (glsl_type_is_vector(parent->type) && stride == 0))
4418 stride = type_scalar_size_bytes(parent->type);
4419
4420 assert(stride > 0);
4421 LLVMValueRef index = get_src(ctx, instr->arr.index);
4422 if (LLVMTypeOf(index) != ctx->ac.i64)
4423 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4424
4425 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4426
4427 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4428 } else {
4429 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4430 get_src(ctx, instr->arr.index));
4431 }
4432 break;
4433 case nir_deref_type_ptr_as_array:
4434 if (instr->mode == nir_var_mem_global) {
4435 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4436
4437 LLVMValueRef index = get_src(ctx, instr->arr.index);
4438 if (LLVMTypeOf(index) != ctx->ac.i64)
4439 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4440
4441 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4442
4443 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4444 } else {
4445 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4446 get_src(ctx, instr->arr.index));
4447 }
4448 break;
4449 case nir_deref_type_cast: {
4450 result = get_src(ctx, instr->parent);
4451
4452 /* We can't use the structs from LLVM because the shader
4453 * specifies its own offsets. */
4454 LLVMTypeRef pointee_type = ctx->ac.i8;
4455 if (instr->mode == nir_var_mem_shared)
4456 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4457
4458 unsigned address_space;
4459
4460 switch(instr->mode) {
4461 case nir_var_mem_shared:
4462 address_space = AC_ADDR_SPACE_LDS;
4463 break;
4464 case nir_var_mem_global:
4465 address_space = AC_ADDR_SPACE_GLOBAL;
4466 break;
4467 default:
4468 unreachable("Unhandled address space");
4469 }
4470
4471 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4472
4473 if (LLVMTypeOf(result) != type) {
4474 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4475 result = LLVMBuildBitCast(ctx->ac.builder, result,
4476 type, "");
4477 } else {
4478 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4479 type, "");
4480 }
4481 }
4482 break;
4483 }
4484 default:
4485 unreachable("Unhandled deref_instr deref type");
4486 }
4487
4488 ctx->ssa_defs[instr->dest.ssa.index] = result;
4489 }
4490
4491 static void visit_cf_list(struct ac_nir_context *ctx,
4492 struct exec_list *list);
4493
4494 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4495 {
4496 nir_foreach_instr(instr, block)
4497 {
4498 switch (instr->type) {
4499 case nir_instr_type_alu:
4500 visit_alu(ctx, nir_instr_as_alu(instr));
4501 break;
4502 case nir_instr_type_load_const:
4503 visit_load_const(ctx, nir_instr_as_load_const(instr));
4504 break;
4505 case nir_instr_type_intrinsic:
4506 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4507 break;
4508 case nir_instr_type_tex:
4509 visit_tex(ctx, nir_instr_as_tex(instr));
4510 break;
4511 case nir_instr_type_phi:
4512 visit_phi(ctx, nir_instr_as_phi(instr));
4513 break;
4514 case nir_instr_type_ssa_undef:
4515 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4516 break;
4517 case nir_instr_type_jump:
4518 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4519 break;
4520 case nir_instr_type_deref:
4521 visit_deref(ctx, nir_instr_as_deref(instr));
4522 break;
4523 default:
4524 fprintf(stderr, "Unknown NIR instr type: ");
4525 nir_print_instr(instr, stderr);
4526 fprintf(stderr, "\n");
4527 abort();
4528 }
4529 }
4530
4531 _mesa_hash_table_insert(ctx->defs, block,
4532 LLVMGetInsertBlock(ctx->ac.builder));
4533 }
4534
4535 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4536 {
4537 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4538
4539 nir_block *then_block =
4540 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4541
4542 ac_build_uif(&ctx->ac, value, then_block->index);
4543
4544 visit_cf_list(ctx, &if_stmt->then_list);
4545
4546 if (!exec_list_is_empty(&if_stmt->else_list)) {
4547 nir_block *else_block =
4548 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4549
4550 ac_build_else(&ctx->ac, else_block->index);
4551 visit_cf_list(ctx, &if_stmt->else_list);
4552 }
4553
4554 ac_build_endif(&ctx->ac, then_block->index);
4555 }
4556
4557 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4558 {
4559 nir_block *first_loop_block =
4560 (nir_block *) exec_list_get_head(&loop->body);
4561
4562 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4563
4564 visit_cf_list(ctx, &loop->body);
4565
4566 ac_build_endloop(&ctx->ac, first_loop_block->index);
4567 }
4568
4569 static void visit_cf_list(struct ac_nir_context *ctx,
4570 struct exec_list *list)
4571 {
4572 foreach_list_typed(nir_cf_node, node, node, list)
4573 {
4574 switch (node->type) {
4575 case nir_cf_node_block:
4576 visit_block(ctx, nir_cf_node_as_block(node));
4577 break;
4578
4579 case nir_cf_node_if:
4580 visit_if(ctx, nir_cf_node_as_if(node));
4581 break;
4582
4583 case nir_cf_node_loop:
4584 visit_loop(ctx, nir_cf_node_as_loop(node));
4585 break;
4586
4587 default:
4588 assert(0);
4589 }
4590 }
4591 }
4592
4593 void
4594 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4595 struct ac_shader_abi *abi,
4596 struct nir_shader *nir,
4597 struct nir_variable *variable,
4598 gl_shader_stage stage)
4599 {
4600 unsigned output_loc = variable->data.driver_location / 4;
4601 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4602
4603 /* tess ctrl has it's own load/store paths for outputs */
4604 if (stage == MESA_SHADER_TESS_CTRL)
4605 return;
4606
4607 if (stage == MESA_SHADER_VERTEX ||
4608 stage == MESA_SHADER_TESS_EVAL ||
4609 stage == MESA_SHADER_GEOMETRY) {
4610 int idx = variable->data.location + variable->data.index;
4611 if (idx == VARYING_SLOT_CLIP_DIST0) {
4612 int length = nir->info.clip_distance_array_size +
4613 nir->info.cull_distance_array_size;
4614
4615 if (length > 4)
4616 attrib_count = 2;
4617 else
4618 attrib_count = 1;
4619 }
4620 }
4621
4622 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4623 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4624 for (unsigned i = 0; i < attrib_count; ++i) {
4625 for (unsigned chan = 0; chan < 4; chan++) {
4626 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4627 ac_build_alloca_undef(ctx, type, "");
4628 }
4629 }
4630 }
4631
4632 static void
4633 setup_locals(struct ac_nir_context *ctx,
4634 struct nir_function *func)
4635 {
4636 int i, j;
4637 ctx->num_locals = 0;
4638 nir_foreach_variable(variable, &func->impl->locals) {
4639 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4640 variable->data.driver_location = ctx->num_locals * 4;
4641 variable->data.location_frac = 0;
4642 ctx->num_locals += attrib_count;
4643 }
4644 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4645 if (!ctx->locals)
4646 return;
4647
4648 for (i = 0; i < ctx->num_locals; i++) {
4649 for (j = 0; j < 4; j++) {
4650 ctx->locals[i * 4 + j] =
4651 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4652 }
4653 }
4654 }
4655
4656 static void
4657 setup_scratch(struct ac_nir_context *ctx,
4658 struct nir_shader *shader)
4659 {
4660 if (shader->scratch_size == 0)
4661 return;
4662
4663 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
4664 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
4665 "scratch");
4666 }
4667
4668 static void
4669 setup_constant_data(struct ac_nir_context *ctx,
4670 struct nir_shader *shader)
4671 {
4672 if (!shader->constant_data)
4673 return;
4674
4675 LLVMValueRef data =
4676 LLVMConstStringInContext(ctx->ac.context,
4677 shader->constant_data,
4678 shader->constant_data_size,
4679 true);
4680 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
4681
4682 /* We want to put the constant data in the CONST address space so that
4683 * we can use scalar loads. However, LLVM versions before 10 put these
4684 * variables in the same section as the code, which is unacceptable
4685 * for RadeonSI as it needs to relocate all the data sections after
4686 * the code sections. See https://reviews.llvm.org/D65813.
4687 */
4688 unsigned address_space =
4689 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
4690
4691 LLVMValueRef global =
4692 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
4693 "const_data",
4694 address_space);
4695
4696 LLVMSetInitializer(global, data);
4697 LLVMSetGlobalConstant(global, true);
4698 LLVMSetVisibility(global, LLVMHiddenVisibility);
4699 ctx->constant_data = global;
4700 }
4701
4702 static void
4703 setup_shared(struct ac_nir_context *ctx,
4704 struct nir_shader *nir)
4705 {
4706 nir_foreach_variable(variable, &nir->shared) {
4707 LLVMValueRef shared =
4708 LLVMAddGlobalInAddressSpace(
4709 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4710 variable->name ? variable->name : "",
4711 AC_ADDR_SPACE_LDS);
4712 _mesa_hash_table_insert(ctx->vars, variable, shared);
4713 }
4714 }
4715
4716 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4717 struct nir_shader *nir)
4718 {
4719 struct ac_nir_context ctx = {};
4720 struct nir_function *func;
4721
4722 ctx.ac = *ac;
4723 ctx.abi = abi;
4724
4725 ctx.stage = nir->info.stage;
4726 ctx.info = &nir->info;
4727
4728 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4729
4730 nir_foreach_variable(variable, &nir->outputs)
4731 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4732 ctx.stage);
4733
4734 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4735 _mesa_key_pointer_equal);
4736 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4737 _mesa_key_pointer_equal);
4738 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4739 _mesa_key_pointer_equal);
4740
4741 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4742
4743 nir_index_ssa_defs(func->impl);
4744 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4745
4746 setup_locals(&ctx, func);
4747 setup_scratch(&ctx, nir);
4748 setup_constant_data(&ctx, nir);
4749
4750 if (gl_shader_stage_is_compute(nir->info.stage))
4751 setup_shared(&ctx, nir);
4752
4753 visit_cf_list(&ctx, &func->impl->body);
4754 phi_post_pass(&ctx);
4755
4756 if (!gl_shader_stage_is_compute(nir->info.stage))
4757 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4758 ctx.abi->outputs);
4759
4760 free(ctx.locals);
4761 free(ctx.ssa_defs);
4762 ralloc_free(ctx.defs);
4763 ralloc_free(ctx.phis);
4764 ralloc_free(ctx.vars);
4765 }
4766
4767 void
4768 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4769 {
4770 /* Lower large variables to scratch first so that we won't bloat the
4771 * shader by generating large if ladders for them. We later lower
4772 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
4773 */
4774 NIR_PASS_V(nir, nir_lower_vars_to_scratch,
4775 nir_var_function_temp,
4776 256,
4777 glsl_get_natural_size_align_bytes);
4778
4779 /* While it would be nice not to have this flag, we are constrained
4780 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
4781 */
4782 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
4783
4784 /* TODO: Indirect indexing of GS inputs is unimplemented.
4785 *
4786 * TCS and TES load inputs directly from LDS or offchip memory, so
4787 * indirect indexing is trivial.
4788 */
4789 nir_variable_mode indirect_mask = 0;
4790 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4791 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4792 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4793 !llvm_has_working_vgpr_indexing)) {
4794 indirect_mask |= nir_var_shader_in;
4795 }
4796 if (!llvm_has_working_vgpr_indexing &&
4797 nir->info.stage != MESA_SHADER_TESS_CTRL)
4798 indirect_mask |= nir_var_shader_out;
4799
4800 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4801 * smart enough to handle indirects without causing excess spilling
4802 * causing the gpu to hang.
4803 *
4804 * See the following thread for more details of the problem:
4805 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4806 */
4807 indirect_mask |= nir_var_function_temp;
4808
4809 nir_lower_indirect_derefs(nir, indirect_mask);
4810 }
4811
4812 static unsigned
4813 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4814 {
4815 if (intrin->intrinsic != nir_intrinsic_store_deref)
4816 return 0;
4817
4818 nir_variable *var =
4819 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4820
4821 if (var->data.mode != nir_var_shader_out)
4822 return 0;
4823
4824 unsigned writemask = 0;
4825 const int location = var->data.location;
4826 unsigned first_component = var->data.location_frac;
4827 unsigned num_comps = intrin->dest.ssa.num_components;
4828
4829 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4830 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4831 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4832 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4833
4834 return writemask;
4835 }
4836
4837 static void
4838 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4839 unsigned *cond_block_tf_writemask,
4840 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4841 {
4842 switch (cf_node->type) {
4843 case nir_cf_node_block: {
4844 nir_block *block = nir_cf_node_as_block(cf_node);
4845 nir_foreach_instr(instr, block) {
4846 if (instr->type != nir_instr_type_intrinsic)
4847 continue;
4848
4849 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4850 if (intrin->intrinsic == nir_intrinsic_barrier) {
4851
4852 /* If we find a barrier in nested control flow put this in the
4853 * too hard basket. In GLSL this is not possible but it is in
4854 * SPIR-V.
4855 */
4856 if (is_nested_cf) {
4857 *tessfactors_are_def_in_all_invocs = false;
4858 return;
4859 }
4860
4861 /* The following case must be prevented:
4862 * gl_TessLevelInner = ...;
4863 * barrier();
4864 * if (gl_InvocationID == 1)
4865 * gl_TessLevelInner = ...;
4866 *
4867 * If you consider disjoint code segments separated by barriers, each
4868 * such segment that writes tess factor channels should write the same
4869 * channels in all codepaths within that segment.
4870 */
4871 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4872 /* Accumulate the result: */
4873 *tessfactors_are_def_in_all_invocs &=
4874 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4875
4876 /* Analyze the next code segment from scratch. */
4877 *upper_block_tf_writemask = 0;
4878 *cond_block_tf_writemask = 0;
4879 }
4880 } else
4881 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4882 }
4883
4884 break;
4885 }
4886 case nir_cf_node_if: {
4887 unsigned then_tessfactor_writemask = 0;
4888 unsigned else_tessfactor_writemask = 0;
4889
4890 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4891 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4892 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4893 cond_block_tf_writemask,
4894 tessfactors_are_def_in_all_invocs, true);
4895 }
4896
4897 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4898 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4899 cond_block_tf_writemask,
4900 tessfactors_are_def_in_all_invocs, true);
4901 }
4902
4903 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4904 /* If both statements write the same tess factor channels,
4905 * we can say that the upper block writes them too.
4906 */
4907 *upper_block_tf_writemask |= then_tessfactor_writemask &
4908 else_tessfactor_writemask;
4909 *cond_block_tf_writemask |= then_tessfactor_writemask |
4910 else_tessfactor_writemask;
4911 }
4912
4913 break;
4914 }
4915 case nir_cf_node_loop: {
4916 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4917 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4918 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4919 cond_block_tf_writemask,
4920 tessfactors_are_def_in_all_invocs, true);
4921 }
4922
4923 break;
4924 }
4925 default:
4926 unreachable("unknown cf node type");
4927 }
4928 }
4929
4930 bool
4931 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4932 {
4933 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4934
4935 /* The pass works as follows:
4936 * If all codepaths write tess factors, we can say that all
4937 * invocations define tess factors.
4938 *
4939 * Each tess factor channel is tracked separately.
4940 */
4941 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4942 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4943
4944 /* Initial value = true. Here the pass will accumulate results from
4945 * multiple segments surrounded by barriers. If tess factors aren't
4946 * written at all, it's a shader bug and we don't care if this will be
4947 * true.
4948 */
4949 bool tessfactors_are_def_in_all_invocs = true;
4950
4951 nir_foreach_function(function, nir) {
4952 if (function->impl) {
4953 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4954 scan_tess_ctrl(node, &main_block_tf_writemask,
4955 &cond_block_tf_writemask,
4956 &tessfactors_are_def_in_all_invocs,
4957 false);
4958 }
4959 }
4960 }
4961
4962 /* Accumulate the result for the last code segment separated by a
4963 * barrier.
4964 */
4965 if (main_block_tf_writemask || cond_block_tf_writemask) {
4966 tessfactors_are_def_in_all_invocs &=
4967 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4968 }
4969
4970 return tessfactors_are_def_in_all_invocs;
4971 }