projects / mesa.git / blob
? search:


b08483e5cf4e8e25bc5c54100107deca2caf6232
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41
42 gl_shader_stage stage;
43 shader_info *info;
44
45 LLVMValueRef *ssa_defs;
46
47 LLVMValueRef scratch;
48 LLVMValueRef constant_data;
49
50 struct hash_table *defs;
51 struct hash_table *phis;
52 struct hash_table *vars;
53
54 LLVMValueRef main_function;
55 LLVMBasicBlockRef continue_block;
56 LLVMBasicBlockRef break_block;
57
58 int num_locals;
59 LLVMValueRef *locals;
60 };
61
62 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
63 nir_deref_instr *deref_instr,
64 enum ac_descriptor_type desc_type,
65 const nir_instr *instr,
66 bool image, bool write);
67
68 static void
69 build_store_values_extended(struct ac_llvm_context *ac,
70 LLVMValueRef *values,
71 unsigned value_count,
72 unsigned value_stride,
73 LLVMValueRef vec)
74 {
75 LLVMBuilderRef builder = ac->builder;
76 unsigned i;
77
78 for (i = 0; i < value_count; i++) {
79 LLVMValueRef ptr = values[i * value_stride];
80 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
81 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
82 LLVMBuildStore(builder, value, ptr);
83 }
84 }
85
86 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
87 const nir_ssa_def *def)
88 {
89 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
90 if (def->num_components > 1) {
91 type = LLVMVectorType(type, def->num_components);
92 }
93 return type;
94 }
95
96 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
97 {
98 assert(src.is_ssa);
99 return nir->ssa_defs[src.ssa->index];
100 }
101
102 static LLVMValueRef
103 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
104 {
105 LLVMValueRef ptr = get_src(ctx, src);
106 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
107 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
108
109 return LLVMBuildBitCast(ctx->ac.builder, ptr,
110 LLVMPointerType(ctx->ac.i32, addr_space), "");
111 }
112
113 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
114 const struct nir_block *b)
115 {
116 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
117 return (LLVMBasicBlockRef)entry->data;
118 }
119
120 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
121 nir_alu_src src,
122 unsigned num_components)
123 {
124 LLVMValueRef value = get_src(ctx, src.src);
125 bool need_swizzle = false;
126
127 assert(value);
128 unsigned src_components = ac_get_llvm_num_components(value);
129 for (unsigned i = 0; i < num_components; ++i) {
130 assert(src.swizzle[i] < src_components);
131 if (src.swizzle[i] != i)
132 need_swizzle = true;
133 }
134
135 if (need_swizzle || num_components != src_components) {
136 LLVMValueRef masks[] = {
137 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
138 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
139 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
140 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
141
142 if (src_components > 1 && num_components == 1) {
143 value = LLVMBuildExtractElement(ctx->ac.builder, value,
144 masks[0], "");
145 } else if (src_components == 1 && num_components > 1) {
146 LLVMValueRef values[] = {value, value, value, value};
147 value = ac_build_gather_values(&ctx->ac, values, num_components);
148 } else {
149 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
150 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
151 swizzle, "");
152 }
153 }
154 assert(!src.negate);
155 assert(!src.abs);
156 return value;
157 }
158
159 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
160 LLVMIntPredicate pred, LLVMValueRef src0,
161 LLVMValueRef src1)
162 {
163 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
164 return LLVMBuildSelect(ctx->builder, result,
165 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
166 ctx->i32_0, "");
167 }
168
169 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
170 LLVMRealPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMValueRef result;
174 src0 = ac_to_float(ctx, src0);
175 src1 = ac_to_float(ctx, src1);
176 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
177 return LLVMBuildSelect(ctx->builder, result,
178 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
179 ctx->i32_0, "");
180 }
181
182 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
183 const char *intrin,
184 LLVMTypeRef result_type,
185 LLVMValueRef src0)
186 {
187 char name[64];
188 LLVMValueRef params[] = {
189 ac_to_float(ctx, src0),
190 };
191
192 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
193 ac_get_elem_bits(ctx, result_type));
194 assert(length < sizeof(name));
195 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
196 }
197
198 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
199 const char *intrin,
200 LLVMTypeRef result_type,
201 LLVMValueRef src0, LLVMValueRef src1)
202 {
203 char name[64];
204 LLVMValueRef params[] = {
205 ac_to_float(ctx, src0),
206 ac_to_float(ctx, src1),
207 };
208
209 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
210 ac_get_elem_bits(ctx, result_type));
211 assert(length < sizeof(name));
212 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
213 }
214
215 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
216 const char *intrin,
217 LLVMTypeRef result_type,
218 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
219 {
220 char name[64];
221 LLVMValueRef params[] = {
222 ac_to_float(ctx, src0),
223 ac_to_float(ctx, src1),
224 ac_to_float(ctx, src2),
225 };
226
227 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
228 ac_get_elem_bits(ctx, result_type));
229 assert(length < sizeof(name));
230 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
231 }
232
233 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
234 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
235 {
236 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
237
238 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
239 ctx->i32_0, "");
240 return LLVMBuildSelect(ctx->builder, v,
241 ac_to_integer_or_pointer(ctx, src1),
242 ac_to_integer_or_pointer(ctx, src2), "");
243 }
244
245 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
246 LLVMValueRef src0)
247 {
248 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
249 }
250
251 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
252 const char *intrin,
253 LLVMValueRef src0, LLVMValueRef src1)
254 {
255 LLVMTypeRef ret_type;
256 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
257 LLVMValueRef res;
258 LLVMValueRef params[] = { src0, src1 };
259 ret_type = LLVMStructTypeInContext(ctx->context, types,
260 2, true);
261
262 res = ac_build_intrinsic(ctx, intrin, ret_type,
263 params, 2, AC_FUNC_ATTR_READNONE);
264
265 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
266 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
267 return res;
268 }
269
270 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
271 LLVMValueRef src0,
272 unsigned bitsize)
273 {
274 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
275 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
276 "");
277 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
278
279 switch (bitsize) {
280 case 16:
281 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
282 case 32:
283 return result;
284 case 64:
285 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
286 default:
287 unreachable("Unsupported bit size.");
288 }
289 }
290
291 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
292 LLVMValueRef src0)
293 {
294 src0 = ac_to_float(ctx, src0);
295 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
296 return LLVMBuildSExt(ctx->builder,
297 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
298 ctx->i32, "");
299 }
300
301 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
302 LLVMValueRef src0,
303 unsigned bitsize)
304 {
305 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
306
307 switch (bitsize) {
308 case 8:
309 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
310 case 16:
311 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
312 case 32:
313 return result;
314 case 64:
315 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
316 default:
317 unreachable("Unsupported bit size.");
318 }
319 }
320
321 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
322 LLVMValueRef src0)
323 {
324 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
325 return LLVMBuildSExt(ctx->builder,
326 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
327 ctx->i32, "");
328 }
329
330 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
331 LLVMValueRef src0)
332 {
333 LLVMValueRef result;
334 LLVMValueRef cond = NULL;
335
336 src0 = ac_to_float(ctx, src0);
337 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
338
339 if (ctx->chip_class >= GFX8) {
340 LLVMValueRef args[2];
341 /* Check if the result is a denormal - and flush to 0 if so. */
342 args[0] = result;
343 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
344 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
345 }
346
347 /* need to convert back up to f32 */
348 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
349
350 if (ctx->chip_class >= GFX8)
351 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
352 else {
353 /* for GFX6-GFX7 */
354 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
355 * so compare the result and flush to 0 if it's smaller.
356 */
357 LLVMValueRef temp, cond2;
358 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
359 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
360 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
361 temp, "");
362 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
363 temp, ctx->f32_0, "");
364 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
365 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
366 }
367 return result;
368 }
369
370 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
371 LLVMValueRef src0, LLVMValueRef src1)
372 {
373 LLVMValueRef dst64, result;
374 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
375 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
376
377 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
378 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
379 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
380 return result;
381 }
382
383 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
384 LLVMValueRef src0, LLVMValueRef src1)
385 {
386 LLVMValueRef dst64, result;
387 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
388 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
389
390 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
391 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
392 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
393 return result;
394 }
395
396 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
397 LLVMValueRef bits, LLVMValueRef offset)
398 {
399 /* mask = ((1 << bits) - 1) << offset */
400 return LLVMBuildShl(ctx->builder,
401 LLVMBuildSub(ctx->builder,
402 LLVMBuildShl(ctx->builder,
403 ctx->i32_1,
404 bits, ""),
405 ctx->i32_1, ""),
406 offset, "");
407 }
408
409 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
410 LLVMValueRef mask, LLVMValueRef insert,
411 LLVMValueRef base)
412 {
413 /* Calculate:
414 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
415 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
416 */
417 return LLVMBuildXor(ctx->builder, base,
418 LLVMBuildAnd(ctx->builder, mask,
419 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
420 }
421
422 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
423 LLVMValueRef src0,
424 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
425 LLVMValueRef args[2]))
426 {
427 LLVMValueRef comp[2];
428
429 src0 = ac_to_float(ctx, src0);
430 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
431 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
432
433 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
434 }
435
436 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
437 LLVMValueRef src0)
438 {
439 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
440 LLVMValueRef temps[2], val;
441 int i;
442
443 for (i = 0; i < 2; i++) {
444 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
445 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
446 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
447 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
448 }
449 return ac_build_gather_values(ctx, temps, 2);
450 }
451
452 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
453 nir_op op,
454 LLVMValueRef src0)
455 {
456 unsigned mask;
457 int idx;
458 LLVMValueRef result;
459
460 if (op == nir_op_fddx_fine)
461 mask = AC_TID_MASK_LEFT;
462 else if (op == nir_op_fddy_fine)
463 mask = AC_TID_MASK_TOP;
464 else
465 mask = AC_TID_MASK_TOP_LEFT;
466
467 /* for DDX we want to next X pixel, DDY next Y pixel. */
468 if (op == nir_op_fddx_fine ||
469 op == nir_op_fddx_coarse ||
470 op == nir_op_fddx)
471 idx = 1;
472 else
473 idx = 2;
474
475 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
476 return result;
477 }
478
479 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
480 {
481 LLVMValueRef src[4], result = NULL;
482 unsigned num_components = instr->dest.dest.ssa.num_components;
483 unsigned src_components;
484 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
485
486 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
487 switch (instr->op) {
488 case nir_op_vec2:
489 case nir_op_vec3:
490 case nir_op_vec4:
491 src_components = 1;
492 break;
493 case nir_op_pack_half_2x16:
494 case nir_op_pack_snorm_2x16:
495 case nir_op_pack_unorm_2x16:
496 src_components = 2;
497 break;
498 case nir_op_unpack_half_2x16:
499 src_components = 1;
500 break;
501 case nir_op_cube_face_coord:
502 case nir_op_cube_face_index:
503 src_components = 3;
504 break;
505 default:
506 src_components = num_components;
507 break;
508 }
509 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
510 src[i] = get_alu_src(ctx, instr->src[i], src_components);
511
512 switch (instr->op) {
513 case nir_op_mov:
514 result = src[0];
515 break;
516 case nir_op_fneg:
517 src[0] = ac_to_float(&ctx->ac, src[0]);
518 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
519 break;
520 case nir_op_ineg:
521 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
522 break;
523 case nir_op_inot:
524 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
525 break;
526 case nir_op_iadd:
527 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
528 break;
529 case nir_op_fadd:
530 src[0] = ac_to_float(&ctx->ac, src[0]);
531 src[1] = ac_to_float(&ctx->ac, src[1]);
532 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
533 break;
534 case nir_op_fsub:
535 src[0] = ac_to_float(&ctx->ac, src[0]);
536 src[1] = ac_to_float(&ctx->ac, src[1]);
537 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
538 break;
539 case nir_op_isub:
540 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
541 break;
542 case nir_op_imul:
543 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
544 break;
545 case nir_op_imod:
546 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
547 break;
548 case nir_op_umod:
549 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
550 break;
551 case nir_op_fmod:
552 /* lower_fmod only lower 16-bit and 32-bit fmod */
553 assert(instr->dest.dest.ssa.bit_size == 64);
554 src[0] = ac_to_float(&ctx->ac, src[0]);
555 src[1] = ac_to_float(&ctx->ac, src[1]);
556 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
557 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
558 ac_to_float_type(&ctx->ac, def_type), result);
559 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
560 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
561 break;
562 case nir_op_irem:
563 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
564 break;
565 case nir_op_idiv:
566 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
567 break;
568 case nir_op_udiv:
569 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
570 break;
571 case nir_op_fmul:
572 src[0] = ac_to_float(&ctx->ac, src[0]);
573 src[1] = ac_to_float(&ctx->ac, src[1]);
574 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
575 break;
576 case nir_op_frcp:
577 src[0] = ac_to_float(&ctx->ac, src[0]);
578 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
579 break;
580 case nir_op_iand:
581 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
582 break;
583 case nir_op_ior:
584 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
585 break;
586 case nir_op_ixor:
587 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
588 break;
589 case nir_op_ishl:
590 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
591 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
592 LLVMTypeOf(src[0]), "");
593 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
594 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
595 LLVMTypeOf(src[0]), "");
596 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
597 break;
598 case nir_op_ishr:
599 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
600 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
601 LLVMTypeOf(src[0]), "");
602 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
603 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
604 LLVMTypeOf(src[0]), "");
605 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
606 break;
607 case nir_op_ushr:
608 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
609 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
610 LLVMTypeOf(src[0]), "");
611 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
612 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
613 LLVMTypeOf(src[0]), "");
614 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
615 break;
616 case nir_op_ilt32:
617 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
618 break;
619 case nir_op_ine32:
620 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
621 break;
622 case nir_op_ieq32:
623 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
624 break;
625 case nir_op_ige32:
626 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
627 break;
628 case nir_op_ult32:
629 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
630 break;
631 case nir_op_uge32:
632 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
633 break;
634 case nir_op_feq32:
635 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
636 break;
637 case nir_op_fne32:
638 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
639 break;
640 case nir_op_flt32:
641 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
642 break;
643 case nir_op_fge32:
644 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
645 break;
646 case nir_op_fabs:
647 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
648 ac_to_float_type(&ctx->ac, def_type), src[0]);
649 break;
650 case nir_op_iabs:
651 result = emit_iabs(&ctx->ac, src[0]);
652 break;
653 case nir_op_imax:
654 result = ac_build_imax(&ctx->ac, src[0], src[1]);
655 break;
656 case nir_op_imin:
657 result = ac_build_imin(&ctx->ac, src[0], src[1]);
658 break;
659 case nir_op_umax:
660 result = ac_build_umax(&ctx->ac, src[0], src[1]);
661 break;
662 case nir_op_umin:
663 result = ac_build_umin(&ctx->ac, src[0], src[1]);
664 break;
665 case nir_op_isign:
666 result = ac_build_isign(&ctx->ac, src[0],
667 instr->dest.dest.ssa.bit_size);
668 break;
669 case nir_op_fsign:
670 src[0] = ac_to_float(&ctx->ac, src[0]);
671 result = ac_build_fsign(&ctx->ac, src[0],
672 instr->dest.dest.ssa.bit_size);
673 break;
674 case nir_op_ffloor:
675 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
676 ac_to_float_type(&ctx->ac, def_type), src[0]);
677 break;
678 case nir_op_ftrunc:
679 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
680 ac_to_float_type(&ctx->ac, def_type), src[0]);
681 break;
682 case nir_op_fceil:
683 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
684 ac_to_float_type(&ctx->ac, def_type), src[0]);
685 break;
686 case nir_op_fround_even:
687 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
688 ac_to_float_type(&ctx->ac, def_type),src[0]);
689 break;
690 case nir_op_ffract:
691 src[0] = ac_to_float(&ctx->ac, src[0]);
692 result = ac_build_fract(&ctx->ac, src[0],
693 instr->dest.dest.ssa.bit_size);
694 break;
695 case nir_op_fsin:
696 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
697 ac_to_float_type(&ctx->ac, def_type), src[0]);
698 break;
699 case nir_op_fcos:
700 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
701 ac_to_float_type(&ctx->ac, def_type), src[0]);
702 break;
703 case nir_op_fsqrt:
704 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
705 ac_to_float_type(&ctx->ac, def_type), src[0]);
706 break;
707 case nir_op_fexp2:
708 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
709 ac_to_float_type(&ctx->ac, def_type), src[0]);
710 break;
711 case nir_op_flog2:
712 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
713 ac_to_float_type(&ctx->ac, def_type), src[0]);
714 break;
715 case nir_op_frsq:
716 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
717 ac_to_float_type(&ctx->ac, def_type), src[0]);
718 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
719 break;
720 case nir_op_frexp_exp:
721 src[0] = ac_to_float(&ctx->ac, src[0]);
722 result = ac_build_frexp_exp(&ctx->ac, src[0],
723 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
724 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
725 result = LLVMBuildSExt(ctx->ac.builder, result,
726 ctx->ac.i32, "");
727 break;
728 case nir_op_frexp_sig:
729 src[0] = ac_to_float(&ctx->ac, src[0]);
730 result = ac_build_frexp_mant(&ctx->ac, src[0],
731 instr->dest.dest.ssa.bit_size);
732 break;
733 case nir_op_fpow:
734 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
735 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
736 break;
737 case nir_op_fmax:
738 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
739 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
740 if (ctx->ac.chip_class < GFX9 &&
741 instr->dest.dest.ssa.bit_size == 32) {
742 /* Only pre-GFX9 chips do not flush denorms. */
743 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
744 ac_to_float_type(&ctx->ac, def_type),
745 result);
746 }
747 break;
748 case nir_op_fmin:
749 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
750 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
751 if (ctx->ac.chip_class < GFX9 &&
752 instr->dest.dest.ssa.bit_size == 32) {
753 /* Only pre-GFX9 chips do not flush denorms. */
754 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
755 ac_to_float_type(&ctx->ac, def_type),
756 result);
757 }
758 break;
759 case nir_op_ffma:
760 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
761 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
762 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
763 break;
764 case nir_op_ldexp:
765 src[0] = ac_to_float(&ctx->ac, src[0]);
766 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
767 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
768 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
769 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
770 else
771 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
772 break;
773 case nir_op_bfm:
774 result = emit_bfm(&ctx->ac, src[0], src[1]);
775 break;
776 case nir_op_bitfield_select:
777 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
778 break;
779 case nir_op_ubfe:
780 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
781 break;
782 case nir_op_ibfe:
783 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
784 break;
785 case nir_op_bitfield_reverse:
786 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
787 break;
788 case nir_op_bit_count:
789 result = ac_build_bit_count(&ctx->ac, src[0]);
790 break;
791 case nir_op_vec2:
792 case nir_op_vec3:
793 case nir_op_vec4:
794 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
795 src[i] = ac_to_integer(&ctx->ac, src[i]);
796 result = ac_build_gather_values(&ctx->ac, src, num_components);
797 break;
798 case nir_op_f2i8:
799 case nir_op_f2i16:
800 case nir_op_f2i32:
801 case nir_op_f2i64:
802 src[0] = ac_to_float(&ctx->ac, src[0]);
803 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
804 break;
805 case nir_op_f2u8:
806 case nir_op_f2u16:
807 case nir_op_f2u32:
808 case nir_op_f2u64:
809 src[0] = ac_to_float(&ctx->ac, src[0]);
810 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
811 break;
812 case nir_op_i2f16:
813 case nir_op_i2f32:
814 case nir_op_i2f64:
815 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
816 break;
817 case nir_op_u2f16:
818 case nir_op_u2f32:
819 case nir_op_u2f64:
820 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
821 break;
822 case nir_op_f2f16_rtz:
823 src[0] = ac_to_float(&ctx->ac, src[0]);
824 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
825 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
826 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
827 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
828 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
829 break;
830 case nir_op_f2f16_rtne:
831 case nir_op_f2f16:
832 case nir_op_f2f32:
833 case nir_op_f2f64:
834 src[0] = ac_to_float(&ctx->ac, src[0]);
835 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
836 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
837 else
838 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
839 break;
840 case nir_op_u2u8:
841 case nir_op_u2u16:
842 case nir_op_u2u32:
843 case nir_op_u2u64:
844 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
845 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
846 else
847 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
848 break;
849 case nir_op_i2i8:
850 case nir_op_i2i16:
851 case nir_op_i2i32:
852 case nir_op_i2i64:
853 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
854 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
855 else
856 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
857 break;
858 case nir_op_b32csel:
859 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
860 break;
861 case nir_op_find_lsb:
862 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
863 break;
864 case nir_op_ufind_msb:
865 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
866 break;
867 case nir_op_ifind_msb:
868 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
869 break;
870 case nir_op_uadd_carry:
871 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
872 break;
873 case nir_op_usub_borrow:
874 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
875 break;
876 case nir_op_b2f16:
877 case nir_op_b2f32:
878 case nir_op_b2f64:
879 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
880 break;
881 case nir_op_f2b32:
882 result = emit_f2b(&ctx->ac, src[0]);
883 break;
884 case nir_op_b2i8:
885 case nir_op_b2i16:
886 case nir_op_b2i32:
887 case nir_op_b2i64:
888 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
889 break;
890 case nir_op_i2b32:
891 result = emit_i2b(&ctx->ac, src[0]);
892 break;
893 case nir_op_fquantize2f16:
894 result = emit_f2f16(&ctx->ac, src[0]);
895 break;
896 case nir_op_umul_high:
897 result = emit_umul_high(&ctx->ac, src[0], src[1]);
898 break;
899 case nir_op_imul_high:
900 result = emit_imul_high(&ctx->ac, src[0], src[1]);
901 break;
902 case nir_op_pack_half_2x16:
903 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
904 break;
905 case nir_op_pack_snorm_2x16:
906 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
907 break;
908 case nir_op_pack_unorm_2x16:
909 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
910 break;
911 case nir_op_unpack_half_2x16:
912 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
913 break;
914 case nir_op_fddx:
915 case nir_op_fddy:
916 case nir_op_fddx_fine:
917 case nir_op_fddy_fine:
918 case nir_op_fddx_coarse:
919 case nir_op_fddy_coarse:
920 result = emit_ddxy(ctx, instr->op, src[0]);
921 break;
922
923 case nir_op_unpack_64_2x32_split_x: {
924 assert(ac_get_llvm_num_components(src[0]) == 1);
925 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
926 ctx->ac.v2i32,
927 "");
928 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
929 ctx->ac.i32_0, "");
930 break;
931 }
932
933 case nir_op_unpack_64_2x32_split_y: {
934 assert(ac_get_llvm_num_components(src[0]) == 1);
935 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
936 ctx->ac.v2i32,
937 "");
938 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
939 ctx->ac.i32_1, "");
940 break;
941 }
942
943 case nir_op_pack_64_2x32_split: {
944 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
945 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
946 break;
947 }
948
949 case nir_op_pack_32_2x16_split: {
950 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
951 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
952 break;
953 }
954
955 case nir_op_unpack_32_2x16_split_x: {
956 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
957 ctx->ac.v2i16,
958 "");
959 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
960 ctx->ac.i32_0, "");
961 break;
962 }
963
964 case nir_op_unpack_32_2x16_split_y: {
965 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
966 ctx->ac.v2i16,
967 "");
968 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
969 ctx->ac.i32_1, "");
970 break;
971 }
972
973 case nir_op_cube_face_coord: {
974 src[0] = ac_to_float(&ctx->ac, src[0]);
975 LLVMValueRef results[2];
976 LLVMValueRef in[3];
977 for (unsigned chan = 0; chan < 3; chan++)
978 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
979 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
980 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
981 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
982 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
983 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
984 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
985 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
986 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
987 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
988 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
989 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
990 result = ac_build_gather_values(&ctx->ac, results, 2);
991 break;
992 }
993
994 case nir_op_cube_face_index: {
995 src[0] = ac_to_float(&ctx->ac, src[0]);
996 LLVMValueRef in[3];
997 for (unsigned chan = 0; chan < 3; chan++)
998 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
999 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1000 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1001 break;
1002 }
1003
1004 case nir_op_fmin3:
1005 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1006 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1007 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1008 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1009 break;
1010 case nir_op_umin3:
1011 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1012 result = ac_build_umin(&ctx->ac, result, src[2]);
1013 break;
1014 case nir_op_imin3:
1015 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1016 result = ac_build_imin(&ctx->ac, result, src[2]);
1017 break;
1018 case nir_op_fmax3:
1019 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1020 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1021 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1022 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1023 break;
1024 case nir_op_umax3:
1025 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1026 result = ac_build_umax(&ctx->ac, result, src[2]);
1027 break;
1028 case nir_op_imax3:
1029 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1030 result = ac_build_imax(&ctx->ac, result, src[2]);
1031 break;
1032 case nir_op_fmed3: {
1033 src[0] = ac_to_float(&ctx->ac, src[0]);
1034 src[1] = ac_to_float(&ctx->ac, src[1]);
1035 src[2] = ac_to_float(&ctx->ac, src[2]);
1036 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1037 instr->dest.dest.ssa.bit_size);
1038 break;
1039 }
1040 case nir_op_imed3: {
1041 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1042 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1043 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1044 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1045 break;
1046 }
1047 case nir_op_umed3: {
1048 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1049 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1050 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1051 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1052 break;
1053 }
1054
1055 default:
1056 fprintf(stderr, "Unknown NIR alu instr: ");
1057 nir_print_instr(&instr->instr, stderr);
1058 fprintf(stderr, "\n");
1059 abort();
1060 }
1061
1062 if (result) {
1063 assert(instr->dest.dest.is_ssa);
1064 result = ac_to_integer_or_pointer(&ctx->ac, result);
1065 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1066 }
1067 }
1068
1069 static void visit_load_const(struct ac_nir_context *ctx,
1070 const nir_load_const_instr *instr)
1071 {
1072 LLVMValueRef values[4], value = NULL;
1073 LLVMTypeRef element_type =
1074 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1075
1076 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1077 switch (instr->def.bit_size) {
1078 case 8:
1079 values[i] = LLVMConstInt(element_type,
1080 instr->value[i].u8, false);
1081 break;
1082 case 16:
1083 values[i] = LLVMConstInt(element_type,
1084 instr->value[i].u16, false);
1085 break;
1086 case 32:
1087 values[i] = LLVMConstInt(element_type,
1088 instr->value[i].u32, false);
1089 break;
1090 case 64:
1091 values[i] = LLVMConstInt(element_type,
1092 instr->value[i].u64, false);
1093 break;
1094 default:
1095 fprintf(stderr,
1096 "unsupported nir load_const bit_size: %d\n",
1097 instr->def.bit_size);
1098 abort();
1099 }
1100 }
1101 if (instr->def.num_components > 1) {
1102 value = LLVMConstVector(values, instr->def.num_components);
1103 } else
1104 value = values[0];
1105
1106 ctx->ssa_defs[instr->def.index] = value;
1107 }
1108
1109 static LLVMValueRef
1110 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1111 {
1112 LLVMValueRef size =
1113 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1114 LLVMConstInt(ctx->ac.i32, 2, false), "");
1115
1116 /* GFX8 only */
1117 if (ctx->ac.chip_class == GFX8 && in_elements) {
1118 /* On GFX8, the descriptor contains the size in bytes,
1119 * but TXQ must return the size in elements.
1120 * The stride is always non-zero for resources using TXQ.
1121 */
1122 LLVMValueRef stride =
1123 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1124 ctx->ac.i32_1, "");
1125 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1126 LLVMConstInt(ctx->ac.i32, 16, false), "");
1127 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1128 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1129
1130 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1131 }
1132 return size;
1133 }
1134
1135 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1136 * incorrectly forces nearest filtering if the texture format is integer.
1137 * The only effect it has on Gather4, which always returns 4 texels for
1138 * bilinear filtering, is that the final coordinates are off by 0.5 of
1139 * the texel size.
1140 *
1141 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1142 * or (0.5 / size) from the normalized coordinates.
1143 *
1144 * However, cube textures with 8_8_8_8 data formats require a different
1145 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1146 * precision in 32-bit data formats, so it needs to be applied dynamically at
1147 * runtime. In this case, return an i1 value that indicates whether the
1148 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1149 */
1150 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1151 nir_variable *var,
1152 struct ac_image_args *args,
1153 const nir_tex_instr *instr)
1154 {
1155 const struct glsl_type *type = glsl_without_array(var->type);
1156 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1157 LLVMValueRef wa_8888 = NULL;
1158 LLVMValueRef half_texel[2];
1159 LLVMValueRef result;
1160
1161 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1162
1163 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1164 LLVMValueRef formats;
1165 LLVMValueRef data_format;
1166 LLVMValueRef wa_formats;
1167
1168 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1169
1170 data_format = LLVMBuildLShr(ctx->builder, formats,
1171 LLVMConstInt(ctx->i32, 20, false), "");
1172 data_format = LLVMBuildAnd(ctx->builder, data_format,
1173 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1174 wa_8888 = LLVMBuildICmp(
1175 ctx->builder, LLVMIntEQ, data_format,
1176 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1177 "");
1178
1179 uint32_t wa_num_format =
1180 stype == GLSL_TYPE_UINT ?
1181 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1182 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1183 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1184 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1185 "");
1186 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1187 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1188
1189 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1190 args->resource = LLVMBuildInsertElement(
1191 ctx->builder, args->resource, formats, ctx->i32_1, "");
1192 }
1193
1194 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1195 assert(!wa_8888);
1196 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1197 } else {
1198 struct ac_image_args resinfo = {};
1199 LLVMBasicBlockRef bbs[2];
1200
1201 LLVMValueRef unnorm = NULL;
1202 LLVMValueRef default_offset = ctx->f32_0;
1203 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1204 !instr->is_array) {
1205 /* In vulkan, whether the sampler uses unnormalized
1206 * coordinates or not is a dynamic property of the
1207 * sampler. Hence, to figure out whether or not we
1208 * need to divide by the texture size, we need to test
1209 * the sampler at runtime. This tests the bit set by
1210 * radv_init_sampler().
1211 */
1212 LLVMValueRef sampler0 =
1213 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1214 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1215 LLVMConstInt(ctx->i32, 15, false), "");
1216 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1217 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1218 default_offset = LLVMConstReal(ctx->f32, -0.5);
1219 }
1220
1221 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1222 if (wa_8888 || unnorm) {
1223 assert(!(wa_8888 && unnorm));
1224 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1225 /* Skip the texture size query entirely if we don't need it. */
1226 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1227 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1228 }
1229
1230 /* Query the texture size. */
1231 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1232 resinfo.opcode = ac_image_get_resinfo;
1233 resinfo.dmask = 0xf;
1234 resinfo.lod = ctx->i32_0;
1235 resinfo.resource = args->resource;
1236 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1237 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1238
1239 /* Compute -0.5 / size. */
1240 for (unsigned c = 0; c < 2; c++) {
1241 half_texel[c] =
1242 LLVMBuildExtractElement(ctx->builder, size,
1243 LLVMConstInt(ctx->i32, c, 0), "");
1244 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1245 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1246 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1247 LLVMConstReal(ctx->f32, -0.5), "");
1248 }
1249
1250 if (wa_8888 || unnorm) {
1251 ac_build_endif(ctx, 2000);
1252
1253 for (unsigned c = 0; c < 2; c++) {
1254 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1255 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1256 values, bbs);
1257 }
1258 }
1259 }
1260
1261 for (unsigned c = 0; c < 2; c++) {
1262 LLVMValueRef tmp;
1263 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1264 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1265 }
1266
1267 args->attributes = AC_FUNC_ATTR_READNONE;
1268 result = ac_build_image_opcode(ctx, args);
1269
1270 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1271 LLVMValueRef tmp, tmp2;
1272
1273 /* if the cube workaround is in place, f2i the result. */
1274 for (unsigned c = 0; c < 4; c++) {
1275 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1276 if (stype == GLSL_TYPE_UINT)
1277 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1278 else
1279 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1280 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1281 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1282 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1283 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1284 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1285 }
1286 }
1287 return result;
1288 }
1289
1290 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1291 {
1292 nir_deref_instr *texture_deref_instr = NULL;
1293
1294 for (unsigned i = 0; i < instr->num_srcs; i++) {
1295 switch (instr->src[i].src_type) {
1296 case nir_tex_src_texture_deref:
1297 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1298 break;
1299 default:
1300 break;
1301 }
1302 }
1303 return texture_deref_instr;
1304 }
1305
1306 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1307 const nir_tex_instr *instr,
1308 struct ac_image_args *args)
1309 {
1310 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1311 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1312
1313 return ac_build_buffer_load_format(&ctx->ac,
1314 args->resource,
1315 args->coords[0],
1316 ctx->ac.i32_0,
1317 util_last_bit(mask),
1318 0, true);
1319 }
1320
1321 args->opcode = ac_image_sample;
1322
1323 switch (instr->op) {
1324 case nir_texop_txf:
1325 case nir_texop_txf_ms:
1326 case nir_texop_samples_identical:
1327 args->opcode = args->level_zero ||
1328 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1329 ac_image_load : ac_image_load_mip;
1330 args->level_zero = false;
1331 break;
1332 case nir_texop_txs:
1333 case nir_texop_query_levels:
1334 args->opcode = ac_image_get_resinfo;
1335 if (!args->lod)
1336 args->lod = ctx->ac.i32_0;
1337 args->level_zero = false;
1338 break;
1339 case nir_texop_tex:
1340 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1341 assert(!args->lod);
1342 args->level_zero = true;
1343 }
1344 break;
1345 case nir_texop_tg4:
1346 args->opcode = ac_image_gather4;
1347 args->level_zero = true;
1348 break;
1349 case nir_texop_lod:
1350 args->opcode = ac_image_get_lod;
1351 break;
1352 default:
1353 break;
1354 }
1355
1356 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1357 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1358 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1359 const struct glsl_type *type = glsl_without_array(var->type);
1360 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1361 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1362 return lower_gather4_integer(&ctx->ac, var, args, instr);
1363 }
1364 }
1365
1366 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1367 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1368 if ((args->dim == ac_image_2darray ||
1369 args->dim == ac_image_2d) && !args->coords[1]) {
1370 args->coords[1] = ctx->ac.i32_0;
1371 }
1372 }
1373
1374 args->attributes = AC_FUNC_ATTR_READNONE;
1375 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1376 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1377 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1378 /* Prevent texture instructions with implicit derivatives from being
1379 * sinked into branches. */
1380 switch (instr->op) {
1381 case nir_texop_tex:
1382 case nir_texop_txb:
1383 case nir_texop_lod:
1384 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1385 break;
1386 default:
1387 break;
1388 }
1389 }
1390
1391 return ac_build_image_opcode(&ctx->ac, args);
1392 }
1393
1394 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1395 nir_intrinsic_instr *instr)
1396 {
1397 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1398 LLVMValueRef index = get_src(ctx, instr->src[1]);
1399
1400 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1401 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1402 return result;
1403 }
1404
1405 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1406 nir_intrinsic_instr *instr)
1407 {
1408 LLVMValueRef ptr, addr;
1409 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1410 unsigned index = nir_intrinsic_base(instr);
1411
1412 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1413 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1414
1415 /* Load constant values from user SGPRS when possible, otherwise
1416 * fallback to the default path that loads directly from memory.
1417 */
1418 if (LLVMIsConstant(src0) &&
1419 instr->dest.ssa.bit_size == 32) {
1420 unsigned count = instr->dest.ssa.num_components;
1421 unsigned offset = index;
1422
1423 offset += LLVMConstIntGetZExtValue(src0);
1424 offset /= 4;
1425
1426 offset -= ctx->abi->base_inline_push_consts;
1427
1428 if (offset + count <= ctx->abi->num_inline_push_consts) {
1429 return ac_build_gather_values(&ctx->ac,
1430 ctx->abi->inline_push_consts + offset,
1431 count);
1432 }
1433 }
1434
1435 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1436
1437 if (instr->dest.ssa.bit_size == 8) {
1438 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1439 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1440 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1441 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1442
1443 LLVMValueRef params[3];
1444 if (load_dwords > 1) {
1445 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1446 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1447 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1448 } else {
1449 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1450 params[0] = ctx->ac.i32_0;
1451 params[1] = res;
1452 }
1453 params[2] = addr;
1454 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1455
1456 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1457 if (instr->dest.ssa.num_components > 1)
1458 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1459 return res;
1460 } else if (instr->dest.ssa.bit_size == 16) {
1461 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1462 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1463 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1464 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1465 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1466 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1467 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1468 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1469 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1470 LLVMConstInt(ctx->ac.i32, 4, false)};
1471 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1472 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1473 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1474 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1475 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1476 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1477 }
1478
1479 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1480
1481 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1482 }
1483
1484 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1485 const nir_intrinsic_instr *instr)
1486 {
1487 LLVMValueRef index = get_src(ctx, instr->src[0]);
1488
1489 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1490 }
1491
1492 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1493 {
1494 uint32_t new_mask = 0;
1495 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1496 if (mask & (1u << i))
1497 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1498 return new_mask;
1499 }
1500
1501 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1502 unsigned start, unsigned count)
1503 {
1504 LLVMValueRef mask[] = {
1505 ctx->i32_0, ctx->i32_1,
1506 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1507
1508 unsigned src_elements = ac_get_llvm_num_components(src);
1509
1510 if (count == src_elements) {
1511 assert(start == 0);
1512 return src;
1513 } else if (count == 1) {
1514 assert(start < src_elements);
1515 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1516 } else {
1517 assert(start + count <= src_elements);
1518 assert(count <= 4);
1519 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1520 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1521 }
1522 }
1523
1524 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1525 enum gl_access_qualifier access,
1526 bool may_store_unaligned,
1527 bool writeonly_memory)
1528 {
1529 unsigned cache_policy = 0;
1530
1531 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1532 * store opcodes not aligned to a dword are affected. The only way to
1533 * get unaligned stores is through shader images.
1534 */
1535 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1536 /* If this is write-only, don't keep data in L1 to prevent
1537 * evicting L1 cache lines that may be needed by other
1538 * instructions.
1539 */
1540 writeonly_memory ||
1541 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1542 cache_policy |= ac_glc;
1543 }
1544
1545 if (access & ACCESS_STREAM_CACHE_POLICY)
1546 cache_policy |= ac_slc;
1547
1548 return cache_policy;
1549 }
1550
1551 static void visit_store_ssbo(struct ac_nir_context *ctx,
1552 nir_intrinsic_instr *instr)
1553 {
1554 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1555 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1556 unsigned writemask = nir_intrinsic_write_mask(instr);
1557 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1558 bool writeonly_memory = access & ACCESS_NON_READABLE;
1559 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1560
1561 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1562 get_src(ctx, instr->src[1]), true);
1563 LLVMValueRef base_data = src_data;
1564 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1565 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1566
1567 while (writemask) {
1568 int start, count;
1569 LLVMValueRef data, offset;
1570 LLVMTypeRef data_type;
1571
1572 u_bit_scan_consecutive_range(&writemask, &start, &count);
1573
1574 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1575 * writes into a 2-element and a 1-element write. */
1576 if (count == 3 &&
1577 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1578 writemask |= 1 << (start + 2);
1579 count = 2;
1580 }
1581 int num_bytes = count * elem_size_bytes; /* count in bytes */
1582
1583 /* we can only store 4 DWords at the same time.
1584 * can only happen for 64 Bit vectors. */
1585 if (num_bytes > 16) {
1586 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1587 count = 2;
1588 num_bytes = 16;
1589 }
1590
1591 /* check alignment of 16 Bit stores */
1592 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1593 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1594 count = 1;
1595 num_bytes = 2;
1596 }
1597 data = extract_vector_range(&ctx->ac, base_data, start, count);
1598
1599 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1600 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1601
1602 if (num_bytes == 1) {
1603 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1604 offset, ctx->ac.i32_0,
1605 cache_policy);
1606 } else if (num_bytes == 2) {
1607 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1608 offset, ctx->ac.i32_0,
1609 cache_policy);
1610 } else {
1611 int num_channels = num_bytes / 4;
1612
1613 switch (num_bytes) {
1614 case 16: /* v4f32 */
1615 data_type = ctx->ac.v4f32;
1616 break;
1617 case 12: /* v3f32 */
1618 data_type = ctx->ac.v3f32;
1619 break;
1620 case 8: /* v2f32 */
1621 data_type = ctx->ac.v2f32;
1622 break;
1623 case 4: /* f32 */
1624 data_type = ctx->ac.f32;
1625 break;
1626 default:
1627 unreachable("Malformed vector store.");
1628 }
1629 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1630
1631 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1632 num_channels, offset,
1633 ctx->ac.i32_0, 0,
1634 cache_policy, false);
1635 }
1636 }
1637 }
1638
1639 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1640 LLVMValueRef descriptor,
1641 LLVMValueRef offset,
1642 LLVMValueRef compare,
1643 LLVMValueRef exchange)
1644 {
1645 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1646 if (ctx->abi->robust_buffer_access) {
1647 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1648
1649 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1650 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1651
1652 ac_build_ifcc(&ctx->ac, cond, -1);
1653
1654 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1655 }
1656
1657 LLVMValueRef ptr_parts[2] = {
1658 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1659 LLVMBuildAnd(ctx->ac.builder,
1660 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1661 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1662 };
1663
1664 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1665 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1666
1667 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1668
1669 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1670 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1671 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1672 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1673
1674 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1675 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1676
1677 if (ctx->abi->robust_buffer_access) {
1678 ac_build_endif(&ctx->ac, -1);
1679
1680 LLVMBasicBlockRef incoming_blocks[2] = {
1681 start_block,
1682 then_block,
1683 };
1684
1685 LLVMValueRef incoming_values[2] = {
1686 LLVMConstInt(ctx->ac.i64, 0, 0),
1687 result,
1688 };
1689 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1690 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1691 return ret;
1692 } else {
1693 return result;
1694 }
1695 }
1696
1697 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1698 const nir_intrinsic_instr *instr)
1699 {
1700 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1701 const char *op;
1702 char name[64], type[8];
1703 LLVMValueRef params[6], descriptor;
1704 int arg_count = 0;
1705
1706 switch (instr->intrinsic) {
1707 case nir_intrinsic_ssbo_atomic_add:
1708 op = "add";
1709 break;
1710 case nir_intrinsic_ssbo_atomic_imin:
1711 op = "smin";
1712 break;
1713 case nir_intrinsic_ssbo_atomic_umin:
1714 op = "umin";
1715 break;
1716 case nir_intrinsic_ssbo_atomic_imax:
1717 op = "smax";
1718 break;
1719 case nir_intrinsic_ssbo_atomic_umax:
1720 op = "umax";
1721 break;
1722 case nir_intrinsic_ssbo_atomic_and:
1723 op = "and";
1724 break;
1725 case nir_intrinsic_ssbo_atomic_or:
1726 op = "or";
1727 break;
1728 case nir_intrinsic_ssbo_atomic_xor:
1729 op = "xor";
1730 break;
1731 case nir_intrinsic_ssbo_atomic_exchange:
1732 op = "swap";
1733 break;
1734 case nir_intrinsic_ssbo_atomic_comp_swap:
1735 op = "cmpswap";
1736 break;
1737 default:
1738 abort();
1739 }
1740
1741 descriptor = ctx->abi->load_ssbo(ctx->abi,
1742 get_src(ctx, instr->src[0]),
1743 true);
1744
1745 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1746 return_type == ctx->ac.i64) {
1747 return emit_ssbo_comp_swap_64(ctx, descriptor,
1748 get_src(ctx, instr->src[1]),
1749 get_src(ctx, instr->src[2]),
1750 get_src(ctx, instr->src[3]));
1751 }
1752 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1753 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1754 }
1755 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1756 params[arg_count++] = descriptor;
1757
1758 if (LLVM_VERSION_MAJOR >= 9) {
1759 /* XXX: The new raw/struct atomic intrinsics are buggy with
1760 * LLVM 8, see r358579.
1761 */
1762 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1763 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1764 params[arg_count++] = ctx->ac.i32_0; /* slc */
1765
1766 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1767 snprintf(name, sizeof(name),
1768 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1769 } else {
1770 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1771 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1772 params[arg_count++] = ctx->ac.i1false; /* slc */
1773
1774 assert(return_type == ctx->ac.i32);
1775 snprintf(name, sizeof(name),
1776 "llvm.amdgcn.buffer.atomic.%s", op);
1777 }
1778
1779 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1780 arg_count, 0);
1781 }
1782
1783 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1784 const nir_intrinsic_instr *instr)
1785 {
1786 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1787 int num_components = instr->num_components;
1788 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1789 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1790
1791 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1792 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1793 get_src(ctx, instr->src[0]), false);
1794 LLVMValueRef vindex = ctx->ac.i32_0;
1795
1796 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1797 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1798
1799 LLVMValueRef results[4];
1800 for (int i = 0; i < num_components;) {
1801 int num_elems = num_components - i;
1802 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1803 num_elems = 1;
1804 if (num_elems * elem_size_bytes > 16)
1805 num_elems = 16 / elem_size_bytes;
1806 int load_bytes = num_elems * elem_size_bytes;
1807
1808 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1809
1810 LLVMValueRef ret;
1811
1812 if (load_bytes == 1) {
1813 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1814 rsrc,
1815 offset,
1816 ctx->ac.i32_0,
1817 immoffset,
1818 cache_policy);
1819 } else if (load_bytes == 2) {
1820 ret = ac_build_tbuffer_load_short(&ctx->ac,
1821 rsrc,
1822 offset,
1823 ctx->ac.i32_0,
1824 immoffset,
1825 cache_policy);
1826 } else {
1827 int num_channels = util_next_power_of_two(load_bytes) / 4;
1828 bool can_speculate = access & ACCESS_CAN_REORDER;
1829
1830 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1831 vindex, offset, immoffset, 0,
1832 cache_policy, can_speculate, false);
1833 }
1834
1835 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1836 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1837 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1838
1839 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1840 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1841
1842 for (unsigned j = 0; j < num_elems; j++) {
1843 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1844 }
1845 i += num_elems;
1846 }
1847
1848 return ac_build_gather_values(&ctx->ac, results, num_components);
1849 }
1850
1851 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1852 const nir_intrinsic_instr *instr)
1853 {
1854 LLVMValueRef ret;
1855 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1856 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1857 int num_components = instr->num_components;
1858
1859 if (ctx->abi->load_ubo)
1860 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1861
1862 if (instr->dest.ssa.bit_size == 64)
1863 num_components *= 2;
1864
1865 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1866 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1867 LLVMValueRef results[num_components];
1868 for (unsigned i = 0; i < num_components; ++i) {
1869 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1870 load_bytes * i, 0);
1871
1872 if (load_bytes == 1) {
1873 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1874 rsrc,
1875 offset,
1876 ctx->ac.i32_0,
1877 immoffset,
1878 0);
1879 } else {
1880 assert(load_bytes == 2);
1881 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1882 rsrc,
1883 offset,
1884 ctx->ac.i32_0,
1885 immoffset,
1886 0);
1887 }
1888 }
1889 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1890 } else {
1891 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1892 NULL, 0, 0, true, true);
1893
1894 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1895 }
1896
1897 return LLVMBuildBitCast(ctx->ac.builder, ret,
1898 get_def_type(ctx, &instr->dest.ssa), "");
1899 }
1900
1901 static void
1902 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1903 bool vs_in, unsigned *vertex_index_out,
1904 LLVMValueRef *vertex_index_ref,
1905 unsigned *const_out, LLVMValueRef *indir_out)
1906 {
1907 nir_variable *var = nir_deref_instr_get_variable(instr);
1908 nir_deref_path path;
1909 unsigned idx_lvl = 1;
1910
1911 nir_deref_path_init(&path, instr, NULL);
1912
1913 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1914 if (vertex_index_ref) {
1915 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1916 if (vertex_index_out)
1917 *vertex_index_out = 0;
1918 } else {
1919 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1920 }
1921 ++idx_lvl;
1922 }
1923
1924 uint32_t const_offset = 0;
1925 LLVMValueRef offset = NULL;
1926
1927 if (var->data.compact) {
1928 assert(instr->deref_type == nir_deref_type_array);
1929 const_offset = nir_src_as_uint(instr->arr.index);
1930 goto out;
1931 }
1932
1933 for (; path.path[idx_lvl]; ++idx_lvl) {
1934 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1935 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1936 unsigned index = path.path[idx_lvl]->strct.index;
1937
1938 for (unsigned i = 0; i < index; i++) {
1939 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1940 const_offset += glsl_count_attribute_slots(ft, vs_in);
1941 }
1942 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1943 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1944 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
1945 const_offset += size *
1946 nir_src_as_uint(path.path[idx_lvl]->arr.index);
1947 } else {
1948 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1949 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1950 if (offset)
1951 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1952 else
1953 offset = array_off;
1954 }
1955 } else
1956 unreachable("Uhandled deref type in get_deref_instr_offset");
1957 }
1958
1959 out:
1960 nir_deref_path_finish(&path);
1961
1962 if (const_offset && offset)
1963 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1964 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1965 "");
1966
1967 *const_out = const_offset;
1968 *indir_out = offset;
1969 }
1970
1971 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1972 nir_intrinsic_instr *instr,
1973 bool load_inputs)
1974 {
1975 LLVMValueRef result;
1976 LLVMValueRef vertex_index = NULL;
1977 LLVMValueRef indir_index = NULL;
1978 unsigned const_index = 0;
1979
1980 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1981
1982 unsigned location = var->data.location;
1983 unsigned driver_location = var->data.driver_location;
1984 const bool is_patch = var->data.patch;
1985 const bool is_compact = var->data.compact;
1986
1987 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1988 false, NULL, is_patch ? NULL : &vertex_index,
1989 &const_index, &indir_index);
1990
1991 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1992
1993 LLVMTypeRef src_component_type;
1994 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1995 src_component_type = LLVMGetElementType(dest_type);
1996 else
1997 src_component_type = dest_type;
1998
1999 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2000 vertex_index, indir_index,
2001 const_index, location, driver_location,
2002 var->data.location_frac,
2003 instr->num_components,
2004 is_patch, is_compact, load_inputs);
2005 if (instr->dest.ssa.bit_size == 16) {
2006 result = ac_to_integer(&ctx->ac, result);
2007 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2008 }
2009 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2010 }
2011
2012 static unsigned
2013 type_scalar_size_bytes(const struct glsl_type *type)
2014 {
2015 assert(glsl_type_is_vector_or_scalar(type) ||
2016 glsl_type_is_matrix(type));
2017 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2018 }
2019
2020 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2021 nir_intrinsic_instr *instr)
2022 {
2023 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2024 nir_variable *var = nir_deref_instr_get_variable(deref);
2025
2026 LLVMValueRef values[8];
2027 int idx = 0;
2028 int ve = instr->dest.ssa.num_components;
2029 unsigned comp = 0;
2030 LLVMValueRef indir_index;
2031 LLVMValueRef ret;
2032 unsigned const_index;
2033 unsigned stride = 4;
2034 int mode = deref->mode;
2035
2036 if (var) {
2037 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2038 var->data.mode == nir_var_shader_in;
2039 idx = var->data.driver_location;
2040 comp = var->data.location_frac;
2041 mode = var->data.mode;
2042
2043 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2044 &const_index, &indir_index);
2045
2046 if (var->data.compact) {
2047 stride = 1;
2048 const_index += comp;
2049 comp = 0;
2050 }
2051 }
2052
2053 if (instr->dest.ssa.bit_size == 64 &&
2054 (deref->mode == nir_var_shader_in ||
2055 deref->mode == nir_var_shader_out ||
2056 deref->mode == nir_var_function_temp))
2057 ve *= 2;
2058
2059 switch (mode) {
2060 case nir_var_shader_in:
2061 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2062 ctx->stage == MESA_SHADER_TESS_EVAL) {
2063 return load_tess_varyings(ctx, instr, true);
2064 }
2065
2066 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2067 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2068 LLVMValueRef indir_index;
2069 unsigned const_index, vertex_index;
2070 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2071 &const_index, &indir_index);
2072 assert(indir_index == NULL);
2073
2074 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2075 var->data.driver_location,
2076 var->data.location_frac,
2077 instr->num_components, vertex_index, const_index, type);
2078 }
2079
2080 for (unsigned chan = comp; chan < ve + comp; chan++) {
2081 if (indir_index) {
2082 unsigned count = glsl_count_attribute_slots(
2083 var->type,
2084 ctx->stage == MESA_SHADER_VERTEX);
2085 count -= chan / 4;
2086 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2087 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2088 stride, false, true);
2089
2090 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2091 tmp_vec,
2092 indir_index, "");
2093 } else
2094 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2095 }
2096 break;
2097 case nir_var_function_temp:
2098 for (unsigned chan = 0; chan < ve; chan++) {
2099 if (indir_index) {
2100 unsigned count = glsl_count_attribute_slots(
2101 var->type, false);
2102 count -= chan / 4;
2103 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2104 &ctx->ac, ctx->locals + idx + chan, count,
2105 stride, true, true);
2106
2107 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2108 tmp_vec,
2109 indir_index, "");
2110 } else {
2111 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2112 }
2113 }
2114 break;
2115 case nir_var_mem_shared: {
2116 LLVMValueRef address = get_src(ctx, instr->src[0]);
2117 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2118 return LLVMBuildBitCast(ctx->ac.builder, val,
2119 get_def_type(ctx, &instr->dest.ssa),
2120 "");
2121 }
2122 case nir_var_shader_out:
2123 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2124 return load_tess_varyings(ctx, instr, false);
2125 }
2126
2127 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2128 var->data.fb_fetch_output &&
2129 ctx->abi->emit_fbfetch)
2130 return ctx->abi->emit_fbfetch(ctx->abi);
2131
2132 for (unsigned chan = comp; chan < ve + comp; chan++) {
2133 if (indir_index) {
2134 unsigned count = glsl_count_attribute_slots(
2135 var->type, false);
2136 count -= chan / 4;
2137 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2138 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2139 stride, true, true);
2140
2141 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2142 tmp_vec,
2143 indir_index, "");
2144 } else {
2145 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2146 ctx->abi->outputs[idx + chan + const_index * stride],
2147 "");
2148 }
2149 }
2150 break;
2151 case nir_var_mem_global: {
2152 LLVMValueRef address = get_src(ctx, instr->src[0]);
2153 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2154 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2155 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2156
2157 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2158 if (stride != natural_stride) {
2159 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2160 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2161 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2162
2163 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2164 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2165 values[i] = LLVMBuildLoad(ctx->ac.builder,
2166 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2167 }
2168 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2169 } else {
2170 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2171 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2172 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2173 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2174 return val;
2175 }
2176 }
2177 default:
2178 unreachable("unhandle variable mode");
2179 }
2180 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2181 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2182 }
2183
2184 static void
2185 visit_store_var(struct ac_nir_context *ctx,
2186 nir_intrinsic_instr *instr)
2187 {
2188 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2189 nir_variable *var = nir_deref_instr_get_variable(deref);
2190
2191 LLVMValueRef temp_ptr, value;
2192 int idx = 0;
2193 unsigned comp = 0;
2194 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2195 int writemask = instr->const_index[0];
2196 LLVMValueRef indir_index;
2197 unsigned const_index;
2198
2199 if (var) {
2200 get_deref_offset(ctx, deref, false,
2201 NULL, NULL, &const_index, &indir_index);
2202 idx = var->data.driver_location;
2203 comp = var->data.location_frac;
2204
2205 if (var->data.compact) {
2206 const_index += comp;
2207 comp = 0;
2208 }
2209 }
2210
2211 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2212 (deref->mode == nir_var_shader_out ||
2213 deref->mode == nir_var_function_temp)) {
2214
2215 src = LLVMBuildBitCast(ctx->ac.builder, src,
2216 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2217 "");
2218
2219 writemask = widen_mask(writemask, 2);
2220 }
2221
2222 writemask = writemask << comp;
2223
2224 switch (deref->mode) {
2225 case nir_var_shader_out:
2226
2227 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2228 LLVMValueRef vertex_index = NULL;
2229 LLVMValueRef indir_index = NULL;
2230 unsigned const_index = 0;
2231 const bool is_patch = var->data.patch;
2232
2233 get_deref_offset(ctx, deref, false, NULL,
2234 is_patch ? NULL : &vertex_index,
2235 &const_index, &indir_index);
2236
2237 ctx->abi->store_tcs_outputs(ctx->abi, var,
2238 vertex_index, indir_index,
2239 const_index, src, writemask);
2240 return;
2241 }
2242
2243 for (unsigned chan = 0; chan < 8; chan++) {
2244 int stride = 4;
2245 if (!(writemask & (1 << chan)))
2246 continue;
2247
2248 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2249
2250 if (var->data.compact)
2251 stride = 1;
2252 if (indir_index) {
2253 unsigned count = glsl_count_attribute_slots(
2254 var->type, false);
2255 count -= chan / 4;
2256 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2257 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2258 stride, true, true);
2259
2260 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2261 value, indir_index, "");
2262 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2263 count, stride, tmp_vec);
2264
2265 } else {
2266 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2267
2268 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2269 }
2270 }
2271 break;
2272 case nir_var_function_temp:
2273 for (unsigned chan = 0; chan < 8; chan++) {
2274 if (!(writemask & (1 << chan)))
2275 continue;
2276
2277 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2278 if (indir_index) {
2279 unsigned count = glsl_count_attribute_slots(
2280 var->type, false);
2281 count -= chan / 4;
2282 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2283 &ctx->ac, ctx->locals + idx + chan, count,
2284 4, true, true);
2285
2286 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2287 value, indir_index, "");
2288 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2289 count, 4, tmp_vec);
2290 } else {
2291 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2292
2293 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2294 }
2295 }
2296 break;
2297
2298 case nir_var_mem_global:
2299 case nir_var_mem_shared: {
2300 int writemask = instr->const_index[0];
2301 LLVMValueRef address = get_src(ctx, instr->src[0]);
2302 LLVMValueRef val = get_src(ctx, instr->src[1]);
2303
2304 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2305 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2306 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2307
2308 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2309 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2310 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2311
2312 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2313 stride == natural_stride) {
2314 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2315 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2316 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2317
2318 val = LLVMBuildBitCast(ctx->ac.builder, val,
2319 LLVMGetElementType(LLVMTypeOf(address)), "");
2320 LLVMBuildStore(ctx->ac.builder, val, address);
2321 } else {
2322 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2323 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2324 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2325 for (unsigned chan = 0; chan < 4; chan++) {
2326 if (!(writemask & (1 << chan)))
2327 continue;
2328
2329 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2330
2331 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2332 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2333 chan);
2334 src = LLVMBuildBitCast(ctx->ac.builder, src,
2335 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2336 LLVMBuildStore(ctx->ac.builder, src, ptr);
2337 }
2338 }
2339 break;
2340 }
2341 default:
2342 abort();
2343 break;
2344 }
2345 }
2346
2347 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2348 {
2349 switch (dim) {
2350 case GLSL_SAMPLER_DIM_BUF:
2351 return 1;
2352 case GLSL_SAMPLER_DIM_1D:
2353 return array ? 2 : 1;
2354 case GLSL_SAMPLER_DIM_2D:
2355 return array ? 3 : 2;
2356 case GLSL_SAMPLER_DIM_MS:
2357 return array ? 4 : 3;
2358 case GLSL_SAMPLER_DIM_3D:
2359 case GLSL_SAMPLER_DIM_CUBE:
2360 return 3;
2361 case GLSL_SAMPLER_DIM_RECT:
2362 case GLSL_SAMPLER_DIM_SUBPASS:
2363 return 2;
2364 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2365 return 3;
2366 default:
2367 break;
2368 }
2369 return 0;
2370 }
2371
2372 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2373 LLVMValueRef coord_x, LLVMValueRef coord_y,
2374 LLVMValueRef coord_z,
2375 LLVMValueRef sample_index,
2376 LLVMValueRef fmask_desc_ptr)
2377 {
2378 unsigned sample_chan = coord_z ? 3 : 2;
2379 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2380 addr[sample_chan] = sample_index;
2381
2382 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2383 return addr[sample_chan];
2384 }
2385
2386 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2387 {
2388 assert(instr->src[0].is_ssa);
2389 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2390 }
2391
2392 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2393 const nir_intrinsic_instr *instr,
2394 enum ac_descriptor_type desc_type,
2395 bool write)
2396 {
2397 nir_deref_instr *deref_instr =
2398 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2399 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2400
2401 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2402 }
2403
2404 static void get_image_coords(struct ac_nir_context *ctx,
2405 const nir_intrinsic_instr *instr,
2406 struct ac_image_args *args,
2407 enum glsl_sampler_dim dim,
2408 bool is_array)
2409 {
2410 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2411 LLVMValueRef masks[] = {
2412 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2413 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2414 };
2415 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2416
2417 int count;
2418 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2419 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2420 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2421 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2422 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2423 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2424 count = image_type_to_components_count(dim, is_array);
2425
2426 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2427 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2428 LLVMValueRef fmask_load_address[3];
2429
2430 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2431 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2432 if (is_array)
2433 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2434 else
2435 fmask_load_address[2] = NULL;
2436
2437 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2438 fmask_load_address[0],
2439 fmask_load_address[1],
2440 fmask_load_address[2],
2441 sample_index,
2442 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2443 AC_DESC_FMASK, &instr->instr, true, false));
2444 }
2445 if (count == 1 && !gfx9_1d) {
2446 if (instr->src[1].ssa->num_components)
2447 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2448 else
2449 args->coords[0] = src0;
2450 } else {
2451 int chan;
2452 if (is_ms)
2453 count--;
2454 for (chan = 0; chan < count; ++chan) {
2455 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2456 }
2457
2458 if (gfx9_1d) {
2459 if (is_array) {
2460 args->coords[2] = args->coords[1];
2461 args->coords[1] = ctx->ac.i32_0;
2462 } else
2463 args->coords[1] = ctx->ac.i32_0;
2464 count++;
2465 }
2466 if (ctx->ac.chip_class == GFX9 &&
2467 dim == GLSL_SAMPLER_DIM_2D &&
2468 !is_array) {
2469 /* The hw can't bind a slice of a 3D image as a 2D
2470 * image, because it ignores BASE_ARRAY if the target
2471 * is 3D. The workaround is to read BASE_ARRAY and set
2472 * it as the 3rd address operand for all 2D images.
2473 */
2474 LLVMValueRef first_layer, const5, mask;
2475
2476 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2477 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2478 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2479 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2480
2481 args->coords[count] = first_layer;
2482 count++;
2483 }
2484
2485
2486 if (is_ms) {
2487 args->coords[count] = sample_index;
2488 count++;
2489 }
2490 }
2491 }
2492
2493 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2494 const nir_intrinsic_instr *instr,
2495 bool write, bool atomic)
2496 {
2497 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2498 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2499 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2500 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2501 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2502
2503 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2504 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2505 elem_count, stride, "");
2506
2507 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2508 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2509 }
2510 return rsrc;
2511 }
2512
2513 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2514 const nir_intrinsic_instr *instr,
2515 bool bindless)
2516 {
2517 LLVMValueRef res;
2518
2519 enum glsl_sampler_dim dim;
2520 enum gl_access_qualifier access;
2521 bool is_array;
2522 if (bindless) {
2523 dim = nir_intrinsic_image_dim(instr);
2524 access = nir_intrinsic_access(instr);
2525 is_array = nir_intrinsic_image_array(instr);
2526 } else {
2527 const nir_deref_instr *image_deref = get_image_deref(instr);
2528 const struct glsl_type *type = image_deref->type;
2529 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2530 dim = glsl_get_sampler_dim(type);
2531 access = var->data.image.access;
2532 is_array = glsl_sampler_type_is_array(type);
2533 }
2534
2535 struct ac_image_args args = {};
2536
2537 args.cache_policy = get_cache_policy(ctx, access, false, false);
2538
2539 if (dim == GLSL_SAMPLER_DIM_BUF) {
2540 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2541 unsigned num_channels = util_last_bit(mask);
2542 LLVMValueRef rsrc, vindex;
2543
2544 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2545 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2546 ctx->ac.i32_0, "");
2547
2548 bool can_speculate = access & ACCESS_CAN_REORDER;
2549 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2550 ctx->ac.i32_0, num_channels,
2551 args.cache_policy,
2552 can_speculate);
2553 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2554
2555 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2556 res = ac_to_integer(&ctx->ac, res);
2557 } else {
2558 args.opcode = ac_image_load;
2559 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2560 get_image_coords(ctx, instr, &args, dim, is_array);
2561 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2562 args.dmask = 15;
2563 args.attributes = AC_FUNC_ATTR_READONLY;
2564
2565 res = ac_build_image_opcode(&ctx->ac, &args);
2566 }
2567 return res;
2568 }
2569
2570 static void visit_image_store(struct ac_nir_context *ctx,
2571 nir_intrinsic_instr *instr,
2572 bool bindless)
2573 {
2574
2575
2576 enum glsl_sampler_dim dim;
2577 enum gl_access_qualifier access;
2578 bool is_array;
2579 if (bindless) {
2580 dim = nir_intrinsic_image_dim(instr);
2581 access = nir_intrinsic_access(instr);
2582 is_array = nir_intrinsic_image_array(instr);
2583 } else {
2584 const nir_deref_instr *image_deref = get_image_deref(instr);
2585 const struct glsl_type *type = image_deref->type;
2586 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2587 dim = glsl_get_sampler_dim(type);
2588 access = var->data.image.access;
2589 is_array = glsl_sampler_type_is_array(type);
2590 }
2591
2592 bool writeonly_memory = access & ACCESS_NON_READABLE;
2593 struct ac_image_args args = {};
2594
2595 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2596
2597 if (dim == GLSL_SAMPLER_DIM_BUF) {
2598 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2599 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2600 unsigned src_channels = ac_get_llvm_num_components(src);
2601 LLVMValueRef vindex;
2602
2603 if (src_channels == 3)
2604 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2605
2606 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2607 get_src(ctx, instr->src[1]),
2608 ctx->ac.i32_0, "");
2609
2610 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2611 ctx->ac.i32_0, src_channels,
2612 args.cache_policy);
2613 } else {
2614 args.opcode = ac_image_store;
2615 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2616 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2617 get_image_coords(ctx, instr, &args, dim, is_array);
2618 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2619 args.dmask = 15;
2620
2621 ac_build_image_opcode(&ctx->ac, &args);
2622 }
2623
2624 }
2625
2626 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2627 const nir_intrinsic_instr *instr,
2628 bool bindless)
2629 {
2630 LLVMValueRef params[7];
2631 int param_count = 0;
2632
2633 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2634 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2635 const char *atomic_name;
2636 char intrinsic_name[64];
2637 enum ac_atomic_op atomic_subop;
2638 ASSERTED int length;
2639
2640 enum glsl_sampler_dim dim;
2641 bool is_array;
2642 if (bindless) {
2643 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2644 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2645 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2646 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2647 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2648 assert(format == GL_R32UI || format == GL_R32I);
2649 }
2650 dim = nir_intrinsic_image_dim(instr);
2651 is_array = nir_intrinsic_image_array(instr);
2652 } else {
2653 const struct glsl_type *type = get_image_deref(instr)->type;
2654 dim = glsl_get_sampler_dim(type);
2655 is_array = glsl_sampler_type_is_array(type);
2656 }
2657
2658 switch (instr->intrinsic) {
2659 case nir_intrinsic_bindless_image_atomic_add:
2660 case nir_intrinsic_image_deref_atomic_add:
2661 atomic_name = "add";
2662 atomic_subop = ac_atomic_add;
2663 break;
2664 case nir_intrinsic_bindless_image_atomic_imin:
2665 case nir_intrinsic_image_deref_atomic_imin:
2666 atomic_name = "smin";
2667 atomic_subop = ac_atomic_smin;
2668 break;
2669 case nir_intrinsic_bindless_image_atomic_umin:
2670 case nir_intrinsic_image_deref_atomic_umin:
2671 atomic_name = "umin";
2672 atomic_subop = ac_atomic_umin;
2673 break;
2674 case nir_intrinsic_bindless_image_atomic_imax:
2675 case nir_intrinsic_image_deref_atomic_imax:
2676 atomic_name = "smax";
2677 atomic_subop = ac_atomic_smax;
2678 break;
2679 case nir_intrinsic_bindless_image_atomic_umax:
2680 case nir_intrinsic_image_deref_atomic_umax:
2681 atomic_name = "umax";
2682 atomic_subop = ac_atomic_umax;
2683 break;
2684 case nir_intrinsic_bindless_image_atomic_and:
2685 case nir_intrinsic_image_deref_atomic_and:
2686 atomic_name = "and";
2687 atomic_subop = ac_atomic_and;
2688 break;
2689 case nir_intrinsic_bindless_image_atomic_or:
2690 case nir_intrinsic_image_deref_atomic_or:
2691 atomic_name = "or";
2692 atomic_subop = ac_atomic_or;
2693 break;
2694 case nir_intrinsic_bindless_image_atomic_xor:
2695 case nir_intrinsic_image_deref_atomic_xor:
2696 atomic_name = "xor";
2697 atomic_subop = ac_atomic_xor;
2698 break;
2699 case nir_intrinsic_bindless_image_atomic_exchange:
2700 case nir_intrinsic_image_deref_atomic_exchange:
2701 atomic_name = "swap";
2702 atomic_subop = ac_atomic_swap;
2703 break;
2704 case nir_intrinsic_bindless_image_atomic_comp_swap:
2705 case nir_intrinsic_image_deref_atomic_comp_swap:
2706 atomic_name = "cmpswap";
2707 atomic_subop = 0; /* not used */
2708 break;
2709 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2710 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2711 atomic_name = "inc";
2712 atomic_subop = ac_atomic_inc_wrap;
2713 /* ATOMIC_INC instruction does:
2714 * value = (value + 1) % (data + 1)
2715 * but we want:
2716 * value = (value + 1) % data
2717 * So replace 'data' by 'data - 1'.
2718 */
2719 ctx->ssa_defs[instr->src[3].ssa->index] =
2720 LLVMBuildSub(ctx->ac.builder,
2721 ctx->ssa_defs[instr->src[3].ssa->index],
2722 ctx->ac.i32_1, "");
2723 break;
2724 }
2725 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2726 case nir_intrinsic_image_deref_atomic_dec_wrap:
2727 atomic_name = "dec";
2728 atomic_subop = ac_atomic_dec_wrap;
2729 break;
2730 default:
2731 abort();
2732 }
2733
2734 if (cmpswap)
2735 params[param_count++] = get_src(ctx, instr->src[4]);
2736 params[param_count++] = get_src(ctx, instr->src[3]);
2737
2738 if (dim == GLSL_SAMPLER_DIM_BUF) {
2739 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2740 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2741 ctx->ac.i32_0, ""); /* vindex */
2742 params[param_count++] = ctx->ac.i32_0; /* voffset */
2743 if (LLVM_VERSION_MAJOR >= 9) {
2744 /* XXX: The new raw/struct atomic intrinsics are buggy
2745 * with LLVM 8, see r358579.
2746 */
2747 params[param_count++] = ctx->ac.i32_0; /* soffset */
2748 params[param_count++] = ctx->ac.i32_0; /* slc */
2749
2750 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2751 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2752 } else {
2753 params[param_count++] = ctx->ac.i1false; /* slc */
2754
2755 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2756 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2757 }
2758
2759 assert(length < sizeof(intrinsic_name));
2760 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2761 params, param_count, 0);
2762 } else {
2763 struct ac_image_args args = {};
2764 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2765 args.atomic = atomic_subop;
2766 args.data[0] = params[0];
2767 if (cmpswap)
2768 args.data[1] = params[1];
2769 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2770 get_image_coords(ctx, instr, &args, dim, is_array);
2771 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2772
2773 return ac_build_image_opcode(&ctx->ac, &args);
2774 }
2775 }
2776
2777 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2778 const nir_intrinsic_instr *instr)
2779 {
2780 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2781
2782 return ac_build_image_get_sample_count(&ctx->ac, rsrc);
2783 }
2784
2785 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2786 const nir_intrinsic_instr *instr,
2787 bool bindless)
2788 {
2789 LLVMValueRef res;
2790
2791 enum glsl_sampler_dim dim;
2792 bool is_array;
2793 if (bindless) {
2794 dim = nir_intrinsic_image_dim(instr);
2795 is_array = nir_intrinsic_image_array(instr);
2796 } else {
2797 const struct glsl_type *type = get_image_deref(instr)->type;
2798 dim = glsl_get_sampler_dim(type);
2799 is_array = glsl_sampler_type_is_array(type);
2800 }
2801
2802 if (dim == GLSL_SAMPLER_DIM_BUF)
2803 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2804
2805 struct ac_image_args args = { 0 };
2806
2807 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2808 args.dmask = 0xf;
2809 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2810 args.opcode = ac_image_get_resinfo;
2811 args.lod = ctx->ac.i32_0;
2812 args.attributes = AC_FUNC_ATTR_READNONE;
2813
2814 res = ac_build_image_opcode(&ctx->ac, &args);
2815
2816 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2817
2818 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2819 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2820 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2821 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2822 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2823 }
2824 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2825 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2826 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2827 ctx->ac.i32_1, "");
2828
2829 }
2830 return res;
2831 }
2832
2833 static void emit_membar(struct ac_llvm_context *ac,
2834 const nir_intrinsic_instr *instr)
2835 {
2836 unsigned wait_flags = 0;
2837
2838 switch (instr->intrinsic) {
2839 case nir_intrinsic_memory_barrier:
2840 case nir_intrinsic_group_memory_barrier:
2841 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2842 break;
2843 case nir_intrinsic_memory_barrier_atomic_counter:
2844 case nir_intrinsic_memory_barrier_buffer:
2845 case nir_intrinsic_memory_barrier_image:
2846 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2847 break;
2848 case nir_intrinsic_memory_barrier_shared:
2849 wait_flags = AC_WAIT_LGKM;
2850 break;
2851 default:
2852 break;
2853 }
2854
2855 ac_build_waitcnt(ac, wait_flags);
2856 }
2857
2858 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2859 {
2860 /* GFX6 only (thanks to a hw bug workaround):
2861 * The real barrier instruction isn’t needed, because an entire patch
2862 * always fits into a single wave.
2863 */
2864 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2865 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2866 return;
2867 }
2868 ac_build_s_barrier(ac);
2869 }
2870
2871 static void emit_discard(struct ac_nir_context *ctx,
2872 const nir_intrinsic_instr *instr)
2873 {
2874 LLVMValueRef cond;
2875
2876 if (instr->intrinsic == nir_intrinsic_discard_if) {
2877 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2878 get_src(ctx, instr->src[0]),
2879 ctx->ac.i32_0, "");
2880 } else {
2881 assert(instr->intrinsic == nir_intrinsic_discard);
2882 cond = ctx->ac.i1false;
2883 }
2884
2885 ctx->abi->emit_kill(ctx->abi, cond);
2886 }
2887
2888 static LLVMValueRef
2889 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2890 {
2891 LLVMValueRef result;
2892 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2893 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2894 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2895
2896 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2897 }
2898
2899 static LLVMValueRef
2900 visit_load_subgroup_id(struct ac_nir_context *ctx)
2901 {
2902 if (ctx->stage == MESA_SHADER_COMPUTE) {
2903 LLVMValueRef result;
2904 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2905 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2906 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2907 } else {
2908 return LLVMConstInt(ctx->ac.i32, 0, false);
2909 }
2910 }
2911
2912 static LLVMValueRef
2913 visit_load_num_subgroups(struct ac_nir_context *ctx)
2914 {
2915 if (ctx->stage == MESA_SHADER_COMPUTE) {
2916 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2917 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2918 } else {
2919 return LLVMConstInt(ctx->ac.i32, 1, false);
2920 }
2921 }
2922
2923 static LLVMValueRef
2924 visit_first_invocation(struct ac_nir_context *ctx)
2925 {
2926 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2927 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
2928
2929 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2930 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2931 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
2932 ctx->ac.iN_wavemask, args, 2,
2933 AC_FUNC_ATTR_NOUNWIND |
2934 AC_FUNC_ATTR_READNONE);
2935
2936 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2937 }
2938
2939 static LLVMValueRef
2940 visit_load_shared(struct ac_nir_context *ctx,
2941 const nir_intrinsic_instr *instr)
2942 {
2943 LLVMValueRef values[4], derived_ptr, index, ret;
2944
2945 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2946
2947 for (int chan = 0; chan < instr->num_components; chan++) {
2948 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2949 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2950 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2951 }
2952
2953 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2954 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2955 }
2956
2957 static void
2958 visit_store_shared(struct ac_nir_context *ctx,
2959 const nir_intrinsic_instr *instr)
2960 {
2961 LLVMValueRef derived_ptr, data,index;
2962 LLVMBuilderRef builder = ctx->ac.builder;
2963
2964 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2965 LLVMValueRef src = get_src(ctx, instr->src[0]);
2966
2967 int writemask = nir_intrinsic_write_mask(instr);
2968 for (int chan = 0; chan < 4; chan++) {
2969 if (!(writemask & (1 << chan))) {
2970 continue;
2971 }
2972 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2973 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2974 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2975 LLVMBuildStore(builder, data, derived_ptr);
2976 }
2977 }
2978
2979 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2980 const nir_intrinsic_instr *instr,
2981 LLVMValueRef ptr, int src_idx)
2982 {
2983 LLVMValueRef result;
2984 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2985
2986 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
2987
2988 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2989 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2990 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2991 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
2992 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2993 } else {
2994 LLVMAtomicRMWBinOp op;
2995 switch (instr->intrinsic) {
2996 case nir_intrinsic_shared_atomic_add:
2997 case nir_intrinsic_deref_atomic_add:
2998 op = LLVMAtomicRMWBinOpAdd;
2999 break;
3000 case nir_intrinsic_shared_atomic_umin:
3001 case nir_intrinsic_deref_atomic_umin:
3002 op = LLVMAtomicRMWBinOpUMin;
3003 break;
3004 case nir_intrinsic_shared_atomic_umax:
3005 case nir_intrinsic_deref_atomic_umax:
3006 op = LLVMAtomicRMWBinOpUMax;
3007 break;
3008 case nir_intrinsic_shared_atomic_imin:
3009 case nir_intrinsic_deref_atomic_imin:
3010 op = LLVMAtomicRMWBinOpMin;
3011 break;
3012 case nir_intrinsic_shared_atomic_imax:
3013 case nir_intrinsic_deref_atomic_imax:
3014 op = LLVMAtomicRMWBinOpMax;
3015 break;
3016 case nir_intrinsic_shared_atomic_and:
3017 case nir_intrinsic_deref_atomic_and:
3018 op = LLVMAtomicRMWBinOpAnd;
3019 break;
3020 case nir_intrinsic_shared_atomic_or:
3021 case nir_intrinsic_deref_atomic_or:
3022 op = LLVMAtomicRMWBinOpOr;
3023 break;
3024 case nir_intrinsic_shared_atomic_xor:
3025 case nir_intrinsic_deref_atomic_xor:
3026 op = LLVMAtomicRMWBinOpXor;
3027 break;
3028 case nir_intrinsic_shared_atomic_exchange:
3029 case nir_intrinsic_deref_atomic_exchange:
3030 op = LLVMAtomicRMWBinOpXchg;
3031 break;
3032 default:
3033 return NULL;
3034 }
3035
3036 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3037 }
3038 return result;
3039 }
3040
3041 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3042 {
3043 LLVMValueRef values[2];
3044 LLVMValueRef pos[2];
3045
3046 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
3047 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
3048
3049 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3050 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3051 return ac_build_gather_values(&ctx->ac, values, 2);
3052 }
3053
3054 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3055 enum glsl_interp_mode interp, unsigned location)
3056 {
3057 switch (interp) {
3058 case INTERP_MODE_FLAT:
3059 default:
3060 return NULL;
3061 case INTERP_MODE_SMOOTH:
3062 case INTERP_MODE_NONE:
3063 if (location == INTERP_CENTER)
3064 return ctx->abi->persp_center;
3065 else if (location == INTERP_CENTROID)
3066 return ctx->abi->persp_centroid;
3067 else if (location == INTERP_SAMPLE)
3068 return ctx->abi->persp_sample;
3069 break;
3070 case INTERP_MODE_NOPERSPECTIVE:
3071 if (location == INTERP_CENTER)
3072 return ctx->abi->linear_center;
3073 else if (location == INTERP_CENTROID)
3074 return ctx->abi->linear_centroid;
3075 else if (location == INTERP_SAMPLE)
3076 return ctx->abi->linear_sample;
3077 break;
3078 }
3079 return NULL;
3080 }
3081
3082 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3083 unsigned mode)
3084 {
3085 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3086 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3087 }
3088
3089 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3090 unsigned mode,
3091 LLVMValueRef offset)
3092 {
3093 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3094 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3095 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3096
3097 LLVMValueRef ij_out[2];
3098 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3099
3100 /*
3101 * take the I then J parameters, and the DDX/Y for it, and
3102 * calculate the IJ inputs for the interpolator.
3103 * temp1 = ddx * offset/sample.x + I;
3104 * interp_param.I = ddy * offset/sample.y + temp1;
3105 * temp1 = ddx * offset/sample.x + J;
3106 * interp_param.J = ddy * offset/sample.y + temp1;
3107 */
3108 for (unsigned i = 0; i < 2; i++) {
3109 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3110 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3111 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3112 ddxy_out, ix_ll, "");
3113 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3114 ddxy_out, iy_ll, "");
3115 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3116 interp_param, ix_ll, "");
3117 LLVMValueRef temp1, temp2;
3118
3119 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3120 ctx->ac.f32, "");
3121
3122 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3123 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3124
3125 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3126 temp2, ctx->ac.i32, "");
3127 }
3128 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3129 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3130 }
3131
3132 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3133 unsigned mode)
3134 {
3135 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3136 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3137 }
3138
3139 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3140 unsigned mode,
3141 LLVMValueRef sample_id)
3142 {
3143 if (ctx->abi->interp_at_sample_force_center)
3144 return barycentric_center(ctx, mode);
3145
3146 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3147
3148 /* fetch sample ID */
3149 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3150
3151 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3152 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3153 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3154 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3155 LLVMValueRef coords[] = { src_c0, src_c1 };
3156 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3157
3158 return barycentric_offset(ctx, mode, offset);
3159 }
3160
3161
3162 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3163 unsigned mode)
3164 {
3165 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3166 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3167 }
3168
3169 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3170 LLVMValueRef interp_param,
3171 unsigned index, unsigned comp_start,
3172 unsigned num_components,
3173 unsigned bitsize)
3174 {
3175 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3176
3177 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3178 interp_param, ctx->ac.v2f32, "");
3179 LLVMValueRef i = LLVMBuildExtractElement(
3180 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3181 LLVMValueRef j = LLVMBuildExtractElement(
3182 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3183
3184 LLVMValueRef values[4];
3185 assert(bitsize == 16 || bitsize == 32);
3186 for (unsigned comp = 0; comp < num_components; comp++) {
3187 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3188 if (bitsize == 16) {
3189 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3190 ctx->abi->prim_mask, i, j);
3191 } else {
3192 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3193 ctx->abi->prim_mask, i, j);
3194 }
3195 }
3196
3197 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3198 }
3199
3200 static LLVMValueRef load_flat_input(struct ac_nir_context *ctx,
3201 unsigned index, unsigned comp_start,
3202 unsigned num_components,
3203 unsigned bit_size)
3204 {
3205 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3206
3207 LLVMValueRef values[8];
3208
3209 /* Each component of a 64-bit value takes up two GL-level channels. */
3210 unsigned channels =
3211 bit_size == 64 ? num_components * 2 : num_components;
3212
3213 for (unsigned chan = 0; chan < channels; chan++) {
3214 if (comp_start + chan > 4)
3215 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3216 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (comp_start + chan) % 4, false);
3217 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3218 LLVMConstInt(ctx->ac.i32, 2, false),
3219 llvm_chan,
3220 attr_number,
3221 ctx->abi->prim_mask);
3222 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3223 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3224 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3225 }
3226
3227 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3228 if (bit_size == 64) {
3229 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3230 LLVMVectorType(ctx->ac.i64, num_components);
3231 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3232 }
3233 return result;
3234 }
3235
3236 static void visit_intrinsic(struct ac_nir_context *ctx,
3237 nir_intrinsic_instr *instr)
3238 {
3239 LLVMValueRef result = NULL;
3240
3241 switch (instr->intrinsic) {
3242 case nir_intrinsic_ballot:
3243 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3244 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3245 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3246 break;
3247 case nir_intrinsic_read_invocation:
3248 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3249 get_src(ctx, instr->src[1]));
3250 break;
3251 case nir_intrinsic_read_first_invocation:
3252 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3253 break;
3254 case nir_intrinsic_load_subgroup_invocation:
3255 result = ac_get_thread_id(&ctx->ac);
3256 break;
3257 case nir_intrinsic_load_work_group_id: {
3258 LLVMValueRef values[3];
3259
3260 for (int i = 0; i < 3; i++) {
3261 values[i] = ctx->abi->workgroup_ids[i] ?
3262 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3263 }
3264
3265 result = ac_build_gather_values(&ctx->ac, values, 3);
3266 break;
3267 }
3268 case nir_intrinsic_load_base_vertex:
3269 case nir_intrinsic_load_first_vertex:
3270 result = ctx->abi->load_base_vertex(ctx->abi);
3271 break;
3272 case nir_intrinsic_load_local_group_size:
3273 result = ctx->abi->load_local_group_size(ctx->abi);
3274 break;
3275 case nir_intrinsic_load_vertex_id:
3276 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3277 ctx->abi->base_vertex, "");
3278 break;
3279 case nir_intrinsic_load_vertex_id_zero_base: {
3280 result = ctx->abi->vertex_id;
3281 break;
3282 }
3283 case nir_intrinsic_load_local_invocation_id: {
3284 result = ctx->abi->local_invocation_ids;
3285 break;
3286 }
3287 case nir_intrinsic_load_base_instance:
3288 result = ctx->abi->start_instance;
3289 break;
3290 case nir_intrinsic_load_draw_id:
3291 result = ctx->abi->draw_id;
3292 break;
3293 case nir_intrinsic_load_view_index:
3294 result = ctx->abi->view_index;
3295 break;
3296 case nir_intrinsic_load_invocation_id:
3297 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3298 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3299 } else {
3300 if (ctx->ac.chip_class >= GFX10) {
3301 result = LLVMBuildAnd(ctx->ac.builder,
3302 ctx->abi->gs_invocation_id,
3303 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3304 } else {
3305 result = ctx->abi->gs_invocation_id;
3306 }
3307 }
3308 break;
3309 case nir_intrinsic_load_primitive_id:
3310 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3311 result = ctx->abi->gs_prim_id;
3312 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3313 result = ctx->abi->tcs_patch_id;
3314 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3315 result = ctx->abi->tes_patch_id;
3316 } else
3317 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3318 break;
3319 case nir_intrinsic_load_sample_id:
3320 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3321 break;
3322 case nir_intrinsic_load_sample_pos:
3323 result = load_sample_pos(ctx);
3324 break;
3325 case nir_intrinsic_load_sample_mask_in:
3326 result = ctx->abi->load_sample_mask_in(ctx->abi);
3327 break;
3328 case nir_intrinsic_load_frag_coord: {
3329 LLVMValueRef values[4] = {
3330 ctx->abi->frag_pos[0],
3331 ctx->abi->frag_pos[1],
3332 ctx->abi->frag_pos[2],
3333 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3334 };
3335 result = ac_to_integer(&ctx->ac,
3336 ac_build_gather_values(&ctx->ac, values, 4));
3337 break;
3338 }
3339 case nir_intrinsic_load_layer_id:
3340 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3341 break;
3342 case nir_intrinsic_load_front_face:
3343 result = ctx->abi->front_face;
3344 break;
3345 case nir_intrinsic_load_helper_invocation:
3346 result = ac_build_load_helper_invocation(&ctx->ac);
3347 break;
3348 case nir_intrinsic_load_color0:
3349 result = ctx->abi->color0;
3350 break;
3351 case nir_intrinsic_load_color1:
3352 result = ctx->abi->color1;
3353 break;
3354 case nir_intrinsic_load_user_data_amd:
3355 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3356 result = ctx->abi->user_data;
3357 break;
3358 case nir_intrinsic_load_instance_id:
3359 result = ctx->abi->instance_id;
3360 break;
3361 case nir_intrinsic_load_num_work_groups:
3362 result = ctx->abi->num_work_groups;
3363 break;
3364 case nir_intrinsic_load_local_invocation_index:
3365 result = visit_load_local_invocation_index(ctx);
3366 break;
3367 case nir_intrinsic_load_subgroup_id:
3368 result = visit_load_subgroup_id(ctx);
3369 break;
3370 case nir_intrinsic_load_num_subgroups:
3371 result = visit_load_num_subgroups(ctx);
3372 break;
3373 case nir_intrinsic_first_invocation:
3374 result = visit_first_invocation(ctx);
3375 break;
3376 case nir_intrinsic_load_push_constant:
3377 result = visit_load_push_constant(ctx, instr);
3378 break;
3379 case nir_intrinsic_vulkan_resource_index: {
3380 LLVMValueRef index = get_src(ctx, instr->src[0]);
3381 unsigned desc_set = nir_intrinsic_desc_set(instr);
3382 unsigned binding = nir_intrinsic_binding(instr);
3383
3384 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3385 binding);
3386 break;
3387 }
3388 case nir_intrinsic_vulkan_resource_reindex:
3389 result = visit_vulkan_resource_reindex(ctx, instr);
3390 break;
3391 case nir_intrinsic_store_ssbo:
3392 visit_store_ssbo(ctx, instr);
3393 break;
3394 case nir_intrinsic_load_ssbo:
3395 result = visit_load_buffer(ctx, instr);
3396 break;
3397 case nir_intrinsic_ssbo_atomic_add:
3398 case nir_intrinsic_ssbo_atomic_imin:
3399 case nir_intrinsic_ssbo_atomic_umin:
3400 case nir_intrinsic_ssbo_atomic_imax:
3401 case nir_intrinsic_ssbo_atomic_umax:
3402 case nir_intrinsic_ssbo_atomic_and:
3403 case nir_intrinsic_ssbo_atomic_or:
3404 case nir_intrinsic_ssbo_atomic_xor:
3405 case nir_intrinsic_ssbo_atomic_exchange:
3406 case nir_intrinsic_ssbo_atomic_comp_swap:
3407 result = visit_atomic_ssbo(ctx, instr);
3408 break;
3409 case nir_intrinsic_load_ubo:
3410 result = visit_load_ubo_buffer(ctx, instr);
3411 break;
3412 case nir_intrinsic_get_buffer_size:
3413 result = visit_get_buffer_size(ctx, instr);
3414 break;
3415 case nir_intrinsic_load_deref:
3416 result = visit_load_var(ctx, instr);
3417 break;
3418 case nir_intrinsic_store_deref:
3419 visit_store_var(ctx, instr);
3420 break;
3421 case nir_intrinsic_load_shared:
3422 result = visit_load_shared(ctx, instr);
3423 break;
3424 case nir_intrinsic_store_shared:
3425 visit_store_shared(ctx, instr);
3426 break;
3427 case nir_intrinsic_bindless_image_samples:
3428 case nir_intrinsic_image_deref_samples:
3429 result = visit_image_samples(ctx, instr);
3430 break;
3431 case nir_intrinsic_bindless_image_load:
3432 result = visit_image_load(ctx, instr, true);
3433 break;
3434 case nir_intrinsic_image_deref_load:
3435 result = visit_image_load(ctx, instr, false);
3436 break;
3437 case nir_intrinsic_bindless_image_store:
3438 visit_image_store(ctx, instr, true);
3439 break;
3440 case nir_intrinsic_image_deref_store:
3441 visit_image_store(ctx, instr, false);
3442 break;
3443 case nir_intrinsic_bindless_image_atomic_add:
3444 case nir_intrinsic_bindless_image_atomic_imin:
3445 case nir_intrinsic_bindless_image_atomic_umin:
3446 case nir_intrinsic_bindless_image_atomic_imax:
3447 case nir_intrinsic_bindless_image_atomic_umax:
3448 case nir_intrinsic_bindless_image_atomic_and:
3449 case nir_intrinsic_bindless_image_atomic_or:
3450 case nir_intrinsic_bindless_image_atomic_xor:
3451 case nir_intrinsic_bindless_image_atomic_exchange:
3452 case nir_intrinsic_bindless_image_atomic_comp_swap:
3453 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3454 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3455 result = visit_image_atomic(ctx, instr, true);
3456 break;
3457 case nir_intrinsic_image_deref_atomic_add:
3458 case nir_intrinsic_image_deref_atomic_imin:
3459 case nir_intrinsic_image_deref_atomic_umin:
3460 case nir_intrinsic_image_deref_atomic_imax:
3461 case nir_intrinsic_image_deref_atomic_umax:
3462 case nir_intrinsic_image_deref_atomic_and:
3463 case nir_intrinsic_image_deref_atomic_or:
3464 case nir_intrinsic_image_deref_atomic_xor:
3465 case nir_intrinsic_image_deref_atomic_exchange:
3466 case nir_intrinsic_image_deref_atomic_comp_swap:
3467 case nir_intrinsic_image_deref_atomic_inc_wrap:
3468 case nir_intrinsic_image_deref_atomic_dec_wrap:
3469 result = visit_image_atomic(ctx, instr, false);
3470 break;
3471 case nir_intrinsic_bindless_image_size:
3472 result = visit_image_size(ctx, instr, true);
3473 break;
3474 case nir_intrinsic_image_deref_size:
3475 result = visit_image_size(ctx, instr, false);
3476 break;
3477 case nir_intrinsic_shader_clock:
3478 result = ac_build_shader_clock(&ctx->ac);
3479 break;
3480 case nir_intrinsic_discard:
3481 case nir_intrinsic_discard_if:
3482 emit_discard(ctx, instr);
3483 break;
3484 case nir_intrinsic_memory_barrier:
3485 case nir_intrinsic_group_memory_barrier:
3486 case nir_intrinsic_memory_barrier_atomic_counter:
3487 case nir_intrinsic_memory_barrier_buffer:
3488 case nir_intrinsic_memory_barrier_image:
3489 case nir_intrinsic_memory_barrier_shared:
3490 emit_membar(&ctx->ac, instr);
3491 break;
3492 case nir_intrinsic_barrier:
3493 ac_emit_barrier(&ctx->ac, ctx->stage);
3494 break;
3495 case nir_intrinsic_shared_atomic_add:
3496 case nir_intrinsic_shared_atomic_imin:
3497 case nir_intrinsic_shared_atomic_umin:
3498 case nir_intrinsic_shared_atomic_imax:
3499 case nir_intrinsic_shared_atomic_umax:
3500 case nir_intrinsic_shared_atomic_and:
3501 case nir_intrinsic_shared_atomic_or:
3502 case nir_intrinsic_shared_atomic_xor:
3503 case nir_intrinsic_shared_atomic_exchange:
3504 case nir_intrinsic_shared_atomic_comp_swap: {
3505 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3506 result = visit_var_atomic(ctx, instr, ptr, 1);
3507 break;
3508 }
3509 case nir_intrinsic_deref_atomic_add:
3510 case nir_intrinsic_deref_atomic_imin:
3511 case nir_intrinsic_deref_atomic_umin:
3512 case nir_intrinsic_deref_atomic_imax:
3513 case nir_intrinsic_deref_atomic_umax:
3514 case nir_intrinsic_deref_atomic_and:
3515 case nir_intrinsic_deref_atomic_or:
3516 case nir_intrinsic_deref_atomic_xor:
3517 case nir_intrinsic_deref_atomic_exchange:
3518 case nir_intrinsic_deref_atomic_comp_swap: {
3519 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3520 result = visit_var_atomic(ctx, instr, ptr, 1);
3521 break;
3522 }
3523 case nir_intrinsic_load_barycentric_pixel:
3524 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3525 break;
3526 case nir_intrinsic_load_barycentric_centroid:
3527 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3528 break;
3529 case nir_intrinsic_load_barycentric_sample:
3530 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3531 break;
3532 case nir_intrinsic_load_barycentric_at_offset: {
3533 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3534 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3535 break;
3536 }
3537 case nir_intrinsic_load_barycentric_at_sample: {
3538 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3539 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3540 break;
3541 }
3542 case nir_intrinsic_load_interpolated_input: {
3543 /* We assume any indirect loads have been lowered away */
3544 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3545 assert(offset);
3546 assert(offset[0].i32 == 0);
3547
3548 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3549 unsigned index = nir_intrinsic_base(instr);
3550 unsigned component = nir_intrinsic_component(instr);
3551 result = load_interpolated_input(ctx, interp_param, index,
3552 component,
3553 instr->dest.ssa.num_components,
3554 instr->dest.ssa.bit_size);
3555 break;
3556 }
3557 case nir_intrinsic_load_input: {
3558 /* We only lower inputs for fragment shaders ATM */
3559 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[0]);
3560 assert(offset);
3561 assert(offset[0].i32 == 0);
3562
3563 unsigned index = nir_intrinsic_base(instr);
3564 unsigned component = nir_intrinsic_component(instr);
3565 result = load_flat_input(ctx, index, component,
3566 instr->dest.ssa.num_components,
3567 instr->dest.ssa.bit_size);
3568 break;
3569 }
3570 case nir_intrinsic_emit_vertex:
3571 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3572 break;
3573 case nir_intrinsic_end_primitive:
3574 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3575 break;
3576 case nir_intrinsic_load_tess_coord:
3577 result = ctx->abi->load_tess_coord(ctx->abi);
3578 break;
3579 case nir_intrinsic_load_tess_level_outer:
3580 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
3581 break;
3582 case nir_intrinsic_load_tess_level_inner:
3583 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
3584 break;
3585 case nir_intrinsic_load_tess_level_outer_default:
3586 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
3587 break;
3588 case nir_intrinsic_load_tess_level_inner_default:
3589 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
3590 break;
3591 case nir_intrinsic_load_patch_vertices_in:
3592 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3593 break;
3594 case nir_intrinsic_vote_all: {
3595 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3596 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3597 break;
3598 }
3599 case nir_intrinsic_vote_any: {
3600 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3601 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3602 break;
3603 }
3604 case nir_intrinsic_shuffle:
3605 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3606 get_src(ctx, instr->src[1]));
3607 break;
3608 case nir_intrinsic_reduce:
3609 result = ac_build_reduce(&ctx->ac,
3610 get_src(ctx, instr->src[0]),
3611 instr->const_index[0],
3612 instr->const_index[1]);
3613 break;
3614 case nir_intrinsic_inclusive_scan:
3615 result = ac_build_inclusive_scan(&ctx->ac,
3616 get_src(ctx, instr->src[0]),
3617 instr->const_index[0]);
3618 break;
3619 case nir_intrinsic_exclusive_scan:
3620 result = ac_build_exclusive_scan(&ctx->ac,
3621 get_src(ctx, instr->src[0]),
3622 instr->const_index[0]);
3623 break;
3624 case nir_intrinsic_quad_broadcast: {
3625 unsigned lane = nir_src_as_uint(instr->src[1]);
3626 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3627 lane, lane, lane, lane);
3628 break;
3629 }
3630 case nir_intrinsic_quad_swap_horizontal:
3631 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3632 break;
3633 case nir_intrinsic_quad_swap_vertical:
3634 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3635 break;
3636 case nir_intrinsic_quad_swap_diagonal:
3637 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3638 break;
3639 case nir_intrinsic_quad_swizzle_amd: {
3640 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3641 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3642 mask & 0x3, (mask >> 2) & 0x3,
3643 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3644 break;
3645 }
3646 case nir_intrinsic_masked_swizzle_amd: {
3647 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3648 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3649 break;
3650 }
3651 case nir_intrinsic_write_invocation_amd:
3652 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3653 get_src(ctx, instr->src[1]),
3654 get_src(ctx, instr->src[2]));
3655 break;
3656 case nir_intrinsic_mbcnt_amd:
3657 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3658 break;
3659 case nir_intrinsic_load_scratch: {
3660 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3661 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3662 offset);
3663 LLVMTypeRef comp_type =
3664 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3665 LLVMTypeRef vec_type =
3666 instr->dest.ssa.num_components == 1 ? comp_type :
3667 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3668 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3669 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3670 LLVMPointerType(vec_type, addr_space), "");
3671 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3672 break;
3673 }
3674 case nir_intrinsic_store_scratch: {
3675 LLVMValueRef offset = get_src(ctx, instr->src[1]);
3676 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3677 offset);
3678 LLVMTypeRef comp_type =
3679 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
3680 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3681 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3682 LLVMPointerType(comp_type, addr_space), "");
3683 LLVMValueRef src = get_src(ctx, instr->src[0]);
3684 unsigned wrmask = nir_intrinsic_write_mask(instr);
3685 while (wrmask) {
3686 int start, count;
3687 u_bit_scan_consecutive_range(&wrmask, &start, &count);
3688
3689 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
3690 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
3691 LLVMTypeRef vec_type =
3692 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
3693 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
3694 offset_ptr,
3695 LLVMPointerType(vec_type, addr_space),
3696 "");
3697 LLVMValueRef offset_src =
3698 ac_extract_components(&ctx->ac, src, start, count);
3699 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
3700 }
3701 break;
3702 }
3703 case nir_intrinsic_load_constant: {
3704 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3705 LLVMValueRef base = LLVMConstInt(ctx->ac.i32,
3706 nir_intrinsic_base(instr),
3707 false);
3708 offset = LLVMBuildAdd(ctx->ac.builder, offset, base, "");
3709 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
3710 offset);
3711 LLVMTypeRef comp_type =
3712 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3713 LLVMTypeRef vec_type =
3714 instr->dest.ssa.num_components == 1 ? comp_type :
3715 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3716 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3717 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3718 LLVMPointerType(vec_type, addr_space), "");
3719 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3720 break;
3721 }
3722 default:
3723 fprintf(stderr, "Unknown intrinsic: ");
3724 nir_print_instr(&instr->instr, stderr);
3725 fprintf(stderr, "\n");
3726 break;
3727 }
3728 if (result) {
3729 ctx->ssa_defs[instr->dest.ssa.index] = result;
3730 }
3731 }
3732
3733 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3734 unsigned base_index,
3735 unsigned constant_index,
3736 LLVMValueRef dynamic_index)
3737 {
3738 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3739 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3740 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3741
3742 /* Bindless uniforms are 64bit so multiple index by 8 */
3743 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3744 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3745
3746 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3747
3748 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3749 NULL, 0, 0, true, true);
3750
3751 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3752 }
3753
3754 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3755 nir_deref_instr *deref_instr,
3756 enum ac_descriptor_type desc_type,
3757 const nir_instr *instr,
3758 bool image, bool write)
3759 {
3760 LLVMValueRef index = NULL;
3761 unsigned constant_index = 0;
3762 unsigned descriptor_set;
3763 unsigned base_index;
3764 bool bindless = false;
3765
3766 if (!deref_instr) {
3767 descriptor_set = 0;
3768 if (image) {
3769 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3770 base_index = 0;
3771 bindless = true;
3772 index = get_src(ctx, img_instr->src[0]);
3773 } else {
3774 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3775 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3776 nir_tex_src_sampler_handle);
3777 if (sampSrcIdx != -1) {
3778 base_index = 0;
3779 bindless = true;
3780 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3781 } else {
3782 assert(tex_instr && !image);
3783 base_index = tex_instr->sampler_index;
3784 }
3785 }
3786 } else {
3787 while(deref_instr->deref_type != nir_deref_type_var) {
3788 if (deref_instr->deref_type == nir_deref_type_array) {
3789 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3790 if (!array_size)
3791 array_size = 1;
3792
3793 if (nir_src_is_const(deref_instr->arr.index)) {
3794 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3795 } else {
3796 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3797
3798 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3799 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3800
3801 if (!index)
3802 index = indirect;
3803 else
3804 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3805 }
3806
3807 deref_instr = nir_src_as_deref(deref_instr->parent);
3808 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3809 unsigned sidx = deref_instr->strct.index;
3810 deref_instr = nir_src_as_deref(deref_instr->parent);
3811 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3812 } else {
3813 unreachable("Unsupported deref type");
3814 }
3815 }
3816 descriptor_set = deref_instr->var->data.descriptor_set;
3817
3818 if (deref_instr->var->data.bindless) {
3819 /* For now just assert on unhandled variable types */
3820 assert(deref_instr->var->data.mode == nir_var_uniform);
3821
3822 base_index = deref_instr->var->data.driver_location;
3823 bindless = true;
3824
3825 index = index ? index : ctx->ac.i32_0;
3826 index = get_bindless_index_from_uniform(ctx, base_index,
3827 constant_index, index);
3828 } else
3829 base_index = deref_instr->var->data.binding;
3830 }
3831
3832 return ctx->abi->load_sampler_desc(ctx->abi,
3833 descriptor_set,
3834 base_index,
3835 constant_index, index,
3836 desc_type, image, write, bindless);
3837 }
3838
3839 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3840 *
3841 * GFX6-GFX7:
3842 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3843 * filtering manually. The driver sets img7 to a mask clearing
3844 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3845 * s_and_b32 samp0, samp0, img7
3846 *
3847 * GFX8:
3848 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3849 */
3850 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3851 LLVMValueRef res, LLVMValueRef samp)
3852 {
3853 LLVMBuilderRef builder = ctx->ac.builder;
3854 LLVMValueRef img7, samp0;
3855
3856 if (ctx->ac.chip_class >= GFX8)
3857 return samp;
3858
3859 img7 = LLVMBuildExtractElement(builder, res,
3860 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3861 samp0 = LLVMBuildExtractElement(builder, samp,
3862 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3863 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3864 return LLVMBuildInsertElement(builder, samp, samp0,
3865 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3866 }
3867
3868 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3869 nir_tex_instr *instr,
3870 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3871 LLVMValueRef *fmask_ptr)
3872 {
3873 nir_deref_instr *texture_deref_instr = NULL;
3874 nir_deref_instr *sampler_deref_instr = NULL;
3875 int plane = -1;
3876
3877 for (unsigned i = 0; i < instr->num_srcs; i++) {
3878 switch (instr->src[i].src_type) {
3879 case nir_tex_src_texture_deref:
3880 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3881 break;
3882 case nir_tex_src_sampler_deref:
3883 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3884 break;
3885 case nir_tex_src_plane:
3886 plane = nir_src_as_int(instr->src[i].src);
3887 break;
3888 default:
3889 break;
3890 }
3891 }
3892
3893 if (!sampler_deref_instr)
3894 sampler_deref_instr = texture_deref_instr;
3895
3896 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3897
3898 if (plane >= 0) {
3899 assert(instr->op != nir_texop_txf_ms &&
3900 instr->op != nir_texop_samples_identical);
3901 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3902
3903 main_descriptor = AC_DESC_PLANE_0 + plane;
3904 }
3905
3906 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3907
3908 if (samp_ptr) {
3909 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3910 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3911 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3912 }
3913 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3914 instr->op == nir_texop_samples_identical))
3915 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3916 }
3917
3918 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3919 LLVMValueRef coord)
3920 {
3921 coord = ac_to_float(ctx, coord);
3922 coord = ac_build_round(ctx, coord);
3923 coord = ac_to_integer(ctx, coord);
3924 return coord;
3925 }
3926
3927 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3928 {
3929 LLVMValueRef result = NULL;
3930 struct ac_image_args args = { 0 };
3931 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3932 LLVMValueRef ddx = NULL, ddy = NULL;
3933 unsigned offset_src = 0;
3934
3935 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3936
3937 for (unsigned i = 0; i < instr->num_srcs; i++) {
3938 switch (instr->src[i].src_type) {
3939 case nir_tex_src_coord: {
3940 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3941 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3942 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3943 break;
3944 }
3945 case nir_tex_src_projector:
3946 break;
3947 case nir_tex_src_comparator:
3948 if (instr->is_shadow) {
3949 args.compare = get_src(ctx, instr->src[i].src);
3950 args.compare = ac_to_float(&ctx->ac, args.compare);
3951 }
3952 break;
3953 case nir_tex_src_offset:
3954 args.offset = get_src(ctx, instr->src[i].src);
3955 offset_src = i;
3956 break;
3957 case nir_tex_src_bias:
3958 if (instr->op == nir_texop_txb)
3959 args.bias = get_src(ctx, instr->src[i].src);
3960 break;
3961 case nir_tex_src_lod: {
3962 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
3963 args.level_zero = true;
3964 else
3965 args.lod = get_src(ctx, instr->src[i].src);
3966 break;
3967 }
3968 case nir_tex_src_ms_index:
3969 sample_index = get_src(ctx, instr->src[i].src);
3970 break;
3971 case nir_tex_src_ms_mcs:
3972 break;
3973 case nir_tex_src_ddx:
3974 ddx = get_src(ctx, instr->src[i].src);
3975 break;
3976 case nir_tex_src_ddy:
3977 ddy = get_src(ctx, instr->src[i].src);
3978 break;
3979 case nir_tex_src_texture_offset:
3980 case nir_tex_src_sampler_offset:
3981 case nir_tex_src_plane:
3982 default:
3983 break;
3984 }
3985 }
3986
3987 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3988 result = get_buffer_size(ctx, args.resource, true);
3989 goto write_result;
3990 }
3991
3992 if (instr->op == nir_texop_texture_samples) {
3993 LLVMValueRef res, samples, is_msaa;
3994 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3995 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3996 LLVMConstInt(ctx->ac.i32, 3, false), "");
3997 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3998 LLVMConstInt(ctx->ac.i32, 28, false), "");
3999 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4000 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4001 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4002 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4003
4004 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4005 LLVMConstInt(ctx->ac.i32, 16, false), "");
4006 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4007 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4008 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4009 samples, "");
4010 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4011 ctx->ac.i32_1, "");
4012 result = samples;
4013 goto write_result;
4014 }
4015
4016 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4017 LLVMValueRef offset[3], pack;
4018 for (unsigned chan = 0; chan < 3; ++chan)
4019 offset[chan] = ctx->ac.i32_0;
4020
4021 unsigned num_components = ac_get_llvm_num_components(args.offset);
4022 for (unsigned chan = 0; chan < num_components; chan++) {
4023 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4024 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4025 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4026 if (chan)
4027 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4028 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4029 }
4030 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4031 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4032 args.offset = pack;
4033 }
4034
4035 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4036 * OpenGL 4.5 spec says:
4037 *
4038 * "If the texture’s internal format indicates a fixed-point
4039 * depth texture, then D_t and D_ref are clamped to the
4040 * range [0, 1]; otherwise no clamping is performed."
4041 *
4042 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4043 * so the depth comparison value isn't clamped for Z16 and
4044 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4045 * an explicitly clamped 32-bit float format.
4046 */
4047 if (args.compare &&
4048 ctx->ac.chip_class >= GFX8 &&
4049 ctx->ac.chip_class <= GFX9 &&
4050 ctx->abi->clamp_shadow_reference) {
4051 LLVMValueRef upgraded, clamped;
4052
4053 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4054 LLVMConstInt(ctx->ac.i32, 3, false), "");
4055 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4056 LLVMConstInt(ctx->ac.i32, 29, false), "");
4057 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4058 clamped = ac_build_clamp(&ctx->ac, args.compare);
4059 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4060 args.compare, "");
4061 }
4062
4063 /* pack derivatives */
4064 if (ddx || ddy) {
4065 int num_src_deriv_channels, num_dest_deriv_channels;
4066 switch (instr->sampler_dim) {
4067 case GLSL_SAMPLER_DIM_3D:
4068 case GLSL_SAMPLER_DIM_CUBE:
4069 num_src_deriv_channels = 3;
4070 num_dest_deriv_channels = 3;
4071 break;
4072 case GLSL_SAMPLER_DIM_2D:
4073 default:
4074 num_src_deriv_channels = 2;
4075 num_dest_deriv_channels = 2;
4076 break;
4077 case GLSL_SAMPLER_DIM_1D:
4078 num_src_deriv_channels = 1;
4079 if (ctx->ac.chip_class == GFX9) {
4080 num_dest_deriv_channels = 2;
4081 } else {
4082 num_dest_deriv_channels = 1;
4083 }
4084 break;
4085 }
4086
4087 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4088 args.derivs[i] = ac_to_float(&ctx->ac,
4089 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4090 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4091 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4092 }
4093 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4094 args.derivs[i] = ctx->ac.f32_0;
4095 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4096 }
4097 }
4098
4099 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4100 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4101 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4102 if (instr->coord_components == 3)
4103 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4104 ac_prepare_cube_coords(&ctx->ac,
4105 instr->op == nir_texop_txd, instr->is_array,
4106 instr->op == nir_texop_lod, args.coords, args.derivs);
4107 }
4108
4109 /* Texture coordinates fixups */
4110 if (instr->coord_components > 1 &&
4111 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4112 instr->is_array &&
4113 instr->op != nir_texop_txf) {
4114 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4115 }
4116
4117 if (instr->coord_components > 2 &&
4118 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4119 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4120 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4121 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4122 instr->is_array &&
4123 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4124 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4125 }
4126
4127 if (ctx->ac.chip_class == GFX9 &&
4128 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4129 instr->op != nir_texop_lod) {
4130 LLVMValueRef filler;
4131 if (instr->op == nir_texop_txf)
4132 filler = ctx->ac.i32_0;
4133 else
4134 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4135
4136 if (instr->is_array)
4137 args.coords[2] = args.coords[1];
4138 args.coords[1] = filler;
4139 }
4140
4141 /* Pack sample index */
4142 if (instr->op == nir_texop_txf_ms && sample_index)
4143 args.coords[instr->coord_components] = sample_index;
4144
4145 if (instr->op == nir_texop_samples_identical) {
4146 struct ac_image_args txf_args = { 0 };
4147 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4148
4149 txf_args.dmask = 0xf;
4150 txf_args.resource = fmask_ptr;
4151 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4152 result = build_tex_intrinsic(ctx, instr, &txf_args);
4153
4154 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4155 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4156 goto write_result;
4157 }
4158
4159 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4160 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4161 instr->op != nir_texop_txs) {
4162 unsigned sample_chan = instr->is_array ? 3 : 2;
4163 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4164 &ctx->ac, args.coords[0], args.coords[1],
4165 instr->is_array ? args.coords[2] : NULL,
4166 args.coords[sample_chan], fmask_ptr);
4167 }
4168
4169 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4170 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4171 num_offsets = MIN2(num_offsets, instr->coord_components);
4172 for (unsigned i = 0; i < num_offsets; ++i) {
4173 args.coords[i] = LLVMBuildAdd(
4174 ctx->ac.builder, args.coords[i],
4175 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4176 }
4177 args.offset = NULL;
4178 }
4179
4180 /* DMASK was repurposed for GATHER4. 4 components are always
4181 * returned and DMASK works like a swizzle - it selects
4182 * the component to fetch. The only valid DMASK values are
4183 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4184 * (red,red,red,red) etc.) The ISA document doesn't mention
4185 * this.
4186 */
4187 args.dmask = 0xf;
4188 if (instr->op == nir_texop_tg4) {
4189 if (instr->is_shadow)
4190 args.dmask = 1;
4191 else
4192 args.dmask = 1 << instr->component;
4193 }
4194
4195 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4196 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4197 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4198 }
4199 result = build_tex_intrinsic(ctx, instr, &args);
4200
4201 if (instr->op == nir_texop_query_levels)
4202 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4203 else if (instr->is_shadow && instr->is_new_style_shadow &&
4204 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4205 instr->op != nir_texop_tg4)
4206 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4207 else if (instr->op == nir_texop_txs &&
4208 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4209 instr->is_array) {
4210 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4211 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4212 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4213 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4214 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4215 } else if (ctx->ac.chip_class == GFX9 &&
4216 instr->op == nir_texop_txs &&
4217 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4218 instr->is_array) {
4219 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4220 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4221 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4222 ctx->ac.i32_1, "");
4223 } else if (instr->dest.ssa.num_components != 4)
4224 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4225
4226 write_result:
4227 if (result) {
4228 assert(instr->dest.is_ssa);
4229 result = ac_to_integer(&ctx->ac, result);
4230 ctx->ssa_defs[instr->dest.ssa.index] = result;
4231 }
4232 }
4233
4234
4235 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4236 {
4237 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4238 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4239
4240 ctx->ssa_defs[instr->dest.ssa.index] = result;
4241 _mesa_hash_table_insert(ctx->phis, instr, result);
4242 }
4243
4244 static void visit_post_phi(struct ac_nir_context *ctx,
4245 nir_phi_instr *instr,
4246 LLVMValueRef llvm_phi)
4247 {
4248 nir_foreach_phi_src(src, instr) {
4249 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4250 LLVMValueRef llvm_src = get_src(ctx, src->src);
4251
4252 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4253 }
4254 }
4255
4256 static void phi_post_pass(struct ac_nir_context *ctx)
4257 {
4258 hash_table_foreach(ctx->phis, entry) {
4259 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4260 (LLVMValueRef)entry->data);
4261 }
4262 }
4263
4264
4265 static void visit_ssa_undef(struct ac_nir_context *ctx,
4266 const nir_ssa_undef_instr *instr)
4267 {
4268 unsigned num_components = instr->def.num_components;
4269 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4270 LLVMValueRef undef;
4271
4272 if (num_components == 1)
4273 undef = LLVMGetUndef(type);
4274 else {
4275 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4276 }
4277 ctx->ssa_defs[instr->def.index] = undef;
4278 }
4279
4280 static void visit_jump(struct ac_llvm_context *ctx,
4281 const nir_jump_instr *instr)
4282 {
4283 switch (instr->type) {
4284 case nir_jump_break:
4285 ac_build_break(ctx);
4286 break;
4287 case nir_jump_continue:
4288 ac_build_continue(ctx);
4289 break;
4290 default:
4291 fprintf(stderr, "Unknown NIR jump instr: ");
4292 nir_print_instr(&instr->instr, stderr);
4293 fprintf(stderr, "\n");
4294 abort();
4295 }
4296 }
4297
4298 static LLVMTypeRef
4299 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4300 enum glsl_base_type type)
4301 {
4302 switch (type) {
4303 case GLSL_TYPE_INT:
4304 case GLSL_TYPE_UINT:
4305 case GLSL_TYPE_BOOL:
4306 case GLSL_TYPE_SUBROUTINE:
4307 return ac->i32;
4308 case GLSL_TYPE_INT8:
4309 case GLSL_TYPE_UINT8:
4310 return ac->i8;
4311 case GLSL_TYPE_INT16:
4312 case GLSL_TYPE_UINT16:
4313 return ac->i16;
4314 case GLSL_TYPE_FLOAT:
4315 return ac->f32;
4316 case GLSL_TYPE_FLOAT16:
4317 return ac->f16;
4318 case GLSL_TYPE_INT64:
4319 case GLSL_TYPE_UINT64:
4320 return ac->i64;
4321 case GLSL_TYPE_DOUBLE:
4322 return ac->f64;
4323 default:
4324 unreachable("unknown GLSL type");
4325 }
4326 }
4327
4328 static LLVMTypeRef
4329 glsl_to_llvm_type(struct ac_llvm_context *ac,
4330 const struct glsl_type *type)
4331 {
4332 if (glsl_type_is_scalar(type)) {
4333 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4334 }
4335
4336 if (glsl_type_is_vector(type)) {
4337 return LLVMVectorType(
4338 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4339 glsl_get_vector_elements(type));
4340 }
4341
4342 if (glsl_type_is_matrix(type)) {
4343 return LLVMArrayType(
4344 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4345 glsl_get_matrix_columns(type));
4346 }
4347
4348 if (glsl_type_is_array(type)) {
4349 return LLVMArrayType(
4350 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4351 glsl_get_length(type));
4352 }
4353
4354 assert(glsl_type_is_struct_or_ifc(type));
4355
4356 LLVMTypeRef member_types[glsl_get_length(type)];
4357
4358 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4359 member_types[i] =
4360 glsl_to_llvm_type(ac,
4361 glsl_get_struct_field(type, i));
4362 }
4363
4364 return LLVMStructTypeInContext(ac->context, member_types,
4365 glsl_get_length(type), false);
4366 }
4367
4368 static void visit_deref(struct ac_nir_context *ctx,
4369 nir_deref_instr *instr)
4370 {
4371 if (instr->mode != nir_var_mem_shared &&
4372 instr->mode != nir_var_mem_global)
4373 return;
4374
4375 LLVMValueRef result = NULL;
4376 switch(instr->deref_type) {
4377 case nir_deref_type_var: {
4378 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4379 result = entry->data;
4380 break;
4381 }
4382 case nir_deref_type_struct:
4383 if (instr->mode == nir_var_mem_global) {
4384 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4385 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4386 instr->strct.index);
4387 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4388 LLVMConstInt(ctx->ac.i32, offset, 0));
4389 } else {
4390 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4391 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4392 }
4393 break;
4394 case nir_deref_type_array:
4395 if (instr->mode == nir_var_mem_global) {
4396 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4397 unsigned stride = glsl_get_explicit_stride(parent->type);
4398
4399 if ((glsl_type_is_matrix(parent->type) &&
4400 glsl_matrix_type_is_row_major(parent->type)) ||
4401 (glsl_type_is_vector(parent->type) && stride == 0))
4402 stride = type_scalar_size_bytes(parent->type);
4403
4404 assert(stride > 0);
4405 LLVMValueRef index = get_src(ctx, instr->arr.index);
4406 if (LLVMTypeOf(index) != ctx->ac.i64)
4407 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4408
4409 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4410
4411 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4412 } else {
4413 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4414 get_src(ctx, instr->arr.index));
4415 }
4416 break;
4417 case nir_deref_type_ptr_as_array:
4418 if (instr->mode == nir_var_mem_global) {
4419 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4420
4421 LLVMValueRef index = get_src(ctx, instr->arr.index);
4422 if (LLVMTypeOf(index) != ctx->ac.i64)
4423 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4424
4425 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4426
4427 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4428 } else {
4429 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4430 get_src(ctx, instr->arr.index));
4431 }
4432 break;
4433 case nir_deref_type_cast: {
4434 result = get_src(ctx, instr->parent);
4435
4436 /* We can't use the structs from LLVM because the shader
4437 * specifies its own offsets. */
4438 LLVMTypeRef pointee_type = ctx->ac.i8;
4439 if (instr->mode == nir_var_mem_shared)
4440 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4441
4442 unsigned address_space;
4443
4444 switch(instr->mode) {
4445 case nir_var_mem_shared:
4446 address_space = AC_ADDR_SPACE_LDS;
4447 break;
4448 case nir_var_mem_global:
4449 address_space = AC_ADDR_SPACE_GLOBAL;
4450 break;
4451 default:
4452 unreachable("Unhandled address space");
4453 }
4454
4455 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4456
4457 if (LLVMTypeOf(result) != type) {
4458 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4459 result = LLVMBuildBitCast(ctx->ac.builder, result,
4460 type, "");
4461 } else {
4462 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4463 type, "");
4464 }
4465 }
4466 break;
4467 }
4468 default:
4469 unreachable("Unhandled deref_instr deref type");
4470 }
4471
4472 ctx->ssa_defs[instr->dest.ssa.index] = result;
4473 }
4474
4475 static void visit_cf_list(struct ac_nir_context *ctx,
4476 struct exec_list *list);
4477
4478 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4479 {
4480 nir_foreach_instr(instr, block)
4481 {
4482 switch (instr->type) {
4483 case nir_instr_type_alu:
4484 visit_alu(ctx, nir_instr_as_alu(instr));
4485 break;
4486 case nir_instr_type_load_const:
4487 visit_load_const(ctx, nir_instr_as_load_const(instr));
4488 break;
4489 case nir_instr_type_intrinsic:
4490 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4491 break;
4492 case nir_instr_type_tex:
4493 visit_tex(ctx, nir_instr_as_tex(instr));
4494 break;
4495 case nir_instr_type_phi:
4496 visit_phi(ctx, nir_instr_as_phi(instr));
4497 break;
4498 case nir_instr_type_ssa_undef:
4499 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4500 break;
4501 case nir_instr_type_jump:
4502 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4503 break;
4504 case nir_instr_type_deref:
4505 visit_deref(ctx, nir_instr_as_deref(instr));
4506 break;
4507 default:
4508 fprintf(stderr, "Unknown NIR instr type: ");
4509 nir_print_instr(instr, stderr);
4510 fprintf(stderr, "\n");
4511 abort();
4512 }
4513 }
4514
4515 _mesa_hash_table_insert(ctx->defs, block,
4516 LLVMGetInsertBlock(ctx->ac.builder));
4517 }
4518
4519 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4520 {
4521 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4522
4523 nir_block *then_block =
4524 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4525
4526 ac_build_uif(&ctx->ac, value, then_block->index);
4527
4528 visit_cf_list(ctx, &if_stmt->then_list);
4529
4530 if (!exec_list_is_empty(&if_stmt->else_list)) {
4531 nir_block *else_block =
4532 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4533
4534 ac_build_else(&ctx->ac, else_block->index);
4535 visit_cf_list(ctx, &if_stmt->else_list);
4536 }
4537
4538 ac_build_endif(&ctx->ac, then_block->index);
4539 }
4540
4541 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4542 {
4543 nir_block *first_loop_block =
4544 (nir_block *) exec_list_get_head(&loop->body);
4545
4546 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4547
4548 visit_cf_list(ctx, &loop->body);
4549
4550 ac_build_endloop(&ctx->ac, first_loop_block->index);
4551 }
4552
4553 static void visit_cf_list(struct ac_nir_context *ctx,
4554 struct exec_list *list)
4555 {
4556 foreach_list_typed(nir_cf_node, node, node, list)
4557 {
4558 switch (node->type) {
4559 case nir_cf_node_block:
4560 visit_block(ctx, nir_cf_node_as_block(node));
4561 break;
4562
4563 case nir_cf_node_if:
4564 visit_if(ctx, nir_cf_node_as_if(node));
4565 break;
4566
4567 case nir_cf_node_loop:
4568 visit_loop(ctx, nir_cf_node_as_loop(node));
4569 break;
4570
4571 default:
4572 assert(0);
4573 }
4574 }
4575 }
4576
4577 void
4578 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4579 struct ac_shader_abi *abi,
4580 struct nir_shader *nir,
4581 struct nir_variable *variable,
4582 gl_shader_stage stage)
4583 {
4584 unsigned output_loc = variable->data.driver_location / 4;
4585 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4586
4587 /* tess ctrl has it's own load/store paths for outputs */
4588 if (stage == MESA_SHADER_TESS_CTRL)
4589 return;
4590
4591 if (stage == MESA_SHADER_VERTEX ||
4592 stage == MESA_SHADER_TESS_EVAL ||
4593 stage == MESA_SHADER_GEOMETRY) {
4594 int idx = variable->data.location + variable->data.index;
4595 if (idx == VARYING_SLOT_CLIP_DIST0) {
4596 int length = nir->info.clip_distance_array_size +
4597 nir->info.cull_distance_array_size;
4598
4599 if (length > 4)
4600 attrib_count = 2;
4601 else
4602 attrib_count = 1;
4603 }
4604 }
4605
4606 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4607 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4608 for (unsigned i = 0; i < attrib_count; ++i) {
4609 for (unsigned chan = 0; chan < 4; chan++) {
4610 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4611 ac_build_alloca_undef(ctx, type, "");
4612 }
4613 }
4614 }
4615
4616 static void
4617 setup_locals(struct ac_nir_context *ctx,
4618 struct nir_function *func)
4619 {
4620 int i, j;
4621 ctx->num_locals = 0;
4622 nir_foreach_variable(variable, &func->impl->locals) {
4623 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4624 variable->data.driver_location = ctx->num_locals * 4;
4625 variable->data.location_frac = 0;
4626 ctx->num_locals += attrib_count;
4627 }
4628 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4629 if (!ctx->locals)
4630 return;
4631
4632 for (i = 0; i < ctx->num_locals; i++) {
4633 for (j = 0; j < 4; j++) {
4634 ctx->locals[i * 4 + j] =
4635 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4636 }
4637 }
4638 }
4639
4640 static void
4641 setup_scratch(struct ac_nir_context *ctx,
4642 struct nir_shader *shader)
4643 {
4644 if (shader->scratch_size == 0)
4645 return;
4646
4647 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
4648 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
4649 "scratch");
4650 }
4651
4652 static void
4653 setup_constant_data(struct ac_nir_context *ctx,
4654 struct nir_shader *shader)
4655 {
4656 if (!shader->constant_data)
4657 return;
4658
4659 LLVMValueRef data =
4660 LLVMConstStringInContext(ctx->ac.context,
4661 shader->constant_data,
4662 shader->constant_data_size,
4663 true);
4664 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
4665
4666 /* We want to put the constant data in the CONST address space so that
4667 * we can use scalar loads. However, LLVM versions before 10 put these
4668 * variables in the same section as the code, which is unacceptable
4669 * for RadeonSI as it needs to relocate all the data sections after
4670 * the code sections. See https://reviews.llvm.org/D65813.
4671 */
4672 unsigned address_space =
4673 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
4674
4675 LLVMValueRef global =
4676 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
4677 "const_data",
4678 address_space);
4679
4680 LLVMSetInitializer(global, data);
4681 LLVMSetGlobalConstant(global, true);
4682 LLVMSetVisibility(global, LLVMHiddenVisibility);
4683 ctx->constant_data = global;
4684 }
4685
4686 static void
4687 setup_shared(struct ac_nir_context *ctx,
4688 struct nir_shader *nir)
4689 {
4690 nir_foreach_variable(variable, &nir->shared) {
4691 LLVMValueRef shared =
4692 LLVMAddGlobalInAddressSpace(
4693 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4694 variable->name ? variable->name : "",
4695 AC_ADDR_SPACE_LDS);
4696 _mesa_hash_table_insert(ctx->vars, variable, shared);
4697 }
4698 }
4699
4700 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4701 struct nir_shader *nir)
4702 {
4703 struct ac_nir_context ctx = {};
4704 struct nir_function *func;
4705
4706 ctx.ac = *ac;
4707 ctx.abi = abi;
4708
4709 ctx.stage = nir->info.stage;
4710 ctx.info = &nir->info;
4711
4712 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4713
4714 nir_foreach_variable(variable, &nir->outputs)
4715 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4716 ctx.stage);
4717
4718 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4719 _mesa_key_pointer_equal);
4720 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4721 _mesa_key_pointer_equal);
4722 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4723 _mesa_key_pointer_equal);
4724
4725 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4726
4727 nir_index_ssa_defs(func->impl);
4728 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4729
4730 setup_locals(&ctx, func);
4731 setup_scratch(&ctx, nir);
4732 setup_constant_data(&ctx, nir);
4733
4734 if (gl_shader_stage_is_compute(nir->info.stage))
4735 setup_shared(&ctx, nir);
4736
4737 visit_cf_list(&ctx, &func->impl->body);
4738 phi_post_pass(&ctx);
4739
4740 if (!gl_shader_stage_is_compute(nir->info.stage))
4741 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4742 ctx.abi->outputs);
4743
4744 free(ctx.locals);
4745 free(ctx.ssa_defs);
4746 ralloc_free(ctx.defs);
4747 ralloc_free(ctx.phis);
4748 ralloc_free(ctx.vars);
4749 }
4750
4751 void
4752 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4753 {
4754 /* Lower large variables to scratch first so that we won't bloat the
4755 * shader by generating large if ladders for them. We later lower
4756 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
4757 */
4758 NIR_PASS_V(nir, nir_lower_vars_to_scratch,
4759 nir_var_function_temp,
4760 256,
4761 glsl_get_natural_size_align_bytes);
4762
4763 /* While it would be nice not to have this flag, we are constrained
4764 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
4765 */
4766 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
4767
4768 /* TODO: Indirect indexing of GS inputs is unimplemented.
4769 *
4770 * TCS and TES load inputs directly from LDS or offchip memory, so
4771 * indirect indexing is trivial.
4772 */
4773 nir_variable_mode indirect_mask = 0;
4774 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4775 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4776 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4777 !llvm_has_working_vgpr_indexing)) {
4778 indirect_mask |= nir_var_shader_in;
4779 }
4780 if (!llvm_has_working_vgpr_indexing &&
4781 nir->info.stage != MESA_SHADER_TESS_CTRL)
4782 indirect_mask |= nir_var_shader_out;
4783
4784 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4785 * smart enough to handle indirects without causing excess spilling
4786 * causing the gpu to hang.
4787 *
4788 * See the following thread for more details of the problem:
4789 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4790 */
4791 indirect_mask |= nir_var_function_temp;
4792
4793 nir_lower_indirect_derefs(nir, indirect_mask);
4794 }
4795
4796 static unsigned
4797 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4798 {
4799 if (intrin->intrinsic != nir_intrinsic_store_deref)
4800 return 0;
4801
4802 nir_variable *var =
4803 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4804
4805 if (var->data.mode != nir_var_shader_out)
4806 return 0;
4807
4808 unsigned writemask = 0;
4809 const int location = var->data.location;
4810 unsigned first_component = var->data.location_frac;
4811 unsigned num_comps = intrin->dest.ssa.num_components;
4812
4813 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4814 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4815 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4816 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4817
4818 return writemask;
4819 }
4820
4821 static void
4822 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4823 unsigned *cond_block_tf_writemask,
4824 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4825 {
4826 switch (cf_node->type) {
4827 case nir_cf_node_block: {
4828 nir_block *block = nir_cf_node_as_block(cf_node);
4829 nir_foreach_instr(instr, block) {
4830 if (instr->type != nir_instr_type_intrinsic)
4831 continue;
4832
4833 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4834 if (intrin->intrinsic == nir_intrinsic_barrier) {
4835
4836 /* If we find a barrier in nested control flow put this in the
4837 * too hard basket. In GLSL this is not possible but it is in
4838 * SPIR-V.
4839 */
4840 if (is_nested_cf) {
4841 *tessfactors_are_def_in_all_invocs = false;
4842 return;
4843 }
4844
4845 /* The following case must be prevented:
4846 * gl_TessLevelInner = ...;
4847 * barrier();
4848 * if (gl_InvocationID == 1)
4849 * gl_TessLevelInner = ...;
4850 *
4851 * If you consider disjoint code segments separated by barriers, each
4852 * such segment that writes tess factor channels should write the same
4853 * channels in all codepaths within that segment.
4854 */
4855 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4856 /* Accumulate the result: */
4857 *tessfactors_are_def_in_all_invocs &=
4858 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4859
4860 /* Analyze the next code segment from scratch. */
4861 *upper_block_tf_writemask = 0;
4862 *cond_block_tf_writemask = 0;
4863 }
4864 } else
4865 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4866 }
4867
4868 break;
4869 }
4870 case nir_cf_node_if: {
4871 unsigned then_tessfactor_writemask = 0;
4872 unsigned else_tessfactor_writemask = 0;
4873
4874 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4875 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4876 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4877 cond_block_tf_writemask,
4878 tessfactors_are_def_in_all_invocs, true);
4879 }
4880
4881 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4882 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4883 cond_block_tf_writemask,
4884 tessfactors_are_def_in_all_invocs, true);
4885 }
4886
4887 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4888 /* If both statements write the same tess factor channels,
4889 * we can say that the upper block writes them too.
4890 */
4891 *upper_block_tf_writemask |= then_tessfactor_writemask &
4892 else_tessfactor_writemask;
4893 *cond_block_tf_writemask |= then_tessfactor_writemask |
4894 else_tessfactor_writemask;
4895 }
4896
4897 break;
4898 }
4899 case nir_cf_node_loop: {
4900 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4901 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4902 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4903 cond_block_tf_writemask,
4904 tessfactors_are_def_in_all_invocs, true);
4905 }
4906
4907 break;
4908 }
4909 default:
4910 unreachable("unknown cf node type");
4911 }
4912 }
4913
4914 bool
4915 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4916 {
4917 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4918
4919 /* The pass works as follows:
4920 * If all codepaths write tess factors, we can say that all
4921 * invocations define tess factors.
4922 *
4923 * Each tess factor channel is tracked separately.
4924 */
4925 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4926 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4927
4928 /* Initial value = true. Here the pass will accumulate results from
4929 * multiple segments surrounded by barriers. If tess factors aren't
4930 * written at all, it's a shader bug and we don't care if this will be
4931 * true.
4932 */
4933 bool tessfactors_are_def_in_all_invocs = true;
4934
4935 nir_foreach_function(function, nir) {
4936 if (function->impl) {
4937 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4938 scan_tess_ctrl(node, &main_block_tf_writemask,
4939 &cond_block_tf_writemask,
4940 &tessfactors_are_def_in_all_invocs,
4941 false);
4942 }
4943 }
4944 }
4945
4946 /* Accumulate the result for the last code segment separated by a
4947 * barrier.
4948 */
4949 if (main_block_tf_writemask || cond_block_tf_writemask) {
4950 tessfactors_are_def_in_all_invocs &=
4951 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4952 }
4953
4954 return tessfactors_are_def_in_all_invocs;
4955 }