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ac/llvm: convert src operands to pointers if necessary
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54
55 LLVMValueRef main_function;
56 LLVMBasicBlockRef continue_block;
57 LLVMBasicBlockRef break_block;
58
59 int num_locals;
60 LLVMValueRef *locals;
61 };
62
63 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
64 nir_deref_instr *deref_instr,
65 enum ac_descriptor_type desc_type,
66 const nir_instr *instr,
67 bool image, bool write);
68
69 static void
70 build_store_values_extended(struct ac_llvm_context *ac,
71 LLVMValueRef *values,
72 unsigned value_count,
73 unsigned value_stride,
74 LLVMValueRef vec)
75 {
76 LLVMBuilderRef builder = ac->builder;
77 unsigned i;
78
79 for (i = 0; i < value_count; i++) {
80 LLVMValueRef ptr = values[i * value_stride];
81 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
82 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
83 LLVMBuildStore(builder, value, ptr);
84 }
85 }
86
87 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
88 const nir_ssa_def *def)
89 {
90 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
91 if (def->num_components > 1) {
92 type = LLVMVectorType(type, def->num_components);
93 }
94 return type;
95 }
96
97 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
98 {
99 assert(src.is_ssa);
100 return nir->ssa_defs[src.ssa->index];
101 }
102
103 static LLVMValueRef
104 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
105 {
106 LLVMValueRef ptr = get_src(ctx, src);
107 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
108 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
109
110 return LLVMBuildBitCast(ctx->ac.builder, ptr,
111 LLVMPointerType(ctx->ac.i32, addr_space), "");
112 }
113
114 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
115 const struct nir_block *b)
116 {
117 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
118 return (LLVMBasicBlockRef)entry->data;
119 }
120
121 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
122 nir_alu_src src,
123 unsigned num_components)
124 {
125 LLVMValueRef value = get_src(ctx, src.src);
126 bool need_swizzle = false;
127
128 assert(value);
129 unsigned src_components = ac_get_llvm_num_components(value);
130 for (unsigned i = 0; i < num_components; ++i) {
131 assert(src.swizzle[i] < src_components);
132 if (src.swizzle[i] != i)
133 need_swizzle = true;
134 }
135
136 if (need_swizzle || num_components != src_components) {
137 LLVMValueRef masks[] = {
138 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
139 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
140 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
141 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
142
143 if (src_components > 1 && num_components == 1) {
144 value = LLVMBuildExtractElement(ctx->ac.builder, value,
145 masks[0], "");
146 } else if (src_components == 1 && num_components > 1) {
147 LLVMValueRef values[] = {value, value, value, value};
148 value = ac_build_gather_values(&ctx->ac, values, num_components);
149 } else {
150 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
151 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
152 swizzle, "");
153 }
154 }
155 assert(!src.negate);
156 assert(!src.abs);
157 return value;
158 }
159
160 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
161 LLVMIntPredicate pred, LLVMValueRef src0,
162 LLVMValueRef src1)
163 {
164 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
165 return LLVMBuildSelect(ctx->builder, result,
166 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
167 ctx->i32_0, "");
168 }
169
170 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
171 LLVMRealPredicate pred, LLVMValueRef src0,
172 LLVMValueRef src1)
173 {
174 LLVMValueRef result;
175 src0 = ac_to_float(ctx, src0);
176 src1 = ac_to_float(ctx, src1);
177 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
178 return LLVMBuildSelect(ctx->builder, result,
179 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
180 ctx->i32_0, "");
181 }
182
183 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
184 const char *intrin,
185 LLVMTypeRef result_type,
186 LLVMValueRef src0)
187 {
188 char name[64];
189 LLVMValueRef params[] = {
190 ac_to_float(ctx, src0),
191 };
192
193 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
194 ac_get_elem_bits(ctx, result_type));
195 assert(length < sizeof(name));
196 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
197 }
198
199 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
200 const char *intrin,
201 LLVMTypeRef result_type,
202 LLVMValueRef src0, LLVMValueRef src1)
203 {
204 char name[64];
205 LLVMValueRef params[] = {
206 ac_to_float(ctx, src0),
207 ac_to_float(ctx, src1),
208 };
209
210 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
211 ac_get_elem_bits(ctx, result_type));
212 assert(length < sizeof(name));
213 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
214 }
215
216 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
217 const char *intrin,
218 LLVMTypeRef result_type,
219 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
220 {
221 char name[64];
222 LLVMValueRef params[] = {
223 ac_to_float(ctx, src0),
224 ac_to_float(ctx, src1),
225 ac_to_float(ctx, src2),
226 };
227
228 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
229 ac_get_elem_bits(ctx, result_type));
230 assert(length < sizeof(name));
231 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
232 }
233
234 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
235 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
236 {
237 LLVMTypeRef src1_type = LLVMTypeOf(src1);
238 LLVMTypeRef src2_type = LLVMTypeOf(src2);
239
240 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
241
242 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
243 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
244 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
245 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
246 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
247 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
248 }
249
250 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
251 ctx->i32_0, "");
252 return LLVMBuildSelect(ctx->builder, v,
253 ac_to_integer_or_pointer(ctx, src1),
254 ac_to_integer_or_pointer(ctx, src2), "");
255 }
256
257 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
258 LLVMValueRef src0)
259 {
260 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
261 }
262
263 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
264 const char *intrin,
265 LLVMValueRef src0, LLVMValueRef src1)
266 {
267 LLVMTypeRef ret_type;
268 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
269 LLVMValueRef res;
270 LLVMValueRef params[] = { src0, src1 };
271 ret_type = LLVMStructTypeInContext(ctx->context, types,
272 2, true);
273
274 res = ac_build_intrinsic(ctx, intrin, ret_type,
275 params, 2, AC_FUNC_ATTR_READNONE);
276
277 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
278 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
279 return res;
280 }
281
282 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
283 LLVMValueRef src0,
284 unsigned bitsize)
285 {
286 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
287 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
288 "");
289 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
290
291 switch (bitsize) {
292 case 16:
293 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
294 case 32:
295 return result;
296 case 64:
297 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
298 default:
299 unreachable("Unsupported bit size.");
300 }
301 }
302
303 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
304 LLVMValueRef src0)
305 {
306 src0 = ac_to_float(ctx, src0);
307 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
308 return LLVMBuildSExt(ctx->builder,
309 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
310 ctx->i32, "");
311 }
312
313 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
314 LLVMValueRef src0,
315 unsigned bitsize)
316 {
317 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
318
319 switch (bitsize) {
320 case 8:
321 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
322 case 16:
323 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
324 case 32:
325 return result;
326 case 64:
327 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
328 default:
329 unreachable("Unsupported bit size.");
330 }
331 }
332
333 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
334 LLVMValueRef src0)
335 {
336 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
337 return LLVMBuildSExt(ctx->builder,
338 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
339 ctx->i32, "");
340 }
341
342 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
343 LLVMValueRef src0)
344 {
345 LLVMValueRef result;
346 LLVMValueRef cond = NULL;
347
348 src0 = ac_to_float(ctx, src0);
349 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
350
351 if (ctx->chip_class >= GFX8) {
352 LLVMValueRef args[2];
353 /* Check if the result is a denormal - and flush to 0 if so. */
354 args[0] = result;
355 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
356 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
357 }
358
359 /* need to convert back up to f32 */
360 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
361
362 if (ctx->chip_class >= GFX8)
363 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
364 else {
365 /* for GFX6-GFX7 */
366 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
367 * so compare the result and flush to 0 if it's smaller.
368 */
369 LLVMValueRef temp, cond2;
370 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
371 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
372 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
373 temp, "");
374 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
375 temp, ctx->f32_0, "");
376 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
377 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
378 }
379 return result;
380 }
381
382 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
383 LLVMValueRef src0, LLVMValueRef src1)
384 {
385 LLVMValueRef dst64, result;
386 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
387 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
388
389 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
390 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
391 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
392 return result;
393 }
394
395 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
396 LLVMValueRef src0, LLVMValueRef src1)
397 {
398 LLVMValueRef dst64, result;
399 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
400 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
401
402 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
403 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
404 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
405 return result;
406 }
407
408 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
409 LLVMValueRef bits, LLVMValueRef offset)
410 {
411 /* mask = ((1 << bits) - 1) << offset */
412 return LLVMBuildShl(ctx->builder,
413 LLVMBuildSub(ctx->builder,
414 LLVMBuildShl(ctx->builder,
415 ctx->i32_1,
416 bits, ""),
417 ctx->i32_1, ""),
418 offset, "");
419 }
420
421 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
422 LLVMValueRef mask, LLVMValueRef insert,
423 LLVMValueRef base)
424 {
425 /* Calculate:
426 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
427 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
428 */
429 return LLVMBuildXor(ctx->builder, base,
430 LLVMBuildAnd(ctx->builder, mask,
431 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
432 }
433
434 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
435 LLVMValueRef src0,
436 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
437 LLVMValueRef args[2]))
438 {
439 LLVMValueRef comp[2];
440
441 src0 = ac_to_float(ctx, src0);
442 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
443 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
444
445 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
446 }
447
448 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
449 LLVMValueRef src0)
450 {
451 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
452 LLVMValueRef temps[2], val;
453 int i;
454
455 for (i = 0; i < 2; i++) {
456 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
457 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
458 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
459 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
460 }
461 return ac_build_gather_values(ctx, temps, 2);
462 }
463
464 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
465 nir_op op,
466 LLVMValueRef src0)
467 {
468 unsigned mask;
469 int idx;
470 LLVMValueRef result;
471
472 if (op == nir_op_fddx_fine)
473 mask = AC_TID_MASK_LEFT;
474 else if (op == nir_op_fddy_fine)
475 mask = AC_TID_MASK_TOP;
476 else
477 mask = AC_TID_MASK_TOP_LEFT;
478
479 /* for DDX we want to next X pixel, DDY next Y pixel. */
480 if (op == nir_op_fddx_fine ||
481 op == nir_op_fddx_coarse ||
482 op == nir_op_fddx)
483 idx = 1;
484 else
485 idx = 2;
486
487 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
488 return result;
489 }
490
491 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
492 {
493 LLVMValueRef src[4], result = NULL;
494 unsigned num_components = instr->dest.dest.ssa.num_components;
495 unsigned src_components;
496 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
497
498 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
499 switch (instr->op) {
500 case nir_op_vec2:
501 case nir_op_vec3:
502 case nir_op_vec4:
503 src_components = 1;
504 break;
505 case nir_op_pack_half_2x16:
506 case nir_op_pack_snorm_2x16:
507 case nir_op_pack_unorm_2x16:
508 src_components = 2;
509 break;
510 case nir_op_unpack_half_2x16:
511 src_components = 1;
512 break;
513 case nir_op_cube_face_coord:
514 case nir_op_cube_face_index:
515 src_components = 3;
516 break;
517 default:
518 src_components = num_components;
519 break;
520 }
521 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
522 src[i] = get_alu_src(ctx, instr->src[i], src_components);
523
524 switch (instr->op) {
525 case nir_op_mov:
526 result = src[0];
527 break;
528 case nir_op_fneg:
529 src[0] = ac_to_float(&ctx->ac, src[0]);
530 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
531 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
532 /* fneg will be optimized by backend compiler with sign
533 * bit removed via XOR. This is probably a LLVM bug.
534 */
535 result = ac_build_canonicalize(&ctx->ac, result,
536 instr->dest.dest.ssa.bit_size);
537 }
538 break;
539 case nir_op_ineg:
540 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
541 break;
542 case nir_op_inot:
543 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
544 break;
545 case nir_op_iadd:
546 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
547 break;
548 case nir_op_fadd:
549 src[0] = ac_to_float(&ctx->ac, src[0]);
550 src[1] = ac_to_float(&ctx->ac, src[1]);
551 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
552 break;
553 case nir_op_fsub:
554 src[0] = ac_to_float(&ctx->ac, src[0]);
555 src[1] = ac_to_float(&ctx->ac, src[1]);
556 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
557 break;
558 case nir_op_isub:
559 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
560 break;
561 case nir_op_imul:
562 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
563 break;
564 case nir_op_imod:
565 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
566 break;
567 case nir_op_umod:
568 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
569 break;
570 case nir_op_fmod:
571 /* lower_fmod only lower 16-bit and 32-bit fmod */
572 assert(instr->dest.dest.ssa.bit_size == 64);
573 src[0] = ac_to_float(&ctx->ac, src[0]);
574 src[1] = ac_to_float(&ctx->ac, src[1]);
575 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
576 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
577 ac_to_float_type(&ctx->ac, def_type), result);
578 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
579 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
580 break;
581 case nir_op_irem:
582 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
583 break;
584 case nir_op_idiv:
585 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
586 break;
587 case nir_op_udiv:
588 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
589 break;
590 case nir_op_fmul:
591 src[0] = ac_to_float(&ctx->ac, src[0]);
592 src[1] = ac_to_float(&ctx->ac, src[1]);
593 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
594 break;
595 case nir_op_frcp:
596 src[0] = ac_to_float(&ctx->ac, src[0]);
597 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
598 break;
599 case nir_op_iand:
600 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
601 break;
602 case nir_op_ior:
603 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
604 break;
605 case nir_op_ixor:
606 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
607 break;
608 case nir_op_ishl:
609 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
610 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
611 LLVMTypeOf(src[0]), "");
612 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
613 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
614 LLVMTypeOf(src[0]), "");
615 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
616 break;
617 case nir_op_ishr:
618 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
619 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
620 LLVMTypeOf(src[0]), "");
621 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
622 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
623 LLVMTypeOf(src[0]), "");
624 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
625 break;
626 case nir_op_ushr:
627 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
628 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
629 LLVMTypeOf(src[0]), "");
630 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
631 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
632 LLVMTypeOf(src[0]), "");
633 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
634 break;
635 case nir_op_ilt32:
636 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
637 break;
638 case nir_op_ine32:
639 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
640 break;
641 case nir_op_ieq32:
642 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
643 break;
644 case nir_op_ige32:
645 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
646 break;
647 case nir_op_ult32:
648 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
649 break;
650 case nir_op_uge32:
651 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
652 break;
653 case nir_op_feq32:
654 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
655 break;
656 case nir_op_fne32:
657 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
658 break;
659 case nir_op_flt32:
660 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
661 break;
662 case nir_op_fge32:
663 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
664 break;
665 case nir_op_fabs:
666 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
667 ac_to_float_type(&ctx->ac, def_type), src[0]);
668 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
669 /* fabs will be optimized by backend compiler with sign
670 * bit removed via AND.
671 */
672 result = ac_build_canonicalize(&ctx->ac, result,
673 instr->dest.dest.ssa.bit_size);
674 }
675 break;
676 case nir_op_iabs:
677 result = emit_iabs(&ctx->ac, src[0]);
678 break;
679 case nir_op_imax:
680 result = ac_build_imax(&ctx->ac, src[0], src[1]);
681 break;
682 case nir_op_imin:
683 result = ac_build_imin(&ctx->ac, src[0], src[1]);
684 break;
685 case nir_op_umax:
686 result = ac_build_umax(&ctx->ac, src[0], src[1]);
687 break;
688 case nir_op_umin:
689 result = ac_build_umin(&ctx->ac, src[0], src[1]);
690 break;
691 case nir_op_isign:
692 result = ac_build_isign(&ctx->ac, src[0],
693 instr->dest.dest.ssa.bit_size);
694 break;
695 case nir_op_fsign:
696 src[0] = ac_to_float(&ctx->ac, src[0]);
697 result = ac_build_fsign(&ctx->ac, src[0],
698 instr->dest.dest.ssa.bit_size);
699 break;
700 case nir_op_ffloor:
701 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
702 ac_to_float_type(&ctx->ac, def_type), src[0]);
703 break;
704 case nir_op_ftrunc:
705 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
706 ac_to_float_type(&ctx->ac, def_type), src[0]);
707 break;
708 case nir_op_fceil:
709 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
710 ac_to_float_type(&ctx->ac, def_type), src[0]);
711 break;
712 case nir_op_fround_even:
713 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
714 ac_to_float_type(&ctx->ac, def_type),src[0]);
715 break;
716 case nir_op_ffract:
717 src[0] = ac_to_float(&ctx->ac, src[0]);
718 result = ac_build_fract(&ctx->ac, src[0],
719 instr->dest.dest.ssa.bit_size);
720 break;
721 case nir_op_fsin:
722 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
723 ac_to_float_type(&ctx->ac, def_type), src[0]);
724 break;
725 case nir_op_fcos:
726 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
727 ac_to_float_type(&ctx->ac, def_type), src[0]);
728 break;
729 case nir_op_fsqrt:
730 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
731 ac_to_float_type(&ctx->ac, def_type), src[0]);
732 break;
733 case nir_op_fexp2:
734 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
735 ac_to_float_type(&ctx->ac, def_type), src[0]);
736 break;
737 case nir_op_flog2:
738 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
739 ac_to_float_type(&ctx->ac, def_type), src[0]);
740 break;
741 case nir_op_frsq:
742 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
743 ac_to_float_type(&ctx->ac, def_type), src[0]);
744 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
745 break;
746 case nir_op_frexp_exp:
747 src[0] = ac_to_float(&ctx->ac, src[0]);
748 result = ac_build_frexp_exp(&ctx->ac, src[0],
749 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
750 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
751 result = LLVMBuildSExt(ctx->ac.builder, result,
752 ctx->ac.i32, "");
753 break;
754 case nir_op_frexp_sig:
755 src[0] = ac_to_float(&ctx->ac, src[0]);
756 result = ac_build_frexp_mant(&ctx->ac, src[0],
757 instr->dest.dest.ssa.bit_size);
758 break;
759 case nir_op_fpow:
760 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
761 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
762 break;
763 case nir_op_fmax:
764 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
765 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
766 if (ctx->ac.chip_class < GFX9 &&
767 instr->dest.dest.ssa.bit_size == 32) {
768 /* Only pre-GFX9 chips do not flush denorms. */
769 result = ac_build_canonicalize(&ctx->ac, result,
770 instr->dest.dest.ssa.bit_size);
771 }
772 break;
773 case nir_op_fmin:
774 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
775 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
776 if (ctx->ac.chip_class < GFX9 &&
777 instr->dest.dest.ssa.bit_size == 32) {
778 /* Only pre-GFX9 chips do not flush denorms. */
779 result = ac_build_canonicalize(&ctx->ac, result,
780 instr->dest.dest.ssa.bit_size);
781 }
782 break;
783 case nir_op_ffma:
784 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
785 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
786 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
787 break;
788 case nir_op_ldexp:
789 src[0] = ac_to_float(&ctx->ac, src[0]);
790 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
791 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
792 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
793 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
794 else
795 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
796 break;
797 case nir_op_bfm:
798 result = emit_bfm(&ctx->ac, src[0], src[1]);
799 break;
800 case nir_op_bitfield_select:
801 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
802 break;
803 case nir_op_ubfe:
804 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
805 break;
806 case nir_op_ibfe:
807 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
808 break;
809 case nir_op_bitfield_reverse:
810 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
811 break;
812 case nir_op_bit_count:
813 result = ac_build_bit_count(&ctx->ac, src[0]);
814 break;
815 case nir_op_vec2:
816 case nir_op_vec3:
817 case nir_op_vec4:
818 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
819 src[i] = ac_to_integer(&ctx->ac, src[i]);
820 result = ac_build_gather_values(&ctx->ac, src, num_components);
821 break;
822 case nir_op_f2i8:
823 case nir_op_f2i16:
824 case nir_op_f2i32:
825 case nir_op_f2i64:
826 src[0] = ac_to_float(&ctx->ac, src[0]);
827 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
828 break;
829 case nir_op_f2u8:
830 case nir_op_f2u16:
831 case nir_op_f2u32:
832 case nir_op_f2u64:
833 src[0] = ac_to_float(&ctx->ac, src[0]);
834 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
835 break;
836 case nir_op_i2f16:
837 case nir_op_i2f32:
838 case nir_op_i2f64:
839 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
840 break;
841 case nir_op_u2f16:
842 case nir_op_u2f32:
843 case nir_op_u2f64:
844 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
845 break;
846 case nir_op_f2f16_rtz:
847 src[0] = ac_to_float(&ctx->ac, src[0]);
848 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
849 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
850 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
851 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
852 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
853 break;
854 case nir_op_f2f16_rtne:
855 case nir_op_f2f16:
856 case nir_op_f2f32:
857 case nir_op_f2f64:
858 src[0] = ac_to_float(&ctx->ac, src[0]);
859 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
860 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
861 else
862 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
863 break;
864 case nir_op_u2u8:
865 case nir_op_u2u16:
866 case nir_op_u2u32:
867 case nir_op_u2u64:
868 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
869 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
870 else
871 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
872 break;
873 case nir_op_i2i8:
874 case nir_op_i2i16:
875 case nir_op_i2i32:
876 case nir_op_i2i64:
877 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
878 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
879 else
880 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
881 break;
882 case nir_op_b32csel:
883 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
884 break;
885 case nir_op_find_lsb:
886 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
887 break;
888 case nir_op_ufind_msb:
889 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
890 break;
891 case nir_op_ifind_msb:
892 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
893 break;
894 case nir_op_uadd_carry:
895 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
896 break;
897 case nir_op_usub_borrow:
898 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
899 break;
900 case nir_op_b2f16:
901 case nir_op_b2f32:
902 case nir_op_b2f64:
903 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
904 break;
905 case nir_op_f2b32:
906 result = emit_f2b(&ctx->ac, src[0]);
907 break;
908 case nir_op_b2i8:
909 case nir_op_b2i16:
910 case nir_op_b2i32:
911 case nir_op_b2i64:
912 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
913 break;
914 case nir_op_i2b32:
915 result = emit_i2b(&ctx->ac, src[0]);
916 break;
917 case nir_op_fquantize2f16:
918 result = emit_f2f16(&ctx->ac, src[0]);
919 break;
920 case nir_op_umul_high:
921 result = emit_umul_high(&ctx->ac, src[0], src[1]);
922 break;
923 case nir_op_imul_high:
924 result = emit_imul_high(&ctx->ac, src[0], src[1]);
925 break;
926 case nir_op_pack_half_2x16:
927 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
928 break;
929 case nir_op_pack_snorm_2x16:
930 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
931 break;
932 case nir_op_pack_unorm_2x16:
933 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
934 break;
935 case nir_op_unpack_half_2x16:
936 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
937 break;
938 case nir_op_fddx:
939 case nir_op_fddy:
940 case nir_op_fddx_fine:
941 case nir_op_fddy_fine:
942 case nir_op_fddx_coarse:
943 case nir_op_fddy_coarse:
944 result = emit_ddxy(ctx, instr->op, src[0]);
945 break;
946
947 case nir_op_unpack_64_2x32_split_x: {
948 assert(ac_get_llvm_num_components(src[0]) == 1);
949 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
950 ctx->ac.v2i32,
951 "");
952 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
953 ctx->ac.i32_0, "");
954 break;
955 }
956
957 case nir_op_unpack_64_2x32_split_y: {
958 assert(ac_get_llvm_num_components(src[0]) == 1);
959 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
960 ctx->ac.v2i32,
961 "");
962 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
963 ctx->ac.i32_1, "");
964 break;
965 }
966
967 case nir_op_pack_64_2x32_split: {
968 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
969 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
970 break;
971 }
972
973 case nir_op_pack_32_2x16_split: {
974 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
975 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
976 break;
977 }
978
979 case nir_op_unpack_32_2x16_split_x: {
980 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
981 ctx->ac.v2i16,
982 "");
983 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
984 ctx->ac.i32_0, "");
985 break;
986 }
987
988 case nir_op_unpack_32_2x16_split_y: {
989 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
990 ctx->ac.v2i16,
991 "");
992 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
993 ctx->ac.i32_1, "");
994 break;
995 }
996
997 case nir_op_cube_face_coord: {
998 src[0] = ac_to_float(&ctx->ac, src[0]);
999 LLVMValueRef results[2];
1000 LLVMValueRef in[3];
1001 for (unsigned chan = 0; chan < 3; chan++)
1002 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1003 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1004 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1005 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1006 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1007 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1008 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1009 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1010 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1011 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1012 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1013 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1014 result = ac_build_gather_values(&ctx->ac, results, 2);
1015 break;
1016 }
1017
1018 case nir_op_cube_face_index: {
1019 src[0] = ac_to_float(&ctx->ac, src[0]);
1020 LLVMValueRef in[3];
1021 for (unsigned chan = 0; chan < 3; chan++)
1022 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1023 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1024 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1025 break;
1026 }
1027
1028 case nir_op_fmin3:
1029 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1030 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1031 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1032 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1033 break;
1034 case nir_op_umin3:
1035 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1036 result = ac_build_umin(&ctx->ac, result, src[2]);
1037 break;
1038 case nir_op_imin3:
1039 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1040 result = ac_build_imin(&ctx->ac, result, src[2]);
1041 break;
1042 case nir_op_fmax3:
1043 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1044 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1045 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1046 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1047 break;
1048 case nir_op_umax3:
1049 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1050 result = ac_build_umax(&ctx->ac, result, src[2]);
1051 break;
1052 case nir_op_imax3:
1053 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1054 result = ac_build_imax(&ctx->ac, result, src[2]);
1055 break;
1056 case nir_op_fmed3: {
1057 src[0] = ac_to_float(&ctx->ac, src[0]);
1058 src[1] = ac_to_float(&ctx->ac, src[1]);
1059 src[2] = ac_to_float(&ctx->ac, src[2]);
1060 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1061 instr->dest.dest.ssa.bit_size);
1062 break;
1063 }
1064 case nir_op_imed3: {
1065 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1066 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1067 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1068 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1069 break;
1070 }
1071 case nir_op_umed3: {
1072 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1073 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1074 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1075 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1076 break;
1077 }
1078
1079 default:
1080 fprintf(stderr, "Unknown NIR alu instr: ");
1081 nir_print_instr(&instr->instr, stderr);
1082 fprintf(stderr, "\n");
1083 abort();
1084 }
1085
1086 if (result) {
1087 assert(instr->dest.dest.is_ssa);
1088 result = ac_to_integer_or_pointer(&ctx->ac, result);
1089 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1090 }
1091 }
1092
1093 static void visit_load_const(struct ac_nir_context *ctx,
1094 const nir_load_const_instr *instr)
1095 {
1096 LLVMValueRef values[4], value = NULL;
1097 LLVMTypeRef element_type =
1098 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1099
1100 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1101 switch (instr->def.bit_size) {
1102 case 8:
1103 values[i] = LLVMConstInt(element_type,
1104 instr->value[i].u8, false);
1105 break;
1106 case 16:
1107 values[i] = LLVMConstInt(element_type,
1108 instr->value[i].u16, false);
1109 break;
1110 case 32:
1111 values[i] = LLVMConstInt(element_type,
1112 instr->value[i].u32, false);
1113 break;
1114 case 64:
1115 values[i] = LLVMConstInt(element_type,
1116 instr->value[i].u64, false);
1117 break;
1118 default:
1119 fprintf(stderr,
1120 "unsupported nir load_const bit_size: %d\n",
1121 instr->def.bit_size);
1122 abort();
1123 }
1124 }
1125 if (instr->def.num_components > 1) {
1126 value = LLVMConstVector(values, instr->def.num_components);
1127 } else
1128 value = values[0];
1129
1130 ctx->ssa_defs[instr->def.index] = value;
1131 }
1132
1133 static LLVMValueRef
1134 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1135 {
1136 LLVMValueRef size =
1137 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1138 LLVMConstInt(ctx->ac.i32, 2, false), "");
1139
1140 /* GFX8 only */
1141 if (ctx->ac.chip_class == GFX8 && in_elements) {
1142 /* On GFX8, the descriptor contains the size in bytes,
1143 * but TXQ must return the size in elements.
1144 * The stride is always non-zero for resources using TXQ.
1145 */
1146 LLVMValueRef stride =
1147 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1148 ctx->ac.i32_1, "");
1149 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1150 LLVMConstInt(ctx->ac.i32, 16, false), "");
1151 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1152 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1153
1154 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1155 }
1156 return size;
1157 }
1158
1159 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1160 * incorrectly forces nearest filtering if the texture format is integer.
1161 * The only effect it has on Gather4, which always returns 4 texels for
1162 * bilinear filtering, is that the final coordinates are off by 0.5 of
1163 * the texel size.
1164 *
1165 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1166 * or (0.5 / size) from the normalized coordinates.
1167 *
1168 * However, cube textures with 8_8_8_8 data formats require a different
1169 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1170 * precision in 32-bit data formats, so it needs to be applied dynamically at
1171 * runtime. In this case, return an i1 value that indicates whether the
1172 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1173 */
1174 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1175 nir_variable *var,
1176 struct ac_image_args *args,
1177 const nir_tex_instr *instr)
1178 {
1179 const struct glsl_type *type = glsl_without_array(var->type);
1180 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1181 LLVMValueRef wa_8888 = NULL;
1182 LLVMValueRef half_texel[2];
1183 LLVMValueRef result;
1184
1185 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1186
1187 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1188 LLVMValueRef formats;
1189 LLVMValueRef data_format;
1190 LLVMValueRef wa_formats;
1191
1192 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1193
1194 data_format = LLVMBuildLShr(ctx->builder, formats,
1195 LLVMConstInt(ctx->i32, 20, false), "");
1196 data_format = LLVMBuildAnd(ctx->builder, data_format,
1197 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1198 wa_8888 = LLVMBuildICmp(
1199 ctx->builder, LLVMIntEQ, data_format,
1200 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1201 "");
1202
1203 uint32_t wa_num_format =
1204 stype == GLSL_TYPE_UINT ?
1205 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1206 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1207 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1208 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1209 "");
1210 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1211 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1212
1213 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1214 args->resource = LLVMBuildInsertElement(
1215 ctx->builder, args->resource, formats, ctx->i32_1, "");
1216 }
1217
1218 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1219 assert(!wa_8888);
1220 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1221 } else {
1222 struct ac_image_args resinfo = {};
1223 LLVMBasicBlockRef bbs[2];
1224
1225 LLVMValueRef unnorm = NULL;
1226 LLVMValueRef default_offset = ctx->f32_0;
1227 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1228 !instr->is_array) {
1229 /* In vulkan, whether the sampler uses unnormalized
1230 * coordinates or not is a dynamic property of the
1231 * sampler. Hence, to figure out whether or not we
1232 * need to divide by the texture size, we need to test
1233 * the sampler at runtime. This tests the bit set by
1234 * radv_init_sampler().
1235 */
1236 LLVMValueRef sampler0 =
1237 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1238 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1239 LLVMConstInt(ctx->i32, 15, false), "");
1240 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1241 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1242 default_offset = LLVMConstReal(ctx->f32, -0.5);
1243 }
1244
1245 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1246 if (wa_8888 || unnorm) {
1247 assert(!(wa_8888 && unnorm));
1248 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1249 /* Skip the texture size query entirely if we don't need it. */
1250 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1251 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1252 }
1253
1254 /* Query the texture size. */
1255 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1256 resinfo.opcode = ac_image_get_resinfo;
1257 resinfo.dmask = 0xf;
1258 resinfo.lod = ctx->i32_0;
1259 resinfo.resource = args->resource;
1260 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1261 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1262
1263 /* Compute -0.5 / size. */
1264 for (unsigned c = 0; c < 2; c++) {
1265 half_texel[c] =
1266 LLVMBuildExtractElement(ctx->builder, size,
1267 LLVMConstInt(ctx->i32, c, 0), "");
1268 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1269 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1270 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1271 LLVMConstReal(ctx->f32, -0.5), "");
1272 }
1273
1274 if (wa_8888 || unnorm) {
1275 ac_build_endif(ctx, 2000);
1276
1277 for (unsigned c = 0; c < 2; c++) {
1278 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1279 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1280 values, bbs);
1281 }
1282 }
1283 }
1284
1285 for (unsigned c = 0; c < 2; c++) {
1286 LLVMValueRef tmp;
1287 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1288 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1289 }
1290
1291 args->attributes = AC_FUNC_ATTR_READNONE;
1292 result = ac_build_image_opcode(ctx, args);
1293
1294 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1295 LLVMValueRef tmp, tmp2;
1296
1297 /* if the cube workaround is in place, f2i the result. */
1298 for (unsigned c = 0; c < 4; c++) {
1299 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1300 if (stype == GLSL_TYPE_UINT)
1301 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1302 else
1303 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1304 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1305 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1306 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1307 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1308 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1309 }
1310 }
1311 return result;
1312 }
1313
1314 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1315 {
1316 nir_deref_instr *texture_deref_instr = NULL;
1317
1318 for (unsigned i = 0; i < instr->num_srcs; i++) {
1319 switch (instr->src[i].src_type) {
1320 case nir_tex_src_texture_deref:
1321 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1322 break;
1323 default:
1324 break;
1325 }
1326 }
1327 return texture_deref_instr;
1328 }
1329
1330 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1331 const nir_tex_instr *instr,
1332 struct ac_image_args *args)
1333 {
1334 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1335 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1336
1337 return ac_build_buffer_load_format(&ctx->ac,
1338 args->resource,
1339 args->coords[0],
1340 ctx->ac.i32_0,
1341 util_last_bit(mask),
1342 0, true);
1343 }
1344
1345 args->opcode = ac_image_sample;
1346
1347 switch (instr->op) {
1348 case nir_texop_txf:
1349 case nir_texop_txf_ms:
1350 case nir_texop_samples_identical:
1351 args->opcode = args->level_zero ||
1352 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1353 ac_image_load : ac_image_load_mip;
1354 args->level_zero = false;
1355 break;
1356 case nir_texop_txs:
1357 case nir_texop_query_levels:
1358 args->opcode = ac_image_get_resinfo;
1359 if (!args->lod)
1360 args->lod = ctx->ac.i32_0;
1361 args->level_zero = false;
1362 break;
1363 case nir_texop_tex:
1364 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1365 assert(!args->lod);
1366 args->level_zero = true;
1367 }
1368 break;
1369 case nir_texop_tg4:
1370 args->opcode = ac_image_gather4;
1371 args->level_zero = true;
1372 break;
1373 case nir_texop_lod:
1374 args->opcode = ac_image_get_lod;
1375 break;
1376 default:
1377 break;
1378 }
1379
1380 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1381 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1382 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1383 const struct glsl_type *type = glsl_without_array(var->type);
1384 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1385 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1386 return lower_gather4_integer(&ctx->ac, var, args, instr);
1387 }
1388 }
1389
1390 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1391 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1392 if ((args->dim == ac_image_2darray ||
1393 args->dim == ac_image_2d) && !args->coords[1]) {
1394 args->coords[1] = ctx->ac.i32_0;
1395 }
1396 }
1397
1398 args->attributes = AC_FUNC_ATTR_READNONE;
1399 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1400 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1401 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1402 /* Prevent texture instructions with implicit derivatives from being
1403 * sinked into branches. */
1404 switch (instr->op) {
1405 case nir_texop_tex:
1406 case nir_texop_txb:
1407 case nir_texop_lod:
1408 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1409 break;
1410 default:
1411 break;
1412 }
1413 }
1414
1415 return ac_build_image_opcode(&ctx->ac, args);
1416 }
1417
1418 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1419 nir_intrinsic_instr *instr)
1420 {
1421 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1422 LLVMValueRef index = get_src(ctx, instr->src[1]);
1423
1424 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1425 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1426 return result;
1427 }
1428
1429 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1430 nir_intrinsic_instr *instr)
1431 {
1432 LLVMValueRef ptr, addr;
1433 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1434 unsigned index = nir_intrinsic_base(instr);
1435
1436 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1437 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1438
1439 /* Load constant values from user SGPRS when possible, otherwise
1440 * fallback to the default path that loads directly from memory.
1441 */
1442 if (LLVMIsConstant(src0) &&
1443 instr->dest.ssa.bit_size == 32) {
1444 unsigned count = instr->dest.ssa.num_components;
1445 unsigned offset = index;
1446
1447 offset += LLVMConstIntGetZExtValue(src0);
1448 offset /= 4;
1449
1450 offset -= ctx->args->base_inline_push_consts;
1451
1452 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1453 if (offset + count <= num_inline_push_consts) {
1454 LLVMValueRef push_constants[num_inline_push_consts];
1455 for (unsigned i = 0; i < num_inline_push_consts; i++)
1456 push_constants[i] = ac_get_arg(&ctx->ac,
1457 ctx->args->inline_push_consts[i]);
1458 return ac_build_gather_values(&ctx->ac,
1459 push_constants + offset,
1460 count);
1461 }
1462 }
1463
1464 ptr = LLVMBuildGEP(ctx->ac.builder,
1465 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1466
1467 if (instr->dest.ssa.bit_size == 8) {
1468 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1469 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1470 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1471 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1472
1473 LLVMValueRef params[3];
1474 if (load_dwords > 1) {
1475 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1476 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1477 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1478 } else {
1479 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1480 params[0] = ctx->ac.i32_0;
1481 params[1] = res;
1482 }
1483 params[2] = addr;
1484 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1485
1486 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1487 if (instr->dest.ssa.num_components > 1)
1488 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1489 return res;
1490 } else if (instr->dest.ssa.bit_size == 16) {
1491 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1492 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1493 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1494 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1495 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1496 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1497 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1498 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1499 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1500 LLVMConstInt(ctx->ac.i32, 4, false)};
1501 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1502 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1503 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1504 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1505 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1506 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1507 }
1508
1509 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1510
1511 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1512 }
1513
1514 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1515 const nir_intrinsic_instr *instr)
1516 {
1517 LLVMValueRef index = get_src(ctx, instr->src[0]);
1518
1519 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1520 }
1521
1522 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1523 {
1524 uint32_t new_mask = 0;
1525 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1526 if (mask & (1u << i))
1527 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1528 return new_mask;
1529 }
1530
1531 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1532 unsigned start, unsigned count)
1533 {
1534 LLVMValueRef mask[] = {
1535 ctx->i32_0, ctx->i32_1,
1536 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1537
1538 unsigned src_elements = ac_get_llvm_num_components(src);
1539
1540 if (count == src_elements) {
1541 assert(start == 0);
1542 return src;
1543 } else if (count == 1) {
1544 assert(start < src_elements);
1545 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1546 } else {
1547 assert(start + count <= src_elements);
1548 assert(count <= 4);
1549 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1550 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1551 }
1552 }
1553
1554 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1555 enum gl_access_qualifier access,
1556 bool may_store_unaligned,
1557 bool writeonly_memory)
1558 {
1559 unsigned cache_policy = 0;
1560
1561 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1562 * store opcodes not aligned to a dword are affected. The only way to
1563 * get unaligned stores is through shader images.
1564 */
1565 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1566 /* If this is write-only, don't keep data in L1 to prevent
1567 * evicting L1 cache lines that may be needed by other
1568 * instructions.
1569 */
1570 writeonly_memory ||
1571 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1572 cache_policy |= ac_glc;
1573 }
1574
1575 if (access & ACCESS_STREAM_CACHE_POLICY)
1576 cache_policy |= ac_slc;
1577
1578 return cache_policy;
1579 }
1580
1581 static void visit_store_ssbo(struct ac_nir_context *ctx,
1582 nir_intrinsic_instr *instr)
1583 {
1584 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1585 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1586 unsigned writemask = nir_intrinsic_write_mask(instr);
1587 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1588 bool writeonly_memory = access & ACCESS_NON_READABLE;
1589 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1590
1591 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1592 get_src(ctx, instr->src[1]), true);
1593 LLVMValueRef base_data = src_data;
1594 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1595 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1596
1597 while (writemask) {
1598 int start, count;
1599 LLVMValueRef data, offset;
1600 LLVMTypeRef data_type;
1601
1602 u_bit_scan_consecutive_range(&writemask, &start, &count);
1603
1604 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1605 * writes into a 2-element and a 1-element write. */
1606 if (count == 3 &&
1607 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1608 writemask |= 1 << (start + 2);
1609 count = 2;
1610 }
1611 int num_bytes = count * elem_size_bytes; /* count in bytes */
1612
1613 /* we can only store 4 DWords at the same time.
1614 * can only happen for 64 Bit vectors. */
1615 if (num_bytes > 16) {
1616 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1617 count = 2;
1618 num_bytes = 16;
1619 }
1620
1621 /* check alignment of 16 Bit stores */
1622 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1623 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1624 count = 1;
1625 num_bytes = 2;
1626 }
1627 data = extract_vector_range(&ctx->ac, base_data, start, count);
1628
1629 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1630 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1631
1632 if (num_bytes == 1) {
1633 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1634 offset, ctx->ac.i32_0,
1635 cache_policy);
1636 } else if (num_bytes == 2) {
1637 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1638 offset, ctx->ac.i32_0,
1639 cache_policy);
1640 } else {
1641 int num_channels = num_bytes / 4;
1642
1643 switch (num_bytes) {
1644 case 16: /* v4f32 */
1645 data_type = ctx->ac.v4f32;
1646 break;
1647 case 12: /* v3f32 */
1648 data_type = ctx->ac.v3f32;
1649 break;
1650 case 8: /* v2f32 */
1651 data_type = ctx->ac.v2f32;
1652 break;
1653 case 4: /* f32 */
1654 data_type = ctx->ac.f32;
1655 break;
1656 default:
1657 unreachable("Malformed vector store.");
1658 }
1659 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1660
1661 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1662 num_channels, offset,
1663 ctx->ac.i32_0, 0,
1664 cache_policy);
1665 }
1666 }
1667 }
1668
1669 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1670 LLVMValueRef descriptor,
1671 LLVMValueRef offset,
1672 LLVMValueRef compare,
1673 LLVMValueRef exchange)
1674 {
1675 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1676 if (ctx->abi->robust_buffer_access) {
1677 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1678
1679 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1680 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1681
1682 ac_build_ifcc(&ctx->ac, cond, -1);
1683
1684 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1685 }
1686
1687 LLVMValueRef ptr_parts[2] = {
1688 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1689 LLVMBuildAnd(ctx->ac.builder,
1690 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1691 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1692 };
1693
1694 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1695 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1696
1697 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1698
1699 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1700 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1701 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1702 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1703
1704 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1705 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1706
1707 if (ctx->abi->robust_buffer_access) {
1708 ac_build_endif(&ctx->ac, -1);
1709
1710 LLVMBasicBlockRef incoming_blocks[2] = {
1711 start_block,
1712 then_block,
1713 };
1714
1715 LLVMValueRef incoming_values[2] = {
1716 LLVMConstInt(ctx->ac.i64, 0, 0),
1717 result,
1718 };
1719 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1720 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1721 return ret;
1722 } else {
1723 return result;
1724 }
1725 }
1726
1727 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1728 const nir_intrinsic_instr *instr)
1729 {
1730 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1731 const char *op;
1732 char name[64], type[8];
1733 LLVMValueRef params[6], descriptor;
1734 int arg_count = 0;
1735
1736 switch (instr->intrinsic) {
1737 case nir_intrinsic_ssbo_atomic_add:
1738 op = "add";
1739 break;
1740 case nir_intrinsic_ssbo_atomic_imin:
1741 op = "smin";
1742 break;
1743 case nir_intrinsic_ssbo_atomic_umin:
1744 op = "umin";
1745 break;
1746 case nir_intrinsic_ssbo_atomic_imax:
1747 op = "smax";
1748 break;
1749 case nir_intrinsic_ssbo_atomic_umax:
1750 op = "umax";
1751 break;
1752 case nir_intrinsic_ssbo_atomic_and:
1753 op = "and";
1754 break;
1755 case nir_intrinsic_ssbo_atomic_or:
1756 op = "or";
1757 break;
1758 case nir_intrinsic_ssbo_atomic_xor:
1759 op = "xor";
1760 break;
1761 case nir_intrinsic_ssbo_atomic_exchange:
1762 op = "swap";
1763 break;
1764 case nir_intrinsic_ssbo_atomic_comp_swap:
1765 op = "cmpswap";
1766 break;
1767 default:
1768 abort();
1769 }
1770
1771 descriptor = ctx->abi->load_ssbo(ctx->abi,
1772 get_src(ctx, instr->src[0]),
1773 true);
1774
1775 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1776 return_type == ctx->ac.i64) {
1777 return emit_ssbo_comp_swap_64(ctx, descriptor,
1778 get_src(ctx, instr->src[1]),
1779 get_src(ctx, instr->src[2]),
1780 get_src(ctx, instr->src[3]));
1781 }
1782 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1783 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1784 }
1785 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1786 params[arg_count++] = descriptor;
1787
1788 if (LLVM_VERSION_MAJOR >= 9) {
1789 /* XXX: The new raw/struct atomic intrinsics are buggy with
1790 * LLVM 8, see r358579.
1791 */
1792 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1793 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1794 params[arg_count++] = ctx->ac.i32_0; /* slc */
1795
1796 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1797 snprintf(name, sizeof(name),
1798 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1799 } else {
1800 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1801 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1802 params[arg_count++] = ctx->ac.i1false; /* slc */
1803
1804 assert(return_type == ctx->ac.i32);
1805 snprintf(name, sizeof(name),
1806 "llvm.amdgcn.buffer.atomic.%s", op);
1807 }
1808
1809 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1810 arg_count, 0);
1811 }
1812
1813 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1814 const nir_intrinsic_instr *instr)
1815 {
1816 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1817 int num_components = instr->num_components;
1818 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1819 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1820
1821 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1822 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1823 get_src(ctx, instr->src[0]), false);
1824 LLVMValueRef vindex = ctx->ac.i32_0;
1825
1826 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1827 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1828
1829 LLVMValueRef results[4];
1830 for (int i = 0; i < num_components;) {
1831 int num_elems = num_components - i;
1832 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1833 num_elems = 1;
1834 if (num_elems * elem_size_bytes > 16)
1835 num_elems = 16 / elem_size_bytes;
1836 int load_bytes = num_elems * elem_size_bytes;
1837
1838 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1839
1840 LLVMValueRef ret;
1841
1842 if (load_bytes == 1) {
1843 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1844 rsrc,
1845 offset,
1846 ctx->ac.i32_0,
1847 immoffset,
1848 cache_policy);
1849 } else if (load_bytes == 2) {
1850 ret = ac_build_tbuffer_load_short(&ctx->ac,
1851 rsrc,
1852 offset,
1853 ctx->ac.i32_0,
1854 immoffset,
1855 cache_policy);
1856 } else {
1857 int num_channels = util_next_power_of_two(load_bytes) / 4;
1858 bool can_speculate = access & ACCESS_CAN_REORDER;
1859
1860 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1861 vindex, offset, immoffset, 0,
1862 cache_policy, can_speculate, false);
1863 }
1864
1865 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1866 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1867 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1868
1869 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1870 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1871
1872 for (unsigned j = 0; j < num_elems; j++) {
1873 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1874 }
1875 i += num_elems;
1876 }
1877
1878 return ac_build_gather_values(&ctx->ac, results, num_components);
1879 }
1880
1881 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1882 const nir_intrinsic_instr *instr)
1883 {
1884 LLVMValueRef ret;
1885 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1886 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1887 int num_components = instr->num_components;
1888
1889 if (ctx->abi->load_ubo)
1890 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1891
1892 if (instr->dest.ssa.bit_size == 64)
1893 num_components *= 2;
1894
1895 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1896 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1897 LLVMValueRef results[num_components];
1898 for (unsigned i = 0; i < num_components; ++i) {
1899 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1900 load_bytes * i, 0);
1901
1902 if (load_bytes == 1) {
1903 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1904 rsrc,
1905 offset,
1906 ctx->ac.i32_0,
1907 immoffset,
1908 0);
1909 } else {
1910 assert(load_bytes == 2);
1911 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1912 rsrc,
1913 offset,
1914 ctx->ac.i32_0,
1915 immoffset,
1916 0);
1917 }
1918 }
1919 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1920 } else {
1921 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1922 NULL, 0, 0, true, true);
1923
1924 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1925 }
1926
1927 return LLVMBuildBitCast(ctx->ac.builder, ret,
1928 get_def_type(ctx, &instr->dest.ssa), "");
1929 }
1930
1931 static void
1932 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1933 bool vs_in, unsigned *vertex_index_out,
1934 LLVMValueRef *vertex_index_ref,
1935 unsigned *const_out, LLVMValueRef *indir_out)
1936 {
1937 nir_variable *var = nir_deref_instr_get_variable(instr);
1938 nir_deref_path path;
1939 unsigned idx_lvl = 1;
1940
1941 nir_deref_path_init(&path, instr, NULL);
1942
1943 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1944 if (vertex_index_ref) {
1945 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1946 if (vertex_index_out)
1947 *vertex_index_out = 0;
1948 } else {
1949 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1950 }
1951 ++idx_lvl;
1952 }
1953
1954 uint32_t const_offset = 0;
1955 LLVMValueRef offset = NULL;
1956
1957 if (var->data.compact) {
1958 assert(instr->deref_type == nir_deref_type_array);
1959 const_offset = nir_src_as_uint(instr->arr.index);
1960 goto out;
1961 }
1962
1963 for (; path.path[idx_lvl]; ++idx_lvl) {
1964 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1965 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1966 unsigned index = path.path[idx_lvl]->strct.index;
1967
1968 for (unsigned i = 0; i < index; i++) {
1969 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1970 const_offset += glsl_count_attribute_slots(ft, vs_in);
1971 }
1972 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1973 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1974 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
1975 const_offset += size *
1976 nir_src_as_uint(path.path[idx_lvl]->arr.index);
1977 } else {
1978 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1979 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1980 if (offset)
1981 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1982 else
1983 offset = array_off;
1984 }
1985 } else
1986 unreachable("Uhandled deref type in get_deref_instr_offset");
1987 }
1988
1989 out:
1990 nir_deref_path_finish(&path);
1991
1992 if (const_offset && offset)
1993 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1994 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1995 "");
1996
1997 *const_out = const_offset;
1998 *indir_out = offset;
1999 }
2000
2001 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2002 nir_intrinsic_instr *instr,
2003 bool load_inputs)
2004 {
2005 LLVMValueRef result;
2006 LLVMValueRef vertex_index = NULL;
2007 LLVMValueRef indir_index = NULL;
2008 unsigned const_index = 0;
2009
2010 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2011
2012 unsigned location = var->data.location;
2013 unsigned driver_location = var->data.driver_location;
2014 const bool is_patch = var->data.patch ||
2015 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2016 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2017 const bool is_compact = var->data.compact;
2018
2019 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2020 false, NULL, is_patch ? NULL : &vertex_index,
2021 &const_index, &indir_index);
2022
2023 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2024
2025 LLVMTypeRef src_component_type;
2026 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2027 src_component_type = LLVMGetElementType(dest_type);
2028 else
2029 src_component_type = dest_type;
2030
2031 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2032 vertex_index, indir_index,
2033 const_index, location, driver_location,
2034 var->data.location_frac,
2035 instr->num_components,
2036 is_patch, is_compact, load_inputs);
2037 if (instr->dest.ssa.bit_size == 16) {
2038 result = ac_to_integer(&ctx->ac, result);
2039 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2040 }
2041 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2042 }
2043
2044 static unsigned
2045 type_scalar_size_bytes(const struct glsl_type *type)
2046 {
2047 assert(glsl_type_is_vector_or_scalar(type) ||
2048 glsl_type_is_matrix(type));
2049 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2050 }
2051
2052 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2053 nir_intrinsic_instr *instr)
2054 {
2055 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2056 nir_variable *var = nir_deref_instr_get_variable(deref);
2057
2058 LLVMValueRef values[8];
2059 int idx = 0;
2060 int ve = instr->dest.ssa.num_components;
2061 unsigned comp = 0;
2062 LLVMValueRef indir_index;
2063 LLVMValueRef ret;
2064 unsigned const_index;
2065 unsigned stride = 4;
2066 int mode = deref->mode;
2067
2068 if (var) {
2069 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2070 var->data.mode == nir_var_shader_in;
2071 idx = var->data.driver_location;
2072 comp = var->data.location_frac;
2073 mode = var->data.mode;
2074
2075 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2076 &const_index, &indir_index);
2077
2078 if (var->data.compact) {
2079 stride = 1;
2080 const_index += comp;
2081 comp = 0;
2082 }
2083 }
2084
2085 if (instr->dest.ssa.bit_size == 64 &&
2086 (deref->mode == nir_var_shader_in ||
2087 deref->mode == nir_var_shader_out ||
2088 deref->mode == nir_var_function_temp))
2089 ve *= 2;
2090
2091 switch (mode) {
2092 case nir_var_shader_in:
2093 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2094 ctx->stage == MESA_SHADER_TESS_EVAL) {
2095 return load_tess_varyings(ctx, instr, true);
2096 }
2097
2098 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2099 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2100 LLVMValueRef indir_index;
2101 unsigned const_index, vertex_index;
2102 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2103 &const_index, &indir_index);
2104 assert(indir_index == NULL);
2105
2106 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2107 var->data.driver_location,
2108 var->data.location_frac,
2109 instr->num_components, vertex_index, const_index, type);
2110 }
2111
2112 for (unsigned chan = comp; chan < ve + comp; chan++) {
2113 if (indir_index) {
2114 unsigned count = glsl_count_attribute_slots(
2115 var->type,
2116 ctx->stage == MESA_SHADER_VERTEX);
2117 count -= chan / 4;
2118 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2119 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2120 stride, false, true);
2121
2122 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2123 tmp_vec,
2124 indir_index, "");
2125 } else
2126 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2127 }
2128 break;
2129 case nir_var_function_temp:
2130 for (unsigned chan = 0; chan < ve; chan++) {
2131 if (indir_index) {
2132 unsigned count = glsl_count_attribute_slots(
2133 var->type, false);
2134 count -= chan / 4;
2135 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2136 &ctx->ac, ctx->locals + idx + chan, count,
2137 stride, true, true);
2138
2139 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2140 tmp_vec,
2141 indir_index, "");
2142 } else {
2143 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2144 }
2145 }
2146 break;
2147 case nir_var_mem_shared: {
2148 LLVMValueRef address = get_src(ctx, instr->src[0]);
2149 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2150 return LLVMBuildBitCast(ctx->ac.builder, val,
2151 get_def_type(ctx, &instr->dest.ssa),
2152 "");
2153 }
2154 case nir_var_shader_out:
2155 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2156 return load_tess_varyings(ctx, instr, false);
2157 }
2158
2159 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2160 var->data.fb_fetch_output &&
2161 ctx->abi->emit_fbfetch)
2162 return ctx->abi->emit_fbfetch(ctx->abi);
2163
2164 for (unsigned chan = comp; chan < ve + comp; chan++) {
2165 if (indir_index) {
2166 unsigned count = glsl_count_attribute_slots(
2167 var->type, false);
2168 count -= chan / 4;
2169 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2170 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2171 stride, true, true);
2172
2173 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2174 tmp_vec,
2175 indir_index, "");
2176 } else {
2177 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2178 ctx->abi->outputs[idx + chan + const_index * stride],
2179 "");
2180 }
2181 }
2182 break;
2183 case nir_var_mem_global: {
2184 LLVMValueRef address = get_src(ctx, instr->src[0]);
2185 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2186 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2187 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2188
2189 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2190 if (stride != natural_stride) {
2191 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2192 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2193 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2194
2195 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2196 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2197 values[i] = LLVMBuildLoad(ctx->ac.builder,
2198 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2199 }
2200 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2201 } else {
2202 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2203 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2204 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2205 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2206 return val;
2207 }
2208 }
2209 default:
2210 unreachable("unhandle variable mode");
2211 }
2212 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2213 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2214 }
2215
2216 static void
2217 visit_store_var(struct ac_nir_context *ctx,
2218 nir_intrinsic_instr *instr)
2219 {
2220 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2221 nir_variable *var = nir_deref_instr_get_variable(deref);
2222
2223 LLVMValueRef temp_ptr, value;
2224 int idx = 0;
2225 unsigned comp = 0;
2226 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2227 int writemask = instr->const_index[0];
2228 LLVMValueRef indir_index;
2229 unsigned const_index;
2230
2231 if (var) {
2232 get_deref_offset(ctx, deref, false,
2233 NULL, NULL, &const_index, &indir_index);
2234 idx = var->data.driver_location;
2235 comp = var->data.location_frac;
2236
2237 if (var->data.compact) {
2238 const_index += comp;
2239 comp = 0;
2240 }
2241 }
2242
2243 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2244 (deref->mode == nir_var_shader_out ||
2245 deref->mode == nir_var_function_temp)) {
2246
2247 src = LLVMBuildBitCast(ctx->ac.builder, src,
2248 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2249 "");
2250
2251 writemask = widen_mask(writemask, 2);
2252 }
2253
2254 writemask = writemask << comp;
2255
2256 switch (deref->mode) {
2257 case nir_var_shader_out:
2258
2259 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2260 LLVMValueRef vertex_index = NULL;
2261 LLVMValueRef indir_index = NULL;
2262 unsigned const_index = 0;
2263 const bool is_patch = var->data.patch ||
2264 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2265 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2266
2267 get_deref_offset(ctx, deref, false, NULL,
2268 is_patch ? NULL : &vertex_index,
2269 &const_index, &indir_index);
2270
2271 ctx->abi->store_tcs_outputs(ctx->abi, var,
2272 vertex_index, indir_index,
2273 const_index, src, writemask);
2274 return;
2275 }
2276
2277 for (unsigned chan = 0; chan < 8; chan++) {
2278 int stride = 4;
2279 if (!(writemask & (1 << chan)))
2280 continue;
2281
2282 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2283
2284 if (var->data.compact)
2285 stride = 1;
2286 if (indir_index) {
2287 unsigned count = glsl_count_attribute_slots(
2288 var->type, false);
2289 count -= chan / 4;
2290 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2291 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2292 stride, true, true);
2293
2294 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2295 value, indir_index, "");
2296 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2297 count, stride, tmp_vec);
2298
2299 } else {
2300 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2301
2302 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2303 }
2304 }
2305 break;
2306 case nir_var_function_temp:
2307 for (unsigned chan = 0; chan < 8; chan++) {
2308 if (!(writemask & (1 << chan)))
2309 continue;
2310
2311 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2312 if (indir_index) {
2313 unsigned count = glsl_count_attribute_slots(
2314 var->type, false);
2315 count -= chan / 4;
2316 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2317 &ctx->ac, ctx->locals + idx + chan, count,
2318 4, true, true);
2319
2320 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2321 value, indir_index, "");
2322 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2323 count, 4, tmp_vec);
2324 } else {
2325 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2326
2327 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2328 }
2329 }
2330 break;
2331
2332 case nir_var_mem_global:
2333 case nir_var_mem_shared: {
2334 int writemask = instr->const_index[0];
2335 LLVMValueRef address = get_src(ctx, instr->src[0]);
2336 LLVMValueRef val = get_src(ctx, instr->src[1]);
2337
2338 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2339 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2340 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2341
2342 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2343 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2344 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2345
2346 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2347 stride == natural_stride) {
2348 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2349 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2350 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2351
2352 val = LLVMBuildBitCast(ctx->ac.builder, val,
2353 LLVMGetElementType(LLVMTypeOf(address)), "");
2354 LLVMBuildStore(ctx->ac.builder, val, address);
2355 } else {
2356 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2357 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2358 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2359 for (unsigned chan = 0; chan < 4; chan++) {
2360 if (!(writemask & (1 << chan)))
2361 continue;
2362
2363 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2364
2365 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2366 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2367 chan);
2368 src = LLVMBuildBitCast(ctx->ac.builder, src,
2369 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2370 LLVMBuildStore(ctx->ac.builder, src, ptr);
2371 }
2372 }
2373 break;
2374 }
2375 default:
2376 abort();
2377 break;
2378 }
2379 }
2380
2381 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2382 {
2383 switch (dim) {
2384 case GLSL_SAMPLER_DIM_BUF:
2385 return 1;
2386 case GLSL_SAMPLER_DIM_1D:
2387 return array ? 2 : 1;
2388 case GLSL_SAMPLER_DIM_2D:
2389 return array ? 3 : 2;
2390 case GLSL_SAMPLER_DIM_MS:
2391 return array ? 4 : 3;
2392 case GLSL_SAMPLER_DIM_3D:
2393 case GLSL_SAMPLER_DIM_CUBE:
2394 return 3;
2395 case GLSL_SAMPLER_DIM_RECT:
2396 case GLSL_SAMPLER_DIM_SUBPASS:
2397 return 2;
2398 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2399 return 3;
2400 default:
2401 break;
2402 }
2403 return 0;
2404 }
2405
2406 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2407 LLVMValueRef coord_x, LLVMValueRef coord_y,
2408 LLVMValueRef coord_z,
2409 LLVMValueRef sample_index,
2410 LLVMValueRef fmask_desc_ptr)
2411 {
2412 unsigned sample_chan = coord_z ? 3 : 2;
2413 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2414 addr[sample_chan] = sample_index;
2415
2416 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2417 return addr[sample_chan];
2418 }
2419
2420 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2421 {
2422 assert(instr->src[0].is_ssa);
2423 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2424 }
2425
2426 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2427 const nir_intrinsic_instr *instr,
2428 enum ac_descriptor_type desc_type,
2429 bool write)
2430 {
2431 nir_deref_instr *deref_instr =
2432 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2433 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2434
2435 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2436 }
2437
2438 static void get_image_coords(struct ac_nir_context *ctx,
2439 const nir_intrinsic_instr *instr,
2440 struct ac_image_args *args,
2441 enum glsl_sampler_dim dim,
2442 bool is_array)
2443 {
2444 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2445 LLVMValueRef masks[] = {
2446 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2447 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2448 };
2449 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2450
2451 int count;
2452 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2453 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2454 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2455 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2456 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2457 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2458 count = image_type_to_components_count(dim, is_array);
2459
2460 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2461 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2462 LLVMValueRef fmask_load_address[3];
2463
2464 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2465 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2466 if (is_array)
2467 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2468 else
2469 fmask_load_address[2] = NULL;
2470
2471 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2472 fmask_load_address[0],
2473 fmask_load_address[1],
2474 fmask_load_address[2],
2475 sample_index,
2476 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2477 AC_DESC_FMASK, &instr->instr, true, false));
2478 }
2479 if (count == 1 && !gfx9_1d) {
2480 if (instr->src[1].ssa->num_components)
2481 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2482 else
2483 args->coords[0] = src0;
2484 } else {
2485 int chan;
2486 if (is_ms)
2487 count--;
2488 for (chan = 0; chan < count; ++chan) {
2489 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2490 }
2491
2492 if (gfx9_1d) {
2493 if (is_array) {
2494 args->coords[2] = args->coords[1];
2495 args->coords[1] = ctx->ac.i32_0;
2496 } else
2497 args->coords[1] = ctx->ac.i32_0;
2498 count++;
2499 }
2500 if (ctx->ac.chip_class == GFX9 &&
2501 dim == GLSL_SAMPLER_DIM_2D &&
2502 !is_array) {
2503 /* The hw can't bind a slice of a 3D image as a 2D
2504 * image, because it ignores BASE_ARRAY if the target
2505 * is 3D. The workaround is to read BASE_ARRAY and set
2506 * it as the 3rd address operand for all 2D images.
2507 */
2508 LLVMValueRef first_layer, const5, mask;
2509
2510 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2511 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2512 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2513 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2514
2515 args->coords[count] = first_layer;
2516 count++;
2517 }
2518
2519
2520 if (is_ms) {
2521 args->coords[count] = sample_index;
2522 count++;
2523 }
2524 }
2525 }
2526
2527 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2528 const nir_intrinsic_instr *instr,
2529 bool write, bool atomic)
2530 {
2531 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2532 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2533 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2534 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2535 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2536
2537 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2538 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2539 elem_count, stride, "");
2540
2541 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2542 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2543 }
2544 return rsrc;
2545 }
2546
2547 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2548 const nir_intrinsic_instr *instr,
2549 bool bindless)
2550 {
2551 LLVMValueRef res;
2552
2553 enum glsl_sampler_dim dim;
2554 enum gl_access_qualifier access;
2555 bool is_array;
2556 if (bindless) {
2557 dim = nir_intrinsic_image_dim(instr);
2558 access = nir_intrinsic_access(instr);
2559 is_array = nir_intrinsic_image_array(instr);
2560 } else {
2561 const nir_deref_instr *image_deref = get_image_deref(instr);
2562 const struct glsl_type *type = image_deref->type;
2563 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2564 dim = glsl_get_sampler_dim(type);
2565 access = var->data.access;
2566 is_array = glsl_sampler_type_is_array(type);
2567 }
2568
2569 struct ac_image_args args = {};
2570
2571 args.cache_policy = get_cache_policy(ctx, access, false, false);
2572
2573 if (dim == GLSL_SAMPLER_DIM_BUF) {
2574 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2575 unsigned num_channels = util_last_bit(mask);
2576 LLVMValueRef rsrc, vindex;
2577
2578 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2579 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2580 ctx->ac.i32_0, "");
2581
2582 bool can_speculate = access & ACCESS_CAN_REORDER;
2583 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2584 ctx->ac.i32_0, num_channels,
2585 args.cache_policy,
2586 can_speculate);
2587 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2588
2589 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2590 res = ac_to_integer(&ctx->ac, res);
2591 } else {
2592 args.opcode = ac_image_load;
2593 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2594 get_image_coords(ctx, instr, &args, dim, is_array);
2595 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2596 args.dmask = 15;
2597 args.attributes = AC_FUNC_ATTR_READONLY;
2598
2599 res = ac_build_image_opcode(&ctx->ac, &args);
2600 }
2601 return res;
2602 }
2603
2604 static void visit_image_store(struct ac_nir_context *ctx,
2605 nir_intrinsic_instr *instr,
2606 bool bindless)
2607 {
2608
2609
2610 enum glsl_sampler_dim dim;
2611 enum gl_access_qualifier access;
2612 bool is_array;
2613 if (bindless) {
2614 dim = nir_intrinsic_image_dim(instr);
2615 access = nir_intrinsic_access(instr);
2616 is_array = nir_intrinsic_image_array(instr);
2617 } else {
2618 const nir_deref_instr *image_deref = get_image_deref(instr);
2619 const struct glsl_type *type = image_deref->type;
2620 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2621 dim = glsl_get_sampler_dim(type);
2622 access = var->data.access;
2623 is_array = glsl_sampler_type_is_array(type);
2624 }
2625
2626 bool writeonly_memory = access & ACCESS_NON_READABLE;
2627 struct ac_image_args args = {};
2628
2629 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2630
2631 if (dim == GLSL_SAMPLER_DIM_BUF) {
2632 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2633 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2634 unsigned src_channels = ac_get_llvm_num_components(src);
2635 LLVMValueRef vindex;
2636
2637 if (src_channels == 3)
2638 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2639
2640 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2641 get_src(ctx, instr->src[1]),
2642 ctx->ac.i32_0, "");
2643
2644 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2645 ctx->ac.i32_0, src_channels,
2646 args.cache_policy);
2647 } else {
2648 args.opcode = ac_image_store;
2649 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2650 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2651 get_image_coords(ctx, instr, &args, dim, is_array);
2652 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2653 args.dmask = 15;
2654
2655 ac_build_image_opcode(&ctx->ac, &args);
2656 }
2657
2658 }
2659
2660 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2661 const nir_intrinsic_instr *instr,
2662 bool bindless)
2663 {
2664 LLVMValueRef params[7];
2665 int param_count = 0;
2666
2667 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2668 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2669 const char *atomic_name;
2670 char intrinsic_name[64];
2671 enum ac_atomic_op atomic_subop;
2672 ASSERTED int length;
2673
2674 enum glsl_sampler_dim dim;
2675 bool is_array;
2676 if (bindless) {
2677 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2678 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2679 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2680 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2681 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2682 assert(format == GL_R32UI || format == GL_R32I);
2683 }
2684 dim = nir_intrinsic_image_dim(instr);
2685 is_array = nir_intrinsic_image_array(instr);
2686 } else {
2687 const struct glsl_type *type = get_image_deref(instr)->type;
2688 dim = glsl_get_sampler_dim(type);
2689 is_array = glsl_sampler_type_is_array(type);
2690 }
2691
2692 switch (instr->intrinsic) {
2693 case nir_intrinsic_bindless_image_atomic_add:
2694 case nir_intrinsic_image_deref_atomic_add:
2695 atomic_name = "add";
2696 atomic_subop = ac_atomic_add;
2697 break;
2698 case nir_intrinsic_bindless_image_atomic_imin:
2699 case nir_intrinsic_image_deref_atomic_imin:
2700 atomic_name = "smin";
2701 atomic_subop = ac_atomic_smin;
2702 break;
2703 case nir_intrinsic_bindless_image_atomic_umin:
2704 case nir_intrinsic_image_deref_atomic_umin:
2705 atomic_name = "umin";
2706 atomic_subop = ac_atomic_umin;
2707 break;
2708 case nir_intrinsic_bindless_image_atomic_imax:
2709 case nir_intrinsic_image_deref_atomic_imax:
2710 atomic_name = "smax";
2711 atomic_subop = ac_atomic_smax;
2712 break;
2713 case nir_intrinsic_bindless_image_atomic_umax:
2714 case nir_intrinsic_image_deref_atomic_umax:
2715 atomic_name = "umax";
2716 atomic_subop = ac_atomic_umax;
2717 break;
2718 case nir_intrinsic_bindless_image_atomic_and:
2719 case nir_intrinsic_image_deref_atomic_and:
2720 atomic_name = "and";
2721 atomic_subop = ac_atomic_and;
2722 break;
2723 case nir_intrinsic_bindless_image_atomic_or:
2724 case nir_intrinsic_image_deref_atomic_or:
2725 atomic_name = "or";
2726 atomic_subop = ac_atomic_or;
2727 break;
2728 case nir_intrinsic_bindless_image_atomic_xor:
2729 case nir_intrinsic_image_deref_atomic_xor:
2730 atomic_name = "xor";
2731 atomic_subop = ac_atomic_xor;
2732 break;
2733 case nir_intrinsic_bindless_image_atomic_exchange:
2734 case nir_intrinsic_image_deref_atomic_exchange:
2735 atomic_name = "swap";
2736 atomic_subop = ac_atomic_swap;
2737 break;
2738 case nir_intrinsic_bindless_image_atomic_comp_swap:
2739 case nir_intrinsic_image_deref_atomic_comp_swap:
2740 atomic_name = "cmpswap";
2741 atomic_subop = 0; /* not used */
2742 break;
2743 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2744 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2745 atomic_name = "inc";
2746 atomic_subop = ac_atomic_inc_wrap;
2747 /* ATOMIC_INC instruction does:
2748 * value = (value + 1) % (data + 1)
2749 * but we want:
2750 * value = (value + 1) % data
2751 * So replace 'data' by 'data - 1'.
2752 */
2753 ctx->ssa_defs[instr->src[3].ssa->index] =
2754 LLVMBuildSub(ctx->ac.builder,
2755 ctx->ssa_defs[instr->src[3].ssa->index],
2756 ctx->ac.i32_1, "");
2757 break;
2758 }
2759 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2760 case nir_intrinsic_image_deref_atomic_dec_wrap:
2761 atomic_name = "dec";
2762 atomic_subop = ac_atomic_dec_wrap;
2763 break;
2764 default:
2765 abort();
2766 }
2767
2768 if (cmpswap)
2769 params[param_count++] = get_src(ctx, instr->src[4]);
2770 params[param_count++] = get_src(ctx, instr->src[3]);
2771
2772 if (dim == GLSL_SAMPLER_DIM_BUF) {
2773 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2774 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2775 ctx->ac.i32_0, ""); /* vindex */
2776 params[param_count++] = ctx->ac.i32_0; /* voffset */
2777 if (LLVM_VERSION_MAJOR >= 9) {
2778 /* XXX: The new raw/struct atomic intrinsics are buggy
2779 * with LLVM 8, see r358579.
2780 */
2781 params[param_count++] = ctx->ac.i32_0; /* soffset */
2782 params[param_count++] = ctx->ac.i32_0; /* slc */
2783
2784 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2785 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2786 } else {
2787 params[param_count++] = ctx->ac.i1false; /* slc */
2788
2789 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2790 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2791 }
2792
2793 assert(length < sizeof(intrinsic_name));
2794 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2795 params, param_count, 0);
2796 } else {
2797 struct ac_image_args args = {};
2798 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2799 args.atomic = atomic_subop;
2800 args.data[0] = params[0];
2801 if (cmpswap)
2802 args.data[1] = params[1];
2803 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2804 get_image_coords(ctx, instr, &args, dim, is_array);
2805 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2806
2807 return ac_build_image_opcode(&ctx->ac, &args);
2808 }
2809 }
2810
2811 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2812 const nir_intrinsic_instr *instr)
2813 {
2814 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2815
2816 return ac_build_image_get_sample_count(&ctx->ac, rsrc);
2817 }
2818
2819 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2820 const nir_intrinsic_instr *instr,
2821 bool bindless)
2822 {
2823 LLVMValueRef res;
2824
2825 enum glsl_sampler_dim dim;
2826 bool is_array;
2827 if (bindless) {
2828 dim = nir_intrinsic_image_dim(instr);
2829 is_array = nir_intrinsic_image_array(instr);
2830 } else {
2831 const struct glsl_type *type = get_image_deref(instr)->type;
2832 dim = glsl_get_sampler_dim(type);
2833 is_array = glsl_sampler_type_is_array(type);
2834 }
2835
2836 if (dim == GLSL_SAMPLER_DIM_BUF)
2837 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2838
2839 struct ac_image_args args = { 0 };
2840
2841 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2842 args.dmask = 0xf;
2843 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2844 args.opcode = ac_image_get_resinfo;
2845 args.lod = ctx->ac.i32_0;
2846 args.attributes = AC_FUNC_ATTR_READNONE;
2847
2848 res = ac_build_image_opcode(&ctx->ac, &args);
2849
2850 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2851
2852 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2853 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2854 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2855 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2856 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2857 }
2858 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2859 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2860 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2861 ctx->ac.i32_1, "");
2862
2863 }
2864 return res;
2865 }
2866
2867 static void emit_membar(struct ac_llvm_context *ac,
2868 const nir_intrinsic_instr *instr)
2869 {
2870 unsigned wait_flags = 0;
2871
2872 switch (instr->intrinsic) {
2873 case nir_intrinsic_memory_barrier:
2874 case nir_intrinsic_group_memory_barrier:
2875 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2876 break;
2877 case nir_intrinsic_memory_barrier_atomic_counter:
2878 case nir_intrinsic_memory_barrier_buffer:
2879 case nir_intrinsic_memory_barrier_image:
2880 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2881 break;
2882 case nir_intrinsic_memory_barrier_shared:
2883 wait_flags = AC_WAIT_LGKM;
2884 break;
2885 default:
2886 break;
2887 }
2888
2889 ac_build_waitcnt(ac, wait_flags);
2890 }
2891
2892 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2893 {
2894 /* GFX6 only (thanks to a hw bug workaround):
2895 * The real barrier instruction isn’t needed, because an entire patch
2896 * always fits into a single wave.
2897 */
2898 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2899 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2900 return;
2901 }
2902 ac_build_s_barrier(ac);
2903 }
2904
2905 static void emit_discard(struct ac_nir_context *ctx,
2906 const nir_intrinsic_instr *instr)
2907 {
2908 LLVMValueRef cond;
2909
2910 if (instr->intrinsic == nir_intrinsic_discard_if) {
2911 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2912 get_src(ctx, instr->src[0]),
2913 ctx->ac.i32_0, "");
2914 } else {
2915 assert(instr->intrinsic == nir_intrinsic_discard);
2916 cond = ctx->ac.i1false;
2917 }
2918
2919 ctx->abi->emit_kill(ctx->abi, cond);
2920 }
2921
2922 static LLVMValueRef
2923 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2924 {
2925 LLVMValueRef result;
2926 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2927 result = LLVMBuildAnd(ctx->ac.builder,
2928 ac_get_arg(&ctx->ac, ctx->args->tg_size),
2929 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2930
2931 if (ctx->ac.wave_size == 32)
2932 result = LLVMBuildLShr(ctx->ac.builder, result,
2933 LLVMConstInt(ctx->ac.i32, 1, false), "");
2934
2935 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2936 }
2937
2938 static LLVMValueRef
2939 visit_load_subgroup_id(struct ac_nir_context *ctx)
2940 {
2941 if (ctx->stage == MESA_SHADER_COMPUTE) {
2942 LLVMValueRef result;
2943 result = LLVMBuildAnd(ctx->ac.builder,
2944 ac_get_arg(&ctx->ac, ctx->args->tg_size),
2945 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2946 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2947 } else {
2948 return LLVMConstInt(ctx->ac.i32, 0, false);
2949 }
2950 }
2951
2952 static LLVMValueRef
2953 visit_load_num_subgroups(struct ac_nir_context *ctx)
2954 {
2955 if (ctx->stage == MESA_SHADER_COMPUTE) {
2956 return LLVMBuildAnd(ctx->ac.builder,
2957 ac_get_arg(&ctx->ac, ctx->args->tg_size),
2958 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2959 } else {
2960 return LLVMConstInt(ctx->ac.i32, 1, false);
2961 }
2962 }
2963
2964 static LLVMValueRef
2965 visit_first_invocation(struct ac_nir_context *ctx)
2966 {
2967 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2968 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
2969
2970 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2971 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2972 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
2973 ctx->ac.iN_wavemask, args, 2,
2974 AC_FUNC_ATTR_NOUNWIND |
2975 AC_FUNC_ATTR_READNONE);
2976
2977 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2978 }
2979
2980 static LLVMValueRef
2981 visit_load_shared(struct ac_nir_context *ctx,
2982 const nir_intrinsic_instr *instr)
2983 {
2984 LLVMValueRef values[4], derived_ptr, index, ret;
2985
2986 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2987
2988 for (int chan = 0; chan < instr->num_components; chan++) {
2989 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2990 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2991 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2992 }
2993
2994 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2995 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2996 }
2997
2998 static void
2999 visit_store_shared(struct ac_nir_context *ctx,
3000 const nir_intrinsic_instr *instr)
3001 {
3002 LLVMValueRef derived_ptr, data,index;
3003 LLVMBuilderRef builder = ctx->ac.builder;
3004
3005 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
3006 LLVMValueRef src = get_src(ctx, instr->src[0]);
3007
3008 int writemask = nir_intrinsic_write_mask(instr);
3009 for (int chan = 0; chan < 4; chan++) {
3010 if (!(writemask & (1 << chan))) {
3011 continue;
3012 }
3013 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3014 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3015 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3016 LLVMBuildStore(builder, data, derived_ptr);
3017 }
3018 }
3019
3020 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3021 const nir_intrinsic_instr *instr,
3022 LLVMValueRef ptr, int src_idx)
3023 {
3024 LLVMValueRef result;
3025 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3026
3027 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3028
3029 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3030 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3031 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3032 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3033 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3034 } else {
3035 LLVMAtomicRMWBinOp op;
3036 switch (instr->intrinsic) {
3037 case nir_intrinsic_shared_atomic_add:
3038 case nir_intrinsic_deref_atomic_add:
3039 op = LLVMAtomicRMWBinOpAdd;
3040 break;
3041 case nir_intrinsic_shared_atomic_umin:
3042 case nir_intrinsic_deref_atomic_umin:
3043 op = LLVMAtomicRMWBinOpUMin;
3044 break;
3045 case nir_intrinsic_shared_atomic_umax:
3046 case nir_intrinsic_deref_atomic_umax:
3047 op = LLVMAtomicRMWBinOpUMax;
3048 break;
3049 case nir_intrinsic_shared_atomic_imin:
3050 case nir_intrinsic_deref_atomic_imin:
3051 op = LLVMAtomicRMWBinOpMin;
3052 break;
3053 case nir_intrinsic_shared_atomic_imax:
3054 case nir_intrinsic_deref_atomic_imax:
3055 op = LLVMAtomicRMWBinOpMax;
3056 break;
3057 case nir_intrinsic_shared_atomic_and:
3058 case nir_intrinsic_deref_atomic_and:
3059 op = LLVMAtomicRMWBinOpAnd;
3060 break;
3061 case nir_intrinsic_shared_atomic_or:
3062 case nir_intrinsic_deref_atomic_or:
3063 op = LLVMAtomicRMWBinOpOr;
3064 break;
3065 case nir_intrinsic_shared_atomic_xor:
3066 case nir_intrinsic_deref_atomic_xor:
3067 op = LLVMAtomicRMWBinOpXor;
3068 break;
3069 case nir_intrinsic_shared_atomic_exchange:
3070 case nir_intrinsic_deref_atomic_exchange:
3071 op = LLVMAtomicRMWBinOpXchg;
3072 break;
3073 default:
3074 return NULL;
3075 }
3076
3077 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3078 }
3079 return result;
3080 }
3081
3082 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3083 {
3084 LLVMValueRef values[2];
3085 LLVMValueRef pos[2];
3086
3087 pos[0] = ac_to_float(&ctx->ac,
3088 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3089 pos[1] = ac_to_float(&ctx->ac,
3090 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3091
3092 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3093 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3094 return ac_build_gather_values(&ctx->ac, values, 2);
3095 }
3096
3097 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3098 enum glsl_interp_mode interp, unsigned location)
3099 {
3100 switch (interp) {
3101 case INTERP_MODE_FLAT:
3102 default:
3103 return NULL;
3104 case INTERP_MODE_SMOOTH:
3105 case INTERP_MODE_NONE:
3106 if (location == INTERP_CENTER)
3107 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3108 else if (location == INTERP_CENTROID)
3109 return ctx->abi->persp_centroid;
3110 else if (location == INTERP_SAMPLE)
3111 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3112 break;
3113 case INTERP_MODE_NOPERSPECTIVE:
3114 if (location == INTERP_CENTER)
3115 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3116 else if (location == INTERP_CENTROID)
3117 return ctx->abi->linear_centroid;
3118 else if (location == INTERP_SAMPLE)
3119 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3120 break;
3121 }
3122 return NULL;
3123 }
3124
3125 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3126 unsigned mode)
3127 {
3128 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3129 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3130 }
3131
3132 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3133 unsigned mode,
3134 LLVMValueRef offset)
3135 {
3136 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3137 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3138 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3139
3140 LLVMValueRef ij_out[2];
3141 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3142
3143 /*
3144 * take the I then J parameters, and the DDX/Y for it, and
3145 * calculate the IJ inputs for the interpolator.
3146 * temp1 = ddx * offset/sample.x + I;
3147 * interp_param.I = ddy * offset/sample.y + temp1;
3148 * temp1 = ddx * offset/sample.x + J;
3149 * interp_param.J = ddy * offset/sample.y + temp1;
3150 */
3151 for (unsigned i = 0; i < 2; i++) {
3152 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3153 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3154 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3155 ddxy_out, ix_ll, "");
3156 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3157 ddxy_out, iy_ll, "");
3158 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3159 interp_param, ix_ll, "");
3160 LLVMValueRef temp1, temp2;
3161
3162 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3163 ctx->ac.f32, "");
3164
3165 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3166 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3167
3168 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3169 temp2, ctx->ac.i32, "");
3170 }
3171 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3172 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3173 }
3174
3175 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3176 unsigned mode)
3177 {
3178 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3179 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3180 }
3181
3182 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3183 unsigned mode,
3184 LLVMValueRef sample_id)
3185 {
3186 if (ctx->abi->interp_at_sample_force_center)
3187 return barycentric_center(ctx, mode);
3188
3189 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3190
3191 /* fetch sample ID */
3192 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3193
3194 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3195 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3196 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3197 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3198 LLVMValueRef coords[] = { src_c0, src_c1 };
3199 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3200
3201 return barycentric_offset(ctx, mode, offset);
3202 }
3203
3204
3205 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3206 unsigned mode)
3207 {
3208 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3209 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3210 }
3211
3212 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3213 LLVMValueRef interp_param,
3214 unsigned index, unsigned comp_start,
3215 unsigned num_components,
3216 unsigned bitsize)
3217 {
3218 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3219
3220 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3221 interp_param, ctx->ac.v2f32, "");
3222 LLVMValueRef i = LLVMBuildExtractElement(
3223 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3224 LLVMValueRef j = LLVMBuildExtractElement(
3225 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3226
3227 LLVMValueRef values[4];
3228 assert(bitsize == 16 || bitsize == 32);
3229 for (unsigned comp = 0; comp < num_components; comp++) {
3230 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3231 if (bitsize == 16) {
3232 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3233 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3234 } else {
3235 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3236 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3237 }
3238 }
3239
3240 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3241 }
3242
3243 static LLVMValueRef load_flat_input(struct ac_nir_context *ctx,
3244 unsigned index, unsigned comp_start,
3245 unsigned num_components,
3246 unsigned bit_size)
3247 {
3248 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3249
3250 LLVMValueRef values[8];
3251
3252 /* Each component of a 64-bit value takes up two GL-level channels. */
3253 unsigned channels =
3254 bit_size == 64 ? num_components * 2 : num_components;
3255
3256 for (unsigned chan = 0; chan < channels; chan++) {
3257 if (comp_start + chan > 4)
3258 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3259 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (comp_start + chan) % 4, false);
3260 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3261 LLVMConstInt(ctx->ac.i32, 2, false),
3262 llvm_chan,
3263 attr_number,
3264 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3265 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3266 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3267 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3268 }
3269
3270 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3271 if (bit_size == 64) {
3272 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3273 LLVMVectorType(ctx->ac.i64, num_components);
3274 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3275 }
3276 return result;
3277 }
3278
3279 static void visit_intrinsic(struct ac_nir_context *ctx,
3280 nir_intrinsic_instr *instr)
3281 {
3282 LLVMValueRef result = NULL;
3283
3284 switch (instr->intrinsic) {
3285 case nir_intrinsic_ballot:
3286 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3287 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3288 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3289 break;
3290 case nir_intrinsic_read_invocation:
3291 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3292 get_src(ctx, instr->src[1]));
3293 break;
3294 case nir_intrinsic_read_first_invocation:
3295 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3296 break;
3297 case nir_intrinsic_load_subgroup_invocation:
3298 result = ac_get_thread_id(&ctx->ac);
3299 break;
3300 case nir_intrinsic_load_work_group_id: {
3301 LLVMValueRef values[3];
3302
3303 for (int i = 0; i < 3; i++) {
3304 values[i] = ctx->args->workgroup_ids[i].used ?
3305 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3306 }
3307
3308 result = ac_build_gather_values(&ctx->ac, values, 3);
3309 break;
3310 }
3311 case nir_intrinsic_load_base_vertex:
3312 case nir_intrinsic_load_first_vertex:
3313 result = ctx->abi->load_base_vertex(ctx->abi);
3314 break;
3315 case nir_intrinsic_load_local_group_size:
3316 result = ctx->abi->load_local_group_size(ctx->abi);
3317 break;
3318 case nir_intrinsic_load_vertex_id:
3319 result = LLVMBuildAdd(ctx->ac.builder,
3320 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3321 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3322 break;
3323 case nir_intrinsic_load_vertex_id_zero_base: {
3324 result = ctx->abi->vertex_id;
3325 break;
3326 }
3327 case nir_intrinsic_load_local_invocation_id: {
3328 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3329 break;
3330 }
3331 case nir_intrinsic_load_base_instance:
3332 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3333 break;
3334 case nir_intrinsic_load_draw_id:
3335 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3336 break;
3337 case nir_intrinsic_load_view_index:
3338 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3339 break;
3340 case nir_intrinsic_load_invocation_id:
3341 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3342 result = ac_unpack_param(&ctx->ac,
3343 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3344 8, 5);
3345 } else {
3346 if (ctx->ac.chip_class >= GFX10) {
3347 result = LLVMBuildAnd(ctx->ac.builder,
3348 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3349 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3350 } else {
3351 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3352 }
3353 }
3354 break;
3355 case nir_intrinsic_load_primitive_id:
3356 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3357 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3358 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3359 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3360 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3361 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3362 } else
3363 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3364 break;
3365 case nir_intrinsic_load_sample_id:
3366 result = ac_unpack_param(&ctx->ac,
3367 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3368 8, 4);
3369 break;
3370 case nir_intrinsic_load_sample_pos:
3371 result = load_sample_pos(ctx);
3372 break;
3373 case nir_intrinsic_load_sample_mask_in:
3374 result = ctx->abi->load_sample_mask_in(ctx->abi);
3375 break;
3376 case nir_intrinsic_load_frag_coord: {
3377 LLVMValueRef values[4] = {
3378 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3379 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3380 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3381 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3382 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3383 };
3384 result = ac_to_integer(&ctx->ac,
3385 ac_build_gather_values(&ctx->ac, values, 4));
3386 break;
3387 }
3388 case nir_intrinsic_load_layer_id:
3389 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3390 break;
3391 case nir_intrinsic_load_front_face:
3392 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3393 break;
3394 case nir_intrinsic_load_helper_invocation:
3395 result = ac_build_load_helper_invocation(&ctx->ac);
3396 break;
3397 case nir_intrinsic_load_color0:
3398 result = ctx->abi->color0;
3399 break;
3400 case nir_intrinsic_load_color1:
3401 result = ctx->abi->color1;
3402 break;
3403 case nir_intrinsic_load_user_data_amd:
3404 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3405 result = ctx->abi->user_data;
3406 break;
3407 case nir_intrinsic_load_instance_id:
3408 result = ctx->abi->instance_id;
3409 break;
3410 case nir_intrinsic_load_num_work_groups:
3411 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3412 break;
3413 case nir_intrinsic_load_local_invocation_index:
3414 result = visit_load_local_invocation_index(ctx);
3415 break;
3416 case nir_intrinsic_load_subgroup_id:
3417 result = visit_load_subgroup_id(ctx);
3418 break;
3419 case nir_intrinsic_load_num_subgroups:
3420 result = visit_load_num_subgroups(ctx);
3421 break;
3422 case nir_intrinsic_first_invocation:
3423 result = visit_first_invocation(ctx);
3424 break;
3425 case nir_intrinsic_load_push_constant:
3426 result = visit_load_push_constant(ctx, instr);
3427 break;
3428 case nir_intrinsic_vulkan_resource_index: {
3429 LLVMValueRef index = get_src(ctx, instr->src[0]);
3430 unsigned desc_set = nir_intrinsic_desc_set(instr);
3431 unsigned binding = nir_intrinsic_binding(instr);
3432
3433 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3434 binding);
3435 break;
3436 }
3437 case nir_intrinsic_vulkan_resource_reindex:
3438 result = visit_vulkan_resource_reindex(ctx, instr);
3439 break;
3440 case nir_intrinsic_store_ssbo:
3441 visit_store_ssbo(ctx, instr);
3442 break;
3443 case nir_intrinsic_load_ssbo:
3444 result = visit_load_buffer(ctx, instr);
3445 break;
3446 case nir_intrinsic_ssbo_atomic_add:
3447 case nir_intrinsic_ssbo_atomic_imin:
3448 case nir_intrinsic_ssbo_atomic_umin:
3449 case nir_intrinsic_ssbo_atomic_imax:
3450 case nir_intrinsic_ssbo_atomic_umax:
3451 case nir_intrinsic_ssbo_atomic_and:
3452 case nir_intrinsic_ssbo_atomic_or:
3453 case nir_intrinsic_ssbo_atomic_xor:
3454 case nir_intrinsic_ssbo_atomic_exchange:
3455 case nir_intrinsic_ssbo_atomic_comp_swap:
3456 result = visit_atomic_ssbo(ctx, instr);
3457 break;
3458 case nir_intrinsic_load_ubo:
3459 result = visit_load_ubo_buffer(ctx, instr);
3460 break;
3461 case nir_intrinsic_get_buffer_size:
3462 result = visit_get_buffer_size(ctx, instr);
3463 break;
3464 case nir_intrinsic_load_deref:
3465 result = visit_load_var(ctx, instr);
3466 break;
3467 case nir_intrinsic_store_deref:
3468 visit_store_var(ctx, instr);
3469 break;
3470 case nir_intrinsic_load_shared:
3471 result = visit_load_shared(ctx, instr);
3472 break;
3473 case nir_intrinsic_store_shared:
3474 visit_store_shared(ctx, instr);
3475 break;
3476 case nir_intrinsic_bindless_image_samples:
3477 case nir_intrinsic_image_deref_samples:
3478 result = visit_image_samples(ctx, instr);
3479 break;
3480 case nir_intrinsic_bindless_image_load:
3481 result = visit_image_load(ctx, instr, true);
3482 break;
3483 case nir_intrinsic_image_deref_load:
3484 result = visit_image_load(ctx, instr, false);
3485 break;
3486 case nir_intrinsic_bindless_image_store:
3487 visit_image_store(ctx, instr, true);
3488 break;
3489 case nir_intrinsic_image_deref_store:
3490 visit_image_store(ctx, instr, false);
3491 break;
3492 case nir_intrinsic_bindless_image_atomic_add:
3493 case nir_intrinsic_bindless_image_atomic_imin:
3494 case nir_intrinsic_bindless_image_atomic_umin:
3495 case nir_intrinsic_bindless_image_atomic_imax:
3496 case nir_intrinsic_bindless_image_atomic_umax:
3497 case nir_intrinsic_bindless_image_atomic_and:
3498 case nir_intrinsic_bindless_image_atomic_or:
3499 case nir_intrinsic_bindless_image_atomic_xor:
3500 case nir_intrinsic_bindless_image_atomic_exchange:
3501 case nir_intrinsic_bindless_image_atomic_comp_swap:
3502 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3503 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3504 result = visit_image_atomic(ctx, instr, true);
3505 break;
3506 case nir_intrinsic_image_deref_atomic_add:
3507 case nir_intrinsic_image_deref_atomic_imin:
3508 case nir_intrinsic_image_deref_atomic_umin:
3509 case nir_intrinsic_image_deref_atomic_imax:
3510 case nir_intrinsic_image_deref_atomic_umax:
3511 case nir_intrinsic_image_deref_atomic_and:
3512 case nir_intrinsic_image_deref_atomic_or:
3513 case nir_intrinsic_image_deref_atomic_xor:
3514 case nir_intrinsic_image_deref_atomic_exchange:
3515 case nir_intrinsic_image_deref_atomic_comp_swap:
3516 case nir_intrinsic_image_deref_atomic_inc_wrap:
3517 case nir_intrinsic_image_deref_atomic_dec_wrap:
3518 result = visit_image_atomic(ctx, instr, false);
3519 break;
3520 case nir_intrinsic_bindless_image_size:
3521 result = visit_image_size(ctx, instr, true);
3522 break;
3523 case nir_intrinsic_image_deref_size:
3524 result = visit_image_size(ctx, instr, false);
3525 break;
3526 case nir_intrinsic_shader_clock:
3527 result = ac_build_shader_clock(&ctx->ac);
3528 break;
3529 case nir_intrinsic_discard:
3530 case nir_intrinsic_discard_if:
3531 emit_discard(ctx, instr);
3532 break;
3533 case nir_intrinsic_memory_barrier:
3534 case nir_intrinsic_group_memory_barrier:
3535 case nir_intrinsic_memory_barrier_atomic_counter:
3536 case nir_intrinsic_memory_barrier_buffer:
3537 case nir_intrinsic_memory_barrier_image:
3538 case nir_intrinsic_memory_barrier_shared:
3539 emit_membar(&ctx->ac, instr);
3540 break;
3541 case nir_intrinsic_barrier:
3542 ac_emit_barrier(&ctx->ac, ctx->stage);
3543 break;
3544 case nir_intrinsic_shared_atomic_add:
3545 case nir_intrinsic_shared_atomic_imin:
3546 case nir_intrinsic_shared_atomic_umin:
3547 case nir_intrinsic_shared_atomic_imax:
3548 case nir_intrinsic_shared_atomic_umax:
3549 case nir_intrinsic_shared_atomic_and:
3550 case nir_intrinsic_shared_atomic_or:
3551 case nir_intrinsic_shared_atomic_xor:
3552 case nir_intrinsic_shared_atomic_exchange:
3553 case nir_intrinsic_shared_atomic_comp_swap: {
3554 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3555 result = visit_var_atomic(ctx, instr, ptr, 1);
3556 break;
3557 }
3558 case nir_intrinsic_deref_atomic_add:
3559 case nir_intrinsic_deref_atomic_imin:
3560 case nir_intrinsic_deref_atomic_umin:
3561 case nir_intrinsic_deref_atomic_imax:
3562 case nir_intrinsic_deref_atomic_umax:
3563 case nir_intrinsic_deref_atomic_and:
3564 case nir_intrinsic_deref_atomic_or:
3565 case nir_intrinsic_deref_atomic_xor:
3566 case nir_intrinsic_deref_atomic_exchange:
3567 case nir_intrinsic_deref_atomic_comp_swap: {
3568 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3569 result = visit_var_atomic(ctx, instr, ptr, 1);
3570 break;
3571 }
3572 case nir_intrinsic_load_barycentric_pixel:
3573 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3574 break;
3575 case nir_intrinsic_load_barycentric_centroid:
3576 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3577 break;
3578 case nir_intrinsic_load_barycentric_sample:
3579 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3580 break;
3581 case nir_intrinsic_load_barycentric_at_offset: {
3582 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3583 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3584 break;
3585 }
3586 case nir_intrinsic_load_barycentric_at_sample: {
3587 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3588 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3589 break;
3590 }
3591 case nir_intrinsic_load_interpolated_input: {
3592 /* We assume any indirect loads have been lowered away */
3593 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3594 assert(offset);
3595 assert(offset[0].i32 == 0);
3596
3597 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3598 unsigned index = nir_intrinsic_base(instr);
3599 unsigned component = nir_intrinsic_component(instr);
3600 result = load_interpolated_input(ctx, interp_param, index,
3601 component,
3602 instr->dest.ssa.num_components,
3603 instr->dest.ssa.bit_size);
3604 break;
3605 }
3606 case nir_intrinsic_load_input: {
3607 /* We only lower inputs for fragment shaders ATM */
3608 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[0]);
3609 assert(offset);
3610 assert(offset[0].i32 == 0);
3611
3612 unsigned index = nir_intrinsic_base(instr);
3613 unsigned component = nir_intrinsic_component(instr);
3614 result = load_flat_input(ctx, index, component,
3615 instr->dest.ssa.num_components,
3616 instr->dest.ssa.bit_size);
3617 break;
3618 }
3619 case nir_intrinsic_emit_vertex:
3620 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3621 break;
3622 case nir_intrinsic_end_primitive:
3623 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3624 break;
3625 case nir_intrinsic_load_tess_coord:
3626 result = ctx->abi->load_tess_coord(ctx->abi);
3627 break;
3628 case nir_intrinsic_load_tess_level_outer:
3629 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
3630 break;
3631 case nir_intrinsic_load_tess_level_inner:
3632 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
3633 break;
3634 case nir_intrinsic_load_tess_level_outer_default:
3635 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
3636 break;
3637 case nir_intrinsic_load_tess_level_inner_default:
3638 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
3639 break;
3640 case nir_intrinsic_load_patch_vertices_in:
3641 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3642 break;
3643 case nir_intrinsic_vote_all: {
3644 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3645 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3646 break;
3647 }
3648 case nir_intrinsic_vote_any: {
3649 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3650 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3651 break;
3652 }
3653 case nir_intrinsic_shuffle:
3654 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3655 get_src(ctx, instr->src[1]));
3656 break;
3657 case nir_intrinsic_reduce:
3658 result = ac_build_reduce(&ctx->ac,
3659 get_src(ctx, instr->src[0]),
3660 instr->const_index[0],
3661 instr->const_index[1]);
3662 break;
3663 case nir_intrinsic_inclusive_scan:
3664 result = ac_build_inclusive_scan(&ctx->ac,
3665 get_src(ctx, instr->src[0]),
3666 instr->const_index[0]);
3667 break;
3668 case nir_intrinsic_exclusive_scan:
3669 result = ac_build_exclusive_scan(&ctx->ac,
3670 get_src(ctx, instr->src[0]),
3671 instr->const_index[0]);
3672 break;
3673 case nir_intrinsic_quad_broadcast: {
3674 unsigned lane = nir_src_as_uint(instr->src[1]);
3675 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3676 lane, lane, lane, lane);
3677 break;
3678 }
3679 case nir_intrinsic_quad_swap_horizontal:
3680 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3681 break;
3682 case nir_intrinsic_quad_swap_vertical:
3683 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3684 break;
3685 case nir_intrinsic_quad_swap_diagonal:
3686 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3687 break;
3688 case nir_intrinsic_quad_swizzle_amd: {
3689 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3690 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3691 mask & 0x3, (mask >> 2) & 0x3,
3692 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3693 break;
3694 }
3695 case nir_intrinsic_masked_swizzle_amd: {
3696 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3697 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3698 break;
3699 }
3700 case nir_intrinsic_write_invocation_amd:
3701 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3702 get_src(ctx, instr->src[1]),
3703 get_src(ctx, instr->src[2]));
3704 break;
3705 case nir_intrinsic_mbcnt_amd:
3706 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3707 break;
3708 case nir_intrinsic_load_scratch: {
3709 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3710 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3711 offset);
3712 LLVMTypeRef comp_type =
3713 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3714 LLVMTypeRef vec_type =
3715 instr->dest.ssa.num_components == 1 ? comp_type :
3716 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3717 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3718 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3719 LLVMPointerType(vec_type, addr_space), "");
3720 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3721 break;
3722 }
3723 case nir_intrinsic_store_scratch: {
3724 LLVMValueRef offset = get_src(ctx, instr->src[1]);
3725 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3726 offset);
3727 LLVMTypeRef comp_type =
3728 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
3729 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3730 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3731 LLVMPointerType(comp_type, addr_space), "");
3732 LLVMValueRef src = get_src(ctx, instr->src[0]);
3733 unsigned wrmask = nir_intrinsic_write_mask(instr);
3734 while (wrmask) {
3735 int start, count;
3736 u_bit_scan_consecutive_range(&wrmask, &start, &count);
3737
3738 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
3739 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
3740 LLVMTypeRef vec_type =
3741 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
3742 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
3743 offset_ptr,
3744 LLVMPointerType(vec_type, addr_space),
3745 "");
3746 LLVMValueRef offset_src =
3747 ac_extract_components(&ctx->ac, src, start, count);
3748 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
3749 }
3750 break;
3751 }
3752 case nir_intrinsic_load_constant: {
3753 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3754 LLVMValueRef base = LLVMConstInt(ctx->ac.i32,
3755 nir_intrinsic_base(instr),
3756 false);
3757 offset = LLVMBuildAdd(ctx->ac.builder, offset, base, "");
3758 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
3759 offset);
3760 LLVMTypeRef comp_type =
3761 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3762 LLVMTypeRef vec_type =
3763 instr->dest.ssa.num_components == 1 ? comp_type :
3764 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3765 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3766 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3767 LLVMPointerType(vec_type, addr_space), "");
3768 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3769 break;
3770 }
3771 default:
3772 fprintf(stderr, "Unknown intrinsic: ");
3773 nir_print_instr(&instr->instr, stderr);
3774 fprintf(stderr, "\n");
3775 break;
3776 }
3777 if (result) {
3778 ctx->ssa_defs[instr->dest.ssa.index] = result;
3779 }
3780 }
3781
3782 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3783 unsigned base_index,
3784 unsigned constant_index,
3785 LLVMValueRef dynamic_index)
3786 {
3787 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3788 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3789 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3790
3791 /* Bindless uniforms are 64bit so multiple index by 8 */
3792 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3793 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3794
3795 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3796
3797 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3798 NULL, 0, 0, true, true);
3799
3800 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3801 }
3802
3803 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3804 nir_deref_instr *deref_instr,
3805 enum ac_descriptor_type desc_type,
3806 const nir_instr *instr,
3807 bool image, bool write)
3808 {
3809 LLVMValueRef index = NULL;
3810 unsigned constant_index = 0;
3811 unsigned descriptor_set;
3812 unsigned base_index;
3813 bool bindless = false;
3814
3815 if (!deref_instr) {
3816 descriptor_set = 0;
3817 if (image) {
3818 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3819 base_index = 0;
3820 bindless = true;
3821 index = get_src(ctx, img_instr->src[0]);
3822 } else {
3823 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3824 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3825 nir_tex_src_sampler_handle);
3826 if (sampSrcIdx != -1) {
3827 base_index = 0;
3828 bindless = true;
3829 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3830 } else {
3831 assert(tex_instr && !image);
3832 base_index = tex_instr->sampler_index;
3833 }
3834 }
3835 } else {
3836 while(deref_instr->deref_type != nir_deref_type_var) {
3837 if (deref_instr->deref_type == nir_deref_type_array) {
3838 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3839 if (!array_size)
3840 array_size = 1;
3841
3842 if (nir_src_is_const(deref_instr->arr.index)) {
3843 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3844 } else {
3845 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3846
3847 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3848 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3849
3850 if (!index)
3851 index = indirect;
3852 else
3853 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3854 }
3855
3856 deref_instr = nir_src_as_deref(deref_instr->parent);
3857 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3858 unsigned sidx = deref_instr->strct.index;
3859 deref_instr = nir_src_as_deref(deref_instr->parent);
3860 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3861 } else {
3862 unreachable("Unsupported deref type");
3863 }
3864 }
3865 descriptor_set = deref_instr->var->data.descriptor_set;
3866
3867 if (deref_instr->var->data.bindless) {
3868 /* For now just assert on unhandled variable types */
3869 assert(deref_instr->var->data.mode == nir_var_uniform);
3870
3871 base_index = deref_instr->var->data.driver_location;
3872 bindless = true;
3873
3874 index = index ? index : ctx->ac.i32_0;
3875 index = get_bindless_index_from_uniform(ctx, base_index,
3876 constant_index, index);
3877 } else
3878 base_index = deref_instr->var->data.binding;
3879 }
3880
3881 return ctx->abi->load_sampler_desc(ctx->abi,
3882 descriptor_set,
3883 base_index,
3884 constant_index, index,
3885 desc_type, image, write, bindless);
3886 }
3887
3888 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3889 *
3890 * GFX6-GFX7:
3891 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3892 * filtering manually. The driver sets img7 to a mask clearing
3893 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3894 * s_and_b32 samp0, samp0, img7
3895 *
3896 * GFX8:
3897 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3898 */
3899 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3900 LLVMValueRef res, LLVMValueRef samp)
3901 {
3902 LLVMBuilderRef builder = ctx->ac.builder;
3903 LLVMValueRef img7, samp0;
3904
3905 if (ctx->ac.chip_class >= GFX8)
3906 return samp;
3907
3908 img7 = LLVMBuildExtractElement(builder, res,
3909 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3910 samp0 = LLVMBuildExtractElement(builder, samp,
3911 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3912 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3913 return LLVMBuildInsertElement(builder, samp, samp0,
3914 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3915 }
3916
3917 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3918 nir_tex_instr *instr,
3919 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3920 LLVMValueRef *fmask_ptr)
3921 {
3922 nir_deref_instr *texture_deref_instr = NULL;
3923 nir_deref_instr *sampler_deref_instr = NULL;
3924 int plane = -1;
3925
3926 for (unsigned i = 0; i < instr->num_srcs; i++) {
3927 switch (instr->src[i].src_type) {
3928 case nir_tex_src_texture_deref:
3929 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3930 break;
3931 case nir_tex_src_sampler_deref:
3932 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3933 break;
3934 case nir_tex_src_plane:
3935 plane = nir_src_as_int(instr->src[i].src);
3936 break;
3937 default:
3938 break;
3939 }
3940 }
3941
3942 if (!sampler_deref_instr)
3943 sampler_deref_instr = texture_deref_instr;
3944
3945 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3946
3947 if (plane >= 0) {
3948 assert(instr->op != nir_texop_txf_ms &&
3949 instr->op != nir_texop_samples_identical);
3950 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3951
3952 main_descriptor = AC_DESC_PLANE_0 + plane;
3953 }
3954
3955 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3956
3957 if (samp_ptr) {
3958 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3959 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3960 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3961 }
3962 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3963 instr->op == nir_texop_samples_identical))
3964 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3965 }
3966
3967 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3968 LLVMValueRef coord)
3969 {
3970 coord = ac_to_float(ctx, coord);
3971 coord = ac_build_round(ctx, coord);
3972 coord = ac_to_integer(ctx, coord);
3973 return coord;
3974 }
3975
3976 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3977 {
3978 LLVMValueRef result = NULL;
3979 struct ac_image_args args = { 0 };
3980 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3981 LLVMValueRef ddx = NULL, ddy = NULL;
3982 unsigned offset_src = 0;
3983
3984 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3985
3986 for (unsigned i = 0; i < instr->num_srcs; i++) {
3987 switch (instr->src[i].src_type) {
3988 case nir_tex_src_coord: {
3989 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3990 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3991 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3992 break;
3993 }
3994 case nir_tex_src_projector:
3995 break;
3996 case nir_tex_src_comparator:
3997 if (instr->is_shadow) {
3998 args.compare = get_src(ctx, instr->src[i].src);
3999 args.compare = ac_to_float(&ctx->ac, args.compare);
4000 }
4001 break;
4002 case nir_tex_src_offset:
4003 args.offset = get_src(ctx, instr->src[i].src);
4004 offset_src = i;
4005 break;
4006 case nir_tex_src_bias:
4007 if (instr->op == nir_texop_txb)
4008 args.bias = get_src(ctx, instr->src[i].src);
4009 break;
4010 case nir_tex_src_lod: {
4011 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4012 args.level_zero = true;
4013 else
4014 args.lod = get_src(ctx, instr->src[i].src);
4015 break;
4016 }
4017 case nir_tex_src_ms_index:
4018 sample_index = get_src(ctx, instr->src[i].src);
4019 break;
4020 case nir_tex_src_ms_mcs:
4021 break;
4022 case nir_tex_src_ddx:
4023 ddx = get_src(ctx, instr->src[i].src);
4024 break;
4025 case nir_tex_src_ddy:
4026 ddy = get_src(ctx, instr->src[i].src);
4027 break;
4028 case nir_tex_src_texture_offset:
4029 case nir_tex_src_sampler_offset:
4030 case nir_tex_src_plane:
4031 default:
4032 break;
4033 }
4034 }
4035
4036 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4037 result = get_buffer_size(ctx, args.resource, true);
4038 goto write_result;
4039 }
4040
4041 if (instr->op == nir_texop_texture_samples) {
4042 LLVMValueRef res, samples, is_msaa;
4043 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4044 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4045 LLVMConstInt(ctx->ac.i32, 3, false), "");
4046 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4047 LLVMConstInt(ctx->ac.i32, 28, false), "");
4048 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4049 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4050 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4051 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4052
4053 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4054 LLVMConstInt(ctx->ac.i32, 16, false), "");
4055 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4056 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4057 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4058 samples, "");
4059 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4060 ctx->ac.i32_1, "");
4061 result = samples;
4062 goto write_result;
4063 }
4064
4065 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4066 LLVMValueRef offset[3], pack;
4067 for (unsigned chan = 0; chan < 3; ++chan)
4068 offset[chan] = ctx->ac.i32_0;
4069
4070 unsigned num_components = ac_get_llvm_num_components(args.offset);
4071 for (unsigned chan = 0; chan < num_components; chan++) {
4072 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4073 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4074 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4075 if (chan)
4076 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4077 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4078 }
4079 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4080 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4081 args.offset = pack;
4082 }
4083
4084 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4085 * OpenGL 4.5 spec says:
4086 *
4087 * "If the texture’s internal format indicates a fixed-point
4088 * depth texture, then D_t and D_ref are clamped to the
4089 * range [0, 1]; otherwise no clamping is performed."
4090 *
4091 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4092 * so the depth comparison value isn't clamped for Z16 and
4093 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4094 * an explicitly clamped 32-bit float format.
4095 */
4096 if (args.compare &&
4097 ctx->ac.chip_class >= GFX8 &&
4098 ctx->ac.chip_class <= GFX9 &&
4099 ctx->abi->clamp_shadow_reference) {
4100 LLVMValueRef upgraded, clamped;
4101
4102 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4103 LLVMConstInt(ctx->ac.i32, 3, false), "");
4104 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4105 LLVMConstInt(ctx->ac.i32, 29, false), "");
4106 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4107 clamped = ac_build_clamp(&ctx->ac, args.compare);
4108 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4109 args.compare, "");
4110 }
4111
4112 /* pack derivatives */
4113 if (ddx || ddy) {
4114 int num_src_deriv_channels, num_dest_deriv_channels;
4115 switch (instr->sampler_dim) {
4116 case GLSL_SAMPLER_DIM_3D:
4117 case GLSL_SAMPLER_DIM_CUBE:
4118 num_src_deriv_channels = 3;
4119 num_dest_deriv_channels = 3;
4120 break;
4121 case GLSL_SAMPLER_DIM_2D:
4122 default:
4123 num_src_deriv_channels = 2;
4124 num_dest_deriv_channels = 2;
4125 break;
4126 case GLSL_SAMPLER_DIM_1D:
4127 num_src_deriv_channels = 1;
4128 if (ctx->ac.chip_class == GFX9) {
4129 num_dest_deriv_channels = 2;
4130 } else {
4131 num_dest_deriv_channels = 1;
4132 }
4133 break;
4134 }
4135
4136 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4137 args.derivs[i] = ac_to_float(&ctx->ac,
4138 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4139 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4140 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4141 }
4142 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4143 args.derivs[i] = ctx->ac.f32_0;
4144 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4145 }
4146 }
4147
4148 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4149 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4150 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4151 if (instr->coord_components == 3)
4152 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4153 ac_prepare_cube_coords(&ctx->ac,
4154 instr->op == nir_texop_txd, instr->is_array,
4155 instr->op == nir_texop_lod, args.coords, args.derivs);
4156 }
4157
4158 /* Texture coordinates fixups */
4159 if (instr->coord_components > 1 &&
4160 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4161 instr->is_array &&
4162 instr->op != nir_texop_txf) {
4163 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4164 }
4165
4166 if (instr->coord_components > 2 &&
4167 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4168 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4169 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4170 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4171 instr->is_array &&
4172 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4173 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4174 }
4175
4176 if (ctx->ac.chip_class == GFX9 &&
4177 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4178 instr->op != nir_texop_lod) {
4179 LLVMValueRef filler;
4180 if (instr->op == nir_texop_txf)
4181 filler = ctx->ac.i32_0;
4182 else
4183 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4184
4185 if (instr->is_array)
4186 args.coords[2] = args.coords[1];
4187 args.coords[1] = filler;
4188 }
4189
4190 /* Pack sample index */
4191 if (instr->op == nir_texop_txf_ms && sample_index)
4192 args.coords[instr->coord_components] = sample_index;
4193
4194 if (instr->op == nir_texop_samples_identical) {
4195 struct ac_image_args txf_args = { 0 };
4196 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4197
4198 txf_args.dmask = 0xf;
4199 txf_args.resource = fmask_ptr;
4200 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4201 result = build_tex_intrinsic(ctx, instr, &txf_args);
4202
4203 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4204 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4205 goto write_result;
4206 }
4207
4208 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4209 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4210 instr->op != nir_texop_txs) {
4211 unsigned sample_chan = instr->is_array ? 3 : 2;
4212 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4213 &ctx->ac, args.coords[0], args.coords[1],
4214 instr->is_array ? args.coords[2] : NULL,
4215 args.coords[sample_chan], fmask_ptr);
4216 }
4217
4218 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4219 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4220 num_offsets = MIN2(num_offsets, instr->coord_components);
4221 for (unsigned i = 0; i < num_offsets; ++i) {
4222 args.coords[i] = LLVMBuildAdd(
4223 ctx->ac.builder, args.coords[i],
4224 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4225 }
4226 args.offset = NULL;
4227 }
4228
4229 /* DMASK was repurposed for GATHER4. 4 components are always
4230 * returned and DMASK works like a swizzle - it selects
4231 * the component to fetch. The only valid DMASK values are
4232 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4233 * (red,red,red,red) etc.) The ISA document doesn't mention
4234 * this.
4235 */
4236 args.dmask = 0xf;
4237 if (instr->op == nir_texop_tg4) {
4238 if (instr->is_shadow)
4239 args.dmask = 1;
4240 else
4241 args.dmask = 1 << instr->component;
4242 }
4243
4244 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4245 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4246 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4247 }
4248 result = build_tex_intrinsic(ctx, instr, &args);
4249
4250 if (instr->op == nir_texop_query_levels)
4251 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4252 else if (instr->is_shadow && instr->is_new_style_shadow &&
4253 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4254 instr->op != nir_texop_tg4)
4255 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4256 else if (instr->op == nir_texop_txs &&
4257 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4258 instr->is_array) {
4259 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4260 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4261 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4262 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4263 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4264 } else if (ctx->ac.chip_class == GFX9 &&
4265 instr->op == nir_texop_txs &&
4266 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4267 instr->is_array) {
4268 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4269 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4270 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4271 ctx->ac.i32_1, "");
4272 } else if (instr->dest.ssa.num_components != 4)
4273 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4274
4275 write_result:
4276 if (result) {
4277 assert(instr->dest.is_ssa);
4278 result = ac_to_integer(&ctx->ac, result);
4279 ctx->ssa_defs[instr->dest.ssa.index] = result;
4280 }
4281 }
4282
4283
4284 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4285 {
4286 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4287 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4288
4289 ctx->ssa_defs[instr->dest.ssa.index] = result;
4290 _mesa_hash_table_insert(ctx->phis, instr, result);
4291 }
4292
4293 static void visit_post_phi(struct ac_nir_context *ctx,
4294 nir_phi_instr *instr,
4295 LLVMValueRef llvm_phi)
4296 {
4297 nir_foreach_phi_src(src, instr) {
4298 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4299 LLVMValueRef llvm_src = get_src(ctx, src->src);
4300
4301 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4302 }
4303 }
4304
4305 static void phi_post_pass(struct ac_nir_context *ctx)
4306 {
4307 hash_table_foreach(ctx->phis, entry) {
4308 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4309 (LLVMValueRef)entry->data);
4310 }
4311 }
4312
4313
4314 static void visit_ssa_undef(struct ac_nir_context *ctx,
4315 const nir_ssa_undef_instr *instr)
4316 {
4317 unsigned num_components = instr->def.num_components;
4318 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4319 LLVMValueRef undef;
4320
4321 if (num_components == 1)
4322 undef = LLVMGetUndef(type);
4323 else {
4324 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4325 }
4326 ctx->ssa_defs[instr->def.index] = undef;
4327 }
4328
4329 static void visit_jump(struct ac_llvm_context *ctx,
4330 const nir_jump_instr *instr)
4331 {
4332 switch (instr->type) {
4333 case nir_jump_break:
4334 ac_build_break(ctx);
4335 break;
4336 case nir_jump_continue:
4337 ac_build_continue(ctx);
4338 break;
4339 default:
4340 fprintf(stderr, "Unknown NIR jump instr: ");
4341 nir_print_instr(&instr->instr, stderr);
4342 fprintf(stderr, "\n");
4343 abort();
4344 }
4345 }
4346
4347 static LLVMTypeRef
4348 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4349 enum glsl_base_type type)
4350 {
4351 switch (type) {
4352 case GLSL_TYPE_INT:
4353 case GLSL_TYPE_UINT:
4354 case GLSL_TYPE_BOOL:
4355 case GLSL_TYPE_SUBROUTINE:
4356 return ac->i32;
4357 case GLSL_TYPE_INT8:
4358 case GLSL_TYPE_UINT8:
4359 return ac->i8;
4360 case GLSL_TYPE_INT16:
4361 case GLSL_TYPE_UINT16:
4362 return ac->i16;
4363 case GLSL_TYPE_FLOAT:
4364 return ac->f32;
4365 case GLSL_TYPE_FLOAT16:
4366 return ac->f16;
4367 case GLSL_TYPE_INT64:
4368 case GLSL_TYPE_UINT64:
4369 return ac->i64;
4370 case GLSL_TYPE_DOUBLE:
4371 return ac->f64;
4372 default:
4373 unreachable("unknown GLSL type");
4374 }
4375 }
4376
4377 static LLVMTypeRef
4378 glsl_to_llvm_type(struct ac_llvm_context *ac,
4379 const struct glsl_type *type)
4380 {
4381 if (glsl_type_is_scalar(type)) {
4382 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4383 }
4384
4385 if (glsl_type_is_vector(type)) {
4386 return LLVMVectorType(
4387 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4388 glsl_get_vector_elements(type));
4389 }
4390
4391 if (glsl_type_is_matrix(type)) {
4392 return LLVMArrayType(
4393 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4394 glsl_get_matrix_columns(type));
4395 }
4396
4397 if (glsl_type_is_array(type)) {
4398 return LLVMArrayType(
4399 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4400 glsl_get_length(type));
4401 }
4402
4403 assert(glsl_type_is_struct_or_ifc(type));
4404
4405 LLVMTypeRef member_types[glsl_get_length(type)];
4406
4407 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4408 member_types[i] =
4409 glsl_to_llvm_type(ac,
4410 glsl_get_struct_field(type, i));
4411 }
4412
4413 return LLVMStructTypeInContext(ac->context, member_types,
4414 glsl_get_length(type), false);
4415 }
4416
4417 static void visit_deref(struct ac_nir_context *ctx,
4418 nir_deref_instr *instr)
4419 {
4420 if (instr->mode != nir_var_mem_shared &&
4421 instr->mode != nir_var_mem_global)
4422 return;
4423
4424 LLVMValueRef result = NULL;
4425 switch(instr->deref_type) {
4426 case nir_deref_type_var: {
4427 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4428 result = entry->data;
4429 break;
4430 }
4431 case nir_deref_type_struct:
4432 if (instr->mode == nir_var_mem_global) {
4433 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4434 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4435 instr->strct.index);
4436 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4437 LLVMConstInt(ctx->ac.i32, offset, 0));
4438 } else {
4439 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4440 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4441 }
4442 break;
4443 case nir_deref_type_array:
4444 if (instr->mode == nir_var_mem_global) {
4445 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4446 unsigned stride = glsl_get_explicit_stride(parent->type);
4447
4448 if ((glsl_type_is_matrix(parent->type) &&
4449 glsl_matrix_type_is_row_major(parent->type)) ||
4450 (glsl_type_is_vector(parent->type) && stride == 0))
4451 stride = type_scalar_size_bytes(parent->type);
4452
4453 assert(stride > 0);
4454 LLVMValueRef index = get_src(ctx, instr->arr.index);
4455 if (LLVMTypeOf(index) != ctx->ac.i64)
4456 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4457
4458 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4459
4460 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4461 } else {
4462 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4463 get_src(ctx, instr->arr.index));
4464 }
4465 break;
4466 case nir_deref_type_ptr_as_array:
4467 if (instr->mode == nir_var_mem_global) {
4468 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4469
4470 LLVMValueRef index = get_src(ctx, instr->arr.index);
4471 if (LLVMTypeOf(index) != ctx->ac.i64)
4472 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4473
4474 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4475
4476 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4477 } else {
4478 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4479 get_src(ctx, instr->arr.index));
4480 }
4481 break;
4482 case nir_deref_type_cast: {
4483 result = get_src(ctx, instr->parent);
4484
4485 /* We can't use the structs from LLVM because the shader
4486 * specifies its own offsets. */
4487 LLVMTypeRef pointee_type = ctx->ac.i8;
4488 if (instr->mode == nir_var_mem_shared)
4489 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4490
4491 unsigned address_space;
4492
4493 switch(instr->mode) {
4494 case nir_var_mem_shared:
4495 address_space = AC_ADDR_SPACE_LDS;
4496 break;
4497 case nir_var_mem_global:
4498 address_space = AC_ADDR_SPACE_GLOBAL;
4499 break;
4500 default:
4501 unreachable("Unhandled address space");
4502 }
4503
4504 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4505
4506 if (LLVMTypeOf(result) != type) {
4507 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4508 result = LLVMBuildBitCast(ctx->ac.builder, result,
4509 type, "");
4510 } else {
4511 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4512 type, "");
4513 }
4514 }
4515 break;
4516 }
4517 default:
4518 unreachable("Unhandled deref_instr deref type");
4519 }
4520
4521 ctx->ssa_defs[instr->dest.ssa.index] = result;
4522 }
4523
4524 static void visit_cf_list(struct ac_nir_context *ctx,
4525 struct exec_list *list);
4526
4527 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4528 {
4529 nir_foreach_instr(instr, block)
4530 {
4531 switch (instr->type) {
4532 case nir_instr_type_alu:
4533 visit_alu(ctx, nir_instr_as_alu(instr));
4534 break;
4535 case nir_instr_type_load_const:
4536 visit_load_const(ctx, nir_instr_as_load_const(instr));
4537 break;
4538 case nir_instr_type_intrinsic:
4539 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4540 break;
4541 case nir_instr_type_tex:
4542 visit_tex(ctx, nir_instr_as_tex(instr));
4543 break;
4544 case nir_instr_type_phi:
4545 visit_phi(ctx, nir_instr_as_phi(instr));
4546 break;
4547 case nir_instr_type_ssa_undef:
4548 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4549 break;
4550 case nir_instr_type_jump:
4551 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4552 break;
4553 case nir_instr_type_deref:
4554 visit_deref(ctx, nir_instr_as_deref(instr));
4555 break;
4556 default:
4557 fprintf(stderr, "Unknown NIR instr type: ");
4558 nir_print_instr(instr, stderr);
4559 fprintf(stderr, "\n");
4560 abort();
4561 }
4562 }
4563
4564 _mesa_hash_table_insert(ctx->defs, block,
4565 LLVMGetInsertBlock(ctx->ac.builder));
4566 }
4567
4568 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4569 {
4570 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4571
4572 nir_block *then_block =
4573 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4574
4575 ac_build_uif(&ctx->ac, value, then_block->index);
4576
4577 visit_cf_list(ctx, &if_stmt->then_list);
4578
4579 if (!exec_list_is_empty(&if_stmt->else_list)) {
4580 nir_block *else_block =
4581 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4582
4583 ac_build_else(&ctx->ac, else_block->index);
4584 visit_cf_list(ctx, &if_stmt->else_list);
4585 }
4586
4587 ac_build_endif(&ctx->ac, then_block->index);
4588 }
4589
4590 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4591 {
4592 nir_block *first_loop_block =
4593 (nir_block *) exec_list_get_head(&loop->body);
4594
4595 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4596
4597 visit_cf_list(ctx, &loop->body);
4598
4599 ac_build_endloop(&ctx->ac, first_loop_block->index);
4600 }
4601
4602 static void visit_cf_list(struct ac_nir_context *ctx,
4603 struct exec_list *list)
4604 {
4605 foreach_list_typed(nir_cf_node, node, node, list)
4606 {
4607 switch (node->type) {
4608 case nir_cf_node_block:
4609 visit_block(ctx, nir_cf_node_as_block(node));
4610 break;
4611
4612 case nir_cf_node_if:
4613 visit_if(ctx, nir_cf_node_as_if(node));
4614 break;
4615
4616 case nir_cf_node_loop:
4617 visit_loop(ctx, nir_cf_node_as_loop(node));
4618 break;
4619
4620 default:
4621 assert(0);
4622 }
4623 }
4624 }
4625
4626 void
4627 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4628 struct ac_shader_abi *abi,
4629 struct nir_shader *nir,
4630 struct nir_variable *variable,
4631 gl_shader_stage stage)
4632 {
4633 unsigned output_loc = variable->data.driver_location / 4;
4634 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4635
4636 /* tess ctrl has it's own load/store paths for outputs */
4637 if (stage == MESA_SHADER_TESS_CTRL)
4638 return;
4639
4640 if (stage == MESA_SHADER_VERTEX ||
4641 stage == MESA_SHADER_TESS_EVAL ||
4642 stage == MESA_SHADER_GEOMETRY) {
4643 int idx = variable->data.location + variable->data.index;
4644 if (idx == VARYING_SLOT_CLIP_DIST0) {
4645 int length = nir->info.clip_distance_array_size +
4646 nir->info.cull_distance_array_size;
4647
4648 if (length > 4)
4649 attrib_count = 2;
4650 else
4651 attrib_count = 1;
4652 }
4653 }
4654
4655 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4656 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4657 for (unsigned i = 0; i < attrib_count; ++i) {
4658 for (unsigned chan = 0; chan < 4; chan++) {
4659 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4660 ac_build_alloca_undef(ctx, type, "");
4661 }
4662 }
4663 }
4664
4665 static void
4666 setup_locals(struct ac_nir_context *ctx,
4667 struct nir_function *func)
4668 {
4669 int i, j;
4670 ctx->num_locals = 0;
4671 nir_foreach_variable(variable, &func->impl->locals) {
4672 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4673 variable->data.driver_location = ctx->num_locals * 4;
4674 variable->data.location_frac = 0;
4675 ctx->num_locals += attrib_count;
4676 }
4677 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4678 if (!ctx->locals)
4679 return;
4680
4681 for (i = 0; i < ctx->num_locals; i++) {
4682 for (j = 0; j < 4; j++) {
4683 ctx->locals[i * 4 + j] =
4684 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4685 }
4686 }
4687 }
4688
4689 static void
4690 setup_scratch(struct ac_nir_context *ctx,
4691 struct nir_shader *shader)
4692 {
4693 if (shader->scratch_size == 0)
4694 return;
4695
4696 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
4697 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
4698 "scratch");
4699 }
4700
4701 static void
4702 setup_constant_data(struct ac_nir_context *ctx,
4703 struct nir_shader *shader)
4704 {
4705 if (!shader->constant_data)
4706 return;
4707
4708 LLVMValueRef data =
4709 LLVMConstStringInContext(ctx->ac.context,
4710 shader->constant_data,
4711 shader->constant_data_size,
4712 true);
4713 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
4714
4715 /* We want to put the constant data in the CONST address space so that
4716 * we can use scalar loads. However, LLVM versions before 10 put these
4717 * variables in the same section as the code, which is unacceptable
4718 * for RadeonSI as it needs to relocate all the data sections after
4719 * the code sections. See https://reviews.llvm.org/D65813.
4720 */
4721 unsigned address_space =
4722 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
4723
4724 LLVMValueRef global =
4725 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
4726 "const_data",
4727 address_space);
4728
4729 LLVMSetInitializer(global, data);
4730 LLVMSetGlobalConstant(global, true);
4731 LLVMSetVisibility(global, LLVMHiddenVisibility);
4732 ctx->constant_data = global;
4733 }
4734
4735 static void
4736 setup_shared(struct ac_nir_context *ctx,
4737 struct nir_shader *nir)
4738 {
4739 nir_foreach_variable(variable, &nir->shared) {
4740 LLVMValueRef shared =
4741 LLVMAddGlobalInAddressSpace(
4742 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4743 variable->name ? variable->name : "",
4744 AC_ADDR_SPACE_LDS);
4745 _mesa_hash_table_insert(ctx->vars, variable, shared);
4746 }
4747 }
4748
4749 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4750 const struct ac_shader_args *args, struct nir_shader *nir)
4751 {
4752 struct ac_nir_context ctx = {};
4753 struct nir_function *func;
4754
4755 ctx.ac = *ac;
4756 ctx.abi = abi;
4757 ctx.args = args;
4758
4759 ctx.stage = nir->info.stage;
4760 ctx.info = &nir->info;
4761
4762 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4763
4764 nir_foreach_variable(variable, &nir->outputs)
4765 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4766 ctx.stage);
4767
4768 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4769 _mesa_key_pointer_equal);
4770 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4771 _mesa_key_pointer_equal);
4772 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4773 _mesa_key_pointer_equal);
4774
4775 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4776
4777 nir_index_ssa_defs(func->impl);
4778 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4779
4780 setup_locals(&ctx, func);
4781 setup_scratch(&ctx, nir);
4782 setup_constant_data(&ctx, nir);
4783
4784 if (gl_shader_stage_is_compute(nir->info.stage))
4785 setup_shared(&ctx, nir);
4786
4787 visit_cf_list(&ctx, &func->impl->body);
4788 phi_post_pass(&ctx);
4789
4790 if (!gl_shader_stage_is_compute(nir->info.stage))
4791 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4792 ctx.abi->outputs);
4793
4794 free(ctx.locals);
4795 free(ctx.ssa_defs);
4796 ralloc_free(ctx.defs);
4797 ralloc_free(ctx.phis);
4798 ralloc_free(ctx.vars);
4799 }
4800
4801 bool
4802 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4803 {
4804 bool progress = false;
4805
4806 /* Lower large variables to scratch first so that we won't bloat the
4807 * shader by generating large if ladders for them. We later lower
4808 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
4809 */
4810 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
4811 nir_var_function_temp,
4812 256,
4813 glsl_get_natural_size_align_bytes);
4814
4815 /* While it would be nice not to have this flag, we are constrained
4816 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
4817 */
4818 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
4819
4820 /* TODO: Indirect indexing of GS inputs is unimplemented.
4821 *
4822 * TCS and TES load inputs directly from LDS or offchip memory, so
4823 * indirect indexing is trivial.
4824 */
4825 nir_variable_mode indirect_mask = 0;
4826 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4827 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4828 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4829 !llvm_has_working_vgpr_indexing)) {
4830 indirect_mask |= nir_var_shader_in;
4831 }
4832 if (!llvm_has_working_vgpr_indexing &&
4833 nir->info.stage != MESA_SHADER_TESS_CTRL)
4834 indirect_mask |= nir_var_shader_out;
4835
4836 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4837 * smart enough to handle indirects without causing excess spilling
4838 * causing the gpu to hang.
4839 *
4840 * See the following thread for more details of the problem:
4841 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4842 */
4843 indirect_mask |= nir_var_function_temp;
4844
4845 progress |= nir_lower_indirect_derefs(nir, indirect_mask);
4846 return progress;
4847 }
4848
4849 static unsigned
4850 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4851 {
4852 if (intrin->intrinsic != nir_intrinsic_store_deref)
4853 return 0;
4854
4855 nir_variable *var =
4856 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4857
4858 if (var->data.mode != nir_var_shader_out)
4859 return 0;
4860
4861 unsigned writemask = 0;
4862 const int location = var->data.location;
4863 unsigned first_component = var->data.location_frac;
4864 unsigned num_comps = intrin->dest.ssa.num_components;
4865
4866 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4867 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4868 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4869 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4870
4871 return writemask;
4872 }
4873
4874 static void
4875 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4876 unsigned *cond_block_tf_writemask,
4877 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4878 {
4879 switch (cf_node->type) {
4880 case nir_cf_node_block: {
4881 nir_block *block = nir_cf_node_as_block(cf_node);
4882 nir_foreach_instr(instr, block) {
4883 if (instr->type != nir_instr_type_intrinsic)
4884 continue;
4885
4886 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4887 if (intrin->intrinsic == nir_intrinsic_barrier) {
4888
4889 /* If we find a barrier in nested control flow put this in the
4890 * too hard basket. In GLSL this is not possible but it is in
4891 * SPIR-V.
4892 */
4893 if (is_nested_cf) {
4894 *tessfactors_are_def_in_all_invocs = false;
4895 return;
4896 }
4897
4898 /* The following case must be prevented:
4899 * gl_TessLevelInner = ...;
4900 * barrier();
4901 * if (gl_InvocationID == 1)
4902 * gl_TessLevelInner = ...;
4903 *
4904 * If you consider disjoint code segments separated by barriers, each
4905 * such segment that writes tess factor channels should write the same
4906 * channels in all codepaths within that segment.
4907 */
4908 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4909 /* Accumulate the result: */
4910 *tessfactors_are_def_in_all_invocs &=
4911 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4912
4913 /* Analyze the next code segment from scratch. */
4914 *upper_block_tf_writemask = 0;
4915 *cond_block_tf_writemask = 0;
4916 }
4917 } else
4918 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4919 }
4920
4921 break;
4922 }
4923 case nir_cf_node_if: {
4924 unsigned then_tessfactor_writemask = 0;
4925 unsigned else_tessfactor_writemask = 0;
4926
4927 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4928 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4929 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4930 cond_block_tf_writemask,
4931 tessfactors_are_def_in_all_invocs, true);
4932 }
4933
4934 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4935 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4936 cond_block_tf_writemask,
4937 tessfactors_are_def_in_all_invocs, true);
4938 }
4939
4940 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4941 /* If both statements write the same tess factor channels,
4942 * we can say that the upper block writes them too.
4943 */
4944 *upper_block_tf_writemask |= then_tessfactor_writemask &
4945 else_tessfactor_writemask;
4946 *cond_block_tf_writemask |= then_tessfactor_writemask |
4947 else_tessfactor_writemask;
4948 }
4949
4950 break;
4951 }
4952 case nir_cf_node_loop: {
4953 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4954 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4955 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4956 cond_block_tf_writemask,
4957 tessfactors_are_def_in_all_invocs, true);
4958 }
4959
4960 break;
4961 }
4962 default:
4963 unreachable("unknown cf node type");
4964 }
4965 }
4966
4967 bool
4968 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4969 {
4970 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4971
4972 /* The pass works as follows:
4973 * If all codepaths write tess factors, we can say that all
4974 * invocations define tess factors.
4975 *
4976 * Each tess factor channel is tracked separately.
4977 */
4978 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4979 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4980
4981 /* Initial value = true. Here the pass will accumulate results from
4982 * multiple segments surrounded by barriers. If tess factors aren't
4983 * written at all, it's a shader bug and we don't care if this will be
4984 * true.
4985 */
4986 bool tessfactors_are_def_in_all_invocs = true;
4987
4988 nir_foreach_function(function, nir) {
4989 if (function->impl) {
4990 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4991 scan_tess_ctrl(node, &main_block_tf_writemask,
4992 &cond_block_tf_writemask,
4993 &tessfactors_are_def_in_all_invocs,
4994 false);
4995 }
4996 }
4997 }
4998
4999 /* Accumulate the result for the last code segment separated by a
5000 * barrier.
5001 */
5002 if (main_block_tf_writemask || cond_block_tf_writemask) {
5003 tessfactors_are_def_in_all_invocs &=
5004 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5005 }
5006
5007 return tessfactors_are_def_in_all_invocs;
5008 }