radv: Track scratch usage across pipelines & command buffers.
[mesa.git] / src / amd / vulkan / radv_descriptor_set.h
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef RADV_DESCRIPTOR_SET_H
25 #define RADV_DESCRIPTOR_SET_H
26
27 #include <vulkan/vulkan.h>
28
29 #define MAX_SETS 8
30
31 struct radv_descriptor_set_binding_layout {
32 VkDescriptorType type;
33
34 /* Number of array elements in this binding */
35 uint16_t array_size;
36
37 uint16_t offset;
38 uint16_t buffer_offset;
39 uint16_t dynamic_offset_offset;
40
41 /* redundant with the type, each for a single array element */
42 uint16_t size;
43 uint16_t buffer_count;
44 uint16_t dynamic_offset_count;
45
46 /* Immutable samplers (or NULL if no immutable samplers) */
47 struct radv_sampler **immutable_samplers;
48 };
49
50 struct radv_descriptor_set_layout {
51 /* Number of bindings in this descriptor set */
52 uint16_t binding_count;
53
54 /* Total size of the descriptor set with room for all array entries */
55 uint16_t size;
56
57 /* Shader stages affected by this descriptor set */
58 uint16_t shader_stages;
59 uint16_t dynamic_shader_stages;
60
61 /* Number of buffers in this descriptor set */
62 uint16_t buffer_count;
63
64 /* Number of dynamic offsets used by this descriptor set */
65 uint16_t dynamic_offset_count;
66
67 /* Bindings in this descriptor set */
68 struct radv_descriptor_set_binding_layout binding[0];
69 };
70
71 struct radv_pipeline_layout {
72 struct {
73 struct radv_descriptor_set_layout *layout;
74 uint32_t size;
75 uint32_t dynamic_offset_start;
76 } set[MAX_SETS];
77
78 uint32_t num_sets;
79 uint32_t push_constant_size;
80 uint32_t dynamic_offset_count;
81
82 unsigned char sha1[20];
83 };
84
85 #endif /* RADV_DESCRIPTOR_SET_H */