projects / mesa.git / blob
? search:


99c56a46dab24d2cf093e8302a0363e521eb7af8
[mesa.git] / src / amd / vulkan / radv_device.c
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 * IN THE SOFTWARE.
26 */
27
28 #include <dlfcn.h>
29 #include <stdbool.h>
30 #include <string.h>
31 #include <unistd.h>
32 #include <fcntl.h>
33 #include <sys/stat.h>
34 #include "radv_private.h"
35 #include "util/strtod.h"
36
37 #include <xf86drm.h>
38 #include <amdgpu.h>
39 #include <amdgpu_drm.h>
40 #include "amdgpu_id.h"
41 #include "winsys/amdgpu/radv_amdgpu_winsys_public.h"
42 #include "ac_llvm_util.h"
43 #include "vk_format.h"
44 #include "sid.h"
45 #include "util/debug.h"
46 struct radv_dispatch_table dtable;
47
48 static int
49 radv_get_function_timestamp(void *ptr, uint32_t* timestamp)
50 {
51 Dl_info info;
52 struct stat st;
53 if (!dladdr(ptr, &info) || !info.dli_fname) {
54 return -1;
55 }
56 if (stat(info.dli_fname, &st)) {
57 return -1;
58 }
59 *timestamp = st.st_mtim.tv_sec;
60 return 0;
61 }
62
63 static int
64 radv_device_get_cache_uuid(enum radeon_family family, void *uuid)
65 {
66 uint32_t mesa_timestamp, llvm_timestamp;
67 uint16_t f = family;
68 memset(uuid, 0, VK_UUID_SIZE);
69 if (radv_get_function_timestamp(radv_device_get_cache_uuid, &mesa_timestamp) ||
70 radv_get_function_timestamp(LLVMInitializeAMDGPUTargetInfo, &llvm_timestamp))
71 return -1;
72
73 memcpy(uuid, &mesa_timestamp, 4);
74 memcpy((char*)uuid + 4, &llvm_timestamp, 4);
75 memcpy((char*)uuid + 8, &f, 2);
76 snprintf((char*)uuid + 10, VK_UUID_SIZE - 10, "radv");
77 return 0;
78 }
79
80 static VkResult
81 radv_physical_device_init(struct radv_physical_device *device,
82 struct radv_instance *instance,
83 const char *path)
84 {
85 VkResult result;
86 drmVersionPtr version;
87 int fd;
88
89 fd = open(path, O_RDWR | O_CLOEXEC);
90 if (fd < 0)
91 return vk_errorf(VK_ERROR_INCOMPATIBLE_DRIVER,
92 "failed to open %s: %m", path);
93
94 version = drmGetVersion(fd);
95 if (!version) {
96 close(fd);
97 return vk_errorf(VK_ERROR_INCOMPATIBLE_DRIVER,
98 "failed to get version %s: %m", path);
99 }
100
101 if (strcmp(version->name, "amdgpu")) {
102 drmFreeVersion(version);
103 close(fd);
104 return VK_ERROR_INCOMPATIBLE_DRIVER;
105 }
106 drmFreeVersion(version);
107
108 device->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
109 device->instance = instance;
110 assert(strlen(path) < ARRAY_SIZE(device->path));
111 strncpy(device->path, path, ARRAY_SIZE(device->path));
112
113 device->ws = radv_amdgpu_winsys_create(fd);
114 if (!device->ws) {
115 result = VK_ERROR_INCOMPATIBLE_DRIVER;
116 goto fail;
117 }
118 device->ws->query_info(device->ws, &device->rad_info);
119 result = radv_init_wsi(device);
120 if (result != VK_SUCCESS) {
121 device->ws->destroy(device->ws);
122 goto fail;
123 }
124
125 if (radv_device_get_cache_uuid(device->rad_info.family, device->uuid)) {
126 radv_finish_wsi(device);
127 device->ws->destroy(device->ws);
128 result = vk_errorf(VK_ERROR_INITIALIZATION_FAILED,
129 "cannot generate UUID");
130 goto fail;
131 }
132
133 fprintf(stderr, "WARNING: radv is not a conformant vulkan implementation, testing use only.\n");
134 device->name = device->rad_info.name;
135 close(fd);
136 return VK_SUCCESS;
137
138 fail:
139 close(fd);
140 return result;
141 }
142
143 static void
144 radv_physical_device_finish(struct radv_physical_device *device)
145 {
146 radv_finish_wsi(device);
147 device->ws->destroy(device->ws);
148 }
149
150 static const VkExtensionProperties global_extensions[] = {
151 {
152 .extensionName = VK_KHR_SURFACE_EXTENSION_NAME,
153 .specVersion = 25,
154 },
155 #ifdef VK_USE_PLATFORM_XCB_KHR
156 {
157 .extensionName = VK_KHR_XCB_SURFACE_EXTENSION_NAME,
158 .specVersion = 6,
159 },
160 #endif
161 #ifdef VK_USE_PLATFORM_XLIB_KHR
162 {
163 .extensionName = VK_KHR_XLIB_SURFACE_EXTENSION_NAME,
164 .specVersion = 6,
165 },
166 #endif
167 #ifdef VK_USE_PLATFORM_WAYLAND_KHR
168 {
169 .extensionName = VK_KHR_WAYLAND_SURFACE_EXTENSION_NAME,
170 .specVersion = 5,
171 },
172 #endif
173 };
174
175 static const VkExtensionProperties device_extensions[] = {
176 {
177 .extensionName = VK_KHR_SAMPLER_MIRROR_CLAMP_TO_EDGE_EXTENSION_NAME,
178 .specVersion = 1,
179 },
180 {
181 .extensionName = VK_KHR_SWAPCHAIN_EXTENSION_NAME,
182 .specVersion = 68,
183 },
184 {
185 .extensionName = VK_AMD_DRAW_INDIRECT_COUNT_EXTENSION_NAME,
186 .specVersion = 1,
187 },
188 {
189 .extensionName = VK_AMD_NEGATIVE_VIEWPORT_HEIGHT_EXTENSION_NAME,
190 .specVersion = 1,
191 },
192 };
193
194 static void *
195 default_alloc_func(void *pUserData, size_t size, size_t align,
196 VkSystemAllocationScope allocationScope)
197 {
198 return malloc(size);
199 }
200
201 static void *
202 default_realloc_func(void *pUserData, void *pOriginal, size_t size,
203 size_t align, VkSystemAllocationScope allocationScope)
204 {
205 return realloc(pOriginal, size);
206 }
207
208 static void
209 default_free_func(void *pUserData, void *pMemory)
210 {
211 free(pMemory);
212 }
213
214 static const VkAllocationCallbacks default_alloc = {
215 .pUserData = NULL,
216 .pfnAllocation = default_alloc_func,
217 .pfnReallocation = default_realloc_func,
218 .pfnFree = default_free_func,
219 };
220
221 static const struct debug_control radv_debug_options[] = {
222 {"fastclears", RADV_DEBUG_FAST_CLEARS},
223 {"nodcc", RADV_DEBUG_NO_DCC},
224 {"shaders", RADV_DEBUG_DUMP_SHADERS},
225 {"nocache", RADV_DEBUG_NO_CACHE},
226 {"shaderstats", RADV_DEBUG_DUMP_SHADER_STATS},
227 {"nohiz", RADV_DEBUG_NO_HIZ},
228 {"nocompute", RADV_DEBUG_NO_COMPUTE_QUEUE},
229 {"unsafemath", RADV_DEBUG_UNSAFE_MATH},
230 {NULL, 0}
231 };
232
233 VkResult radv_CreateInstance(
234 const VkInstanceCreateInfo* pCreateInfo,
235 const VkAllocationCallbacks* pAllocator,
236 VkInstance* pInstance)
237 {
238 struct radv_instance *instance;
239
240 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO);
241
242 uint32_t client_version;
243 if (pCreateInfo->pApplicationInfo &&
244 pCreateInfo->pApplicationInfo->apiVersion != 0) {
245 client_version = pCreateInfo->pApplicationInfo->apiVersion;
246 } else {
247 client_version = VK_MAKE_VERSION(1, 0, 0);
248 }
249
250 if (VK_MAKE_VERSION(1, 0, 0) > client_version ||
251 client_version > VK_MAKE_VERSION(1, 0, 0xfff)) {
252 return vk_errorf(VK_ERROR_INCOMPATIBLE_DRIVER,
253 "Client requested version %d.%d.%d",
254 VK_VERSION_MAJOR(client_version),
255 VK_VERSION_MINOR(client_version),
256 VK_VERSION_PATCH(client_version));
257 }
258
259 for (uint32_t i = 0; i < pCreateInfo->enabledExtensionCount; i++) {
260 bool found = false;
261 for (uint32_t j = 0; j < ARRAY_SIZE(global_extensions); j++) {
262 if (strcmp(pCreateInfo->ppEnabledExtensionNames[i],
263 global_extensions[j].extensionName) == 0) {
264 found = true;
265 break;
266 }
267 }
268 if (!found)
269 return vk_error(VK_ERROR_EXTENSION_NOT_PRESENT);
270 }
271
272 instance = vk_alloc2(&default_alloc, pAllocator, sizeof(*instance), 8,
273 VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE);
274 if (!instance)
275 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
276
277 instance->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
278
279 if (pAllocator)
280 instance->alloc = *pAllocator;
281 else
282 instance->alloc = default_alloc;
283
284 instance->apiVersion = client_version;
285 instance->physicalDeviceCount = -1;
286
287 _mesa_locale_init();
288
289 VG(VALGRIND_CREATE_MEMPOOL(instance, 0, false));
290
291 instance->debug_flags = parse_debug_string(getenv("RADV_DEBUG"),
292 radv_debug_options);
293
294 *pInstance = radv_instance_to_handle(instance);
295
296 return VK_SUCCESS;
297 }
298
299 void radv_DestroyInstance(
300 VkInstance _instance,
301 const VkAllocationCallbacks* pAllocator)
302 {
303 RADV_FROM_HANDLE(radv_instance, instance, _instance);
304
305 if (instance->physicalDeviceCount > 0) {
306 /* We support at most one physical device. */
307 assert(instance->physicalDeviceCount == 1);
308 radv_physical_device_finish(&instance->physicalDevice);
309 }
310
311 VG(VALGRIND_DESTROY_MEMPOOL(instance));
312
313 _mesa_locale_fini();
314
315 vk_free(&instance->alloc, instance);
316 }
317
318 VkResult radv_EnumeratePhysicalDevices(
319 VkInstance _instance,
320 uint32_t* pPhysicalDeviceCount,
321 VkPhysicalDevice* pPhysicalDevices)
322 {
323 RADV_FROM_HANDLE(radv_instance, instance, _instance);
324 VkResult result;
325
326 if (instance->physicalDeviceCount < 0) {
327 char path[20];
328 for (unsigned i = 0; i < 8; i++) {
329 snprintf(path, sizeof(path), "/dev/dri/renderD%d", 128 + i);
330 result = radv_physical_device_init(&instance->physicalDevice,
331 instance, path);
332 if (result != VK_ERROR_INCOMPATIBLE_DRIVER)
333 break;
334 }
335
336 if (result == VK_ERROR_INCOMPATIBLE_DRIVER) {
337 instance->physicalDeviceCount = 0;
338 } else if (result == VK_SUCCESS) {
339 instance->physicalDeviceCount = 1;
340 } else {
341 return result;
342 }
343 }
344
345 /* pPhysicalDeviceCount is an out parameter if pPhysicalDevices is NULL;
346 * otherwise it's an inout parameter.
347 *
348 * The Vulkan spec (git aaed022) says:
349 *
350 * pPhysicalDeviceCount is a pointer to an unsigned integer variable
351 * that is initialized with the number of devices the application is
352 * prepared to receive handles to. pname:pPhysicalDevices is pointer to
353 * an array of at least this many VkPhysicalDevice handles [...].
354 *
355 * Upon success, if pPhysicalDevices is NULL, vkEnumeratePhysicalDevices
356 * overwrites the contents of the variable pointed to by
357 * pPhysicalDeviceCount with the number of physical devices in in the
358 * instance; otherwise, vkEnumeratePhysicalDevices overwrites
359 * pPhysicalDeviceCount with the number of physical handles written to
360 * pPhysicalDevices.
361 */
362 if (!pPhysicalDevices) {
363 *pPhysicalDeviceCount = instance->physicalDeviceCount;
364 } else if (*pPhysicalDeviceCount >= 1) {
365 pPhysicalDevices[0] = radv_physical_device_to_handle(&instance->physicalDevice);
366 *pPhysicalDeviceCount = 1;
367 } else if (*pPhysicalDeviceCount < instance->physicalDeviceCount) {
368 return VK_INCOMPLETE;
369 } else {
370 *pPhysicalDeviceCount = 0;
371 }
372
373 return VK_SUCCESS;
374 }
375
376 void radv_GetPhysicalDeviceFeatures(
377 VkPhysicalDevice physicalDevice,
378 VkPhysicalDeviceFeatures* pFeatures)
379 {
380 // RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
381
382 memset(pFeatures, 0, sizeof(*pFeatures));
383
384 *pFeatures = (VkPhysicalDeviceFeatures) {
385 .robustBufferAccess = true,
386 .fullDrawIndexUint32 = true,
387 .imageCubeArray = true,
388 .independentBlend = true,
389 .geometryShader = false,
390 .tessellationShader = false,
391 .sampleRateShading = false,
392 .dualSrcBlend = true,
393 .logicOp = true,
394 .multiDrawIndirect = true,
395 .drawIndirectFirstInstance = true,
396 .depthClamp = true,
397 .depthBiasClamp = true,
398 .fillModeNonSolid = true,
399 .depthBounds = true,
400 .wideLines = true,
401 .largePoints = true,
402 .alphaToOne = true,
403 .multiViewport = false,
404 .samplerAnisotropy = true,
405 .textureCompressionETC2 = false,
406 .textureCompressionASTC_LDR = false,
407 .textureCompressionBC = true,
408 .occlusionQueryPrecise = true,
409 .pipelineStatisticsQuery = false,
410 .vertexPipelineStoresAndAtomics = true,
411 .fragmentStoresAndAtomics = true,
412 .shaderTessellationAndGeometryPointSize = true,
413 .shaderImageGatherExtended = true,
414 .shaderStorageImageExtendedFormats = true,
415 .shaderStorageImageMultisample = false,
416 .shaderUniformBufferArrayDynamicIndexing = true,
417 .shaderSampledImageArrayDynamicIndexing = true,
418 .shaderStorageBufferArrayDynamicIndexing = true,
419 .shaderStorageImageArrayDynamicIndexing = true,
420 .shaderStorageImageReadWithoutFormat = false,
421 .shaderStorageImageWriteWithoutFormat = false,
422 .shaderClipDistance = true,
423 .shaderCullDistance = true,
424 .shaderFloat64 = false,
425 .shaderInt64 = false,
426 .shaderInt16 = false,
427 .alphaToOne = true,
428 .variableMultisampleRate = false,
429 .inheritedQueries = false,
430 };
431 }
432
433 void radv_GetPhysicalDeviceProperties(
434 VkPhysicalDevice physicalDevice,
435 VkPhysicalDeviceProperties* pProperties)
436 {
437 RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
438 VkSampleCountFlags sample_counts = 0xf;
439 VkPhysicalDeviceLimits limits = {
440 .maxImageDimension1D = (1 << 14),
441 .maxImageDimension2D = (1 << 14),
442 .maxImageDimension3D = (1 << 11),
443 .maxImageDimensionCube = (1 << 14),
444 .maxImageArrayLayers = (1 << 11),
445 .maxTexelBufferElements = 128 * 1024 * 1024,
446 .maxUniformBufferRange = UINT32_MAX,
447 .maxStorageBufferRange = UINT32_MAX,
448 .maxPushConstantsSize = MAX_PUSH_CONSTANTS_SIZE,
449 .maxMemoryAllocationCount = UINT32_MAX,
450 .maxSamplerAllocationCount = 64 * 1024,
451 .bufferImageGranularity = 64, /* A cache line */
452 .sparseAddressSpaceSize = 0,
453 .maxBoundDescriptorSets = MAX_SETS,
454 .maxPerStageDescriptorSamplers = 64,
455 .maxPerStageDescriptorUniformBuffers = 64,
456 .maxPerStageDescriptorStorageBuffers = 64,
457 .maxPerStageDescriptorSampledImages = 64,
458 .maxPerStageDescriptorStorageImages = 64,
459 .maxPerStageDescriptorInputAttachments = 64,
460 .maxPerStageResources = 128,
461 .maxDescriptorSetSamplers = 256,
462 .maxDescriptorSetUniformBuffers = 256,
463 .maxDescriptorSetUniformBuffersDynamic = 256,
464 .maxDescriptorSetStorageBuffers = 256,
465 .maxDescriptorSetStorageBuffersDynamic = 256,
466 .maxDescriptorSetSampledImages = 256,
467 .maxDescriptorSetStorageImages = 256,
468 .maxDescriptorSetInputAttachments = 256,
469 .maxVertexInputAttributes = 32,
470 .maxVertexInputBindings = 32,
471 .maxVertexInputAttributeOffset = 2047,
472 .maxVertexInputBindingStride = 2048,
473 .maxVertexOutputComponents = 128,
474 .maxTessellationGenerationLevel = 0,
475 .maxTessellationPatchSize = 0,
476 .maxTessellationControlPerVertexInputComponents = 0,
477 .maxTessellationControlPerVertexOutputComponents = 0,
478 .maxTessellationControlPerPatchOutputComponents = 0,
479 .maxTessellationControlTotalOutputComponents = 0,
480 .maxTessellationEvaluationInputComponents = 0,
481 .maxTessellationEvaluationOutputComponents = 0,
482 .maxGeometryShaderInvocations = 32,
483 .maxGeometryInputComponents = 64,
484 .maxGeometryOutputComponents = 128,
485 .maxGeometryOutputVertices = 256,
486 .maxGeometryTotalOutputComponents = 1024,
487 .maxFragmentInputComponents = 128,
488 .maxFragmentOutputAttachments = 8,
489 .maxFragmentDualSrcAttachments = 1,
490 .maxFragmentCombinedOutputResources = 8,
491 .maxComputeSharedMemorySize = 32768,
492 .maxComputeWorkGroupCount = { 65535, 65535, 65535 },
493 .maxComputeWorkGroupInvocations = 2048,
494 .maxComputeWorkGroupSize = {
495 2048,
496 2048,
497 2048
498 },
499 .subPixelPrecisionBits = 4 /* FIXME */,
500 .subTexelPrecisionBits = 4 /* FIXME */,
501 .mipmapPrecisionBits = 4 /* FIXME */,
502 .maxDrawIndexedIndexValue = UINT32_MAX,
503 .maxDrawIndirectCount = UINT32_MAX,
504 .maxSamplerLodBias = 16,
505 .maxSamplerAnisotropy = 16,
506 .maxViewports = MAX_VIEWPORTS,
507 .maxViewportDimensions = { (1 << 14), (1 << 14) },
508 .viewportBoundsRange = { INT16_MIN, INT16_MAX },
509 .viewportSubPixelBits = 13, /* We take a float? */
510 .minMemoryMapAlignment = 4096, /* A page */
511 .minTexelBufferOffsetAlignment = 1,
512 .minUniformBufferOffsetAlignment = 4,
513 .minStorageBufferOffsetAlignment = 4,
514 .minTexelOffset = -32,
515 .maxTexelOffset = 31,
516 .minTexelGatherOffset = -32,
517 .maxTexelGatherOffset = 31,
518 .minInterpolationOffset = -2,
519 .maxInterpolationOffset = 2,
520 .subPixelInterpolationOffsetBits = 8,
521 .maxFramebufferWidth = (1 << 14),
522 .maxFramebufferHeight = (1 << 14),
523 .maxFramebufferLayers = (1 << 10),
524 .framebufferColorSampleCounts = sample_counts,
525 .framebufferDepthSampleCounts = sample_counts,
526 .framebufferStencilSampleCounts = sample_counts,
527 .framebufferNoAttachmentsSampleCounts = sample_counts,
528 .maxColorAttachments = MAX_RTS,
529 .sampledImageColorSampleCounts = sample_counts,
530 .sampledImageIntegerSampleCounts = VK_SAMPLE_COUNT_1_BIT,
531 .sampledImageDepthSampleCounts = sample_counts,
532 .sampledImageStencilSampleCounts = sample_counts,
533 .storageImageSampleCounts = VK_SAMPLE_COUNT_1_BIT,
534 .maxSampleMaskWords = 1,
535 .timestampComputeAndGraphics = false,
536 .timestampPeriod = 100000.0 / pdevice->rad_info.clock_crystal_freq,
537 .maxClipDistances = 8,
538 .maxCullDistances = 8,
539 .maxCombinedClipAndCullDistances = 8,
540 .discreteQueuePriorities = 1,
541 .pointSizeRange = { 0.125, 255.875 },
542 .lineWidthRange = { 0.0, 7.9921875 },
543 .pointSizeGranularity = (1.0 / 8.0),
544 .lineWidthGranularity = (1.0 / 128.0),
545 .strictLines = false, /* FINISHME */
546 .standardSampleLocations = true,
547 .optimalBufferCopyOffsetAlignment = 128,
548 .optimalBufferCopyRowPitchAlignment = 128,
549 .nonCoherentAtomSize = 64,
550 };
551
552 *pProperties = (VkPhysicalDeviceProperties) {
553 .apiVersion = VK_MAKE_VERSION(1, 0, 5),
554 .driverVersion = 1,
555 .vendorID = 0x1002,
556 .deviceID = pdevice->rad_info.pci_id,
557 .deviceType = VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU,
558 .limits = limits,
559 .sparseProperties = {0}, /* Broadwell doesn't do sparse. */
560 };
561
562 strcpy(pProperties->deviceName, pdevice->name);
563 memcpy(pProperties->pipelineCacheUUID, pdevice->uuid, VK_UUID_SIZE);
564 }
565
566 void radv_GetPhysicalDeviceQueueFamilyProperties(
567 VkPhysicalDevice physicalDevice,
568 uint32_t* pCount,
569 VkQueueFamilyProperties* pQueueFamilyProperties)
570 {
571 RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
572 int num_queue_families = 1;
573 int idx;
574 if (pdevice->rad_info.compute_rings > 0 &&
575 pdevice->rad_info.chip_class >= CIK &&
576 !(pdevice->instance->debug_flags & RADV_DEBUG_NO_COMPUTE_QUEUE))
577 num_queue_families++;
578
579 if (pQueueFamilyProperties == NULL) {
580 *pCount = num_queue_families;
581 return;
582 }
583
584 if (!*pCount)
585 return;
586
587 idx = 0;
588 if (*pCount >= 1) {
589 pQueueFamilyProperties[idx] = (VkQueueFamilyProperties) {
590 .queueFlags = VK_QUEUE_GRAPHICS_BIT |
591 VK_QUEUE_COMPUTE_BIT |
592 VK_QUEUE_TRANSFER_BIT,
593 .queueCount = 1,
594 .timestampValidBits = 64,
595 .minImageTransferGranularity = (VkExtent3D) { 1, 1, 1 },
596 };
597 idx++;
598 }
599
600 if (pdevice->rad_info.compute_rings > 0 &&
601 pdevice->rad_info.chip_class >= CIK &&
602 !(pdevice->instance->debug_flags & RADV_DEBUG_NO_COMPUTE_QUEUE)) {
603 if (*pCount > idx) {
604 pQueueFamilyProperties[idx] = (VkQueueFamilyProperties) {
605 .queueFlags = VK_QUEUE_COMPUTE_BIT | VK_QUEUE_TRANSFER_BIT,
606 .queueCount = pdevice->rad_info.compute_rings,
607 .timestampValidBits = 64,
608 .minImageTransferGranularity = (VkExtent3D) { 1, 1, 1 },
609 };
610 idx++;
611 }
612 }
613 *pCount = idx;
614 }
615
616 void radv_GetPhysicalDeviceMemoryProperties(
617 VkPhysicalDevice physicalDevice,
618 VkPhysicalDeviceMemoryProperties* pMemoryProperties)
619 {
620 RADV_FROM_HANDLE(radv_physical_device, physical_device, physicalDevice);
621
622 STATIC_ASSERT(RADV_MEM_TYPE_COUNT <= VK_MAX_MEMORY_TYPES);
623
624 pMemoryProperties->memoryTypeCount = RADV_MEM_TYPE_COUNT;
625 pMemoryProperties->memoryTypes[RADV_MEM_TYPE_VRAM] = (VkMemoryType) {
626 .propertyFlags = VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT,
627 .heapIndex = RADV_MEM_HEAP_VRAM,
628 };
629 pMemoryProperties->memoryTypes[RADV_MEM_TYPE_GTT_WRITE_COMBINE] = (VkMemoryType) {
630 .propertyFlags = VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT |
631 VK_MEMORY_PROPERTY_HOST_COHERENT_BIT,
632 .heapIndex = RADV_MEM_HEAP_GTT,
633 };
634 pMemoryProperties->memoryTypes[RADV_MEM_TYPE_VRAM_CPU_ACCESS] = (VkMemoryType) {
635 .propertyFlags = VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT |
636 VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT |
637 VK_MEMORY_PROPERTY_HOST_COHERENT_BIT,
638 .heapIndex = RADV_MEM_HEAP_VRAM_CPU_ACCESS,
639 };
640 pMemoryProperties->memoryTypes[RADV_MEM_TYPE_GTT_CACHED] = (VkMemoryType) {
641 .propertyFlags = VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT |
642 VK_MEMORY_PROPERTY_HOST_COHERENT_BIT |
643 VK_MEMORY_PROPERTY_HOST_CACHED_BIT,
644 .heapIndex = RADV_MEM_HEAP_GTT,
645 };
646
647 STATIC_ASSERT(RADV_MEM_HEAP_COUNT <= VK_MAX_MEMORY_HEAPS);
648
649 pMemoryProperties->memoryHeapCount = RADV_MEM_HEAP_COUNT;
650 pMemoryProperties->memoryHeaps[RADV_MEM_HEAP_VRAM] = (VkMemoryHeap) {
651 .size = physical_device->rad_info.vram_size -
652 physical_device->rad_info.visible_vram_size,
653 .flags = VK_MEMORY_HEAP_DEVICE_LOCAL_BIT,
654 };
655 pMemoryProperties->memoryHeaps[RADV_MEM_HEAP_VRAM_CPU_ACCESS] = (VkMemoryHeap) {
656 .size = physical_device->rad_info.visible_vram_size,
657 .flags = VK_MEMORY_HEAP_DEVICE_LOCAL_BIT,
658 };
659 pMemoryProperties->memoryHeaps[RADV_MEM_HEAP_GTT] = (VkMemoryHeap) {
660 .size = physical_device->rad_info.gart_size,
661 .flags = 0,
662 };
663 }
664
665 static int
666 radv_queue_init(struct radv_device *device, struct radv_queue *queue,
667 int queue_family_index, int idx)
668 {
669 queue->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
670 queue->device = device;
671 queue->queue_family_index = queue_family_index;
672 queue->queue_idx = idx;
673
674 queue->hw_ctx = device->ws->ctx_create(device->ws);
675 if (!queue->hw_ctx)
676 return VK_ERROR_OUT_OF_HOST_MEMORY;
677
678 return VK_SUCCESS;
679 }
680
681 static void
682 radv_queue_finish(struct radv_queue *queue)
683 {
684 if (queue->hw_ctx)
685 queue->device->ws->ctx_destroy(queue->hw_ctx);
686 }
687
688 VkResult radv_CreateDevice(
689 VkPhysicalDevice physicalDevice,
690 const VkDeviceCreateInfo* pCreateInfo,
691 const VkAllocationCallbacks* pAllocator,
692 VkDevice* pDevice)
693 {
694 RADV_FROM_HANDLE(radv_physical_device, physical_device, physicalDevice);
695 VkResult result;
696 struct radv_device *device;
697
698 for (uint32_t i = 0; i < pCreateInfo->enabledExtensionCount; i++) {
699 bool found = false;
700 for (uint32_t j = 0; j < ARRAY_SIZE(device_extensions); j++) {
701 if (strcmp(pCreateInfo->ppEnabledExtensionNames[i],
702 device_extensions[j].extensionName) == 0) {
703 found = true;
704 break;
705 }
706 }
707 if (!found)
708 return vk_error(VK_ERROR_EXTENSION_NOT_PRESENT);
709 }
710
711 device = vk_alloc2(&physical_device->instance->alloc, pAllocator,
712 sizeof(*device), 8,
713 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
714 if (!device)
715 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
716
717 memset(device, 0, sizeof(*device));
718
719 device->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
720 device->instance = physical_device->instance;
721
722 device->debug_flags = device->instance->debug_flags;
723
724 device->ws = physical_device->ws;
725 if (pAllocator)
726 device->alloc = *pAllocator;
727 else
728 device->alloc = physical_device->instance->alloc;
729
730 for (unsigned i = 0; i < pCreateInfo->queueCreateInfoCount; i++) {
731 const VkDeviceQueueCreateInfo *queue_create = &pCreateInfo->pQueueCreateInfos[i];
732 uint32_t qfi = queue_create->queueFamilyIndex;
733
734 device->queues[qfi] = vk_alloc(&device->alloc,
735 queue_create->queueCount * sizeof(struct radv_queue), 8, VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
736 if (!device->queues[qfi]) {
737 result = VK_ERROR_OUT_OF_HOST_MEMORY;
738 goto fail;
739 }
740
741 memset(device->queues[qfi], 0, queue_create->queueCount * sizeof(struct radv_queue));
742
743 device->queue_count[qfi] = queue_create->queueCount;
744
745 for (unsigned q = 0; q < queue_create->queueCount; q++) {
746 result = radv_queue_init(device, &device->queues[qfi][q], qfi, q);
747 if (result != VK_SUCCESS)
748 goto fail;
749 }
750 }
751
752 result = radv_device_init_meta(device);
753 if (result != VK_SUCCESS)
754 goto fail;
755
756 radv_device_init_msaa(device);
757
758 for (int family = 0; family < RADV_MAX_QUEUE_FAMILIES; ++family) {
759 device->empty_cs[family] = device->ws->cs_create(device->ws, family);
760 switch (family) {
761 case RADV_QUEUE_GENERAL:
762 radeon_emit(device->empty_cs[family], PKT3(PKT3_CONTEXT_CONTROL, 1, 0));
763 radeon_emit(device->empty_cs[family], CONTEXT_CONTROL_LOAD_ENABLE(1));
764 radeon_emit(device->empty_cs[family], CONTEXT_CONTROL_SHADOW_ENABLE(1));
765 break;
766 case RADV_QUEUE_COMPUTE:
767 radeon_emit(device->empty_cs[family], PKT3(PKT3_NOP, 0, 0));
768 radeon_emit(device->empty_cs[family], 0);
769 break;
770 }
771 device->ws->cs_finalize(device->empty_cs[family]);
772 }
773
774 if (getenv("RADV_TRACE_FILE")) {
775 device->trace_bo = device->ws->buffer_create(device->ws, 4096, 8,
776 RADEON_DOMAIN_VRAM, RADEON_FLAG_CPU_ACCESS);
777 if (!device->trace_bo)
778 goto fail;
779
780 device->trace_id_ptr = device->ws->buffer_map(device->trace_bo);
781 if (!device->trace_id_ptr)
782 goto fail;
783 }
784
785 *pDevice = radv_device_to_handle(device);
786 return VK_SUCCESS;
787
788 fail:
789 if (device->trace_bo)
790 device->ws->buffer_destroy(device->trace_bo);
791
792 for (unsigned i = 0; i < RADV_MAX_QUEUE_FAMILIES; i++) {
793 for (unsigned q = 0; q < device->queue_count[i]; q++)
794 radv_queue_finish(&device->queues[i][q]);
795 if (device->queue_count[i])
796 vk_free(&device->alloc, device->queues[i]);
797 }
798
799 vk_free(&device->alloc, device);
800 return result;
801 }
802
803 void radv_DestroyDevice(
804 VkDevice _device,
805 const VkAllocationCallbacks* pAllocator)
806 {
807 RADV_FROM_HANDLE(radv_device, device, _device);
808
809 if (device->trace_bo)
810 device->ws->buffer_destroy(device->trace_bo);
811
812 for (unsigned i = 0; i < RADV_MAX_QUEUE_FAMILIES; i++) {
813 for (unsigned q = 0; q < device->queue_count[i]; q++)
814 radv_queue_finish(&device->queues[i][q]);
815 if (device->queue_count[i])
816 vk_free(&device->alloc, device->queues[i]);
817 }
818 radv_device_finish_meta(device);
819
820 vk_free(&device->alloc, device);
821 }
822
823 VkResult radv_EnumerateInstanceExtensionProperties(
824 const char* pLayerName,
825 uint32_t* pPropertyCount,
826 VkExtensionProperties* pProperties)
827 {
828 if (pProperties == NULL) {
829 *pPropertyCount = ARRAY_SIZE(global_extensions);
830 return VK_SUCCESS;
831 }
832
833 *pPropertyCount = MIN2(*pPropertyCount, ARRAY_SIZE(global_extensions));
834 typed_memcpy(pProperties, global_extensions, *pPropertyCount);
835
836 if (*pPropertyCount < ARRAY_SIZE(global_extensions))
837 return VK_INCOMPLETE;
838
839 return VK_SUCCESS;
840 }
841
842 VkResult radv_EnumerateDeviceExtensionProperties(
843 VkPhysicalDevice physicalDevice,
844 const char* pLayerName,
845 uint32_t* pPropertyCount,
846 VkExtensionProperties* pProperties)
847 {
848 if (pProperties == NULL) {
849 *pPropertyCount = ARRAY_SIZE(device_extensions);
850 return VK_SUCCESS;
851 }
852
853 *pPropertyCount = MIN2(*pPropertyCount, ARRAY_SIZE(device_extensions));
854 typed_memcpy(pProperties, device_extensions, *pPropertyCount);
855
856 if (*pPropertyCount < ARRAY_SIZE(device_extensions))
857 return VK_INCOMPLETE;
858
859 return VK_SUCCESS;
860 }
861
862 VkResult radv_EnumerateInstanceLayerProperties(
863 uint32_t* pPropertyCount,
864 VkLayerProperties* pProperties)
865 {
866 if (pProperties == NULL) {
867 *pPropertyCount = 0;
868 return VK_SUCCESS;
869 }
870
871 /* None supported at this time */
872 return vk_error(VK_ERROR_LAYER_NOT_PRESENT);
873 }
874
875 VkResult radv_EnumerateDeviceLayerProperties(
876 VkPhysicalDevice physicalDevice,
877 uint32_t* pPropertyCount,
878 VkLayerProperties* pProperties)
879 {
880 if (pProperties == NULL) {
881 *pPropertyCount = 0;
882 return VK_SUCCESS;
883 }
884
885 /* None supported at this time */
886 return vk_error(VK_ERROR_LAYER_NOT_PRESENT);
887 }
888
889 void radv_GetDeviceQueue(
890 VkDevice _device,
891 uint32_t queueFamilyIndex,
892 uint32_t queueIndex,
893 VkQueue* pQueue)
894 {
895 RADV_FROM_HANDLE(radv_device, device, _device);
896
897 *pQueue = radv_queue_to_handle(&device->queues[queueFamilyIndex][queueIndex]);
898 }
899
900 static void radv_dump_trace(struct radv_device *device,
901 struct radeon_winsys_cs *cs)
902 {
903 const char *filename = getenv("RADV_TRACE_FILE");
904 FILE *f = fopen(filename, "w");
905 if (!f) {
906 fprintf(stderr, "Failed to write trace dump to %s\n", filename);
907 return;
908 }
909
910 fprintf(f, "Trace ID: %x\n", *device->trace_id_ptr);
911 device->ws->cs_dump(cs, f, *device->trace_id_ptr);
912 fclose(f);
913 }
914
915 VkResult radv_QueueSubmit(
916 VkQueue _queue,
917 uint32_t submitCount,
918 const VkSubmitInfo* pSubmits,
919 VkFence _fence)
920 {
921 RADV_FROM_HANDLE(radv_queue, queue, _queue);
922 RADV_FROM_HANDLE(radv_fence, fence, _fence);
923 struct radeon_winsys_fence *base_fence = fence ? fence->fence : NULL;
924 struct radeon_winsys_ctx *ctx = queue->hw_ctx;
925 int ret;
926 uint32_t max_cs_submission = queue->device->trace_bo ? 1 : UINT32_MAX;
927
928 for (uint32_t i = 0; i < submitCount; i++) {
929 struct radeon_winsys_cs **cs_array;
930 bool can_patch = true;
931 uint32_t advance;
932
933 if (!pSubmits[i].commandBufferCount)
934 continue;
935
936 cs_array = malloc(sizeof(struct radeon_winsys_cs *) *
937 pSubmits[i].commandBufferCount);
938
939 for (uint32_t j = 0; j < pSubmits[i].commandBufferCount; j++) {
940 RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer,
941 pSubmits[i].pCommandBuffers[j]);
942 assert(cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY);
943
944 cs_array[j] = cmd_buffer->cs;
945 if ((cmd_buffer->usage_flags & VK_COMMAND_BUFFER_USAGE_SIMULTANEOUS_USE_BIT))
946 can_patch = false;
947 }
948
949 for (uint32_t j = 0; j < pSubmits[i].commandBufferCount; j += advance) {
950 advance = MIN2(max_cs_submission,
951 pSubmits[i].commandBufferCount - j);
952 bool b = j == 0;
953 bool e = j + advance == pSubmits[i].commandBufferCount;
954
955 if (queue->device->trace_bo)
956 *queue->device->trace_id_ptr = 0;
957
958 ret = queue->device->ws->cs_submit(ctx, queue->queue_idx, cs_array,
959 pSubmits[i].commandBufferCount,
960 (struct radeon_winsys_sem **)pSubmits[i].pWaitSemaphores,
961 b ? pSubmits[i].waitSemaphoreCount : 0,
962 (struct radeon_winsys_sem **)pSubmits[i].pSignalSemaphores,
963 e ? pSubmits[i].signalSemaphoreCount : 0,
964 can_patch, base_fence);
965
966 if (ret) {
967 radv_loge("failed to submit CS %d\n", i);
968 abort();
969 }
970 if (queue->device->trace_bo) {
971 bool success = queue->device->ws->ctx_wait_idle(
972 queue->hw_ctx,
973 radv_queue_family_to_ring(
974 queue->queue_family_index),
975 queue->queue_idx);
976
977 if (!success) { /* Hang */
978 radv_dump_trace(queue->device, cs_array[j]);
979 abort();
980 }
981 }
982 }
983 free(cs_array);
984 }
985
986 if (fence) {
987 if (!submitCount)
988 ret = queue->device->ws->cs_submit(ctx, queue->queue_idx,
989 &queue->device->empty_cs[queue->queue_family_index],
990 1, NULL, 0, NULL, 0, false, base_fence);
991
992 fence->submitted = true;
993 }
994
995 return VK_SUCCESS;
996 }
997
998 VkResult radv_QueueWaitIdle(
999 VkQueue _queue)
1000 {
1001 RADV_FROM_HANDLE(radv_queue, queue, _queue);
1002
1003 queue->device->ws->ctx_wait_idle(queue->hw_ctx,
1004 radv_queue_family_to_ring(queue->queue_family_index),
1005 queue->queue_idx);
1006 return VK_SUCCESS;
1007 }
1008
1009 VkResult radv_DeviceWaitIdle(
1010 VkDevice _device)
1011 {
1012 RADV_FROM_HANDLE(radv_device, device, _device);
1013
1014 for (unsigned i = 0; i < RADV_MAX_QUEUE_FAMILIES; i++) {
1015 for (unsigned q = 0; q < device->queue_count[i]; q++) {
1016 radv_QueueWaitIdle(radv_queue_to_handle(&device->queues[i][q]));
1017 }
1018 }
1019 return VK_SUCCESS;
1020 }
1021
1022 PFN_vkVoidFunction radv_GetInstanceProcAddr(
1023 VkInstance instance,
1024 const char* pName)
1025 {
1026 return radv_lookup_entrypoint(pName);
1027 }
1028
1029 /* The loader wants us to expose a second GetInstanceProcAddr function
1030 * to work around certain LD_PRELOAD issues seen in apps.
1031 */
1032 PUBLIC
1033 VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL vk_icdGetInstanceProcAddr(
1034 VkInstance instance,
1035 const char* pName);
1036
1037 PUBLIC
1038 VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL vk_icdGetInstanceProcAddr(
1039 VkInstance instance,
1040 const char* pName)
1041 {
1042 return radv_GetInstanceProcAddr(instance, pName);
1043 }
1044
1045 PFN_vkVoidFunction radv_GetDeviceProcAddr(
1046 VkDevice device,
1047 const char* pName)
1048 {
1049 return radv_lookup_entrypoint(pName);
1050 }
1051
1052 VkResult radv_AllocateMemory(
1053 VkDevice _device,
1054 const VkMemoryAllocateInfo* pAllocateInfo,
1055 const VkAllocationCallbacks* pAllocator,
1056 VkDeviceMemory* pMem)
1057 {
1058 RADV_FROM_HANDLE(radv_device, device, _device);
1059 struct radv_device_memory *mem;
1060 VkResult result;
1061 enum radeon_bo_domain domain;
1062 uint32_t flags = 0;
1063 assert(pAllocateInfo->sType == VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO);
1064
1065 if (pAllocateInfo->allocationSize == 0) {
1066 /* Apparently, this is allowed */
1067 *pMem = VK_NULL_HANDLE;
1068 return VK_SUCCESS;
1069 }
1070
1071 mem = vk_alloc2(&device->alloc, pAllocator, sizeof(*mem), 8,
1072 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1073 if (mem == NULL)
1074 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1075
1076 uint64_t alloc_size = align_u64(pAllocateInfo->allocationSize, 4096);
1077 if (pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_GTT_WRITE_COMBINE ||
1078 pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_GTT_CACHED)
1079 domain = RADEON_DOMAIN_GTT;
1080 else
1081 domain = RADEON_DOMAIN_VRAM;
1082
1083 if (pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_VRAM)
1084 flags |= RADEON_FLAG_NO_CPU_ACCESS;
1085 else
1086 flags |= RADEON_FLAG_CPU_ACCESS;
1087
1088 if (pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_GTT_WRITE_COMBINE)
1089 flags |= RADEON_FLAG_GTT_WC;
1090
1091 mem->bo = device->ws->buffer_create(device->ws, alloc_size, 32768,
1092 domain, flags);
1093
1094 if (!mem->bo) {
1095 result = VK_ERROR_OUT_OF_DEVICE_MEMORY;
1096 goto fail;
1097 }
1098 mem->type_index = pAllocateInfo->memoryTypeIndex;
1099
1100 *pMem = radv_device_memory_to_handle(mem);
1101
1102 return VK_SUCCESS;
1103
1104 fail:
1105 vk_free2(&device->alloc, pAllocator, mem);
1106
1107 return result;
1108 }
1109
1110 void radv_FreeMemory(
1111 VkDevice _device,
1112 VkDeviceMemory _mem,
1113 const VkAllocationCallbacks* pAllocator)
1114 {
1115 RADV_FROM_HANDLE(radv_device, device, _device);
1116 RADV_FROM_HANDLE(radv_device_memory, mem, _mem);
1117
1118 if (mem == NULL)
1119 return;
1120
1121 device->ws->buffer_destroy(mem->bo);
1122 mem->bo = NULL;
1123
1124 vk_free2(&device->alloc, pAllocator, mem);
1125 }
1126
1127 VkResult radv_MapMemory(
1128 VkDevice _device,
1129 VkDeviceMemory _memory,
1130 VkDeviceSize offset,
1131 VkDeviceSize size,
1132 VkMemoryMapFlags flags,
1133 void** ppData)
1134 {
1135 RADV_FROM_HANDLE(radv_device, device, _device);
1136 RADV_FROM_HANDLE(radv_device_memory, mem, _memory);
1137
1138 if (mem == NULL) {
1139 *ppData = NULL;
1140 return VK_SUCCESS;
1141 }
1142
1143 *ppData = device->ws->buffer_map(mem->bo);
1144 if (*ppData) {
1145 *ppData += offset;
1146 return VK_SUCCESS;
1147 }
1148
1149 return VK_ERROR_MEMORY_MAP_FAILED;
1150 }
1151
1152 void radv_UnmapMemory(
1153 VkDevice _device,
1154 VkDeviceMemory _memory)
1155 {
1156 RADV_FROM_HANDLE(radv_device, device, _device);
1157 RADV_FROM_HANDLE(radv_device_memory, mem, _memory);
1158
1159 if (mem == NULL)
1160 return;
1161
1162 device->ws->buffer_unmap(mem->bo);
1163 }
1164
1165 VkResult radv_FlushMappedMemoryRanges(
1166 VkDevice _device,
1167 uint32_t memoryRangeCount,
1168 const VkMappedMemoryRange* pMemoryRanges)
1169 {
1170 return VK_SUCCESS;
1171 }
1172
1173 VkResult radv_InvalidateMappedMemoryRanges(
1174 VkDevice _device,
1175 uint32_t memoryRangeCount,
1176 const VkMappedMemoryRange* pMemoryRanges)
1177 {
1178 return VK_SUCCESS;
1179 }
1180
1181 void radv_GetBufferMemoryRequirements(
1182 VkDevice device,
1183 VkBuffer _buffer,
1184 VkMemoryRequirements* pMemoryRequirements)
1185 {
1186 RADV_FROM_HANDLE(radv_buffer, buffer, _buffer);
1187
1188 pMemoryRequirements->memoryTypeBits = (1u << RADV_MEM_TYPE_COUNT) - 1;
1189
1190 pMemoryRequirements->size = buffer->size;
1191 pMemoryRequirements->alignment = 16;
1192 }
1193
1194 void radv_GetImageMemoryRequirements(
1195 VkDevice device,
1196 VkImage _image,
1197 VkMemoryRequirements* pMemoryRequirements)
1198 {
1199 RADV_FROM_HANDLE(radv_image, image, _image);
1200
1201 pMemoryRequirements->memoryTypeBits = (1u << RADV_MEM_TYPE_COUNT) - 1;
1202
1203 pMemoryRequirements->size = image->size;
1204 pMemoryRequirements->alignment = image->alignment;
1205 }
1206
1207 void radv_GetImageSparseMemoryRequirements(
1208 VkDevice device,
1209 VkImage image,
1210 uint32_t* pSparseMemoryRequirementCount,
1211 VkSparseImageMemoryRequirements* pSparseMemoryRequirements)
1212 {
1213 stub();
1214 }
1215
1216 void radv_GetDeviceMemoryCommitment(
1217 VkDevice device,
1218 VkDeviceMemory memory,
1219 VkDeviceSize* pCommittedMemoryInBytes)
1220 {
1221 *pCommittedMemoryInBytes = 0;
1222 }
1223
1224 VkResult radv_BindBufferMemory(
1225 VkDevice device,
1226 VkBuffer _buffer,
1227 VkDeviceMemory _memory,
1228 VkDeviceSize memoryOffset)
1229 {
1230 RADV_FROM_HANDLE(radv_device_memory, mem, _memory);
1231 RADV_FROM_HANDLE(radv_buffer, buffer, _buffer);
1232
1233 if (mem) {
1234 buffer->bo = mem->bo;
1235 buffer->offset = memoryOffset;
1236 } else {
1237 buffer->bo = NULL;
1238 buffer->offset = 0;
1239 }
1240
1241 return VK_SUCCESS;
1242 }
1243
1244 VkResult radv_BindImageMemory(
1245 VkDevice device,
1246 VkImage _image,
1247 VkDeviceMemory _memory,
1248 VkDeviceSize memoryOffset)
1249 {
1250 RADV_FROM_HANDLE(radv_device_memory, mem, _memory);
1251 RADV_FROM_HANDLE(radv_image, image, _image);
1252
1253 if (mem) {
1254 image->bo = mem->bo;
1255 image->offset = memoryOffset;
1256 } else {
1257 image->bo = NULL;
1258 image->offset = 0;
1259 }
1260
1261 return VK_SUCCESS;
1262 }
1263
1264 VkResult radv_QueueBindSparse(
1265 VkQueue queue,
1266 uint32_t bindInfoCount,
1267 const VkBindSparseInfo* pBindInfo,
1268 VkFence fence)
1269 {
1270 stub_return(VK_ERROR_INCOMPATIBLE_DRIVER);
1271 }
1272
1273 VkResult radv_CreateFence(
1274 VkDevice _device,
1275 const VkFenceCreateInfo* pCreateInfo,
1276 const VkAllocationCallbacks* pAllocator,
1277 VkFence* pFence)
1278 {
1279 RADV_FROM_HANDLE(radv_device, device, _device);
1280 struct radv_fence *fence = vk_alloc2(&device->alloc, pAllocator,
1281 sizeof(*fence), 8,
1282 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1283
1284 if (!fence)
1285 return VK_ERROR_OUT_OF_HOST_MEMORY;
1286
1287 memset(fence, 0, sizeof(*fence));
1288 fence->submitted = false;
1289 fence->signalled = !!(pCreateInfo->flags & VK_FENCE_CREATE_SIGNALED_BIT);
1290 fence->fence = device->ws->create_fence();
1291 if (!fence->fence) {
1292 vk_free2(&device->alloc, pAllocator, fence);
1293 return VK_ERROR_OUT_OF_HOST_MEMORY;
1294 }
1295
1296 *pFence = radv_fence_to_handle(fence);
1297
1298 return VK_SUCCESS;
1299 }
1300
1301 void radv_DestroyFence(
1302 VkDevice _device,
1303 VkFence _fence,
1304 const VkAllocationCallbacks* pAllocator)
1305 {
1306 RADV_FROM_HANDLE(radv_device, device, _device);
1307 RADV_FROM_HANDLE(radv_fence, fence, _fence);
1308
1309 if (!fence)
1310 return;
1311 device->ws->destroy_fence(fence->fence);
1312 vk_free2(&device->alloc, pAllocator, fence);
1313 }
1314
1315 static uint64_t radv_get_absolute_timeout(uint64_t timeout)
1316 {
1317 uint64_t current_time;
1318 struct timespec tv;
1319
1320 clock_gettime(CLOCK_MONOTONIC, &tv);
1321 current_time = tv.tv_nsec + tv.tv_sec*1000000000ull;
1322
1323 timeout = MIN2(UINT64_MAX - current_time, timeout);
1324
1325 return current_time + timeout;
1326 }
1327
1328 VkResult radv_WaitForFences(
1329 VkDevice _device,
1330 uint32_t fenceCount,
1331 const VkFence* pFences,
1332 VkBool32 waitAll,
1333 uint64_t timeout)
1334 {
1335 RADV_FROM_HANDLE(radv_device, device, _device);
1336 timeout = radv_get_absolute_timeout(timeout);
1337
1338 if (!waitAll && fenceCount > 1) {
1339 fprintf(stderr, "radv: WaitForFences without waitAll not implemented yet\n");
1340 }
1341
1342 for (uint32_t i = 0; i < fenceCount; ++i) {
1343 RADV_FROM_HANDLE(radv_fence, fence, pFences[i]);
1344 bool expired = false;
1345
1346 if (fence->signalled)
1347 continue;
1348
1349 if (!fence->submitted)
1350 return VK_TIMEOUT;
1351
1352 expired = device->ws->fence_wait(device->ws, fence->fence, true, timeout);
1353 if (!expired)
1354 return VK_TIMEOUT;
1355
1356 fence->signalled = true;
1357 }
1358
1359 return VK_SUCCESS;
1360 }
1361
1362 VkResult radv_ResetFences(VkDevice device,
1363 uint32_t fenceCount,
1364 const VkFence *pFences)
1365 {
1366 for (unsigned i = 0; i < fenceCount; ++i) {
1367 RADV_FROM_HANDLE(radv_fence, fence, pFences[i]);
1368 fence->submitted = fence->signalled = false;
1369 }
1370
1371 return VK_SUCCESS;
1372 }
1373
1374 VkResult radv_GetFenceStatus(VkDevice _device, VkFence _fence)
1375 {
1376 RADV_FROM_HANDLE(radv_device, device, _device);
1377 RADV_FROM_HANDLE(radv_fence, fence, _fence);
1378
1379 if (fence->signalled)
1380 return VK_SUCCESS;
1381 if (!fence->submitted)
1382 return VK_NOT_READY;
1383
1384 if (!device->ws->fence_wait(device->ws, fence->fence, false, 0))
1385 return VK_NOT_READY;
1386
1387 return VK_SUCCESS;
1388 }
1389
1390
1391 // Queue semaphore functions
1392
1393 VkResult radv_CreateSemaphore(
1394 VkDevice _device,
1395 const VkSemaphoreCreateInfo* pCreateInfo,
1396 const VkAllocationCallbacks* pAllocator,
1397 VkSemaphore* pSemaphore)
1398 {
1399 RADV_FROM_HANDLE(radv_device, device, _device);
1400 struct radeon_winsys_sem *sem;
1401
1402 sem = device->ws->create_sem(device->ws);
1403 if (!sem)
1404 return VK_ERROR_OUT_OF_HOST_MEMORY;
1405
1406 *pSemaphore = (VkSemaphore)sem;
1407 return VK_SUCCESS;
1408 }
1409
1410 void radv_DestroySemaphore(
1411 VkDevice _device,
1412 VkSemaphore _semaphore,
1413 const VkAllocationCallbacks* pAllocator)
1414 {
1415 RADV_FROM_HANDLE(radv_device, device, _device);
1416 struct radeon_winsys_sem *sem;
1417 if (!_semaphore)
1418 return;
1419
1420 sem = (struct radeon_winsys_sem *)_semaphore;
1421 device->ws->destroy_sem(sem);
1422 }
1423
1424 VkResult radv_CreateEvent(
1425 VkDevice _device,
1426 const VkEventCreateInfo* pCreateInfo,
1427 const VkAllocationCallbacks* pAllocator,
1428 VkEvent* pEvent)
1429 {
1430 RADV_FROM_HANDLE(radv_device, device, _device);
1431 struct radv_event *event = vk_alloc2(&device->alloc, pAllocator,
1432 sizeof(*event), 8,
1433 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1434
1435 if (!event)
1436 return VK_ERROR_OUT_OF_HOST_MEMORY;
1437
1438 event->bo = device->ws->buffer_create(device->ws, 8, 8,
1439 RADEON_DOMAIN_GTT,
1440 RADEON_FLAG_CPU_ACCESS);
1441 if (!event->bo) {
1442 vk_free2(&device->alloc, pAllocator, event);
1443 return VK_ERROR_OUT_OF_DEVICE_MEMORY;
1444 }
1445
1446 event->map = (uint64_t*)device->ws->buffer_map(event->bo);
1447
1448 *pEvent = radv_event_to_handle(event);
1449
1450 return VK_SUCCESS;
1451 }
1452
1453 void radv_DestroyEvent(
1454 VkDevice _device,
1455 VkEvent _event,
1456 const VkAllocationCallbacks* pAllocator)
1457 {
1458 RADV_FROM_HANDLE(radv_device, device, _device);
1459 RADV_FROM_HANDLE(radv_event, event, _event);
1460
1461 if (!event)
1462 return;
1463 device->ws->buffer_destroy(event->bo);
1464 vk_free2(&device->alloc, pAllocator, event);
1465 }
1466
1467 VkResult radv_GetEventStatus(
1468 VkDevice _device,
1469 VkEvent _event)
1470 {
1471 RADV_FROM_HANDLE(radv_event, event, _event);
1472
1473 if (*event->map == 1)
1474 return VK_EVENT_SET;
1475 return VK_EVENT_RESET;
1476 }
1477
1478 VkResult radv_SetEvent(
1479 VkDevice _device,
1480 VkEvent _event)
1481 {
1482 RADV_FROM_HANDLE(radv_event, event, _event);
1483 *event->map = 1;
1484
1485 return VK_SUCCESS;
1486 }
1487
1488 VkResult radv_ResetEvent(
1489 VkDevice _device,
1490 VkEvent _event)
1491 {
1492 RADV_FROM_HANDLE(radv_event, event, _event);
1493 *event->map = 0;
1494
1495 return VK_SUCCESS;
1496 }
1497
1498 VkResult radv_CreateBuffer(
1499 VkDevice _device,
1500 const VkBufferCreateInfo* pCreateInfo,
1501 const VkAllocationCallbacks* pAllocator,
1502 VkBuffer* pBuffer)
1503 {
1504 RADV_FROM_HANDLE(radv_device, device, _device);
1505 struct radv_buffer *buffer;
1506
1507 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO);
1508
1509 buffer = vk_alloc2(&device->alloc, pAllocator, sizeof(*buffer), 8,
1510 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1511 if (buffer == NULL)
1512 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1513
1514 buffer->size = pCreateInfo->size;
1515 buffer->usage = pCreateInfo->usage;
1516 buffer->bo = NULL;
1517 buffer->offset = 0;
1518
1519 *pBuffer = radv_buffer_to_handle(buffer);
1520
1521 return VK_SUCCESS;
1522 }
1523
1524 void radv_DestroyBuffer(
1525 VkDevice _device,
1526 VkBuffer _buffer,
1527 const VkAllocationCallbacks* pAllocator)
1528 {
1529 RADV_FROM_HANDLE(radv_device, device, _device);
1530 RADV_FROM_HANDLE(radv_buffer, buffer, _buffer);
1531
1532 if (!buffer)
1533 return;
1534
1535 vk_free2(&device->alloc, pAllocator, buffer);
1536 }
1537
1538 static inline unsigned
1539 si_tile_mode_index(const struct radv_image *image, unsigned level, bool stencil)
1540 {
1541 if (stencil)
1542 return image->surface.stencil_tiling_index[level];
1543 else
1544 return image->surface.tiling_index[level];
1545 }
1546
1547 static void
1548 radv_initialise_color_surface(struct radv_device *device,
1549 struct radv_color_buffer_info *cb,
1550 struct radv_image_view *iview)
1551 {
1552 const struct vk_format_description *desc;
1553 unsigned ntype, format, swap, endian;
1554 unsigned blend_clamp = 0, blend_bypass = 0;
1555 unsigned pitch_tile_max, slice_tile_max, tile_mode_index;
1556 uint64_t va;
1557 const struct radeon_surf *surf = &iview->image->surface;
1558 const struct radeon_surf_level *level_info = &surf->level[iview->base_mip];
1559
1560 desc = vk_format_description(iview->vk_format);
1561
1562 memset(cb, 0, sizeof(*cb));
1563
1564 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
1565 va += level_info->offset;
1566 cb->cb_color_base = va >> 8;
1567
1568 /* CMASK variables */
1569 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
1570 va += iview->image->cmask.offset;
1571 cb->cb_color_cmask = va >> 8;
1572 cb->cb_color_cmask_slice = iview->image->cmask.slice_tile_max;
1573
1574 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
1575 va += iview->image->dcc_offset;
1576 cb->cb_dcc_base = va >> 8;
1577
1578 cb->cb_color_view = S_028C6C_SLICE_START(iview->base_layer) |
1579 S_028C6C_SLICE_MAX(iview->base_layer + iview->extent.depth - 1);
1580
1581 cb->micro_tile_mode = iview->image->surface.micro_tile_mode;
1582 pitch_tile_max = level_info->nblk_x / 8 - 1;
1583 slice_tile_max = (level_info->nblk_x * level_info->nblk_y) / 64 - 1;
1584 tile_mode_index = si_tile_mode_index(iview->image, iview->base_mip, false);
1585
1586 cb->cb_color_pitch = S_028C64_TILE_MAX(pitch_tile_max);
1587 cb->cb_color_slice = S_028C68_TILE_MAX(slice_tile_max);
1588
1589 /* Intensity is implemented as Red, so treat it that way. */
1590 cb->cb_color_attrib = S_028C74_FORCE_DST_ALPHA_1(desc->swizzle[3] == VK_SWIZZLE_1) |
1591 S_028C74_TILE_MODE_INDEX(tile_mode_index);
1592
1593 if (iview->image->samples > 1) {
1594 unsigned log_samples = util_logbase2(iview->image->samples);
1595
1596 cb->cb_color_attrib |= S_028C74_NUM_SAMPLES(log_samples) |
1597 S_028C74_NUM_FRAGMENTS(log_samples);
1598 }
1599
1600 if (iview->image->fmask.size) {
1601 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset + iview->image->fmask.offset;
1602 if (device->instance->physicalDevice.rad_info.chip_class >= CIK)
1603 cb->cb_color_pitch |= S_028C64_FMASK_TILE_MAX(iview->image->fmask.pitch_in_pixels / 8 - 1);
1604 cb->cb_color_attrib |= S_028C74_FMASK_TILE_MODE_INDEX(iview->image->fmask.tile_mode_index);
1605 cb->cb_color_fmask = va >> 8;
1606 cb->cb_color_fmask_slice = S_028C88_TILE_MAX(iview->image->fmask.slice_tile_max);
1607 } else {
1608 /* This must be set for fast clear to work without FMASK. */
1609 if (device->instance->physicalDevice.rad_info.chip_class >= CIK)
1610 cb->cb_color_pitch |= S_028C64_FMASK_TILE_MAX(pitch_tile_max);
1611 cb->cb_color_attrib |= S_028C74_FMASK_TILE_MODE_INDEX(tile_mode_index);
1612 cb->cb_color_fmask = cb->cb_color_base;
1613 cb->cb_color_fmask_slice = S_028C88_TILE_MAX(slice_tile_max);
1614 }
1615
1616 ntype = radv_translate_color_numformat(iview->vk_format,
1617 desc,
1618 vk_format_get_first_non_void_channel(iview->vk_format));
1619 format = radv_translate_colorformat(iview->vk_format);
1620 if (format == V_028C70_COLOR_INVALID || ntype == ~0u)
1621 radv_finishme("Illegal color\n");
1622 swap = radv_translate_colorswap(iview->vk_format, FALSE);
1623 endian = radv_colorformat_endian_swap(format);
1624
1625 /* blend clamp should be set for all NORM/SRGB types */
1626 if (ntype == V_028C70_NUMBER_UNORM ||
1627 ntype == V_028C70_NUMBER_SNORM ||
1628 ntype == V_028C70_NUMBER_SRGB)
1629 blend_clamp = 1;
1630
1631 /* set blend bypass according to docs if SINT/UINT or
1632 8/24 COLOR variants */
1633 if (ntype == V_028C70_NUMBER_UINT || ntype == V_028C70_NUMBER_SINT ||
1634 format == V_028C70_COLOR_8_24 || format == V_028C70_COLOR_24_8 ||
1635 format == V_028C70_COLOR_X24_8_32_FLOAT) {
1636 blend_clamp = 0;
1637 blend_bypass = 1;
1638 }
1639 #if 0
1640 if ((ntype == V_028C70_NUMBER_UINT || ntype == V_028C70_NUMBER_SINT) &&
1641 (format == V_028C70_COLOR_8 ||
1642 format == V_028C70_COLOR_8_8 ||
1643 format == V_028C70_COLOR_8_8_8_8))
1644 ->color_is_int8 = true;
1645 #endif
1646 cb->cb_color_info = S_028C70_FORMAT(format) |
1647 S_028C70_COMP_SWAP(swap) |
1648 S_028C70_BLEND_CLAMP(blend_clamp) |
1649 S_028C70_BLEND_BYPASS(blend_bypass) |
1650 S_028C70_SIMPLE_FLOAT(1) |
1651 S_028C70_ROUND_MODE(ntype != V_028C70_NUMBER_UNORM &&
1652 ntype != V_028C70_NUMBER_SNORM &&
1653 ntype != V_028C70_NUMBER_SRGB &&
1654 format != V_028C70_COLOR_8_24 &&
1655 format != V_028C70_COLOR_24_8) |
1656 S_028C70_NUMBER_TYPE(ntype) |
1657 S_028C70_ENDIAN(endian);
1658 if (iview->image->samples > 1)
1659 if (iview->image->fmask.size)
1660 cb->cb_color_info |= S_028C70_COMPRESSION(1);
1661
1662 if (iview->image->cmask.size &&
1663 (device->debug_flags & RADV_DEBUG_FAST_CLEARS))
1664 cb->cb_color_info |= S_028C70_FAST_CLEAR(1);
1665
1666 if (iview->image->surface.dcc_size && level_info->dcc_enabled)
1667 cb->cb_color_info |= S_028C70_DCC_ENABLE(1);
1668
1669 if (device->instance->physicalDevice.rad_info.chip_class >= VI) {
1670 unsigned max_uncompressed_block_size = 2;
1671 if (iview->image->samples > 1) {
1672 if (iview->image->surface.bpe == 1)
1673 max_uncompressed_block_size = 0;
1674 else if (iview->image->surface.bpe == 2)
1675 max_uncompressed_block_size = 1;
1676 }
1677
1678 cb->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size) |
1679 S_028C78_INDEPENDENT_64B_BLOCKS(1);
1680 }
1681
1682 /* This must be set for fast clear to work without FMASK. */
1683 if (!iview->image->fmask.size &&
1684 device->instance->physicalDevice.rad_info.chip_class == SI) {
1685 unsigned bankh = util_logbase2(iview->image->surface.bankh);
1686 cb->cb_color_attrib |= S_028C74_FMASK_BANK_HEIGHT(bankh);
1687 }
1688 }
1689
1690 static void
1691 radv_initialise_ds_surface(struct radv_device *device,
1692 struct radv_ds_buffer_info *ds,
1693 struct radv_image_view *iview)
1694 {
1695 unsigned level = iview->base_mip;
1696 unsigned format;
1697 uint64_t va, s_offs, z_offs;
1698 const struct radeon_surf_level *level_info = &iview->image->surface.level[level];
1699 memset(ds, 0, sizeof(*ds));
1700 switch (iview->vk_format) {
1701 case VK_FORMAT_D24_UNORM_S8_UINT:
1702 case VK_FORMAT_X8_D24_UNORM_PACK32:
1703 ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-24);
1704 ds->offset_scale = 2.0f;
1705 break;
1706 case VK_FORMAT_D16_UNORM:
1707 case VK_FORMAT_D16_UNORM_S8_UINT:
1708 ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-16);
1709 ds->offset_scale = 4.0f;
1710 break;
1711 case VK_FORMAT_D32_SFLOAT:
1712 case VK_FORMAT_D32_SFLOAT_S8_UINT:
1713 ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-23) |
1714 S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(1);
1715 ds->offset_scale = 1.0f;
1716 break;
1717 default:
1718 break;
1719 }
1720
1721 format = radv_translate_dbformat(iview->vk_format);
1722 if (format == V_028040_Z_INVALID) {
1723 fprintf(stderr, "Invalid DB format: %d, disabling DB.\n", iview->vk_format);
1724 }
1725
1726 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
1727 s_offs = z_offs = va;
1728 z_offs += iview->image->surface.level[level].offset;
1729 s_offs += iview->image->surface.stencil_level[level].offset;
1730
1731 ds->db_depth_view = S_028008_SLICE_START(iview->base_layer) |
1732 S_028008_SLICE_MAX(iview->base_layer + iview->extent.depth - 1);
1733 ds->db_depth_info = S_02803C_ADDR5_SWIZZLE_MASK(1);
1734 ds->db_z_info = S_028040_FORMAT(format) | S_028040_ZRANGE_PRECISION(1);
1735
1736 if (iview->image->samples > 1)
1737 ds->db_z_info |= S_028040_NUM_SAMPLES(util_logbase2(iview->image->samples));
1738
1739 if (iview->image->surface.flags & RADEON_SURF_SBUFFER)
1740 ds->db_stencil_info = S_028044_FORMAT(V_028044_STENCIL_8);
1741 else
1742 ds->db_stencil_info = S_028044_FORMAT(V_028044_STENCIL_INVALID);
1743
1744 if (device->instance->physicalDevice.rad_info.chip_class >= CIK) {
1745 struct radeon_info *info = &device->instance->physicalDevice.rad_info;
1746 unsigned tiling_index = iview->image->surface.tiling_index[level];
1747 unsigned stencil_index = iview->image->surface.stencil_tiling_index[level];
1748 unsigned macro_index = iview->image->surface.macro_tile_index;
1749 unsigned tile_mode = info->si_tile_mode_array[tiling_index];
1750 unsigned stencil_tile_mode = info->si_tile_mode_array[stencil_index];
1751 unsigned macro_mode = info->cik_macrotile_mode_array[macro_index];
1752
1753 ds->db_depth_info |=
1754 S_02803C_ARRAY_MODE(G_009910_ARRAY_MODE(tile_mode)) |
1755 S_02803C_PIPE_CONFIG(G_009910_PIPE_CONFIG(tile_mode)) |
1756 S_02803C_BANK_WIDTH(G_009990_BANK_WIDTH(macro_mode)) |
1757 S_02803C_BANK_HEIGHT(G_009990_BANK_HEIGHT(macro_mode)) |
1758 S_02803C_MACRO_TILE_ASPECT(G_009990_MACRO_TILE_ASPECT(macro_mode)) |
1759 S_02803C_NUM_BANKS(G_009990_NUM_BANKS(macro_mode));
1760 ds->db_z_info |= S_028040_TILE_SPLIT(G_009910_TILE_SPLIT(tile_mode));
1761 ds->db_stencil_info |= S_028044_TILE_SPLIT(G_009910_TILE_SPLIT(stencil_tile_mode));
1762 } else {
1763 unsigned tile_mode_index = si_tile_mode_index(iview->image, level, false);
1764 ds->db_z_info |= S_028040_TILE_MODE_INDEX(tile_mode_index);
1765 tile_mode_index = si_tile_mode_index(iview->image, level, true);
1766 ds->db_stencil_info |= S_028044_TILE_MODE_INDEX(tile_mode_index);
1767 }
1768
1769 if (iview->image->htile.size && !level) {
1770 ds->db_z_info |= S_028040_TILE_SURFACE_ENABLE(1) |
1771 S_028040_ALLOW_EXPCLEAR(1);
1772
1773 if (iview->image->surface.flags & RADEON_SURF_SBUFFER) {
1774 /* Workaround: For a not yet understood reason, the
1775 * combination of MSAA, fast stencil clear and stencil
1776 * decompress messes with subsequent stencil buffer
1777 * uses. Problem was reproduced on Verde, Bonaire,
1778 * Tonga, and Carrizo.
1779 *
1780 * Disabling EXPCLEAR works around the problem.
1781 *
1782 * Check piglit's arb_texture_multisample-stencil-clear
1783 * test if you want to try changing this.
1784 */
1785 if (iview->image->samples <= 1)
1786 ds->db_stencil_info |= S_028044_ALLOW_EXPCLEAR(1);
1787 } else
1788 /* Use all of the htile_buffer for depth if there's no stencil. */
1789 ds->db_stencil_info |= S_028044_TILE_STENCIL_DISABLE(1);
1790
1791 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset +
1792 iview->image->htile.offset;
1793 ds->db_htile_data_base = va >> 8;
1794 ds->db_htile_surface = S_028ABC_FULL_CACHE(1);
1795 } else {
1796 ds->db_htile_data_base = 0;
1797 ds->db_htile_surface = 0;
1798 }
1799
1800 ds->db_z_read_base = ds->db_z_write_base = z_offs >> 8;
1801 ds->db_stencil_read_base = ds->db_stencil_write_base = s_offs >> 8;
1802
1803 ds->db_depth_size = S_028058_PITCH_TILE_MAX((level_info->nblk_x / 8) - 1) |
1804 S_028058_HEIGHT_TILE_MAX((level_info->nblk_y / 8) - 1);
1805 ds->db_depth_slice = S_02805C_SLICE_TILE_MAX((level_info->nblk_x * level_info->nblk_y) / 64 - 1);
1806 }
1807
1808 VkResult radv_CreateFramebuffer(
1809 VkDevice _device,
1810 const VkFramebufferCreateInfo* pCreateInfo,
1811 const VkAllocationCallbacks* pAllocator,
1812 VkFramebuffer* pFramebuffer)
1813 {
1814 RADV_FROM_HANDLE(radv_device, device, _device);
1815 struct radv_framebuffer *framebuffer;
1816
1817 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO);
1818
1819 size_t size = sizeof(*framebuffer) +
1820 sizeof(struct radv_attachment_info) * pCreateInfo->attachmentCount;
1821 framebuffer = vk_alloc2(&device->alloc, pAllocator, size, 8,
1822 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1823 if (framebuffer == NULL)
1824 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1825
1826 framebuffer->attachment_count = pCreateInfo->attachmentCount;
1827 for (uint32_t i = 0; i < pCreateInfo->attachmentCount; i++) {
1828 VkImageView _iview = pCreateInfo->pAttachments[i];
1829 struct radv_image_view *iview = radv_image_view_from_handle(_iview);
1830 framebuffer->attachments[i].attachment = iview;
1831 if (iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT) {
1832 radv_initialise_color_surface(device, &framebuffer->attachments[i].cb, iview);
1833 } else if (iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT)) {
1834 radv_initialise_ds_surface(device, &framebuffer->attachments[i].ds, iview);
1835 }
1836 }
1837
1838 framebuffer->width = pCreateInfo->width;
1839 framebuffer->height = pCreateInfo->height;
1840 framebuffer->layers = pCreateInfo->layers;
1841
1842 *pFramebuffer = radv_framebuffer_to_handle(framebuffer);
1843 return VK_SUCCESS;
1844 }
1845
1846 void radv_DestroyFramebuffer(
1847 VkDevice _device,
1848 VkFramebuffer _fb,
1849 const VkAllocationCallbacks* pAllocator)
1850 {
1851 RADV_FROM_HANDLE(radv_device, device, _device);
1852 RADV_FROM_HANDLE(radv_framebuffer, fb, _fb);
1853
1854 if (!fb)
1855 return;
1856 vk_free2(&device->alloc, pAllocator, fb);
1857 }
1858
1859 static unsigned radv_tex_wrap(VkSamplerAddressMode address_mode)
1860 {
1861 switch (address_mode) {
1862 case VK_SAMPLER_ADDRESS_MODE_REPEAT:
1863 return V_008F30_SQ_TEX_WRAP;
1864 case VK_SAMPLER_ADDRESS_MODE_MIRRORED_REPEAT:
1865 return V_008F30_SQ_TEX_MIRROR;
1866 case VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE:
1867 return V_008F30_SQ_TEX_CLAMP_LAST_TEXEL;
1868 case VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER:
1869 return V_008F30_SQ_TEX_CLAMP_BORDER;
1870 case VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE:
1871 return V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL;
1872 default:
1873 unreachable("illegal tex wrap mode");
1874 break;
1875 }
1876 }
1877
1878 static unsigned
1879 radv_tex_compare(VkCompareOp op)
1880 {
1881 switch (op) {
1882 case VK_COMPARE_OP_NEVER:
1883 return V_008F30_SQ_TEX_DEPTH_COMPARE_NEVER;
1884 case VK_COMPARE_OP_LESS:
1885 return V_008F30_SQ_TEX_DEPTH_COMPARE_LESS;
1886 case VK_COMPARE_OP_EQUAL:
1887 return V_008F30_SQ_TEX_DEPTH_COMPARE_EQUAL;
1888 case VK_COMPARE_OP_LESS_OR_EQUAL:
1889 return V_008F30_SQ_TEX_DEPTH_COMPARE_LESSEQUAL;
1890 case VK_COMPARE_OP_GREATER:
1891 return V_008F30_SQ_TEX_DEPTH_COMPARE_GREATER;
1892 case VK_COMPARE_OP_NOT_EQUAL:
1893 return V_008F30_SQ_TEX_DEPTH_COMPARE_NOTEQUAL;
1894 case VK_COMPARE_OP_GREATER_OR_EQUAL:
1895 return V_008F30_SQ_TEX_DEPTH_COMPARE_GREATEREQUAL;
1896 case VK_COMPARE_OP_ALWAYS:
1897 return V_008F30_SQ_TEX_DEPTH_COMPARE_ALWAYS;
1898 default:
1899 unreachable("illegal compare mode");
1900 break;
1901 }
1902 }
1903
1904 static unsigned
1905 radv_tex_filter(VkFilter filter, unsigned max_ansio)
1906 {
1907 switch (filter) {
1908 case VK_FILTER_NEAREST:
1909 return (max_ansio > 1 ? V_008F38_SQ_TEX_XY_FILTER_ANISO_POINT :
1910 V_008F38_SQ_TEX_XY_FILTER_POINT);
1911 case VK_FILTER_LINEAR:
1912 return (max_ansio > 1 ? V_008F38_SQ_TEX_XY_FILTER_ANISO_BILINEAR :
1913 V_008F38_SQ_TEX_XY_FILTER_BILINEAR);
1914 case VK_FILTER_CUBIC_IMG:
1915 default:
1916 fprintf(stderr, "illegal texture filter");
1917 return 0;
1918 }
1919 }
1920
1921 static unsigned
1922 radv_tex_mipfilter(VkSamplerMipmapMode mode)
1923 {
1924 switch (mode) {
1925 case VK_SAMPLER_MIPMAP_MODE_NEAREST:
1926 return V_008F38_SQ_TEX_Z_FILTER_POINT;
1927 case VK_SAMPLER_MIPMAP_MODE_LINEAR:
1928 return V_008F38_SQ_TEX_Z_FILTER_LINEAR;
1929 default:
1930 return V_008F38_SQ_TEX_Z_FILTER_NONE;
1931 }
1932 }
1933
1934 static unsigned
1935 radv_tex_bordercolor(VkBorderColor bcolor)
1936 {
1937 switch (bcolor) {
1938 case VK_BORDER_COLOR_FLOAT_TRANSPARENT_BLACK:
1939 case VK_BORDER_COLOR_INT_TRANSPARENT_BLACK:
1940 return V_008F3C_SQ_TEX_BORDER_COLOR_TRANS_BLACK;
1941 case VK_BORDER_COLOR_FLOAT_OPAQUE_BLACK:
1942 case VK_BORDER_COLOR_INT_OPAQUE_BLACK:
1943 return V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_BLACK;
1944 case VK_BORDER_COLOR_FLOAT_OPAQUE_WHITE:
1945 case VK_BORDER_COLOR_INT_OPAQUE_WHITE:
1946 return V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_WHITE;
1947 default:
1948 break;
1949 }
1950 return 0;
1951 }
1952
1953 static unsigned
1954 radv_tex_aniso_filter(unsigned filter)
1955 {
1956 if (filter < 2)
1957 return 0;
1958 if (filter < 4)
1959 return 1;
1960 if (filter < 8)
1961 return 2;
1962 if (filter < 16)
1963 return 3;
1964 return 4;
1965 }
1966
1967 static void
1968 radv_init_sampler(struct radv_device *device,
1969 struct radv_sampler *sampler,
1970 const VkSamplerCreateInfo *pCreateInfo)
1971 {
1972 uint32_t max_aniso = pCreateInfo->anisotropyEnable && pCreateInfo->maxAnisotropy > 1.0 ?
1973 (uint32_t) pCreateInfo->maxAnisotropy : 0;
1974 uint32_t max_aniso_ratio = radv_tex_aniso_filter(max_aniso);
1975 bool is_vi = (device->instance->physicalDevice.rad_info.chip_class >= VI);
1976
1977 sampler->state[0] = (S_008F30_CLAMP_X(radv_tex_wrap(pCreateInfo->addressModeU)) |
1978 S_008F30_CLAMP_Y(radv_tex_wrap(pCreateInfo->addressModeV)) |
1979 S_008F30_CLAMP_Z(radv_tex_wrap(pCreateInfo->addressModeW)) |
1980 S_008F30_MAX_ANISO_RATIO(max_aniso_ratio) |
1981 S_008F30_DEPTH_COMPARE_FUNC(radv_tex_compare(pCreateInfo->compareOp)) |
1982 S_008F30_FORCE_UNNORMALIZED(pCreateInfo->unnormalizedCoordinates ? 1 : 0) |
1983 S_008F30_ANISO_THRESHOLD(max_aniso_ratio >> 1) |
1984 S_008F30_ANISO_BIAS(max_aniso_ratio) |
1985 S_008F30_DISABLE_CUBE_WRAP(0) |
1986 S_008F30_COMPAT_MODE(is_vi));
1987 sampler->state[1] = (S_008F34_MIN_LOD(S_FIXED(CLAMP(pCreateInfo->minLod, 0, 15), 8)) |
1988 S_008F34_MAX_LOD(S_FIXED(CLAMP(pCreateInfo->maxLod, 0, 15), 8)) |
1989 S_008F34_PERF_MIP(max_aniso_ratio ? max_aniso_ratio + 6 : 0));
1990 sampler->state[2] = (S_008F38_LOD_BIAS(S_FIXED(CLAMP(pCreateInfo->mipLodBias, -16, 16), 8)) |
1991 S_008F38_XY_MAG_FILTER(radv_tex_filter(pCreateInfo->magFilter, max_aniso)) |
1992 S_008F38_XY_MIN_FILTER(radv_tex_filter(pCreateInfo->minFilter, max_aniso)) |
1993 S_008F38_MIP_FILTER(radv_tex_mipfilter(pCreateInfo->mipmapMode)) |
1994 S_008F38_MIP_POINT_PRECLAMP(1) |
1995 S_008F38_DISABLE_LSB_CEIL(1) |
1996 S_008F38_FILTER_PREC_FIX(1) |
1997 S_008F38_ANISO_OVERRIDE(is_vi));
1998 sampler->state[3] = (S_008F3C_BORDER_COLOR_PTR(0) |
1999 S_008F3C_BORDER_COLOR_TYPE(radv_tex_bordercolor(pCreateInfo->borderColor)));
2000 }
2001
2002 VkResult radv_CreateSampler(
2003 VkDevice _device,
2004 const VkSamplerCreateInfo* pCreateInfo,
2005 const VkAllocationCallbacks* pAllocator,
2006 VkSampler* pSampler)
2007 {
2008 RADV_FROM_HANDLE(radv_device, device, _device);
2009 struct radv_sampler *sampler;
2010
2011 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
2012
2013 sampler = vk_alloc2(&device->alloc, pAllocator, sizeof(*sampler), 8,
2014 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
2015 if (!sampler)
2016 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2017
2018 radv_init_sampler(device, sampler, pCreateInfo);
2019 *pSampler = radv_sampler_to_handle(sampler);
2020
2021 return VK_SUCCESS;
2022 }
2023
2024 void radv_DestroySampler(
2025 VkDevice _device,
2026 VkSampler _sampler,
2027 const VkAllocationCallbacks* pAllocator)
2028 {
2029 RADV_FROM_HANDLE(radv_device, device, _device);
2030 RADV_FROM_HANDLE(radv_sampler, sampler, _sampler);
2031
2032 if (!sampler)
2033 return;
2034 vk_free2(&device->alloc, pAllocator, sampler);
2035 }
2036
2037
2038 /* vk_icd.h does not declare this function, so we declare it here to
2039 * suppress Wmissing-prototypes.
2040 */
2041 PUBLIC VKAPI_ATTR VkResult VKAPI_CALL
2042 vk_icdNegotiateLoaderICDInterfaceVersion(uint32_t *pSupportedVersion);
2043
2044 PUBLIC VKAPI_ATTR VkResult VKAPI_CALL
2045 vk_icdNegotiateLoaderICDInterfaceVersion(uint32_t *pSupportedVersion)
2046 {
2047 /* For the full details on loader interface versioning, see
2048 * <https://github.com/KhronosGroup/Vulkan-LoaderAndValidationLayers/blob/master/loader/LoaderAndLayerInterface.md>.
2049 * What follows is a condensed summary, to help you navigate the large and
2050 * confusing official doc.
2051 *
2052 * - Loader interface v0 is incompatible with later versions. We don't
2053 * support it.
2054 *
2055 * - In loader interface v1:
2056 * - The first ICD entrypoint called by the loader is
2057 * vk_icdGetInstanceProcAddr(). The ICD must statically expose this
2058 * entrypoint.
2059 * - The ICD must statically expose no other Vulkan symbol unless it is
2060 * linked with -Bsymbolic.
2061 * - Each dispatchable Vulkan handle created by the ICD must be
2062 * a pointer to a struct whose first member is VK_LOADER_DATA. The
2063 * ICD must initialize VK_LOADER_DATA.loadMagic to ICD_LOADER_MAGIC.
2064 * - The loader implements vkCreate{PLATFORM}SurfaceKHR() and
2065 * vkDestroySurfaceKHR(). The ICD must be capable of working with
2066 * such loader-managed surfaces.
2067 *
2068 * - Loader interface v2 differs from v1 in:
2069 * - The first ICD entrypoint called by the loader is
2070 * vk_icdNegotiateLoaderICDInterfaceVersion(). The ICD must
2071 * statically expose this entrypoint.
2072 *
2073 * - Loader interface v3 differs from v2 in:
2074 * - The ICD must implement vkCreate{PLATFORM}SurfaceKHR(),
2075 * vkDestroySurfaceKHR(), and other API which uses VKSurfaceKHR,
2076 * because the loader no longer does so.
2077 */
2078 *pSupportedVersion = MIN2(*pSupportedVersion, 3u);
2079 return VK_SUCCESS;
2080 }