2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
32 #include "radv_private.h"
33 #include "util/strtod.h"
37 #include <amdgpu_drm.h>
38 #include "amdgpu_id.h"
39 #include "winsys/amdgpu/radv_amdgpu_winsys_public.h"
40 #include "ac_llvm_util.h"
41 #include "vk_format.h"
43 #include "radv_timestamp.h"
44 #include "util/debug.h"
45 struct radv_dispatch_table dtable
;
48 radv_physical_device_init(struct radv_physical_device
*device
,
49 struct radv_instance
*instance
,
53 drmVersionPtr version
;
56 fd
= open(path
, O_RDWR
| O_CLOEXEC
);
58 return vk_errorf(VK_ERROR_INCOMPATIBLE_DRIVER
,
59 "failed to open %s: %m", path
);
61 version
= drmGetVersion(fd
);
64 return vk_errorf(VK_ERROR_INCOMPATIBLE_DRIVER
,
65 "failed to get version %s: %m", path
);
68 if (strcmp(version
->name
, "amdgpu")) {
69 drmFreeVersion(version
);
71 return VK_ERROR_INCOMPATIBLE_DRIVER
;
73 drmFreeVersion(version
);
75 device
->_loader_data
.loaderMagic
= ICD_LOADER_MAGIC
;
76 device
->instance
= instance
;
77 assert(strlen(path
) < ARRAY_SIZE(device
->path
));
78 strncpy(device
->path
, path
, ARRAY_SIZE(device
->path
));
80 device
->ws
= radv_amdgpu_winsys_create(fd
);
82 result
= VK_ERROR_INCOMPATIBLE_DRIVER
;
85 device
->ws
->query_info(device
->ws
, &device
->rad_info
);
86 result
= radv_init_wsi(device
);
87 if (result
!= VK_SUCCESS
) {
88 device
->ws
->destroy(device
->ws
);
92 fprintf(stderr
, "WARNING: radv is not a conformant vulkan implementation, testing use only.\n");
93 device
->name
= device
->rad_info
.name
;
102 radv_physical_device_finish(struct radv_physical_device
*device
)
104 radv_finish_wsi(device
);
105 device
->ws
->destroy(device
->ws
);
108 static const VkExtensionProperties global_extensions
[] = {
110 .extensionName
= VK_KHR_SURFACE_EXTENSION_NAME
,
113 #ifdef VK_USE_PLATFORM_XCB_KHR
115 .extensionName
= VK_KHR_XCB_SURFACE_EXTENSION_NAME
,
119 #ifdef VK_USE_PLATFORM_XLIB_KHR
121 .extensionName
= VK_KHR_XLIB_SURFACE_EXTENSION_NAME
,
125 #ifdef VK_USE_PLATFORM_WAYLAND_KHR
127 .extensionName
= VK_KHR_WAYLAND_SURFACE_EXTENSION_NAME
,
133 static const VkExtensionProperties device_extensions
[] = {
135 .extensionName
= VK_KHR_SWAPCHAIN_EXTENSION_NAME
,
141 default_alloc_func(void *pUserData
, size_t size
, size_t align
,
142 VkSystemAllocationScope allocationScope
)
148 default_realloc_func(void *pUserData
, void *pOriginal
, size_t size
,
149 size_t align
, VkSystemAllocationScope allocationScope
)
151 return realloc(pOriginal
, size
);
155 default_free_func(void *pUserData
, void *pMemory
)
160 static const VkAllocationCallbacks default_alloc
= {
162 .pfnAllocation
= default_alloc_func
,
163 .pfnReallocation
= default_realloc_func
,
164 .pfnFree
= default_free_func
,
167 VkResult
radv_CreateInstance(
168 const VkInstanceCreateInfo
* pCreateInfo
,
169 const VkAllocationCallbacks
* pAllocator
,
170 VkInstance
* pInstance
)
172 struct radv_instance
*instance
;
174 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO
);
176 uint32_t client_version
;
177 if (pCreateInfo
->pApplicationInfo
&&
178 pCreateInfo
->pApplicationInfo
->apiVersion
!= 0) {
179 client_version
= pCreateInfo
->pApplicationInfo
->apiVersion
;
181 client_version
= VK_MAKE_VERSION(1, 0, 0);
184 if (VK_MAKE_VERSION(1, 0, 0) > client_version
||
185 client_version
> VK_MAKE_VERSION(1, 0, 0xfff)) {
186 return vk_errorf(VK_ERROR_INCOMPATIBLE_DRIVER
,
187 "Client requested version %d.%d.%d",
188 VK_VERSION_MAJOR(client_version
),
189 VK_VERSION_MINOR(client_version
),
190 VK_VERSION_PATCH(client_version
));
193 for (uint32_t i
= 0; i
< pCreateInfo
->enabledExtensionCount
; i
++) {
195 for (uint32_t j
= 0; j
< ARRAY_SIZE(global_extensions
); j
++) {
196 if (strcmp(pCreateInfo
->ppEnabledExtensionNames
[i
],
197 global_extensions
[j
].extensionName
) == 0) {
203 return vk_error(VK_ERROR_EXTENSION_NOT_PRESENT
);
206 instance
= vk_alloc2(&default_alloc
, pAllocator
, sizeof(*instance
), 8,
207 VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE
);
209 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
211 instance
->_loader_data
.loaderMagic
= ICD_LOADER_MAGIC
;
214 instance
->alloc
= *pAllocator
;
216 instance
->alloc
= default_alloc
;
218 instance
->apiVersion
= client_version
;
219 instance
->physicalDeviceCount
= -1;
223 VG(VALGRIND_CREATE_MEMPOOL(instance
, 0, false));
225 *pInstance
= radv_instance_to_handle(instance
);
230 void radv_DestroyInstance(
231 VkInstance _instance
,
232 const VkAllocationCallbacks
* pAllocator
)
234 RADV_FROM_HANDLE(radv_instance
, instance
, _instance
);
236 if (instance
->physicalDeviceCount
> 0) {
237 /* We support at most one physical device. */
238 assert(instance
->physicalDeviceCount
== 1);
239 radv_physical_device_finish(&instance
->physicalDevice
);
242 VG(VALGRIND_DESTROY_MEMPOOL(instance
));
246 vk_free(&instance
->alloc
, instance
);
249 VkResult
radv_EnumeratePhysicalDevices(
250 VkInstance _instance
,
251 uint32_t* pPhysicalDeviceCount
,
252 VkPhysicalDevice
* pPhysicalDevices
)
254 RADV_FROM_HANDLE(radv_instance
, instance
, _instance
);
257 if (instance
->physicalDeviceCount
< 0) {
259 for (unsigned i
= 0; i
< 8; i
++) {
260 snprintf(path
, sizeof(path
), "/dev/dri/renderD%d", 128 + i
);
261 result
= radv_physical_device_init(&instance
->physicalDevice
,
263 if (result
!= VK_ERROR_INCOMPATIBLE_DRIVER
)
267 if (result
== VK_ERROR_INCOMPATIBLE_DRIVER
) {
268 instance
->physicalDeviceCount
= 0;
269 } else if (result
== VK_SUCCESS
) {
270 instance
->physicalDeviceCount
= 1;
276 /* pPhysicalDeviceCount is an out parameter if pPhysicalDevices is NULL;
277 * otherwise it's an inout parameter.
279 * The Vulkan spec (git aaed022) says:
281 * pPhysicalDeviceCount is a pointer to an unsigned integer variable
282 * that is initialized with the number of devices the application is
283 * prepared to receive handles to. pname:pPhysicalDevices is pointer to
284 * an array of at least this many VkPhysicalDevice handles [...].
286 * Upon success, if pPhysicalDevices is NULL, vkEnumeratePhysicalDevices
287 * overwrites the contents of the variable pointed to by
288 * pPhysicalDeviceCount with the number of physical devices in in the
289 * instance; otherwise, vkEnumeratePhysicalDevices overwrites
290 * pPhysicalDeviceCount with the number of physical handles written to
293 if (!pPhysicalDevices
) {
294 *pPhysicalDeviceCount
= instance
->physicalDeviceCount
;
295 } else if (*pPhysicalDeviceCount
>= 1) {
296 pPhysicalDevices
[0] = radv_physical_device_to_handle(&instance
->physicalDevice
);
297 *pPhysicalDeviceCount
= 1;
298 } else if (*pPhysicalDeviceCount
< instance
->physicalDeviceCount
) {
299 return VK_INCOMPLETE
;
301 *pPhysicalDeviceCount
= 0;
307 void radv_GetPhysicalDeviceFeatures(
308 VkPhysicalDevice physicalDevice
,
309 VkPhysicalDeviceFeatures
* pFeatures
)
311 // RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
313 memset(pFeatures
, 0, sizeof(*pFeatures
));
315 *pFeatures
= (VkPhysicalDeviceFeatures
) {
316 .robustBufferAccess
= true,
317 .fullDrawIndexUint32
= true,
318 .imageCubeArray
= true,
319 .independentBlend
= true,
320 .geometryShader
= false,
321 .tessellationShader
= false,
322 .sampleRateShading
= false,
323 .dualSrcBlend
= true,
325 .multiDrawIndirect
= true,
326 .drawIndirectFirstInstance
= true,
328 .depthBiasClamp
= true,
329 .fillModeNonSolid
= true,
334 .multiViewport
= false,
335 .samplerAnisotropy
= false, /* FINISHME */
336 .textureCompressionETC2
= false,
337 .textureCompressionASTC_LDR
= false,
338 .textureCompressionBC
= true,
339 .occlusionQueryPrecise
= true,
340 .pipelineStatisticsQuery
= false,
341 .vertexPipelineStoresAndAtomics
= true,
342 .fragmentStoresAndAtomics
= true,
343 .shaderTessellationAndGeometryPointSize
= true,
344 .shaderImageGatherExtended
= false,
345 .shaderStorageImageExtendedFormats
= false,
346 .shaderStorageImageMultisample
= false,
347 .shaderUniformBufferArrayDynamicIndexing
= true,
348 .shaderSampledImageArrayDynamicIndexing
= true,
349 .shaderStorageBufferArrayDynamicIndexing
= true,
350 .shaderStorageImageArrayDynamicIndexing
= true,
351 .shaderStorageImageReadWithoutFormat
= false,
352 .shaderStorageImageWriteWithoutFormat
= true,
353 .shaderClipDistance
= true,
354 .shaderCullDistance
= true,
355 .shaderFloat64
= false,
356 .shaderInt64
= false,
357 .shaderInt16
= false,
359 .variableMultisampleRate
= false,
360 .inheritedQueries
= false,
365 radv_device_get_cache_uuid(void *uuid
)
367 memset(uuid
, 0, VK_UUID_SIZE
);
368 snprintf(uuid
, VK_UUID_SIZE
, "radv-%s", RADV_TIMESTAMP
);
371 void radv_GetPhysicalDeviceProperties(
372 VkPhysicalDevice physicalDevice
,
373 VkPhysicalDeviceProperties
* pProperties
)
375 RADV_FROM_HANDLE(radv_physical_device
, pdevice
, physicalDevice
);
376 VkSampleCountFlags sample_counts
= 0xf;
377 VkPhysicalDeviceLimits limits
= {
378 .maxImageDimension1D
= (1 << 14),
379 .maxImageDimension2D
= (1 << 14),
380 .maxImageDimension3D
= (1 << 11),
381 .maxImageDimensionCube
= (1 << 14),
382 .maxImageArrayLayers
= (1 << 11),
383 .maxTexelBufferElements
= 128 * 1024 * 1024,
384 .maxUniformBufferRange
= UINT32_MAX
,
385 .maxStorageBufferRange
= UINT32_MAX
,
386 .maxPushConstantsSize
= MAX_PUSH_CONSTANTS_SIZE
,
387 .maxMemoryAllocationCount
= UINT32_MAX
,
388 .maxSamplerAllocationCount
= 64 * 1024,
389 .bufferImageGranularity
= 64, /* A cache line */
390 .sparseAddressSpaceSize
= 0,
391 .maxBoundDescriptorSets
= MAX_SETS
,
392 .maxPerStageDescriptorSamplers
= 64,
393 .maxPerStageDescriptorUniformBuffers
= 64,
394 .maxPerStageDescriptorStorageBuffers
= 64,
395 .maxPerStageDescriptorSampledImages
= 64,
396 .maxPerStageDescriptorStorageImages
= 64,
397 .maxPerStageDescriptorInputAttachments
= 64,
398 .maxPerStageResources
= 128,
399 .maxDescriptorSetSamplers
= 256,
400 .maxDescriptorSetUniformBuffers
= 256,
401 .maxDescriptorSetUniformBuffersDynamic
= 256,
402 .maxDescriptorSetStorageBuffers
= 256,
403 .maxDescriptorSetStorageBuffersDynamic
= 256,
404 .maxDescriptorSetSampledImages
= 256,
405 .maxDescriptorSetStorageImages
= 256,
406 .maxDescriptorSetInputAttachments
= 256,
407 .maxVertexInputAttributes
= 32,
408 .maxVertexInputBindings
= 32,
409 .maxVertexInputAttributeOffset
= 2047,
410 .maxVertexInputBindingStride
= 2048,
411 .maxVertexOutputComponents
= 128,
412 .maxTessellationGenerationLevel
= 0,
413 .maxTessellationPatchSize
= 0,
414 .maxTessellationControlPerVertexInputComponents
= 0,
415 .maxTessellationControlPerVertexOutputComponents
= 0,
416 .maxTessellationControlPerPatchOutputComponents
= 0,
417 .maxTessellationControlTotalOutputComponents
= 0,
418 .maxTessellationEvaluationInputComponents
= 0,
419 .maxTessellationEvaluationOutputComponents
= 0,
420 .maxGeometryShaderInvocations
= 32,
421 .maxGeometryInputComponents
= 64,
422 .maxGeometryOutputComponents
= 128,
423 .maxGeometryOutputVertices
= 256,
424 .maxGeometryTotalOutputComponents
= 1024,
425 .maxFragmentInputComponents
= 128,
426 .maxFragmentOutputAttachments
= 8,
427 .maxFragmentDualSrcAttachments
= 2,
428 .maxFragmentCombinedOutputResources
= 8,
429 .maxComputeSharedMemorySize
= 32768,
430 .maxComputeWorkGroupCount
= { 65535, 65535, 65535 },
431 .maxComputeWorkGroupInvocations
= 16 * 1024,
432 .maxComputeWorkGroupSize
= {
433 16 * 1024/*devinfo->max_cs_threads*/,
437 .subPixelPrecisionBits
= 4 /* FIXME */,
438 .subTexelPrecisionBits
= 4 /* FIXME */,
439 .mipmapPrecisionBits
= 4 /* FIXME */,
440 .maxDrawIndexedIndexValue
= UINT32_MAX
,
441 .maxDrawIndirectCount
= UINT32_MAX
,
442 .maxSamplerLodBias
= 16,
443 .maxSamplerAnisotropy
= 16,
444 .maxViewports
= MAX_VIEWPORTS
,
445 .maxViewportDimensions
= { (1 << 14), (1 << 14) },
446 .viewportBoundsRange
= { INT16_MIN
, INT16_MAX
},
447 .viewportSubPixelBits
= 13, /* We take a float? */
448 .minMemoryMapAlignment
= 4096, /* A page */
449 .minTexelBufferOffsetAlignment
= 1,
450 .minUniformBufferOffsetAlignment
= 4,
451 .minStorageBufferOffsetAlignment
= 4,
452 .minTexelOffset
= -8,
454 .minTexelGatherOffset
= -8,
455 .maxTexelGatherOffset
= 7,
456 .minInterpolationOffset
= 0, /* FIXME */
457 .maxInterpolationOffset
= 0, /* FIXME */
458 .subPixelInterpolationOffsetBits
= 0, /* FIXME */
459 .maxFramebufferWidth
= (1 << 14),
460 .maxFramebufferHeight
= (1 << 14),
461 .maxFramebufferLayers
= (1 << 10),
462 .framebufferColorSampleCounts
= sample_counts
,
463 .framebufferDepthSampleCounts
= sample_counts
,
464 .framebufferStencilSampleCounts
= sample_counts
,
465 .framebufferNoAttachmentsSampleCounts
= sample_counts
,
466 .maxColorAttachments
= MAX_RTS
,
467 .sampledImageColorSampleCounts
= sample_counts
,
468 .sampledImageIntegerSampleCounts
= VK_SAMPLE_COUNT_1_BIT
,
469 .sampledImageDepthSampleCounts
= sample_counts
,
470 .sampledImageStencilSampleCounts
= sample_counts
,
471 .storageImageSampleCounts
= VK_SAMPLE_COUNT_1_BIT
,
472 .maxSampleMaskWords
= 1,
473 .timestampComputeAndGraphics
= false,
474 .timestampPeriod
= 100000.0 / pdevice
->rad_info
.clock_crystal_freq
,
475 .maxClipDistances
= 8,
476 .maxCullDistances
= 8,
477 .maxCombinedClipAndCullDistances
= 8,
478 .discreteQueuePriorities
= 1,
479 .pointSizeRange
= { 0.125, 255.875 },
480 .lineWidthRange
= { 0.0, 7.9921875 },
481 .pointSizeGranularity
= (1.0 / 8.0),
482 .lineWidthGranularity
= (1.0 / 128.0),
483 .strictLines
= false, /* FINISHME */
484 .standardSampleLocations
= true,
485 .optimalBufferCopyOffsetAlignment
= 128,
486 .optimalBufferCopyRowPitchAlignment
= 128,
487 .nonCoherentAtomSize
= 64,
490 *pProperties
= (VkPhysicalDeviceProperties
) {
491 .apiVersion
= VK_MAKE_VERSION(1, 0, 5),
494 .deviceID
= pdevice
->rad_info
.pci_id
,
495 .deviceType
= VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU
,
497 .sparseProperties
= {0}, /* Broadwell doesn't do sparse. */
500 strcpy(pProperties
->deviceName
, pdevice
->name
);
501 radv_device_get_cache_uuid(pProperties
->pipelineCacheUUID
);
504 void radv_GetPhysicalDeviceQueueFamilyProperties(
505 VkPhysicalDevice physicalDevice
,
507 VkQueueFamilyProperties
* pQueueFamilyProperties
)
509 if (pQueueFamilyProperties
== NULL
) {
513 assert(*pCount
>= 1);
515 *pQueueFamilyProperties
= (VkQueueFamilyProperties
) {
516 .queueFlags
= VK_QUEUE_GRAPHICS_BIT
|
517 VK_QUEUE_COMPUTE_BIT
|
518 VK_QUEUE_TRANSFER_BIT
,
520 .timestampValidBits
= 64,
521 .minImageTransferGranularity
= (VkExtent3D
) { 1, 1, 1 },
525 void radv_GetPhysicalDeviceMemoryProperties(
526 VkPhysicalDevice physicalDevice
,
527 VkPhysicalDeviceMemoryProperties
* pMemoryProperties
)
529 RADV_FROM_HANDLE(radv_physical_device
, physical_device
, physicalDevice
);
531 pMemoryProperties
->memoryTypeCount
= 4;
532 pMemoryProperties
->memoryTypes
[0] = (VkMemoryType
) {
533 .propertyFlags
= VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT
,
536 pMemoryProperties
->memoryTypes
[1] = (VkMemoryType
) {
537 .propertyFlags
= VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT
|
538 VK_MEMORY_PROPERTY_HOST_COHERENT_BIT
,
541 pMemoryProperties
->memoryTypes
[2] = (VkMemoryType
) {
542 .propertyFlags
= VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT
|
543 VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT
|
544 VK_MEMORY_PROPERTY_HOST_COHERENT_BIT
,
547 pMemoryProperties
->memoryTypes
[3] = (VkMemoryType
) {
548 .propertyFlags
= VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT
|
549 VK_MEMORY_PROPERTY_HOST_COHERENT_BIT
|
550 VK_MEMORY_PROPERTY_HOST_CACHED_BIT
,
554 pMemoryProperties
->memoryHeapCount
= 3;
555 pMemoryProperties
->memoryHeaps
[0] = (VkMemoryHeap
) {
556 .size
= physical_device
->rad_info
.vram_size
-
557 physical_device
->rad_info
.visible_vram_size
,
558 .flags
= VK_MEMORY_HEAP_DEVICE_LOCAL_BIT
,
560 pMemoryProperties
->memoryHeaps
[1] = (VkMemoryHeap
) {
561 .size
= physical_device
->rad_info
.visible_vram_size
,
562 .flags
= VK_MEMORY_HEAP_DEVICE_LOCAL_BIT
,
564 pMemoryProperties
->memoryHeaps
[2] = (VkMemoryHeap
) {
565 .size
= physical_device
->rad_info
.gart_size
,
571 radv_queue_init(struct radv_device
*device
, struct radv_queue
*queue
)
573 queue
->_loader_data
.loaderMagic
= ICD_LOADER_MAGIC
;
574 queue
->device
= device
;
580 radv_queue_finish(struct radv_queue
*queue
)
584 VkResult
radv_CreateDevice(
585 VkPhysicalDevice physicalDevice
,
586 const VkDeviceCreateInfo
* pCreateInfo
,
587 const VkAllocationCallbacks
* pAllocator
,
590 RADV_FROM_HANDLE(radv_physical_device
, physical_device
, physicalDevice
);
592 struct radv_device
*device
;
594 for (uint32_t i
= 0; i
< pCreateInfo
->enabledExtensionCount
; i
++) {
596 for (uint32_t j
= 0; j
< ARRAY_SIZE(device_extensions
); j
++) {
597 if (strcmp(pCreateInfo
->ppEnabledExtensionNames
[i
],
598 device_extensions
[j
].extensionName
) == 0) {
604 return vk_error(VK_ERROR_EXTENSION_NOT_PRESENT
);
607 device
= vk_alloc2(&physical_device
->instance
->alloc
, pAllocator
,
609 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE
);
611 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
613 device
->_loader_data
.loaderMagic
= ICD_LOADER_MAGIC
;
614 device
->instance
= physical_device
->instance
;
616 device
->ws
= physical_device
->ws
;
618 device
->alloc
= *pAllocator
;
620 device
->alloc
= physical_device
->instance
->alloc
;
622 device
->hw_ctx
= device
->ws
->ctx_create(device
->ws
);
623 if (!device
->hw_ctx
) {
624 result
= VK_ERROR_OUT_OF_HOST_MEMORY
;
628 radv_queue_init(device
, &device
->queue
);
630 result
= radv_device_init_meta(device
);
631 if (result
!= VK_SUCCESS
) {
632 device
->ws
->ctx_destroy(device
->hw_ctx
);
635 device
->allow_fast_clears
= env_var_as_boolean("RADV_FAST_CLEARS", false);
636 device
->allow_dcc
= !env_var_as_boolean("RADV_DCC_DISABLE", false);
638 if (device
->allow_fast_clears
&& device
->allow_dcc
)
639 radv_finishme("DCC fast clears have not been tested\n");
641 radv_device_init_msaa(device
);
642 device
->empty_cs
= device
->ws
->cs_create(device
->ws
, RING_GFX
);
643 radeon_emit(device
->empty_cs
, PKT3(PKT3_CONTEXT_CONTROL
, 1, 0));
644 radeon_emit(device
->empty_cs
, CONTEXT_CONTROL_LOAD_ENABLE(1));
645 radeon_emit(device
->empty_cs
, CONTEXT_CONTROL_SHADOW_ENABLE(1));
646 device
->ws
->cs_finalize(device
->empty_cs
);
647 *pDevice
= radv_device_to_handle(device
);
650 vk_free(&device
->alloc
, device
);
654 void radv_DestroyDevice(
656 const VkAllocationCallbacks
* pAllocator
)
658 RADV_FROM_HANDLE(radv_device
, device
, _device
);
660 device
->ws
->ctx_destroy(device
->hw_ctx
);
661 radv_queue_finish(&device
->queue
);
662 radv_device_finish_meta(device
);
664 vk_free(&device
->alloc
, device
);
667 VkResult
radv_EnumerateInstanceExtensionProperties(
668 const char* pLayerName
,
669 uint32_t* pPropertyCount
,
670 VkExtensionProperties
* pProperties
)
673 if (pProperties
== NULL
) {
674 *pPropertyCount
= ARRAY_SIZE(global_extensions
);
678 for (i
= 0; i
< *pPropertyCount
; i
++)
679 memcpy(&pProperties
[i
], &global_extensions
[i
], sizeof(VkExtensionProperties
));
682 if (i
< ARRAY_SIZE(global_extensions
))
683 return VK_INCOMPLETE
;
688 VkResult
radv_EnumerateDeviceExtensionProperties(
689 VkPhysicalDevice physicalDevice
,
690 const char* pLayerName
,
691 uint32_t* pPropertyCount
,
692 VkExtensionProperties
* pProperties
)
696 if (pProperties
== NULL
) {
697 *pPropertyCount
= ARRAY_SIZE(device_extensions
);
701 for (i
= 0; i
< *pPropertyCount
; i
++)
702 memcpy(&pProperties
[i
], &device_extensions
[i
], sizeof(VkExtensionProperties
));
705 if (i
< ARRAY_SIZE(device_extensions
))
706 return VK_INCOMPLETE
;
710 VkResult
radv_EnumerateInstanceLayerProperties(
711 uint32_t* pPropertyCount
,
712 VkLayerProperties
* pProperties
)
714 if (pProperties
== NULL
) {
719 /* None supported at this time */
720 return vk_error(VK_ERROR_LAYER_NOT_PRESENT
);
723 VkResult
radv_EnumerateDeviceLayerProperties(
724 VkPhysicalDevice physicalDevice
,
725 uint32_t* pPropertyCount
,
726 VkLayerProperties
* pProperties
)
728 if (pProperties
== NULL
) {
733 /* None supported at this time */
734 return vk_error(VK_ERROR_LAYER_NOT_PRESENT
);
737 void radv_GetDeviceQueue(
739 uint32_t queueNodeIndex
,
743 RADV_FROM_HANDLE(radv_device
, device
, _device
);
745 assert(queueIndex
== 0);
747 *pQueue
= radv_queue_to_handle(&device
->queue
);
750 VkResult
radv_QueueSubmit(
752 uint32_t submitCount
,
753 const VkSubmitInfo
* pSubmits
,
756 RADV_FROM_HANDLE(radv_queue
, queue
, _queue
);
757 RADV_FROM_HANDLE(radv_fence
, fence
, _fence
);
758 struct radeon_winsys_fence
*base_fence
= fence
? fence
->fence
: NULL
;
759 struct radeon_winsys_ctx
*ctx
= queue
->device
->hw_ctx
;
762 for (uint32_t i
= 0; i
< submitCount
; i
++) {
763 struct radeon_winsys_cs
**cs_array
;
764 bool can_patch
= true;
766 if (!pSubmits
[i
].commandBufferCount
)
769 cs_array
= malloc(sizeof(struct radeon_winsys_cs
*) *
770 pSubmits
[i
].commandBufferCount
);
772 for (uint32_t j
= 0; j
< pSubmits
[i
].commandBufferCount
; j
++) {
773 RADV_FROM_HANDLE(radv_cmd_buffer
, cmd_buffer
,
774 pSubmits
[i
].pCommandBuffers
[j
]);
775 assert(cmd_buffer
->level
== VK_COMMAND_BUFFER_LEVEL_PRIMARY
);
777 cs_array
[j
] = cmd_buffer
->cs
;
778 if ((cmd_buffer
->usage_flags
& VK_COMMAND_BUFFER_USAGE_SIMULTANEOUS_USE_BIT
))
781 ret
= queue
->device
->ws
->cs_submit(ctx
, cs_array
,
782 pSubmits
[i
].commandBufferCount
,
783 can_patch
, base_fence
);
785 radv_loge("failed to submit CS %d\n", i
);
791 ret
= queue
->device
->ws
->cs_submit(ctx
, &queue
->device
->empty_cs
,
792 1, false, base_fence
);
794 fence
->submitted
= true;
800 VkResult
radv_QueueWaitIdle(
803 RADV_FROM_HANDLE(radv_queue
, queue
, _queue
);
805 queue
->device
->ws
->ctx_wait_idle(queue
->device
->hw_ctx
);
809 VkResult
radv_DeviceWaitIdle(
812 RADV_FROM_HANDLE(radv_device
, device
, _device
);
814 device
->ws
->ctx_wait_idle(device
->hw_ctx
);
818 PFN_vkVoidFunction
radv_GetInstanceProcAddr(
822 return radv_lookup_entrypoint(pName
);
825 /* The loader wants us to expose a second GetInstanceProcAddr function
826 * to work around certain LD_PRELOAD issues seen in apps.
829 VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL
vk_icdGetInstanceProcAddr(
834 VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL
vk_icdGetInstanceProcAddr(
838 return radv_GetInstanceProcAddr(instance
, pName
);
841 PFN_vkVoidFunction
radv_GetDeviceProcAddr(
845 return radv_lookup_entrypoint(pName
);
848 VkResult
radv_AllocateMemory(
850 const VkMemoryAllocateInfo
* pAllocateInfo
,
851 const VkAllocationCallbacks
* pAllocator
,
852 VkDeviceMemory
* pMem
)
854 RADV_FROM_HANDLE(radv_device
, device
, _device
);
855 struct radv_device_memory
*mem
;
857 enum radeon_bo_domain domain
;
859 assert(pAllocateInfo
->sType
== VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO
);
861 if (pAllocateInfo
->allocationSize
== 0) {
862 /* Apparently, this is allowed */
863 *pMem
= VK_NULL_HANDLE
;
867 mem
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*mem
), 8,
868 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
870 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
872 uint64_t alloc_size
= align_u64(pAllocateInfo
->allocationSize
, 4096);
873 if (pAllocateInfo
->memoryTypeIndex
== 1 || pAllocateInfo
->memoryTypeIndex
== 3)
874 domain
= RADEON_DOMAIN_GTT
;
876 domain
= RADEON_DOMAIN_VRAM
;
878 if (pAllocateInfo
->memoryTypeIndex
== 0)
879 flags
|= RADEON_FLAG_NO_CPU_ACCESS
;
881 flags
|= RADEON_FLAG_CPU_ACCESS
;
883 if (pAllocateInfo
->memoryTypeIndex
== 1)
884 flags
|= RADEON_FLAG_GTT_WC
;
886 mem
->bo
= device
->ws
->buffer_create(device
->ws
, alloc_size
, 32768,
890 result
= VK_ERROR_OUT_OF_DEVICE_MEMORY
;
893 mem
->type_index
= pAllocateInfo
->memoryTypeIndex
;
895 *pMem
= radv_device_memory_to_handle(mem
);
900 vk_free2(&device
->alloc
, pAllocator
, mem
);
905 void radv_FreeMemory(
908 const VkAllocationCallbacks
* pAllocator
)
910 RADV_FROM_HANDLE(radv_device
, device
, _device
);
911 RADV_FROM_HANDLE(radv_device_memory
, mem
, _mem
);
916 device
->ws
->buffer_destroy(mem
->bo
);
919 vk_free2(&device
->alloc
, pAllocator
, mem
);
922 VkResult
radv_MapMemory(
924 VkDeviceMemory _memory
,
927 VkMemoryMapFlags flags
,
930 RADV_FROM_HANDLE(radv_device
, device
, _device
);
931 RADV_FROM_HANDLE(radv_device_memory
, mem
, _memory
);
938 *ppData
= device
->ws
->buffer_map(mem
->bo
);
944 return VK_ERROR_MEMORY_MAP_FAILED
;
947 void radv_UnmapMemory(
949 VkDeviceMemory _memory
)
951 RADV_FROM_HANDLE(radv_device
, device
, _device
);
952 RADV_FROM_HANDLE(radv_device_memory
, mem
, _memory
);
957 device
->ws
->buffer_unmap(mem
->bo
);
960 VkResult
radv_FlushMappedMemoryRanges(
962 uint32_t memoryRangeCount
,
963 const VkMappedMemoryRange
* pMemoryRanges
)
968 VkResult
radv_InvalidateMappedMemoryRanges(
970 uint32_t memoryRangeCount
,
971 const VkMappedMemoryRange
* pMemoryRanges
)
976 void radv_GetBufferMemoryRequirements(
979 VkMemoryRequirements
* pMemoryRequirements
)
981 RADV_FROM_HANDLE(radv_buffer
, buffer
, _buffer
);
983 /* The Vulkan spec (git aaed022) says:
985 * memoryTypeBits is a bitfield and contains one bit set for every
986 * supported memory type for the resource. The bit `1<<i` is set if and
987 * only if the memory type `i` in the VkPhysicalDeviceMemoryProperties
988 * structure for the physical device is supported.
990 * We support exactly one memory type.
992 pMemoryRequirements
->memoryTypeBits
= 0x7;
994 pMemoryRequirements
->size
= buffer
->size
;
995 pMemoryRequirements
->alignment
= 16;
998 void radv_GetImageMemoryRequirements(
1001 VkMemoryRequirements
* pMemoryRequirements
)
1003 RADV_FROM_HANDLE(radv_image
, image
, _image
);
1005 /* The Vulkan spec (git aaed022) says:
1007 * memoryTypeBits is a bitfield and contains one bit set for every
1008 * supported memory type for the resource. The bit `1<<i` is set if and
1009 * only if the memory type `i` in the VkPhysicalDeviceMemoryProperties
1010 * structure for the physical device is supported.
1012 * We support exactly one memory type.
1014 pMemoryRequirements
->memoryTypeBits
= 0x7;
1016 pMemoryRequirements
->size
= image
->size
;
1017 pMemoryRequirements
->alignment
= image
->alignment
;
1020 void radv_GetImageSparseMemoryRequirements(
1023 uint32_t* pSparseMemoryRequirementCount
,
1024 VkSparseImageMemoryRequirements
* pSparseMemoryRequirements
)
1029 void radv_GetDeviceMemoryCommitment(
1031 VkDeviceMemory memory
,
1032 VkDeviceSize
* pCommittedMemoryInBytes
)
1034 *pCommittedMemoryInBytes
= 0;
1037 VkResult
radv_BindBufferMemory(
1040 VkDeviceMemory _memory
,
1041 VkDeviceSize memoryOffset
)
1043 RADV_FROM_HANDLE(radv_device_memory
, mem
, _memory
);
1044 RADV_FROM_HANDLE(radv_buffer
, buffer
, _buffer
);
1047 buffer
->bo
= mem
->bo
;
1048 buffer
->offset
= memoryOffset
;
1057 VkResult
radv_BindImageMemory(
1060 VkDeviceMemory _memory
,
1061 VkDeviceSize memoryOffset
)
1063 RADV_FROM_HANDLE(radv_device_memory
, mem
, _memory
);
1064 RADV_FROM_HANDLE(radv_image
, image
, _image
);
1067 image
->bo
= mem
->bo
;
1068 image
->offset
= memoryOffset
;
1077 VkResult
radv_QueueBindSparse(
1079 uint32_t bindInfoCount
,
1080 const VkBindSparseInfo
* pBindInfo
,
1083 stub_return(VK_ERROR_INCOMPATIBLE_DRIVER
);
1086 VkResult
radv_CreateFence(
1088 const VkFenceCreateInfo
* pCreateInfo
,
1089 const VkAllocationCallbacks
* pAllocator
,
1092 RADV_FROM_HANDLE(radv_device
, device
, _device
);
1093 struct radv_fence
*fence
= vk_alloc2(&device
->alloc
, pAllocator
,
1095 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1098 return VK_ERROR_OUT_OF_HOST_MEMORY
;
1100 memset(fence
, 0, sizeof(*fence
));
1101 fence
->submitted
= false;
1102 fence
->signalled
= !!(pCreateInfo
->flags
& VK_FENCE_CREATE_SIGNALED_BIT
);
1103 fence
->fence
= device
->ws
->create_fence();
1106 *pFence
= radv_fence_to_handle(fence
);
1111 void radv_DestroyFence(
1114 const VkAllocationCallbacks
* pAllocator
)
1116 RADV_FROM_HANDLE(radv_device
, device
, _device
);
1117 RADV_FROM_HANDLE(radv_fence
, fence
, _fence
);
1121 device
->ws
->destroy_fence(fence
->fence
);
1122 vk_free2(&device
->alloc
, pAllocator
, fence
);
1125 static uint64_t radv_get_absolute_timeout(uint64_t timeout
)
1127 uint64_t current_time
;
1130 clock_gettime(CLOCK_MONOTONIC
, &tv
);
1131 current_time
= tv
.tv_nsec
+ tv
.tv_sec
*1000000000ull;
1133 timeout
= MIN2(UINT64_MAX
- current_time
, timeout
);
1135 return current_time
+ timeout
;
1138 VkResult
radv_WaitForFences(
1140 uint32_t fenceCount
,
1141 const VkFence
* pFences
,
1145 RADV_FROM_HANDLE(radv_device
, device
, _device
);
1146 timeout
= radv_get_absolute_timeout(timeout
);
1148 if (!waitAll
&& fenceCount
> 1) {
1149 fprintf(stderr
, "radv: WaitForFences without waitAll not implemented yet\n");
1152 for (uint32_t i
= 0; i
< fenceCount
; ++i
) {
1153 RADV_FROM_HANDLE(radv_fence
, fence
, pFences
[i
]);
1154 bool expired
= false;
1156 if (fence
->signalled
)
1159 if (!fence
->submitted
)
1162 expired
= device
->ws
->fence_wait(device
->ws
, fence
->fence
, true, timeout
);
1166 fence
->signalled
= true;
1172 VkResult
radv_ResetFences(VkDevice device
,
1173 uint32_t fenceCount
,
1174 const VkFence
*pFences
)
1176 for (unsigned i
= 0; i
< fenceCount
; ++i
) {
1177 RADV_FROM_HANDLE(radv_fence
, fence
, pFences
[i
]);
1178 fence
->submitted
= fence
->signalled
= false;
1184 VkResult
radv_GetFenceStatus(VkDevice _device
, VkFence _fence
)
1186 RADV_FROM_HANDLE(radv_device
, device
, _device
);
1187 RADV_FROM_HANDLE(radv_fence
, fence
, _fence
);
1189 if (fence
->signalled
)
1191 if (!fence
->submitted
)
1192 return VK_NOT_READY
;
1194 if (!device
->ws
->fence_wait(device
->ws
, fence
->fence
, false, 0))
1195 return VK_NOT_READY
;
1201 // Queue semaphore functions
1203 VkResult
radv_CreateSemaphore(
1205 const VkSemaphoreCreateInfo
* pCreateInfo
,
1206 const VkAllocationCallbacks
* pAllocator
,
1207 VkSemaphore
* pSemaphore
)
1209 /* The DRM execbuffer ioctl always execute in-oder, even between different
1210 * rings. As such, there's nothing to do for the user space semaphore.
1213 *pSemaphore
= (VkSemaphore
)1;
1218 void radv_DestroySemaphore(
1220 VkSemaphore semaphore
,
1221 const VkAllocationCallbacks
* pAllocator
)
1225 VkResult
radv_CreateEvent(
1227 const VkEventCreateInfo
* pCreateInfo
,
1228 const VkAllocationCallbacks
* pAllocator
,
1231 RADV_FROM_HANDLE(radv_device
, device
, _device
);
1232 struct radv_event
*event
= vk_alloc2(&device
->alloc
, pAllocator
,
1234 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1237 return VK_ERROR_OUT_OF_HOST_MEMORY
;
1239 event
->bo
= device
->ws
->buffer_create(device
->ws
, 8, 8,
1241 RADEON_FLAG_CPU_ACCESS
);
1243 vk_free2(&device
->alloc
, pAllocator
, event
);
1244 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
1247 event
->map
= (uint64_t*)device
->ws
->buffer_map(event
->bo
);
1249 *pEvent
= radv_event_to_handle(event
);
1254 void radv_DestroyEvent(
1257 const VkAllocationCallbacks
* pAllocator
)
1259 RADV_FROM_HANDLE(radv_device
, device
, _device
);
1260 RADV_FROM_HANDLE(radv_event
, event
, _event
);
1264 device
->ws
->buffer_destroy(event
->bo
);
1265 vk_free2(&device
->alloc
, pAllocator
, event
);
1268 VkResult
radv_GetEventStatus(
1272 RADV_FROM_HANDLE(radv_event
, event
, _event
);
1274 if (*event
->map
== 1)
1275 return VK_EVENT_SET
;
1276 return VK_EVENT_RESET
;
1279 VkResult
radv_SetEvent(
1283 RADV_FROM_HANDLE(radv_event
, event
, _event
);
1289 VkResult
radv_ResetEvent(
1293 RADV_FROM_HANDLE(radv_event
, event
, _event
);
1299 VkResult
radv_CreateBuffer(
1301 const VkBufferCreateInfo
* pCreateInfo
,
1302 const VkAllocationCallbacks
* pAllocator
,
1305 RADV_FROM_HANDLE(radv_device
, device
, _device
);
1306 struct radv_buffer
*buffer
;
1308 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO
);
1310 buffer
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*buffer
), 8,
1311 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1313 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1315 buffer
->size
= pCreateInfo
->size
;
1316 buffer
->usage
= pCreateInfo
->usage
;
1320 *pBuffer
= radv_buffer_to_handle(buffer
);
1325 void radv_DestroyBuffer(
1328 const VkAllocationCallbacks
* pAllocator
)
1330 RADV_FROM_HANDLE(radv_device
, device
, _device
);
1331 RADV_FROM_HANDLE(radv_buffer
, buffer
, _buffer
);
1336 vk_free2(&device
->alloc
, pAllocator
, buffer
);
1339 static inline unsigned
1340 si_tile_mode_index(const struct radv_image
*image
, unsigned level
, bool stencil
)
1343 return image
->surface
.stencil_tiling_index
[level
];
1345 return image
->surface
.tiling_index
[level
];
1349 radv_initialise_color_surface(struct radv_device
*device
,
1350 struct radv_color_buffer_info
*cb
,
1351 struct radv_image_view
*iview
)
1353 const struct vk_format_description
*desc
;
1354 unsigned ntype
, format
, swap
, endian
;
1355 unsigned blend_clamp
= 0, blend_bypass
= 0;
1356 unsigned pitch_tile_max
, slice_tile_max
, tile_mode_index
;
1358 const struct radeon_surf
*surf
= &iview
->image
->surface
;
1359 const struct radeon_surf_level
*level_info
= &surf
->level
[iview
->base_mip
];
1361 desc
= vk_format_description(iview
->vk_format
);
1363 memset(cb
, 0, sizeof(*cb
));
1365 va
= device
->ws
->buffer_get_va(iview
->bo
) + iview
->image
->offset
;
1366 va
+= level_info
->offset
;
1367 cb
->cb_color_base
= va
>> 8;
1369 /* CMASK variables */
1370 va
= device
->ws
->buffer_get_va(iview
->bo
) + iview
->image
->offset
;
1371 va
+= iview
->image
->cmask
.offset
;
1372 cb
->cb_color_cmask
= va
>> 8;
1373 cb
->cb_color_cmask_slice
= iview
->image
->cmask
.slice_tile_max
;
1375 va
= device
->ws
->buffer_get_va(iview
->bo
) + iview
->image
->offset
;
1376 va
+= iview
->image
->dcc_offset
;
1377 cb
->cb_dcc_base
= va
>> 8;
1379 cb
->cb_color_view
= S_028C6C_SLICE_START(iview
->base_layer
) |
1380 S_028C6C_SLICE_MAX(iview
->base_layer
+ iview
->extent
.depth
- 1);
1382 cb
->micro_tile_mode
= iview
->image
->surface
.micro_tile_mode
;
1383 pitch_tile_max
= level_info
->nblk_x
/ 8 - 1;
1384 slice_tile_max
= (level_info
->nblk_x
* level_info
->nblk_y
) / 64 - 1;
1385 tile_mode_index
= si_tile_mode_index(iview
->image
, iview
->base_mip
, false);
1387 cb
->cb_color_pitch
= S_028C64_TILE_MAX(pitch_tile_max
);
1388 cb
->cb_color_slice
= S_028C68_TILE_MAX(slice_tile_max
);
1390 /* Intensity is implemented as Red, so treat it that way. */
1391 cb
->cb_color_attrib
= S_028C74_FORCE_DST_ALPHA_1(desc
->swizzle
[3] == VK_SWIZZLE_1
) |
1392 S_028C74_TILE_MODE_INDEX(tile_mode_index
);
1394 if (iview
->image
->samples
> 1) {
1395 unsigned log_samples
= util_logbase2(iview
->image
->samples
);
1397 cb
->cb_color_attrib
|= S_028C74_NUM_SAMPLES(log_samples
) |
1398 S_028C74_NUM_FRAGMENTS(log_samples
);
1401 if (iview
->image
->fmask
.size
) {
1402 va
= device
->ws
->buffer_get_va(iview
->bo
) + iview
->image
->offset
+ iview
->image
->fmask
.offset
;
1403 if (device
->instance
->physicalDevice
.rad_info
.chip_class
>= CIK
)
1404 cb
->cb_color_pitch
|= S_028C64_FMASK_TILE_MAX(iview
->image
->fmask
.pitch_in_pixels
/ 8 - 1);
1405 cb
->cb_color_attrib
|= S_028C74_FMASK_TILE_MODE_INDEX(iview
->image
->fmask
.tile_mode_index
);
1406 cb
->cb_color_fmask
= va
>> 8;
1407 cb
->cb_color_fmask_slice
= S_028C88_TILE_MAX(iview
->image
->fmask
.slice_tile_max
);
1409 /* This must be set for fast clear to work without FMASK. */
1410 if (device
->instance
->physicalDevice
.rad_info
.chip_class
>= CIK
)
1411 cb
->cb_color_pitch
|= S_028C64_FMASK_TILE_MAX(pitch_tile_max
);
1412 cb
->cb_color_attrib
|= S_028C74_FMASK_TILE_MODE_INDEX(tile_mode_index
);
1413 cb
->cb_color_fmask
= cb
->cb_color_base
;
1414 cb
->cb_color_fmask_slice
= S_028C88_TILE_MAX(slice_tile_max
);
1417 ntype
= radv_translate_color_numformat(iview
->vk_format
,
1419 vk_format_get_first_non_void_channel(iview
->vk_format
));
1420 format
= radv_translate_colorformat(iview
->vk_format
);
1421 if (format
== V_028C70_COLOR_INVALID
|| ntype
== ~0u)
1422 radv_finishme("Illegal color\n");
1423 swap
= radv_translate_colorswap(iview
->vk_format
, FALSE
);
1424 endian
= radv_colorformat_endian_swap(format
);
1426 /* blend clamp should be set for all NORM/SRGB types */
1427 if (ntype
== V_028C70_NUMBER_UNORM
||
1428 ntype
== V_028C70_NUMBER_SNORM
||
1429 ntype
== V_028C70_NUMBER_SRGB
)
1432 /* set blend bypass according to docs if SINT/UINT or
1433 8/24 COLOR variants */
1434 if (ntype
== V_028C70_NUMBER_UINT
|| ntype
== V_028C70_NUMBER_SINT
||
1435 format
== V_028C70_COLOR_8_24
|| format
== V_028C70_COLOR_24_8
||
1436 format
== V_028C70_COLOR_X24_8_32_FLOAT
) {
1441 if ((ntype
== V_028C70_NUMBER_UINT
|| ntype
== V_028C70_NUMBER_SINT
) &&
1442 (format
== V_028C70_COLOR_8
||
1443 format
== V_028C70_COLOR_8_8
||
1444 format
== V_028C70_COLOR_8_8_8_8
))
1445 ->color_is_int8
= true;
1447 cb
->cb_color_info
= S_028C70_FORMAT(format
) |
1448 S_028C70_COMP_SWAP(swap
) |
1449 S_028C70_BLEND_CLAMP(blend_clamp
) |
1450 S_028C70_BLEND_BYPASS(blend_bypass
) |
1451 S_028C70_SIMPLE_FLOAT(1) |
1452 S_028C70_ROUND_MODE(ntype
!= V_028C70_NUMBER_UNORM
&&
1453 ntype
!= V_028C70_NUMBER_SNORM
&&
1454 ntype
!= V_028C70_NUMBER_SRGB
&&
1455 format
!= V_028C70_COLOR_8_24
&&
1456 format
!= V_028C70_COLOR_24_8
) |
1457 S_028C70_NUMBER_TYPE(ntype
) |
1458 S_028C70_ENDIAN(endian
);
1459 if (iview
->image
->samples
> 1)
1460 if (iview
->image
->fmask
.size
)
1461 cb
->cb_color_info
|= S_028C70_COMPRESSION(1);
1463 if (iview
->image
->cmask
.size
&& device
->allow_fast_clears
)
1464 cb
->cb_color_info
|= S_028C70_FAST_CLEAR(1);
1466 if (iview
->image
->surface
.dcc_size
&& level_info
->dcc_enabled
)
1467 cb
->cb_color_info
|= S_028C70_DCC_ENABLE(1);
1469 if (device
->instance
->physicalDevice
.rad_info
.chip_class
>= VI
) {
1470 unsigned max_uncompressed_block_size
= 2;
1471 if (iview
->image
->samples
> 1) {
1472 if (iview
->image
->surface
.bpe
== 1)
1473 max_uncompressed_block_size
= 0;
1474 else if (iview
->image
->surface
.bpe
== 2)
1475 max_uncompressed_block_size
= 1;
1478 cb
->cb_dcc_control
= S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size
) |
1479 S_028C78_INDEPENDENT_64B_BLOCKS(1);
1482 /* This must be set for fast clear to work without FMASK. */
1483 if (!iview
->image
->fmask
.size
&&
1484 device
->instance
->physicalDevice
.rad_info
.chip_class
== SI
) {
1485 unsigned bankh
= util_logbase2(iview
->image
->surface
.bankh
);
1486 cb
->cb_color_attrib
|= S_028C74_FMASK_BANK_HEIGHT(bankh
);
1491 radv_initialise_ds_surface(struct radv_device
*device
,
1492 struct radv_ds_buffer_info
*ds
,
1493 struct radv_image_view
*iview
)
1495 unsigned level
= iview
->base_mip
;
1497 uint64_t va
, s_offs
, z_offs
;
1498 const struct radeon_surf_level
*level_info
= &iview
->image
->surface
.level
[level
];
1499 memset(ds
, 0, sizeof(*ds
));
1500 switch (iview
->vk_format
) {
1501 case VK_FORMAT_D24_UNORM_S8_UINT
:
1502 case VK_FORMAT_X8_D24_UNORM_PACK32
:
1503 ds
->pa_su_poly_offset_db_fmt_cntl
= S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-24);
1504 ds
->offset_scale
= 2.0f
;
1506 case VK_FORMAT_D16_UNORM
:
1507 case VK_FORMAT_D16_UNORM_S8_UINT
:
1508 ds
->pa_su_poly_offset_db_fmt_cntl
= S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-16);
1509 ds
->offset_scale
= 4.0f
;
1511 case VK_FORMAT_D32_SFLOAT
:
1512 case VK_FORMAT_D32_SFLOAT_S8_UINT
:
1513 ds
->pa_su_poly_offset_db_fmt_cntl
= S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-23) |
1514 S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(1);
1515 ds
->offset_scale
= 1.0f
;
1521 format
= radv_translate_dbformat(iview
->vk_format
);
1522 if (format
== V_028040_Z_INVALID
) {
1523 fprintf(stderr
, "Invalid DB format: %d, disabling DB.\n", iview
->vk_format
);
1526 va
= device
->ws
->buffer_get_va(iview
->bo
) + iview
->image
->offset
;
1527 s_offs
= z_offs
= va
;
1528 z_offs
+= iview
->image
->surface
.level
[level
].offset
;
1529 s_offs
+= iview
->image
->surface
.stencil_level
[level
].offset
;
1531 ds
->db_depth_view
= S_028008_SLICE_START(iview
->base_layer
) |
1532 S_028008_SLICE_MAX(iview
->base_layer
+ iview
->extent
.depth
- 1);
1533 ds
->db_depth_info
= S_02803C_ADDR5_SWIZZLE_MASK(1);
1534 ds
->db_z_info
= S_028040_FORMAT(format
) | S_028040_ZRANGE_PRECISION(1);
1536 if (iview
->image
->samples
> 1)
1537 ds
->db_z_info
|= S_028040_NUM_SAMPLES(util_logbase2(iview
->image
->samples
));
1539 if (iview
->image
->surface
.flags
& RADEON_SURF_SBUFFER
)
1540 ds
->db_stencil_info
= S_028044_FORMAT(V_028044_STENCIL_8
);
1542 ds
->db_stencil_info
= S_028044_FORMAT(V_028044_STENCIL_INVALID
);
1544 if (device
->instance
->physicalDevice
.rad_info
.chip_class
>= CIK
) {
1545 struct radeon_info
*info
= &device
->instance
->physicalDevice
.rad_info
;
1546 unsigned tiling_index
= iview
->image
->surface
.tiling_index
[level
];
1547 unsigned stencil_index
= iview
->image
->surface
.stencil_tiling_index
[level
];
1548 unsigned macro_index
= iview
->image
->surface
.macro_tile_index
;
1549 unsigned tile_mode
= info
->si_tile_mode_array
[tiling_index
];
1550 unsigned stencil_tile_mode
= info
->si_tile_mode_array
[stencil_index
];
1551 unsigned macro_mode
= info
->cik_macrotile_mode_array
[macro_index
];
1553 ds
->db_depth_info
|=
1554 S_02803C_ARRAY_MODE(G_009910_ARRAY_MODE(tile_mode
)) |
1555 S_02803C_PIPE_CONFIG(G_009910_PIPE_CONFIG(tile_mode
)) |
1556 S_02803C_BANK_WIDTH(G_009990_BANK_WIDTH(macro_mode
)) |
1557 S_02803C_BANK_HEIGHT(G_009990_BANK_HEIGHT(macro_mode
)) |
1558 S_02803C_MACRO_TILE_ASPECT(G_009990_MACRO_TILE_ASPECT(macro_mode
)) |
1559 S_02803C_NUM_BANKS(G_009990_NUM_BANKS(macro_mode
));
1560 ds
->db_z_info
|= S_028040_TILE_SPLIT(G_009910_TILE_SPLIT(tile_mode
));
1561 ds
->db_stencil_info
|= S_028044_TILE_SPLIT(G_009910_TILE_SPLIT(stencil_tile_mode
));
1563 unsigned tile_mode_index
= si_tile_mode_index(iview
->image
, level
, false);
1564 ds
->db_z_info
|= S_028040_TILE_MODE_INDEX(tile_mode_index
);
1565 tile_mode_index
= si_tile_mode_index(iview
->image
, level
, true);
1566 ds
->db_stencil_info
|= S_028044_TILE_MODE_INDEX(tile_mode_index
);
1569 if (iview
->image
->htile
.size
&& !level
) {
1570 ds
->db_z_info
|= S_028040_TILE_SURFACE_ENABLE(1) |
1571 S_028040_ALLOW_EXPCLEAR(1);
1573 if (iview
->image
->surface
.flags
& RADEON_SURF_SBUFFER
) {
1574 /* Workaround: For a not yet understood reason, the
1575 * combination of MSAA, fast stencil clear and stencil
1576 * decompress messes with subsequent stencil buffer
1577 * uses. Problem was reproduced on Verde, Bonaire,
1578 * Tonga, and Carrizo.
1580 * Disabling EXPCLEAR works around the problem.
1582 * Check piglit's arb_texture_multisample-stencil-clear
1583 * test if you want to try changing this.
1585 if (iview
->image
->samples
<= 1)
1586 ds
->db_stencil_info
|= S_028044_ALLOW_EXPCLEAR(1);
1588 /* Use all of the htile_buffer for depth if there's no stencil. */
1589 ds
->db_stencil_info
|= S_028044_TILE_STENCIL_DISABLE(1);
1591 va
= device
->ws
->buffer_get_va(iview
->bo
) + iview
->image
->offset
+
1592 iview
->image
->htile
.offset
;
1593 ds
->db_htile_data_base
= va
>> 8;
1594 ds
->db_htile_surface
= S_028ABC_FULL_CACHE(1);
1596 ds
->db_htile_data_base
= 0;
1597 ds
->db_htile_surface
= 0;
1600 ds
->db_z_read_base
= ds
->db_z_write_base
= z_offs
>> 8;
1601 ds
->db_stencil_read_base
= ds
->db_stencil_write_base
= s_offs
>> 8;
1603 ds
->db_depth_size
= S_028058_PITCH_TILE_MAX((level_info
->nblk_x
/ 8) - 1) |
1604 S_028058_HEIGHT_TILE_MAX((level_info
->nblk_y
/ 8) - 1);
1605 ds
->db_depth_slice
= S_02805C_SLICE_TILE_MAX((level_info
->nblk_x
* level_info
->nblk_y
) / 64 - 1);
1608 VkResult
radv_CreateFramebuffer(
1610 const VkFramebufferCreateInfo
* pCreateInfo
,
1611 const VkAllocationCallbacks
* pAllocator
,
1612 VkFramebuffer
* pFramebuffer
)
1614 RADV_FROM_HANDLE(radv_device
, device
, _device
);
1615 struct radv_framebuffer
*framebuffer
;
1617 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO
);
1619 size_t size
= sizeof(*framebuffer
) +
1620 sizeof(struct radv_attachment_info
) * pCreateInfo
->attachmentCount
;
1621 framebuffer
= vk_alloc2(&device
->alloc
, pAllocator
, size
, 8,
1622 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1623 if (framebuffer
== NULL
)
1624 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1626 framebuffer
->attachment_count
= pCreateInfo
->attachmentCount
;
1627 for (uint32_t i
= 0; i
< pCreateInfo
->attachmentCount
; i
++) {
1628 VkImageView _iview
= pCreateInfo
->pAttachments
[i
];
1629 struct radv_image_view
*iview
= radv_image_view_from_handle(_iview
);
1630 framebuffer
->attachments
[i
].attachment
= iview
;
1631 if (iview
->aspect_mask
& VK_IMAGE_ASPECT_COLOR_BIT
) {
1632 radv_initialise_color_surface(device
, &framebuffer
->attachments
[i
].cb
, iview
);
1633 } else if (iview
->aspect_mask
& (VK_IMAGE_ASPECT_DEPTH_BIT
| VK_IMAGE_ASPECT_STENCIL_BIT
)) {
1634 radv_initialise_ds_surface(device
, &framebuffer
->attachments
[i
].ds
, iview
);
1638 framebuffer
->width
= pCreateInfo
->width
;
1639 framebuffer
->height
= pCreateInfo
->height
;
1640 framebuffer
->layers
= pCreateInfo
->layers
;
1642 *pFramebuffer
= radv_framebuffer_to_handle(framebuffer
);
1646 void radv_DestroyFramebuffer(
1649 const VkAllocationCallbacks
* pAllocator
)
1651 RADV_FROM_HANDLE(radv_device
, device
, _device
);
1652 RADV_FROM_HANDLE(radv_framebuffer
, fb
, _fb
);
1656 vk_free2(&device
->alloc
, pAllocator
, fb
);
1659 static unsigned radv_tex_wrap(VkSamplerAddressMode address_mode
)
1661 switch (address_mode
) {
1662 case VK_SAMPLER_ADDRESS_MODE_REPEAT
:
1663 return V_008F30_SQ_TEX_WRAP
;
1664 case VK_SAMPLER_ADDRESS_MODE_MIRRORED_REPEAT
:
1665 return V_008F30_SQ_TEX_MIRROR
;
1666 case VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE
:
1667 return V_008F30_SQ_TEX_CLAMP_LAST_TEXEL
;
1668 case VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER
:
1669 return V_008F30_SQ_TEX_CLAMP_BORDER
;
1670 case VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE
:
1671 return V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL
;
1673 unreachable("illegal tex wrap mode");
1679 radv_tex_compare(VkCompareOp op
)
1682 case VK_COMPARE_OP_NEVER
:
1683 return V_008F30_SQ_TEX_DEPTH_COMPARE_NEVER
;
1684 case VK_COMPARE_OP_LESS
:
1685 return V_008F30_SQ_TEX_DEPTH_COMPARE_LESS
;
1686 case VK_COMPARE_OP_EQUAL
:
1687 return V_008F30_SQ_TEX_DEPTH_COMPARE_EQUAL
;
1688 case VK_COMPARE_OP_LESS_OR_EQUAL
:
1689 return V_008F30_SQ_TEX_DEPTH_COMPARE_LESSEQUAL
;
1690 case VK_COMPARE_OP_GREATER
:
1691 return V_008F30_SQ_TEX_DEPTH_COMPARE_GREATER
;
1692 case VK_COMPARE_OP_NOT_EQUAL
:
1693 return V_008F30_SQ_TEX_DEPTH_COMPARE_NOTEQUAL
;
1694 case VK_COMPARE_OP_GREATER_OR_EQUAL
:
1695 return V_008F30_SQ_TEX_DEPTH_COMPARE_GREATEREQUAL
;
1696 case VK_COMPARE_OP_ALWAYS
:
1697 return V_008F30_SQ_TEX_DEPTH_COMPARE_ALWAYS
;
1699 unreachable("illegal compare mode");
1705 radv_tex_filter(VkFilter filter
, unsigned max_ansio
)
1708 case VK_FILTER_NEAREST
:
1709 return (max_ansio
> 1 ? V_008F38_SQ_TEX_XY_FILTER_ANISO_POINT
:
1710 V_008F38_SQ_TEX_XY_FILTER_POINT
);
1711 case VK_FILTER_LINEAR
:
1712 return (max_ansio
> 1 ? V_008F38_SQ_TEX_XY_FILTER_ANISO_BILINEAR
:
1713 V_008F38_SQ_TEX_XY_FILTER_BILINEAR
);
1714 case VK_FILTER_CUBIC_IMG
:
1716 fprintf(stderr
, "illegal texture filter");
1722 radv_tex_mipfilter(VkSamplerMipmapMode mode
)
1725 case VK_SAMPLER_MIPMAP_MODE_NEAREST
:
1726 return V_008F38_SQ_TEX_Z_FILTER_POINT
;
1727 case VK_SAMPLER_MIPMAP_MODE_LINEAR
:
1728 return V_008F38_SQ_TEX_Z_FILTER_LINEAR
;
1730 return V_008F38_SQ_TEX_Z_FILTER_NONE
;
1735 radv_tex_bordercolor(VkBorderColor bcolor
)
1738 case VK_BORDER_COLOR_FLOAT_TRANSPARENT_BLACK
:
1739 case VK_BORDER_COLOR_INT_TRANSPARENT_BLACK
:
1740 return V_008F3C_SQ_TEX_BORDER_COLOR_TRANS_BLACK
;
1741 case VK_BORDER_COLOR_FLOAT_OPAQUE_BLACK
:
1742 case VK_BORDER_COLOR_INT_OPAQUE_BLACK
:
1743 return V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_BLACK
;
1744 case VK_BORDER_COLOR_FLOAT_OPAQUE_WHITE
:
1745 case VK_BORDER_COLOR_INT_OPAQUE_WHITE
:
1746 return V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_WHITE
;
1754 radv_tex_aniso_filter(unsigned filter
)
1768 radv_init_sampler(struct radv_device
*device
,
1769 struct radv_sampler
*sampler
,
1770 const VkSamplerCreateInfo
*pCreateInfo
)
1772 uint32_t max_aniso
= pCreateInfo
->anisotropyEnable
&& pCreateInfo
->maxAnisotropy
> 1.0 ?
1773 (uint32_t) pCreateInfo
->maxAnisotropy
: 0;
1774 uint32_t max_aniso_ratio
= radv_tex_aniso_filter(max_aniso
);
1776 is_vi
= (device
->instance
->physicalDevice
.rad_info
.chip_class
>= VI
);
1778 if (!is_vi
&& max_aniso
> 0) {
1779 radv_finishme("Anisotropic filtering must be disabled manually "
1780 "by the shader on SI-CI when BASE_LEVEL == LAST_LEVEL\n");
1781 max_aniso
= max_aniso_ratio
= 0;
1784 sampler
->state
[0] = (S_008F30_CLAMP_X(radv_tex_wrap(pCreateInfo
->addressModeU
)) |
1785 S_008F30_CLAMP_Y(radv_tex_wrap(pCreateInfo
->addressModeV
)) |
1786 S_008F30_CLAMP_Z(radv_tex_wrap(pCreateInfo
->addressModeW
)) |
1787 S_008F30_MAX_ANISO_RATIO(max_aniso_ratio
) |
1788 S_008F30_DEPTH_COMPARE_FUNC(radv_tex_compare(pCreateInfo
->compareOp
)) |
1789 S_008F30_FORCE_UNNORMALIZED(pCreateInfo
->unnormalizedCoordinates
? 1 : 0) |
1790 S_008F30_ANISO_THRESHOLD(max_aniso_ratio
>> 1) |
1791 S_008F30_ANISO_BIAS(max_aniso_ratio
) |
1792 S_008F30_DISABLE_CUBE_WRAP(0) |
1793 S_008F30_COMPAT_MODE(is_vi
));
1794 sampler
->state
[1] = (S_008F34_MIN_LOD(S_FIXED(CLAMP(pCreateInfo
->minLod
, 0, 15), 8)) |
1795 S_008F34_MAX_LOD(S_FIXED(CLAMP(pCreateInfo
->maxLod
, 0, 15), 8)) |
1796 S_008F34_PERF_MIP(max_aniso_ratio
? max_aniso_ratio
+ 6 : 0));
1797 sampler
->state
[2] = (S_008F38_LOD_BIAS(S_FIXED(CLAMP(pCreateInfo
->mipLodBias
, -16, 16), 8)) |
1798 S_008F38_XY_MAG_FILTER(radv_tex_filter(pCreateInfo
->magFilter
, max_aniso
)) |
1799 S_008F38_XY_MIN_FILTER(radv_tex_filter(pCreateInfo
->minFilter
, max_aniso
)) |
1800 S_008F38_MIP_FILTER(radv_tex_mipfilter(pCreateInfo
->mipmapMode
)) |
1801 S_008F38_MIP_POINT_PRECLAMP(1) |
1802 S_008F38_DISABLE_LSB_CEIL(1) |
1803 S_008F38_FILTER_PREC_FIX(1) |
1804 S_008F38_ANISO_OVERRIDE(is_vi
));
1805 sampler
->state
[3] = (S_008F3C_BORDER_COLOR_PTR(0) |
1806 S_008F3C_BORDER_COLOR_TYPE(radv_tex_bordercolor(pCreateInfo
->borderColor
)));
1809 VkResult
radv_CreateSampler(
1811 const VkSamplerCreateInfo
* pCreateInfo
,
1812 const VkAllocationCallbacks
* pAllocator
,
1813 VkSampler
* pSampler
)
1815 RADV_FROM_HANDLE(radv_device
, device
, _device
);
1816 struct radv_sampler
*sampler
;
1818 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO
);
1820 sampler
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*sampler
), 8,
1821 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1823 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1825 radv_init_sampler(device
, sampler
, pCreateInfo
);
1826 *pSampler
= radv_sampler_to_handle(sampler
);
1831 void radv_DestroySampler(
1834 const VkAllocationCallbacks
* pAllocator
)
1836 RADV_FROM_HANDLE(radv_device
, device
, _device
);
1837 RADV_FROM_HANDLE(radv_sampler
, sampler
, _sampler
);
1841 vk_free2(&device
->alloc
, pAllocator
, sampler
);