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radv: add a write-combining host-local memory type
[mesa.git] / src / amd / vulkan / radv_device.c
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 * IN THE SOFTWARE.
26 */
27
28 #include <stdbool.h>
29 #include <string.h>
30 #include <unistd.h>
31 #include <fcntl.h>
32 #include "radv_private.h"
33 #include "util/strtod.h"
34
35 #include <xf86drm.h>
36 #include <amdgpu.h>
37 #include <amdgpu_drm.h>
38 #include "amdgpu_id.h"
39 #include "winsys/amdgpu/radv_amdgpu_winsys_public.h"
40 #include "ac_llvm_util.h"
41 #include "vk_format.h"
42 #include "sid.h"
43 #include "radv_timestamp.h"
44 #include "util/debug.h"
45 struct radv_dispatch_table dtable;
46
47 static VkResult
48 radv_physical_device_init(struct radv_physical_device *device,
49 struct radv_instance *instance,
50 const char *path)
51 {
52 VkResult result;
53 drmVersionPtr version;
54 int fd;
55
56 fd = open(path, O_RDWR | O_CLOEXEC);
57 if (fd < 0)
58 return vk_errorf(VK_ERROR_INCOMPATIBLE_DRIVER,
59 "failed to open %s: %m", path);
60
61 version = drmGetVersion(fd);
62 if (!version) {
63 close(fd);
64 return vk_errorf(VK_ERROR_INCOMPATIBLE_DRIVER,
65 "failed to get version %s: %m", path);
66 }
67
68 if (strcmp(version->name, "amdgpu")) {
69 drmFreeVersion(version);
70 close(fd);
71 return VK_ERROR_INCOMPATIBLE_DRIVER;
72 }
73 drmFreeVersion(version);
74
75 device->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
76 device->instance = instance;
77 assert(strlen(path) < ARRAY_SIZE(device->path));
78 strncpy(device->path, path, ARRAY_SIZE(device->path));
79
80 device->ws = radv_amdgpu_winsys_create(fd);
81 if (!device->ws) {
82 result = VK_ERROR_INCOMPATIBLE_DRIVER;
83 goto fail;
84 }
85 device->ws->query_info(device->ws, &device->rad_info);
86 result = radv_init_wsi(device);
87 if (result != VK_SUCCESS) {
88 device->ws->destroy(device->ws);
89 goto fail;
90 }
91
92 fprintf(stderr, "WARNING: radv is not a conformant vulkan implementation, testing use only.\n");
93 device->name = device->rad_info.name;
94 return VK_SUCCESS;
95
96 fail:
97 close(fd);
98 return result;
99 }
100
101 static void
102 radv_physical_device_finish(struct radv_physical_device *device)
103 {
104 radv_finish_wsi(device);
105 device->ws->destroy(device->ws);
106 }
107
108 static const VkExtensionProperties global_extensions[] = {
109 {
110 .extensionName = VK_KHR_SURFACE_EXTENSION_NAME,
111 .specVersion = 25,
112 },
113 #ifdef VK_USE_PLATFORM_XCB_KHR
114 {
115 .extensionName = VK_KHR_XCB_SURFACE_EXTENSION_NAME,
116 .specVersion = 5,
117 },
118 #endif
119 #ifdef VK_USE_PLATFORM_WAYLAND_KHR
120 {
121 .extensionName = VK_KHR_WAYLAND_SURFACE_EXTENSION_NAME,
122 .specVersion = 4,
123 },
124 #endif
125 };
126
127 static const VkExtensionProperties device_extensions[] = {
128 {
129 .extensionName = VK_KHR_SWAPCHAIN_EXTENSION_NAME,
130 .specVersion = 67,
131 },
132 };
133
134 static void *
135 default_alloc_func(void *pUserData, size_t size, size_t align,
136 VkSystemAllocationScope allocationScope)
137 {
138 return malloc(size);
139 }
140
141 static void *
142 default_realloc_func(void *pUserData, void *pOriginal, size_t size,
143 size_t align, VkSystemAllocationScope allocationScope)
144 {
145 return realloc(pOriginal, size);
146 }
147
148 static void
149 default_free_func(void *pUserData, void *pMemory)
150 {
151 free(pMemory);
152 }
153
154 static const VkAllocationCallbacks default_alloc = {
155 .pUserData = NULL,
156 .pfnAllocation = default_alloc_func,
157 .pfnReallocation = default_realloc_func,
158 .pfnFree = default_free_func,
159 };
160
161 VkResult radv_CreateInstance(
162 const VkInstanceCreateInfo* pCreateInfo,
163 const VkAllocationCallbacks* pAllocator,
164 VkInstance* pInstance)
165 {
166 struct radv_instance *instance;
167
168 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO);
169
170 uint32_t client_version;
171 if (pCreateInfo->pApplicationInfo &&
172 pCreateInfo->pApplicationInfo->apiVersion != 0) {
173 client_version = pCreateInfo->pApplicationInfo->apiVersion;
174 } else {
175 client_version = VK_MAKE_VERSION(1, 0, 0);
176 }
177
178 if (VK_MAKE_VERSION(1, 0, 0) > client_version ||
179 client_version > VK_MAKE_VERSION(1, 0, 0xfff)) {
180 return vk_errorf(VK_ERROR_INCOMPATIBLE_DRIVER,
181 "Client requested version %d.%d.%d",
182 VK_VERSION_MAJOR(client_version),
183 VK_VERSION_MINOR(client_version),
184 VK_VERSION_PATCH(client_version));
185 }
186
187 for (uint32_t i = 0; i < pCreateInfo->enabledExtensionCount; i++) {
188 bool found = false;
189 for (uint32_t j = 0; j < ARRAY_SIZE(global_extensions); j++) {
190 if (strcmp(pCreateInfo->ppEnabledExtensionNames[i],
191 global_extensions[j].extensionName) == 0) {
192 found = true;
193 break;
194 }
195 }
196 if (!found)
197 return vk_error(VK_ERROR_EXTENSION_NOT_PRESENT);
198 }
199
200 instance = vk_alloc2(&default_alloc, pAllocator, sizeof(*instance), 8,
201 VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE);
202 if (!instance)
203 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
204
205 instance->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
206
207 if (pAllocator)
208 instance->alloc = *pAllocator;
209 else
210 instance->alloc = default_alloc;
211
212 instance->apiVersion = client_version;
213 instance->physicalDeviceCount = -1;
214
215 _mesa_locale_init();
216
217 VG(VALGRIND_CREATE_MEMPOOL(instance, 0, false));
218
219 *pInstance = radv_instance_to_handle(instance);
220
221 return VK_SUCCESS;
222 }
223
224 void radv_DestroyInstance(
225 VkInstance _instance,
226 const VkAllocationCallbacks* pAllocator)
227 {
228 RADV_FROM_HANDLE(radv_instance, instance, _instance);
229
230 if (instance->physicalDeviceCount > 0) {
231 /* We support at most one physical device. */
232 assert(instance->physicalDeviceCount == 1);
233 radv_physical_device_finish(&instance->physicalDevice);
234 }
235
236 VG(VALGRIND_DESTROY_MEMPOOL(instance));
237
238 _mesa_locale_fini();
239
240 vk_free(&instance->alloc, instance);
241 }
242
243 VkResult radv_EnumeratePhysicalDevices(
244 VkInstance _instance,
245 uint32_t* pPhysicalDeviceCount,
246 VkPhysicalDevice* pPhysicalDevices)
247 {
248 RADV_FROM_HANDLE(radv_instance, instance, _instance);
249 VkResult result;
250
251 if (instance->physicalDeviceCount < 0) {
252 char path[20];
253 for (unsigned i = 0; i < 8; i++) {
254 snprintf(path, sizeof(path), "/dev/dri/renderD%d", 128 + i);
255 result = radv_physical_device_init(&instance->physicalDevice,
256 instance, path);
257 if (result != VK_ERROR_INCOMPATIBLE_DRIVER)
258 break;
259 }
260
261 if (result == VK_ERROR_INCOMPATIBLE_DRIVER) {
262 instance->physicalDeviceCount = 0;
263 } else if (result == VK_SUCCESS) {
264 instance->physicalDeviceCount = 1;
265 } else {
266 return result;
267 }
268 }
269
270 /* pPhysicalDeviceCount is an out parameter if pPhysicalDevices is NULL;
271 * otherwise it's an inout parameter.
272 *
273 * The Vulkan spec (git aaed022) says:
274 *
275 * pPhysicalDeviceCount is a pointer to an unsigned integer variable
276 * that is initialized with the number of devices the application is
277 * prepared to receive handles to. pname:pPhysicalDevices is pointer to
278 * an array of at least this many VkPhysicalDevice handles [...].
279 *
280 * Upon success, if pPhysicalDevices is NULL, vkEnumeratePhysicalDevices
281 * overwrites the contents of the variable pointed to by
282 * pPhysicalDeviceCount with the number of physical devices in in the
283 * instance; otherwise, vkEnumeratePhysicalDevices overwrites
284 * pPhysicalDeviceCount with the number of physical handles written to
285 * pPhysicalDevices.
286 */
287 if (!pPhysicalDevices) {
288 *pPhysicalDeviceCount = instance->physicalDeviceCount;
289 } else if (*pPhysicalDeviceCount >= 1) {
290 pPhysicalDevices[0] = radv_physical_device_to_handle(&instance->physicalDevice);
291 *pPhysicalDeviceCount = 1;
292 } else if (*pPhysicalDeviceCount < instance->physicalDeviceCount) {
293 return VK_INCOMPLETE;
294 } else {
295 *pPhysicalDeviceCount = 0;
296 }
297
298 return VK_SUCCESS;
299 }
300
301 void radv_GetPhysicalDeviceFeatures(
302 VkPhysicalDevice physicalDevice,
303 VkPhysicalDeviceFeatures* pFeatures)
304 {
305 // RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
306
307 memset(pFeatures, 0, sizeof(*pFeatures));
308
309 *pFeatures = (VkPhysicalDeviceFeatures) {
310 .robustBufferAccess = true,
311 .fullDrawIndexUint32 = true,
312 .imageCubeArray = true,
313 .independentBlend = true,
314 .geometryShader = false,
315 .tessellationShader = false,
316 .sampleRateShading = false,
317 .dualSrcBlend = true,
318 .logicOp = true,
319 .multiDrawIndirect = true,
320 .drawIndirectFirstInstance = true,
321 .depthClamp = true,
322 .depthBiasClamp = true,
323 .fillModeNonSolid = true,
324 .depthBounds = true,
325 .wideLines = true,
326 .largePoints = true,
327 .alphaToOne = true,
328 .multiViewport = false,
329 .samplerAnisotropy = false, /* FINISHME */
330 .textureCompressionETC2 = false,
331 .textureCompressionASTC_LDR = false,
332 .textureCompressionBC = true,
333 .occlusionQueryPrecise = true,
334 .pipelineStatisticsQuery = false,
335 .vertexPipelineStoresAndAtomics = true,
336 .fragmentStoresAndAtomics = true,
337 .shaderTessellationAndGeometryPointSize = true,
338 .shaderImageGatherExtended = false,
339 .shaderStorageImageExtendedFormats = false,
340 .shaderStorageImageMultisample = false,
341 .shaderUniformBufferArrayDynamicIndexing = true,
342 .shaderSampledImageArrayDynamicIndexing = true,
343 .shaderStorageBufferArrayDynamicIndexing = true,
344 .shaderStorageImageArrayDynamicIndexing = true,
345 .shaderStorageImageReadWithoutFormat = false,
346 .shaderStorageImageWriteWithoutFormat = true,
347 .shaderClipDistance = true,
348 .shaderCullDistance = true,
349 .shaderFloat64 = false,
350 .shaderInt64 = false,
351 .shaderInt16 = false,
352 .alphaToOne = true,
353 .variableMultisampleRate = false,
354 .inheritedQueries = false,
355 };
356 }
357
358 void
359 radv_device_get_cache_uuid(void *uuid)
360 {
361 memset(uuid, 0, VK_UUID_SIZE);
362 snprintf(uuid, VK_UUID_SIZE, "radv-%s", RADV_TIMESTAMP);
363 }
364
365 void radv_GetPhysicalDeviceProperties(
366 VkPhysicalDevice physicalDevice,
367 VkPhysicalDeviceProperties* pProperties)
368 {
369 RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
370 VkSampleCountFlags sample_counts = 0xf;
371 VkPhysicalDeviceLimits limits = {
372 .maxImageDimension1D = (1 << 14),
373 .maxImageDimension2D = (1 << 14),
374 .maxImageDimension3D = (1 << 11),
375 .maxImageDimensionCube = (1 << 14),
376 .maxImageArrayLayers = (1 << 11),
377 .maxTexelBufferElements = 128 * 1024 * 1024,
378 .maxUniformBufferRange = UINT32_MAX,
379 .maxStorageBufferRange = UINT32_MAX,
380 .maxPushConstantsSize = MAX_PUSH_CONSTANTS_SIZE,
381 .maxMemoryAllocationCount = UINT32_MAX,
382 .maxSamplerAllocationCount = 64 * 1024,
383 .bufferImageGranularity = 64, /* A cache line */
384 .sparseAddressSpaceSize = 0,
385 .maxBoundDescriptorSets = MAX_SETS,
386 .maxPerStageDescriptorSamplers = 64,
387 .maxPerStageDescriptorUniformBuffers = 64,
388 .maxPerStageDescriptorStorageBuffers = 64,
389 .maxPerStageDescriptorSampledImages = 64,
390 .maxPerStageDescriptorStorageImages = 64,
391 .maxPerStageDescriptorInputAttachments = 64,
392 .maxPerStageResources = 128,
393 .maxDescriptorSetSamplers = 256,
394 .maxDescriptorSetUniformBuffers = 256,
395 .maxDescriptorSetUniformBuffersDynamic = 256,
396 .maxDescriptorSetStorageBuffers = 256,
397 .maxDescriptorSetStorageBuffersDynamic = 256,
398 .maxDescriptorSetSampledImages = 256,
399 .maxDescriptorSetStorageImages = 256,
400 .maxDescriptorSetInputAttachments = 256,
401 .maxVertexInputAttributes = 32,
402 .maxVertexInputBindings = 32,
403 .maxVertexInputAttributeOffset = 2047,
404 .maxVertexInputBindingStride = 2048,
405 .maxVertexOutputComponents = 128,
406 .maxTessellationGenerationLevel = 0,
407 .maxTessellationPatchSize = 0,
408 .maxTessellationControlPerVertexInputComponents = 0,
409 .maxTessellationControlPerVertexOutputComponents = 0,
410 .maxTessellationControlPerPatchOutputComponents = 0,
411 .maxTessellationControlTotalOutputComponents = 0,
412 .maxTessellationEvaluationInputComponents = 0,
413 .maxTessellationEvaluationOutputComponents = 0,
414 .maxGeometryShaderInvocations = 32,
415 .maxGeometryInputComponents = 64,
416 .maxGeometryOutputComponents = 128,
417 .maxGeometryOutputVertices = 256,
418 .maxGeometryTotalOutputComponents = 1024,
419 .maxFragmentInputComponents = 128,
420 .maxFragmentOutputAttachments = 8,
421 .maxFragmentDualSrcAttachments = 2,
422 .maxFragmentCombinedOutputResources = 8,
423 .maxComputeSharedMemorySize = 32768,
424 .maxComputeWorkGroupCount = { 65535, 65535, 65535 },
425 .maxComputeWorkGroupInvocations = 16 * 1024,
426 .maxComputeWorkGroupSize = {
427 16 * 1024/*devinfo->max_cs_threads*/,
428 16 * 1024,
429 16 * 1024
430 },
431 .subPixelPrecisionBits = 4 /* FIXME */,
432 .subTexelPrecisionBits = 4 /* FIXME */,
433 .mipmapPrecisionBits = 4 /* FIXME */,
434 .maxDrawIndexedIndexValue = UINT32_MAX,
435 .maxDrawIndirectCount = UINT32_MAX,
436 .maxSamplerLodBias = 16,
437 .maxSamplerAnisotropy = 16,
438 .maxViewports = MAX_VIEWPORTS,
439 .maxViewportDimensions = { (1 << 14), (1 << 14) },
440 .viewportBoundsRange = { INT16_MIN, INT16_MAX },
441 .viewportSubPixelBits = 13, /* We take a float? */
442 .minMemoryMapAlignment = 4096, /* A page */
443 .minTexelBufferOffsetAlignment = 1,
444 .minUniformBufferOffsetAlignment = 4,
445 .minStorageBufferOffsetAlignment = 4,
446 .minTexelOffset = -8,
447 .maxTexelOffset = 7,
448 .minTexelGatherOffset = -8,
449 .maxTexelGatherOffset = 7,
450 .minInterpolationOffset = 0, /* FIXME */
451 .maxInterpolationOffset = 0, /* FIXME */
452 .subPixelInterpolationOffsetBits = 0, /* FIXME */
453 .maxFramebufferWidth = (1 << 14),
454 .maxFramebufferHeight = (1 << 14),
455 .maxFramebufferLayers = (1 << 10),
456 .framebufferColorSampleCounts = sample_counts,
457 .framebufferDepthSampleCounts = sample_counts,
458 .framebufferStencilSampleCounts = sample_counts,
459 .framebufferNoAttachmentsSampleCounts = sample_counts,
460 .maxColorAttachments = MAX_RTS,
461 .sampledImageColorSampleCounts = sample_counts,
462 .sampledImageIntegerSampleCounts = VK_SAMPLE_COUNT_1_BIT,
463 .sampledImageDepthSampleCounts = sample_counts,
464 .sampledImageStencilSampleCounts = sample_counts,
465 .storageImageSampleCounts = VK_SAMPLE_COUNT_1_BIT,
466 .maxSampleMaskWords = 1,
467 .timestampComputeAndGraphics = false,
468 .timestampPeriod = 100000.0 / pdevice->rad_info.clock_crystal_freq,
469 .maxClipDistances = 8,
470 .maxCullDistances = 8,
471 .maxCombinedClipAndCullDistances = 8,
472 .discreteQueuePriorities = 1,
473 .pointSizeRange = { 0.125, 255.875 },
474 .lineWidthRange = { 0.0, 7.9921875 },
475 .pointSizeGranularity = (1.0 / 8.0),
476 .lineWidthGranularity = (1.0 / 128.0),
477 .strictLines = false, /* FINISHME */
478 .standardSampleLocations = true,
479 .optimalBufferCopyOffsetAlignment = 128,
480 .optimalBufferCopyRowPitchAlignment = 128,
481 .nonCoherentAtomSize = 64,
482 };
483
484 *pProperties = (VkPhysicalDeviceProperties) {
485 .apiVersion = VK_MAKE_VERSION(1, 0, 5),
486 .driverVersion = 1,
487 .vendorID = 0x1002,
488 .deviceID = pdevice->rad_info.pci_id,
489 .deviceType = VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU,
490 .limits = limits,
491 .sparseProperties = {0}, /* Broadwell doesn't do sparse. */
492 };
493
494 strcpy(pProperties->deviceName, pdevice->name);
495 radv_device_get_cache_uuid(pProperties->pipelineCacheUUID);
496 }
497
498 void radv_GetPhysicalDeviceQueueFamilyProperties(
499 VkPhysicalDevice physicalDevice,
500 uint32_t* pCount,
501 VkQueueFamilyProperties* pQueueFamilyProperties)
502 {
503 if (pQueueFamilyProperties == NULL) {
504 *pCount = 1;
505 return;
506 }
507 assert(*pCount >= 1);
508
509 *pQueueFamilyProperties = (VkQueueFamilyProperties) {
510 .queueFlags = VK_QUEUE_GRAPHICS_BIT |
511 VK_QUEUE_COMPUTE_BIT |
512 VK_QUEUE_TRANSFER_BIT,
513 .queueCount = 1,
514 .timestampValidBits = 64,
515 .minImageTransferGranularity = (VkExtent3D) { 1, 1, 1 },
516 };
517 }
518
519 void radv_GetPhysicalDeviceMemoryProperties(
520 VkPhysicalDevice physicalDevice,
521 VkPhysicalDeviceMemoryProperties* pMemoryProperties)
522 {
523 RADV_FROM_HANDLE(radv_physical_device, physical_device, physicalDevice);
524
525 pMemoryProperties->memoryTypeCount = 4;
526 pMemoryProperties->memoryTypes[0] = (VkMemoryType) {
527 .propertyFlags = VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT,
528 .heapIndex = 0,
529 };
530 pMemoryProperties->memoryTypes[1] = (VkMemoryType) {
531 .propertyFlags = VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT |
532 VK_MEMORY_PROPERTY_HOST_COHERENT_BIT,
533 .heapIndex = 1,
534 };
535 pMemoryProperties->memoryTypes[2] = (VkMemoryType) {
536 .propertyFlags = VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT |
537 VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT |
538 VK_MEMORY_PROPERTY_HOST_COHERENT_BIT,
539 .heapIndex = 0,
540 };
541 pMemoryProperties->memoryTypes[3] = (VkMemoryType) {
542 .propertyFlags = VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT |
543 VK_MEMORY_PROPERTY_HOST_COHERENT_BIT |
544 VK_MEMORY_PROPERTY_HOST_CACHED_BIT,
545 .heapIndex = 1,
546 };
547
548 pMemoryProperties->memoryHeapCount = 2;
549 pMemoryProperties->memoryHeaps[0] = (VkMemoryHeap) {
550 .size = physical_device->rad_info.vram_size,
551 .flags = VK_MEMORY_HEAP_DEVICE_LOCAL_BIT,
552 };
553 pMemoryProperties->memoryHeaps[1] = (VkMemoryHeap) {
554 .size = physical_device->rad_info.gart_size,
555 .flags = 0,
556 };
557 }
558
559 static VkResult
560 radv_queue_init(struct radv_device *device, struct radv_queue *queue)
561 {
562 queue->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
563 queue->device = device;
564
565 return VK_SUCCESS;
566 }
567
568 static void
569 radv_queue_finish(struct radv_queue *queue)
570 {
571 }
572
573 VkResult radv_CreateDevice(
574 VkPhysicalDevice physicalDevice,
575 const VkDeviceCreateInfo* pCreateInfo,
576 const VkAllocationCallbacks* pAllocator,
577 VkDevice* pDevice)
578 {
579 RADV_FROM_HANDLE(radv_physical_device, physical_device, physicalDevice);
580 VkResult result;
581 struct radv_device *device;
582
583 for (uint32_t i = 0; i < pCreateInfo->enabledExtensionCount; i++) {
584 bool found = false;
585 for (uint32_t j = 0; j < ARRAY_SIZE(device_extensions); j++) {
586 if (strcmp(pCreateInfo->ppEnabledExtensionNames[i],
587 device_extensions[j].extensionName) == 0) {
588 found = true;
589 break;
590 }
591 }
592 if (!found)
593 return vk_error(VK_ERROR_EXTENSION_NOT_PRESENT);
594 }
595
596 device = vk_alloc2(&physical_device->instance->alloc, pAllocator,
597 sizeof(*device), 8,
598 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
599 if (!device)
600 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
601
602 device->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
603 device->instance = physical_device->instance;
604
605 device->ws = physical_device->ws;
606 if (pAllocator)
607 device->alloc = *pAllocator;
608 else
609 device->alloc = physical_device->instance->alloc;
610
611 device->hw_ctx = device->ws->ctx_create(device->ws);
612 if (!device->hw_ctx) {
613 result = VK_ERROR_OUT_OF_HOST_MEMORY;
614 goto fail_free;
615 }
616
617 radv_queue_init(device, &device->queue);
618
619 result = radv_device_init_meta(device);
620 if (result != VK_SUCCESS) {
621 device->ws->ctx_destroy(device->hw_ctx);
622 goto fail_free;
623 }
624 device->allow_fast_clears = env_var_as_boolean("RADV_FAST_CLEARS", false);
625 device->allow_dcc = !env_var_as_boolean("RADV_DCC_DISABLE", false);
626
627 if (device->allow_fast_clears && device->allow_dcc)
628 radv_finishme("DCC fast clears have not been tested\n");
629
630 radv_device_init_msaa(device);
631 device->empty_cs = device->ws->cs_create(device->ws, RING_GFX);
632 radeon_emit(device->empty_cs, PKT3(PKT3_CONTEXT_CONTROL, 1, 0));
633 radeon_emit(device->empty_cs, CONTEXT_CONTROL_LOAD_ENABLE(1));
634 radeon_emit(device->empty_cs, CONTEXT_CONTROL_SHADOW_ENABLE(1));
635 device->ws->cs_finalize(device->empty_cs);
636 *pDevice = radv_device_to_handle(device);
637 return VK_SUCCESS;
638 fail_free:
639 vk_free(&device->alloc, device);
640 return result;
641 }
642
643 void radv_DestroyDevice(
644 VkDevice _device,
645 const VkAllocationCallbacks* pAllocator)
646 {
647 RADV_FROM_HANDLE(radv_device, device, _device);
648
649 device->ws->ctx_destroy(device->hw_ctx);
650 radv_queue_finish(&device->queue);
651 radv_device_finish_meta(device);
652
653 vk_free(&device->alloc, device);
654 }
655
656 VkResult radv_EnumerateInstanceExtensionProperties(
657 const char* pLayerName,
658 uint32_t* pPropertyCount,
659 VkExtensionProperties* pProperties)
660 {
661 unsigned i;
662 if (pProperties == NULL) {
663 *pPropertyCount = ARRAY_SIZE(global_extensions);
664 return VK_SUCCESS;
665 }
666
667 for (i = 0; i < *pPropertyCount; i++)
668 memcpy(&pProperties[i], &global_extensions[i], sizeof(VkExtensionProperties));
669
670 *pPropertyCount = i;
671 if (i < ARRAY_SIZE(global_extensions))
672 return VK_INCOMPLETE;
673
674 return VK_SUCCESS;
675 }
676
677 VkResult radv_EnumerateDeviceExtensionProperties(
678 VkPhysicalDevice physicalDevice,
679 const char* pLayerName,
680 uint32_t* pPropertyCount,
681 VkExtensionProperties* pProperties)
682 {
683 unsigned i;
684
685 if (pProperties == NULL) {
686 *pPropertyCount = ARRAY_SIZE(device_extensions);
687 return VK_SUCCESS;
688 }
689
690 for (i = 0; i < *pPropertyCount; i++)
691 memcpy(&pProperties[i], &device_extensions[i], sizeof(VkExtensionProperties));
692
693 *pPropertyCount = i;
694 if (i < ARRAY_SIZE(device_extensions))
695 return VK_INCOMPLETE;
696 return VK_SUCCESS;
697 }
698
699 VkResult radv_EnumerateInstanceLayerProperties(
700 uint32_t* pPropertyCount,
701 VkLayerProperties* pProperties)
702 {
703 if (pProperties == NULL) {
704 *pPropertyCount = 0;
705 return VK_SUCCESS;
706 }
707
708 /* None supported at this time */
709 return vk_error(VK_ERROR_LAYER_NOT_PRESENT);
710 }
711
712 VkResult radv_EnumerateDeviceLayerProperties(
713 VkPhysicalDevice physicalDevice,
714 uint32_t* pPropertyCount,
715 VkLayerProperties* pProperties)
716 {
717 if (pProperties == NULL) {
718 *pPropertyCount = 0;
719 return VK_SUCCESS;
720 }
721
722 /* None supported at this time */
723 return vk_error(VK_ERROR_LAYER_NOT_PRESENT);
724 }
725
726 void radv_GetDeviceQueue(
727 VkDevice _device,
728 uint32_t queueNodeIndex,
729 uint32_t queueIndex,
730 VkQueue* pQueue)
731 {
732 RADV_FROM_HANDLE(radv_device, device, _device);
733
734 assert(queueIndex == 0);
735
736 *pQueue = radv_queue_to_handle(&device->queue);
737 }
738
739 VkResult radv_QueueSubmit(
740 VkQueue _queue,
741 uint32_t submitCount,
742 const VkSubmitInfo* pSubmits,
743 VkFence _fence)
744 {
745 RADV_FROM_HANDLE(radv_queue, queue, _queue);
746 RADV_FROM_HANDLE(radv_fence, fence, _fence);
747 struct radeon_winsys_fence *base_fence = fence ? fence->fence : NULL;
748 struct radeon_winsys_ctx *ctx = queue->device->hw_ctx;
749 int ret;
750
751 for (uint32_t i = 0; i < submitCount; i++) {
752 struct radeon_winsys_cs **cs_array;
753 bool can_patch = true;
754
755 if (!pSubmits[i].commandBufferCount)
756 continue;
757
758 cs_array = malloc(sizeof(struct radeon_winsys_cs *) *
759 pSubmits[i].commandBufferCount);
760
761 for (uint32_t j = 0; j < pSubmits[i].commandBufferCount; j++) {
762 RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer,
763 pSubmits[i].pCommandBuffers[j]);
764 assert(cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY);
765
766 cs_array[j] = cmd_buffer->cs;
767 if ((cmd_buffer->usage_flags & VK_COMMAND_BUFFER_USAGE_SIMULTANEOUS_USE_BIT))
768 can_patch = false;
769 }
770 ret = queue->device->ws->cs_submit(ctx, cs_array,
771 pSubmits[i].commandBufferCount,
772 can_patch, base_fence);
773 if (ret)
774 radv_loge("failed to submit CS %d\n", i);
775 free(cs_array);
776 }
777
778 if (fence) {
779 if (!submitCount)
780 ret = queue->device->ws->cs_submit(ctx, &queue->device->empty_cs,
781 1, false, base_fence);
782
783 fence->submitted = true;
784 }
785
786 return VK_SUCCESS;
787 }
788
789 VkResult radv_QueueWaitIdle(
790 VkQueue _queue)
791 {
792 RADV_FROM_HANDLE(radv_queue, queue, _queue);
793
794 queue->device->ws->ctx_wait_idle(queue->device->hw_ctx);
795 return VK_SUCCESS;
796 }
797
798 VkResult radv_DeviceWaitIdle(
799 VkDevice _device)
800 {
801 RADV_FROM_HANDLE(radv_device, device, _device);
802
803 device->ws->ctx_wait_idle(device->hw_ctx);
804 return VK_SUCCESS;
805 }
806
807 PFN_vkVoidFunction radv_GetInstanceProcAddr(
808 VkInstance instance,
809 const char* pName)
810 {
811 return radv_lookup_entrypoint(pName);
812 }
813
814 /* The loader wants us to expose a second GetInstanceProcAddr function
815 * to work around certain LD_PRELOAD issues seen in apps.
816 */
817 PUBLIC
818 VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL vk_icdGetInstanceProcAddr(
819 VkInstance instance,
820 const char* pName);
821
822 PUBLIC
823 VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL vk_icdGetInstanceProcAddr(
824 VkInstance instance,
825 const char* pName)
826 {
827 return radv_GetInstanceProcAddr(instance, pName);
828 }
829
830 PFN_vkVoidFunction radv_GetDeviceProcAddr(
831 VkDevice device,
832 const char* pName)
833 {
834 return radv_lookup_entrypoint(pName);
835 }
836
837 VkResult radv_AllocateMemory(
838 VkDevice _device,
839 const VkMemoryAllocateInfo* pAllocateInfo,
840 const VkAllocationCallbacks* pAllocator,
841 VkDeviceMemory* pMem)
842 {
843 RADV_FROM_HANDLE(radv_device, device, _device);
844 struct radv_device_memory *mem;
845 VkResult result;
846 enum radeon_bo_domain domain;
847 uint32_t flags = 0;
848 assert(pAllocateInfo->sType == VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO);
849
850 if (pAllocateInfo->allocationSize == 0) {
851 /* Apparently, this is allowed */
852 *pMem = VK_NULL_HANDLE;
853 return VK_SUCCESS;
854 }
855
856 mem = vk_alloc2(&device->alloc, pAllocator, sizeof(*mem), 8,
857 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
858 if (mem == NULL)
859 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
860
861 uint64_t alloc_size = align_u64(pAllocateInfo->allocationSize, 4096);
862 if (pAllocateInfo->memoryTypeIndex == 1 || pAllocateInfo->memoryTypeIndex == 3)
863 domain = RADEON_DOMAIN_GTT;
864 else
865 domain = RADEON_DOMAIN_VRAM;
866
867 if (pAllocateInfo->memoryTypeIndex == 0)
868 flags |= RADEON_FLAG_NO_CPU_ACCESS;
869 else
870 flags |= RADEON_FLAG_CPU_ACCESS;
871
872 if (pAllocateInfo->memoryTypeIndex == 1)
873 flags |= RADEON_FLAG_GTT_WC;
874
875 mem->bo = device->ws->buffer_create(device->ws, alloc_size, 32768,
876 domain, flags);
877
878 if (!mem->bo) {
879 result = VK_ERROR_OUT_OF_DEVICE_MEMORY;
880 goto fail;
881 }
882 mem->type_index = pAllocateInfo->memoryTypeIndex;
883
884 *pMem = radv_device_memory_to_handle(mem);
885
886 return VK_SUCCESS;
887
888 fail:
889 vk_free2(&device->alloc, pAllocator, mem);
890
891 return result;
892 }
893
894 void radv_FreeMemory(
895 VkDevice _device,
896 VkDeviceMemory _mem,
897 const VkAllocationCallbacks* pAllocator)
898 {
899 RADV_FROM_HANDLE(radv_device, device, _device);
900 RADV_FROM_HANDLE(radv_device_memory, mem, _mem);
901
902 if (mem == NULL)
903 return;
904
905 device->ws->buffer_destroy(mem->bo);
906 mem->bo = NULL;
907
908 vk_free2(&device->alloc, pAllocator, mem);
909 }
910
911 VkResult radv_MapMemory(
912 VkDevice _device,
913 VkDeviceMemory _memory,
914 VkDeviceSize offset,
915 VkDeviceSize size,
916 VkMemoryMapFlags flags,
917 void** ppData)
918 {
919 RADV_FROM_HANDLE(radv_device, device, _device);
920 RADV_FROM_HANDLE(radv_device_memory, mem, _memory);
921
922 if (mem == NULL) {
923 *ppData = NULL;
924 return VK_SUCCESS;
925 }
926
927 *ppData = device->ws->buffer_map(mem->bo);
928 if (*ppData) {
929 *ppData += offset;
930 return VK_SUCCESS;
931 }
932
933 return VK_ERROR_MEMORY_MAP_FAILED;
934 }
935
936 void radv_UnmapMemory(
937 VkDevice _device,
938 VkDeviceMemory _memory)
939 {
940 RADV_FROM_HANDLE(radv_device, device, _device);
941 RADV_FROM_HANDLE(radv_device_memory, mem, _memory);
942
943 if (mem == NULL)
944 return;
945
946 device->ws->buffer_unmap(mem->bo);
947 }
948
949 VkResult radv_FlushMappedMemoryRanges(
950 VkDevice _device,
951 uint32_t memoryRangeCount,
952 const VkMappedMemoryRange* pMemoryRanges)
953 {
954 return VK_SUCCESS;
955 }
956
957 VkResult radv_InvalidateMappedMemoryRanges(
958 VkDevice _device,
959 uint32_t memoryRangeCount,
960 const VkMappedMemoryRange* pMemoryRanges)
961 {
962 return VK_SUCCESS;
963 }
964
965 void radv_GetBufferMemoryRequirements(
966 VkDevice device,
967 VkBuffer _buffer,
968 VkMemoryRequirements* pMemoryRequirements)
969 {
970 RADV_FROM_HANDLE(radv_buffer, buffer, _buffer);
971
972 /* The Vulkan spec (git aaed022) says:
973 *
974 * memoryTypeBits is a bitfield and contains one bit set for every
975 * supported memory type for the resource. The bit `1<<i` is set if and
976 * only if the memory type `i` in the VkPhysicalDeviceMemoryProperties
977 * structure for the physical device is supported.
978 *
979 * We support exactly one memory type.
980 */
981 pMemoryRequirements->memoryTypeBits = 0x7;
982
983 pMemoryRequirements->size = buffer->size;
984 pMemoryRequirements->alignment = 16;
985 }
986
987 void radv_GetImageMemoryRequirements(
988 VkDevice device,
989 VkImage _image,
990 VkMemoryRequirements* pMemoryRequirements)
991 {
992 RADV_FROM_HANDLE(radv_image, image, _image);
993
994 /* The Vulkan spec (git aaed022) says:
995 *
996 * memoryTypeBits is a bitfield and contains one bit set for every
997 * supported memory type for the resource. The bit `1<<i` is set if and
998 * only if the memory type `i` in the VkPhysicalDeviceMemoryProperties
999 * structure for the physical device is supported.
1000 *
1001 * We support exactly one memory type.
1002 */
1003 pMemoryRequirements->memoryTypeBits = 0x7;
1004
1005 pMemoryRequirements->size = image->size;
1006 pMemoryRequirements->alignment = image->alignment;
1007 }
1008
1009 void radv_GetImageSparseMemoryRequirements(
1010 VkDevice device,
1011 VkImage image,
1012 uint32_t* pSparseMemoryRequirementCount,
1013 VkSparseImageMemoryRequirements* pSparseMemoryRequirements)
1014 {
1015 stub();
1016 }
1017
1018 void radv_GetDeviceMemoryCommitment(
1019 VkDevice device,
1020 VkDeviceMemory memory,
1021 VkDeviceSize* pCommittedMemoryInBytes)
1022 {
1023 *pCommittedMemoryInBytes = 0;
1024 }
1025
1026 VkResult radv_BindBufferMemory(
1027 VkDevice device,
1028 VkBuffer _buffer,
1029 VkDeviceMemory _memory,
1030 VkDeviceSize memoryOffset)
1031 {
1032 RADV_FROM_HANDLE(radv_device_memory, mem, _memory);
1033 RADV_FROM_HANDLE(radv_buffer, buffer, _buffer);
1034
1035 if (mem) {
1036 buffer->bo = mem->bo;
1037 buffer->offset = memoryOffset;
1038 } else {
1039 buffer->bo = NULL;
1040 buffer->offset = 0;
1041 }
1042
1043 return VK_SUCCESS;
1044 }
1045
1046 VkResult radv_BindImageMemory(
1047 VkDevice device,
1048 VkImage _image,
1049 VkDeviceMemory _memory,
1050 VkDeviceSize memoryOffset)
1051 {
1052 RADV_FROM_HANDLE(radv_device_memory, mem, _memory);
1053 RADV_FROM_HANDLE(radv_image, image, _image);
1054
1055 if (mem) {
1056 image->bo = mem->bo;
1057 image->offset = memoryOffset;
1058 } else {
1059 image->bo = NULL;
1060 image->offset = 0;
1061 }
1062
1063 return VK_SUCCESS;
1064 }
1065
1066 VkResult radv_QueueBindSparse(
1067 VkQueue queue,
1068 uint32_t bindInfoCount,
1069 const VkBindSparseInfo* pBindInfo,
1070 VkFence fence)
1071 {
1072 stub_return(VK_ERROR_INCOMPATIBLE_DRIVER);
1073 }
1074
1075 VkResult radv_CreateFence(
1076 VkDevice _device,
1077 const VkFenceCreateInfo* pCreateInfo,
1078 const VkAllocationCallbacks* pAllocator,
1079 VkFence* pFence)
1080 {
1081 RADV_FROM_HANDLE(radv_device, device, _device);
1082 struct radv_fence *fence = vk_alloc2(&device->alloc, pAllocator,
1083 sizeof(*fence), 8,
1084 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1085
1086 if (!fence)
1087 return VK_ERROR_OUT_OF_HOST_MEMORY;
1088
1089 memset(fence, 0, sizeof(*fence));
1090 fence->submitted = false;
1091 fence->signalled = !!(pCreateInfo->flags & VK_FENCE_CREATE_SIGNALED_BIT);
1092 fence->fence = device->ws->create_fence();
1093
1094
1095 *pFence = radv_fence_to_handle(fence);
1096
1097 return VK_SUCCESS;
1098 }
1099
1100 void radv_DestroyFence(
1101 VkDevice _device,
1102 VkFence _fence,
1103 const VkAllocationCallbacks* pAllocator)
1104 {
1105 RADV_FROM_HANDLE(radv_device, device, _device);
1106 RADV_FROM_HANDLE(radv_fence, fence, _fence);
1107
1108 if (!fence)
1109 return;
1110 device->ws->destroy_fence(fence->fence);
1111 vk_free2(&device->alloc, pAllocator, fence);
1112 }
1113
1114 static uint64_t radv_get_absolute_timeout(uint64_t timeout)
1115 {
1116 uint64_t current_time;
1117 struct timespec tv;
1118
1119 clock_gettime(CLOCK_MONOTONIC, &tv);
1120 current_time = tv.tv_nsec + tv.tv_sec*1000000000ull;
1121
1122 timeout = MIN2(UINT64_MAX - current_time, timeout);
1123
1124 return current_time + timeout;
1125 }
1126
1127 VkResult radv_WaitForFences(
1128 VkDevice _device,
1129 uint32_t fenceCount,
1130 const VkFence* pFences,
1131 VkBool32 waitAll,
1132 uint64_t timeout)
1133 {
1134 RADV_FROM_HANDLE(radv_device, device, _device);
1135 timeout = radv_get_absolute_timeout(timeout);
1136
1137 if (!waitAll && fenceCount > 1) {
1138 fprintf(stderr, "radv: WaitForFences without waitAll not implemented yet\n");
1139 }
1140
1141 for (uint32_t i = 0; i < fenceCount; ++i) {
1142 RADV_FROM_HANDLE(radv_fence, fence, pFences[i]);
1143 bool expired = false;
1144
1145 if (fence->signalled)
1146 continue;
1147
1148 if (!fence->submitted)
1149 return VK_TIMEOUT;
1150
1151 expired = device->ws->fence_wait(device->ws, fence->fence, true, timeout);
1152 if (!expired)
1153 return VK_TIMEOUT;
1154
1155 fence->signalled = true;
1156 }
1157
1158 return VK_SUCCESS;
1159 }
1160
1161 VkResult radv_ResetFences(VkDevice device,
1162 uint32_t fenceCount,
1163 const VkFence *pFences)
1164 {
1165 for (unsigned i = 0; i < fenceCount; ++i) {
1166 RADV_FROM_HANDLE(radv_fence, fence, pFences[i]);
1167 fence->submitted = fence->signalled = false;
1168 }
1169
1170 return VK_SUCCESS;
1171 }
1172
1173 VkResult radv_GetFenceStatus(VkDevice _device, VkFence _fence)
1174 {
1175 RADV_FROM_HANDLE(radv_device, device, _device);
1176 RADV_FROM_HANDLE(radv_fence, fence, _fence);
1177
1178 if (!fence->submitted)
1179 return VK_NOT_READY;
1180
1181 if (!device->ws->fence_wait(device->ws, fence->fence, false, 0))
1182 return VK_NOT_READY;
1183
1184 return VK_SUCCESS;
1185 }
1186
1187
1188 // Queue semaphore functions
1189
1190 VkResult radv_CreateSemaphore(
1191 VkDevice device,
1192 const VkSemaphoreCreateInfo* pCreateInfo,
1193 const VkAllocationCallbacks* pAllocator,
1194 VkSemaphore* pSemaphore)
1195 {
1196 /* The DRM execbuffer ioctl always execute in-oder, even between different
1197 * rings. As such, there's nothing to do for the user space semaphore.
1198 */
1199
1200 *pSemaphore = (VkSemaphore)1;
1201
1202 return VK_SUCCESS;
1203 }
1204
1205 void radv_DestroySemaphore(
1206 VkDevice device,
1207 VkSemaphore semaphore,
1208 const VkAllocationCallbacks* pAllocator)
1209 {
1210 }
1211
1212 VkResult radv_CreateEvent(
1213 VkDevice _device,
1214 const VkEventCreateInfo* pCreateInfo,
1215 const VkAllocationCallbacks* pAllocator,
1216 VkEvent* pEvent)
1217 {
1218 RADV_FROM_HANDLE(radv_device, device, _device);
1219 struct radv_event *event = vk_alloc2(&device->alloc, pAllocator,
1220 sizeof(*event), 8,
1221 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1222
1223 if (!event)
1224 return VK_ERROR_OUT_OF_HOST_MEMORY;
1225
1226 event->bo = device->ws->buffer_create(device->ws, 8, 8,
1227 RADEON_DOMAIN_GTT,
1228 RADEON_FLAG_CPU_ACCESS);
1229 if (!event->bo) {
1230 vk_free2(&device->alloc, pAllocator, event);
1231 return VK_ERROR_OUT_OF_DEVICE_MEMORY;
1232 }
1233
1234 event->map = (uint64_t*)device->ws->buffer_map(event->bo);
1235
1236 *pEvent = radv_event_to_handle(event);
1237
1238 return VK_SUCCESS;
1239 }
1240
1241 void radv_DestroyEvent(
1242 VkDevice _device,
1243 VkEvent _event,
1244 const VkAllocationCallbacks* pAllocator)
1245 {
1246 RADV_FROM_HANDLE(radv_device, device, _device);
1247 RADV_FROM_HANDLE(radv_event, event, _event);
1248
1249 if (!event)
1250 return;
1251 device->ws->buffer_destroy(event->bo);
1252 vk_free2(&device->alloc, pAllocator, event);
1253 }
1254
1255 VkResult radv_GetEventStatus(
1256 VkDevice _device,
1257 VkEvent _event)
1258 {
1259 RADV_FROM_HANDLE(radv_event, event, _event);
1260
1261 if (*event->map == 1)
1262 return VK_EVENT_SET;
1263 return VK_EVENT_RESET;
1264 }
1265
1266 VkResult radv_SetEvent(
1267 VkDevice _device,
1268 VkEvent _event)
1269 {
1270 RADV_FROM_HANDLE(radv_event, event, _event);
1271 *event->map = 1;
1272
1273 return VK_SUCCESS;
1274 }
1275
1276 VkResult radv_ResetEvent(
1277 VkDevice _device,
1278 VkEvent _event)
1279 {
1280 RADV_FROM_HANDLE(radv_event, event, _event);
1281 *event->map = 0;
1282
1283 return VK_SUCCESS;
1284 }
1285
1286 VkResult radv_CreateBuffer(
1287 VkDevice _device,
1288 const VkBufferCreateInfo* pCreateInfo,
1289 const VkAllocationCallbacks* pAllocator,
1290 VkBuffer* pBuffer)
1291 {
1292 RADV_FROM_HANDLE(radv_device, device, _device);
1293 struct radv_buffer *buffer;
1294
1295 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO);
1296
1297 buffer = vk_alloc2(&device->alloc, pAllocator, sizeof(*buffer), 8,
1298 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1299 if (buffer == NULL)
1300 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1301
1302 buffer->size = pCreateInfo->size;
1303 buffer->usage = pCreateInfo->usage;
1304 buffer->bo = NULL;
1305 buffer->offset = 0;
1306
1307 *pBuffer = radv_buffer_to_handle(buffer);
1308
1309 return VK_SUCCESS;
1310 }
1311
1312 void radv_DestroyBuffer(
1313 VkDevice _device,
1314 VkBuffer _buffer,
1315 const VkAllocationCallbacks* pAllocator)
1316 {
1317 RADV_FROM_HANDLE(radv_device, device, _device);
1318 RADV_FROM_HANDLE(radv_buffer, buffer, _buffer);
1319
1320 if (!buffer)
1321 return;
1322
1323 vk_free2(&device->alloc, pAllocator, buffer);
1324 }
1325
1326 static inline unsigned
1327 si_tile_mode_index(const struct radv_image *image, unsigned level, bool stencil)
1328 {
1329 if (stencil)
1330 return image->surface.stencil_tiling_index[level];
1331 else
1332 return image->surface.tiling_index[level];
1333 }
1334
1335 static void
1336 radv_initialise_color_surface(struct radv_device *device,
1337 struct radv_color_buffer_info *cb,
1338 struct radv_image_view *iview)
1339 {
1340 const struct vk_format_description *desc;
1341 unsigned ntype, format, swap, endian;
1342 unsigned blend_clamp = 0, blend_bypass = 0;
1343 unsigned pitch_tile_max, slice_tile_max, tile_mode_index;
1344 uint64_t va;
1345 const struct radeon_surf *surf = &iview->image->surface;
1346 const struct radeon_surf_level *level_info = &surf->level[iview->base_mip];
1347
1348 desc = vk_format_description(iview->vk_format);
1349
1350 memset(cb, 0, sizeof(*cb));
1351
1352 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
1353 va += level_info->offset;
1354 cb->cb_color_base = va >> 8;
1355
1356 /* CMASK variables */
1357 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
1358 va += iview->image->cmask.offset;
1359 cb->cb_color_cmask = va >> 8;
1360 cb->cb_color_cmask_slice = iview->image->cmask.slice_tile_max;
1361
1362 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
1363 va += iview->image->dcc_offset;
1364 cb->cb_dcc_base = va >> 8;
1365
1366 cb->cb_color_view = S_028C6C_SLICE_START(iview->base_layer) |
1367 S_028C6C_SLICE_MAX(iview->base_layer + iview->extent.depth - 1);
1368
1369 cb->micro_tile_mode = iview->image->surface.micro_tile_mode;
1370 pitch_tile_max = level_info->nblk_x / 8 - 1;
1371 slice_tile_max = (level_info->nblk_x * level_info->nblk_y) / 64 - 1;
1372 tile_mode_index = si_tile_mode_index(iview->image, iview->base_mip, false);
1373
1374 cb->cb_color_pitch = S_028C64_TILE_MAX(pitch_tile_max);
1375 cb->cb_color_slice = S_028C68_TILE_MAX(slice_tile_max);
1376
1377 /* Intensity is implemented as Red, so treat it that way. */
1378 cb->cb_color_attrib = S_028C74_FORCE_DST_ALPHA_1(desc->swizzle[3] == VK_SWIZZLE_1) |
1379 S_028C74_TILE_MODE_INDEX(tile_mode_index);
1380
1381 if (iview->image->samples > 1) {
1382 unsigned log_samples = util_logbase2(iview->image->samples);
1383
1384 cb->cb_color_attrib |= S_028C74_NUM_SAMPLES(log_samples) |
1385 S_028C74_NUM_FRAGMENTS(log_samples);
1386 }
1387
1388 if (iview->image->fmask.size) {
1389 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset + iview->image->fmask.offset;
1390 if (device->instance->physicalDevice.rad_info.chip_class >= CIK)
1391 cb->cb_color_pitch |= S_028C64_FMASK_TILE_MAX(iview->image->fmask.pitch_in_pixels / 8 - 1);
1392 cb->cb_color_attrib |= S_028C74_FMASK_TILE_MODE_INDEX(iview->image->fmask.tile_mode_index);
1393 cb->cb_color_fmask = va >> 8;
1394 cb->cb_color_fmask_slice = S_028C88_TILE_MAX(iview->image->fmask.slice_tile_max);
1395 } else {
1396 /* This must be set for fast clear to work without FMASK. */
1397 if (device->instance->physicalDevice.rad_info.chip_class >= CIK)
1398 cb->cb_color_pitch |= S_028C64_FMASK_TILE_MAX(pitch_tile_max);
1399 cb->cb_color_attrib |= S_028C74_FMASK_TILE_MODE_INDEX(tile_mode_index);
1400 cb->cb_color_fmask = cb->cb_color_base;
1401 cb->cb_color_fmask_slice = S_028C88_TILE_MAX(slice_tile_max);
1402 }
1403
1404 ntype = radv_translate_color_numformat(iview->vk_format,
1405 desc,
1406 vk_format_get_first_non_void_channel(iview->vk_format));
1407 format = radv_translate_colorformat(iview->vk_format);
1408 if (format == V_028C70_COLOR_INVALID || ntype == ~0u)
1409 radv_finishme("Illegal color\n");
1410 swap = radv_translate_colorswap(iview->vk_format, FALSE);
1411 endian = radv_colorformat_endian_swap(format);
1412
1413 /* blend clamp should be set for all NORM/SRGB types */
1414 if (ntype == V_028C70_NUMBER_UNORM ||
1415 ntype == V_028C70_NUMBER_SNORM ||
1416 ntype == V_028C70_NUMBER_SRGB)
1417 blend_clamp = 1;
1418
1419 /* set blend bypass according to docs if SINT/UINT or
1420 8/24 COLOR variants */
1421 if (ntype == V_028C70_NUMBER_UINT || ntype == V_028C70_NUMBER_SINT ||
1422 format == V_028C70_COLOR_8_24 || format == V_028C70_COLOR_24_8 ||
1423 format == V_028C70_COLOR_X24_8_32_FLOAT) {
1424 blend_clamp = 0;
1425 blend_bypass = 1;
1426 }
1427 #if 0
1428 if ((ntype == V_028C70_NUMBER_UINT || ntype == V_028C70_NUMBER_SINT) &&
1429 (format == V_028C70_COLOR_8 ||
1430 format == V_028C70_COLOR_8_8 ||
1431 format == V_028C70_COLOR_8_8_8_8))
1432 ->color_is_int8 = true;
1433 #endif
1434 cb->cb_color_info = S_028C70_FORMAT(format) |
1435 S_028C70_COMP_SWAP(swap) |
1436 S_028C70_BLEND_CLAMP(blend_clamp) |
1437 S_028C70_BLEND_BYPASS(blend_bypass) |
1438 S_028C70_SIMPLE_FLOAT(1) |
1439 S_028C70_ROUND_MODE(ntype != V_028C70_NUMBER_UNORM &&
1440 ntype != V_028C70_NUMBER_SNORM &&
1441 ntype != V_028C70_NUMBER_SRGB &&
1442 format != V_028C70_COLOR_8_24 &&
1443 format != V_028C70_COLOR_24_8) |
1444 S_028C70_NUMBER_TYPE(ntype) |
1445 S_028C70_ENDIAN(endian);
1446 if (iview->image->samples > 1)
1447 if (iview->image->fmask.size)
1448 cb->cb_color_info |= S_028C70_COMPRESSION(1);
1449
1450 if (iview->image->cmask.size && device->allow_fast_clears)
1451 cb->cb_color_info |= S_028C70_FAST_CLEAR(1);
1452
1453 if (iview->image->surface.dcc_size && level_info->dcc_enabled)
1454 cb->cb_color_info |= S_028C70_DCC_ENABLE(1);
1455
1456 if (device->instance->physicalDevice.rad_info.chip_class >= VI) {
1457 unsigned max_uncompressed_block_size = 2;
1458 if (iview->image->samples > 1) {
1459 if (iview->image->surface.bpe == 1)
1460 max_uncompressed_block_size = 0;
1461 else if (iview->image->surface.bpe == 2)
1462 max_uncompressed_block_size = 1;
1463 }
1464
1465 cb->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size) |
1466 S_028C78_INDEPENDENT_64B_BLOCKS(1);
1467 }
1468
1469 /* This must be set for fast clear to work without FMASK. */
1470 if (!iview->image->fmask.size &&
1471 device->instance->physicalDevice.rad_info.chip_class == SI) {
1472 unsigned bankh = util_logbase2(iview->image->surface.bankh);
1473 cb->cb_color_attrib |= S_028C74_FMASK_BANK_HEIGHT(bankh);
1474 }
1475 }
1476
1477 static void
1478 radv_initialise_ds_surface(struct radv_device *device,
1479 struct radv_ds_buffer_info *ds,
1480 struct radv_image_view *iview)
1481 {
1482 unsigned level = iview->base_mip;
1483 unsigned format;
1484 uint64_t va, s_offs, z_offs;
1485 const struct radeon_surf_level *level_info = &iview->image->surface.level[level];
1486 memset(ds, 0, sizeof(*ds));
1487 switch (iview->vk_format) {
1488 case VK_FORMAT_D24_UNORM_S8_UINT:
1489 case VK_FORMAT_X8_D24_UNORM_PACK32:
1490 ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-24);
1491 ds->offset_scale = 2.0f;
1492 break;
1493 case VK_FORMAT_D16_UNORM:
1494 case VK_FORMAT_D16_UNORM_S8_UINT:
1495 ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-16);
1496 ds->offset_scale = 4.0f;
1497 break;
1498 case VK_FORMAT_D32_SFLOAT:
1499 case VK_FORMAT_D32_SFLOAT_S8_UINT:
1500 ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-23) |
1501 S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(1);
1502 ds->offset_scale = 1.0f;
1503 break;
1504 default:
1505 break;
1506 }
1507
1508 format = radv_translate_dbformat(iview->vk_format);
1509 if (format == V_028040_Z_INVALID) {
1510 fprintf(stderr, "Invalid DB format: %d, disabling DB.\n", iview->vk_format);
1511 }
1512
1513 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
1514 s_offs = z_offs = va;
1515 z_offs += iview->image->surface.level[level].offset;
1516 s_offs += iview->image->surface.stencil_level[level].offset;
1517
1518 ds->db_depth_view = S_028008_SLICE_START(iview->base_layer) |
1519 S_028008_SLICE_MAX(iview->base_layer + iview->extent.depth - 1);
1520 ds->db_depth_info = S_02803C_ADDR5_SWIZZLE_MASK(1);
1521 ds->db_z_info = S_028040_FORMAT(format) | S_028040_ZRANGE_PRECISION(1);
1522
1523 if (iview->image->samples > 1)
1524 ds->db_z_info |= S_028040_NUM_SAMPLES(util_logbase2(iview->image->samples));
1525
1526 if (iview->image->surface.flags & RADEON_SURF_SBUFFER)
1527 ds->db_stencil_info = S_028044_FORMAT(V_028044_STENCIL_8);
1528 else
1529 ds->db_stencil_info = S_028044_FORMAT(V_028044_STENCIL_INVALID);
1530
1531 if (device->instance->physicalDevice.rad_info.chip_class >= CIK) {
1532 struct radeon_info *info = &device->instance->physicalDevice.rad_info;
1533 unsigned tiling_index = iview->image->surface.tiling_index[level];
1534 unsigned stencil_index = iview->image->surface.stencil_tiling_index[level];
1535 unsigned macro_index = iview->image->surface.macro_tile_index;
1536 unsigned tile_mode = info->si_tile_mode_array[tiling_index];
1537 unsigned stencil_tile_mode = info->si_tile_mode_array[stencil_index];
1538 unsigned macro_mode = info->cik_macrotile_mode_array[macro_index];
1539
1540 ds->db_depth_info |=
1541 S_02803C_ARRAY_MODE(G_009910_ARRAY_MODE(tile_mode)) |
1542 S_02803C_PIPE_CONFIG(G_009910_PIPE_CONFIG(tile_mode)) |
1543 S_02803C_BANK_WIDTH(G_009990_BANK_WIDTH(macro_mode)) |
1544 S_02803C_BANK_HEIGHT(G_009990_BANK_HEIGHT(macro_mode)) |
1545 S_02803C_MACRO_TILE_ASPECT(G_009990_MACRO_TILE_ASPECT(macro_mode)) |
1546 S_02803C_NUM_BANKS(G_009990_NUM_BANKS(macro_mode));
1547 ds->db_z_info |= S_028040_TILE_SPLIT(G_009910_TILE_SPLIT(tile_mode));
1548 ds->db_stencil_info |= S_028044_TILE_SPLIT(G_009910_TILE_SPLIT(stencil_tile_mode));
1549 } else {
1550 unsigned tile_mode_index = si_tile_mode_index(iview->image, level, false);
1551 ds->db_z_info |= S_028040_TILE_MODE_INDEX(tile_mode_index);
1552 tile_mode_index = si_tile_mode_index(iview->image, level, true);
1553 ds->db_stencil_info |= S_028044_TILE_MODE_INDEX(tile_mode_index);
1554 }
1555
1556 if (iview->image->htile.size && !level) {
1557 ds->db_z_info |= S_028040_TILE_SURFACE_ENABLE(1) |
1558 S_028040_ALLOW_EXPCLEAR(1);
1559
1560 if (iview->image->surface.flags & RADEON_SURF_SBUFFER) {
1561 /* Workaround: For a not yet understood reason, the
1562 * combination of MSAA, fast stencil clear and stencil
1563 * decompress messes with subsequent stencil buffer
1564 * uses. Problem was reproduced on Verde, Bonaire,
1565 * Tonga, and Carrizo.
1566 *
1567 * Disabling EXPCLEAR works around the problem.
1568 *
1569 * Check piglit's arb_texture_multisample-stencil-clear
1570 * test if you want to try changing this.
1571 */
1572 if (iview->image->samples <= 1)
1573 ds->db_stencil_info |= S_028044_ALLOW_EXPCLEAR(1);
1574 } else
1575 /* Use all of the htile_buffer for depth if there's no stencil. */
1576 ds->db_stencil_info |= S_028044_TILE_STENCIL_DISABLE(1);
1577
1578 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset +
1579 iview->image->htile.offset;
1580 ds->db_htile_data_base = va >> 8;
1581 ds->db_htile_surface = S_028ABC_FULL_CACHE(1);
1582 } else {
1583 ds->db_htile_data_base = 0;
1584 ds->db_htile_surface = 0;
1585 }
1586
1587 ds->db_z_read_base = ds->db_z_write_base = z_offs >> 8;
1588 ds->db_stencil_read_base = ds->db_stencil_write_base = s_offs >> 8;
1589
1590 ds->db_depth_size = S_028058_PITCH_TILE_MAX((level_info->nblk_x / 8) - 1) |
1591 S_028058_HEIGHT_TILE_MAX((level_info->nblk_y / 8) - 1);
1592 ds->db_depth_slice = S_02805C_SLICE_TILE_MAX((level_info->nblk_x * level_info->nblk_y) / 64 - 1);
1593 }
1594
1595 VkResult radv_CreateFramebuffer(
1596 VkDevice _device,
1597 const VkFramebufferCreateInfo* pCreateInfo,
1598 const VkAllocationCallbacks* pAllocator,
1599 VkFramebuffer* pFramebuffer)
1600 {
1601 RADV_FROM_HANDLE(radv_device, device, _device);
1602 struct radv_framebuffer *framebuffer;
1603
1604 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO);
1605
1606 size_t size = sizeof(*framebuffer) +
1607 sizeof(struct radv_attachment_info) * pCreateInfo->attachmentCount;
1608 framebuffer = vk_alloc2(&device->alloc, pAllocator, size, 8,
1609 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1610 if (framebuffer == NULL)
1611 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1612
1613 framebuffer->attachment_count = pCreateInfo->attachmentCount;
1614 for (uint32_t i = 0; i < pCreateInfo->attachmentCount; i++) {
1615 VkImageView _iview = pCreateInfo->pAttachments[i];
1616 struct radv_image_view *iview = radv_image_view_from_handle(_iview);
1617 framebuffer->attachments[i].attachment = iview;
1618 if (iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT) {
1619 radv_initialise_color_surface(device, &framebuffer->attachments[i].cb, iview);
1620 } else if (iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT)) {
1621 radv_initialise_ds_surface(device, &framebuffer->attachments[i].ds, iview);
1622 }
1623 }
1624
1625 framebuffer->width = pCreateInfo->width;
1626 framebuffer->height = pCreateInfo->height;
1627 framebuffer->layers = pCreateInfo->layers;
1628
1629 *pFramebuffer = radv_framebuffer_to_handle(framebuffer);
1630 return VK_SUCCESS;
1631 }
1632
1633 void radv_DestroyFramebuffer(
1634 VkDevice _device,
1635 VkFramebuffer _fb,
1636 const VkAllocationCallbacks* pAllocator)
1637 {
1638 RADV_FROM_HANDLE(radv_device, device, _device);
1639 RADV_FROM_HANDLE(radv_framebuffer, fb, _fb);
1640
1641 if (!fb)
1642 return;
1643 vk_free2(&device->alloc, pAllocator, fb);
1644 }
1645
1646 static unsigned radv_tex_wrap(VkSamplerAddressMode address_mode)
1647 {
1648 switch (address_mode) {
1649 case VK_SAMPLER_ADDRESS_MODE_REPEAT:
1650 return V_008F30_SQ_TEX_WRAP;
1651 case VK_SAMPLER_ADDRESS_MODE_MIRRORED_REPEAT:
1652 return V_008F30_SQ_TEX_MIRROR;
1653 case VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE:
1654 return V_008F30_SQ_TEX_CLAMP_LAST_TEXEL;
1655 case VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER:
1656 return V_008F30_SQ_TEX_CLAMP_BORDER;
1657 case VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE:
1658 return V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL;
1659 default:
1660 unreachable("illegal tex wrap mode");
1661 break;
1662 }
1663 }
1664
1665 static unsigned
1666 radv_tex_compare(VkCompareOp op)
1667 {
1668 switch (op) {
1669 case VK_COMPARE_OP_NEVER:
1670 return V_008F30_SQ_TEX_DEPTH_COMPARE_NEVER;
1671 case VK_COMPARE_OP_LESS:
1672 return V_008F30_SQ_TEX_DEPTH_COMPARE_LESS;
1673 case VK_COMPARE_OP_EQUAL:
1674 return V_008F30_SQ_TEX_DEPTH_COMPARE_EQUAL;
1675 case VK_COMPARE_OP_LESS_OR_EQUAL:
1676 return V_008F30_SQ_TEX_DEPTH_COMPARE_LESSEQUAL;
1677 case VK_COMPARE_OP_GREATER:
1678 return V_008F30_SQ_TEX_DEPTH_COMPARE_GREATER;
1679 case VK_COMPARE_OP_NOT_EQUAL:
1680 return V_008F30_SQ_TEX_DEPTH_COMPARE_NOTEQUAL;
1681 case VK_COMPARE_OP_GREATER_OR_EQUAL:
1682 return V_008F30_SQ_TEX_DEPTH_COMPARE_GREATEREQUAL;
1683 case VK_COMPARE_OP_ALWAYS:
1684 return V_008F30_SQ_TEX_DEPTH_COMPARE_ALWAYS;
1685 default:
1686 unreachable("illegal compare mode");
1687 break;
1688 }
1689 }
1690
1691 static unsigned
1692 radv_tex_filter(VkFilter filter, unsigned max_ansio)
1693 {
1694 switch (filter) {
1695 case VK_FILTER_NEAREST:
1696 return (max_ansio > 1 ? V_008F38_SQ_TEX_XY_FILTER_ANISO_POINT :
1697 V_008F38_SQ_TEX_XY_FILTER_POINT);
1698 case VK_FILTER_LINEAR:
1699 return (max_ansio > 1 ? V_008F38_SQ_TEX_XY_FILTER_ANISO_BILINEAR :
1700 V_008F38_SQ_TEX_XY_FILTER_BILINEAR);
1701 case VK_FILTER_CUBIC_IMG:
1702 default:
1703 fprintf(stderr, "illegal texture filter");
1704 return 0;
1705 }
1706 }
1707
1708 static unsigned
1709 radv_tex_mipfilter(VkSamplerMipmapMode mode)
1710 {
1711 switch (mode) {
1712 case VK_SAMPLER_MIPMAP_MODE_NEAREST:
1713 return V_008F38_SQ_TEX_Z_FILTER_POINT;
1714 case VK_SAMPLER_MIPMAP_MODE_LINEAR:
1715 return V_008F38_SQ_TEX_Z_FILTER_LINEAR;
1716 default:
1717 return V_008F38_SQ_TEX_Z_FILTER_NONE;
1718 }
1719 }
1720
1721 static unsigned
1722 radv_tex_bordercolor(VkBorderColor bcolor)
1723 {
1724 switch (bcolor) {
1725 case VK_BORDER_COLOR_FLOAT_TRANSPARENT_BLACK:
1726 case VK_BORDER_COLOR_INT_TRANSPARENT_BLACK:
1727 return V_008F3C_SQ_TEX_BORDER_COLOR_TRANS_BLACK;
1728 case VK_BORDER_COLOR_FLOAT_OPAQUE_BLACK:
1729 case VK_BORDER_COLOR_INT_OPAQUE_BLACK:
1730 return V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_BLACK;
1731 case VK_BORDER_COLOR_FLOAT_OPAQUE_WHITE:
1732 case VK_BORDER_COLOR_INT_OPAQUE_WHITE:
1733 return V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_WHITE;
1734 default:
1735 break;
1736 }
1737 return 0;
1738 }
1739
1740 static void
1741 radv_init_sampler(struct radv_device *device,
1742 struct radv_sampler *sampler,
1743 const VkSamplerCreateInfo *pCreateInfo)
1744 {
1745 uint32_t max_aniso = 0;
1746 uint32_t max_aniso_ratio = 0;//TODO
1747 bool is_vi;
1748 is_vi = (device->instance->physicalDevice.rad_info.chip_class >= VI);
1749
1750 sampler->state[0] = (S_008F30_CLAMP_X(radv_tex_wrap(pCreateInfo->addressModeU)) |
1751 S_008F30_CLAMP_Y(radv_tex_wrap(pCreateInfo->addressModeV)) |
1752 S_008F30_CLAMP_Z(radv_tex_wrap(pCreateInfo->addressModeW)) |
1753 S_008F30_MAX_ANISO_RATIO(max_aniso_ratio) |
1754 S_008F30_DEPTH_COMPARE_FUNC(radv_tex_compare(pCreateInfo->compareOp)) |
1755 S_008F30_FORCE_UNNORMALIZED(pCreateInfo->unnormalizedCoordinates ? 1 : 0) |
1756 S_008F30_DISABLE_CUBE_WRAP(0) |
1757 S_008F30_COMPAT_MODE(is_vi));
1758 sampler->state[1] = (S_008F34_MIN_LOD(S_FIXED(CLAMP(pCreateInfo->minLod, 0, 15), 8)) |
1759 S_008F34_MAX_LOD(S_FIXED(CLAMP(pCreateInfo->maxLod, 0, 15), 8)));
1760 sampler->state[2] = (S_008F38_LOD_BIAS(S_FIXED(CLAMP(pCreateInfo->mipLodBias, -16, 16), 8)) |
1761 S_008F38_XY_MAG_FILTER(radv_tex_filter(pCreateInfo->magFilter, max_aniso)) |
1762 S_008F38_XY_MIN_FILTER(radv_tex_filter(pCreateInfo->minFilter, max_aniso)) |
1763 S_008F38_MIP_FILTER(radv_tex_mipfilter(pCreateInfo->mipmapMode)) |
1764 S_008F38_MIP_POINT_PRECLAMP(1) |
1765 S_008F38_DISABLE_LSB_CEIL(1) |
1766 S_008F38_FILTER_PREC_FIX(1) |
1767 S_008F38_ANISO_OVERRIDE(is_vi));
1768 sampler->state[3] = (S_008F3C_BORDER_COLOR_PTR(0) |
1769 S_008F3C_BORDER_COLOR_TYPE(radv_tex_bordercolor(pCreateInfo->borderColor)));
1770 }
1771
1772 VkResult radv_CreateSampler(
1773 VkDevice _device,
1774 const VkSamplerCreateInfo* pCreateInfo,
1775 const VkAllocationCallbacks* pAllocator,
1776 VkSampler* pSampler)
1777 {
1778 RADV_FROM_HANDLE(radv_device, device, _device);
1779 struct radv_sampler *sampler;
1780
1781 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
1782
1783 sampler = vk_alloc2(&device->alloc, pAllocator, sizeof(*sampler), 8,
1784 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1785 if (!sampler)
1786 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1787
1788 radv_init_sampler(device, sampler, pCreateInfo);
1789 *pSampler = radv_sampler_to_handle(sampler);
1790
1791 return VK_SUCCESS;
1792 }
1793
1794 void radv_DestroySampler(
1795 VkDevice _device,
1796 VkSampler _sampler,
1797 const VkAllocationCallbacks* pAllocator)
1798 {
1799 RADV_FROM_HANDLE(radv_device, device, _device);
1800 RADV_FROM_HANDLE(radv_sampler, sampler, _sampler);
1801
1802 if (!sampler)
1803 return;
1804 vk_free2(&device->alloc, pAllocator, sampler);
1805 }