radv: add helper for setting a descriptor.
[mesa.git] / src / amd / vulkan / radv_meta.c
1 /*
2 * Copyright © 2016 Red Hat
3 * based on intel anv code:
4 * Copyright © 2015 Intel Corporation
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
23 * IN THE SOFTWARE.
24 */
25
26 #include "radv_meta.h"
27
28 #include <fcntl.h>
29 #include <limits.h>
30 #include <pwd.h>
31 #include <sys/stat.h>
32
33 void
34 radv_meta_save(struct radv_meta_saved_state *state,
35 struct radv_cmd_buffer *cmd_buffer, uint32_t flags)
36 {
37 assert(flags & (RADV_META_SAVE_GRAPHICS_PIPELINE |
38 RADV_META_SAVE_COMPUTE_PIPELINE));
39
40 state->flags = flags;
41
42 if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) {
43 assert(!(state->flags & RADV_META_SAVE_COMPUTE_PIPELINE));
44
45 state->old_pipeline = cmd_buffer->state.pipeline;
46
47 /* Save all viewports. */
48 state->viewport.count = cmd_buffer->state.dynamic.viewport.count;
49 typed_memcpy(state->viewport.viewports,
50 cmd_buffer->state.dynamic.viewport.viewports,
51 MAX_VIEWPORTS);
52
53 /* Save all scissors. */
54 state->scissor.count = cmd_buffer->state.dynamic.scissor.count;
55 typed_memcpy(state->scissor.scissors,
56 cmd_buffer->state.dynamic.scissor.scissors,
57 MAX_SCISSORS);
58
59 /* The most common meta operations all want to have the
60 * viewport reset and any scissors disabled. The rest of the
61 * dynamic state should have no effect.
62 */
63 cmd_buffer->state.dynamic.viewport.count = 0;
64 cmd_buffer->state.dynamic.scissor.count = 0;
65 cmd_buffer->state.dirty |= 1 << VK_DYNAMIC_STATE_VIEWPORT |
66 1 << VK_DYNAMIC_STATE_SCISSOR;
67 }
68
69 if (state->flags & RADV_META_SAVE_COMPUTE_PIPELINE) {
70 assert(!(state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE));
71
72 state->old_pipeline = cmd_buffer->state.compute_pipeline;
73 }
74
75 if (state->flags & RADV_META_SAVE_DESCRIPTORS) {
76 state->old_descriptor_set0 = cmd_buffer->state.descriptors[0];
77 }
78
79 if (state->flags & RADV_META_SAVE_CONSTANTS) {
80 memcpy(state->push_constants, cmd_buffer->push_constants,
81 MAX_PUSH_CONSTANTS_SIZE);
82 }
83
84 if (state->flags & RADV_META_SAVE_PASS) {
85 state->pass = cmd_buffer->state.pass;
86 state->subpass = cmd_buffer->state.subpass;
87 state->framebuffer = cmd_buffer->state.framebuffer;
88 state->attachments = cmd_buffer->state.attachments;
89 state->render_area = cmd_buffer->state.render_area;
90 }
91 }
92
93 void
94 radv_meta_restore(const struct radv_meta_saved_state *state,
95 struct radv_cmd_buffer *cmd_buffer)
96 {
97 if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) {
98 radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
99 VK_PIPELINE_BIND_POINT_GRAPHICS,
100 radv_pipeline_to_handle(state->old_pipeline));
101
102 cmd_buffer->state.dirty |= RADV_CMD_DIRTY_PIPELINE;
103
104 /* Restore all viewports. */
105 cmd_buffer->state.dynamic.viewport.count = state->viewport.count;
106 typed_memcpy(cmd_buffer->state.dynamic.viewport.viewports,
107 state->viewport.viewports,
108 MAX_VIEWPORTS);
109
110 /* Restore all scissors. */
111 cmd_buffer->state.dynamic.scissor.count = state->scissor.count;
112 typed_memcpy(cmd_buffer->state.dynamic.scissor.scissors,
113 state->scissor.scissors,
114 MAX_SCISSORS);
115
116 cmd_buffer->state.dirty |= 1 << VK_DYNAMIC_STATE_VIEWPORT |
117 1 << VK_DYNAMIC_STATE_SCISSOR;
118 }
119
120 if (state->flags & RADV_META_SAVE_COMPUTE_PIPELINE) {
121 radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
122 VK_PIPELINE_BIND_POINT_COMPUTE,
123 radv_pipeline_to_handle(state->old_pipeline));
124 }
125
126 if (state->flags & RADV_META_SAVE_DESCRIPTORS) {
127 radv_set_descriptor_set(cmd_buffer, state->old_descriptor_set0, 0);
128 }
129
130 if (state->flags & RADV_META_SAVE_CONSTANTS) {
131 memcpy(cmd_buffer->push_constants, state->push_constants,
132 MAX_PUSH_CONSTANTS_SIZE);
133 cmd_buffer->push_constant_stages |= VK_SHADER_STAGE_COMPUTE_BIT;
134
135 if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) {
136 cmd_buffer->push_constant_stages |= VK_SHADER_STAGE_ALL_GRAPHICS;
137 }
138 }
139
140 if (state->flags & RADV_META_SAVE_PASS) {
141 cmd_buffer->state.pass = state->pass;
142 cmd_buffer->state.subpass = state->subpass;
143 cmd_buffer->state.framebuffer = state->framebuffer;
144 cmd_buffer->state.attachments = state->attachments;
145 cmd_buffer->state.render_area = state->render_area;
146 if (state->subpass)
147 radv_emit_framebuffer_state(cmd_buffer);
148 }
149 }
150
151 VkImageViewType
152 radv_meta_get_view_type(const struct radv_image *image)
153 {
154 switch (image->type) {
155 case VK_IMAGE_TYPE_1D: return VK_IMAGE_VIEW_TYPE_1D;
156 case VK_IMAGE_TYPE_2D: return VK_IMAGE_VIEW_TYPE_2D;
157 case VK_IMAGE_TYPE_3D: return VK_IMAGE_VIEW_TYPE_3D;
158 default:
159 unreachable("bad VkImageViewType");
160 }
161 }
162
163 /**
164 * When creating a destination VkImageView, this function provides the needed
165 * VkImageViewCreateInfo::subresourceRange::baseArrayLayer.
166 */
167 uint32_t
168 radv_meta_get_iview_layer(const struct radv_image *dest_image,
169 const VkImageSubresourceLayers *dest_subresource,
170 const VkOffset3D *dest_offset)
171 {
172 switch (dest_image->type) {
173 case VK_IMAGE_TYPE_1D:
174 case VK_IMAGE_TYPE_2D:
175 return dest_subresource->baseArrayLayer;
176 case VK_IMAGE_TYPE_3D:
177 /* HACK: Vulkan does not allow attaching a 3D image to a framebuffer,
178 * but meta does it anyway. When doing so, we translate the
179 * destination's z offset into an array offset.
180 */
181 return dest_offset->z;
182 default:
183 assert(!"bad VkImageType");
184 return 0;
185 }
186 }
187
188 static void *
189 meta_alloc(void* _device, size_t size, size_t alignment,
190 VkSystemAllocationScope allocationScope)
191 {
192 struct radv_device *device = _device;
193 return device->alloc.pfnAllocation(device->alloc.pUserData, size, alignment,
194 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
195 }
196
197 static void *
198 meta_realloc(void* _device, void *original, size_t size, size_t alignment,
199 VkSystemAllocationScope allocationScope)
200 {
201 struct radv_device *device = _device;
202 return device->alloc.pfnReallocation(device->alloc.pUserData, original,
203 size, alignment,
204 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
205 }
206
207 static void
208 meta_free(void* _device, void *data)
209 {
210 struct radv_device *device = _device;
211 return device->alloc.pfnFree(device->alloc.pUserData, data);
212 }
213
214 static bool
215 radv_builtin_cache_path(char *path)
216 {
217 char *xdg_cache_home = getenv("XDG_CACHE_HOME");
218 const char *suffix = "/radv_builtin_shaders";
219 const char *suffix2 = "/.cache/radv_builtin_shaders";
220 struct passwd pwd, *result;
221 char path2[PATH_MAX + 1]; /* PATH_MAX is not a real max,but suffices here. */
222
223 if (xdg_cache_home) {
224
225 if (strlen(xdg_cache_home) + strlen(suffix) > PATH_MAX)
226 return false;
227
228 strcpy(path, xdg_cache_home);
229 strcat(path, suffix);
230 return true;
231 }
232
233 getpwuid_r(getuid(), &pwd, path2, PATH_MAX - strlen(suffix2), &result);
234 if (!result)
235 return false;
236
237 strcpy(path, pwd.pw_dir);
238 strcat(path, "/.cache");
239 mkdir(path, 0755);
240
241 strcat(path, suffix);
242 return true;
243 }
244
245 static void
246 radv_load_meta_pipeline(struct radv_device *device)
247 {
248 char path[PATH_MAX + 1];
249 struct stat st;
250 void *data = NULL;
251
252 if (!radv_builtin_cache_path(path))
253 return;
254
255 int fd = open(path, O_RDONLY);
256 if (fd < 0)
257 return;
258 if (fstat(fd, &st))
259 goto fail;
260 data = malloc(st.st_size);
261 if (!data)
262 goto fail;
263 if(read(fd, data, st.st_size) == -1)
264 goto fail;
265
266 radv_pipeline_cache_load(&device->meta_state.cache, data, st.st_size);
267 fail:
268 free(data);
269 close(fd);
270 }
271
272 static void
273 radv_store_meta_pipeline(struct radv_device *device)
274 {
275 char path[PATH_MAX + 1], path2[PATH_MAX + 7];
276 size_t size;
277 void *data = NULL;
278
279 if (!device->meta_state.cache.modified)
280 return;
281
282 if (radv_GetPipelineCacheData(radv_device_to_handle(device),
283 radv_pipeline_cache_to_handle(&device->meta_state.cache),
284 &size, NULL))
285 return;
286
287 if (!radv_builtin_cache_path(path))
288 return;
289
290 strcpy(path2, path);
291 strcat(path2, "XXXXXX");
292 int fd = mkstemp(path2);//open(path, O_WRONLY | O_CREAT, 0600);
293 if (fd < 0)
294 return;
295 data = malloc(size);
296 if (!data)
297 goto fail;
298
299 if (radv_GetPipelineCacheData(radv_device_to_handle(device),
300 radv_pipeline_cache_to_handle(&device->meta_state.cache),
301 &size, data))
302 goto fail;
303 if(write(fd, data, size) == -1)
304 goto fail;
305
306 rename(path2, path);
307 fail:
308 free(data);
309 close(fd);
310 unlink(path2);
311 }
312
313 VkResult
314 radv_device_init_meta(struct radv_device *device)
315 {
316 VkResult result;
317
318 device->meta_state.alloc = (VkAllocationCallbacks) {
319 .pUserData = device,
320 .pfnAllocation = meta_alloc,
321 .pfnReallocation = meta_realloc,
322 .pfnFree = meta_free,
323 };
324
325 device->meta_state.cache.alloc = device->meta_state.alloc;
326 radv_pipeline_cache_init(&device->meta_state.cache, device);
327 radv_load_meta_pipeline(device);
328
329 result = radv_device_init_meta_clear_state(device);
330 if (result != VK_SUCCESS)
331 goto fail_clear;
332
333 result = radv_device_init_meta_resolve_state(device);
334 if (result != VK_SUCCESS)
335 goto fail_resolve;
336
337 result = radv_device_init_meta_blit_state(device);
338 if (result != VK_SUCCESS)
339 goto fail_blit;
340
341 result = radv_device_init_meta_blit2d_state(device);
342 if (result != VK_SUCCESS)
343 goto fail_blit2d;
344
345 result = radv_device_init_meta_bufimage_state(device);
346 if (result != VK_SUCCESS)
347 goto fail_bufimage;
348
349 result = radv_device_init_meta_depth_decomp_state(device);
350 if (result != VK_SUCCESS)
351 goto fail_depth_decomp;
352
353 result = radv_device_init_meta_buffer_state(device);
354 if (result != VK_SUCCESS)
355 goto fail_buffer;
356
357 result = radv_device_init_meta_query_state(device);
358 if (result != VK_SUCCESS)
359 goto fail_query;
360
361 result = radv_device_init_meta_fast_clear_flush_state(device);
362 if (result != VK_SUCCESS)
363 goto fail_fast_clear;
364
365 result = radv_device_init_meta_resolve_compute_state(device);
366 if (result != VK_SUCCESS)
367 goto fail_resolve_compute;
368
369 result = radv_device_init_meta_resolve_fragment_state(device);
370 if (result != VK_SUCCESS)
371 goto fail_resolve_fragment;
372 return VK_SUCCESS;
373
374 fail_resolve_fragment:
375 radv_device_finish_meta_resolve_compute_state(device);
376 fail_resolve_compute:
377 radv_device_finish_meta_fast_clear_flush_state(device);
378 fail_fast_clear:
379 radv_device_finish_meta_buffer_state(device);
380 fail_query:
381 radv_device_finish_meta_query_state(device);
382 fail_buffer:
383 radv_device_finish_meta_depth_decomp_state(device);
384 fail_depth_decomp:
385 radv_device_finish_meta_bufimage_state(device);
386 fail_bufimage:
387 radv_device_finish_meta_blit2d_state(device);
388 fail_blit2d:
389 radv_device_finish_meta_blit_state(device);
390 fail_blit:
391 radv_device_finish_meta_resolve_state(device);
392 fail_resolve:
393 radv_device_finish_meta_clear_state(device);
394 fail_clear:
395 radv_pipeline_cache_finish(&device->meta_state.cache);
396 return result;
397 }
398
399 void
400 radv_device_finish_meta(struct radv_device *device)
401 {
402 radv_device_finish_meta_clear_state(device);
403 radv_device_finish_meta_resolve_state(device);
404 radv_device_finish_meta_blit_state(device);
405 radv_device_finish_meta_blit2d_state(device);
406 radv_device_finish_meta_bufimage_state(device);
407 radv_device_finish_meta_depth_decomp_state(device);
408 radv_device_finish_meta_query_state(device);
409 radv_device_finish_meta_buffer_state(device);
410 radv_device_finish_meta_fast_clear_flush_state(device);
411 radv_device_finish_meta_resolve_compute_state(device);
412 radv_device_finish_meta_resolve_fragment_state(device);
413
414 radv_store_meta_pipeline(device);
415 radv_pipeline_cache_finish(&device->meta_state.cache);
416 }
417
418 nir_ssa_def *radv_meta_gen_rect_vertices_comp2(nir_builder *vs_b, nir_ssa_def *comp2)
419 {
420
421 nir_intrinsic_instr *vertex_id = nir_intrinsic_instr_create(vs_b->shader, nir_intrinsic_load_vertex_id_zero_base);
422 nir_ssa_dest_init(&vertex_id->instr, &vertex_id->dest, 1, 32, "vertexid");
423 nir_builder_instr_insert(vs_b, &vertex_id->instr);
424
425 /* vertex 0 - -1.0, -1.0 */
426 /* vertex 1 - -1.0, 1.0 */
427 /* vertex 2 - 1.0, -1.0 */
428 /* so channel 0 is vertex_id != 2 ? -1.0 : 1.0
429 channel 1 is vertex id != 1 ? -1.0 : 1.0 */
430
431 nir_ssa_def *c0cmp = nir_ine(vs_b, &vertex_id->dest.ssa,
432 nir_imm_int(vs_b, 2));
433 nir_ssa_def *c1cmp = nir_ine(vs_b, &vertex_id->dest.ssa,
434 nir_imm_int(vs_b, 1));
435
436 nir_ssa_def *comp[4];
437 comp[0] = nir_bcsel(vs_b, c0cmp,
438 nir_imm_float(vs_b, -1.0),
439 nir_imm_float(vs_b, 1.0));
440
441 comp[1] = nir_bcsel(vs_b, c1cmp,
442 nir_imm_float(vs_b, -1.0),
443 nir_imm_float(vs_b, 1.0));
444 comp[2] = comp2;
445 comp[3] = nir_imm_float(vs_b, 1.0);
446 nir_ssa_def *outvec = nir_vec(vs_b, comp, 4);
447
448 return outvec;
449 }
450
451 nir_ssa_def *radv_meta_gen_rect_vertices(nir_builder *vs_b)
452 {
453 return radv_meta_gen_rect_vertices_comp2(vs_b, nir_imm_float(vs_b, 0.0));
454 }
455
456 /* vertex shader that generates vertices */
457 nir_shader *
458 radv_meta_build_nir_vs_generate_vertices(void)
459 {
460 const struct glsl_type *vec4 = glsl_vec4_type();
461
462 nir_builder b;
463 nir_variable *v_position;
464
465 nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL);
466 b.shader->info.name = ralloc_strdup(b.shader, "meta_vs_gen_verts");
467
468 nir_ssa_def *outvec = radv_meta_gen_rect_vertices(&b);
469
470 v_position = nir_variable_create(b.shader, nir_var_shader_out, vec4,
471 "gl_Position");
472 v_position->data.location = VARYING_SLOT_POS;
473
474 nir_store_var(&b, v_position, outvec, 0xf);
475
476 return b.shader;
477 }
478
479 nir_shader *
480 radv_meta_build_nir_fs_noop(void)
481 {
482 nir_builder b;
483
484 nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL);
485 b.shader->info.name = ralloc_asprintf(b.shader,
486 "meta_noop_fs");
487
488 return b.shader;
489 }
490
491 void radv_meta_build_resolve_shader_core(nir_builder *b,
492 bool is_integer,
493 int samples,
494 nir_variable *input_img,
495 nir_variable *color,
496 nir_ssa_def *img_coord)
497 {
498 /* do a txf_ms on each sample */
499 nir_ssa_def *tmp;
500 nir_if *outer_if = NULL;
501
502 nir_tex_instr *tex = nir_tex_instr_create(b->shader, 2);
503 tex->sampler_dim = GLSL_SAMPLER_DIM_MS;
504 tex->op = nir_texop_txf_ms;
505 tex->src[0].src_type = nir_tex_src_coord;
506 tex->src[0].src = nir_src_for_ssa(img_coord);
507 tex->src[1].src_type = nir_tex_src_ms_index;
508 tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0));
509 tex->dest_type = nir_type_float;
510 tex->is_array = false;
511 tex->coord_components = 2;
512 tex->texture = nir_deref_var_create(tex, input_img);
513 tex->sampler = NULL;
514
515 nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
516 nir_builder_instr_insert(b, &tex->instr);
517
518 tmp = &tex->dest.ssa;
519
520 if (!is_integer && samples > 1) {
521 nir_tex_instr *tex_all_same = nir_tex_instr_create(b->shader, 1);
522 tex_all_same->sampler_dim = GLSL_SAMPLER_DIM_MS;
523 tex_all_same->op = nir_texop_samples_identical;
524 tex_all_same->src[0].src_type = nir_tex_src_coord;
525 tex_all_same->src[0].src = nir_src_for_ssa(img_coord);
526 tex_all_same->dest_type = nir_type_float;
527 tex_all_same->is_array = false;
528 tex_all_same->coord_components = 2;
529 tex_all_same->texture = nir_deref_var_create(tex_all_same, input_img);
530 tex_all_same->sampler = NULL;
531
532 nir_ssa_dest_init(&tex_all_same->instr, &tex_all_same->dest, 1, 32, "tex");
533 nir_builder_instr_insert(b, &tex_all_same->instr);
534
535 nir_ssa_def *all_same = nir_ine(b, &tex_all_same->dest.ssa, nir_imm_int(b, 0));
536 nir_if *if_stmt = nir_if_create(b->shader);
537 if_stmt->condition = nir_src_for_ssa(all_same);
538 nir_cf_node_insert(b->cursor, &if_stmt->cf_node);
539
540 b->cursor = nir_after_cf_list(&if_stmt->then_list);
541 for (int i = 1; i < samples; i++) {
542 nir_tex_instr *tex_add = nir_tex_instr_create(b->shader, 2);
543 tex_add->sampler_dim = GLSL_SAMPLER_DIM_MS;
544 tex_add->op = nir_texop_txf_ms;
545 tex_add->src[0].src_type = nir_tex_src_coord;
546 tex_add->src[0].src = nir_src_for_ssa(img_coord);
547 tex_add->src[1].src_type = nir_tex_src_ms_index;
548 tex_add->src[1].src = nir_src_for_ssa(nir_imm_int(b, i));
549 tex_add->dest_type = nir_type_float;
550 tex_add->is_array = false;
551 tex_add->coord_components = 2;
552 tex_add->texture = nir_deref_var_create(tex_add, input_img);
553 tex_add->sampler = NULL;
554
555 nir_ssa_dest_init(&tex_add->instr, &tex_add->dest, 4, 32, "tex");
556 nir_builder_instr_insert(b, &tex_add->instr);
557
558 tmp = nir_fadd(b, tmp, &tex_add->dest.ssa);
559 }
560
561 tmp = nir_fdiv(b, tmp, nir_imm_float(b, samples));
562 nir_store_var(b, color, tmp, 0xf);
563 b->cursor = nir_after_cf_list(&if_stmt->else_list);
564 outer_if = if_stmt;
565 }
566 nir_store_var(b, color, &tex->dest.ssa, 0xf);
567
568 if (outer_if)
569 b->cursor = nir_after_cf_node(&outer_if->cf_node);
570 }