2 * Copyright © 2016 Red Hat
3 * based on intel anv code:
4 * Copyright © 2015 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
26 #include "radv_meta.h"
34 radv_meta_save(struct radv_meta_saved_state
*state
,
35 struct radv_cmd_buffer
*cmd_buffer
, uint32_t flags
)
37 VkPipelineBindPoint bind_point
=
38 flags
& RADV_META_SAVE_GRAPHICS_PIPELINE
?
39 VK_PIPELINE_BIND_POINT_GRAPHICS
:
40 VK_PIPELINE_BIND_POINT_COMPUTE
;
41 struct radv_descriptor_state
*descriptors_state
=
42 radv_get_descriptors_state(cmd_buffer
, bind_point
);
44 assert(flags
& (RADV_META_SAVE_GRAPHICS_PIPELINE
|
45 RADV_META_SAVE_COMPUTE_PIPELINE
));
49 if (state
->flags
& RADV_META_SAVE_GRAPHICS_PIPELINE
) {
50 assert(!(state
->flags
& RADV_META_SAVE_COMPUTE_PIPELINE
));
52 state
->old_pipeline
= cmd_buffer
->state
.pipeline
;
54 /* Save all viewports. */
55 state
->viewport
.count
= cmd_buffer
->state
.dynamic
.viewport
.count
;
56 typed_memcpy(state
->viewport
.viewports
,
57 cmd_buffer
->state
.dynamic
.viewport
.viewports
,
60 /* Save all scissors. */
61 state
->scissor
.count
= cmd_buffer
->state
.dynamic
.scissor
.count
;
62 typed_memcpy(state
->scissor
.scissors
,
63 cmd_buffer
->state
.dynamic
.scissor
.scissors
,
67 if (state
->flags
& RADV_META_SAVE_SAMPLE_LOCATIONS
) {
68 typed_memcpy(&state
->sample_location
,
69 &cmd_buffer
->state
.dynamic
.sample_location
, 1);
72 if (state
->flags
& RADV_META_SAVE_COMPUTE_PIPELINE
) {
73 assert(!(state
->flags
& RADV_META_SAVE_GRAPHICS_PIPELINE
));
75 state
->old_pipeline
= cmd_buffer
->state
.compute_pipeline
;
78 if (state
->flags
& RADV_META_SAVE_DESCRIPTORS
) {
79 state
->old_descriptor_set0
= descriptors_state
->sets
[0];
80 if (!(descriptors_state
->valid
& 1) || !state
->old_descriptor_set0
)
81 state
->flags
&= ~RADV_META_SAVE_DESCRIPTORS
;
84 if (state
->flags
& RADV_META_SAVE_CONSTANTS
) {
85 memcpy(state
->push_constants
, cmd_buffer
->push_constants
,
86 MAX_PUSH_CONSTANTS_SIZE
);
89 if (state
->flags
& RADV_META_SAVE_PASS
) {
90 state
->pass
= cmd_buffer
->state
.pass
;
91 state
->subpass
= cmd_buffer
->state
.subpass
;
92 state
->framebuffer
= cmd_buffer
->state
.framebuffer
;
93 state
->attachments
= cmd_buffer
->state
.attachments
;
94 state
->render_area
= cmd_buffer
->state
.render_area
;
99 radv_meta_restore(const struct radv_meta_saved_state
*state
,
100 struct radv_cmd_buffer
*cmd_buffer
)
102 VkPipelineBindPoint bind_point
=
103 state
->flags
& RADV_META_SAVE_GRAPHICS_PIPELINE
?
104 VK_PIPELINE_BIND_POINT_GRAPHICS
:
105 VK_PIPELINE_BIND_POINT_COMPUTE
;
107 if (state
->flags
& RADV_META_SAVE_GRAPHICS_PIPELINE
) {
108 radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer
),
109 VK_PIPELINE_BIND_POINT_GRAPHICS
,
110 radv_pipeline_to_handle(state
->old_pipeline
));
112 cmd_buffer
->state
.dirty
|= RADV_CMD_DIRTY_PIPELINE
;
114 /* Restore all viewports. */
115 cmd_buffer
->state
.dynamic
.viewport
.count
= state
->viewport
.count
;
116 typed_memcpy(cmd_buffer
->state
.dynamic
.viewport
.viewports
,
117 state
->viewport
.viewports
,
120 /* Restore all scissors. */
121 cmd_buffer
->state
.dynamic
.scissor
.count
= state
->scissor
.count
;
122 typed_memcpy(cmd_buffer
->state
.dynamic
.scissor
.scissors
,
123 state
->scissor
.scissors
,
126 cmd_buffer
->state
.dirty
|= RADV_CMD_DIRTY_DYNAMIC_VIEWPORT
|
127 RADV_CMD_DIRTY_DYNAMIC_SCISSOR
;
130 if (state
->flags
& RADV_META_SAVE_SAMPLE_LOCATIONS
) {
131 typed_memcpy(&cmd_buffer
->state
.dynamic
.sample_location
.locations
,
132 &state
->sample_location
.locations
, 1);
134 cmd_buffer
->state
.dirty
|= RADV_CMD_DIRTY_DYNAMIC_SAMPLE_LOCATIONS
;
137 if (state
->flags
& RADV_META_SAVE_COMPUTE_PIPELINE
) {
138 radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer
),
139 VK_PIPELINE_BIND_POINT_COMPUTE
,
140 radv_pipeline_to_handle(state
->old_pipeline
));
143 if (state
->flags
& RADV_META_SAVE_DESCRIPTORS
) {
144 radv_set_descriptor_set(cmd_buffer
, bind_point
,
145 state
->old_descriptor_set0
, 0);
148 if (state
->flags
& RADV_META_SAVE_CONSTANTS
) {
149 VkShaderStageFlags stages
= VK_SHADER_STAGE_COMPUTE_BIT
;
151 if (state
->flags
& RADV_META_SAVE_GRAPHICS_PIPELINE
)
152 stages
|= VK_SHADER_STAGE_ALL_GRAPHICS
;
154 radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer
),
155 VK_NULL_HANDLE
, stages
, 0,
156 MAX_PUSH_CONSTANTS_SIZE
,
157 state
->push_constants
);
160 if (state
->flags
& RADV_META_SAVE_PASS
) {
161 cmd_buffer
->state
.pass
= state
->pass
;
162 cmd_buffer
->state
.subpass
= state
->subpass
;
163 cmd_buffer
->state
.framebuffer
= state
->framebuffer
;
164 cmd_buffer
->state
.attachments
= state
->attachments
;
165 cmd_buffer
->state
.render_area
= state
->render_area
;
167 cmd_buffer
->state
.dirty
|= RADV_CMD_DIRTY_FRAMEBUFFER
;
172 radv_meta_get_view_type(const struct radv_image
*image
)
174 switch (image
->type
) {
175 case VK_IMAGE_TYPE_1D
: return VK_IMAGE_VIEW_TYPE_1D
;
176 case VK_IMAGE_TYPE_2D
: return VK_IMAGE_VIEW_TYPE_2D
;
177 case VK_IMAGE_TYPE_3D
: return VK_IMAGE_VIEW_TYPE_3D
;
179 unreachable("bad VkImageViewType");
184 * When creating a destination VkImageView, this function provides the needed
185 * VkImageViewCreateInfo::subresourceRange::baseArrayLayer.
188 radv_meta_get_iview_layer(const struct radv_image
*dest_image
,
189 const VkImageSubresourceLayers
*dest_subresource
,
190 const VkOffset3D
*dest_offset
)
192 switch (dest_image
->type
) {
193 case VK_IMAGE_TYPE_1D
:
194 case VK_IMAGE_TYPE_2D
:
195 return dest_subresource
->baseArrayLayer
;
196 case VK_IMAGE_TYPE_3D
:
197 /* HACK: Vulkan does not allow attaching a 3D image to a framebuffer,
198 * but meta does it anyway. When doing so, we translate the
199 * destination's z offset into an array offset.
201 return dest_offset
->z
;
203 assert(!"bad VkImageType");
209 meta_alloc(void* _device
, size_t size
, size_t alignment
,
210 VkSystemAllocationScope allocationScope
)
212 struct radv_device
*device
= _device
;
213 return device
->vk
.alloc
.pfnAllocation(device
->vk
.alloc
.pUserData
, size
, alignment
,
214 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE
);
218 meta_realloc(void* _device
, void *original
, size_t size
, size_t alignment
,
219 VkSystemAllocationScope allocationScope
)
221 struct radv_device
*device
= _device
;
222 return device
->vk
.alloc
.pfnReallocation(device
->vk
.alloc
.pUserData
, original
,
224 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE
);
228 meta_free(void* _device
, void *data
)
230 struct radv_device
*device
= _device
;
231 return device
->vk
.alloc
.pfnFree(device
->vk
.alloc
.pUserData
, data
);
235 radv_builtin_cache_path(char *path
)
237 char *xdg_cache_home
= getenv("XDG_CACHE_HOME");
238 const char *suffix
= "/radv_builtin_shaders";
239 const char *suffix2
= "/.cache/radv_builtin_shaders";
240 struct passwd pwd
, *result
;
241 char path2
[PATH_MAX
+ 1]; /* PATH_MAX is not a real max,but suffices here. */
244 if (xdg_cache_home
) {
245 ret
= snprintf(path
, PATH_MAX
+ 1, "%s%s%zd",
246 xdg_cache_home
, suffix
, sizeof(void *) * 8);
247 return ret
> 0 && ret
< PATH_MAX
+ 1;
250 getpwuid_r(getuid(), &pwd
, path2
, PATH_MAX
- strlen(suffix2
), &result
);
254 strcpy(path
, pwd
.pw_dir
);
255 strcat(path
, "/.cache");
256 if (mkdir(path
, 0755) && errno
!= EEXIST
)
259 ret
= snprintf(path
, PATH_MAX
+ 1, "%s%s%zd",
260 pwd
.pw_dir
, suffix2
, sizeof(void *) * 8);
261 return ret
> 0 && ret
< PATH_MAX
+ 1;
265 radv_load_meta_pipeline(struct radv_device
*device
)
267 char path
[PATH_MAX
+ 1];
272 if (!radv_builtin_cache_path(path
))
275 int fd
= open(path
, O_RDONLY
);
280 data
= malloc(st
.st_size
);
283 if(read(fd
, data
, st
.st_size
) == -1)
286 ret
= radv_pipeline_cache_load(&device
->meta_state
.cache
, data
, st
.st_size
);
294 radv_store_meta_pipeline(struct radv_device
*device
)
296 char path
[PATH_MAX
+ 1], path2
[PATH_MAX
+ 7];
300 if (!device
->meta_state
.cache
.modified
)
303 if (radv_GetPipelineCacheData(radv_device_to_handle(device
),
304 radv_pipeline_cache_to_handle(&device
->meta_state
.cache
),
308 if (!radv_builtin_cache_path(path
))
312 strcat(path2
, "XXXXXX");
313 int fd
= mkstemp(path2
);//open(path, O_WRONLY | O_CREAT, 0600);
320 if (radv_GetPipelineCacheData(radv_device_to_handle(device
),
321 radv_pipeline_cache_to_handle(&device
->meta_state
.cache
),
324 if(write(fd
, data
, size
) == -1)
335 radv_device_init_meta(struct radv_device
*device
)
339 memset(&device
->meta_state
, 0, sizeof(device
->meta_state
));
341 device
->meta_state
.alloc
= (VkAllocationCallbacks
) {
343 .pfnAllocation
= meta_alloc
,
344 .pfnReallocation
= meta_realloc
,
345 .pfnFree
= meta_free
,
348 device
->meta_state
.cache
.alloc
= device
->meta_state
.alloc
;
349 radv_pipeline_cache_init(&device
->meta_state
.cache
, device
);
350 bool loaded_cache
= radv_load_meta_pipeline(device
);
351 bool on_demand
= !loaded_cache
;
353 mtx_init(&device
->meta_state
.mtx
, mtx_plain
);
355 result
= radv_device_init_meta_clear_state(device
, on_demand
);
356 if (result
!= VK_SUCCESS
)
359 result
= radv_device_init_meta_resolve_state(device
, on_demand
);
360 if (result
!= VK_SUCCESS
)
363 result
= radv_device_init_meta_blit_state(device
, on_demand
);
364 if (result
!= VK_SUCCESS
)
367 result
= radv_device_init_meta_blit2d_state(device
, on_demand
);
368 if (result
!= VK_SUCCESS
)
371 result
= radv_device_init_meta_bufimage_state(device
);
372 if (result
!= VK_SUCCESS
)
375 result
= radv_device_init_meta_depth_decomp_state(device
, on_demand
);
376 if (result
!= VK_SUCCESS
)
377 goto fail_depth_decomp
;
379 result
= radv_device_init_meta_buffer_state(device
);
380 if (result
!= VK_SUCCESS
)
383 result
= radv_device_init_meta_query_state(device
, on_demand
);
384 if (result
!= VK_SUCCESS
)
387 result
= radv_device_init_meta_fast_clear_flush_state(device
, on_demand
);
388 if (result
!= VK_SUCCESS
)
389 goto fail_fast_clear
;
391 result
= radv_device_init_meta_resolve_compute_state(device
, on_demand
);
392 if (result
!= VK_SUCCESS
)
393 goto fail_resolve_compute
;
395 result
= radv_device_init_meta_resolve_fragment_state(device
, on_demand
);
396 if (result
!= VK_SUCCESS
)
397 goto fail_resolve_fragment
;
399 result
= radv_device_init_meta_fmask_expand_state(device
);
400 if (result
!= VK_SUCCESS
)
401 goto fail_fmask_expand
;
406 radv_device_finish_meta_resolve_fragment_state(device
);
407 fail_resolve_fragment
:
408 radv_device_finish_meta_resolve_compute_state(device
);
409 fail_resolve_compute
:
410 radv_device_finish_meta_fast_clear_flush_state(device
);
412 radv_device_finish_meta_query_state(device
);
414 radv_device_finish_meta_buffer_state(device
);
416 radv_device_finish_meta_depth_decomp_state(device
);
418 radv_device_finish_meta_bufimage_state(device
);
420 radv_device_finish_meta_blit2d_state(device
);
422 radv_device_finish_meta_blit_state(device
);
424 radv_device_finish_meta_resolve_state(device
);
426 radv_device_finish_meta_clear_state(device
);
428 mtx_destroy(&device
->meta_state
.mtx
);
429 radv_pipeline_cache_finish(&device
->meta_state
.cache
);
434 radv_device_finish_meta(struct radv_device
*device
)
436 radv_device_finish_meta_clear_state(device
);
437 radv_device_finish_meta_resolve_state(device
);
438 radv_device_finish_meta_blit_state(device
);
439 radv_device_finish_meta_blit2d_state(device
);
440 radv_device_finish_meta_bufimage_state(device
);
441 radv_device_finish_meta_depth_decomp_state(device
);
442 radv_device_finish_meta_query_state(device
);
443 radv_device_finish_meta_buffer_state(device
);
444 radv_device_finish_meta_fast_clear_flush_state(device
);
445 radv_device_finish_meta_resolve_compute_state(device
);
446 radv_device_finish_meta_resolve_fragment_state(device
);
447 radv_device_finish_meta_fmask_expand_state(device
);
449 radv_store_meta_pipeline(device
);
450 radv_pipeline_cache_finish(&device
->meta_state
.cache
);
451 mtx_destroy(&device
->meta_state
.mtx
);
454 nir_ssa_def
*radv_meta_gen_rect_vertices_comp2(nir_builder
*vs_b
, nir_ssa_def
*comp2
)
457 nir_intrinsic_instr
*vertex_id
= nir_intrinsic_instr_create(vs_b
->shader
, nir_intrinsic_load_vertex_id_zero_base
);
458 nir_ssa_dest_init(&vertex_id
->instr
, &vertex_id
->dest
, 1, 32, "vertexid");
459 nir_builder_instr_insert(vs_b
, &vertex_id
->instr
);
461 /* vertex 0 - -1.0, -1.0 */
462 /* vertex 1 - -1.0, 1.0 */
463 /* vertex 2 - 1.0, -1.0 */
464 /* so channel 0 is vertex_id != 2 ? -1.0 : 1.0
465 channel 1 is vertex id != 1 ? -1.0 : 1.0 */
467 nir_ssa_def
*c0cmp
= nir_ine(vs_b
, &vertex_id
->dest
.ssa
,
468 nir_imm_int(vs_b
, 2));
469 nir_ssa_def
*c1cmp
= nir_ine(vs_b
, &vertex_id
->dest
.ssa
,
470 nir_imm_int(vs_b
, 1));
472 nir_ssa_def
*comp
[4];
473 comp
[0] = nir_bcsel(vs_b
, c0cmp
,
474 nir_imm_float(vs_b
, -1.0),
475 nir_imm_float(vs_b
, 1.0));
477 comp
[1] = nir_bcsel(vs_b
, c1cmp
,
478 nir_imm_float(vs_b
, -1.0),
479 nir_imm_float(vs_b
, 1.0));
481 comp
[3] = nir_imm_float(vs_b
, 1.0);
482 nir_ssa_def
*outvec
= nir_vec(vs_b
, comp
, 4);
487 nir_ssa_def
*radv_meta_gen_rect_vertices(nir_builder
*vs_b
)
489 return radv_meta_gen_rect_vertices_comp2(vs_b
, nir_imm_float(vs_b
, 0.0));
492 /* vertex shader that generates vertices */
494 radv_meta_build_nir_vs_generate_vertices(void)
496 const struct glsl_type
*vec4
= glsl_vec4_type();
499 nir_variable
*v_position
;
501 nir_builder_init_simple_shader(&b
, NULL
, MESA_SHADER_VERTEX
, NULL
);
502 b
.shader
->info
.name
= ralloc_strdup(b
.shader
, "meta_vs_gen_verts");
504 nir_ssa_def
*outvec
= radv_meta_gen_rect_vertices(&b
);
506 v_position
= nir_variable_create(b
.shader
, nir_var_shader_out
, vec4
,
508 v_position
->data
.location
= VARYING_SLOT_POS
;
510 nir_store_var(&b
, v_position
, outvec
, 0xf);
516 radv_meta_build_nir_fs_noop(void)
520 nir_builder_init_simple_shader(&b
, NULL
, MESA_SHADER_FRAGMENT
, NULL
);
521 b
.shader
->info
.name
= ralloc_asprintf(b
.shader
,
527 void radv_meta_build_resolve_shader_core(nir_builder
*b
,
530 nir_variable
*input_img
,
532 nir_ssa_def
*img_coord
)
534 /* do a txf_ms on each sample */
536 nir_if
*outer_if
= NULL
;
538 nir_ssa_def
*input_img_deref
= &nir_build_deref_var(b
, input_img
)->dest
.ssa
;
540 nir_tex_instr
*tex
= nir_tex_instr_create(b
->shader
, 3);
541 tex
->sampler_dim
= GLSL_SAMPLER_DIM_MS
;
542 tex
->op
= nir_texop_txf_ms
;
543 tex
->src
[0].src_type
= nir_tex_src_coord
;
544 tex
->src
[0].src
= nir_src_for_ssa(img_coord
);
545 tex
->src
[1].src_type
= nir_tex_src_ms_index
;
546 tex
->src
[1].src
= nir_src_for_ssa(nir_imm_int(b
, 0));
547 tex
->src
[2].src_type
= nir_tex_src_texture_deref
;
548 tex
->src
[2].src
= nir_src_for_ssa(input_img_deref
);
549 tex
->dest_type
= nir_type_float
;
550 tex
->is_array
= false;
551 tex
->coord_components
= 2;
553 nir_ssa_dest_init(&tex
->instr
, &tex
->dest
, 4, 32, "tex");
554 nir_builder_instr_insert(b
, &tex
->instr
);
556 tmp
= &tex
->dest
.ssa
;
558 if (!is_integer
&& samples
> 1) {
559 nir_tex_instr
*tex_all_same
= nir_tex_instr_create(b
->shader
, 2);
560 tex_all_same
->sampler_dim
= GLSL_SAMPLER_DIM_MS
;
561 tex_all_same
->op
= nir_texop_samples_identical
;
562 tex_all_same
->src
[0].src_type
= nir_tex_src_coord
;
563 tex_all_same
->src
[0].src
= nir_src_for_ssa(img_coord
);
564 tex_all_same
->src
[1].src_type
= nir_tex_src_texture_deref
;
565 tex_all_same
->src
[1].src
= nir_src_for_ssa(input_img_deref
);
566 tex_all_same
->dest_type
= nir_type_float
;
567 tex_all_same
->is_array
= false;
568 tex_all_same
->coord_components
= 2;
570 nir_ssa_dest_init(&tex_all_same
->instr
, &tex_all_same
->dest
, 1, 32, "tex");
571 nir_builder_instr_insert(b
, &tex_all_same
->instr
);
573 nir_ssa_def
*all_same
= nir_ieq(b
, &tex_all_same
->dest
.ssa
, nir_imm_int(b
, 0));
574 nir_if
*if_stmt
= nir_if_create(b
->shader
);
575 if_stmt
->condition
= nir_src_for_ssa(all_same
);
576 nir_cf_node_insert(b
->cursor
, &if_stmt
->cf_node
);
578 b
->cursor
= nir_after_cf_list(&if_stmt
->then_list
);
579 for (int i
= 1; i
< samples
; i
++) {
580 nir_tex_instr
*tex_add
= nir_tex_instr_create(b
->shader
, 3);
581 tex_add
->sampler_dim
= GLSL_SAMPLER_DIM_MS
;
582 tex_add
->op
= nir_texop_txf_ms
;
583 tex_add
->src
[0].src_type
= nir_tex_src_coord
;
584 tex_add
->src
[0].src
= nir_src_for_ssa(img_coord
);
585 tex_add
->src
[1].src_type
= nir_tex_src_ms_index
;
586 tex_add
->src
[1].src
= nir_src_for_ssa(nir_imm_int(b
, i
));
587 tex_add
->src
[2].src_type
= nir_tex_src_texture_deref
;
588 tex_add
->src
[2].src
= nir_src_for_ssa(input_img_deref
);
589 tex_add
->dest_type
= nir_type_float
;
590 tex_add
->is_array
= false;
591 tex_add
->coord_components
= 2;
593 nir_ssa_dest_init(&tex_add
->instr
, &tex_add
->dest
, 4, 32, "tex");
594 nir_builder_instr_insert(b
, &tex_add
->instr
);
596 tmp
= nir_fadd(b
, tmp
, &tex_add
->dest
.ssa
);
599 tmp
= nir_fdiv(b
, tmp
, nir_imm_float(b
, samples
));
600 nir_store_var(b
, color
, tmp
, 0xf);
601 b
->cursor
= nir_after_cf_list(&if_stmt
->else_list
);
604 nir_store_var(b
, color
, &tex
->dest
.ssa
, 0xf);
607 b
->cursor
= nir_after_cf_node(&outer_if
->cf_node
);