2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "radv_meta.h"
25 #include "nir/nir_builder.h"
28 VkOffset3D src_offset
;
29 VkExtent3D src_extent
;
30 VkOffset3D dest_offset
;
31 VkExtent3D dest_extent
;
35 build_nir_vertex_shader(void)
37 const struct glsl_type
*vec4
= glsl_vec4_type();
40 nir_builder_init_simple_shader(&b
, NULL
, MESA_SHADER_VERTEX
, NULL
);
41 b
.shader
->info
->name
= ralloc_strdup(b
.shader
, "meta_blit_vs");
43 nir_variable
*pos_in
= nir_variable_create(b
.shader
, nir_var_shader_in
,
45 pos_in
->data
.location
= VERT_ATTRIB_GENERIC0
;
46 nir_variable
*pos_out
= nir_variable_create(b
.shader
, nir_var_shader_out
,
48 pos_out
->data
.location
= VARYING_SLOT_POS
;
49 nir_copy_var(&b
, pos_out
, pos_in
);
51 nir_variable
*tex_pos_in
= nir_variable_create(b
.shader
, nir_var_shader_in
,
53 tex_pos_in
->data
.location
= VERT_ATTRIB_GENERIC1
;
54 nir_variable
*tex_pos_out
= nir_variable_create(b
.shader
, nir_var_shader_out
,
56 tex_pos_out
->data
.location
= VARYING_SLOT_VAR0
;
57 tex_pos_out
->data
.interpolation
= INTERP_MODE_SMOOTH
;
58 nir_copy_var(&b
, tex_pos_out
, tex_pos_in
);
64 build_nir_copy_fragment_shader(enum glsl_sampler_dim tex_dim
)
67 const struct glsl_type
*vec4
= glsl_vec4_type();
70 nir_builder_init_simple_shader(&b
, NULL
, MESA_SHADER_FRAGMENT
, NULL
);
72 sprintf(shader_name
, "meta_blit_fs.%d", tex_dim
);
73 b
.shader
->info
->name
= ralloc_strdup(b
.shader
, shader_name
);
75 nir_variable
*tex_pos_in
= nir_variable_create(b
.shader
, nir_var_shader_in
,
77 tex_pos_in
->data
.location
= VARYING_SLOT_VAR0
;
79 /* Swizzle the array index which comes in as Z coordinate into the right
82 unsigned swz
[] = { 0, (tex_dim
== GLSL_SAMPLER_DIM_1D
? 2 : 1), 2 };
83 nir_ssa_def
*const tex_pos
=
84 nir_swizzle(&b
, nir_load_var(&b
, tex_pos_in
), swz
,
85 (tex_dim
== GLSL_SAMPLER_DIM_1D
? 2 : 3), false);
87 const struct glsl_type
*sampler_type
=
88 glsl_sampler_type(tex_dim
, false, tex_dim
!= GLSL_SAMPLER_DIM_3D
,
89 glsl_get_base_type(vec4
));
90 nir_variable
*sampler
= nir_variable_create(b
.shader
, nir_var_uniform
,
91 sampler_type
, "s_tex");
92 sampler
->data
.descriptor_set
= 0;
93 sampler
->data
.binding
= 0;
95 nir_tex_instr
*tex
= nir_tex_instr_create(b
.shader
, 1);
96 tex
->sampler_dim
= tex_dim
;
97 tex
->op
= nir_texop_tex
;
98 tex
->src
[0].src_type
= nir_tex_src_coord
;
99 tex
->src
[0].src
= nir_src_for_ssa(tex_pos
);
100 tex
->dest_type
= nir_type_float
; /* TODO */
101 tex
->is_array
= glsl_sampler_type_is_array(sampler_type
);
102 tex
->coord_components
= tex_pos
->num_components
;
103 tex
->texture
= nir_deref_var_create(tex
, sampler
);
104 tex
->sampler
= nir_deref_var_create(tex
, sampler
);
106 nir_ssa_dest_init(&tex
->instr
, &tex
->dest
, 4, 32, "tex");
107 nir_builder_instr_insert(&b
, &tex
->instr
);
109 nir_variable
*color_out
= nir_variable_create(b
.shader
, nir_var_shader_out
,
111 color_out
->data
.location
= FRAG_RESULT_DATA0
;
112 nir_store_var(&b
, color_out
, &tex
->dest
.ssa
, 0xf);
118 build_nir_copy_fragment_shader_depth(enum glsl_sampler_dim tex_dim
)
120 char shader_name
[64];
121 const struct glsl_type
*vec4
= glsl_vec4_type();
124 nir_builder_init_simple_shader(&b
, NULL
, MESA_SHADER_FRAGMENT
, NULL
);
126 sprintf(shader_name
, "meta_blit_depth_fs.%d", tex_dim
);
127 b
.shader
->info
->name
= ralloc_strdup(b
.shader
, shader_name
);
129 nir_variable
*tex_pos_in
= nir_variable_create(b
.shader
, nir_var_shader_in
,
131 tex_pos_in
->data
.location
= VARYING_SLOT_VAR0
;
133 /* Swizzle the array index which comes in as Z coordinate into the right
136 unsigned swz
[] = { 0, (tex_dim
== GLSL_SAMPLER_DIM_1D
? 2 : 1), 2 };
137 nir_ssa_def
*const tex_pos
=
138 nir_swizzle(&b
, nir_load_var(&b
, tex_pos_in
), swz
,
139 (tex_dim
== GLSL_SAMPLER_DIM_1D
? 2 : 3), false);
141 const struct glsl_type
*sampler_type
=
142 glsl_sampler_type(tex_dim
, false, tex_dim
!= GLSL_SAMPLER_DIM_3D
,
143 glsl_get_base_type(vec4
));
144 nir_variable
*sampler
= nir_variable_create(b
.shader
, nir_var_uniform
,
145 sampler_type
, "s_tex");
146 sampler
->data
.descriptor_set
= 0;
147 sampler
->data
.binding
= 0;
149 nir_tex_instr
*tex
= nir_tex_instr_create(b
.shader
, 1);
150 tex
->sampler_dim
= tex_dim
;
151 tex
->op
= nir_texop_tex
;
152 tex
->src
[0].src_type
= nir_tex_src_coord
;
153 tex
->src
[0].src
= nir_src_for_ssa(tex_pos
);
154 tex
->dest_type
= nir_type_float
; /* TODO */
155 tex
->is_array
= glsl_sampler_type_is_array(sampler_type
);
156 tex
->coord_components
= tex_pos
->num_components
;
157 tex
->texture
= nir_deref_var_create(tex
, sampler
);
158 tex
->sampler
= nir_deref_var_create(tex
, sampler
);
160 nir_ssa_dest_init(&tex
->instr
, &tex
->dest
, 4, 32, "tex");
161 nir_builder_instr_insert(&b
, &tex
->instr
);
163 nir_variable
*color_out
= nir_variable_create(b
.shader
, nir_var_shader_out
,
165 color_out
->data
.location
= FRAG_RESULT_DEPTH
;
166 nir_store_var(&b
, color_out
, &tex
->dest
.ssa
, 0x1);
172 build_nir_copy_fragment_shader_stencil(enum glsl_sampler_dim tex_dim
)
174 char shader_name
[64];
175 const struct glsl_type
*vec4
= glsl_vec4_type();
178 nir_builder_init_simple_shader(&b
, NULL
, MESA_SHADER_FRAGMENT
, NULL
);
180 sprintf(shader_name
, "meta_blit_stencil_fs.%d", tex_dim
);
181 b
.shader
->info
->name
= ralloc_strdup(b
.shader
, shader_name
);
183 nir_variable
*tex_pos_in
= nir_variable_create(b
.shader
, nir_var_shader_in
,
185 tex_pos_in
->data
.location
= VARYING_SLOT_VAR0
;
187 /* Swizzle the array index which comes in as Z coordinate into the right
190 unsigned swz
[] = { 0, (tex_dim
== GLSL_SAMPLER_DIM_1D
? 2 : 1), 2 };
191 nir_ssa_def
*const tex_pos
=
192 nir_swizzle(&b
, nir_load_var(&b
, tex_pos_in
), swz
,
193 (tex_dim
== GLSL_SAMPLER_DIM_1D
? 2 : 3), false);
195 const struct glsl_type
*sampler_type
=
196 glsl_sampler_type(tex_dim
, false, tex_dim
!= GLSL_SAMPLER_DIM_3D
,
197 glsl_get_base_type(vec4
));
198 nir_variable
*sampler
= nir_variable_create(b
.shader
, nir_var_uniform
,
199 sampler_type
, "s_tex");
200 sampler
->data
.descriptor_set
= 0;
201 sampler
->data
.binding
= 0;
203 nir_tex_instr
*tex
= nir_tex_instr_create(b
.shader
, 1);
204 tex
->sampler_dim
= tex_dim
;
205 tex
->op
= nir_texop_tex
;
206 tex
->src
[0].src_type
= nir_tex_src_coord
;
207 tex
->src
[0].src
= nir_src_for_ssa(tex_pos
);
208 tex
->dest_type
= nir_type_float
; /* TODO */
209 tex
->is_array
= glsl_sampler_type_is_array(sampler_type
);
210 tex
->coord_components
= tex_pos
->num_components
;
211 tex
->texture
= nir_deref_var_create(tex
, sampler
);
212 tex
->sampler
= nir_deref_var_create(tex
, sampler
);
214 nir_ssa_dest_init(&tex
->instr
, &tex
->dest
, 4, 32, "tex");
215 nir_builder_instr_insert(&b
, &tex
->instr
);
217 nir_variable
*color_out
= nir_variable_create(b
.shader
, nir_var_shader_out
,
219 color_out
->data
.location
= FRAG_RESULT_STENCIL
;
220 nir_store_var(&b
, color_out
, &tex
->dest
.ssa
, 0x1);
226 meta_emit_blit(struct radv_cmd_buffer
*cmd_buffer
,
227 struct radv_image
*src_image
,
228 struct radv_image_view
*src_iview
,
229 VkOffset3D src_offset
,
230 VkExtent3D src_extent
,
231 struct radv_image
*dest_image
,
232 struct radv_image_view
*dest_iview
,
233 VkOffset3D dest_offset
,
234 VkExtent3D dest_extent
,
235 VkFilter blit_filter
)
237 struct radv_device
*device
= cmd_buffer
->device
;
239 struct blit_vb_data
{
244 assert(src_image
->samples
== dest_image
->samples
);
245 unsigned vb_size
= 3 * sizeof(*vb_data
);
246 vb_data
[0] = (struct blit_vb_data
) {
252 (float)(src_offset
.x
) / (float)src_iview
->extent
.width
,
253 (float)(src_offset
.y
) / (float)src_iview
->extent
.height
,
254 (float)src_offset
.z
/ (float)src_iview
->extent
.depth
,
258 vb_data
[1] = (struct blit_vb_data
) {
261 dest_offset
.y
+ dest_extent
.height
,
264 (float)src_offset
.x
/ (float)src_iview
->extent
.width
,
265 (float)(src_offset
.y
+ src_extent
.height
) /
266 (float)src_iview
->extent
.height
,
267 (float)src_offset
.z
/ (float)src_iview
->extent
.depth
,
271 vb_data
[2] = (struct blit_vb_data
) {
273 dest_offset
.x
+ dest_extent
.width
,
277 (float)(src_offset
.x
+ src_extent
.width
) / (float)src_iview
->extent
.width
,
278 (float)src_offset
.y
/ (float)src_iview
->extent
.height
,
279 (float)src_offset
.z
/ (float)src_iview
->extent
.depth
,
282 radv_cmd_buffer_upload_data(cmd_buffer
, vb_size
, 16, vb_data
, &offset
);
284 struct radv_buffer vertex_buffer
= {
287 .bo
= cmd_buffer
->upload
.upload_bo
,
291 radv_CmdBindVertexBuffers(radv_cmd_buffer_to_handle(cmd_buffer
), 0, 1,
293 radv_buffer_to_handle(&vertex_buffer
)
300 radv_CreateSampler(radv_device_to_handle(device
),
301 &(VkSamplerCreateInfo
) {
302 .sType
= VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO
,
303 .magFilter
= blit_filter
,
304 .minFilter
= blit_filter
,
305 .addressModeU
= VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE
,
306 .addressModeV
= VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE
,
307 .addressModeW
= VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE
,
308 }, &cmd_buffer
->pool
->alloc
, &sampler
);
311 radv_temp_descriptor_set_create(cmd_buffer
->device
, cmd_buffer
,
312 device
->meta_state
.blit
.ds_layout
,
315 radv_UpdateDescriptorSets(radv_device_to_handle(device
),
317 (VkWriteDescriptorSet
[]) {
319 .sType
= VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET
,
322 .dstArrayElement
= 0,
323 .descriptorCount
= 1,
324 .descriptorType
= VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
,
325 .pImageInfo
= (VkDescriptorImageInfo
[]) {
328 .imageView
= radv_image_view_to_handle(src_iview
),
329 .imageLayout
= VK_IMAGE_LAYOUT_GENERAL
,
336 radv_CreateFramebuffer(radv_device_to_handle(device
),
337 &(VkFramebufferCreateInfo
) {
338 .sType
= VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO
,
339 .attachmentCount
= 1,
340 .pAttachments
= (VkImageView
[]) {
341 radv_image_view_to_handle(dest_iview
),
343 .width
= dest_iview
->extent
.width
,
344 .height
= dest_iview
->extent
.height
,
346 }, &cmd_buffer
->pool
->alloc
, &fb
);
348 switch (src_iview
->aspect_mask
) {
349 case VK_IMAGE_ASPECT_COLOR_BIT
: {
350 unsigned fs_key
= radv_format_meta_fs_key(dest_image
->vk_format
);
352 radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer
),
353 &(VkRenderPassBeginInfo
) {
354 .sType
= VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO
,
355 .renderPass
= device
->meta_state
.blit
.render_pass
[fs_key
],
358 .offset
= { dest_offset
.x
, dest_offset
.y
},
359 .extent
= { dest_extent
.width
, dest_extent
.height
},
361 .clearValueCount
= 0,
362 .pClearValues
= NULL
,
363 }, VK_SUBPASS_CONTENTS_INLINE
);
364 switch (src_image
->type
) {
365 case VK_IMAGE_TYPE_1D
:
366 pipeline
= device
->meta_state
.blit
.pipeline_1d_src
[fs_key
];
368 case VK_IMAGE_TYPE_2D
:
369 pipeline
= device
->meta_state
.blit
.pipeline_2d_src
[fs_key
];
371 case VK_IMAGE_TYPE_3D
:
372 pipeline
= device
->meta_state
.blit
.pipeline_3d_src
[fs_key
];
375 unreachable(!"bad VkImageType");
379 case VK_IMAGE_ASPECT_DEPTH_BIT
:
380 radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer
),
381 &(VkRenderPassBeginInfo
) {
382 .sType
= VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO
,
383 .renderPass
= device
->meta_state
.blit
.depth_only_rp
,
386 .offset
= { dest_offset
.x
, dest_offset
.y
},
387 .extent
= { dest_extent
.width
, dest_extent
.height
},
389 .clearValueCount
= 0,
390 .pClearValues
= NULL
,
391 }, VK_SUBPASS_CONTENTS_INLINE
);
392 switch (src_image
->type
) {
393 case VK_IMAGE_TYPE_1D
:
394 pipeline
= device
->meta_state
.blit
.depth_only_1d_pipeline
;
396 case VK_IMAGE_TYPE_2D
:
397 pipeline
= device
->meta_state
.blit
.depth_only_2d_pipeline
;
399 case VK_IMAGE_TYPE_3D
:
400 pipeline
= device
->meta_state
.blit
.depth_only_3d_pipeline
;
403 unreachable(!"bad VkImageType");
406 case VK_IMAGE_ASPECT_STENCIL_BIT
:
407 radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer
),
408 &(VkRenderPassBeginInfo
) {
409 .sType
= VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO
,
410 .renderPass
= device
->meta_state
.blit
.stencil_only_rp
,
413 .offset
= { dest_offset
.x
, dest_offset
.y
},
414 .extent
= { dest_extent
.width
, dest_extent
.height
},
416 .clearValueCount
= 0,
417 .pClearValues
= NULL
,
418 }, VK_SUBPASS_CONTENTS_INLINE
);
419 switch (src_image
->type
) {
420 case VK_IMAGE_TYPE_1D
:
421 pipeline
= device
->meta_state
.blit
.stencil_only_1d_pipeline
;
423 case VK_IMAGE_TYPE_2D
:
424 pipeline
= device
->meta_state
.blit
.stencil_only_2d_pipeline
;
426 case VK_IMAGE_TYPE_3D
:
427 pipeline
= device
->meta_state
.blit
.stencil_only_3d_pipeline
;
430 unreachable(!"bad VkImageType");
434 unreachable(!"bad VkImageType");
437 if (cmd_buffer
->state
.pipeline
!= radv_pipeline_from_handle(pipeline
)) {
438 radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer
),
439 VK_PIPELINE_BIND_POINT_GRAPHICS
, pipeline
);
442 radv_CmdBindDescriptorSets(radv_cmd_buffer_to_handle(cmd_buffer
),
443 VK_PIPELINE_BIND_POINT_GRAPHICS
,
444 device
->meta_state
.blit
.pipeline_layout
, 0, 1,
447 radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer
), 3, 1, 0, 0);
449 radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer
));
451 /* At the point where we emit the draw call, all data from the
452 * descriptor sets, etc. has been used. We are free to delete it.
454 /* TODO: above comment is not valid for at least descriptor sets/pools,
455 * as we may not free them till after execution finishes. Check others. */
457 radv_temp_descriptor_set_destroy(cmd_buffer
->device
, set
);
458 radv_DestroySampler(radv_device_to_handle(device
), sampler
,
459 &cmd_buffer
->pool
->alloc
);
460 radv_DestroyFramebuffer(radv_device_to_handle(device
), fb
,
461 &cmd_buffer
->pool
->alloc
);
464 void radv_CmdBlitImage(
465 VkCommandBuffer commandBuffer
,
467 VkImageLayout srcImageLayout
,
469 VkImageLayout destImageLayout
,
470 uint32_t regionCount
,
471 const VkImageBlit
* pRegions
,
475 RADV_FROM_HANDLE(radv_cmd_buffer
, cmd_buffer
, commandBuffer
);
476 RADV_FROM_HANDLE(radv_image
, src_image
, srcImage
);
477 RADV_FROM_HANDLE(radv_image
, dest_image
, destImage
);
478 struct radv_meta_saved_state saved_state
;
480 /* From the Vulkan 1.0 spec:
482 * vkCmdBlitImage must not be used for multisampled source or
483 * destination images. Use vkCmdResolveImage for this purpose.
485 assert(src_image
->samples
== 1);
486 assert(dest_image
->samples
== 1);
488 radv_meta_save_graphics_reset_vport_scissor(&saved_state
, cmd_buffer
);
490 for (unsigned r
= 0; r
< regionCount
; r
++) {
491 struct radv_image_view src_iview
;
492 radv_image_view_init(&src_iview
, cmd_buffer
->device
,
493 &(VkImageViewCreateInfo
) {
494 .sType
= VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO
,
496 .viewType
= radv_meta_get_view_type(src_image
),
497 .format
= src_image
->vk_format
,
498 .subresourceRange
= {
499 .aspectMask
= pRegions
[r
].srcSubresource
.aspectMask
,
500 .baseMipLevel
= pRegions
[r
].srcSubresource
.mipLevel
,
502 .baseArrayLayer
= pRegions
[r
].srcSubresource
.baseArrayLayer
,
506 cmd_buffer
, VK_IMAGE_USAGE_SAMPLED_BIT
);
508 if (pRegions
[r
].dstOffsets
[1].x
< pRegions
[r
].dstOffsets
[0].x
||
509 pRegions
[r
].dstOffsets
[1].y
< pRegions
[r
].dstOffsets
[0].y
||
510 pRegions
[r
].srcOffsets
[1].x
< pRegions
[r
].srcOffsets
[0].x
||
511 pRegions
[r
].srcOffsets
[1].y
< pRegions
[r
].srcOffsets
[0].y
)
512 radv_finishme("FINISHME: Allow flipping in blits");
514 const VkExtent3D dest_extent
= {
515 .width
= pRegions
[r
].dstOffsets
[1].x
- pRegions
[r
].dstOffsets
[0].x
,
516 .height
= pRegions
[r
].dstOffsets
[1].y
- pRegions
[r
].dstOffsets
[0].y
,
520 const VkExtent3D src_extent
= {
521 .width
= pRegions
[r
].srcOffsets
[1].x
- pRegions
[r
].srcOffsets
[0].x
,
522 .height
= pRegions
[r
].srcOffsets
[1].y
- pRegions
[r
].srcOffsets
[0].y
,
523 .depth
= pRegions
[r
].srcOffsets
[1].z
- pRegions
[r
].srcOffsets
[0].z
,
527 if (pRegions
[r
].srcSubresource
.layerCount
> 1)
528 radv_finishme("FINISHME: copy multiple array layers");
530 struct radv_image_view dest_iview
;
532 if (pRegions
[r
].dstSubresource
.aspectMask
== VK_IMAGE_ASPECT_COLOR_BIT
)
533 usage
= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
;
535 usage
= VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
;
537 for (unsigned i
= pRegions
[r
].dstOffsets
[0].z
; i
< pRegions
[r
].dstOffsets
[1].z
; i
++) {
539 const VkOffset3D dest_offset
= {
540 .x
= pRegions
[r
].dstOffsets
[0].x
,
541 .y
= pRegions
[r
].dstOffsets
[0].y
,
544 VkOffset3D src_offset
= {
545 .x
= pRegions
[r
].srcOffsets
[0].x
,
546 .y
= pRegions
[r
].srcOffsets
[0].y
,
549 const uint32_t dest_array_slice
=
550 radv_meta_get_iview_layer(dest_image
, &pRegions
[r
].dstSubresource
,
553 radv_image_view_init(&dest_iview
, cmd_buffer
->device
,
554 &(VkImageViewCreateInfo
) {
555 .sType
= VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO
,
557 .viewType
= radv_meta_get_view_type(dest_image
),
558 .format
= dest_image
->vk_format
,
559 .subresourceRange
= {
560 .aspectMask
= pRegions
[r
].dstSubresource
.aspectMask
,
561 .baseMipLevel
= pRegions
[r
].dstSubresource
.mipLevel
,
563 .baseArrayLayer
= dest_array_slice
,
568 meta_emit_blit(cmd_buffer
,
569 src_image
, &src_iview
,
570 src_offset
, src_extent
,
571 dest_image
, &dest_iview
,
572 dest_offset
, dest_extent
,
577 radv_meta_restore(&saved_state
, cmd_buffer
);
581 radv_device_finish_meta_blit_state(struct radv_device
*device
)
583 for (unsigned i
= 0; i
< NUM_META_FS_KEYS
; ++i
) {
584 if (device
->meta_state
.blit
.render_pass
[i
])
585 radv_DestroyRenderPass(radv_device_to_handle(device
),
586 device
->meta_state
.blit
.render_pass
[i
],
587 &device
->meta_state
.alloc
);
588 if (device
->meta_state
.blit
.pipeline_1d_src
[i
])
589 radv_DestroyPipeline(radv_device_to_handle(device
),
590 device
->meta_state
.blit
.pipeline_1d_src
[i
],
591 &device
->meta_state
.alloc
);
592 if (device
->meta_state
.blit
.pipeline_2d_src
[i
])
593 radv_DestroyPipeline(radv_device_to_handle(device
),
594 device
->meta_state
.blit
.pipeline_2d_src
[i
],
595 &device
->meta_state
.alloc
);
596 if (device
->meta_state
.blit
.pipeline_3d_src
[i
])
597 radv_DestroyPipeline(radv_device_to_handle(device
),
598 device
->meta_state
.blit
.pipeline_3d_src
[i
],
599 &device
->meta_state
.alloc
);
602 if (device
->meta_state
.blit
.depth_only_rp
)
603 radv_DestroyRenderPass(radv_device_to_handle(device
),
604 device
->meta_state
.blit
.depth_only_rp
,
605 &device
->meta_state
.alloc
);
606 if (device
->meta_state
.blit
.depth_only_1d_pipeline
)
607 radv_DestroyPipeline(radv_device_to_handle(device
),
608 device
->meta_state
.blit
.depth_only_1d_pipeline
,
609 &device
->meta_state
.alloc
);
610 if (device
->meta_state
.blit
.depth_only_2d_pipeline
)
611 radv_DestroyPipeline(radv_device_to_handle(device
),
612 device
->meta_state
.blit
.depth_only_2d_pipeline
,
613 &device
->meta_state
.alloc
);
614 if (device
->meta_state
.blit
.depth_only_3d_pipeline
)
615 radv_DestroyPipeline(radv_device_to_handle(device
),
616 device
->meta_state
.blit
.depth_only_3d_pipeline
,
617 &device
->meta_state
.alloc
);
618 if (device
->meta_state
.blit
.stencil_only_rp
)
619 radv_DestroyRenderPass(radv_device_to_handle(device
),
620 device
->meta_state
.blit
.stencil_only_rp
,
621 &device
->meta_state
.alloc
);
622 if (device
->meta_state
.blit
.stencil_only_1d_pipeline
)
623 radv_DestroyPipeline(radv_device_to_handle(device
),
624 device
->meta_state
.blit
.stencil_only_1d_pipeline
,
625 &device
->meta_state
.alloc
);
626 if (device
->meta_state
.blit
.stencil_only_2d_pipeline
)
627 radv_DestroyPipeline(radv_device_to_handle(device
),
628 device
->meta_state
.blit
.stencil_only_2d_pipeline
,
629 &device
->meta_state
.alloc
);
630 if (device
->meta_state
.blit
.stencil_only_3d_pipeline
)
631 radv_DestroyPipeline(radv_device_to_handle(device
),
632 device
->meta_state
.blit
.stencil_only_3d_pipeline
,
633 &device
->meta_state
.alloc
);
634 if (device
->meta_state
.blit
.pipeline_layout
)
635 radv_DestroyPipelineLayout(radv_device_to_handle(device
),
636 device
->meta_state
.blit
.pipeline_layout
,
637 &device
->meta_state
.alloc
);
638 if (device
->meta_state
.blit
.ds_layout
)
639 radv_DestroyDescriptorSetLayout(radv_device_to_handle(device
),
640 device
->meta_state
.blit
.ds_layout
,
641 &device
->meta_state
.alloc
);
644 static VkFormat pipeline_formats
[] = {
645 VK_FORMAT_R8G8B8A8_UNORM
,
646 VK_FORMAT_R8G8B8A8_UINT
,
647 VK_FORMAT_R8G8B8A8_SINT
,
648 VK_FORMAT_R16G16B16A16_UNORM
,
649 VK_FORMAT_R16G16B16A16_SNORM
,
650 VK_FORMAT_R16G16B16A16_UINT
,
651 VK_FORMAT_R16G16B16A16_SINT
,
652 VK_FORMAT_R32_SFLOAT
,
653 VK_FORMAT_R32G32_SFLOAT
,
654 VK_FORMAT_R32G32B32A32_SFLOAT
658 radv_device_init_meta_blit_color(struct radv_device
*device
,
659 struct radv_shader_module
*vs
)
661 struct radv_shader_module fs_1d
= {0}, fs_2d
= {0}, fs_3d
= {0};
664 fs_1d
.nir
= build_nir_copy_fragment_shader(GLSL_SAMPLER_DIM_1D
);
665 fs_2d
.nir
= build_nir_copy_fragment_shader(GLSL_SAMPLER_DIM_2D
);
666 fs_3d
.nir
= build_nir_copy_fragment_shader(GLSL_SAMPLER_DIM_3D
);
668 for (unsigned i
= 0; i
< ARRAY_SIZE(pipeline_formats
); ++i
) {
669 unsigned key
= radv_format_meta_fs_key(pipeline_formats
[i
]);
670 result
= radv_CreateRenderPass(radv_device_to_handle(device
),
671 &(VkRenderPassCreateInfo
) {
672 .sType
= VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO
,
673 .attachmentCount
= 1,
674 .pAttachments
= &(VkAttachmentDescription
) {
675 .format
= pipeline_formats
[i
],
676 .loadOp
= VK_ATTACHMENT_LOAD_OP_LOAD
,
677 .storeOp
= VK_ATTACHMENT_STORE_OP_STORE
,
678 .initialLayout
= VK_IMAGE_LAYOUT_GENERAL
,
679 .finalLayout
= VK_IMAGE_LAYOUT_GENERAL
,
682 .pSubpasses
= &(VkSubpassDescription
) {
683 .pipelineBindPoint
= VK_PIPELINE_BIND_POINT_GRAPHICS
,
684 .inputAttachmentCount
= 0,
685 .colorAttachmentCount
= 1,
686 .pColorAttachments
= &(VkAttachmentReference
) {
688 .layout
= VK_IMAGE_LAYOUT_GENERAL
,
690 .pResolveAttachments
= NULL
,
691 .pDepthStencilAttachment
= &(VkAttachmentReference
) {
692 .attachment
= VK_ATTACHMENT_UNUSED
,
693 .layout
= VK_IMAGE_LAYOUT_GENERAL
,
695 .preserveAttachmentCount
= 1,
696 .pPreserveAttachments
= (uint32_t[]) { 0 },
698 .dependencyCount
= 0,
699 }, &device
->meta_state
.alloc
, &device
->meta_state
.blit
.render_pass
[key
]);
700 if (result
!= VK_SUCCESS
)
703 VkPipelineVertexInputStateCreateInfo vi_create_info
= {
704 .sType
= VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO
,
705 .vertexBindingDescriptionCount
= 1,
706 .pVertexBindingDescriptions
= (VkVertexInputBindingDescription
[]) {
709 .stride
= 5 * sizeof(float),
710 .inputRate
= VK_VERTEX_INPUT_RATE_VERTEX
713 .vertexAttributeDescriptionCount
= 2,
714 .pVertexAttributeDescriptions
= (VkVertexInputAttributeDescription
[]) {
719 .format
= VK_FORMAT_R32G32_SFLOAT
,
723 /* Texture Coordinate */
726 .format
= VK_FORMAT_R32G32B32_SFLOAT
,
732 VkPipelineShaderStageCreateInfo pipeline_shader_stages
[] = {
734 .sType
= VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO
,
735 .stage
= VK_SHADER_STAGE_VERTEX_BIT
,
736 .module
= radv_shader_module_to_handle(vs
),
738 .pSpecializationInfo
= NULL
740 .sType
= VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO
,
741 .stage
= VK_SHADER_STAGE_FRAGMENT_BIT
,
742 .module
= VK_NULL_HANDLE
, /* TEMPLATE VALUE! FILL ME IN! */
744 .pSpecializationInfo
= NULL
748 const VkGraphicsPipelineCreateInfo vk_pipeline_info
= {
749 .sType
= VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO
,
750 .stageCount
= ARRAY_SIZE(pipeline_shader_stages
),
751 .pStages
= pipeline_shader_stages
,
752 .pVertexInputState
= &vi_create_info
,
753 .pInputAssemblyState
= &(VkPipelineInputAssemblyStateCreateInfo
) {
754 .sType
= VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO
,
755 .topology
= VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP
,
756 .primitiveRestartEnable
= false,
758 .pViewportState
= &(VkPipelineViewportStateCreateInfo
) {
759 .sType
= VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO
,
763 .pRasterizationState
= &(VkPipelineRasterizationStateCreateInfo
) {
764 .sType
= VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO
,
765 .rasterizerDiscardEnable
= false,
766 .polygonMode
= VK_POLYGON_MODE_FILL
,
767 .cullMode
= VK_CULL_MODE_NONE
,
768 .frontFace
= VK_FRONT_FACE_COUNTER_CLOCKWISE
770 .pMultisampleState
= &(VkPipelineMultisampleStateCreateInfo
) {
771 .sType
= VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO
,
772 .rasterizationSamples
= 1,
773 .sampleShadingEnable
= false,
774 .pSampleMask
= (VkSampleMask
[]) { UINT32_MAX
},
776 .pColorBlendState
= &(VkPipelineColorBlendStateCreateInfo
) {
777 .sType
= VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO
,
778 .attachmentCount
= 1,
779 .pAttachments
= (VkPipelineColorBlendAttachmentState
[]) {
781 VK_COLOR_COMPONENT_A_BIT
|
782 VK_COLOR_COMPONENT_R_BIT
|
783 VK_COLOR_COMPONENT_G_BIT
|
784 VK_COLOR_COMPONENT_B_BIT
},
787 .pDynamicState
= &(VkPipelineDynamicStateCreateInfo
) {
788 .sType
= VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO
,
789 .dynamicStateCount
= 2,
790 .pDynamicStates
= (VkDynamicState
[]) {
791 VK_DYNAMIC_STATE_LINE_WIDTH
,
792 VK_DYNAMIC_STATE_BLEND_CONSTANTS
,
796 .layout
= device
->meta_state
.blit
.pipeline_layout
,
797 .renderPass
= device
->meta_state
.blit
.render_pass
[key
],
801 const struct radv_graphics_pipeline_create_info radv_pipeline_info
= {
805 pipeline_shader_stages
[1].module
= radv_shader_module_to_handle(&fs_1d
);
806 result
= radv_graphics_pipeline_create(radv_device_to_handle(device
),
807 radv_pipeline_cache_to_handle(&device
->meta_state
.cache
),
808 &vk_pipeline_info
, &radv_pipeline_info
,
809 &device
->meta_state
.alloc
, &device
->meta_state
.blit
.pipeline_1d_src
[key
]);
810 if (result
!= VK_SUCCESS
)
813 pipeline_shader_stages
[1].module
= radv_shader_module_to_handle(&fs_2d
);
814 result
= radv_graphics_pipeline_create(radv_device_to_handle(device
),
815 radv_pipeline_cache_to_handle(&device
->meta_state
.cache
),
816 &vk_pipeline_info
, &radv_pipeline_info
,
817 &device
->meta_state
.alloc
, &device
->meta_state
.blit
.pipeline_2d_src
[key
]);
818 if (result
!= VK_SUCCESS
)
821 pipeline_shader_stages
[1].module
= radv_shader_module_to_handle(&fs_3d
);
822 result
= radv_graphics_pipeline_create(radv_device_to_handle(device
),
823 radv_pipeline_cache_to_handle(&device
->meta_state
.cache
),
824 &vk_pipeline_info
, &radv_pipeline_info
,
825 &device
->meta_state
.alloc
, &device
->meta_state
.blit
.pipeline_3d_src
[key
]);
826 if (result
!= VK_SUCCESS
)
833 ralloc_free(fs_1d
.nir
);
834 ralloc_free(fs_2d
.nir
);
835 ralloc_free(fs_3d
.nir
);
840 radv_device_init_meta_blit_depth(struct radv_device
*device
,
841 struct radv_shader_module
*vs
)
843 struct radv_shader_module fs_1d
= {0}, fs_2d
= {0}, fs_3d
= {0};
846 fs_1d
.nir
= build_nir_copy_fragment_shader_depth(GLSL_SAMPLER_DIM_1D
);
847 fs_2d
.nir
= build_nir_copy_fragment_shader_depth(GLSL_SAMPLER_DIM_2D
);
848 fs_3d
.nir
= build_nir_copy_fragment_shader_depth(GLSL_SAMPLER_DIM_3D
);
850 result
= radv_CreateRenderPass(radv_device_to_handle(device
),
851 &(VkRenderPassCreateInfo
) {
852 .sType
= VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO
,
853 .attachmentCount
= 1,
854 .pAttachments
= &(VkAttachmentDescription
) {
856 .loadOp
= VK_ATTACHMENT_LOAD_OP_LOAD
,
857 .storeOp
= VK_ATTACHMENT_STORE_OP_STORE
,
858 .initialLayout
= VK_IMAGE_LAYOUT_GENERAL
,
859 .finalLayout
= VK_IMAGE_LAYOUT_GENERAL
,
862 .pSubpasses
= &(VkSubpassDescription
) {
863 .pipelineBindPoint
= VK_PIPELINE_BIND_POINT_GRAPHICS
,
864 .inputAttachmentCount
= 0,
865 .colorAttachmentCount
= 0,
866 .pColorAttachments
= NULL
,
867 .pResolveAttachments
= NULL
,
868 .pDepthStencilAttachment
= &(VkAttachmentReference
) {
870 .layout
= VK_IMAGE_LAYOUT_GENERAL
,
872 .preserveAttachmentCount
= 1,
873 .pPreserveAttachments
= (uint32_t[]) { 0 },
875 .dependencyCount
= 0,
876 }, &device
->meta_state
.alloc
, &device
->meta_state
.blit
.depth_only_rp
);
877 if (result
!= VK_SUCCESS
)
880 VkPipelineVertexInputStateCreateInfo vi_create_info
= {
881 .sType
= VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO
,
882 .vertexBindingDescriptionCount
= 1,
883 .pVertexBindingDescriptions
= (VkVertexInputBindingDescription
[]) {
886 .stride
= 5 * sizeof(float),
887 .inputRate
= VK_VERTEX_INPUT_RATE_VERTEX
890 .vertexAttributeDescriptionCount
= 2,
891 .pVertexAttributeDescriptions
= (VkVertexInputAttributeDescription
[]) {
896 .format
= VK_FORMAT_R32G32_SFLOAT
,
900 /* Texture Coordinate */
903 .format
= VK_FORMAT_R32G32B32_SFLOAT
,
909 VkPipelineShaderStageCreateInfo pipeline_shader_stages
[] = {
911 .sType
= VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO
,
912 .stage
= VK_SHADER_STAGE_VERTEX_BIT
,
913 .module
= radv_shader_module_to_handle(vs
),
915 .pSpecializationInfo
= NULL
917 .sType
= VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO
,
918 .stage
= VK_SHADER_STAGE_FRAGMENT_BIT
,
919 .module
= VK_NULL_HANDLE
, /* TEMPLATE VALUE! FILL ME IN! */
921 .pSpecializationInfo
= NULL
925 const VkGraphicsPipelineCreateInfo vk_pipeline_info
= {
926 .sType
= VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO
,
927 .stageCount
= ARRAY_SIZE(pipeline_shader_stages
),
928 .pStages
= pipeline_shader_stages
,
929 .pVertexInputState
= &vi_create_info
,
930 .pInputAssemblyState
= &(VkPipelineInputAssemblyStateCreateInfo
) {
931 .sType
= VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO
,
932 .topology
= VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP
,
933 .primitiveRestartEnable
= false,
935 .pViewportState
= &(VkPipelineViewportStateCreateInfo
) {
936 .sType
= VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO
,
940 .pRasterizationState
= &(VkPipelineRasterizationStateCreateInfo
) {
941 .sType
= VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO
,
942 .rasterizerDiscardEnable
= false,
943 .polygonMode
= VK_POLYGON_MODE_FILL
,
944 .cullMode
= VK_CULL_MODE_NONE
,
945 .frontFace
= VK_FRONT_FACE_COUNTER_CLOCKWISE
947 .pMultisampleState
= &(VkPipelineMultisampleStateCreateInfo
) {
948 .sType
= VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO
,
949 .rasterizationSamples
= 1,
950 .sampleShadingEnable
= false,
951 .pSampleMask
= (VkSampleMask
[]) { UINT32_MAX
},
953 .pColorBlendState
= &(VkPipelineColorBlendStateCreateInfo
) {
954 .sType
= VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO
,
955 .attachmentCount
= 0,
956 .pAttachments
= NULL
,
958 .pDepthStencilState
= &(VkPipelineDepthStencilStateCreateInfo
) {
959 .sType
= VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO
,
960 .depthTestEnable
= true,
961 .depthWriteEnable
= true,
962 .depthCompareOp
= VK_COMPARE_OP_ALWAYS
,
964 .pDynamicState
= &(VkPipelineDynamicStateCreateInfo
) {
965 .sType
= VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO
,
966 .dynamicStateCount
= 7,
967 .pDynamicStates
= (VkDynamicState
[]) {
968 VK_DYNAMIC_STATE_LINE_WIDTH
,
969 VK_DYNAMIC_STATE_DEPTH_BIAS
,
970 VK_DYNAMIC_STATE_BLEND_CONSTANTS
,
971 VK_DYNAMIC_STATE_DEPTH_BOUNDS
,
972 VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK
,
973 VK_DYNAMIC_STATE_STENCIL_WRITE_MASK
,
974 VK_DYNAMIC_STATE_STENCIL_REFERENCE
,
978 .layout
= device
->meta_state
.blit
.pipeline_layout
,
979 .renderPass
= device
->meta_state
.blit
.depth_only_rp
,
983 const struct radv_graphics_pipeline_create_info radv_pipeline_info
= {
987 pipeline_shader_stages
[1].module
= radv_shader_module_to_handle(&fs_1d
);
988 result
= radv_graphics_pipeline_create(radv_device_to_handle(device
),
989 radv_pipeline_cache_to_handle(&device
->meta_state
.cache
),
990 &vk_pipeline_info
, &radv_pipeline_info
,
991 &device
->meta_state
.alloc
, &device
->meta_state
.blit
.depth_only_1d_pipeline
);
992 if (result
!= VK_SUCCESS
)
995 pipeline_shader_stages
[1].module
= radv_shader_module_to_handle(&fs_2d
);
996 result
= radv_graphics_pipeline_create(radv_device_to_handle(device
),
997 radv_pipeline_cache_to_handle(&device
->meta_state
.cache
),
998 &vk_pipeline_info
, &radv_pipeline_info
,
999 &device
->meta_state
.alloc
, &device
->meta_state
.blit
.depth_only_2d_pipeline
);
1000 if (result
!= VK_SUCCESS
)
1003 pipeline_shader_stages
[1].module
= radv_shader_module_to_handle(&fs_3d
);
1004 result
= radv_graphics_pipeline_create(radv_device_to_handle(device
),
1005 radv_pipeline_cache_to_handle(&device
->meta_state
.cache
),
1006 &vk_pipeline_info
, &radv_pipeline_info
,
1007 &device
->meta_state
.alloc
, &device
->meta_state
.blit
.depth_only_3d_pipeline
);
1008 if (result
!= VK_SUCCESS
)
1012 ralloc_free(fs_1d
.nir
);
1013 ralloc_free(fs_2d
.nir
);
1014 ralloc_free(fs_3d
.nir
);
1019 radv_device_init_meta_blit_stencil(struct radv_device
*device
,
1020 struct radv_shader_module
*vs
)
1022 struct radv_shader_module fs_1d
= {0}, fs_2d
= {0}, fs_3d
= {0};
1025 fs_1d
.nir
= build_nir_copy_fragment_shader_stencil(GLSL_SAMPLER_DIM_1D
);
1026 fs_2d
.nir
= build_nir_copy_fragment_shader_stencil(GLSL_SAMPLER_DIM_2D
);
1027 fs_3d
.nir
= build_nir_copy_fragment_shader_stencil(GLSL_SAMPLER_DIM_3D
);
1029 result
= radv_CreateRenderPass(radv_device_to_handle(device
),
1030 &(VkRenderPassCreateInfo
) {
1031 .sType
= VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO
,
1032 .attachmentCount
= 1,
1033 .pAttachments
= &(VkAttachmentDescription
) {
1035 .loadOp
= VK_ATTACHMENT_LOAD_OP_LOAD
,
1036 .storeOp
= VK_ATTACHMENT_STORE_OP_STORE
,
1037 .initialLayout
= VK_IMAGE_LAYOUT_GENERAL
,
1038 .finalLayout
= VK_IMAGE_LAYOUT_GENERAL
,
1041 .pSubpasses
= &(VkSubpassDescription
) {
1042 .pipelineBindPoint
= VK_PIPELINE_BIND_POINT_GRAPHICS
,
1043 .inputAttachmentCount
= 0,
1044 .colorAttachmentCount
= 0,
1045 .pColorAttachments
= NULL
,
1046 .pResolveAttachments
= NULL
,
1047 .pDepthStencilAttachment
= &(VkAttachmentReference
) {
1049 .layout
= VK_IMAGE_LAYOUT_GENERAL
,
1051 .preserveAttachmentCount
= 1,
1052 .pPreserveAttachments
= (uint32_t[]) { 0 },
1054 .dependencyCount
= 0,
1055 }, &device
->meta_state
.alloc
, &device
->meta_state
.blit
.stencil_only_rp
);
1056 if (result
!= VK_SUCCESS
)
1059 VkPipelineVertexInputStateCreateInfo vi_create_info
= {
1060 .sType
= VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO
,
1061 .vertexBindingDescriptionCount
= 1,
1062 .pVertexBindingDescriptions
= (VkVertexInputBindingDescription
[]) {
1065 .stride
= 5 * sizeof(float),
1066 .inputRate
= VK_VERTEX_INPUT_RATE_VERTEX
1069 .vertexAttributeDescriptionCount
= 2,
1070 .pVertexAttributeDescriptions
= (VkVertexInputAttributeDescription
[]) {
1075 .format
= VK_FORMAT_R32G32_SFLOAT
,
1079 /* Texture Coordinate */
1082 .format
= VK_FORMAT_R32G32B32_SFLOAT
,
1088 VkPipelineShaderStageCreateInfo pipeline_shader_stages
[] = {
1090 .sType
= VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO
,
1091 .stage
= VK_SHADER_STAGE_VERTEX_BIT
,
1092 .module
= radv_shader_module_to_handle(vs
),
1094 .pSpecializationInfo
= NULL
1096 .sType
= VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO
,
1097 .stage
= VK_SHADER_STAGE_FRAGMENT_BIT
,
1098 .module
= VK_NULL_HANDLE
, /* TEMPLATE VALUE! FILL ME IN! */
1100 .pSpecializationInfo
= NULL
1104 const VkGraphicsPipelineCreateInfo vk_pipeline_info
= {
1105 .sType
= VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO
,
1106 .stageCount
= ARRAY_SIZE(pipeline_shader_stages
),
1107 .pStages
= pipeline_shader_stages
,
1108 .pVertexInputState
= &vi_create_info
,
1109 .pInputAssemblyState
= &(VkPipelineInputAssemblyStateCreateInfo
) {
1110 .sType
= VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO
,
1111 .topology
= VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP
,
1112 .primitiveRestartEnable
= false,
1114 .pViewportState
= &(VkPipelineViewportStateCreateInfo
) {
1115 .sType
= VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO
,
1119 .pRasterizationState
= &(VkPipelineRasterizationStateCreateInfo
) {
1120 .sType
= VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO
,
1121 .rasterizerDiscardEnable
= false,
1122 .polygonMode
= VK_POLYGON_MODE_FILL
,
1123 .cullMode
= VK_CULL_MODE_NONE
,
1124 .frontFace
= VK_FRONT_FACE_COUNTER_CLOCKWISE
1126 .pMultisampleState
= &(VkPipelineMultisampleStateCreateInfo
) {
1127 .sType
= VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO
,
1128 .rasterizationSamples
= 1,
1129 .sampleShadingEnable
= false,
1130 .pSampleMask
= (VkSampleMask
[]) { UINT32_MAX
},
1132 .pColorBlendState
= &(VkPipelineColorBlendStateCreateInfo
) {
1133 .sType
= VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO
,
1134 .attachmentCount
= 0,
1135 .pAttachments
= NULL
,
1137 .pDepthStencilState
= &(VkPipelineDepthStencilStateCreateInfo
) {
1138 .sType
= VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO
,
1139 .depthTestEnable
= false,
1140 .depthWriteEnable
= false,
1141 .stencilTestEnable
= true,
1143 .failOp
= VK_STENCIL_OP_REPLACE
,
1144 .passOp
= VK_STENCIL_OP_REPLACE
,
1145 .depthFailOp
= VK_STENCIL_OP_REPLACE
,
1146 .compareOp
= VK_COMPARE_OP_ALWAYS
,
1147 .compareMask
= 0xff,
1152 .failOp
= VK_STENCIL_OP_REPLACE
,
1153 .passOp
= VK_STENCIL_OP_REPLACE
,
1154 .depthFailOp
= VK_STENCIL_OP_REPLACE
,
1155 .compareOp
= VK_COMPARE_OP_ALWAYS
,
1156 .compareMask
= 0xff,
1160 .depthCompareOp
= VK_COMPARE_OP_ALWAYS
,
1163 .pDynamicState
= &(VkPipelineDynamicStateCreateInfo
) {
1164 .sType
= VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO
,
1165 .dynamicStateCount
= 4,
1166 .pDynamicStates
= (VkDynamicState
[]) {
1167 VK_DYNAMIC_STATE_LINE_WIDTH
,
1168 VK_DYNAMIC_STATE_DEPTH_BIAS
,
1169 VK_DYNAMIC_STATE_BLEND_CONSTANTS
,
1170 VK_DYNAMIC_STATE_DEPTH_BOUNDS
,
1174 .layout
= device
->meta_state
.blit
.pipeline_layout
,
1175 .renderPass
= device
->meta_state
.blit
.stencil_only_rp
,
1179 const struct radv_graphics_pipeline_create_info radv_pipeline_info
= {
1180 .use_rectlist
= true
1183 pipeline_shader_stages
[1].module
= radv_shader_module_to_handle(&fs_1d
);
1184 result
= radv_graphics_pipeline_create(radv_device_to_handle(device
),
1185 radv_pipeline_cache_to_handle(&device
->meta_state
.cache
),
1186 &vk_pipeline_info
, &radv_pipeline_info
,
1187 &device
->meta_state
.alloc
, &device
->meta_state
.blit
.stencil_only_1d_pipeline
);
1188 if (result
!= VK_SUCCESS
)
1191 pipeline_shader_stages
[1].module
= radv_shader_module_to_handle(&fs_2d
);
1192 result
= radv_graphics_pipeline_create(radv_device_to_handle(device
),
1193 radv_pipeline_cache_to_handle(&device
->meta_state
.cache
),
1194 &vk_pipeline_info
, &radv_pipeline_info
,
1195 &device
->meta_state
.alloc
, &device
->meta_state
.blit
.stencil_only_2d_pipeline
);
1196 if (result
!= VK_SUCCESS
)
1199 pipeline_shader_stages
[1].module
= radv_shader_module_to_handle(&fs_3d
);
1200 result
= radv_graphics_pipeline_create(radv_device_to_handle(device
),
1201 radv_pipeline_cache_to_handle(&device
->meta_state
.cache
),
1202 &vk_pipeline_info
, &radv_pipeline_info
,
1203 &device
->meta_state
.alloc
, &device
->meta_state
.blit
.stencil_only_3d_pipeline
);
1204 if (result
!= VK_SUCCESS
)
1208 ralloc_free(fs_1d
.nir
);
1209 ralloc_free(fs_2d
.nir
);
1210 ralloc_free(fs_3d
.nir
);
1215 radv_device_init_meta_blit_state(struct radv_device
*device
)
1218 struct radv_shader_module vs
= {0};
1219 zero(device
->meta_state
.blit
);
1221 VkDescriptorSetLayoutCreateInfo ds_layout_info
= {
1222 .sType
= VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO
,
1224 .pBindings
= (VkDescriptorSetLayoutBinding
[]) {
1227 .descriptorType
= VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
,
1228 .descriptorCount
= 1,
1229 .stageFlags
= VK_SHADER_STAGE_FRAGMENT_BIT
,
1230 .pImmutableSamplers
= NULL
1234 result
= radv_CreateDescriptorSetLayout(radv_device_to_handle(device
),
1236 &device
->meta_state
.alloc
,
1237 &device
->meta_state
.blit
.ds_layout
);
1238 if (result
!= VK_SUCCESS
)
1241 result
= radv_CreatePipelineLayout(radv_device_to_handle(device
),
1242 &(VkPipelineLayoutCreateInfo
) {
1243 .sType
= VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO
,
1244 .setLayoutCount
= 1,
1245 .pSetLayouts
= &device
->meta_state
.blit
.ds_layout
,
1247 &device
->meta_state
.alloc
, &device
->meta_state
.blit
.pipeline_layout
);
1248 if (result
!= VK_SUCCESS
)
1251 vs
.nir
= build_nir_vertex_shader();
1253 result
= radv_device_init_meta_blit_color(device
, &vs
);
1254 if (result
!= VK_SUCCESS
)
1257 result
= radv_device_init_meta_blit_depth(device
, &vs
);
1258 if (result
!= VK_SUCCESS
)
1261 result
= radv_device_init_meta_blit_stencil(device
, &vs
);
1262 if (result
!= VK_SUCCESS
)
1267 ralloc_free(vs
.nir
);
1268 radv_device_finish_meta_blit_state(device
);