src/amd/vulkan/radv_meta_bufimage.c

   1 /*
   2  * Copyright © 2016 Red Hat.
   3  * Copyright © 2016 Bas Nieuwenhuizen
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24 #include "radv_meta.h"
  25 #include "nir/nir_builder.h"
  26
  27 /*
  28  * GFX queue: Compute shader implementation of image->buffer copy
  29  * Compute queue: implementation also of buffer->image, image->image, and image clear.
  30  */
  31
  32 static nir_shader *
  33 build_nir_itob_compute_shader(struct radv_device *dev)
  34 {
  35         nir_builder b;
  36         const struct glsl_type *sampler_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D,
  37                                                                  false,
  38                                                                  false,
  39                                                                  GLSL_TYPE_FLOAT);
  40         const struct glsl_type *img_type = glsl_sampler_type(GLSL_SAMPLER_DIM_BUF,
  41                                                              false,
  42                                                              false,
  43                                                              GLSL_TYPE_FLOAT);
  44         nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL);
  45         b.shader->info.name = ralloc_strdup(b.shader, "meta_itob_cs");
  46         b.shader->info.cs.local_size[0] = 16;
  47         b.shader->info.cs.local_size[1] = 16;
  48         b.shader->info.cs.local_size[2] = 1;
  49         nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform,
  50                                                       sampler_type, "s_tex");
  51         input_img->data.descriptor_set = 0;
  52         input_img->data.binding = 0;
  53
  54         nir_variable *output_img = nir_variable_create(b.shader, nir_var_uniform,
  55                                                        img_type, "out_img");
  56         output_img->data.descriptor_set = 0;
  57         output_img->data.binding = 1;
  58
  59         nir_ssa_def *invoc_id = nir_load_system_value(&b, nir_intrinsic_load_local_invocation_id, 0);
  60         nir_ssa_def *wg_id = nir_load_system_value(&b, nir_intrinsic_load_work_group_id, 0);
  61         nir_ssa_def *block_size = nir_imm_ivec4(&b,
  62                                                 b.shader->info.cs.local_size[0],
  63                                                 b.shader->info.cs.local_size[1],
  64                                                 b.shader->info.cs.local_size[2], 0);
  65
  66         nir_ssa_def *global_id = nir_iadd(&b, nir_imul(&b, wg_id, block_size), invoc_id);
  67
  68
  69
  70         nir_intrinsic_instr *offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant);
  71         nir_intrinsic_set_base(offset, 0);
  72         nir_intrinsic_set_range(offset, 12);
  73         offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0));
  74         offset->num_components = 2;
  75         nir_ssa_dest_init(&offset->instr, &offset->dest, 2, 32, "offset");
  76         nir_builder_instr_insert(&b, &offset->instr);
  77
  78         nir_intrinsic_instr *stride = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant);
  79         nir_intrinsic_set_base(stride, 0);
  80         nir_intrinsic_set_range(stride, 12);
  81         stride->src[0] = nir_src_for_ssa(nir_imm_int(&b, 8));
  82         stride->num_components = 1;
  83         nir_ssa_dest_init(&stride->instr, &stride->dest, 1, 32, "stride");
  84         nir_builder_instr_insert(&b, &stride->instr);
  85
  86         nir_ssa_def *img_coord = nir_iadd(&b, global_id, &offset->dest.ssa);
  87
  88         nir_tex_instr *tex = nir_tex_instr_create(b.shader, 2);
  89         tex->sampler_dim = GLSL_SAMPLER_DIM_2D;
  90         tex->op = nir_texop_txf;
  91         tex->src[0].src_type = nir_tex_src_coord;
  92         tex->src[0].src = nir_src_for_ssa(nir_channels(&b, img_coord, 0x3));
  93         tex->src[1].src_type = nir_tex_src_lod;
  94         tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0));
  95         tex->dest_type = nir_type_float;
  96         tex->is_array = false;
  97         tex->coord_components = 2;
  98         tex->texture = nir_deref_var_create(tex, input_img);
  99         tex->sampler = NULL;
 100
 101         nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
 102         nir_builder_instr_insert(&b, &tex->instr);
 103
 104         nir_ssa_def *pos_x = nir_channel(&b, global_id, 0);
 105         nir_ssa_def *pos_y = nir_channel(&b, global_id, 1);
 106
 107         nir_ssa_def *tmp = nir_imul(&b, pos_y, &stride->dest.ssa);
 108         tmp = nir_iadd(&b, tmp, pos_x);
 109
 110         nir_ssa_def *coord = nir_vec4(&b, tmp, tmp, tmp, tmp);
 111
 112         nir_ssa_def *outval = &tex->dest.ssa;
 113         nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store);
 114         store->src[0] = nir_src_for_ssa(coord);
 115         store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
 116         store->src[2] = nir_src_for_ssa(outval);
 117         store->variables[0] = nir_deref_var_create(store, output_img);
 118
 119         nir_builder_instr_insert(&b, &store->instr);
 120         return b.shader;
 121 }
 122
 123 /* Image to buffer - don't write use image accessors */
 124 static VkResult
 125 radv_device_init_meta_itob_state(struct radv_device *device)
 126 {
 127         VkResult result;
 128         struct radv_shader_module cs = { .nir = NULL };
 129
 130         cs.nir = build_nir_itob_compute_shader(device);
 131
 132         /*
 133          * two descriptors one for the image being sampled
 134          * one for the buffer being written.
 135          */
 136         VkDescriptorSetLayoutCreateInfo ds_create_info = {
 137                 .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
 138                 .flags = VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT_KHR,
 139                 .bindingCount = 2,
 140                 .pBindings = (VkDescriptorSetLayoutBinding[]) {
 141                         {
 142                                 .binding = 0,
 143                                 .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
 144                                 .descriptorCount = 1,
 145                                 .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
 146                                 .pImmutableSamplers = NULL
 147                         },
 148                         {
 149                                 .binding = 1,
 150                                 .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER,
 151                                 .descriptorCount = 1,
 152                                 .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
 153                                 .pImmutableSamplers = NULL
 154                         },
 155                 }
 156         };
 157
 158         result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device),
 159                                                 &ds_create_info,
 160                                                 &device->meta_state.alloc,
 161                                                 &device->meta_state.itob.img_ds_layout);
 162         if (result != VK_SUCCESS)
 163                 goto fail;
 164
 165
 166         VkPipelineLayoutCreateInfo pl_create_info = {
 167                 .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
 168                 .setLayoutCount = 1,
 169                 .pSetLayouts = &device->meta_state.itob.img_ds_layout,
 170                 .pushConstantRangeCount = 1,
 171                 .pPushConstantRanges = &(VkPushConstantRange){VK_SHADER_STAGE_COMPUTE_BIT, 0, 12},
 172         };
 173
 174         result = radv_CreatePipelineLayout(radv_device_to_handle(device),
 175                                           &pl_create_info,
 176                                           &device->meta_state.alloc,
 177                                           &device->meta_state.itob.img_p_layout);
 178         if (result != VK_SUCCESS)
 179                 goto fail;
 180
 181         /* compute shader */
 182
 183         VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
 184                 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
 185                 .stage = VK_SHADER_STAGE_COMPUTE_BIT,
 186                 .module = radv_shader_module_to_handle(&cs),
 187                 .pName = "main",
 188                 .pSpecializationInfo = NULL,
 189         };
 190
 191         VkComputePipelineCreateInfo vk_pipeline_info = {
 192                 .sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO,
 193                 .stage = pipeline_shader_stage,
 194                 .flags = 0,
 195                 .layout = device->meta_state.itob.img_p_layout,
 196         };
 197
 198         result = radv_CreateComputePipelines(radv_device_to_handle(device),
 199                                              radv_pipeline_cache_to_handle(&device->meta_state.cache),
 200                                              1, &vk_pipeline_info, NULL,
 201                                              &device->meta_state.itob.pipeline);
 202         if (result != VK_SUCCESS)
 203                 goto fail;
 204
 205         ralloc_free(cs.nir);
 206         return VK_SUCCESS;
 207 fail:
 208         ralloc_free(cs.nir);
 209         return result;
 210 }
 211
 212 static void
 213 radv_device_finish_meta_itob_state(struct radv_device *device)
 214 {
 215         struct radv_meta_state *state = &device->meta_state;
 216
 217         radv_DestroyPipelineLayout(radv_device_to_handle(device),
 218                                    state->itob.img_p_layout, &state->alloc);
 219         radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
 220                                         state->itob.img_ds_layout,
 221                                         &state->alloc);
 222         radv_DestroyPipeline(radv_device_to_handle(device),
 223                              state->itob.pipeline, &state->alloc);
 224 }
 225
 226 static nir_shader *
 227 build_nir_btoi_compute_shader(struct radv_device *dev)
 228 {
 229         nir_builder b;
 230         const struct glsl_type *buf_type = glsl_sampler_type(GLSL_SAMPLER_DIM_BUF,
 231                                                              false,
 232                                                              false,
 233                                                              GLSL_TYPE_FLOAT);
 234         const struct glsl_type *img_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D,
 235                                                              false,
 236                                                              false,
 237                                                              GLSL_TYPE_FLOAT);
 238         nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL);
 239         b.shader->info.name = ralloc_strdup(b.shader, "meta_btoi_cs");
 240         b.shader->info.cs.local_size[0] = 16;
 241         b.shader->info.cs.local_size[1] = 16;
 242         b.shader->info.cs.local_size[2] = 1;
 243         nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform,
 244                                                       buf_type, "s_tex");
 245         input_img->data.descriptor_set = 0;
 246         input_img->data.binding = 0;
 247
 248         nir_variable *output_img = nir_variable_create(b.shader, nir_var_uniform,
 249                                                        img_type, "out_img");
 250         output_img->data.descriptor_set = 0;
 251         output_img->data.binding = 1;
 252
 253         nir_ssa_def *invoc_id = nir_load_system_value(&b, nir_intrinsic_load_local_invocation_id, 0);
 254         nir_ssa_def *wg_id = nir_load_system_value(&b, nir_intrinsic_load_work_group_id, 0);
 255         nir_ssa_def *block_size = nir_imm_ivec4(&b,
 256                                                 b.shader->info.cs.local_size[0],
 257                                                 b.shader->info.cs.local_size[1],
 258                                                 b.shader->info.cs.local_size[2], 0);
 259
 260         nir_ssa_def *global_id = nir_iadd(&b, nir_imul(&b, wg_id, block_size), invoc_id);
 261
 262         nir_intrinsic_instr *offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant);
 263         nir_intrinsic_set_base(offset, 0);
 264         nir_intrinsic_set_range(offset, 12);
 265         offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0));
 266         offset->num_components = 2;
 267         nir_ssa_dest_init(&offset->instr, &offset->dest, 2, 32, "offset");
 268         nir_builder_instr_insert(&b, &offset->instr);
 269
 270         nir_intrinsic_instr *stride = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant);
 271         nir_intrinsic_set_base(stride, 0);
 272         nir_intrinsic_set_range(stride, 12);
 273         stride->src[0] = nir_src_for_ssa(nir_imm_int(&b, 8));
 274         stride->num_components = 1;
 275         nir_ssa_dest_init(&stride->instr, &stride->dest, 1, 32, "stride");
 276         nir_builder_instr_insert(&b, &stride->instr);
 277
 278         nir_ssa_def *pos_x = nir_channel(&b, global_id, 0);
 279         nir_ssa_def *pos_y = nir_channel(&b, global_id, 1);
 280
 281         nir_ssa_def *tmp = nir_imul(&b, pos_y, &stride->dest.ssa);
 282         tmp = nir_iadd(&b, tmp, pos_x);
 283
 284         nir_ssa_def *buf_coord = nir_vec4(&b, tmp, tmp, tmp, tmp);
 285
 286         nir_ssa_def *img_coord = nir_iadd(&b, global_id, &offset->dest.ssa);
 287
 288         nir_tex_instr *tex = nir_tex_instr_create(b.shader, 2);
 289         tex->sampler_dim = GLSL_SAMPLER_DIM_BUF;
 290         tex->op = nir_texop_txf;
 291         tex->src[0].src_type = nir_tex_src_coord;
 292         tex->src[0].src = nir_src_for_ssa(nir_channels(&b, buf_coord, 1));
 293         tex->src[1].src_type = nir_tex_src_lod;
 294         tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0));
 295         tex->dest_type = nir_type_float;
 296         tex->is_array = false;
 297         tex->coord_components = 1;
 298         tex->texture = nir_deref_var_create(tex, input_img);
 299         tex->sampler = NULL;
 300
 301         nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
 302         nir_builder_instr_insert(&b, &tex->instr);
 303
 304         nir_ssa_def *outval = &tex->dest.ssa;
 305         nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store);
 306         store->src[0] = nir_src_for_ssa(img_coord);
 307         store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
 308         store->src[2] = nir_src_for_ssa(outval);
 309         store->variables[0] = nir_deref_var_create(store, output_img);
 310
 311         nir_builder_instr_insert(&b, &store->instr);
 312         return b.shader;
 313 }
 314
 315 /* Buffer to image - don't write use image accessors */
 316 static VkResult
 317 radv_device_init_meta_btoi_state(struct radv_device *device)
 318 {
 319         VkResult result;
 320         struct radv_shader_module cs = { .nir = NULL };
 321
 322         cs.nir = build_nir_btoi_compute_shader(device);
 323
 324         /*
 325          * two descriptors one for the image being sampled
 326          * one for the buffer being written.
 327          */
 328         VkDescriptorSetLayoutCreateInfo ds_create_info = {
 329                 .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
 330                 .flags = VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT_KHR,
 331                 .bindingCount = 2,
 332                 .pBindings = (VkDescriptorSetLayoutBinding[]) {
 333                         {
 334                                 .binding = 0,
 335                                 .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER,
 336                                 .descriptorCount = 1,
 337                                 .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
 338                                 .pImmutableSamplers = NULL
 339                         },
 340                         {
 341                                 .binding = 1,
 342                                 .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
 343                                 .descriptorCount = 1,
 344                                 .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
 345                                 .pImmutableSamplers = NULL
 346                         },
 347                 }
 348         };
 349
 350         result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device),
 351                                                 &ds_create_info,
 352                                                 &device->meta_state.alloc,
 353                                                 &device->meta_state.btoi.img_ds_layout);
 354         if (result != VK_SUCCESS)
 355                 goto fail;
 356
 357
 358         VkPipelineLayoutCreateInfo pl_create_info = {
 359                 .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
 360                 .setLayoutCount = 1,
 361                 .pSetLayouts = &device->meta_state.btoi.img_ds_layout,
 362                 .pushConstantRangeCount = 1,
 363                 .pPushConstantRanges = &(VkPushConstantRange){VK_SHADER_STAGE_COMPUTE_BIT, 0, 12},
 364         };
 365
 366         result = radv_CreatePipelineLayout(radv_device_to_handle(device),
 367                                           &pl_create_info,
 368                                           &device->meta_state.alloc,
 369                                           &device->meta_state.btoi.img_p_layout);
 370         if (result != VK_SUCCESS)
 371                 goto fail;
 372
 373         /* compute shader */
 374
 375         VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
 376                 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
 377                 .stage = VK_SHADER_STAGE_COMPUTE_BIT,
 378                 .module = radv_shader_module_to_handle(&cs),
 379                 .pName = "main",
 380                 .pSpecializationInfo = NULL,
 381         };
 382
 383         VkComputePipelineCreateInfo vk_pipeline_info = {
 384                 .sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO,
 385                 .stage = pipeline_shader_stage,
 386                 .flags = 0,
 387                 .layout = device->meta_state.btoi.img_p_layout,
 388         };
 389
 390         result = radv_CreateComputePipelines(radv_device_to_handle(device),
 391                                              radv_pipeline_cache_to_handle(&device->meta_state.cache),
 392                                              1, &vk_pipeline_info, NULL,
 393                                              &device->meta_state.btoi.pipeline);
 394         if (result != VK_SUCCESS)
 395                 goto fail;
 396
 397         ralloc_free(cs.nir);
 398         return VK_SUCCESS;
 399 fail:
 400         ralloc_free(cs.nir);
 401         return result;
 402 }
 403
 404 static void
 405 radv_device_finish_meta_btoi_state(struct radv_device *device)
 406 {
 407         struct radv_meta_state *state = &device->meta_state;
 408
 409         radv_DestroyPipelineLayout(radv_device_to_handle(device),
 410                                    state->btoi.img_p_layout, &state->alloc);
 411         radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
 412                                         state->btoi.img_ds_layout,
 413                                         &state->alloc);
 414         radv_DestroyPipeline(radv_device_to_handle(device),
 415                              state->btoi.pipeline, &state->alloc);
 416 }
 417
 418 static nir_shader *
 419 build_nir_itoi_compute_shader(struct radv_device *dev)
 420 {
 421         nir_builder b;
 422         const struct glsl_type *buf_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D,
 423                                                              false,
 424                                                              false,
 425                                                              GLSL_TYPE_FLOAT);
 426         const struct glsl_type *img_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D,
 427                                                              false,
 428                                                              false,
 429                                                              GLSL_TYPE_FLOAT);
 430         nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL);
 431         b.shader->info.name = ralloc_strdup(b.shader, "meta_itoi_cs");
 432         b.shader->info.cs.local_size[0] = 16;
 433         b.shader->info.cs.local_size[1] = 16;
 434         b.shader->info.cs.local_size[2] = 1;
 435         nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform,
 436                                                       buf_type, "s_tex");
 437         input_img->data.descriptor_set = 0;
 438         input_img->data.binding = 0;
 439
 440         nir_variable *output_img = nir_variable_create(b.shader, nir_var_uniform,
 441                                                        img_type, "out_img");
 442         output_img->data.descriptor_set = 0;
 443         output_img->data.binding = 1;
 444
 445         nir_ssa_def *invoc_id = nir_load_system_value(&b, nir_intrinsic_load_local_invocation_id, 0);
 446         nir_ssa_def *wg_id = nir_load_system_value(&b, nir_intrinsic_load_work_group_id, 0);
 447         nir_ssa_def *block_size = nir_imm_ivec4(&b,
 448                                                 b.shader->info.cs.local_size[0],
 449                                                 b.shader->info.cs.local_size[1],
 450                                                 b.shader->info.cs.local_size[2], 0);
 451
 452         nir_ssa_def *global_id = nir_iadd(&b, nir_imul(&b, wg_id, block_size), invoc_id);
 453
 454         nir_intrinsic_instr *src_offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant);
 455         nir_intrinsic_set_base(src_offset, 0);
 456         nir_intrinsic_set_range(src_offset, 16);
 457         src_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0));
 458         src_offset->num_components = 2;
 459         nir_ssa_dest_init(&src_offset->instr, &src_offset->dest, 2, 32, "src_offset");
 460         nir_builder_instr_insert(&b, &src_offset->instr);
 461
 462         nir_intrinsic_instr *dst_offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant);
 463         nir_intrinsic_set_base(dst_offset, 0);
 464         nir_intrinsic_set_range(dst_offset, 16);
 465         dst_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 8));
 466         dst_offset->num_components = 2;
 467         nir_ssa_dest_init(&dst_offset->instr, &dst_offset->dest, 2, 32, "dst_offset");
 468         nir_builder_instr_insert(&b, &dst_offset->instr);
 469
 470         nir_ssa_def *src_coord = nir_iadd(&b, global_id, &src_offset->dest.ssa);
 471
 472         nir_ssa_def *dst_coord = nir_iadd(&b, global_id, &dst_offset->dest.ssa);
 473
 474         nir_tex_instr *tex = nir_tex_instr_create(b.shader, 2);
 475         tex->sampler_dim = GLSL_SAMPLER_DIM_2D;
 476         tex->op = nir_texop_txf;
 477         tex->src[0].src_type = nir_tex_src_coord;
 478         tex->src[0].src = nir_src_for_ssa(nir_channels(&b, src_coord, 3));
 479         tex->src[1].src_type = nir_tex_src_lod;
 480         tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0));
 481         tex->dest_type = nir_type_float;
 482         tex->is_array = false;
 483         tex->coord_components = 2;
 484         tex->texture = nir_deref_var_create(tex, input_img);
 485         tex->sampler = NULL;
 486
 487         nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
 488         nir_builder_instr_insert(&b, &tex->instr);
 489
 490         nir_ssa_def *outval = &tex->dest.ssa;
 491         nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store);
 492         store->src[0] = nir_src_for_ssa(dst_coord);
 493         store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
 494         store->src[2] = nir_src_for_ssa(outval);
 495         store->variables[0] = nir_deref_var_create(store, output_img);
 496
 497         nir_builder_instr_insert(&b, &store->instr);
 498         return b.shader;
 499 }
 500
 501 /* image to image - don't write use image accessors */
 502 static VkResult
 503 radv_device_init_meta_itoi_state(struct radv_device *device)
 504 {
 505         VkResult result;
 506         struct radv_shader_module cs = { .nir = NULL };
 507
 508         cs.nir = build_nir_itoi_compute_shader(device);
 509
 510         /*
 511          * two descriptors one for the image being sampled
 512          * one for the buffer being written.
 513          */
 514         VkDescriptorSetLayoutCreateInfo ds_create_info = {
 515                 .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
 516                 .flags = VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT_KHR,
 517                 .bindingCount = 2,
 518                 .pBindings = (VkDescriptorSetLayoutBinding[]) {
 519                         {
 520                                 .binding = 0,
 521                                 .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
 522                                 .descriptorCount = 1,
 523                                 .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
 524                                 .pImmutableSamplers = NULL
 525                         },
 526                         {
 527                                 .binding = 1,
 528                                 .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
 529                                 .descriptorCount = 1,
 530                                 .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
 531                                 .pImmutableSamplers = NULL
 532                         },
 533                 }
 534         };
 535
 536         result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device),
 537                                                 &ds_create_info,
 538                                                 &device->meta_state.alloc,
 539                                                 &device->meta_state.itoi.img_ds_layout);
 540         if (result != VK_SUCCESS)
 541                 goto fail;
 542
 543
 544         VkPipelineLayoutCreateInfo pl_create_info = {
 545                 .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
 546                 .setLayoutCount = 1,
 547                 .pSetLayouts = &device->meta_state.itoi.img_ds_layout,
 548                 .pushConstantRangeCount = 1,
 549                 .pPushConstantRanges = &(VkPushConstantRange){VK_SHADER_STAGE_COMPUTE_BIT, 0, 16},
 550         };
 551
 552         result = radv_CreatePipelineLayout(radv_device_to_handle(device),
 553                                           &pl_create_info,
 554                                           &device->meta_state.alloc,
 555                                           &device->meta_state.itoi.img_p_layout);
 556         if (result != VK_SUCCESS)
 557                 goto fail;
 558
 559         /* compute shader */
 560
 561         VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
 562                 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
 563                 .stage = VK_SHADER_STAGE_COMPUTE_BIT,
 564                 .module = radv_shader_module_to_handle(&cs),
 565                 .pName = "main",
 566                 .pSpecializationInfo = NULL,
 567         };
 568
 569         VkComputePipelineCreateInfo vk_pipeline_info = {
 570                 .sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO,
 571                 .stage = pipeline_shader_stage,
 572                 .flags = 0,
 573                 .layout = device->meta_state.itoi.img_p_layout,
 574         };
 575
 576         result = radv_CreateComputePipelines(radv_device_to_handle(device),
 577                                              radv_pipeline_cache_to_handle(&device->meta_state.cache),
 578                                              1, &vk_pipeline_info, NULL,
 579                                              &device->meta_state.itoi.pipeline);
 580         if (result != VK_SUCCESS)
 581                 goto fail;
 582
 583         ralloc_free(cs.nir);
 584         return VK_SUCCESS;
 585 fail:
 586         ralloc_free(cs.nir);
 587         return result;
 588 }
 589
 590 static void
 591 radv_device_finish_meta_itoi_state(struct radv_device *device)
 592 {
 593         struct radv_meta_state *state = &device->meta_state;
 594
 595         radv_DestroyPipelineLayout(radv_device_to_handle(device),
 596                                    state->itoi.img_p_layout, &state->alloc);
 597         radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
 598                                         state->itoi.img_ds_layout,
 599                                         &state->alloc);
 600         radv_DestroyPipeline(radv_device_to_handle(device),
 601                              state->itoi.pipeline, &state->alloc);
 602 }
 603
 604 static nir_shader *
 605 build_nir_cleari_compute_shader(struct radv_device *dev)
 606 {
 607         nir_builder b;
 608         const struct glsl_type *img_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D,
 609                                                              false,
 610                                                              false,
 611                                                              GLSL_TYPE_FLOAT);
 612         nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL);
 613         b.shader->info.name = ralloc_strdup(b.shader, "meta_cleari_cs");
 614         b.shader->info.cs.local_size[0] = 16;
 615         b.shader->info.cs.local_size[1] = 16;
 616         b.shader->info.cs.local_size[2] = 1;
 617
 618         nir_variable *output_img = nir_variable_create(b.shader, nir_var_uniform,
 619                                                        img_type, "out_img");
 620         output_img->data.descriptor_set = 0;
 621         output_img->data.binding = 0;
 622
 623         nir_ssa_def *invoc_id = nir_load_system_value(&b, nir_intrinsic_load_local_invocation_id, 0);
 624         nir_ssa_def *wg_id = nir_load_system_value(&b, nir_intrinsic_load_work_group_id, 0);
 625         nir_ssa_def *block_size = nir_imm_ivec4(&b,
 626                                                 b.shader->info.cs.local_size[0],
 627                                                 b.shader->info.cs.local_size[1],
 628                                                 b.shader->info.cs.local_size[2], 0);
 629
 630         nir_ssa_def *global_id = nir_iadd(&b, nir_imul(&b, wg_id, block_size), invoc_id);
 631
 632         nir_intrinsic_instr *clear_val = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant);
 633         nir_intrinsic_set_base(clear_val, 0);
 634         nir_intrinsic_set_range(clear_val, 16);
 635         clear_val->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0));
 636         clear_val->num_components = 4;
 637         nir_ssa_dest_init(&clear_val->instr, &clear_val->dest, 4, 32, "clear_value");
 638         nir_builder_instr_insert(&b, &clear_val->instr);
 639
 640         nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store);
 641         store->src[0] = nir_src_for_ssa(global_id);
 642         store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
 643         store->src[2] = nir_src_for_ssa(&clear_val->dest.ssa);
 644         store->variables[0] = nir_deref_var_create(store, output_img);
 645
 646         nir_builder_instr_insert(&b, &store->instr);
 647         return b.shader;
 648 }
 649
 650 static VkResult
 651 radv_device_init_meta_cleari_state(struct radv_device *device)
 652 {
 653         VkResult result;
 654         struct radv_shader_module cs = { .nir = NULL };
 655
 656         cs.nir = build_nir_cleari_compute_shader(device);
 657
 658         /*
 659          * two descriptors one for the image being sampled
 660          * one for the buffer being written.
 661          */
 662         VkDescriptorSetLayoutCreateInfo ds_create_info = {
 663                 .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
 664                 .flags = VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT_KHR,
 665                 .bindingCount = 1,
 666                 .pBindings = (VkDescriptorSetLayoutBinding[]) {
 667                         {
 668                                 .binding = 0,
 669                                 .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
 670                                 .descriptorCount = 1,
 671                                 .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
 672                                 .pImmutableSamplers = NULL
 673                         },
 674                 }
 675         };
 676
 677         result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device),
 678                                                 &ds_create_info,
 679                                                 &device->meta_state.alloc,
 680                                                 &device->meta_state.cleari.img_ds_layout);
 681         if (result != VK_SUCCESS)
 682                 goto fail;
 683
 684
 685         VkPipelineLayoutCreateInfo pl_create_info = {
 686                 .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
 687                 .setLayoutCount = 1,
 688                 .pSetLayouts = &device->meta_state.cleari.img_ds_layout,
 689                 .pushConstantRangeCount = 1,
 690                 .pPushConstantRanges = &(VkPushConstantRange){VK_SHADER_STAGE_COMPUTE_BIT, 0, 16},
 691         };
 692
 693         result = radv_CreatePipelineLayout(radv_device_to_handle(device),
 694                                           &pl_create_info,
 695                                           &device->meta_state.alloc,
 696                                           &device->meta_state.cleari.img_p_layout);
 697         if (result != VK_SUCCESS)
 698                 goto fail;
 699
 700         /* compute shader */
 701
 702         VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
 703                 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
 704                 .stage = VK_SHADER_STAGE_COMPUTE_BIT,
 705                 .module = radv_shader_module_to_handle(&cs),
 706                 .pName = "main",
 707                 .pSpecializationInfo = NULL,
 708         };
 709
 710         VkComputePipelineCreateInfo vk_pipeline_info = {
 711                 .sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO,
 712                 .stage = pipeline_shader_stage,
 713                 .flags = 0,
 714                 .layout = device->meta_state.cleari.img_p_layout,
 715         };
 716
 717         result = radv_CreateComputePipelines(radv_device_to_handle(device),
 718                                              radv_pipeline_cache_to_handle(&device->meta_state.cache),
 719                                              1, &vk_pipeline_info, NULL,
 720                                              &device->meta_state.cleari.pipeline);
 721         if (result != VK_SUCCESS)
 722                 goto fail;
 723
 724         ralloc_free(cs.nir);
 725         return VK_SUCCESS;
 726 fail:
 727         ralloc_free(cs.nir);
 728         return result;
 729 }
 730
 731 static void
 732 radv_device_finish_meta_cleari_state(struct radv_device *device)
 733 {
 734         struct radv_meta_state *state = &device->meta_state;
 735
 736         radv_DestroyPipelineLayout(radv_device_to_handle(device),
 737                                    state->cleari.img_p_layout, &state->alloc);
 738         radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
 739                                         state->cleari.img_ds_layout,
 740                                         &state->alloc);
 741         radv_DestroyPipeline(radv_device_to_handle(device),
 742                              state->cleari.pipeline, &state->alloc);
 743 }
 744
 745 void
 746 radv_device_finish_meta_bufimage_state(struct radv_device *device)
 747 {
 748         radv_device_finish_meta_itob_state(device);
 749         radv_device_finish_meta_btoi_state(device);
 750         radv_device_finish_meta_itoi_state(device);
 751         radv_device_finish_meta_cleari_state(device);
 752 }
 753
 754 VkResult
 755 radv_device_init_meta_bufimage_state(struct radv_device *device)
 756 {
 757         VkResult result;
 758
 759         result = radv_device_init_meta_itob_state(device);
 760         if (result != VK_SUCCESS)
 761                 return result;
 762
 763         result = radv_device_init_meta_btoi_state(device);
 764         if (result != VK_SUCCESS)
 765                 goto fail_itob;
 766
 767         result = radv_device_init_meta_itoi_state(device);
 768         if (result != VK_SUCCESS)
 769                 goto fail_btoi;
 770
 771         result = radv_device_init_meta_cleari_state(device);
 772         if (result != VK_SUCCESS)
 773                 goto fail_itoi;
 774
 775         return VK_SUCCESS;
 776 fail_itoi:
 777         radv_device_finish_meta_itoi_state(device);
 778 fail_btoi:
 779         radv_device_finish_meta_btoi_state(device);
 780 fail_itob:
 781         radv_device_finish_meta_itob_state(device);
 782         return result;
 783 }
 784
 785 static void
 786 create_iview(struct radv_cmd_buffer *cmd_buffer,
 787              struct radv_meta_blit2d_surf *surf,
 788              struct radv_image_view *iview)
 789 {
 790
 791         radv_image_view_init(iview, cmd_buffer->device,
 792                              &(VkImageViewCreateInfo) {
 793                                      .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
 794                                              .image = radv_image_to_handle(surf->image),
 795                                              .viewType = VK_IMAGE_VIEW_TYPE_2D,
 796                                              .format = surf->format,
 797                                              .subresourceRange = {
 798                                              .aspectMask = surf->aspect_mask,
 799                                              .baseMipLevel = surf->level,
 800                                              .levelCount = 1,
 801                                              .baseArrayLayer = surf->layer,
 802                                              .layerCount = 1
 803                                      },
 804                              });
 805 }
 806
 807 static void
 808 create_bview(struct radv_cmd_buffer *cmd_buffer,
 809              struct radv_buffer *buffer,
 810              unsigned offset,
 811              VkFormat format,
 812              struct radv_buffer_view *bview)
 813 {
 814         radv_buffer_view_init(bview, cmd_buffer->device,
 815                               &(VkBufferViewCreateInfo) {
 816                                       .sType = VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO,
 817                                       .flags = 0,
 818                                       .buffer = radv_buffer_to_handle(buffer),
 819                                       .format = format,
 820                                       .offset = offset,
 821                                       .range = VK_WHOLE_SIZE,
 822                               });
 823
 824 }
 825
 826 struct itob_temps {
 827         struct radv_image_view src_iview;
 828         struct radv_buffer_view dst_bview;
 829 };
 830
 831 static void
 832 itob_bind_descriptors(struct radv_cmd_buffer *cmd_buffer,
 833                       struct itob_temps *tmp)
 834 {
 835         struct radv_device *device = cmd_buffer->device;
 836
 837         radv_meta_push_descriptor_set(cmd_buffer,
 838                                       VK_PIPELINE_BIND_POINT_COMPUTE,
 839                                       device->meta_state.itob.img_p_layout,
 840                                       0, /* set */
 841                                       2, /* descriptorWriteCount */
 842                                       (VkWriteDescriptorSet[]) {
 843                                               {
 844                                                       .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
 845                                                       .dstBinding = 0,
 846                                                       .dstArrayElement = 0,
 847                                                       .descriptorCount = 1,
 848                                                       .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
 849                                                       .pImageInfo = (VkDescriptorImageInfo[]) {
 850                                                               {
 851                                                                       .sampler = VK_NULL_HANDLE,
 852                                                                       .imageView = radv_image_view_to_handle(&tmp->src_iview),
 853                                                                       .imageLayout = VK_IMAGE_LAYOUT_GENERAL,
 854                                                               },
 855                                                       }
 856                                               },
 857                                               {
 858                                                       .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
 859                                                       .dstBinding = 1,
 860                                                       .dstArrayElement = 0,
 861                                                       .descriptorCount = 1,
 862                                                       .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER,
 863                                                       .pTexelBufferView = (VkBufferView[])  { radv_buffer_view_to_handle(&tmp->dst_bview) },
 864                                               }
 865                                       });
 866 }
 867
 868 void
 869 radv_meta_image_to_buffer(struct radv_cmd_buffer *cmd_buffer,
 870                           struct radv_meta_blit2d_surf *src,
 871                           struct radv_meta_blit2d_buffer *dst,
 872                           unsigned num_rects,
 873                           struct radv_meta_blit2d_rect *rects)
 874 {
 875         VkPipeline pipeline = cmd_buffer->device->meta_state.itob.pipeline;
 876         struct radv_device *device = cmd_buffer->device;
 877         struct itob_temps temps;
 878
 879         create_iview(cmd_buffer, src, &temps.src_iview);
 880         create_bview(cmd_buffer, dst->buffer, dst->offset, dst->format, &temps.dst_bview);
 881         itob_bind_descriptors(cmd_buffer, &temps);
 882
 883
 884         radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
 885                              VK_PIPELINE_BIND_POINT_COMPUTE, pipeline);
 886
 887         for (unsigned r = 0; r < num_rects; ++r) {
 888                 unsigned push_constants[3] = {
 889                         rects[r].src_x,
 890                         rects[r].src_y,
 891                         dst->pitch
 892                 };
 893                 radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
 894                                       device->meta_state.itob.img_p_layout,
 895                                       VK_SHADER_STAGE_COMPUTE_BIT, 0, 12,
 896                                       push_constants);
 897
 898                 radv_unaligned_dispatch(cmd_buffer, rects[r].width, rects[r].height, 1);
 899         }
 900 }
 901
 902 struct btoi_temps {
 903         struct radv_buffer_view src_bview;
 904         struct radv_image_view dst_iview;
 905 };
 906
 907 static void
 908 btoi_bind_descriptors(struct radv_cmd_buffer *cmd_buffer,
 909                       struct btoi_temps *tmp)
 910 {
 911         struct radv_device *device = cmd_buffer->device;
 912
 913         radv_meta_push_descriptor_set(cmd_buffer,
 914                                       VK_PIPELINE_BIND_POINT_COMPUTE,
 915                                       device->meta_state.btoi.img_p_layout,
 916                                       0, /* set */
 917                                       2, /* descriptorWriteCount */
 918                                       (VkWriteDescriptorSet[]) {
 919                                               {
 920                                                       .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
 921                                                       .dstBinding = 0,
 922                                                       .dstArrayElement = 0,
 923                                                       .descriptorCount = 1,
 924                                                       .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER,
 925                                                       .pTexelBufferView = (VkBufferView[])  { radv_buffer_view_to_handle(&tmp->src_bview) },
 926                                               },
 927                                               {
 928                                                       .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
 929                                                       .dstBinding = 1,
 930                                                       .dstArrayElement = 0,
 931                                                       .descriptorCount = 1,
 932                                                       .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
 933                                                       .pImageInfo = (VkDescriptorImageInfo[]) {
 934                                                               {
 935                                                                       .sampler = VK_NULL_HANDLE,
 936                                                                       .imageView = radv_image_view_to_handle(&tmp->dst_iview),
 937                                                                       .imageLayout = VK_IMAGE_LAYOUT_GENERAL,
 938                                                               },
 939                                                       }
 940                                               }
 941                                       });
 942 }
 943
 944 void
 945 radv_meta_buffer_to_image_cs(struct radv_cmd_buffer *cmd_buffer,
 946                              struct radv_meta_blit2d_buffer *src,
 947                              struct radv_meta_blit2d_surf *dst,
 948                              unsigned num_rects,
 949                              struct radv_meta_blit2d_rect *rects)
 950 {
 951         VkPipeline pipeline = cmd_buffer->device->meta_state.btoi.pipeline;
 952         struct radv_device *device = cmd_buffer->device;
 953         struct btoi_temps temps;
 954
 955         create_bview(cmd_buffer, src->buffer, src->offset, src->format, &temps.src_bview);
 956         create_iview(cmd_buffer, dst, &temps.dst_iview);
 957         btoi_bind_descriptors(cmd_buffer, &temps);
 958
 959         radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
 960                              VK_PIPELINE_BIND_POINT_COMPUTE, pipeline);
 961
 962         for (unsigned r = 0; r < num_rects; ++r) {
 963                 unsigned push_constants[3] = {
 964                         rects[r].dst_x,
 965                         rects[r].dst_y,
 966                         src->pitch
 967                 };
 968                 radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
 969                                       device->meta_state.btoi.img_p_layout,
 970                                       VK_SHADER_STAGE_COMPUTE_BIT, 0, 12,
 971                                       push_constants);
 972
 973                 radv_unaligned_dispatch(cmd_buffer, rects[r].width, rects[r].height, 1);
 974         }
 975 }
 976
 977 struct itoi_temps {
 978         struct radv_image_view src_iview;
 979         struct radv_image_view dst_iview;
 980 };
 981
 982 static void
 983 itoi_bind_descriptors(struct radv_cmd_buffer *cmd_buffer,
 984                       struct itoi_temps *tmp)
 985 {
 986         struct radv_device *device = cmd_buffer->device;
 987
 988         radv_meta_push_descriptor_set(cmd_buffer,
 989                                       VK_PIPELINE_BIND_POINT_COMPUTE,
 990                                       device->meta_state.itoi.img_p_layout,
 991                                       0, /* set */
 992                                       2, /* descriptorWriteCount */
 993                                       (VkWriteDescriptorSet[]) {
 994                                               {
 995                                                        .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
 996                                                        .dstBinding = 0,
 997                                                        .dstArrayElement = 0,
 998                                                        .descriptorCount = 1,
 999                                                        .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
1000                                                        .pImageInfo = (VkDescriptorImageInfo[]) {
1001                                                                {
1002                                                                        .sampler = VK_NULL_HANDLE,
1003                                                                        .imageView = radv_image_view_to_handle(&tmp->src_iview),
1004                                                                        .imageLayout = VK_IMAGE_LAYOUT_GENERAL,
1005                                                                },
1006                                                        }
1007                                               },
1008                                               {
1009                                                        .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
1010                                                        .dstBinding = 1,
1011                                                        .dstArrayElement = 0,
1012                                                        .descriptorCount = 1,
1013                                                        .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
1014                                                        .pImageInfo = (VkDescriptorImageInfo[]) {
1015                                                                {
1016                                                                        .sampler = VK_NULL_HANDLE,
1017                                                                        .imageView = radv_image_view_to_handle(&tmp->dst_iview),
1018                                                                        .imageLayout = VK_IMAGE_LAYOUT_GENERAL,
1019                                                                },
1020                                                        }
1021                                               }
1022                                       });
1023 }
1024
1025 void
1026 radv_meta_image_to_image_cs(struct radv_cmd_buffer *cmd_buffer,
1027                             struct radv_meta_blit2d_surf *src,
1028                             struct radv_meta_blit2d_surf *dst,
1029                             unsigned num_rects,
1030                             struct radv_meta_blit2d_rect *rects)
1031 {
1032         VkPipeline pipeline = cmd_buffer->device->meta_state.itoi.pipeline;
1033         struct radv_device *device = cmd_buffer->device;
1034         struct itoi_temps temps;
1035
1036         create_iview(cmd_buffer, src, &temps.src_iview);
1037         create_iview(cmd_buffer, dst, &temps.dst_iview);
1038
1039         itoi_bind_descriptors(cmd_buffer, &temps);
1040
1041         radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
1042                              VK_PIPELINE_BIND_POINT_COMPUTE, pipeline);
1043
1044         for (unsigned r = 0; r < num_rects; ++r) {
1045                 unsigned push_constants[4] = {
1046                         rects[r].src_x,
1047                         rects[r].src_y,
1048                         rects[r].dst_x,
1049                         rects[r].dst_y,
1050                 };
1051                 radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
1052                                       device->meta_state.itoi.img_p_layout,
1053                                       VK_SHADER_STAGE_COMPUTE_BIT, 0, 16,
1054                                       push_constants);
1055
1056                 radv_unaligned_dispatch(cmd_buffer, rects[r].width, rects[r].height, 1);
1057         }
1058 }
1059
1060 static void
1061 cleari_bind_descriptors(struct radv_cmd_buffer *cmd_buffer,
1062                         struct radv_image_view *dst_iview)
1063 {
1064         struct radv_device *device = cmd_buffer->device;
1065
1066         radv_meta_push_descriptor_set(cmd_buffer,
1067                                       VK_PIPELINE_BIND_POINT_COMPUTE,
1068                                       device->meta_state.cleari.img_p_layout,
1069                                       0, /* set */
1070                                       1, /* descriptorWriteCount */
1071                                       (VkWriteDescriptorSet[]) {
1072                                               {
1073                                                       .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
1074                                                       .dstBinding = 0,
1075                                                       .dstArrayElement = 0,
1076                                                       .descriptorCount = 1,
1077                                                       .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
1078                                                       .pImageInfo = (VkDescriptorImageInfo[]) {
1079                                                                {
1080                                                                       .sampler = VK_NULL_HANDLE,
1081                                                                       .imageView = radv_image_view_to_handle(dst_iview),
1082                                                                       .imageLayout = VK_IMAGE_LAYOUT_GENERAL,
1083                                                                },
1084                                                       }
1085                                                },
1086                                       });
1087 }
1088
1089 void
1090 radv_meta_clear_image_cs(struct radv_cmd_buffer *cmd_buffer,
1091                          struct radv_meta_blit2d_surf *dst,
1092                          const VkClearColorValue *clear_color)
1093 {
1094         VkPipeline pipeline = cmd_buffer->device->meta_state.cleari.pipeline;
1095         struct radv_device *device = cmd_buffer->device;
1096         struct radv_image_view dst_iview;
1097
1098         create_iview(cmd_buffer, dst, &dst_iview);
1099         cleari_bind_descriptors(cmd_buffer, &dst_iview);
1100
1101         radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
1102                              VK_PIPELINE_BIND_POINT_COMPUTE, pipeline);
1103
1104         unsigned push_constants[4] = {
1105                 clear_color->uint32[0],
1106                 clear_color->uint32[1],
1107                 clear_color->uint32[2],
1108                 clear_color->uint32[3],
1109         };
1110
1111         radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
1112                               device->meta_state.cleari.img_p_layout,
1113                               VK_SHADER_STAGE_COMPUTE_BIT, 0, 16,
1114                               push_constants);
1115
1116         radv_unaligned_dispatch(cmd_buffer, dst->image->info.width, dst->image->info.height, 1);
1117 }