radv: remove semicolon in if(...);
[mesa.git] / src / amd / vulkan / radv_meta_decompress.c
1 /*
2 * Copyright © 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26
27 #include "radv_meta.h"
28 #include "radv_private.h"
29 #include "sid.h"
30
31 static VkResult
32 create_pass(struct radv_device *device,
33 uint32_t samples,
34 VkRenderPass *pass)
35 {
36 VkResult result;
37 VkDevice device_h = radv_device_to_handle(device);
38 const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
39 VkAttachmentDescription attachment;
40
41 attachment.format = VK_FORMAT_D32_SFLOAT_S8_UINT;
42 attachment.samples = samples;
43 attachment.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD;
44 attachment.storeOp = VK_ATTACHMENT_STORE_OP_STORE;
45 attachment.initialLayout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
46 attachment.finalLayout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
47
48 result = radv_CreateRenderPass(device_h,
49 &(VkRenderPassCreateInfo) {
50 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
51 .attachmentCount = 1,
52 .pAttachments = &attachment,
53 .subpassCount = 1,
54 .pSubpasses = &(VkSubpassDescription) {
55 .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
56 .inputAttachmentCount = 0,
57 .colorAttachmentCount = 0,
58 .pColorAttachments = NULL,
59 .pResolveAttachments = NULL,
60 .pDepthStencilAttachment = &(VkAttachmentReference) {
61 .attachment = 0,
62 .layout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL,
63 },
64 .preserveAttachmentCount = 0,
65 .pPreserveAttachments = NULL,
66 },
67 .dependencyCount = 0,
68 },
69 alloc,
70 pass);
71
72 return result;
73 }
74
75 static VkResult
76 create_pipeline(struct radv_device *device,
77 VkShaderModule vs_module_h,
78 uint32_t samples,
79 VkRenderPass pass,
80 VkPipeline *decompress_pipeline,
81 VkPipeline *resummarize_pipeline)
82 {
83 VkResult result;
84 VkDevice device_h = radv_device_to_handle(device);
85
86 struct radv_shader_module fs_module = {
87 .nir = radv_meta_build_nir_fs_noop(),
88 };
89
90 if (!fs_module.nir) {
91 /* XXX: Need more accurate error */
92 result = VK_ERROR_OUT_OF_HOST_MEMORY;
93 goto cleanup;
94 }
95
96 const VkGraphicsPipelineCreateInfo pipeline_create_info = {
97 .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
98 .stageCount = 2,
99 .pStages = (VkPipelineShaderStageCreateInfo[]) {
100 {
101 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
102 .stage = VK_SHADER_STAGE_VERTEX_BIT,
103 .module = vs_module_h,
104 .pName = "main",
105 },
106 {
107 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
108 .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
109 .module = radv_shader_module_to_handle(&fs_module),
110 .pName = "main",
111 },
112 },
113 .pVertexInputState = &(VkPipelineVertexInputStateCreateInfo) {
114 .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
115 .vertexBindingDescriptionCount = 0,
116 .vertexAttributeDescriptionCount = 0,
117 },
118 .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
119 .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
120 .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
121 .primitiveRestartEnable = false,
122 },
123 .pViewportState = &(VkPipelineViewportStateCreateInfo) {
124 .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
125 .viewportCount = 1,
126 .scissorCount = 1,
127 },
128 .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
129 .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
130 .depthClampEnable = false,
131 .rasterizerDiscardEnable = false,
132 .polygonMode = VK_POLYGON_MODE_FILL,
133 .cullMode = VK_CULL_MODE_NONE,
134 .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
135 },
136 .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
137 .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
138 .rasterizationSamples = samples,
139 .sampleShadingEnable = false,
140 .pSampleMask = NULL,
141 .alphaToCoverageEnable = false,
142 .alphaToOneEnable = false,
143 },
144 .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
145 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
146 .logicOpEnable = false,
147 .attachmentCount = 0,
148 .pAttachments = NULL,
149 },
150 .pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) {
151 .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
152 .depthTestEnable = false,
153 .depthWriteEnable = false,
154 .depthBoundsTestEnable = false,
155 .stencilTestEnable = false,
156 },
157 .pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
158 .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
159 .dynamicStateCount = 2,
160 .pDynamicStates = (VkDynamicState[]) {
161 VK_DYNAMIC_STATE_VIEWPORT,
162 VK_DYNAMIC_STATE_SCISSOR,
163 },
164 },
165 .renderPass = pass,
166 .subpass = 0,
167 };
168
169 result = radv_graphics_pipeline_create(device_h,
170 radv_pipeline_cache_to_handle(&device->meta_state.cache),
171 &pipeline_create_info,
172 &(struct radv_graphics_pipeline_create_info) {
173 .use_rectlist = true,
174 .db_flush_depth_inplace = true,
175 .db_flush_stencil_inplace = true,
176 },
177 &device->meta_state.alloc,
178 decompress_pipeline);
179 if (result != VK_SUCCESS)
180 goto cleanup;
181
182 result = radv_graphics_pipeline_create(device_h,
183 radv_pipeline_cache_to_handle(&device->meta_state.cache),
184 &pipeline_create_info,
185 &(struct radv_graphics_pipeline_create_info) {
186 .use_rectlist = true,
187 .db_flush_depth_inplace = true,
188 .db_flush_stencil_inplace = true,
189 .db_resummarize = true,
190 },
191 &device->meta_state.alloc,
192 resummarize_pipeline);
193 if (result != VK_SUCCESS)
194 goto cleanup;
195
196 goto cleanup;
197
198 cleanup:
199 ralloc_free(fs_module.nir);
200 return result;
201 }
202
203 void
204 radv_device_finish_meta_depth_decomp_state(struct radv_device *device)
205 {
206 struct radv_meta_state *state = &device->meta_state;
207 VkDevice device_h = radv_device_to_handle(device);
208 const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
209
210 for (uint32_t i = 0; i < ARRAY_SIZE(state->depth_decomp); ++i) {
211 VkRenderPass pass_h = state->depth_decomp[i].pass;
212 if (pass_h) {
213 radv_DestroyRenderPass(device_h, pass_h, alloc);
214 }
215 VkPipeline pipeline_h = state->depth_decomp[i].decompress_pipeline;
216 if (pipeline_h) {
217 radv_DestroyPipeline(device_h, pipeline_h, alloc);
218 }
219 pipeline_h = state->depth_decomp[i].resummarize_pipeline;
220 if (pipeline_h) {
221 radv_DestroyPipeline(device_h, pipeline_h, alloc);
222 }
223 }
224 }
225
226 VkResult
227 radv_device_init_meta_depth_decomp_state(struct radv_device *device)
228 {
229 struct radv_meta_state *state = &device->meta_state;
230 VkResult res = VK_SUCCESS;
231
232 zero(state->depth_decomp);
233
234 struct radv_shader_module vs_module = { .nir = radv_meta_build_nir_vs_generate_vertices() };
235 if (!vs_module.nir) {
236 /* XXX: Need more accurate error */
237 res = VK_ERROR_OUT_OF_HOST_MEMORY;
238 goto fail;
239 }
240
241 VkShaderModule vs_module_h = radv_shader_module_to_handle(&vs_module);
242
243 for (uint32_t i = 0; i < ARRAY_SIZE(state->depth_decomp); ++i) {
244 uint32_t samples = 1 << i;
245
246 res = create_pass(device, samples, &state->depth_decomp[i].pass);
247 if (res != VK_SUCCESS)
248 goto fail;
249
250 res = create_pipeline(device, vs_module_h, samples,
251 state->depth_decomp[i].pass,
252 &state->depth_decomp[i].decompress_pipeline,
253 &state->depth_decomp[i].resummarize_pipeline);
254 if (res != VK_SUCCESS)
255 goto fail;
256 }
257
258 goto cleanup;
259
260 fail:
261 radv_device_finish_meta_depth_decomp_state(device);
262
263 cleanup:
264 ralloc_free(vs_module.nir);
265
266 return res;
267 }
268
269 static void
270 emit_depth_decomp(struct radv_cmd_buffer *cmd_buffer,
271 const VkOffset2D *dest_offset,
272 const VkExtent2D *depth_decomp_extent,
273 VkPipeline pipeline_h)
274 {
275 VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
276
277 RADV_FROM_HANDLE(radv_pipeline, pipeline, pipeline_h);
278
279 if (cmd_buffer->state.pipeline != pipeline) {
280 radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
281 pipeline_h);
282 }
283
284 radv_CmdSetViewport(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkViewport) {
285 .x = dest_offset->x,
286 .y = dest_offset->y,
287 .width = depth_decomp_extent->width,
288 .height = depth_decomp_extent->height,
289 .minDepth = 0.0f,
290 .maxDepth = 1.0f
291 });
292
293 radv_CmdSetScissor(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkRect2D) {
294 .offset = *dest_offset,
295 .extent = *depth_decomp_extent,
296 });
297
298 radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0);
299 }
300
301
302 enum radv_depth_op {
303 DEPTH_DECOMPRESS,
304 DEPTH_RESUMMARIZE,
305 };
306
307 static void radv_process_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
308 struct radv_image *image,
309 VkImageSubresourceRange *subresourceRange,
310 enum radv_depth_op op)
311 {
312 struct radv_meta_saved_state saved_state;
313 struct radv_meta_saved_pass_state saved_pass_state;
314 VkDevice device_h = radv_device_to_handle(cmd_buffer->device);
315 VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
316 uint32_t width = radv_minify(image->info.width,
317 subresourceRange->baseMipLevel);
318 uint32_t height = radv_minify(image->info.height,
319 subresourceRange->baseMipLevel);
320 uint32_t samples = image->info.samples;
321 uint32_t samples_log2 = ffs(samples) - 1;
322 struct radv_meta_state *meta_state = &cmd_buffer->device->meta_state;
323
324 if (!image->surface.htile_size)
325 return;
326 radv_meta_save_pass(&saved_pass_state, cmd_buffer);
327
328 radv_meta_save_graphics_reset_vport_scissor_novertex(&saved_state, cmd_buffer);
329
330 for (uint32_t layer = 0; layer < radv_get_layerCount(image, subresourceRange); layer++) {
331 struct radv_image_view iview;
332
333 radv_image_view_init(&iview, cmd_buffer->device,
334 &(VkImageViewCreateInfo) {
335 .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
336 .image = radv_image_to_handle(image),
337 .format = image->vk_format,
338 .subresourceRange = {
339 .aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT,
340 .baseMipLevel = subresourceRange->baseMipLevel,
341 .levelCount = 1,
342 .baseArrayLayer = subresourceRange->baseArrayLayer + layer,
343 .layerCount = 1,
344 },
345 });
346
347
348 VkFramebuffer fb_h;
349 radv_CreateFramebuffer(device_h,
350 &(VkFramebufferCreateInfo) {
351 .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
352 .attachmentCount = 1,
353 .pAttachments = (VkImageView[]) {
354 radv_image_view_to_handle(&iview)
355 },
356 .width = width,
357 .height = height,
358 .layers = 1
359 },
360 &cmd_buffer->pool->alloc,
361 &fb_h);
362
363 radv_CmdBeginRenderPass(cmd_buffer_h,
364 &(VkRenderPassBeginInfo) {
365 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
366 .renderPass = meta_state->depth_decomp[samples_log2].pass,
367 .framebuffer = fb_h,
368 .renderArea = {
369 .offset = {
370 0,
371 0,
372 },
373 .extent = {
374 width,
375 height,
376 }
377 },
378 .clearValueCount = 0,
379 .pClearValues = NULL,
380 },
381 VK_SUBPASS_CONTENTS_INLINE);
382
383 VkPipeline pipeline_h;
384 switch (op) {
385 case DEPTH_DECOMPRESS:
386 pipeline_h = meta_state->depth_decomp[samples_log2].decompress_pipeline;
387 break;
388 case DEPTH_RESUMMARIZE:
389 pipeline_h = meta_state->depth_decomp[samples_log2].resummarize_pipeline;
390 break;
391 default:
392 unreachable("unknown operation");
393 }
394
395 emit_depth_decomp(cmd_buffer, &(VkOffset2D){0, 0 }, &(VkExtent2D){width, height}, pipeline_h);
396 radv_CmdEndRenderPass(cmd_buffer_h);
397
398 radv_DestroyFramebuffer(device_h, fb_h,
399 &cmd_buffer->pool->alloc);
400 }
401 radv_meta_restore(&saved_state, cmd_buffer);
402 radv_meta_restore_pass(&saved_pass_state, cmd_buffer);
403 }
404
405 void radv_decompress_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
406 struct radv_image *image,
407 VkImageSubresourceRange *subresourceRange)
408 {
409 assert(cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL);
410 radv_process_depth_image_inplace(cmd_buffer, image, subresourceRange, DEPTH_DECOMPRESS);
411 }
412
413 void radv_resummarize_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
414 struct radv_image *image,
415 VkImageSubresourceRange *subresourceRange)
416 {
417 assert(cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL);
418 radv_process_depth_image_inplace(cmd_buffer, image, subresourceRange, DEPTH_RESUMMARIZE);
419 }