src/amd/vulkan/radv_meta_resolve_cs.c

   1 /*
   2  * Copyright © 2016 Dave Airlie
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24
  25 #include <assert.h>
  26 #include <stdbool.h>
  27
  28 #include "radv_meta.h"
  29 #include "radv_private.h"
  30 #include "nir/nir_builder.h"
  31 #include "sid.h"
  32 #include "vk_format.h"
  33
  34 static nir_shader *
  35 build_resolve_compute_shader(struct radv_device *dev, bool is_integer, bool is_srgb, int samples)
  36 {
  37         nir_builder b;
  38         char name[64];
  39         nir_if *outer_if = NULL;
  40         const struct glsl_type *sampler_type = glsl_sampler_type(GLSL_SAMPLER_DIM_MS,
  41                                                                  false,
  42                                                                  false,
  43                                                                  GLSL_TYPE_FLOAT);
  44         const struct glsl_type *img_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D,
  45                                                              false,
  46                                                              false,
  47                                                              GLSL_TYPE_FLOAT);
  48         snprintf(name, 64, "meta_resolve_cs-%d-%s", samples, is_integer ? "int" : (is_srgb ? "srgb" : "float"));
  49         nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL);
  50         b.shader->info->name = ralloc_strdup(b.shader, name);
  51         b.shader->info->cs.local_size[0] = 16;
  52         b.shader->info->cs.local_size[1] = 16;
  53         b.shader->info->cs.local_size[2] = 1;
  54
  55         nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform,
  56                                                       sampler_type, "s_tex");
  57         input_img->data.descriptor_set = 0;
  58         input_img->data.binding = 0;
  59
  60         nir_variable *output_img = nir_variable_create(b.shader, nir_var_uniform,
  61                                                        img_type, "out_img");
  62         output_img->data.descriptor_set = 0;
  63         output_img->data.binding = 1;
  64         nir_ssa_def *invoc_id = nir_load_system_value(&b, nir_intrinsic_load_local_invocation_id, 0);
  65         nir_ssa_def *wg_id = nir_load_system_value(&b, nir_intrinsic_load_work_group_id, 0);
  66         nir_ssa_def *block_size = nir_imm_ivec4(&b,
  67                                                 b.shader->info->cs.local_size[0],
  68                                                 b.shader->info->cs.local_size[1],
  69                                                 b.shader->info->cs.local_size[2], 0);
  70
  71         nir_ssa_def *global_id = nir_iadd(&b, nir_imul(&b, wg_id, block_size), invoc_id);
  72
  73         nir_intrinsic_instr *src_offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant);
  74         src_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0));
  75         src_offset->num_components = 2;
  76         nir_ssa_dest_init(&src_offset->instr, &src_offset->dest, 2, 32, "src_offset");
  77         nir_builder_instr_insert(&b, &src_offset->instr);
  78
  79         nir_intrinsic_instr *dst_offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant);
  80         dst_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 8));
  81         dst_offset->num_components = 2;
  82         nir_ssa_dest_init(&dst_offset->instr, &dst_offset->dest, 2, 32, "dst_offset");
  83         nir_builder_instr_insert(&b, &dst_offset->instr);
  84
  85         nir_ssa_def *img_coord = nir_channels(&b, nir_iadd(&b, global_id, &src_offset->dest.ssa), 0x3);
  86         /* do a txf_ms on each sample */
  87         nir_ssa_def *tmp;
  88
  89         nir_tex_instr *tex = nir_tex_instr_create(b.shader, 2);
  90         tex->sampler_dim = GLSL_SAMPLER_DIM_MS;
  91         tex->op = nir_texop_txf_ms;
  92         tex->src[0].src_type = nir_tex_src_coord;
  93         tex->src[0].src = nir_src_for_ssa(img_coord);
  94         tex->src[1].src_type = nir_tex_src_ms_index;
  95         tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0));
  96         tex->dest_type = nir_type_float;
  97         tex->is_array = false;
  98         tex->coord_components = 2;
  99         tex->texture = nir_deref_var_create(tex, input_img);
 100         tex->sampler = NULL;
 101
 102         nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
 103         nir_builder_instr_insert(&b, &tex->instr);
 104
 105         tmp = &tex->dest.ssa;
 106         nir_variable *color =
 107                 nir_local_variable_create(b.impl, glsl_vec4_type(), "color");
 108
 109         if (!is_integer && samples > 1) {
 110                 nir_tex_instr *tex_all_same = nir_tex_instr_create(b.shader, 1);
 111                 tex_all_same->sampler_dim = GLSL_SAMPLER_DIM_MS;
 112                 tex_all_same->op = nir_texop_samples_identical;
 113                 tex_all_same->src[0].src_type = nir_tex_src_coord;
 114                 tex_all_same->src[0].src = nir_src_for_ssa(img_coord);
 115                 tex_all_same->dest_type = nir_type_float;
 116                 tex_all_same->is_array = false;
 117                 tex_all_same->coord_components = 2;
 118                 tex_all_same->texture = nir_deref_var_create(tex_all_same, input_img);
 119                 tex_all_same->sampler = NULL;
 120
 121                 nir_ssa_dest_init(&tex_all_same->instr, &tex_all_same->dest, 1, 32, "tex");
 122                 nir_builder_instr_insert(&b, &tex_all_same->instr);
 123
 124                 nir_ssa_def *all_same = nir_ine(&b, &tex_all_same->dest.ssa, nir_imm_int(&b, 0));
 125                 nir_if *if_stmt = nir_if_create(b.shader);
 126                 if_stmt->condition = nir_src_for_ssa(all_same);
 127                 nir_cf_node_insert(b.cursor, &if_stmt->cf_node);
 128
 129                 b.cursor = nir_after_cf_list(&if_stmt->then_list);
 130                 for (int i = 1; i < samples; i++) {
 131                         nir_tex_instr *tex_add = nir_tex_instr_create(b.shader, 2);
 132                         tex_add->sampler_dim = GLSL_SAMPLER_DIM_MS;
 133                         tex_add->op = nir_texop_txf_ms;
 134                         tex_add->src[0].src_type = nir_tex_src_coord;
 135                         tex_add->src[0].src = nir_src_for_ssa(img_coord);
 136                         tex_add->src[1].src_type = nir_tex_src_ms_index;
 137                         tex_add->src[1].src = nir_src_for_ssa(nir_imm_int(&b, i));
 138                         tex_add->dest_type = nir_type_float;
 139                         tex_add->is_array = false;
 140                         tex_add->coord_components = 2;
 141                         tex_add->texture = nir_deref_var_create(tex_add, input_img);
 142                         tex_add->sampler = NULL;
 143
 144                         nir_ssa_dest_init(&tex_add->instr, &tex_add->dest, 4, 32, "tex");
 145                         nir_builder_instr_insert(&b, &tex_add->instr);
 146
 147                         tmp = nir_fadd(&b, tmp, &tex_add->dest.ssa);
 148                 }
 149
 150                 tmp = nir_fdiv(&b, tmp, nir_imm_float(&b, samples));
 151                 nir_store_var(&b, color, tmp, 0xf);
 152                 b.cursor = nir_after_cf_list(&if_stmt->else_list);
 153                 outer_if = if_stmt;
 154         }
 155         nir_store_var(&b, color, &tex->dest.ssa, 0xf);
 156
 157         if (outer_if)
 158                 b.cursor = nir_after_cf_node(&outer_if->cf_node);
 159
 160         nir_ssa_def *newv = nir_load_var(&b, color);
 161
 162         if (is_srgb) {
 163                 nir_const_value v;
 164                 unsigned i;
 165                 v.u32[0] = 0x3b4d2e1c; // 0.00313080009
 166
 167                 nir_ssa_def *cmp[3];
 168                 for (i = 0; i < 3; i++)
 169                         cmp[i] = nir_flt(&b, nir_channel(&b, newv, i),
 170                                          nir_build_imm(&b, 1, 32, v));
 171
 172                 nir_ssa_def *ltvals[3];
 173                 v.f32[0] = 12.92;
 174                 for (i = 0; i < 3; i++)
 175                         ltvals[i] = nir_fmul(&b, nir_channel(&b, newv, i),
 176                                              nir_build_imm(&b, 1, 32, v));
 177
 178                 nir_ssa_def *gtvals[3];
 179
 180                 for (i = 0; i < 3; i++) {
 181                         v.f32[0] = 1.0/2.4;
 182                         gtvals[i] = nir_fpow(&b, nir_channel(&b, newv, i),
 183                                              nir_build_imm(&b, 1, 32, v));
 184                         v.f32[0] = 1.055;
 185                         gtvals[i] = nir_fmul(&b, gtvals[i],
 186                                              nir_build_imm(&b, 1, 32, v));
 187                         v.f32[0] = 0.055;
 188                         gtvals[i] = nir_fsub(&b, gtvals[i],
 189                                              nir_build_imm(&b, 1, 32, v));
 190                 }
 191
 192                 nir_ssa_def *comp[4];
 193                 for (i = 0; i < 3; i++)
 194                         comp[i] = nir_bcsel(&b, cmp[i], ltvals[i], gtvals[i]);
 195                 comp[3] = nir_channels(&b, newv, 3);
 196                 newv = nir_vec(&b, comp, 4);
 197         }
 198
 199         nir_ssa_def *coord = nir_iadd(&b, global_id, &dst_offset->dest.ssa);
 200         nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store);
 201         store->src[0] = nir_src_for_ssa(coord);
 202         store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
 203         store->src[2] = nir_src_for_ssa(newv);
 204         store->variables[0] = nir_deref_var_create(store, output_img);
 205         nir_builder_instr_insert(&b, &store->instr);
 206         return b.shader;
 207 }
 208
 209
 210 static VkResult
 211 create_layout(struct radv_device *device)
 212 {
 213         VkResult result;
 214         /*
 215          * two descriptors one for the image being sampled
 216          * one for the buffer being written.
 217          */
 218         VkDescriptorSetLayoutCreateInfo ds_create_info = {
 219                 .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
 220                 .flags = VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT_KHR,
 221                 .bindingCount = 2,
 222                 .pBindings = (VkDescriptorSetLayoutBinding[]) {
 223                         {
 224                                 .binding = 0,
 225                                 .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
 226                                 .descriptorCount = 1,
 227                                 .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
 228                                 .pImmutableSamplers = NULL
 229                         },
 230                         {
 231                                 .binding = 1,
 232                                 .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
 233                                 .descriptorCount = 1,
 234                                 .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
 235                                 .pImmutableSamplers = NULL
 236                         },
 237                 }
 238         };
 239
 240         result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device),
 241                                                 &ds_create_info,
 242                                                 &device->meta_state.alloc,
 243                                                 &device->meta_state.resolve_compute.ds_layout);
 244         if (result != VK_SUCCESS)
 245                 goto fail;
 246
 247
 248         VkPipelineLayoutCreateInfo pl_create_info = {
 249                 .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
 250                 .setLayoutCount = 1,
 251                 .pSetLayouts = &device->meta_state.resolve_compute.ds_layout,
 252                 .pushConstantRangeCount = 1,
 253                 .pPushConstantRanges = &(VkPushConstantRange){VK_SHADER_STAGE_COMPUTE_BIT, 0, 16},
 254         };
 255
 256         result = radv_CreatePipelineLayout(radv_device_to_handle(device),
 257                                           &pl_create_info,
 258                                           &device->meta_state.alloc,
 259                                           &device->meta_state.resolve_compute.p_layout);
 260         if (result != VK_SUCCESS)
 261                 goto fail;
 262         return VK_SUCCESS;
 263 fail:
 264         return result;
 265 }
 266
 267 static VkResult
 268 create_resolve_pipeline(struct radv_device *device,
 269                         int samples,
 270                         bool is_integer,
 271                         bool is_srgb,
 272                         VkPipeline *pipeline)
 273 {
 274         VkResult result;
 275         struct radv_shader_module cs = { .nir = NULL };
 276
 277         cs.nir = build_resolve_compute_shader(device, is_integer, is_srgb, samples);
 278
 279         /* compute shader */
 280
 281         VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
 282                 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
 283                 .stage = VK_SHADER_STAGE_COMPUTE_BIT,
 284                 .module = radv_shader_module_to_handle(&cs),
 285                 .pName = "main",
 286                 .pSpecializationInfo = NULL,
 287         };
 288
 289         VkComputePipelineCreateInfo vk_pipeline_info = {
 290                 .sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO,
 291                 .stage = pipeline_shader_stage,
 292                 .flags = 0,
 293                 .layout = device->meta_state.resolve_compute.p_layout,
 294         };
 295
 296         result = radv_CreateComputePipelines(radv_device_to_handle(device),
 297                                              radv_pipeline_cache_to_handle(&device->meta_state.cache),
 298                                              1, &vk_pipeline_info, NULL,
 299                                              pipeline);
 300         if (result != VK_SUCCESS)
 301                 goto fail;
 302
 303         ralloc_free(cs.nir);
 304         return VK_SUCCESS;
 305 fail:
 306         ralloc_free(cs.nir);
 307         return result;
 308 }
 309
 310 VkResult
 311 radv_device_init_meta_resolve_compute_state(struct radv_device *device)
 312 {
 313         struct radv_meta_state *state = &device->meta_state;
 314         VkResult res;
 315         memset(&device->meta_state.resolve_compute, 0, sizeof(device->meta_state.resolve_compute));
 316
 317         res = create_layout(device);
 318         if (res != VK_SUCCESS)
 319                 return res;
 320
 321         for (uint32_t i = 0; i < MAX_SAMPLES_LOG2; ++i) {
 322                 uint32_t samples = 1 << i;
 323
 324                 res = create_resolve_pipeline(device, samples, false, false,
 325                                               &state->resolve_compute.rc[i].pipeline);
 326
 327                 res = create_resolve_pipeline(device, samples, true, false,
 328                                               &state->resolve_compute.rc[i].i_pipeline);
 329
 330                 res = create_resolve_pipeline(device, samples, false, true,
 331                                               &state->resolve_compute.rc[i].srgb_pipeline);
 332
 333         }
 334
 335         return res;
 336 }
 337
 338 void
 339 radv_device_finish_meta_resolve_compute_state(struct radv_device *device)
 340 {
 341         struct radv_meta_state *state = &device->meta_state;
 342         for (uint32_t i = 0; i < MAX_SAMPLES_LOG2; ++i) {
 343                 radv_DestroyPipeline(radv_device_to_handle(device),
 344                                      state->resolve_compute.rc[i].pipeline,
 345                                      &state->alloc);
 346
 347                 radv_DestroyPipeline(radv_device_to_handle(device),
 348                                      state->resolve_compute.rc[i].i_pipeline,
 349                                      &state->alloc);
 350
 351                 radv_DestroyPipeline(radv_device_to_handle(device),
 352                                      state->resolve_compute.rc[i].srgb_pipeline,
 353                                      &state->alloc);
 354         }
 355
 356         radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
 357                                         state->resolve_compute.ds_layout,
 358                                         &state->alloc);
 359         radv_DestroyPipelineLayout(radv_device_to_handle(device),
 360                                    state->resolve_compute.p_layout,
 361                                    &state->alloc);
 362 }
 363
 364 void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer,
 365                                      struct radv_image *src_image,
 366                                      VkImageLayout src_image_layout,
 367                                      struct radv_image *dest_image,
 368                                      VkImageLayout dest_image_layout,
 369                                      uint32_t region_count,
 370                                      const VkImageResolve *regions)
 371 {
 372         struct radv_device *device = cmd_buffer->device;
 373         struct radv_meta_saved_compute_state saved_state;
 374         const uint32_t samples = src_image->info.samples;
 375         const uint32_t samples_log2 = ffs(samples) - 1;
 376
 377         for (uint32_t r = 0; r < region_count; ++r) {
 378                 const VkImageResolve *region = &regions[r];
 379                 const uint32_t src_base_layer =
 380                         radv_meta_get_iview_layer(src_image, &region->srcSubresource,
 381                                                   &region->srcOffset);
 382                 VkImageSubresourceRange range;
 383                 range.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT;
 384                 range.baseMipLevel = region->srcSubresource.mipLevel;
 385                 range.levelCount = 1;
 386                 range.baseArrayLayer = src_base_layer;
 387                 range.layerCount = region->srcSubresource.layerCount;
 388                 radv_fast_clear_flush_image_inplace(cmd_buffer, src_image, &range);
 389         }
 390
 391         radv_meta_save_compute(&saved_state, cmd_buffer, 16);
 392
 393         for (uint32_t r = 0; r < region_count; ++r) {
 394                 const VkImageResolve *region = &regions[r];
 395
 396                 assert(region->srcSubresource.aspectMask == VK_IMAGE_ASPECT_COLOR_BIT);
 397                 assert(region->dstSubresource.aspectMask == VK_IMAGE_ASPECT_COLOR_BIT);
 398                 assert(region->srcSubresource.layerCount == region->dstSubresource.layerCount);
 399
 400                 const uint32_t src_base_layer =
 401                         radv_meta_get_iview_layer(src_image, &region->srcSubresource,
 402                                                   &region->srcOffset);
 403
 404                 const uint32_t dest_base_layer =
 405                         radv_meta_get_iview_layer(dest_image, &region->dstSubresource,
 406                                                   &region->dstOffset);
 407
 408                 const struct VkExtent3D extent =
 409                         radv_sanitize_image_extent(src_image->type, region->extent);
 410                 const struct VkOffset3D srcOffset =
 411                         radv_sanitize_image_offset(src_image->type, region->srcOffset);
 412                 const struct VkOffset3D dstOffset =
 413                         radv_sanitize_image_offset(dest_image->type, region->dstOffset);
 414
 415                 for (uint32_t layer = 0; layer < region->srcSubresource.layerCount;
 416                      ++layer) {
 417
 418                         struct radv_image_view src_iview;
 419                         radv_image_view_init(&src_iview, cmd_buffer->device,
 420                                              &(VkImageViewCreateInfo) {
 421                                                      .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
 422                                                              .image = radv_image_to_handle(src_image),
 423                                                              .viewType = radv_meta_get_view_type(src_image),
 424                                                              .format = src_image->vk_format,
 425                                                              .subresourceRange = {
 426                                                              .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
 427                                                              .baseMipLevel = region->srcSubresource.mipLevel,
 428                                                              .levelCount = 1,
 429                                                              .baseArrayLayer = src_base_layer + layer,
 430                                                              .layerCount = 1,
 431                                                      },
 432                                              },
 433                                              cmd_buffer, VK_IMAGE_USAGE_SAMPLED_BIT);
 434
 435                         struct radv_image_view dest_iview;
 436                         radv_image_view_init(&dest_iview, cmd_buffer->device,
 437                                              &(VkImageViewCreateInfo) {
 438                                                      .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
 439                                                              .image = radv_image_to_handle(dest_image),
 440                                                              .viewType = radv_meta_get_view_type(dest_image),
 441                                                              .format = dest_image->vk_format,
 442                                                              .subresourceRange = {
 443                                                              .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
 444                                                              .baseMipLevel = region->dstSubresource.mipLevel,
 445                                                              .levelCount = 1,
 446                                                              .baseArrayLayer = dest_base_layer + layer,
 447                                                              .layerCount = 1,
 448                                                      },
 449                                                              },
 450                                              cmd_buffer, VK_IMAGE_USAGE_STORAGE_BIT);
 451
 452
 453                         radv_meta_push_descriptor_set(cmd_buffer,
 454                                                       VK_PIPELINE_BIND_POINT_COMPUTE,
 455                                                       device->meta_state.resolve_compute.p_layout,
 456                                                       0, /* set */
 457                                                       2, /* descriptorWriteCount */
 458                                                       (VkWriteDescriptorSet[]) {
 459                                                               {
 460                                                                       .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
 461                                                                       .dstBinding = 0,
 462                                                                       .dstArrayElement = 0,
 463                                                                       .descriptorCount = 1,
 464                                                                       .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
 465                                                                       .pImageInfo = (VkDescriptorImageInfo[]) {
 466                                                                               {
 467                                                                                       .sampler = VK_NULL_HANDLE,
 468                                                                                       .imageView = radv_image_view_to_handle(&src_iview),
 469                                                                                       .imageLayout = VK_IMAGE_LAYOUT_GENERAL,
 470                                                                               },
 471                                                                       }
 472                                                               },
 473                                                               {
 474                                                                       .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
 475                                                                       .dstBinding = 1,
 476                                                                       .dstArrayElement = 0,
 477                                                                       .descriptorCount = 1,
 478                                                                       .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
 479                                                                       .pImageInfo = (VkDescriptorImageInfo[]) {
 480                                                                               {
 481                                                                                       .sampler = VK_NULL_HANDLE,
 482                                                                                       .imageView = radv_image_view_to_handle(&dest_iview),
 483                                                                                       .imageLayout = VK_IMAGE_LAYOUT_GENERAL,
 484                                                                               },
 485                                                                       }
 486                                                               }
 487                                                       });
 488
 489                         VkPipeline pipeline;
 490                         if (vk_format_is_int(src_image->vk_format))
 491                                 pipeline = device->meta_state.resolve_compute.rc[samples_log2].i_pipeline;
 492                         else if (vk_format_is_srgb(src_image->vk_format))
 493                                 pipeline = device->meta_state.resolve_compute.rc[samples_log2].srgb_pipeline;
 494                         else
 495                                 pipeline = device->meta_state.resolve_compute.rc[samples_log2].pipeline;
 496                         if (cmd_buffer->state.compute_pipeline != radv_pipeline_from_handle(pipeline)) {
 497                                 radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
 498                                                      VK_PIPELINE_BIND_POINT_COMPUTE, pipeline);
 499                         }
 500
 501                         unsigned push_constants[4] = {
 502                                 srcOffset.x,
 503                                 srcOffset.y,
 504                                 dstOffset.x,
 505                                 dstOffset.y,
 506                         };
 507                         radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
 508                                               device->meta_state.resolve_compute.p_layout,
 509                                               VK_SHADER_STAGE_COMPUTE_BIT, 0, 16,
 510                                               push_constants);
 511                         radv_unaligned_dispatch(cmd_buffer, extent.width, extent.height, 1);
 512                 }
 513         }
 514         radv_meta_restore_compute(&saved_state, cmd_buffer, 16);
 515 }