src/amd/vulkan/radv_shader.h

   1 /*
   2  * Copyright © 2016 Red Hat.
   3  * Copyright © 2016 Bas Nieuwenhuizen
   4  *
   5  * based in part on anv driver which is:
   6  * Copyright © 2015 Intel Corporation
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  24  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  25  * IN THE SOFTWARE.
  26  */
  27
  28 #ifndef RADV_SHADER_H
  29 #define RADV_SHADER_H
  30
  31 #include "radv_debug.h"
  32 #include "radv_private.h"
  33
  34 #include "nir/nir.h"
  35
  36 /* descriptor index into scratch ring offsets */
  37 #define RING_SCRATCH 0
  38 #define RING_ESGS_VS 1
  39 #define RING_ESGS_GS 2
  40 #define RING_GSVS_VS 3
  41 #define RING_GSVS_GS 4
  42 #define RING_HS_TESS_FACTOR 5
  43 #define RING_HS_TESS_OFFCHIP 6
  44 #define RING_PS_SAMPLE_POSITIONS 7
  45
  46 // Match MAX_SETS from radv_descriptor_set.h
  47 #define RADV_UD_MAX_SETS MAX_SETS
  48
  49 struct radv_shader_module {
  50         struct nir_shader *nir;
  51         unsigned char sha1[20];
  52         uint32_t size;
  53         char data[0];
  54 };
  55
  56 struct radv_userdata_info {
  57         int8_t sgpr_idx;
  58         uint8_t num_sgprs;
  59         bool indirect;
  60         uint32_t indirect_offset;
  61 };
  62
  63 struct radv_userdata_locations {
  64         struct radv_userdata_info descriptor_sets[RADV_UD_MAX_SETS];
  65         struct radv_userdata_info shader_data[AC_UD_MAX_UD];
  66 };
  67
  68 struct radv_vs_output_info {
  69         uint8_t vs_output_param_offset[VARYING_SLOT_MAX];
  70         uint8_t clip_dist_mask;
  71         uint8_t cull_dist_mask;
  72         uint8_t param_exports;
  73         bool writes_pointsize;
  74         bool writes_layer;
  75         bool writes_viewport_index;
  76         bool export_prim_id;
  77         unsigned pos_exports;
  78 };
  79
  80 struct radv_es_output_info {
  81         uint32_t esgs_itemsize;
  82 };
  83
  84 struct radv_shader_variant_info {
  85         struct radv_userdata_locations user_sgprs_locs;
  86         struct ac_shader_info info;
  87         unsigned num_user_sgprs;
  88         unsigned num_input_sgprs;
  89         unsigned num_input_vgprs;
  90         unsigned private_mem_vgprs;
  91         bool need_indirect_descriptor_sets;
  92         struct {
  93                 struct {
  94                         struct radv_vs_output_info outinfo;
  95                         struct radv_es_output_info es_info;
  96                         unsigned vgpr_comp_cnt;
  97                         bool as_es;
  98                         bool as_ls;
  99                         uint64_t outputs_written;
 100                 } vs;
 101                 struct {
 102                         unsigned num_interp;
 103                         uint32_t input_mask;
 104                         uint32_t flat_shaded_mask;
 105                         bool can_discard;
 106                         bool early_fragment_test;
 107                 } fs;
 108                 struct {
 109                         unsigned block_size[3];
 110                 } cs;
 111                 struct {
 112                         unsigned vertices_in;
 113                         unsigned vertices_out;
 114                         unsigned output_prim;
 115                         unsigned invocations;
 116                         unsigned gsvs_vertex_size;
 117                         unsigned max_gsvs_emit_size;
 118                         unsigned es_type; /* GFX9: VS or TES */
 119                 } gs;
 120                 struct {
 121                         unsigned tcs_vertices_out;
 122                         /* Which outputs are actually written */
 123                         uint64_t outputs_written;
 124                         /* Which patch outputs are actually written */
 125                         uint32_t patch_outputs_written;
 126
 127                 } tcs;
 128                 struct {
 129                         struct radv_vs_output_info outinfo;
 130                         struct radv_es_output_info es_info;
 131                         bool as_es;
 132                         unsigned primitive_mode;
 133                         enum gl_tess_spacing spacing;
 134                         bool ccw;
 135                         bool point_mode;
 136                 } tes;
 137         };
 138 };
 139
 140 struct radv_shader_variant {
 141         uint32_t ref_count;
 142
 143         struct radeon_winsys_bo *bo;
 144         uint64_t bo_offset;
 145         struct ac_shader_config config;
 146         uint32_t code_size;
 147         struct radv_shader_variant_info info;
 148         unsigned rsrc1;
 149         unsigned rsrc2;
 150
 151         /* debug only */
 152         uint32_t *spirv;
 153         uint32_t spirv_size;
 154         struct nir_shader *nir;
 155         char *disasm_string;
 156
 157         struct list_head slab_list;
 158 };
 159
 160 struct radv_shader_slab {
 161         struct list_head slabs;
 162         struct list_head shaders;
 163         struct radeon_winsys_bo *bo;
 164         uint64_t size;
 165         char *ptr;
 166 };
 167
 168 void
 169 radv_optimize_nir(struct nir_shader *shader);
 170
 171 nir_shader *
 172 radv_shader_compile_to_nir(struct radv_device *device,
 173                            struct radv_shader_module *module,
 174                            const char *entrypoint_name,
 175                            gl_shader_stage stage,
 176                            const VkSpecializationInfo *spec_info);
 177
 178 void *
 179 radv_alloc_shader_memory(struct radv_device *device,
 180                           struct radv_shader_variant *shader);
 181
 182 void
 183 radv_destroy_shader_slabs(struct radv_device *device);
 184
 185 struct radv_shader_variant *
 186 radv_shader_variant_create(struct radv_device *device,
 187                            struct radv_shader_module *module,
 188                            struct nir_shader *const *shaders,
 189                            int shader_count,
 190                            struct radv_pipeline_layout *layout,
 191                            const struct ac_shader_variant_key *key,
 192                            void **code_out,
 193                            unsigned *code_size_out);
 194
 195 struct radv_shader_variant *
 196 radv_create_gs_copy_shader(struct radv_device *device, struct nir_shader *nir,
 197                            void **code_out, unsigned *code_size_out,
 198                            bool multiview);
 199
 200 void
 201 radv_shader_variant_destroy(struct radv_device *device,
 202                             struct radv_shader_variant *variant);
 203
 204 const char *
 205 radv_get_shader_name(struct radv_shader_variant *var, gl_shader_stage stage);
 206
 207 void
 208 radv_shader_dump_stats(struct radv_device *device,
 209                        struct radv_shader_variant *variant,
 210                        gl_shader_stage stage,
 211                        FILE *file);
 212
 213 static inline bool
 214 radv_can_dump_shader(struct radv_device *device,
 215                      struct radv_shader_module *module)
 216 {
 217         /* Only dump non-meta shaders, useful for debugging purposes. */
 218         return device->instance->debug_flags & RADV_DEBUG_DUMP_SHADERS &&
 219                module && !module->nir;
 220 }
 221
 222 static inline bool
 223 radv_can_dump_shader_stats(struct radv_device *device,
 224                            struct radv_shader_module *module)
 225 {
 226         /* Only dump non-meta shader stats. */
 227         return device->instance->debug_flags & RADV_DEBUG_DUMP_SHADER_STATS &&
 228                module && !module->nir;
 229 }
 230
 231 #endif