src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.h

   1 /*
   2  * Copyright © 2016 Red Hat.
   3  * Copyright © 2016 Bas Nieuwenhuizen
   4  *
   5  * based on amdgpu winsys.
   6  * Copyright © 2011 Marek Olšák <maraeo@gmail.com>
   7  * Copyright © 2015 Advanced Micro Devices, Inc.
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining a
  10  * copy of this software and associated documentation files (the "Software"),
  11  * to deal in the Software without restriction, including without limitation
  12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13  * and/or sell copies of the Software, and to permit persons to whom the
  14  * Software is furnished to do so, subject to the following conditions:
  15  *
  16  * The above copyright notice and this permission notice (including the next
  17  * paragraph) shall be included in all copies or substantial portions of the
  18  * Software.
  19  *
  20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  21  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  22  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  23  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  24  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  25  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  26  * IN THE SOFTWARE.
  27  */
  28
  29 #ifndef RADV_AMDGPU_BO_H
  30 #define RADV_AMDGPU_BO_H
  31
  32 #include "radv_amdgpu_winsys.h"
  33
  34
  35 struct radv_amdgpu_map_range {
  36         uint64_t offset;
  37         uint64_t size;
  38         struct radv_amdgpu_winsys_bo *bo;
  39         uint64_t bo_offset;
  40 };
  41
  42 struct radv_amdgpu_winsys_bo {
  43         struct radeon_winsys_bo base;
  44         amdgpu_va_handle va_handle;
  45         uint64_t size;
  46         struct radv_amdgpu_winsys *ws;
  47         bool is_virtual;
  48         uint8_t priority;
  49         int ref_count;
  50
  51         union {
  52                 /* physical bo */
  53                 struct {
  54                         amdgpu_bo_handle bo;
  55                         enum radeon_bo_domain initial_domain;
  56                         bool is_shared;
  57                         struct list_head global_list_item;
  58                 };
  59                 /* virtual bo */
  60                 struct {
  61                         struct radv_amdgpu_map_range *ranges;
  62                         uint32_t range_count;
  63                         uint32_t range_capacity;
  64
  65                         struct radv_amdgpu_winsys_bo **bos;
  66                         uint32_t bo_count;
  67                         uint32_t bo_capacity;
  68                 };
  69         };
  70 };
  71
  72 static inline
  73 struct radv_amdgpu_winsys_bo *radv_amdgpu_winsys_bo(struct radeon_winsys_bo *bo)
  74 {
  75         return (struct radv_amdgpu_winsys_bo *)bo;
  76 }
  77
  78 void radv_amdgpu_bo_init_functions(struct radv_amdgpu_winsys *ws);
  79
  80 #endif /* RADV_AMDGPU_BO_H */