src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c

   1 /*
   2  * Copyright © 2016 Red Hat.
   3  * Copyright © 2016 Bas Nieuwenhuizen
   4  * based on amdgpu winsys.
   5  * Copyright © 2011 Marek Olšák <maraeo@gmail.com>
   6  * Copyright © 2015 Advanced Micro Devices, Inc.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  24  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  25  * IN THE SOFTWARE.
  26  */
  27 #include "radv_amdgpu_winsys.h"
  28 #include "radv_amdgpu_winsys_public.h"
  29 #include "radv_amdgpu_surface.h"
  30 #include "radv_debug.h"
  31 #include "amdgpu_id.h"
  32 #include "ac_surface.h"
  33 #include "xf86drm.h"
  34 #include <stdio.h>
  35 #include <stdlib.h>
  36 #include <string.h>
  37 #include <amdgpu_drm.h>
  38 #include <assert.h>
  39 #include "radv_amdgpu_cs.h"
  40 #include "radv_amdgpu_bo.h"
  41 #include "radv_amdgpu_surface.h"
  42
  43 static bool
  44 do_winsys_init(struct radv_amdgpu_winsys *ws, int fd)
  45 {
  46         if (!ac_query_gpu_info(fd, ws->dev, &ws->info, &ws->amdinfo))
  47                 return false;
  48
  49         /* LLVM 5.0 is required for GFX9. */
  50         if (ws->info.chip_class >= GFX9 && HAVE_LLVM < 0x0500) {
  51                 fprintf(stderr, "amdgpu: LLVM 5.0 is required, got LLVM %i.%i\n",
  52                         HAVE_LLVM >> 8, HAVE_LLVM & 255);
  53                 return false;
  54         }
  55
  56         ws->addrlib = amdgpu_addr_create(&ws->info, &ws->amdinfo, &ws->info.max_alignment);
  57         if (!ws->addrlib) {
  58                 fprintf(stderr, "amdgpu: Cannot create addrlib.\n");
  59                 return false;
  60         }
  61
  62         ws->info.num_sdma_rings = MIN2(ws->info.num_sdma_rings, MAX_RINGS_PER_TYPE);
  63         ws->info.num_compute_rings = MIN2(ws->info.num_compute_rings, MAX_RINGS_PER_TYPE);
  64
  65         ws->use_ib_bos = ws->info.chip_class >= CIK;
  66         return true;
  67 }
  68
  69 static void radv_amdgpu_winsys_query_info(struct radeon_winsys *rws,
  70                                      struct radeon_info *info)
  71 {
  72         *info = ((struct radv_amdgpu_winsys *)rws)->info;
  73 }
  74
  75 static bool radv_amdgpu_winsys_read_registers(struct radeon_winsys *rws,
  76                                               unsigned reg_offset,
  77                                               unsigned num_registers, uint32_t *out)
  78 {
  79         struct radv_amdgpu_winsys *ws = (struct radv_amdgpu_winsys*)rws;
  80
  81         return amdgpu_read_mm_registers(ws->dev, reg_offset / 4, num_registers,
  82                                         0xffffffff, 0, out) == 0;
  83 }
  84
  85 static const char *radv_amdgpu_winsys_get_chip_name(struct radeon_winsys *rws)
  86 {
  87         amdgpu_device_handle dev = ((struct radv_amdgpu_winsys *)rws)->dev;
  88
  89         return amdgpu_get_marketing_name(dev);
  90 }
  91
  92 static void radv_amdgpu_winsys_destroy(struct radeon_winsys *rws)
  93 {
  94         struct radv_amdgpu_winsys *ws = (struct radv_amdgpu_winsys*)rws;
  95
  96         AddrDestroy(ws->addrlib);
  97         amdgpu_device_deinitialize(ws->dev);
  98         FREE(rws);
  99 }
 100
 101 struct radeon_winsys *
 102 radv_amdgpu_winsys_create(int fd, uint64_t debug_flags, uint64_t perftest_flags)
 103 {
 104         uint32_t drm_major, drm_minor, r;
 105         amdgpu_device_handle dev;
 106         struct radv_amdgpu_winsys *ws;
 107
 108         r = amdgpu_device_initialize(fd, &drm_major, &drm_minor, &dev);
 109         if (r)
 110                 return NULL;
 111
 112         ws = calloc(1, sizeof(struct radv_amdgpu_winsys));
 113         if (!ws)
 114                 goto fail;
 115
 116         ws->dev = dev;
 117         ws->info.drm_major = drm_major;
 118         ws->info.drm_minor = drm_minor;
 119         if (!do_winsys_init(ws, fd))
 120                 goto winsys_fail;
 121
 122         ws->debug_all_bos = !!(debug_flags & RADV_DEBUG_ALL_BOS);
 123         if (debug_flags & RADV_DEBUG_NO_IBS)
 124                 ws->use_ib_bos = false;
 125
 126         ws->zero_all_vram_allocs = debug_flags & RADV_DEBUG_ZERO_VRAM;
 127         ws->batchchain = !(perftest_flags & RADV_PERFTEST_NO_BATCHCHAIN);
 128         LIST_INITHEAD(&ws->global_bo_list);
 129         pthread_mutex_init(&ws->global_bo_list_lock, NULL);
 130         ws->base.query_info = radv_amdgpu_winsys_query_info;
 131         ws->base.read_registers = radv_amdgpu_winsys_read_registers;
 132         ws->base.get_chip_name = radv_amdgpu_winsys_get_chip_name;
 133         ws->base.destroy = radv_amdgpu_winsys_destroy;
 134         radv_amdgpu_bo_init_functions(ws);
 135         radv_amdgpu_cs_init_functions(ws);
 136         radv_amdgpu_surface_init_functions(ws);
 137
 138         return &ws->base;
 139
 140 winsys_fail:
 141         free(ws);
 142 fail:
 143         amdgpu_device_deinitialize(dev);
 144         return NULL;
 145 }