src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c

   1 /*
   2  * Copyright © 2016 Red Hat.
   3  * Copyright © 2016 Bas Nieuwenhuizen
   4  * based on amdgpu winsys.
   5  * Copyright © 2011 Marek Olšák <maraeo@gmail.com>
   6  * Copyright © 2015 Advanced Micro Devices, Inc.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  24  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  25  * IN THE SOFTWARE.
  26  */
  27 #include "radv_amdgpu_winsys.h"
  28 #include "radv_amdgpu_winsys_public.h"
  29 #include "radv_amdgpu_surface.h"
  30 #include "radv_debug.h"
  31 #include "amdgpu_id.h"
  32 #include "xf86drm.h"
  33 #include <stdio.h>
  34 #include <stdlib.h>
  35 #include <string.h>
  36 #include <amdgpu_drm.h>
  37 #include <assert.h>
  38 #include "radv_amdgpu_cs.h"
  39 #include "radv_amdgpu_bo.h"
  40 #include "radv_amdgpu_surface.h"
  41
  42 static bool
  43 do_winsys_init(struct radv_amdgpu_winsys *ws, int fd)
  44 {
  45         if (!ac_query_gpu_info(fd, ws->dev, &ws->info, &ws->amdinfo))
  46                 goto fail;
  47
  48         if (ws->info.chip_class >= GFX9) {
  49                 fprintf(stderr, "radv: GFX9 is not supported.\n");
  50                 goto fail;
  51         }
  52
  53         /* family and rev_id are for addrlib */
  54         switch (ws->info.family) {
  55         case CHIP_TAHITI:
  56                 ws->family = FAMILY_SI;
  57                 ws->rev_id = SI_TAHITI_P_A0;
  58                 break;
  59         case CHIP_PITCAIRN:
  60                 ws->family = FAMILY_SI;
  61                 ws->rev_id = SI_PITCAIRN_PM_A0;
  62           break;
  63         case CHIP_VERDE:
  64                 ws->family = FAMILY_SI;
  65                 ws->rev_id = SI_CAPEVERDE_M_A0;
  66                 break;
  67         case CHIP_OLAND:
  68                 ws->family = FAMILY_SI;
  69                 ws->rev_id = SI_OLAND_M_A0;
  70                 break;
  71         case CHIP_HAINAN:
  72                 ws->family = FAMILY_SI;
  73                 ws->rev_id = SI_HAINAN_V_A0;
  74                 break;
  75         case CHIP_BONAIRE:
  76                 ws->family = FAMILY_CI;
  77                 ws->rev_id = CI_BONAIRE_M_A0;
  78                 break;
  79         case CHIP_KAVERI:
  80                 ws->family = FAMILY_KV;
  81                 ws->rev_id = KV_SPECTRE_A0;
  82                 break;
  83         case CHIP_KABINI:
  84                 ws->family = FAMILY_KV;
  85                 ws->rev_id = KB_KALINDI_A0;
  86                 break;
  87         case CHIP_HAWAII:
  88                 ws->family = FAMILY_CI;
  89                 ws->rev_id = CI_HAWAII_P_A0;
  90                 break;
  91         case CHIP_MULLINS:
  92                 ws->family = FAMILY_KV;
  93                 ws->rev_id = ML_GODAVARI_A0;
  94                 break;
  95         case CHIP_TONGA:
  96                 ws->family = FAMILY_VI;
  97                 ws->rev_id = VI_TONGA_P_A0;
  98                 break;
  99         case CHIP_ICELAND:
 100                 ws->family = FAMILY_VI;
 101                 ws->rev_id = VI_ICELAND_M_A0;
 102                 break;
 103         case CHIP_CARRIZO:
 104                 ws->family = FAMILY_CZ;
 105                 ws->rev_id = CARRIZO_A0;
 106                 break;
 107         case CHIP_STONEY:
 108                 ws->family = FAMILY_CZ;
 109                 ws->rev_id = STONEY_A0;
 110                 break;
 111         case CHIP_FIJI:
 112                 ws->family = FAMILY_VI;
 113                 ws->rev_id = VI_FIJI_P_A0;
 114                 break;
 115         case CHIP_POLARIS10:
 116                 ws->family = FAMILY_VI;
 117                 ws->rev_id = VI_POLARIS10_P_A0;
 118                 break;
 119         case CHIP_POLARIS11:
 120                 ws->family = FAMILY_VI;
 121                 ws->rev_id = VI_POLARIS11_M_A0;
 122                 break;
 123         case CHIP_POLARIS12:
 124                 ws->family = FAMILY_VI;
 125                 ws->rev_id = VI_POLARIS12_V_A0;
 126                 break;
 127         default:
 128                 fprintf(stderr, "amdgpu: Unknown family.\n");
 129                 goto fail;
 130         }
 131
 132         ws->addrlib = radv_amdgpu_addr_create(&ws->amdinfo, ws->family, ws->rev_id, ws->info.chip_class);
 133         if (!ws->addrlib) {
 134                 fprintf(stderr, "amdgpu: Cannot create addrlib.\n");
 135                 goto fail;
 136         }
 137
 138         ws->info.num_sdma_rings = MIN2(ws->info.num_sdma_rings, MAX_RINGS_PER_TYPE);
 139         ws->info.num_compute_rings = MIN2(ws->info.num_compute_rings, MAX_RINGS_PER_TYPE);
 140
 141         ws->use_ib_bos = ws->info.chip_class >= CIK;
 142         return true;
 143 fail:
 144         return false;
 145 }
 146
 147 static void radv_amdgpu_winsys_query_info(struct radeon_winsys *rws,
 148                                      struct radeon_info *info)
 149 {
 150         *info = ((struct radv_amdgpu_winsys *)rws)->info;
 151 }
 152
 153 static void radv_amdgpu_winsys_destroy(struct radeon_winsys *rws)
 154 {
 155         struct radv_amdgpu_winsys *ws = (struct radv_amdgpu_winsys*)rws;
 156
 157         AddrDestroy(ws->addrlib);
 158         amdgpu_device_deinitialize(ws->dev);
 159         FREE(rws);
 160 }
 161
 162 struct radeon_winsys *
 163 radv_amdgpu_winsys_create(int fd, uint32_t debug_flags)
 164 {
 165         uint32_t drm_major, drm_minor, r;
 166         amdgpu_device_handle dev;
 167         struct radv_amdgpu_winsys *ws;
 168
 169         r = amdgpu_device_initialize(fd, &drm_major, &drm_minor, &dev);
 170         if (r)
 171                 return NULL;
 172
 173         ws = calloc(1, sizeof(struct radv_amdgpu_winsys));
 174         if (!ws)
 175                 goto fail;
 176
 177         ws->dev = dev;
 178         ws->info.drm_major = drm_major;
 179         ws->info.drm_minor = drm_minor;
 180         if (!do_winsys_init(ws, fd))
 181                 goto winsys_fail;
 182
 183         ws->debug_all_bos = !!(debug_flags & RADV_DEBUG_ALL_BOS);
 184         if (debug_flags & RADV_DEBUG_NO_IBS)
 185                 ws->use_ib_bos = false;
 186
 187         LIST_INITHEAD(&ws->global_bo_list);
 188         pthread_mutex_init(&ws->global_bo_list_lock, NULL);
 189         ws->base.query_info = radv_amdgpu_winsys_query_info;
 190         ws->base.destroy = radv_amdgpu_winsys_destroy;
 191         radv_amdgpu_bo_init_functions(ws);
 192         radv_amdgpu_cs_init_functions(ws);
 193         radv_amdgpu_surface_init_functions(ws);
 194
 195         return &ws->base;
 196
 197 winsys_fail:
 198         free(ws);
 199 fail:
 200         amdgpu_device_deinitialize(dev);
 201         return NULL;
 202 }